drivers/net/ethernet/intel/e1000e/netdev.c

   1 /* Intel PRO/1000 Linux driver
   2  * Copyright(c) 1999 - 2015 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * The full GNU General Public License is included in this distribution in
  14  * the file called "COPYING".
  15  *
  16  * Contact Information:
  17  * Linux NICS <linux.nics@intel.com>
  18  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20  */
  21
  22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  23
  24 #include <linux/module.h>
  25 #include <linux/types.h>
  26 #include <linux/init.h>
  27 #include <linux/pci.h>
  28 #include <linux/vmalloc.h>
  29 #include <linux/pagemap.h>
  30 #include <linux/delay.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/tcp.h>
  34 #include <linux/ipv6.h>
  35 #include <linux/slab.h>
  36 #include <net/checksum.h>
  37 #include <net/ip6_checksum.h>
  38 #include <linux/ethtool.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/cpu.h>
  41 #include <linux/smp.h>
  42 #include <linux/pm_qos.h>
  43 #include <linux/pm_runtime.h>
  44 #include <linux/aer.h>
  45 #include <linux/prefetch.h>
  46
  47 #include "e1000.h"
  48
  49 #define DRV_EXTRAVERSION "-k"
  50
  51 #define DRV_VERSION "3.2.6" DRV_EXTRAVERSION
  52 char e1000e_driver_name[] = "e1000e";
  53 const char e1000e_driver_version[] = DRV_VERSION;
  54
  55 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  56 static int debug = -1;
  57 module_param(debug, int, 0);
  58 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  59
  60 static const struct e1000_info *e1000_info_tbl[] = {
  61         [board_82571]           = &e1000_82571_info,
  62         [board_82572]           = &e1000_82572_info,
  63         [board_82573]           = &e1000_82573_info,
  64         [board_82574]           = &e1000_82574_info,
  65         [board_82583]           = &e1000_82583_info,
  66         [board_80003es2lan]     = &e1000_es2_info,
  67         [board_ich8lan]         = &e1000_ich8_info,
  68         [board_ich9lan]         = &e1000_ich9_info,
  69         [board_ich10lan]        = &e1000_ich10_info,
  70         [board_pchlan]          = &e1000_pch_info,
  71         [board_pch2lan]         = &e1000_pch2_info,
  72         [board_pch_lpt]         = &e1000_pch_lpt_info,
  73         [board_pch_spt]         = &e1000_pch_spt_info,
  74         [board_pch_cnp]         = &e1000_pch_cnp_info,
  75 };
  76
  77 struct e1000_reg_info {
  78         u32 ofs;
  79         char *name;
  80 };
  81
  82 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
  83         /* General Registers */
  84         {E1000_CTRL, "CTRL"},
  85         {E1000_STATUS, "STATUS"},
  86         {E1000_CTRL_EXT, "CTRL_EXT"},
  87
  88         /* Interrupt Registers */
  89         {E1000_ICR, "ICR"},
  90
  91         /* Rx Registers */
  92         {E1000_RCTL, "RCTL"},
  93         {E1000_RDLEN(0), "RDLEN"},
  94         {E1000_RDH(0), "RDH"},
  95         {E1000_RDT(0), "RDT"},
  96         {E1000_RDTR, "RDTR"},
  97         {E1000_RXDCTL(0), "RXDCTL"},
  98         {E1000_ERT, "ERT"},
  99         {E1000_RDBAL(0), "RDBAL"},
 100         {E1000_RDBAH(0), "RDBAH"},
 101         {E1000_RDFH, "RDFH"},
 102         {E1000_RDFT, "RDFT"},
 103         {E1000_RDFHS, "RDFHS"},
 104         {E1000_RDFTS, "RDFTS"},
 105         {E1000_RDFPC, "RDFPC"},
 106
 107         /* Tx Registers */
 108         {E1000_TCTL, "TCTL"},
 109         {E1000_TDBAL(0), "TDBAL"},
 110         {E1000_TDBAH(0), "TDBAH"},
 111         {E1000_TDLEN(0), "TDLEN"},
 112         {E1000_TDH(0), "TDH"},
 113         {E1000_TDT(0), "TDT"},
 114         {E1000_TIDV, "TIDV"},
 115         {E1000_TXDCTL(0), "TXDCTL"},
 116         {E1000_TADV, "TADV"},
 117         {E1000_TARC(0), "TARC"},
 118         {E1000_TDFH, "TDFH"},
 119         {E1000_TDFT, "TDFT"},
 120         {E1000_TDFHS, "TDFHS"},
 121         {E1000_TDFTS, "TDFTS"},
 122         {E1000_TDFPC, "TDFPC"},
 123
 124         /* List Terminator */
 125         {0, NULL}
 126 };
 127
 128 /**
 129  * __ew32_prepare - prepare to write to MAC CSR register on certain parts
 130  * @hw: pointer to the HW structure
 131  *
 132  * When updating the MAC CSR registers, the Manageability Engine (ME) could
 133  * be accessing the registers at the same time.  Normally, this is handled in
 134  * h/w by an arbiter but on some parts there is a bug that acknowledges Host
 135  * accesses later than it should which could result in the register to have
 136  * an incorrect value.  Workaround this by checking the FWSM register which
 137  * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
 138  * and try again a number of times.
 139  **/
 140 static void __ew32_prepare(struct e1000_hw *hw)
 141 {
 142         s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
 143
 144         while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
 145                 udelay(50);
 146 }
 147
 148 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
 149 {
 150         if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 151                 __ew32_prepare(hw);
 152
 153         writel(val, hw->hw_addr + reg);
 154 }
 155
 156 /**
 157  * e1000_regdump - register printout routine
 158  * @hw: pointer to the HW structure
 159  * @reginfo: pointer to the register info table
 160  **/
 161 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
 162 {
 163         int n = 0;
 164         char rname[16];
 165         u32 regs[8];
 166
 167         switch (reginfo->ofs) {
 168         case E1000_RXDCTL(0):
 169                 for (n = 0; n < 2; n++)
 170                         regs[n] = __er32(hw, E1000_RXDCTL(n));
 171                 break;
 172         case E1000_TXDCTL(0):
 173                 for (n = 0; n < 2; n++)
 174                         regs[n] = __er32(hw, E1000_TXDCTL(n));
 175                 break;
 176         case E1000_TARC(0):
 177                 for (n = 0; n < 2; n++)
 178                         regs[n] = __er32(hw, E1000_TARC(n));
 179                 break;
 180         default:
 181                 pr_info("%-15s %08x\n",
 182                         reginfo->name, __er32(hw, reginfo->ofs));
 183                 return;
 184         }
 185
 186         snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
 187         pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
 188 }
 189
 190 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
 191                                  struct e1000_buffer *bi)
 192 {
 193         int i;
 194         struct e1000_ps_page *ps_page;
 195
 196         for (i = 0; i < adapter->rx_ps_pages; i++) {
 197                 ps_page = &bi->ps_pages[i];
 198
 199                 if (ps_page->page) {
 200                         pr_info("packet dump for ps_page %d:\n", i);
 201                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 202                                        16, 1, page_address(ps_page->page),
 203                                        PAGE_SIZE, true);
 204                 }
 205         }
 206 }
 207
 208 /**
 209  * e1000e_dump - Print registers, Tx-ring and Rx-ring
 210  * @adapter: board private structure
 211  **/
 212 static void e1000e_dump(struct e1000_adapter *adapter)
 213 {
 214         struct net_device *netdev = adapter->netdev;
 215         struct e1000_hw *hw = &adapter->hw;
 216         struct e1000_reg_info *reginfo;
 217         struct e1000_ring *tx_ring = adapter->tx_ring;
 218         struct e1000_tx_desc *tx_desc;
 219         struct my_u0 {
 220                 __le64 a;
 221                 __le64 b;
 222         } *u0;
 223         struct e1000_buffer *buffer_info;
 224         struct e1000_ring *rx_ring = adapter->rx_ring;
 225         union e1000_rx_desc_packet_split *rx_desc_ps;
 226         union e1000_rx_desc_extended *rx_desc;
 227         struct my_u1 {
 228                 __le64 a;
 229                 __le64 b;
 230                 __le64 c;
 231                 __le64 d;
 232         } *u1;
 233         u32 staterr;
 234         int i = 0;
 235
 236         if (!netif_msg_hw(adapter))
 237                 return;
 238
 239         /* Print netdevice Info */
 240         if (netdev) {
 241                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 242                 pr_info("Device Name     state            trans_start\n");
 243                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 244                         netdev->state, dev_trans_start(netdev));
 245         }
 246
 247         /* Print Registers */
 248         dev_info(&adapter->pdev->dev, "Register Dump\n");
 249         pr_info(" Register Name   Value\n");
 250         for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
 251              reginfo->name; reginfo++) {
 252                 e1000_regdump(hw, reginfo);
 253         }
 254
 255         /* Print Tx Ring Summary */
 256         if (!netdev || !netif_running(netdev))
 257                 return;
 258
 259         dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
 260         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 261         buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
 262         pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
 263                 0, tx_ring->next_to_use, tx_ring->next_to_clean,
 264                 (unsigned long long)buffer_info->dma,
 265                 buffer_info->length,
 266                 buffer_info->next_to_watch,
 267                 (unsigned long long)buffer_info->time_stamp);
 268
 269         /* Print Tx Ring */
 270         if (!netif_msg_tx_done(adapter))
 271                 goto rx_ring_summary;
 272
 273         dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
 274
 275         /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
 276          *
 277          * Legacy Transmit Descriptor
 278          *   +--------------------------------------------------------------+
 279          * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
 280          *   +--------------------------------------------------------------+
 281          * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
 282          *   +--------------------------------------------------------------+
 283          *   63       48 47        36 35    32 31     24 23    16 15        0
 284          *
 285          * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
 286          *   63      48 47    40 39       32 31             16 15    8 7      0
 287          *   +----------------------------------------------------------------+
 288          * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
 289          *   +----------------------------------------------------------------+
 290          * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
 291          *   +----------------------------------------------------------------+
 292          *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
 293          *
 294          * Extended Data Descriptor (DTYP=0x1)
 295          *   +----------------------------------------------------------------+
 296          * 0 |                     Buffer Address [63:0]                      |
 297          *   +----------------------------------------------------------------+
 298          * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
 299          *   +----------------------------------------------------------------+
 300          *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
 301          */
 302         pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");
 303         pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");
 304         pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");
 305         for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 306                 const char *next_desc;
 307                 tx_desc = E1000_TX_DESC(*tx_ring, i);
 308                 buffer_info = &tx_ring->buffer_info[i];
 309                 u0 = (struct my_u0 *)tx_desc;
 310                 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
 311                         next_desc = " NTC/U";
 312                 else if (i == tx_ring->next_to_use)
 313                         next_desc = " NTU";
 314                 else if (i == tx_ring->next_to_clean)
 315                         next_desc = " NTC";
 316                 else
 317                         next_desc = "";
 318                 pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",
 319                         (!(le64_to_cpu(u0->b) & BIT(29)) ? 'l' :
 320                          ((le64_to_cpu(u0->b) & BIT(20)) ? 'd' : 'c')),
 321                         i,
 322                         (unsigned long long)le64_to_cpu(u0->a),
 323                         (unsigned long long)le64_to_cpu(u0->b),
 324                         (unsigned long long)buffer_info->dma,
 325                         buffer_info->length, buffer_info->next_to_watch,
 326                         (unsigned long long)buffer_info->time_stamp,
 327                         buffer_info->skb, next_desc);
 328
 329                 if (netif_msg_pktdata(adapter) && buffer_info->skb)
 330                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 331                                        16, 1, buffer_info->skb->data,
 332                                        buffer_info->skb->len, true);
 333         }
 334
 335         /* Print Rx Ring Summary */
 336 rx_ring_summary:
 337         dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
 338         pr_info("Queue [NTU] [NTC]\n");
 339         pr_info(" %5d %5X %5X\n",
 340                 0, rx_ring->next_to_use, rx_ring->next_to_clean);
 341
 342         /* Print Rx Ring */
 343         if (!netif_msg_rx_status(adapter))
 344                 return;
 345
 346         dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
 347         switch (adapter->rx_ps_pages) {
 348         case 1:
 349         case 2:
 350         case 3:
 351                 /* [Extended] Packet Split Receive Descriptor Format
 352                  *
 353                  *    +-----------------------------------------------------+
 354                  *  0 |                Buffer Address 0 [63:0]              |
 355                  *    +-----------------------------------------------------+
 356                  *  8 |                Buffer Address 1 [63:0]              |
 357                  *    +-----------------------------------------------------+
 358                  * 16 |                Buffer Address 2 [63:0]              |
 359                  *    +-----------------------------------------------------+
 360                  * 24 |                Buffer Address 3 [63:0]              |
 361                  *    +-----------------------------------------------------+
 362                  */
 363                 pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");
 364                 /* [Extended] Receive Descriptor (Write-Back) Format
 365                  *
 366                  *   63       48 47    32 31     13 12    8 7    4 3        0
 367                  *   +------------------------------------------------------+
 368                  * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
 369                  *   | Checksum | Ident  |         | Queue |      |  Type   |
 370                  *   +------------------------------------------------------+
 371                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 372                  *   +------------------------------------------------------+
 373                  *   63       48 47    32 31            20 19               0
 374                  */
 375                 pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
 376                 for (i = 0; i < rx_ring->count; i++) {
 377                         const char *next_desc;
 378                         buffer_info = &rx_ring->buffer_info[i];
 379                         rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
 380                         u1 = (struct my_u1 *)rx_desc_ps;
 381                         staterr =
 382                             le32_to_cpu(rx_desc_ps->wb.middle.status_error);
 383
 384                         if (i == rx_ring->next_to_use)
 385                                 next_desc = " NTU";
 386                         else if (i == rx_ring->next_to_clean)
 387                                 next_desc = " NTC";
 388                         else
 389                                 next_desc = "";
 390
 391                         if (staterr & E1000_RXD_STAT_DD) {
 392                                 /* Descriptor Done */
 393                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",
 394                                         "RWB", i,
 395                                         (unsigned long long)le64_to_cpu(u1->a),
 396                                         (unsigned long long)le64_to_cpu(u1->b),
 397                                         (unsigned long long)le64_to_cpu(u1->c),
 398                                         (unsigned long long)le64_to_cpu(u1->d),
 399                                         buffer_info->skb, next_desc);
 400                         } else {
 401                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",
 402                                         "R  ", i,
 403                                         (unsigned long long)le64_to_cpu(u1->a),
 404                                         (unsigned long long)le64_to_cpu(u1->b),
 405                                         (unsigned long long)le64_to_cpu(u1->c),
 406                                         (unsigned long long)le64_to_cpu(u1->d),
 407                                         (unsigned long long)buffer_info->dma,
 408                                         buffer_info->skb, next_desc);
 409
 410                                 if (netif_msg_pktdata(adapter))
 411                                         e1000e_dump_ps_pages(adapter,
 412                                                              buffer_info);
 413                         }
 414                 }
 415                 break;
 416         default:
 417         case 0:
 418                 /* Extended Receive Descriptor (Read) Format
 419                  *
 420                  *   +-----------------------------------------------------+
 421                  * 0 |                Buffer Address [63:0]                |
 422                  *   +-----------------------------------------------------+
 423                  * 8 |                      Reserved                       |
 424                  *   +-----------------------------------------------------+
 425                  */
 426                 pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");
 427                 /* Extended Receive Descriptor (Write-Back) Format
 428                  *
 429                  *   63       48 47    32 31    24 23            4 3        0
 430                  *   +------------------------------------------------------+
 431                  *   |     RSS Hash      |        |               |         |
 432                  * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |
 433                  *   | Packet   | IP     |        |               |  Type   |
 434                  *   | Checksum | Ident  |        |               |         |
 435                  *   +------------------------------------------------------+
 436                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 437                  *   +------------------------------------------------------+
 438                  *   63       48 47    32 31            20 19               0
 439                  */
 440                 pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");
 441
 442                 for (i = 0; i < rx_ring->count; i++) {
 443                         const char *next_desc;
 444
 445                         buffer_info = &rx_ring->buffer_info[i];
 446                         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 447                         u1 = (struct my_u1 *)rx_desc;
 448                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 449
 450                         if (i == rx_ring->next_to_use)
 451                                 next_desc = " NTU";
 452                         else if (i == rx_ring->next_to_clean)
 453                                 next_desc = " NTC";
 454                         else
 455                                 next_desc = "";
 456
 457                         if (staterr & E1000_RXD_STAT_DD) {
 458                                 /* Descriptor Done */
 459                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 460                                         "RWB", i,
 461                                         (unsigned long long)le64_to_cpu(u1->a),
 462                                         (unsigned long long)le64_to_cpu(u1->b),
 463                                         buffer_info->skb, next_desc);
 464                         } else {
 465                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",
 466                                         "R  ", i,
 467                                         (unsigned long long)le64_to_cpu(u1->a),
 468                                         (unsigned long long)le64_to_cpu(u1->b),
 469                                         (unsigned long long)buffer_info->dma,
 470                                         buffer_info->skb, next_desc);
 471
 472                                 if (netif_msg_pktdata(adapter) &&
 473                                     buffer_info->skb)
 474                                         print_hex_dump(KERN_INFO, "",
 475                                                        DUMP_PREFIX_ADDRESS, 16,
 476                                                        1,
 477                                                        buffer_info->skb->data,
 478                                                        adapter->rx_buffer_len,
 479                                                        true);
 480                         }
 481                 }
 482         }
 483 }
 484
 485 /**
 486  * e1000_desc_unused - calculate if we have unused descriptors
 487  **/
 488 static int e1000_desc_unused(struct e1000_ring *ring)
 489 {
 490         if (ring->next_to_clean > ring->next_to_use)
 491                 return ring->next_to_clean - ring->next_to_use - 1;
 492
 493         return ring->count + ring->next_to_clean - ring->next_to_use - 1;
 494 }
 495
 496 /**
 497  * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
 498  * @adapter: board private structure
 499  * @hwtstamps: time stamp structure to update
 500  * @systim: unsigned 64bit system time value.
 501  *
 502  * Convert the system time value stored in the RX/TXSTMP registers into a
 503  * hwtstamp which can be used by the upper level time stamping functions.
 504  *
 505  * The 'systim_lock' spinlock is used to protect the consistency of the
 506  * system time value. This is needed because reading the 64 bit time
 507  * value involves reading two 32 bit registers. The first read latches the
 508  * value.
 509  **/
 510 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
 511                                       struct skb_shared_hwtstamps *hwtstamps,
 512                                       u64 systim)
 513 {
 514         u64 ns;
 515         unsigned long flags;
 516
 517         spin_lock_irqsave(&adapter->systim_lock, flags);
 518         ns = timecounter_cyc2time(&adapter->tc, systim);
 519         spin_unlock_irqrestore(&adapter->systim_lock, flags);
 520
 521         memset(hwtstamps, 0, sizeof(*hwtstamps));
 522         hwtstamps->hwtstamp = ns_to_ktime(ns);
 523 }
 524
 525 /**
 526  * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
 527  * @adapter: board private structure
 528  * @status: descriptor extended error and status field
 529  * @skb: particular skb to include time stamp
 530  *
 531  * If the time stamp is valid, convert it into the timecounter ns value
 532  * and store that result into the shhwtstamps structure which is passed
 533  * up the network stack.
 534  **/
 535 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
 536                                struct sk_buff *skb)
 537 {
 538         struct e1000_hw *hw = &adapter->hw;
 539         u64 rxstmp;
 540
 541         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
 542             !(status & E1000_RXDEXT_STATERR_TST) ||
 543             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 544                 return;
 545
 546         /* The Rx time stamp registers contain the time stamp.  No other
 547          * received packet will be time stamped until the Rx time stamp
 548          * registers are read.  Because only one packet can be time stamped
 549          * at a time, the register values must belong to this packet and
 550          * therefore none of the other additional attributes need to be
 551          * compared.
 552          */
 553         rxstmp = (u64)er32(RXSTMPL);
 554         rxstmp |= (u64)er32(RXSTMPH) << 32;
 555         e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
 556
 557         adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
 558 }
 559
 560 /**
 561  * e1000_receive_skb - helper function to handle Rx indications
 562  * @adapter: board private structure
 563  * @staterr: descriptor extended error and status field as written by hardware
 564  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
 565  * @skb: pointer to sk_buff to be indicated to stack
 566  **/
 567 static void e1000_receive_skb(struct e1000_adapter *adapter,
 568                               struct net_device *netdev, struct sk_buff *skb,
 569                               u32 staterr, __le16 vlan)
 570 {
 571         u16 tag = le16_to_cpu(vlan);
 572
 573         e1000e_rx_hwtstamp(adapter, staterr, skb);
 574
 575         skb->protocol = eth_type_trans(skb, netdev);
 576
 577         if (staterr & E1000_RXD_STAT_VP)
 578                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
 579
 580         napi_gro_receive(&adapter->napi, skb);
 581 }
 582
 583 /**
 584  * e1000_rx_checksum - Receive Checksum Offload
 585  * @adapter: board private structure
 586  * @status_err: receive descriptor status and error fields
 587  * @csum: receive descriptor csum field
 588  * @sk_buff: socket buffer with received data
 589  **/
 590 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
 591                               struct sk_buff *skb)
 592 {
 593         u16 status = (u16)status_err;
 594         u8 errors = (u8)(status_err >> 24);
 595
 596         skb_checksum_none_assert(skb);
 597
 598         /* Rx checksum disabled */
 599         if (!(adapter->netdev->features & NETIF_F_RXCSUM))
 600                 return;
 601
 602         /* Ignore Checksum bit is set */
 603         if (status & E1000_RXD_STAT_IXSM)
 604                 return;
 605
 606         /* TCP/UDP checksum error bit or IP checksum error bit is set */
 607         if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
 608                 /* let the stack verify checksum errors */
 609                 adapter->hw_csum_err++;
 610                 return;
 611         }
 612
 613         /* TCP/UDP Checksum has not been calculated */
 614         if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
 615                 return;
 616
 617         /* It must be a TCP or UDP packet with a valid checksum */
 618         skb->ip_summed = CHECKSUM_UNNECESSARY;
 619         adapter->hw_csum_good++;
 620 }
 621
 622 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
 623 {
 624         struct e1000_adapter *adapter = rx_ring->adapter;
 625         struct e1000_hw *hw = &adapter->hw;
 626
 627         __ew32_prepare(hw);
 628         writel(i, rx_ring->tail);
 629
 630         if (unlikely(i != readl(rx_ring->tail))) {
 631                 u32 rctl = er32(RCTL);
 632
 633                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
 634                 e_err("ME firmware caused invalid RDT - resetting\n");
 635                 schedule_work(&adapter->reset_task);
 636         }
 637 }
 638
 639 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
 640 {
 641         struct e1000_adapter *adapter = tx_ring->adapter;
 642         struct e1000_hw *hw = &adapter->hw;
 643
 644         __ew32_prepare(hw);
 645         writel(i, tx_ring->tail);
 646
 647         if (unlikely(i != readl(tx_ring->tail))) {
 648                 u32 tctl = er32(TCTL);
 649
 650                 ew32(TCTL, tctl & ~E1000_TCTL_EN);
 651                 e_err("ME firmware caused invalid TDT - resetting\n");
 652                 schedule_work(&adapter->reset_task);
 653         }
 654 }
 655
 656 /**
 657  * e1000_alloc_rx_buffers - Replace used receive buffers
 658  * @rx_ring: Rx descriptor ring
 659  **/
 660 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
 661                                    int cleaned_count, gfp_t gfp)
 662 {
 663         struct e1000_adapter *adapter = rx_ring->adapter;
 664         struct net_device *netdev = adapter->netdev;
 665         struct pci_dev *pdev = adapter->pdev;
 666         union e1000_rx_desc_extended *rx_desc;
 667         struct e1000_buffer *buffer_info;
 668         struct sk_buff *skb;
 669         unsigned int i;
 670         unsigned int bufsz = adapter->rx_buffer_len;
 671
 672         i = rx_ring->next_to_use;
 673         buffer_info = &rx_ring->buffer_info[i];
 674
 675         while (cleaned_count--) {
 676                 skb = buffer_info->skb;
 677                 if (skb) {
 678                         skb_trim(skb, 0);
 679                         goto map_skb;
 680                 }
 681
 682                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 683                 if (!skb) {
 684                         /* Better luck next round */
 685                         adapter->alloc_rx_buff_failed++;
 686                         break;
 687                 }
 688
 689                 buffer_info->skb = skb;
 690 map_skb:
 691                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 692                                                   adapter->rx_buffer_len,
 693                                                   DMA_FROM_DEVICE);
 694                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 695                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 696                         adapter->rx_dma_failed++;
 697                         break;
 698                 }
 699
 700                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 701                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 702
 703                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 704                         /* Force memory writes to complete before letting h/w
 705                          * know there are new descriptors to fetch.  (Only
 706                          * applicable for weak-ordered memory model archs,
 707                          * such as IA-64).
 708                          */
 709                         wmb();
 710                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 711                                 e1000e_update_rdt_wa(rx_ring, i);
 712                         else
 713                                 writel(i, rx_ring->tail);
 714                 }
 715                 i++;
 716                 if (i == rx_ring->count)
 717                         i = 0;
 718                 buffer_info = &rx_ring->buffer_info[i];
 719         }
 720
 721         rx_ring->next_to_use = i;
 722 }
 723
 724 /**
 725  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
 726  * @rx_ring: Rx descriptor ring
 727  **/
 728 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
 729                                       int cleaned_count, gfp_t gfp)
 730 {
 731         struct e1000_adapter *adapter = rx_ring->adapter;
 732         struct net_device *netdev = adapter->netdev;
 733         struct pci_dev *pdev = adapter->pdev;
 734         union e1000_rx_desc_packet_split *rx_desc;
 735         struct e1000_buffer *buffer_info;
 736         struct e1000_ps_page *ps_page;
 737         struct sk_buff *skb;
 738         unsigned int i, j;
 739
 740         i = rx_ring->next_to_use;
 741         buffer_info = &rx_ring->buffer_info[i];
 742
 743         while (cleaned_count--) {
 744                 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
 745
 746                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
 747                         ps_page = &buffer_info->ps_pages[j];
 748                         if (j >= adapter->rx_ps_pages) {
 749                                 /* all unused desc entries get hw null ptr */
 750                                 rx_desc->read.buffer_addr[j + 1] =
 751                                     ~cpu_to_le64(0);
 752                                 continue;
 753                         }
 754                         if (!ps_page->page) {
 755                                 ps_page->page = alloc_page(gfp);
 756                                 if (!ps_page->page) {
 757                                         adapter->alloc_rx_buff_failed++;
 758                                         goto no_buffers;
 759                                 }
 760                                 ps_page->dma = dma_map_page(&pdev->dev,
 761                                                             ps_page->page,
 762                                                             0, PAGE_SIZE,
 763                                                             DMA_FROM_DEVICE);
 764                                 if (dma_mapping_error(&pdev->dev,
 765                                                       ps_page->dma)) {
 766                                         dev_err(&adapter->pdev->dev,
 767                                                 "Rx DMA page map failed\n");
 768                                         adapter->rx_dma_failed++;
 769                                         goto no_buffers;
 770                                 }
 771                         }
 772                         /* Refresh the desc even if buffer_addrs
 773                          * didn't change because each write-back
 774                          * erases this info.
 775                          */
 776                         rx_desc->read.buffer_addr[j + 1] =
 777                             cpu_to_le64(ps_page->dma);
 778                 }
 779
 780                 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
 781                                                   gfp);
 782
 783                 if (!skb) {
 784                         adapter->alloc_rx_buff_failed++;
 785                         break;
 786                 }
 787
 788                 buffer_info->skb = skb;
 789                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 790                                                   adapter->rx_ps_bsize0,
 791                                                   DMA_FROM_DEVICE);
 792                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 793                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 794                         adapter->rx_dma_failed++;
 795                         /* cleanup skb */
 796                         dev_kfree_skb_any(skb);
 797                         buffer_info->skb = NULL;
 798                         break;
 799                 }
 800
 801                 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
 802
 803                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 804                         /* Force memory writes to complete before letting h/w
 805                          * know there are new descriptors to fetch.  (Only
 806                          * applicable for weak-ordered memory model archs,
 807                          * such as IA-64).
 808                          */
 809                         wmb();
 810                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 811                                 e1000e_update_rdt_wa(rx_ring, i << 1);
 812                         else
 813                                 writel(i << 1, rx_ring->tail);
 814                 }
 815
 816                 i++;
 817                 if (i == rx_ring->count)
 818                         i = 0;
 819                 buffer_info = &rx_ring->buffer_info[i];
 820         }
 821
 822 no_buffers:
 823         rx_ring->next_to_use = i;
 824 }
 825
 826 /**
 827  * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
 828  * @rx_ring: Rx descriptor ring
 829  * @cleaned_count: number of buffers to allocate this pass
 830  **/
 831
 832 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
 833                                          int cleaned_count, gfp_t gfp)
 834 {
 835         struct e1000_adapter *adapter = rx_ring->adapter;
 836         struct net_device *netdev = adapter->netdev;
 837         struct pci_dev *pdev = adapter->pdev;
 838         union e1000_rx_desc_extended *rx_desc;
 839         struct e1000_buffer *buffer_info;
 840         struct sk_buff *skb;
 841         unsigned int i;
 842         unsigned int bufsz = 256 - 16;  /* for skb_reserve */
 843
 844         i = rx_ring->next_to_use;
 845         buffer_info = &rx_ring->buffer_info[i];
 846
 847         while (cleaned_count--) {
 848                 skb = buffer_info->skb;
 849                 if (skb) {
 850                         skb_trim(skb, 0);
 851                         goto check_page;
 852                 }
 853
 854                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 855                 if (unlikely(!skb)) {
 856                         /* Better luck next round */
 857                         adapter->alloc_rx_buff_failed++;
 858                         break;
 859                 }
 860
 861                 buffer_info->skb = skb;
 862 check_page:
 863                 /* allocate a new page if necessary */
 864                 if (!buffer_info->page) {
 865                         buffer_info->page = alloc_page(gfp);
 866                         if (unlikely(!buffer_info->page)) {
 867                                 adapter->alloc_rx_buff_failed++;
 868                                 break;
 869                         }
 870                 }
 871
 872                 if (!buffer_info->dma) {
 873                         buffer_info->dma = dma_map_page(&pdev->dev,
 874                                                         buffer_info->page, 0,
 875                                                         PAGE_SIZE,
 876                                                         DMA_FROM_DEVICE);
 877                         if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 878                                 adapter->alloc_rx_buff_failed++;
 879                                 break;
 880                         }
 881                 }
 882
 883                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 884                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 885
 886                 if (unlikely(++i == rx_ring->count))
 887                         i = 0;
 888                 buffer_info = &rx_ring->buffer_info[i];
 889         }
 890
 891         if (likely(rx_ring->next_to_use != i)) {
 892                 rx_ring->next_to_use = i;
 893                 if (unlikely(i-- == 0))
 894                         i = (rx_ring->count - 1);
 895
 896                 /* Force memory writes to complete before letting h/w
 897                  * know there are new descriptors to fetch.  (Only
 898                  * applicable for weak-ordered memory model archs,
 899                  * such as IA-64).
 900                  */
 901                 wmb();
 902                 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 903                         e1000e_update_rdt_wa(rx_ring, i);
 904                 else
 905                         writel(i, rx_ring->tail);
 906         }
 907 }
 908
 909 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
 910                                  struct sk_buff *skb)
 911 {
 912         if (netdev->features & NETIF_F_RXHASH)
 913                 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
 914 }
 915
 916 /**
 917  * e1000_clean_rx_irq - Send received data up the network stack
 918  * @rx_ring: Rx descriptor ring
 919  *
 920  * the return value indicates whether actual cleaning was done, there
 921  * is no guarantee that everything was cleaned
 922  **/
 923 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
 924                                int work_to_do)
 925 {
 926         struct e1000_adapter *adapter = rx_ring->adapter;
 927         struct net_device *netdev = adapter->netdev;
 928         struct pci_dev *pdev = adapter->pdev;
 929         struct e1000_hw *hw = &adapter->hw;
 930         union e1000_rx_desc_extended *rx_desc, *next_rxd;
 931         struct e1000_buffer *buffer_info, *next_buffer;
 932         u32 length, staterr;
 933         unsigned int i;
 934         int cleaned_count = 0;
 935         bool cleaned = false;
 936         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 937
 938         i = rx_ring->next_to_clean;
 939         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 940         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 941         buffer_info = &rx_ring->buffer_info[i];
 942
 943         while (staterr & E1000_RXD_STAT_DD) {
 944                 struct sk_buff *skb;
 945
 946                 if (*work_done >= work_to_do)
 947                         break;
 948                 (*work_done)++;
 949                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
 950
 951                 skb = buffer_info->skb;
 952                 buffer_info->skb = NULL;
 953
 954                 prefetch(skb->data - NET_IP_ALIGN);
 955
 956                 i++;
 957                 if (i == rx_ring->count)
 958                         i = 0;
 959                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
 960                 prefetch(next_rxd);
 961
 962                 next_buffer = &rx_ring->buffer_info[i];
 963
 964                 cleaned = true;
 965                 cleaned_count++;
 966                 dma_unmap_single(&pdev->dev, buffer_info->dma,
 967                                  adapter->rx_buffer_len, DMA_FROM_DEVICE);
 968                 buffer_info->dma = 0;
 969
 970                 length = le16_to_cpu(rx_desc->wb.upper.length);
 971
 972                 /* !EOP means multiple descriptors were used to store a single
 973                  * packet, if that's the case we need to toss it.  In fact, we
 974                  * need to toss every packet with the EOP bit clear and the
 975                  * next frame that _does_ have the EOP bit set, as it is by
 976                  * definition only a frame fragment
 977                  */
 978                 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
 979                         adapter->flags2 |= FLAG2_IS_DISCARDING;
 980
 981                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
 982                         /* All receives must fit into a single buffer */
 983                         e_dbg("Receive packet consumed multiple buffers\n");
 984                         /* recycle */
 985                         buffer_info->skb = skb;
 986                         if (staterr & E1000_RXD_STAT_EOP)
 987                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
 988                         goto next_desc;
 989                 }
 990
 991                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
 992                              !(netdev->features & NETIF_F_RXALL))) {
 993                         /* recycle */
 994                         buffer_info->skb = skb;
 995                         goto next_desc;
 996                 }
 997
 998                 /* adjust length to remove Ethernet CRC */
 999                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1000                         /* If configured to store CRC, don't subtract FCS,
1001                          * but keep the FCS bytes out of the total_rx_bytes
1002                          * counter
1003                          */
1004                         if (netdev->features & NETIF_F_RXFCS)
1005                                 total_rx_bytes -= 4;
1006                         else
1007                                 length -= 4;
1008                 }
1009
1010                 total_rx_bytes += length;
1011                 total_rx_packets++;
1012
1013                 /* code added for copybreak, this should improve
1014                  * performance for small packets with large amounts
1015                  * of reassembly being done in the stack
1016                  */
1017                 if (length < copybreak) {
1018                         struct sk_buff *new_skb =
1019                                 napi_alloc_skb(&adapter->napi, length);
1020                         if (new_skb) {
1021                                 skb_copy_to_linear_data_offset(new_skb,
1022                                                                -NET_IP_ALIGN,
1023                                                                (skb->data -
1024                                                                 NET_IP_ALIGN),
1025                                                                (length +
1026                                                                 NET_IP_ALIGN));
1027                                 /* save the skb in buffer_info as good */
1028                                 buffer_info->skb = skb;
1029                                 skb = new_skb;
1030                         }
1031                         /* else just continue with the old one */
1032                 }
1033                 /* end copybreak code */
1034                 skb_put(skb, length);
1035
1036                 /* Receive Checksum Offload */
1037                 e1000_rx_checksum(adapter, staterr, skb);
1038
1039                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1040
1041                 e1000_receive_skb(adapter, netdev, skb, staterr,
1042                                   rx_desc->wb.upper.vlan);
1043
1044 next_desc:
1045                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1046
1047                 /* return some buffers to hardware, one at a time is too slow */
1048                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1049                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1050                                               GFP_ATOMIC);
1051                         cleaned_count = 0;
1052                 }
1053
1054                 /* use prefetched values */
1055                 rx_desc = next_rxd;
1056                 buffer_info = next_buffer;
1057
1058                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1059         }
1060         rx_ring->next_to_clean = i;
1061
1062         cleaned_count = e1000_desc_unused(rx_ring);
1063         if (cleaned_count)
1064                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1065
1066         adapter->total_rx_bytes += total_rx_bytes;
1067         adapter->total_rx_packets += total_rx_packets;
1068         return cleaned;
1069 }
1070
1071 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1072                             struct e1000_buffer *buffer_info)
1073 {
1074         struct e1000_adapter *adapter = tx_ring->adapter;
1075
1076         if (buffer_info->dma) {
1077                 if (buffer_info->mapped_as_page)
1078                         dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1079                                        buffer_info->length, DMA_TO_DEVICE);
1080                 else
1081                         dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1082                                          buffer_info->length, DMA_TO_DEVICE);
1083                 buffer_info->dma = 0;
1084         }
1085         if (buffer_info->skb) {
1086                 dev_kfree_skb_any(buffer_info->skb);
1087                 buffer_info->skb = NULL;
1088         }
1089         buffer_info->time_stamp = 0;
1090 }
1091
1092 static void e1000_print_hw_hang(struct work_struct *work)
1093 {
1094         struct e1000_adapter *adapter = container_of(work,
1095                                                      struct e1000_adapter,
1096                                                      print_hang_task);
1097         struct net_device *netdev = adapter->netdev;
1098         struct e1000_ring *tx_ring = adapter->tx_ring;
1099         unsigned int i = tx_ring->next_to_clean;
1100         unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1101         struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1102         struct e1000_hw *hw = &adapter->hw;
1103         u16 phy_status, phy_1000t_status, phy_ext_status;
1104         u16 pci_status;
1105
1106         if (test_bit(__E1000_DOWN, &adapter->state))
1107                 return;
1108
1109         if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1110                 /* May be block on write-back, flush and detect again
1111                  * flush pending descriptor writebacks to memory
1112                  */
1113                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1114                 /* execute the writes immediately */
1115                 e1e_flush();
1116                 /* Due to rare timing issues, write to TIDV again to ensure
1117                  * the write is successful
1118                  */
1119                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1120                 /* execute the writes immediately */
1121                 e1e_flush();
1122                 adapter->tx_hang_recheck = true;
1123                 return;
1124         }
1125         adapter->tx_hang_recheck = false;
1126
1127         if (er32(TDH(0)) == er32(TDT(0))) {
1128                 e_dbg("false hang detected, ignoring\n");
1129                 return;
1130         }
1131
1132         /* Real hang detected */
1133         netif_stop_queue(netdev);
1134
1135         e1e_rphy(hw, MII_BMSR, &phy_status);
1136         e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1137         e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1138
1139         pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1140
1141         /* detected Hardware unit hang */
1142         e_err("Detected Hardware Unit Hang:\n"
1143               "  TDH                  <%x>\n"
1144               "  TDT                  <%x>\n"
1145               "  next_to_use          <%x>\n"
1146               "  next_to_clean        <%x>\n"
1147               "buffer_info[next_to_clean]:\n"
1148               "  time_stamp           <%lx>\n"
1149               "  next_to_watch        <%x>\n"
1150               "  jiffies              <%lx>\n"
1151               "  next_to_watch.status <%x>\n"
1152               "MAC Status             <%x>\n"
1153               "PHY Status             <%x>\n"
1154               "PHY 1000BASE-T Status  <%x>\n"
1155               "PHY Extended Status    <%x>\n"
1156               "PCI Status             <%x>\n",
1157               readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1158               tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1159               eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1160               phy_status, phy_1000t_status, phy_ext_status, pci_status);
1161
1162         e1000e_dump(adapter);
1163
1164         /* Suggest workaround for known h/w issue */
1165         if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1166                 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1167 }
1168
1169 /**
1170  * e1000e_tx_hwtstamp_work - check for Tx time stamp
1171  * @work: pointer to work struct
1172  *
1173  * This work function polls the TSYNCTXCTL valid bit to determine when a
1174  * timestamp has been taken for the current stored skb.  The timestamp must
1175  * be for this skb because only one such packet is allowed in the queue.
1176  */
1177 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1178 {
1179         struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1180                                                      tx_hwtstamp_work);
1181         struct e1000_hw *hw = &adapter->hw;
1182
1183         if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1184                 struct sk_buff *skb = adapter->tx_hwtstamp_skb;
1185                 struct skb_shared_hwtstamps shhwtstamps;
1186                 u64 txstmp;
1187
1188                 txstmp = er32(TXSTMPL);
1189                 txstmp |= (u64)er32(TXSTMPH) << 32;
1190
1191                 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1192
1193                 /* Clear the global tx_hwtstamp_skb pointer and force writes
1194                  * prior to notifying the stack of a Tx timestamp.
1195                  */
1196                 adapter->tx_hwtstamp_skb = NULL;
1197                 wmb(); /* force write prior to skb_tstamp_tx */
1198
1199                 skb_tstamp_tx(skb, &shhwtstamps);
1200                 dev_kfree_skb_any(skb);
1201         } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1202                               + adapter->tx_timeout_factor * HZ)) {
1203                 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1204                 adapter->tx_hwtstamp_skb = NULL;
1205                 adapter->tx_hwtstamp_timeouts++;
1206                 e_warn("clearing Tx timestamp hang\n");
1207         } else {
1208                 /* reschedule to check later */
1209                 schedule_work(&adapter->tx_hwtstamp_work);
1210         }
1211 }
1212
1213 /**
1214  * e1000_clean_tx_irq - Reclaim resources after transmit completes
1215  * @tx_ring: Tx descriptor ring
1216  *
1217  * the return value indicates whether actual cleaning was done, there
1218  * is no guarantee that everything was cleaned
1219  **/
1220 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1221 {
1222         struct e1000_adapter *adapter = tx_ring->adapter;
1223         struct net_device *netdev = adapter->netdev;
1224         struct e1000_hw *hw = &adapter->hw;
1225         struct e1000_tx_desc *tx_desc, *eop_desc;
1226         struct e1000_buffer *buffer_info;
1227         unsigned int i, eop;
1228         unsigned int count = 0;
1229         unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1230         unsigned int bytes_compl = 0, pkts_compl = 0;
1231
1232         i = tx_ring->next_to_clean;
1233         eop = tx_ring->buffer_info[i].next_to_watch;
1234         eop_desc = E1000_TX_DESC(*tx_ring, eop);
1235
1236         while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1237                (count < tx_ring->count)) {
1238                 bool cleaned = false;
1239
1240                 dma_rmb();              /* read buffer_info after eop_desc */
1241                 for (; !cleaned; count++) {
1242                         tx_desc = E1000_TX_DESC(*tx_ring, i);
1243                         buffer_info = &tx_ring->buffer_info[i];
1244                         cleaned = (i == eop);
1245
1246                         if (cleaned) {
1247                                 total_tx_packets += buffer_info->segs;
1248                                 total_tx_bytes += buffer_info->bytecount;
1249                                 if (buffer_info->skb) {
1250                                         bytes_compl += buffer_info->skb->len;
1251                                         pkts_compl++;
1252                                 }
1253                         }
1254
1255                         e1000_put_txbuf(tx_ring, buffer_info);
1256                         tx_desc->upper.data = 0;
1257
1258                         i++;
1259                         if (i == tx_ring->count)
1260                                 i = 0;
1261                 }
1262
1263                 if (i == tx_ring->next_to_use)
1264                         break;
1265                 eop = tx_ring->buffer_info[i].next_to_watch;
1266                 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1267         }
1268
1269         tx_ring->next_to_clean = i;
1270
1271         netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1272
1273 #define TX_WAKE_THRESHOLD 32
1274         if (count && netif_carrier_ok(netdev) &&
1275             e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1276                 /* Make sure that anybody stopping the queue after this
1277                  * sees the new next_to_clean.
1278                  */
1279                 smp_mb();
1280
1281                 if (netif_queue_stopped(netdev) &&
1282                     !(test_bit(__E1000_DOWN, &adapter->state))) {
1283                         netif_wake_queue(netdev);
1284                         ++adapter->restart_queue;
1285                 }
1286         }
1287
1288         if (adapter->detect_tx_hung) {
1289                 /* Detect a transmit hang in hardware, this serializes the
1290                  * check with the clearing of time_stamp and movement of i
1291                  */
1292                 adapter->detect_tx_hung = false;
1293                 if (tx_ring->buffer_info[i].time_stamp &&
1294                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1295                                + (adapter->tx_timeout_factor * HZ)) &&
1296                     !(er32(STATUS) & E1000_STATUS_TXOFF))
1297                         schedule_work(&adapter->print_hang_task);
1298                 else
1299                         adapter->tx_hang_recheck = false;
1300         }
1301         adapter->total_tx_bytes += total_tx_bytes;
1302         adapter->total_tx_packets += total_tx_packets;
1303         return count < tx_ring->count;
1304 }
1305
1306 /**
1307  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1308  * @rx_ring: Rx descriptor ring
1309  *
1310  * the return value indicates whether actual cleaning was done, there
1311  * is no guarantee that everything was cleaned
1312  **/
1313 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1314                                   int work_to_do)
1315 {
1316         struct e1000_adapter *adapter = rx_ring->adapter;
1317         struct e1000_hw *hw = &adapter->hw;
1318         union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1319         struct net_device *netdev = adapter->netdev;
1320         struct pci_dev *pdev = adapter->pdev;
1321         struct e1000_buffer *buffer_info, *next_buffer;
1322         struct e1000_ps_page *ps_page;
1323         struct sk_buff *skb;
1324         unsigned int i, j;
1325         u32 length, staterr;
1326         int cleaned_count = 0;
1327         bool cleaned = false;
1328         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1329
1330         i = rx_ring->next_to_clean;
1331         rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1332         staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1333         buffer_info = &rx_ring->buffer_info[i];
1334
1335         while (staterr & E1000_RXD_STAT_DD) {
1336                 if (*work_done >= work_to_do)
1337                         break;
1338                 (*work_done)++;
1339                 skb = buffer_info->skb;
1340                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1341
1342                 /* in the packet split case this is header only */
1343                 prefetch(skb->data - NET_IP_ALIGN);
1344
1345                 i++;
1346                 if (i == rx_ring->count)
1347                         i = 0;
1348                 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1349                 prefetch(next_rxd);
1350
1351                 next_buffer = &rx_ring->buffer_info[i];
1352
1353                 cleaned = true;
1354                 cleaned_count++;
1355                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1356                                  adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1357                 buffer_info->dma = 0;
1358
1359                 /* see !EOP comment in other Rx routine */
1360                 if (!(staterr & E1000_RXD_STAT_EOP))
1361                         adapter->flags2 |= FLAG2_IS_DISCARDING;
1362
1363                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1364                         e_dbg("Packet Split buffers didn't pick up the full packet\n");
1365                         dev_kfree_skb_irq(skb);
1366                         if (staterr & E1000_RXD_STAT_EOP)
1367                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1368                         goto next_desc;
1369                 }
1370
1371                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1372                              !(netdev->features & NETIF_F_RXALL))) {
1373                         dev_kfree_skb_irq(skb);
1374                         goto next_desc;
1375                 }
1376
1377                 length = le16_to_cpu(rx_desc->wb.middle.length0);
1378
1379                 if (!length) {
1380                         e_dbg("Last part of the packet spanning multiple descriptors\n");
1381                         dev_kfree_skb_irq(skb);
1382                         goto next_desc;
1383                 }
1384
1385                 /* Good Receive */
1386                 skb_put(skb, length);
1387
1388                 {
1389                         /* this looks ugly, but it seems compiler issues make
1390                          * it more efficient than reusing j
1391                          */
1392                         int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1393
1394                         /* page alloc/put takes too long and effects small
1395                          * packet throughput, so unsplit small packets and
1396                          * save the alloc/put only valid in softirq (napi)
1397                          * context to call kmap_*
1398                          */
1399                         if (l1 && (l1 <= copybreak) &&
1400                             ((length + l1) <= adapter->rx_ps_bsize0)) {
1401                                 u8 *vaddr;
1402
1403                                 ps_page = &buffer_info->ps_pages[0];
1404
1405                                 /* there is no documentation about how to call
1406                                  * kmap_atomic, so we can't hold the mapping
1407                                  * very long
1408                                  */
1409                                 dma_sync_single_for_cpu(&pdev->dev,
1410                                                         ps_page->dma,
1411                                                         PAGE_SIZE,
1412                                                         DMA_FROM_DEVICE);
1413                                 vaddr = kmap_atomic(ps_page->page);
1414                                 memcpy(skb_tail_pointer(skb), vaddr, l1);
1415                                 kunmap_atomic(vaddr);
1416                                 dma_sync_single_for_device(&pdev->dev,
1417                                                            ps_page->dma,
1418                                                            PAGE_SIZE,
1419                                                            DMA_FROM_DEVICE);
1420
1421                                 /* remove the CRC */
1422                                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1423                                         if (!(netdev->features & NETIF_F_RXFCS))
1424                                                 l1 -= 4;
1425                                 }
1426
1427                                 skb_put(skb, l1);
1428                                 goto copydone;
1429                         }       /* if */
1430                 }
1431
1432                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1433                         length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1434                         if (!length)
1435                                 break;
1436
1437                         ps_page = &buffer_info->ps_pages[j];
1438                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1439                                        DMA_FROM_DEVICE);
1440                         ps_page->dma = 0;
1441                         skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1442                         ps_page->page = NULL;
1443                         skb->len += length;
1444                         skb->data_len += length;
1445                         skb->truesize += PAGE_SIZE;
1446                 }
1447
1448                 /* strip the ethernet crc, problem is we're using pages now so
1449                  * this whole operation can get a little cpu intensive
1450                  */
1451                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1452                         if (!(netdev->features & NETIF_F_RXFCS))
1453                                 pskb_trim(skb, skb->len - 4);
1454                 }
1455
1456 copydone:
1457                 total_rx_bytes += skb->len;
1458                 total_rx_packets++;
1459
1460                 e1000_rx_checksum(adapter, staterr, skb);
1461
1462                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1463
1464                 if (rx_desc->wb.upper.header_status &
1465                     cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1466                         adapter->rx_hdr_split++;
1467
1468                 e1000_receive_skb(adapter, netdev, skb, staterr,
1469                                   rx_desc->wb.middle.vlan);
1470
1471 next_desc:
1472                 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1473                 buffer_info->skb = NULL;
1474
1475                 /* return some buffers to hardware, one at a time is too slow */
1476                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1477                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1478                                               GFP_ATOMIC);
1479                         cleaned_count = 0;
1480                 }
1481
1482                 /* use prefetched values */
1483                 rx_desc = next_rxd;
1484                 buffer_info = next_buffer;
1485
1486                 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1487         }
1488         rx_ring->next_to_clean = i;
1489
1490         cleaned_count = e1000_desc_unused(rx_ring);
1491         if (cleaned_count)
1492                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1493
1494         adapter->total_rx_bytes += total_rx_bytes;
1495         adapter->total_rx_packets += total_rx_packets;
1496         return cleaned;
1497 }
1498
1499 /**
1500  * e1000_consume_page - helper function
1501  **/
1502 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1503                                u16 length)
1504 {
1505         bi->page = NULL;
1506         skb->len += length;
1507         skb->data_len += length;
1508         skb->truesize += PAGE_SIZE;
1509 }
1510
1511 /**
1512  * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1513  * @adapter: board private structure
1514  *
1515  * the return value indicates whether actual cleaning was done, there
1516  * is no guarantee that everything was cleaned
1517  **/
1518 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1519                                      int work_to_do)
1520 {
1521         struct e1000_adapter *adapter = rx_ring->adapter;
1522         struct net_device *netdev = adapter->netdev;
1523         struct pci_dev *pdev = adapter->pdev;
1524         union e1000_rx_desc_extended *rx_desc, *next_rxd;
1525         struct e1000_buffer *buffer_info, *next_buffer;
1526         u32 length, staterr;
1527         unsigned int i;
1528         int cleaned_count = 0;
1529         bool cleaned = false;
1530         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1531         struct skb_shared_info *shinfo;
1532
1533         i = rx_ring->next_to_clean;
1534         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1535         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1536         buffer_info = &rx_ring->buffer_info[i];
1537
1538         while (staterr & E1000_RXD_STAT_DD) {
1539                 struct sk_buff *skb;
1540
1541                 if (*work_done >= work_to_do)
1542                         break;
1543                 (*work_done)++;
1544                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1545
1546                 skb = buffer_info->skb;
1547                 buffer_info->skb = NULL;
1548
1549                 ++i;
1550                 if (i == rx_ring->count)
1551                         i = 0;
1552                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1553                 prefetch(next_rxd);
1554
1555                 next_buffer = &rx_ring->buffer_info[i];
1556
1557                 cleaned = true;
1558                 cleaned_count++;
1559                 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1560                                DMA_FROM_DEVICE);
1561                 buffer_info->dma = 0;
1562
1563                 length = le16_to_cpu(rx_desc->wb.upper.length);
1564
1565                 /* errors is only valid for DD + EOP descriptors */
1566                 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1567                              ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1568                               !(netdev->features & NETIF_F_RXALL)))) {
1569                         /* recycle both page and skb */
1570                         buffer_info->skb = skb;
1571                         /* an error means any chain goes out the window too */
1572                         if (rx_ring->rx_skb_top)
1573                                 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1574                         rx_ring->rx_skb_top = NULL;
1575                         goto next_desc;
1576                 }
1577 #define rxtop (rx_ring->rx_skb_top)
1578                 if (!(staterr & E1000_RXD_STAT_EOP)) {
1579                         /* this descriptor is only the beginning (or middle) */
1580                         if (!rxtop) {
1581                                 /* this is the beginning of a chain */
1582                                 rxtop = skb;
1583                                 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1584                                                    0, length);
1585                         } else {
1586                                 /* this is the middle of a chain */
1587                                 shinfo = skb_shinfo(rxtop);
1588                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1589                                                    buffer_info->page, 0,
1590                                                    length);
1591                                 /* re-use the skb, only consumed the page */
1592                                 buffer_info->skb = skb;
1593                         }
1594                         e1000_consume_page(buffer_info, rxtop, length);
1595                         goto next_desc;
1596                 } else {
1597                         if (rxtop) {
1598                                 /* end of the chain */
1599                                 shinfo = skb_shinfo(rxtop);
1600                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1601                                                    buffer_info->page, 0,
1602                                                    length);
1603                                 /* re-use the current skb, we only consumed the
1604                                  * page
1605                                  */
1606                                 buffer_info->skb = skb;
1607                                 skb = rxtop;
1608                                 rxtop = NULL;
1609                                 e1000_consume_page(buffer_info, skb, length);
1610                         } else {
1611                                 /* no chain, got EOP, this buf is the packet
1612                                  * copybreak to save the put_page/alloc_page
1613                                  */
1614                                 if (length <= copybreak &&
1615                                     skb_tailroom(skb) >= length) {
1616                                         u8 *vaddr;
1617                                         vaddr = kmap_atomic(buffer_info->page);
1618                                         memcpy(skb_tail_pointer(skb), vaddr,
1619                                                length);
1620                                         kunmap_atomic(vaddr);
1621                                         /* re-use the page, so don't erase
1622                                          * buffer_info->page
1623                                          */
1624                                         skb_put(skb, length);
1625                                 } else {
1626                                         skb_fill_page_desc(skb, 0,
1627                                                            buffer_info->page, 0,
1628                                                            length);
1629                                         e1000_consume_page(buffer_info, skb,
1630                                                            length);
1631                                 }
1632                         }
1633                 }
1634
1635                 /* Receive Checksum Offload */
1636                 e1000_rx_checksum(adapter, staterr, skb);
1637
1638                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1639
1640                 /* probably a little skewed due to removing CRC */
1641                 total_rx_bytes += skb->len;
1642                 total_rx_packets++;
1643
1644                 /* eth type trans needs skb->data to point to something */
1645                 if (!pskb_may_pull(skb, ETH_HLEN)) {
1646                         e_err("pskb_may_pull failed.\n");
1647                         dev_kfree_skb_irq(skb);
1648                         goto next_desc;
1649                 }
1650
1651                 e1000_receive_skb(adapter, netdev, skb, staterr,
1652                                   rx_desc->wb.upper.vlan);
1653
1654 next_desc:
1655                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1656
1657                 /* return some buffers to hardware, one at a time is too slow */
1658                 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1659                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1660                                               GFP_ATOMIC);
1661                         cleaned_count = 0;
1662                 }
1663
1664                 /* use prefetched values */
1665                 rx_desc = next_rxd;
1666                 buffer_info = next_buffer;
1667
1668                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1669         }
1670         rx_ring->next_to_clean = i;
1671
1672         cleaned_count = e1000_desc_unused(rx_ring);
1673         if (cleaned_count)
1674                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1675
1676         adapter->total_rx_bytes += total_rx_bytes;
1677         adapter->total_rx_packets += total_rx_packets;
1678         return cleaned;
1679 }
1680
1681 /**
1682  * e1000_clean_rx_ring - Free Rx Buffers per Queue
1683  * @rx_ring: Rx descriptor ring
1684  **/
1685 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1686 {
1687         struct e1000_adapter *adapter = rx_ring->adapter;
1688         struct e1000_buffer *buffer_info;
1689         struct e1000_ps_page *ps_page;
1690         struct pci_dev *pdev = adapter->pdev;
1691         unsigned int i, j;
1692
1693         /* Free all the Rx ring sk_buffs */
1694         for (i = 0; i < rx_ring->count; i++) {
1695                 buffer_info = &rx_ring->buffer_info[i];
1696                 if (buffer_info->dma) {
1697                         if (adapter->clean_rx == e1000_clean_rx_irq)
1698                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1699                                                  adapter->rx_buffer_len,
1700                                                  DMA_FROM_DEVICE);
1701                         else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1702                                 dma_unmap_page(&pdev->dev, buffer_info->dma,
1703                                                PAGE_SIZE, DMA_FROM_DEVICE);
1704                         else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1705                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1706                                                  adapter->rx_ps_bsize0,
1707                                                  DMA_FROM_DEVICE);
1708                         buffer_info->dma = 0;
1709                 }
1710
1711                 if (buffer_info->page) {
1712                         put_page(buffer_info->page);
1713                         buffer_info->page = NULL;
1714                 }
1715
1716                 if (buffer_info->skb) {
1717                         dev_kfree_skb(buffer_info->skb);
1718                         buffer_info->skb = NULL;
1719                 }
1720
1721                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1722                         ps_page = &buffer_info->ps_pages[j];
1723                         if (!ps_page->page)
1724                                 break;
1725                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1726                                        DMA_FROM_DEVICE);
1727                         ps_page->dma = 0;
1728                         put_page(ps_page->page);
1729                         ps_page->page = NULL;
1730                 }
1731         }
1732
1733         /* there also may be some cached data from a chained receive */
1734         if (rx_ring->rx_skb_top) {
1735                 dev_kfree_skb(rx_ring->rx_skb_top);
1736                 rx_ring->rx_skb_top = NULL;
1737         }
1738
1739         /* Zero out the descriptor ring */
1740         memset(rx_ring->desc, 0, rx_ring->size);
1741
1742         rx_ring->next_to_clean = 0;
1743         rx_ring->next_to_use = 0;
1744         adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1745 }
1746
1747 static void e1000e_downshift_workaround(struct work_struct *work)
1748 {
1749         struct e1000_adapter *adapter = container_of(work,
1750                                                      struct e1000_adapter,
1751                                                      downshift_task);
1752
1753         if (test_bit(__E1000_DOWN, &adapter->state))
1754                 return;
1755
1756         e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1757 }
1758
1759 /**
1760  * e1000_intr_msi - Interrupt Handler
1761  * @irq: interrupt number
1762  * @data: pointer to a network interface device structure
1763  **/
1764 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1765 {
1766         struct net_device *netdev = data;
1767         struct e1000_adapter *adapter = netdev_priv(netdev);
1768         struct e1000_hw *hw = &adapter->hw;
1769         u32 icr = er32(ICR);
1770
1771         /* read ICR disables interrupts using IAM */
1772         if (icr & E1000_ICR_LSC) {
1773                 hw->mac.get_link_status = true;
1774                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1775                  * disconnect (LSC) before accessing any PHY registers
1776                  */
1777                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1778                     (!(er32(STATUS) & E1000_STATUS_LU)))
1779                         schedule_work(&adapter->downshift_task);
1780
1781                 /* 80003ES2LAN workaround-- For packet buffer work-around on
1782                  * link down event; disable receives here in the ISR and reset
1783                  * adapter in watchdog
1784                  */
1785                 if (netif_carrier_ok(netdev) &&
1786                     adapter->flags & FLAG_RX_NEEDS_RESTART) {
1787                         /* disable receives */
1788                         u32 rctl = er32(RCTL);
1789
1790                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1791                         adapter->flags |= FLAG_RESTART_NOW;
1792                 }
1793                 /* guard against interrupt when we're going down */
1794                 if (!test_bit(__E1000_DOWN, &adapter->state))
1795                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1796         }
1797
1798         /* Reset on uncorrectable ECC error */
1799         if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1800                 u32 pbeccsts = er32(PBECCSTS);
1801
1802                 adapter->corr_errors +=
1803                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1804                 adapter->uncorr_errors +=
1805                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1806                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1807
1808                 /* Do the reset outside of interrupt context */
1809                 schedule_work(&adapter->reset_task);
1810
1811                 /* return immediately since reset is imminent */
1812                 return IRQ_HANDLED;
1813         }
1814
1815         if (napi_schedule_prep(&adapter->napi)) {
1816                 adapter->total_tx_bytes = 0;
1817                 adapter->total_tx_packets = 0;
1818                 adapter->total_rx_bytes = 0;
1819                 adapter->total_rx_packets = 0;
1820                 __napi_schedule(&adapter->napi);
1821         }
1822
1823         return IRQ_HANDLED;
1824 }
1825
1826 /**
1827  * e1000_intr - Interrupt Handler
1828  * @irq: interrupt number
1829  * @data: pointer to a network interface device structure
1830  **/
1831 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1832 {
1833         struct net_device *netdev = data;
1834         struct e1000_adapter *adapter = netdev_priv(netdev);
1835         struct e1000_hw *hw = &adapter->hw;
1836         u32 rctl, icr = er32(ICR);
1837
1838         if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1839                 return IRQ_NONE;        /* Not our interrupt */
1840
1841         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1842          * not set, then the adapter didn't send an interrupt
1843          */
1844         if (!(icr & E1000_ICR_INT_ASSERTED))
1845                 return IRQ_NONE;
1846
1847         /* Interrupt Auto-Mask...upon reading ICR,
1848          * interrupts are masked.  No need for the
1849          * IMC write
1850          */
1851
1852         if (icr & E1000_ICR_LSC) {
1853                 hw->mac.get_link_status = true;
1854                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1855                  * disconnect (LSC) before accessing any PHY registers
1856                  */
1857                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1858                     (!(er32(STATUS) & E1000_STATUS_LU)))
1859                         schedule_work(&adapter->downshift_task);
1860
1861                 /* 80003ES2LAN workaround--
1862                  * For packet buffer work-around on link down event;
1863                  * disable receives here in the ISR and
1864                  * reset adapter in watchdog
1865                  */
1866                 if (netif_carrier_ok(netdev) &&
1867                     (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1868                         /* disable receives */
1869                         rctl = er32(RCTL);
1870                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1871                         adapter->flags |= FLAG_RESTART_NOW;
1872                 }
1873                 /* guard against interrupt when we're going down */
1874                 if (!test_bit(__E1000_DOWN, &adapter->state))
1875                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1876         }
1877
1878         /* Reset on uncorrectable ECC error */
1879         if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1880                 u32 pbeccsts = er32(PBECCSTS);
1881
1882                 adapter->corr_errors +=
1883                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1884                 adapter->uncorr_errors +=
1885                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1886                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1887
1888                 /* Do the reset outside of interrupt context */
1889                 schedule_work(&adapter->reset_task);
1890
1891                 /* return immediately since reset is imminent */
1892                 return IRQ_HANDLED;
1893         }
1894
1895         if (napi_schedule_prep(&adapter->napi)) {
1896                 adapter->total_tx_bytes = 0;
1897                 adapter->total_tx_packets = 0;
1898                 adapter->total_rx_bytes = 0;
1899                 adapter->total_rx_packets = 0;
1900                 __napi_schedule(&adapter->napi);
1901         }
1902
1903         return IRQ_HANDLED;
1904 }
1905
1906 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1907 {
1908         struct net_device *netdev = data;
1909         struct e1000_adapter *adapter = netdev_priv(netdev);
1910         struct e1000_hw *hw = &adapter->hw;
1911         u32 icr = er32(ICR);
1912
1913         if (icr & adapter->eiac_mask)
1914                 ew32(ICS, (icr & adapter->eiac_mask));
1915
1916         if (icr & E1000_ICR_LSC) {
1917                 hw->mac.get_link_status = true;
1918                 /* guard against interrupt when we're going down */
1919                 if (!test_bit(__E1000_DOWN, &adapter->state))
1920                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1921         }
1922
1923         if (!test_bit(__E1000_DOWN, &adapter->state))
1924                 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
1925
1926         return IRQ_HANDLED;
1927 }
1928
1929 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1930 {
1931         struct net_device *netdev = data;
1932         struct e1000_adapter *adapter = netdev_priv(netdev);
1933         struct e1000_hw *hw = &adapter->hw;
1934         struct e1000_ring *tx_ring = adapter->tx_ring;
1935
1936         adapter->total_tx_bytes = 0;
1937         adapter->total_tx_packets = 0;
1938
1939         if (!e1000_clean_tx_irq(tx_ring))
1940                 /* Ring was not completely cleaned, so fire another interrupt */
1941                 ew32(ICS, tx_ring->ims_val);
1942
1943         if (!test_bit(__E1000_DOWN, &adapter->state))
1944                 ew32(IMS, adapter->tx_ring->ims_val);
1945
1946         return IRQ_HANDLED;
1947 }
1948
1949 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1950 {
1951         struct net_device *netdev = data;
1952         struct e1000_adapter *adapter = netdev_priv(netdev);
1953         struct e1000_ring *rx_ring = adapter->rx_ring;
1954
1955         /* Write the ITR value calculated at the end of the
1956          * previous interrupt.
1957          */
1958         if (rx_ring->set_itr) {
1959                 u32 itr = rx_ring->itr_val ?
1960                           1000000000 / (rx_ring->itr_val * 256) : 0;
1961
1962                 writel(itr, rx_ring->itr_register);
1963                 rx_ring->set_itr = 0;
1964         }
1965
1966         if (napi_schedule_prep(&adapter->napi)) {
1967                 adapter->total_rx_bytes = 0;
1968                 adapter->total_rx_packets = 0;
1969                 __napi_schedule(&adapter->napi);
1970         }
1971         return IRQ_HANDLED;
1972 }
1973
1974 /**
1975  * e1000_configure_msix - Configure MSI-X hardware
1976  *
1977  * e1000_configure_msix sets up the hardware to properly
1978  * generate MSI-X interrupts.
1979  **/
1980 static void e1000_configure_msix(struct e1000_adapter *adapter)
1981 {
1982         struct e1000_hw *hw = &adapter->hw;
1983         struct e1000_ring *rx_ring = adapter->rx_ring;
1984         struct e1000_ring *tx_ring = adapter->tx_ring;
1985         int vector = 0;
1986         u32 ctrl_ext, ivar = 0;
1987
1988         adapter->eiac_mask = 0;
1989
1990         /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1991         if (hw->mac.type == e1000_82574) {
1992                 u32 rfctl = er32(RFCTL);
1993
1994                 rfctl |= E1000_RFCTL_ACK_DIS;
1995                 ew32(RFCTL, rfctl);
1996         }
1997
1998         /* Configure Rx vector */
1999         rx_ring->ims_val = E1000_IMS_RXQ0;
2000         adapter->eiac_mask |= rx_ring->ims_val;
2001         if (rx_ring->itr_val)
2002                 writel(1000000000 / (rx_ring->itr_val * 256),
2003                        rx_ring->itr_register);
2004         else
2005                 writel(1, rx_ring->itr_register);
2006         ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
2007
2008         /* Configure Tx vector */
2009         tx_ring->ims_val = E1000_IMS_TXQ0;
2010         vector++;
2011         if (tx_ring->itr_val)
2012                 writel(1000000000 / (tx_ring->itr_val * 256),
2013                        tx_ring->itr_register);
2014         else
2015                 writel(1, tx_ring->itr_register);
2016         adapter->eiac_mask |= tx_ring->ims_val;
2017         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2018
2019         /* set vector for Other Causes, e.g. link changes */
2020         vector++;
2021         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2022         if (rx_ring->itr_val)
2023                 writel(1000000000 / (rx_ring->itr_val * 256),
2024                        hw->hw_addr + E1000_EITR_82574(vector));
2025         else
2026                 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2027
2028         /* Cause Tx interrupts on every write back */
2029         ivar |= BIT(31);
2030
2031         ew32(IVAR, ivar);
2032
2033         /* enable MSI-X PBA support */
2034         ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2035         ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2036         ew32(CTRL_EXT, ctrl_ext);
2037         e1e_flush();
2038 }
2039
2040 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2041 {
2042         if (adapter->msix_entries) {
2043                 pci_disable_msix(adapter->pdev);
2044                 kfree(adapter->msix_entries);
2045                 adapter->msix_entries = NULL;
2046         } else if (adapter->flags & FLAG_MSI_ENABLED) {
2047                 pci_disable_msi(adapter->pdev);
2048                 adapter->flags &= ~FLAG_MSI_ENABLED;
2049         }
2050 }
2051
2052 /**
2053  * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2054  *
2055  * Attempt to configure interrupts using the best available
2056  * capabilities of the hardware and kernel.
2057  **/
2058 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2059 {
2060         int err;
2061         int i;
2062
2063         switch (adapter->int_mode) {
2064         case E1000E_INT_MODE_MSIX:
2065                 if (adapter->flags & FLAG_HAS_MSIX) {
2066                         adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2067                         adapter->msix_entries = kcalloc(adapter->num_vectors,
2068                                                         sizeof(struct
2069                                                                msix_entry),
2070                                                         GFP_KERNEL);
2071                         if (adapter->msix_entries) {
2072                                 struct e1000_adapter *a = adapter;
2073
2074                                 for (i = 0; i < adapter->num_vectors; i++)
2075                                         adapter->msix_entries[i].entry = i;
2076
2077                                 err = pci_enable_msix_range(a->pdev,
2078                                                             a->msix_entries,
2079                                                             a->num_vectors,
2080                                                             a->num_vectors);
2081                                 if (err > 0)
2082                                         return;
2083                         }
2084                         /* MSI-X failed, so fall through and try MSI */
2085                         e_err("Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.\n");
2086                         e1000e_reset_interrupt_capability(adapter);
2087                 }
2088                 adapter->int_mode = E1000E_INT_MODE_MSI;
2089                 /* Fall through */
2090         case E1000E_INT_MODE_MSI:
2091                 if (!pci_enable_msi(adapter->pdev)) {
2092                         adapter->flags |= FLAG_MSI_ENABLED;
2093                 } else {
2094                         adapter->int_mode = E1000E_INT_MODE_LEGACY;
2095                         e_err("Failed to initialize MSI interrupts.  Falling back to legacy interrupts.\n");
2096                 }
2097                 /* Fall through */
2098         case E1000E_INT_MODE_LEGACY:
2099                 /* Don't do anything; this is the system default */
2100                 break;
2101         }
2102
2103         /* store the number of vectors being used */
2104         adapter->num_vectors = 1;
2105 }
2106
2107 /**
2108  * e1000_request_msix - Initialize MSI-X interrupts
2109  *
2110  * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2111  * kernel.
2112  **/
2113 static int e1000_request_msix(struct e1000_adapter *adapter)
2114 {
2115         struct net_device *netdev = adapter->netdev;
2116         int err = 0, vector = 0;
2117
2118         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2119                 snprintf(adapter->rx_ring->name,
2120                          sizeof(adapter->rx_ring->name) - 1,
2121                          "%.14s-rx-0", netdev->name);
2122         else
2123                 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2124         err = request_irq(adapter->msix_entries[vector].vector,
2125                           e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2126                           netdev);
2127         if (err)
2128                 return err;
2129         adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2130             E1000_EITR_82574(vector);
2131         adapter->rx_ring->itr_val = adapter->itr;
2132         vector++;
2133
2134         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2135                 snprintf(adapter->tx_ring->name,
2136                          sizeof(adapter->tx_ring->name) - 1,
2137                          "%.14s-tx-0", netdev->name);
2138         else
2139                 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2140         err = request_irq(adapter->msix_entries[vector].vector,
2141                           e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2142                           netdev);
2143         if (err)
2144                 return err;
2145         adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2146             E1000_EITR_82574(vector);
2147         adapter->tx_ring->itr_val = adapter->itr;
2148         vector++;
2149
2150         err = request_irq(adapter->msix_entries[vector].vector,
2151                           e1000_msix_other, 0, netdev->name, netdev);
2152         if (err)
2153                 return err;
2154
2155         e1000_configure_msix(adapter);
2156
2157         return 0;
2158 }
2159
2160 /**
2161  * e1000_request_irq - initialize interrupts
2162  *
2163  * Attempts to configure interrupts using the best available
2164  * capabilities of the hardware and kernel.
2165  **/
2166 static int e1000_request_irq(struct e1000_adapter *adapter)
2167 {
2168         struct net_device *netdev = adapter->netdev;
2169         int err;
2170
2171         if (adapter->msix_entries) {
2172                 err = e1000_request_msix(adapter);
2173                 if (!err)
2174                         return err;
2175                 /* fall back to MSI */
2176                 e1000e_reset_interrupt_capability(adapter);
2177                 adapter->int_mode = E1000E_INT_MODE_MSI;
2178                 e1000e_set_interrupt_capability(adapter);
2179         }
2180         if (adapter->flags & FLAG_MSI_ENABLED) {
2181                 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2182                                   netdev->name, netdev);
2183                 if (!err)
2184                         return err;
2185
2186                 /* fall back to legacy interrupt */
2187                 e1000e_reset_interrupt_capability(adapter);
2188                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2189         }
2190
2191         err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2192                           netdev->name, netdev);
2193         if (err)
2194                 e_err("Unable to allocate interrupt, Error: %d\n", err);
2195
2196         return err;
2197 }
2198
2199 static void e1000_free_irq(struct e1000_adapter *adapter)
2200 {
2201         struct net_device *netdev = adapter->netdev;
2202
2203         if (adapter->msix_entries) {
2204                 int vector = 0;
2205
2206                 free_irq(adapter->msix_entries[vector].vector, netdev);
2207                 vector++;
2208
2209                 free_irq(adapter->msix_entries[vector].vector, netdev);
2210                 vector++;
2211
2212                 /* Other Causes interrupt vector */
2213                 free_irq(adapter->msix_entries[vector].vector, netdev);
2214                 return;
2215         }
2216
2217         free_irq(adapter->pdev->irq, netdev);
2218 }
2219
2220 /**
2221  * e1000_irq_disable - Mask off interrupt generation on the NIC
2222  **/
2223 static void e1000_irq_disable(struct e1000_adapter *adapter)
2224 {
2225         struct e1000_hw *hw = &adapter->hw;
2226
2227         ew32(IMC, ~0);
2228         if (adapter->msix_entries)
2229                 ew32(EIAC_82574, 0);
2230         e1e_flush();
2231
2232         if (adapter->msix_entries) {
2233                 int i;
2234
2235                 for (i = 0; i < adapter->num_vectors; i++)
2236                         synchronize_irq(adapter->msix_entries[i].vector);
2237         } else {
2238                 synchronize_irq(adapter->pdev->irq);
2239         }
2240 }
2241
2242 /**
2243  * e1000_irq_enable - Enable default interrupt generation settings
2244  **/
2245 static void e1000_irq_enable(struct e1000_adapter *adapter)
2246 {
2247         struct e1000_hw *hw = &adapter->hw;
2248
2249         if (adapter->msix_entries) {
2250                 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2251                 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
2252                      IMS_OTHER_MASK);
2253         } else if (hw->mac.type >= e1000_pch_lpt) {
2254                 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2255         } else {
2256                 ew32(IMS, IMS_ENABLE_MASK);
2257         }
2258         e1e_flush();
2259 }
2260
2261 /**
2262  * e1000e_get_hw_control - get control of the h/w from f/w
2263  * @adapter: address of board private structure
2264  *
2265  * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2266  * For ASF and Pass Through versions of f/w this means that
2267  * the driver is loaded. For AMT version (only with 82573)
2268  * of the f/w this means that the network i/f is open.
2269  **/
2270 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2271 {
2272         struct e1000_hw *hw = &adapter->hw;
2273         u32 ctrl_ext;
2274         u32 swsm;
2275
2276         /* Let firmware know the driver has taken over */
2277         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2278                 swsm = er32(SWSM);
2279                 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2280         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2281                 ctrl_ext = er32(CTRL_EXT);
2282                 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2283         }
2284 }
2285
2286 /**
2287  * e1000e_release_hw_control - release control of the h/w to f/w
2288  * @adapter: address of board private structure
2289  *
2290  * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2291  * For ASF and Pass Through versions of f/w this means that the
2292  * driver is no longer loaded. For AMT version (only with 82573) i
2293  * of the f/w this means that the network i/f is closed.
2294  *
2295  **/
2296 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2297 {
2298         struct e1000_hw *hw = &adapter->hw;
2299         u32 ctrl_ext;
2300         u32 swsm;
2301
2302         /* Let firmware taken over control of h/w */
2303         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2304                 swsm = er32(SWSM);
2305                 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2306         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2307                 ctrl_ext = er32(CTRL_EXT);
2308                 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2309         }
2310 }
2311
2312 /**
2313  * e1000_alloc_ring_dma - allocate memory for a ring structure
2314  **/
2315 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2316                                 struct e1000_ring *ring)
2317 {
2318         struct pci_dev *pdev = adapter->pdev;
2319
2320         ring->desc = dma_zalloc_coherent(&pdev->dev, ring->size, &ring->dma,
2321                                          GFP_KERNEL);
2322         if (!ring->desc)
2323                 return -ENOMEM;
2324
2325         return 0;
2326 }
2327
2328 /**
2329  * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2330  * @tx_ring: Tx descriptor ring
2331  *
2332  * Return 0 on success, negative on failure
2333  **/
2334 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2335 {
2336         struct e1000_adapter *adapter = tx_ring->adapter;
2337         int err = -ENOMEM, size;
2338
2339         size = sizeof(struct e1000_buffer) * tx_ring->count;
2340         tx_ring->buffer_info = vzalloc(size);
2341         if (!tx_ring->buffer_info)
2342                 goto err;
2343
2344         /* round up to nearest 4K */
2345         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2346         tx_ring->size = ALIGN(tx_ring->size, 4096);
2347
2348         err = e1000_alloc_ring_dma(adapter, tx_ring);
2349         if (err)
2350                 goto err;
2351
2352         tx_ring->next_to_use = 0;
2353         tx_ring->next_to_clean = 0;
2354
2355         return 0;
2356 err:
2357         vfree(tx_ring->buffer_info);
2358         e_err("Unable to allocate memory for the transmit descriptor ring\n");
2359         return err;
2360 }
2361
2362 /**
2363  * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2364  * @rx_ring: Rx descriptor ring
2365  *
2366  * Returns 0 on success, negative on failure
2367  **/
2368 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2369 {
2370         struct e1000_adapter *adapter = rx_ring->adapter;
2371         struct e1000_buffer *buffer_info;
2372         int i, size, desc_len, err = -ENOMEM;
2373
2374         size = sizeof(struct e1000_buffer) * rx_ring->count;
2375         rx_ring->buffer_info = vzalloc(size);
2376         if (!rx_ring->buffer_info)
2377                 goto err;
2378
2379         for (i = 0; i < rx_ring->count; i++) {
2380                 buffer_info = &rx_ring->buffer_info[i];
2381                 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2382                                                 sizeof(struct e1000_ps_page),
2383                                                 GFP_KERNEL);
2384                 if (!buffer_info->ps_pages)
2385                         goto err_pages;
2386         }
2387
2388         desc_len = sizeof(union e1000_rx_desc_packet_split);
2389
2390         /* Round up to nearest 4K */
2391         rx_ring->size = rx_ring->count * desc_len;
2392         rx_ring->size = ALIGN(rx_ring->size, 4096);
2393
2394         err = e1000_alloc_ring_dma(adapter, rx_ring);
2395         if (err)
2396                 goto err_pages;
2397
2398         rx_ring->next_to_clean = 0;
2399         rx_ring->next_to_use = 0;
2400         rx_ring->rx_skb_top = NULL;
2401
2402         return 0;
2403
2404 err_pages:
2405         for (i = 0; i < rx_ring->count; i++) {
2406                 buffer_info = &rx_ring->buffer_info[i];
2407                 kfree(buffer_info->ps_pages);
2408         }
2409 err:
2410         vfree(rx_ring->buffer_info);
2411         e_err("Unable to allocate memory for the receive descriptor ring\n");
2412         return err;
2413 }
2414
2415 /**
2416  * e1000_clean_tx_ring - Free Tx Buffers
2417  * @tx_ring: Tx descriptor ring
2418  **/
2419 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2420 {
2421         struct e1000_adapter *adapter = tx_ring->adapter;
2422         struct e1000_buffer *buffer_info;
2423         unsigned long size;
2424         unsigned int i;
2425
2426         for (i = 0; i < tx_ring->count; i++) {
2427                 buffer_info = &tx_ring->buffer_info[i];
2428                 e1000_put_txbuf(tx_ring, buffer_info);
2429         }
2430
2431         netdev_reset_queue(adapter->netdev);
2432         size = sizeof(struct e1000_buffer) * tx_ring->count;
2433         memset(tx_ring->buffer_info, 0, size);
2434
2435         memset(tx_ring->desc, 0, tx_ring->size);
2436
2437         tx_ring->next_to_use = 0;
2438         tx_ring->next_to_clean = 0;
2439 }
2440
2441 /**
2442  * e1000e_free_tx_resources - Free Tx Resources per Queue
2443  * @tx_ring: Tx descriptor ring
2444  *
2445  * Free all transmit software resources
2446  **/
2447 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2448 {
2449         struct e1000_adapter *adapter = tx_ring->adapter;
2450         struct pci_dev *pdev = adapter->pdev;
2451
2452         e1000_clean_tx_ring(tx_ring);
2453
2454         vfree(tx_ring->buffer_info);
2455         tx_ring->buffer_info = NULL;
2456
2457         dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2458                           tx_ring->dma);
2459         tx_ring->desc = NULL;
2460 }
2461
2462 /**
2463  * e1000e_free_rx_resources - Free Rx Resources
2464  * @rx_ring: Rx descriptor ring
2465  *
2466  * Free all receive software resources
2467  **/
2468 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2469 {
2470         struct e1000_adapter *adapter = rx_ring->adapter;
2471         struct pci_dev *pdev = adapter->pdev;
2472         int i;
2473
2474         e1000_clean_rx_ring(rx_ring);
2475
2476         for (i = 0; i < rx_ring->count; i++)
2477                 kfree(rx_ring->buffer_info[i].ps_pages);
2478
2479         vfree(rx_ring->buffer_info);
2480         rx_ring->buffer_info = NULL;
2481
2482         dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2483                           rx_ring->dma);
2484         rx_ring->desc = NULL;
2485 }
2486
2487 /**
2488  * e1000_update_itr - update the dynamic ITR value based on statistics
2489  * @adapter: pointer to adapter
2490  * @itr_setting: current adapter->itr
2491  * @packets: the number of packets during this measurement interval
2492  * @bytes: the number of bytes during this measurement interval
2493  *
2494  *      Stores a new ITR value based on packets and byte
2495  *      counts during the last interrupt.  The advantage of per interrupt
2496  *      computation is faster updates and more accurate ITR for the current
2497  *      traffic pattern.  Constants in this function were computed
2498  *      based on theoretical maximum wire speed and thresholds were set based
2499  *      on testing data as well as attempting to minimize response time
2500  *      while increasing bulk throughput.  This functionality is controlled
2501  *      by the InterruptThrottleRate module parameter.
2502  **/
2503 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2504 {
2505         unsigned int retval = itr_setting;
2506
2507         if (packets == 0)
2508                 return itr_setting;
2509
2510         switch (itr_setting) {
2511         case lowest_latency:
2512                 /* handle TSO and jumbo frames */
2513                 if (bytes / packets > 8000)
2514                         retval = bulk_latency;
2515                 else if ((packets < 5) && (bytes > 512))
2516                         retval = low_latency;
2517                 break;
2518         case low_latency:       /* 50 usec aka 20000 ints/s */
2519                 if (bytes > 10000) {
2520                         /* this if handles the TSO accounting */
2521                         if (bytes / packets > 8000)
2522                                 retval = bulk_latency;
2523                         else if ((packets < 10) || ((bytes / packets) > 1200))
2524                                 retval = bulk_latency;
2525                         else if ((packets > 35))
2526                                 retval = lowest_latency;
2527                 } else if (bytes / packets > 2000) {
2528                         retval = bulk_latency;
2529                 } else if (packets <= 2 && bytes < 512) {
2530                         retval = lowest_latency;
2531                 }
2532                 break;
2533         case bulk_latency:      /* 250 usec aka 4000 ints/s */
2534                 if (bytes > 25000) {
2535                         if (packets > 35)
2536                                 retval = low_latency;
2537                 } else if (bytes < 6000) {
2538                         retval = low_latency;
2539                 }
2540                 break;
2541         }
2542
2543         return retval;
2544 }
2545
2546 static void e1000_set_itr(struct e1000_adapter *adapter)
2547 {
2548         u16 current_itr;
2549         u32 new_itr = adapter->itr;
2550
2551         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2552         if (adapter->link_speed != SPEED_1000) {
2553                 current_itr = 0;
2554                 new_itr = 4000;
2555                 goto set_itr_now;
2556         }
2557
2558         if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2559                 new_itr = 0;
2560                 goto set_itr_now;
2561         }
2562
2563         adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2564                                            adapter->total_tx_packets,
2565                                            adapter->total_tx_bytes);
2566         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2567         if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2568                 adapter->tx_itr = low_latency;
2569
2570         adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2571                                            adapter->total_rx_packets,
2572                                            adapter->total_rx_bytes);
2573         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2574         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2575                 adapter->rx_itr = low_latency;
2576
2577         current_itr = max(adapter->rx_itr, adapter->tx_itr);
2578
2579         /* counts and packets in update_itr are dependent on these numbers */
2580         switch (current_itr) {
2581         case lowest_latency:
2582                 new_itr = 70000;
2583                 break;
2584         case low_latency:
2585                 new_itr = 20000;        /* aka hwitr = ~200 */
2586                 break;
2587         case bulk_latency:
2588                 new_itr = 4000;
2589                 break;
2590         default:
2591                 break;
2592         }
2593
2594 set_itr_now:
2595         if (new_itr != adapter->itr) {
2596                 /* this attempts to bias the interrupt rate towards Bulk
2597                  * by adding intermediate steps when interrupt rate is
2598                  * increasing
2599                  */
2600                 new_itr = new_itr > adapter->itr ?
2601                     min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2602                 adapter->itr = new_itr;
2603                 adapter->rx_ring->itr_val = new_itr;
2604                 if (adapter->msix_entries)
2605                         adapter->rx_ring->set_itr = 1;
2606                 else
2607                         e1000e_write_itr(adapter, new_itr);
2608         }
2609 }
2610
2611 /**
2612  * e1000e_write_itr - write the ITR value to the appropriate registers
2613  * @adapter: address of board private structure
2614  * @itr: new ITR value to program
2615  *
2616  * e1000e_write_itr determines if the adapter is in MSI-X mode
2617  * and, if so, writes the EITR registers with the ITR value.
2618  * Otherwise, it writes the ITR value into the ITR register.
2619  **/
2620 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2621 {
2622         struct e1000_hw *hw = &adapter->hw;
2623         u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2624
2625         if (adapter->msix_entries) {
2626                 int vector;
2627
2628                 for (vector = 0; vector < adapter->num_vectors; vector++)
2629                         writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2630         } else {
2631                 ew32(ITR, new_itr);
2632         }
2633 }
2634
2635 /**
2636  * e1000_alloc_queues - Allocate memory for all rings
2637  * @adapter: board private structure to initialize
2638  **/
2639 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2640 {
2641         int size = sizeof(struct e1000_ring);
2642
2643         adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2644         if (!adapter->tx_ring)
2645                 goto err;
2646         adapter->tx_ring->count = adapter->tx_ring_count;
2647         adapter->tx_ring->adapter = adapter;
2648
2649         adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2650         if (!adapter->rx_ring)
2651                 goto err;
2652         adapter->rx_ring->count = adapter->rx_ring_count;
2653         adapter->rx_ring->adapter = adapter;
2654
2655         return 0;
2656 err:
2657         e_err("Unable to allocate memory for queues\n");
2658         kfree(adapter->rx_ring);
2659         kfree(adapter->tx_ring);
2660         return -ENOMEM;
2661 }
2662
2663 /**
2664  * e1000e_poll - NAPI Rx polling callback
2665  * @napi: struct associated with this polling callback
2666  * @weight: number of packets driver is allowed to process this poll
2667  **/
2668 static int e1000e_poll(struct napi_struct *napi, int weight)
2669 {
2670         struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2671                                                      napi);
2672         struct e1000_hw *hw = &adapter->hw;
2673         struct net_device *poll_dev = adapter->netdev;
2674         int tx_cleaned = 1, work_done = 0;
2675
2676         adapter = netdev_priv(poll_dev);
2677
2678         if (!adapter->msix_entries ||
2679             (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2680                 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2681
2682         adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2683
2684         if (!tx_cleaned)
2685                 work_done = weight;
2686
2687         /* If weight not fully consumed, exit the polling mode */
2688         if (work_done < weight) {
2689                 if (adapter->itr_setting & 3)
2690                         e1000_set_itr(adapter);
2691                 napi_complete_done(napi, work_done);
2692                 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2693                         if (adapter->msix_entries)
2694                                 ew32(IMS, adapter->rx_ring->ims_val);
2695                         else
2696                                 e1000_irq_enable(adapter);
2697                 }
2698         }
2699
2700         return work_done;
2701 }
2702
2703 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2704                                  __always_unused __be16 proto, u16 vid)
2705 {
2706         struct e1000_adapter *adapter = netdev_priv(netdev);
2707         struct e1000_hw *hw = &adapter->hw;
2708         u32 vfta, index;
2709
2710         /* don't update vlan cookie if already programmed */
2711         if ((adapter->hw.mng_cookie.status &
2712              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2713             (vid == adapter->mng_vlan_id))
2714                 return 0;
2715
2716         /* add VID to filter table */
2717         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2718                 index = (vid >> 5) & 0x7F;
2719                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2720                 vfta |= BIT((vid & 0x1F));
2721                 hw->mac.ops.write_vfta(hw, index, vfta);
2722         }
2723
2724         set_bit(vid, adapter->active_vlans);
2725
2726         return 0;
2727 }
2728
2729 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2730                                   __always_unused __be16 proto, u16 vid)
2731 {
2732         struct e1000_adapter *adapter = netdev_priv(netdev);
2733         struct e1000_hw *hw = &adapter->hw;
2734         u32 vfta, index;
2735
2736         if ((adapter->hw.mng_cookie.status &
2737              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2738             (vid == adapter->mng_vlan_id)) {
2739                 /* release control to f/w */
2740                 e1000e_release_hw_control(adapter);
2741                 return 0;
2742         }
2743
2744         /* remove VID from filter table */
2745         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2746                 index = (vid >> 5) & 0x7F;
2747                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2748                 vfta &= ~BIT((vid & 0x1F));
2749                 hw->mac.ops.write_vfta(hw, index, vfta);
2750         }
2751
2752         clear_bit(vid, adapter->active_vlans);
2753
2754         return 0;
2755 }
2756
2757 /**
2758  * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2759  * @adapter: board private structure to initialize
2760  **/
2761 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2762 {
2763         struct net_device *netdev = adapter->netdev;
2764         struct e1000_hw *hw = &adapter->hw;
2765         u32 rctl;
2766
2767         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2768                 /* disable VLAN receive filtering */
2769                 rctl = er32(RCTL);
2770                 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2771                 ew32(RCTL, rctl);
2772
2773                 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2774                         e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2775                                                adapter->mng_vlan_id);
2776                         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2777                 }
2778         }
2779 }
2780
2781 /**
2782  * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2783  * @adapter: board private structure to initialize
2784  **/
2785 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2786 {
2787         struct e1000_hw *hw = &adapter->hw;
2788         u32 rctl;
2789
2790         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2791                 /* enable VLAN receive filtering */
2792                 rctl = er32(RCTL);
2793                 rctl |= E1000_RCTL_VFE;
2794                 rctl &= ~E1000_RCTL_CFIEN;
2795                 ew32(RCTL, rctl);
2796         }
2797 }
2798
2799 /**
2800  * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping
2801  * @adapter: board private structure to initialize
2802  **/
2803 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2804 {
2805         struct e1000_hw *hw = &adapter->hw;
2806         u32 ctrl;
2807
2808         /* disable VLAN tag insert/strip */
2809         ctrl = er32(CTRL);
2810         ctrl &= ~E1000_CTRL_VME;
2811         ew32(CTRL, ctrl);
2812 }
2813
2814 /**
2815  * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2816  * @adapter: board private structure to initialize
2817  **/
2818 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2819 {
2820         struct e1000_hw *hw = &adapter->hw;
2821         u32 ctrl;
2822
2823         /* enable VLAN tag insert/strip */
2824         ctrl = er32(CTRL);
2825         ctrl |= E1000_CTRL_VME;
2826         ew32(CTRL, ctrl);
2827 }
2828
2829 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2830 {
2831         struct net_device *netdev = adapter->netdev;
2832         u16 vid = adapter->hw.mng_cookie.vlan_id;
2833         u16 old_vid = adapter->mng_vlan_id;
2834
2835         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2836                 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2837                 adapter->mng_vlan_id = vid;
2838         }
2839
2840         if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2841                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2842 }
2843
2844 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2845 {
2846         u16 vid;
2847
2848         e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2849
2850         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2851             e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2852 }
2853
2854 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2855 {
2856         struct e1000_hw *hw = &adapter->hw;
2857         u32 manc, manc2h, mdef, i, j;
2858
2859         if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2860                 return;
2861
2862         manc = er32(MANC);
2863
2864         /* enable receiving management packets to the host. this will probably
2865          * generate destination unreachable messages from the host OS, but
2866          * the packets will be handled on SMBUS
2867          */
2868         manc |= E1000_MANC_EN_MNG2HOST;
2869         manc2h = er32(MANC2H);
2870
2871         switch (hw->mac.type) {
2872         default:
2873                 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2874                 break;
2875         case e1000_82574:
2876         case e1000_82583:
2877                 /* Check if IPMI pass-through decision filter already exists;
2878                  * if so, enable it.
2879                  */
2880                 for (i = 0, j = 0; i < 8; i++) {
2881                         mdef = er32(MDEF(i));
2882
2883                         /* Ignore filters with anything other than IPMI ports */
2884                         if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2885                                 continue;
2886
2887                         /* Enable this decision filter in MANC2H */
2888                         if (mdef)
2889                                 manc2h |= BIT(i);
2890
2891                         j |= mdef;
2892                 }
2893
2894                 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2895                         break;
2896
2897                 /* Create new decision filter in an empty filter */
2898                 for (i = 0, j = 0; i < 8; i++)
2899                         if (er32(MDEF(i)) == 0) {
2900                                 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2901                                                E1000_MDEF_PORT_664));
2902                                 manc2h |= BIT(1);
2903                                 j++;
2904                                 break;
2905                         }
2906
2907                 if (!j)
2908                         e_warn("Unable to create IPMI pass-through filter\n");
2909                 break;
2910         }
2911
2912         ew32(MANC2H, manc2h);
2913         ew32(MANC, manc);
2914 }
2915
2916 /**
2917  * e1000_configure_tx - Configure Transmit Unit after Reset
2918  * @adapter: board private structure
2919  *
2920  * Configure the Tx unit of the MAC after a reset.
2921  **/
2922 static void e1000_configure_tx(struct e1000_adapter *adapter)
2923 {
2924         struct e1000_hw *hw = &adapter->hw;
2925         struct e1000_ring *tx_ring = adapter->tx_ring;
2926         u64 tdba;
2927         u32 tdlen, tctl, tarc;
2928
2929         /* Setup the HW Tx Head and Tail descriptor pointers */
2930         tdba = tx_ring->dma;
2931         tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2932         ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2933         ew32(TDBAH(0), (tdba >> 32));
2934         ew32(TDLEN(0), tdlen);
2935         ew32(TDH(0), 0);
2936         ew32(TDT(0), 0);
2937         tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2938         tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2939
2940         writel(0, tx_ring->head);
2941         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2942                 e1000e_update_tdt_wa(tx_ring, 0);
2943         else
2944                 writel(0, tx_ring->tail);
2945
2946         /* Set the Tx Interrupt Delay register */
2947         ew32(TIDV, adapter->tx_int_delay);
2948         /* Tx irq moderation */
2949         ew32(TADV, adapter->tx_abs_int_delay);
2950
2951         if (adapter->flags2 & FLAG2_DMA_BURST) {
2952                 u32 txdctl = er32(TXDCTL(0));
2953
2954                 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2955                             E1000_TXDCTL_WTHRESH);
2956                 /* set up some performance related parameters to encourage the
2957                  * hardware to use the bus more efficiently in bursts, depends
2958                  * on the tx_int_delay to be enabled,
2959                  * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2960                  * hthresh = 1 ==> prefetch when one or more available
2961                  * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2962                  * BEWARE: this seems to work but should be considered first if
2963                  * there are Tx hangs or other Tx related bugs
2964                  */
2965                 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2966                 ew32(TXDCTL(0), txdctl);
2967         }
2968         /* erratum work around: set txdctl the same for both queues */
2969         ew32(TXDCTL(1), er32(TXDCTL(0)));
2970
2971         /* Program the Transmit Control Register */
2972         tctl = er32(TCTL);
2973         tctl &= ~E1000_TCTL_CT;
2974         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2975                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2976
2977         if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2978                 tarc = er32(TARC(0));
2979                 /* set the speed mode bit, we'll clear it if we're not at
2980                  * gigabit link later
2981                  */
2982 #define SPEED_MODE_BIT BIT(21)
2983                 tarc |= SPEED_MODE_BIT;
2984                 ew32(TARC(0), tarc);
2985         }
2986
2987         /* errata: program both queues to unweighted RR */
2988         if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2989                 tarc = er32(TARC(0));
2990                 tarc |= 1;
2991                 ew32(TARC(0), tarc);
2992                 tarc = er32(TARC(1));
2993                 tarc |= 1;
2994                 ew32(TARC(1), tarc);
2995         }
2996
2997         /* Setup Transmit Descriptor Settings for eop descriptor */
2998         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2999
3000         /* only set IDE if we are delaying interrupts using the timers */
3001         if (adapter->tx_int_delay)
3002                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3003
3004         /* enable Report Status bit */
3005         adapter->txd_cmd |= E1000_TXD_CMD_RS;
3006
3007         ew32(TCTL, tctl);
3008
3009         hw->mac.ops.config_collision_dist(hw);
3010
3011         /* SPT and KBL Si errata workaround to avoid data corruption */
3012         if (hw->mac.type == e1000_pch_spt) {
3013                 u32 reg_val;
3014
3015                 reg_val = er32(IOSFPC);
3016                 reg_val |= E1000_RCTL_RDMTS_HEX;
3017                 ew32(IOSFPC, reg_val);
3018
3019                 reg_val = er32(TARC(0));
3020                 /* SPT and KBL Si errata workaround to avoid Tx hang.
3021                  * Dropping the number of outstanding requests from
3022                  * 3 to 2 in order to avoid a buffer overrun.
3023                  */
3024                 reg_val &= ~E1000_TARC0_CB_MULTIQ_3_REQ;
3025                 reg_val |= E1000_TARC0_CB_MULTIQ_2_REQ;
3026                 ew32(TARC(0), reg_val);
3027         }
3028 }
3029
3030 /**
3031  * e1000_setup_rctl - configure the receive control registers
3032  * @adapter: Board private structure
3033  **/
3034 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3035                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3036 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3037 {
3038         struct e1000_hw *hw = &adapter->hw;
3039         u32 rctl, rfctl;
3040         u32 pages = 0;
3041
3042         /* Workaround Si errata on PCHx - configure jumbo frame flow.
3043          * If jumbo frames not set, program related MAC/PHY registers
3044          * to h/w defaults
3045          */
3046         if (hw->mac.type >= e1000_pch2lan) {
3047                 s32 ret_val;
3048
3049                 if (adapter->netdev->mtu > ETH_DATA_LEN)
3050                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3051                 else
3052                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3053
3054                 if (ret_val)
3055                         e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3056         }
3057
3058         /* Program MC offset vector base */
3059         rctl = er32(RCTL);
3060         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3061         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3062             E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3063             (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3064
3065         /* Do not Store bad packets */
3066         rctl &= ~E1000_RCTL_SBP;
3067
3068         /* Enable Long Packet receive */
3069         if (adapter->netdev->mtu <= ETH_DATA_LEN)
3070                 rctl &= ~E1000_RCTL_LPE;
3071         else
3072                 rctl |= E1000_RCTL_LPE;
3073
3074         /* Some systems expect that the CRC is included in SMBUS traffic. The
3075          * hardware strips the CRC before sending to both SMBUS (BMC) and to
3076          * host memory when this is enabled
3077          */
3078         if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3079                 rctl |= E1000_RCTL_SECRC;
3080
3081         /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3082         if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3083                 u16 phy_data;
3084
3085                 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3086                 phy_data &= 0xfff8;
3087                 phy_data |= BIT(2);
3088                 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3089
3090                 e1e_rphy(hw, 22, &phy_data);
3091                 phy_data &= 0x0fff;
3092                 phy_data |= BIT(14);
3093                 e1e_wphy(hw, 0x10, 0x2823);
3094                 e1e_wphy(hw, 0x11, 0x0003);
3095                 e1e_wphy(hw, 22, phy_data);
3096         }
3097
3098         /* Setup buffer sizes */
3099         rctl &= ~E1000_RCTL_SZ_4096;
3100         rctl |= E1000_RCTL_BSEX;
3101         switch (adapter->rx_buffer_len) {
3102         case 2048:
3103         default:
3104                 rctl |= E1000_RCTL_SZ_2048;
3105                 rctl &= ~E1000_RCTL_BSEX;
3106                 break;
3107         case 4096:
3108                 rctl |= E1000_RCTL_SZ_4096;
3109                 break;
3110         case 8192:
3111                 rctl |= E1000_RCTL_SZ_8192;
3112                 break;
3113         case 16384:
3114                 rctl |= E1000_RCTL_SZ_16384;
3115                 break;
3116         }
3117
3118         /* Enable Extended Status in all Receive Descriptors */
3119         rfctl = er32(RFCTL);
3120         rfctl |= E1000_RFCTL_EXTEN;
3121         ew32(RFCTL, rfctl);
3122
3123         /* 82571 and greater support packet-split where the protocol
3124          * header is placed in skb->data and the packet data is
3125          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3126          * In the case of a non-split, skb->data is linearly filled,
3127          * followed by the page buffers.  Therefore, skb->data is
3128          * sized to hold the largest protocol header.
3129          *
3130          * allocations using alloc_page take too long for regular MTU
3131          * so only enable packet split for jumbo frames
3132          *
3133          * Using pages when the page size is greater than 16k wastes
3134          * a lot of memory, since we allocate 3 pages at all times
3135          * per packet.
3136          */
3137         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3138         if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3139                 adapter->rx_ps_pages = pages;
3140         else
3141                 adapter->rx_ps_pages = 0;
3142
3143         if (adapter->rx_ps_pages) {
3144                 u32 psrctl = 0;
3145
3146                 /* Enable Packet split descriptors */
3147                 rctl |= E1000_RCTL_DTYP_PS;
3148
3149                 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3150
3151                 switch (adapter->rx_ps_pages) {
3152                 case 3:
3153                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3154                         /* fall-through */
3155                 case 2:
3156                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3157                         /* fall-through */
3158                 case 1:
3159                         psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3160                         break;
3161                 }
3162
3163                 ew32(PSRCTL, psrctl);
3164         }
3165
3166         /* This is useful for sniffing bad packets. */
3167         if (adapter->netdev->features & NETIF_F_RXALL) {
3168                 /* UPE and MPE will be handled by normal PROMISC logic
3169                  * in e1000e_set_rx_mode
3170                  */
3171                 rctl |= (E1000_RCTL_SBP |       /* Receive bad packets */
3172                          E1000_RCTL_BAM |       /* RX All Bcast Pkts */
3173                          E1000_RCTL_PMCF);      /* RX All MAC Ctrl Pkts */
3174
3175                 rctl &= ~(E1000_RCTL_VFE |      /* Disable VLAN filter */
3176                           E1000_RCTL_DPF |      /* Allow filtered pause */
3177                           E1000_RCTL_CFIEN);    /* Dis VLAN CFIEN Filter */
3178                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3179                  * and that breaks VLANs.
3180                  */
3181         }
3182
3183         ew32(RCTL, rctl);
3184         /* just started the receive unit, no need to restart */
3185         adapter->flags &= ~FLAG_RESTART_NOW;
3186 }
3187
3188 /**
3189  * e1000_configure_rx - Configure Receive Unit after Reset
3190  * @adapter: board private structure
3191  *
3192  * Configure the Rx unit of the MAC after a reset.
3193  **/
3194 static void e1000_configure_rx(struct e1000_adapter *adapter)
3195 {
3196         struct e1000_hw *hw = &adapter->hw;
3197         struct e1000_ring *rx_ring = adapter->rx_ring;
3198         u64 rdba;
3199         u32 rdlen, rctl, rxcsum, ctrl_ext;
3200
3201         if (adapter->rx_ps_pages) {
3202                 /* this is a 32 byte descriptor */
3203                 rdlen = rx_ring->count *
3204                     sizeof(union e1000_rx_desc_packet_split);
3205                 adapter->clean_rx = e1000_clean_rx_irq_ps;
3206                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3207         } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3208                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3209                 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3210                 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3211         } else {
3212                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3213                 adapter->clean_rx = e1000_clean_rx_irq;
3214                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3215         }
3216
3217         /* disable receives while setting up the descriptors */
3218         rctl = er32(RCTL);
3219         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3220                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3221         e1e_flush();
3222         usleep_range(10000, 20000);
3223
3224         if (adapter->flags2 & FLAG2_DMA_BURST) {
3225                 /* set the writeback threshold (only takes effect if the RDTR
3226                  * is set). set GRAN=1 and write back up to 0x4 worth, and
3227                  * enable prefetching of 0x20 Rx descriptors
3228                  * granularity = 01
3229                  * wthresh = 04,
3230                  * hthresh = 04,
3231                  * pthresh = 0x20
3232                  */
3233                 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3234                 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3235
3236                 /* override the delay timers for enabling bursting, only if
3237                  * the value was not set by the user via module options
3238                  */
3239                 if (adapter->rx_int_delay == DEFAULT_RDTR)
3240                         adapter->rx_int_delay = BURST_RDTR;
3241                 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3242                         adapter->rx_abs_int_delay = BURST_RADV;
3243         }
3244
3245         /* set the Receive Delay Timer Register */
3246         ew32(RDTR, adapter->rx_int_delay);
3247
3248         /* irq moderation */
3249         ew32(RADV, adapter->rx_abs_int_delay);
3250         if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3251                 e1000e_write_itr(adapter, adapter->itr);
3252
3253         ctrl_ext = er32(CTRL_EXT);
3254         /* Auto-Mask interrupts upon ICR access */
3255         ctrl_ext |= E1000_CTRL_EXT_IAME;
3256         ew32(IAM, 0xffffffff);
3257         ew32(CTRL_EXT, ctrl_ext);
3258         e1e_flush();
3259
3260         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3261          * the Base and Length of the Rx Descriptor Ring
3262          */
3263         rdba = rx_ring->dma;
3264         ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3265         ew32(RDBAH(0), (rdba >> 32));
3266         ew32(RDLEN(0), rdlen);
3267         ew32(RDH(0), 0);
3268         ew32(RDT(0), 0);
3269         rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3270         rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3271
3272         writel(0, rx_ring->head);
3273         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3274                 e1000e_update_rdt_wa(rx_ring, 0);
3275         else
3276                 writel(0, rx_ring->tail);
3277
3278         /* Enable Receive Checksum Offload for TCP and UDP */
3279         rxcsum = er32(RXCSUM);
3280         if (adapter->netdev->features & NETIF_F_RXCSUM)
3281                 rxcsum |= E1000_RXCSUM_TUOFL;
3282         else
3283                 rxcsum &= ~E1000_RXCSUM_TUOFL;
3284         ew32(RXCSUM, rxcsum);
3285
3286         /* With jumbo frames, excessive C-state transition latencies result
3287          * in dropped transactions.
3288          */
3289         if (adapter->netdev->mtu > ETH_DATA_LEN) {
3290                 u32 lat =
3291                     ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3292                      adapter->max_frame_size) * 8 / 1000;
3293
3294                 if (adapter->flags & FLAG_IS_ICH) {
3295                         u32 rxdctl = er32(RXDCTL(0));
3296
3297                         ew32(RXDCTL(0), rxdctl | 0x3);
3298                 }
3299
3300                 pm_qos_update_request(&adapter->pm_qos_req, lat);
3301         } else {
3302                 pm_qos_update_request(&adapter->pm_qos_req,
3303                                       PM_QOS_DEFAULT_VALUE);
3304         }
3305
3306         /* Enable Receives */
3307         ew32(RCTL, rctl);
3308 }
3309
3310 /**
3311  * e1000e_write_mc_addr_list - write multicast addresses to MTA
3312  * @netdev: network interface device structure
3313  *
3314  * Writes multicast address list to the MTA hash table.
3315  * Returns: -ENOMEM on failure
3316  *                0 on no addresses written
3317  *                X on writing X addresses to MTA
3318  */
3319 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3320 {
3321         struct e1000_adapter *adapter = netdev_priv(netdev);
3322         struct e1000_hw *hw = &adapter->hw;
3323         struct netdev_hw_addr *ha;
3324         u8 *mta_list;
3325         int i;
3326
3327         if (netdev_mc_empty(netdev)) {
3328                 /* nothing to program, so clear mc list */
3329                 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3330                 return 0;
3331         }
3332
3333         mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3334         if (!mta_list)
3335                 return -ENOMEM;
3336
3337         /* update_mc_addr_list expects a packed array of only addresses. */
3338         i = 0;
3339         netdev_for_each_mc_addr(ha, netdev)
3340             memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3341
3342         hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3343         kfree(mta_list);
3344
3345         return netdev_mc_count(netdev);
3346 }
3347
3348 /**
3349  * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3350  * @netdev: network interface device structure
3351  *
3352  * Writes unicast address list to the RAR table.
3353  * Returns: -ENOMEM on failure/insufficient address space
3354  *                0 on no addresses written
3355  *                X on writing X addresses to the RAR table
3356  **/
3357 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3358 {
3359         struct e1000_adapter *adapter = netdev_priv(netdev);
3360         struct e1000_hw *hw = &adapter->hw;
3361         unsigned int rar_entries;
3362         int count = 0;
3363
3364         rar_entries = hw->mac.ops.rar_get_count(hw);
3365
3366         /* save a rar entry for our hardware address */
3367         rar_entries--;
3368
3369         /* save a rar entry for the LAA workaround */
3370         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3371                 rar_entries--;
3372
3373         /* return ENOMEM indicating insufficient memory for addresses */
3374         if (netdev_uc_count(netdev) > rar_entries)
3375                 return -ENOMEM;
3376
3377         if (!netdev_uc_empty(netdev) && rar_entries) {
3378                 struct netdev_hw_addr *ha;
3379
3380                 /* write the addresses in reverse order to avoid write
3381                  * combining
3382                  */
3383                 netdev_for_each_uc_addr(ha, netdev) {
3384                         int ret_val;
3385
3386                         if (!rar_entries)
3387                                 break;
3388                         ret_val = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3389                         if (ret_val < 0)
3390                                 return -ENOMEM;
3391                         count++;
3392                 }
3393         }
3394
3395         /* zero out the remaining RAR entries not used above */
3396         for (; rar_entries > 0; rar_entries--) {
3397                 ew32(RAH(rar_entries), 0);
3398                 ew32(RAL(rar_entries), 0);
3399         }
3400         e1e_flush();
3401
3402         return count;
3403 }
3404
3405 /**
3406  * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3407  * @netdev: network interface device structure
3408  *
3409  * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3410  * address list or the network interface flags are updated.  This routine is
3411  * responsible for configuring the hardware for proper unicast, multicast,
3412  * promiscuous mode, and all-multi behavior.
3413  **/
3414 static void e1000e_set_rx_mode(struct net_device *netdev)
3415 {
3416         struct e1000_adapter *adapter = netdev_priv(netdev);
3417         struct e1000_hw *hw = &adapter->hw;
3418         u32 rctl;
3419
3420         if (pm_runtime_suspended(netdev->dev.parent))
3421                 return;
3422
3423         /* Check for Promiscuous and All Multicast modes */
3424         rctl = er32(RCTL);
3425
3426         /* clear the affected bits */
3427         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3428
3429         if (netdev->flags & IFF_PROMISC) {
3430                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3431                 /* Do not hardware filter VLANs in promisc mode */
3432                 e1000e_vlan_filter_disable(adapter);
3433         } else {
3434                 int count;
3435
3436                 if (netdev->flags & IFF_ALLMULTI) {
3437                         rctl |= E1000_RCTL_MPE;
3438                 } else {
3439                         /* Write addresses to the MTA, if the attempt fails
3440                          * then we should just turn on promiscuous mode so
3441                          * that we can at least receive multicast traffic
3442                          */
3443                         count = e1000e_write_mc_addr_list(netdev);
3444                         if (count < 0)
3445                                 rctl |= E1000_RCTL_MPE;
3446                 }
3447                 e1000e_vlan_filter_enable(adapter);
3448                 /* Write addresses to available RAR registers, if there is not
3449                  * sufficient space to store all the addresses then enable
3450                  * unicast promiscuous mode
3451                  */
3452                 count = e1000e_write_uc_addr_list(netdev);
3453                 if (count < 0)
3454                         rctl |= E1000_RCTL_UPE;
3455         }
3456
3457         ew32(RCTL, rctl);
3458
3459         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3460                 e1000e_vlan_strip_enable(adapter);
3461         else
3462                 e1000e_vlan_strip_disable(adapter);
3463 }
3464
3465 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3466 {
3467         struct e1000_hw *hw = &adapter->hw;
3468         u32 mrqc, rxcsum;
3469         u32 rss_key[10];
3470         int i;
3471
3472         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3473         for (i = 0; i < 10; i++)
3474                 ew32(RSSRK(i), rss_key[i]);
3475
3476         /* Direct all traffic to queue 0 */
3477         for (i = 0; i < 32; i++)
3478                 ew32(RETA(i), 0);
3479
3480         /* Disable raw packet checksumming so that RSS hash is placed in
3481          * descriptor on writeback.
3482          */
3483         rxcsum = er32(RXCSUM);
3484         rxcsum |= E1000_RXCSUM_PCSD;
3485
3486         ew32(RXCSUM, rxcsum);
3487
3488         mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3489                 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3490                 E1000_MRQC_RSS_FIELD_IPV6 |
3491                 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3492                 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3493
3494         ew32(MRQC, mrqc);
3495 }
3496
3497 /**
3498  * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3499  * @adapter: board private structure
3500  * @timinca: pointer to returned time increment attributes
3501  *
3502  * Get attributes for incrementing the System Time Register SYSTIML/H at
3503  * the default base frequency, and set the cyclecounter shift value.
3504  **/
3505 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3506 {
3507         struct e1000_hw *hw = &adapter->hw;
3508         u32 incvalue, incperiod, shift;
3509
3510         /* Make sure clock is enabled on I217/I218/I219  before checking
3511          * the frequency
3512          */
3513         if ((hw->mac.type >= e1000_pch_lpt) &&
3514             !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3515             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3516                 u32 fextnvm7 = er32(FEXTNVM7);
3517
3518                 if (!(fextnvm7 & BIT(0))) {
3519                         ew32(FEXTNVM7, fextnvm7 | BIT(0));
3520                         e1e_flush();
3521                 }
3522         }
3523
3524         switch (hw->mac.type) {
3525         case e1000_pch2lan:
3526                 /* Stable 96MHz frequency */
3527                 incperiod = INCPERIOD_96MHZ;
3528                 incvalue = INCVALUE_96MHZ;
3529                 shift = INCVALUE_SHIFT_96MHZ;
3530                 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3531                 break;
3532         case e1000_pch_lpt:
3533                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3534                         /* Stable 96MHz frequency */
3535                         incperiod = INCPERIOD_96MHZ;
3536                         incvalue = INCVALUE_96MHZ;
3537                         shift = INCVALUE_SHIFT_96MHZ;
3538                         adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3539                 } else {
3540                         /* Stable 25MHz frequency */
3541                         incperiod = INCPERIOD_25MHZ;
3542                         incvalue = INCVALUE_25MHZ;
3543                         shift = INCVALUE_SHIFT_25MHZ;
3544                         adapter->cc.shift = shift;
3545                 }
3546                 break;
3547         case e1000_pch_spt:
3548                 /* Stable 24MHz frequency */
3549                 incperiod = INCPERIOD_24MHZ;
3550                 incvalue = INCVALUE_24MHZ;
3551                 shift = INCVALUE_SHIFT_24MHZ;
3552                 adapter->cc.shift = shift;
3553                 break;
3554         case e1000_pch_cnp:
3555                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3556                         /* Stable 24MHz frequency */
3557                         incperiod = INCPERIOD_24MHZ;
3558                         incvalue = INCVALUE_24MHZ;
3559                         shift = INCVALUE_SHIFT_24MHZ;
3560                         adapter->cc.shift = shift;
3561                 } else {
3562                         /* Stable 38400KHz frequency */
3563                         incperiod = INCPERIOD_38400KHZ;
3564                         incvalue = INCVALUE_38400KHZ;
3565                         shift = INCVALUE_SHIFT_38400KHZ;
3566                         adapter->cc.shift = shift;
3567                 }
3568                 break;
3569         case e1000_82574:
3570         case e1000_82583:
3571                 /* Stable 25MHz frequency */
3572                 incperiod = INCPERIOD_25MHZ;
3573                 incvalue = INCVALUE_25MHZ;
3574                 shift = INCVALUE_SHIFT_25MHZ;
3575                 adapter->cc.shift = shift;
3576                 break;
3577         default:
3578                 return -EINVAL;
3579         }
3580
3581         *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3582                     ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3583
3584         return 0;
3585 }
3586
3587 /**
3588  * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3589  * @adapter: board private structure
3590  *
3591  * Outgoing time stamping can be enabled and disabled. Play nice and
3592  * disable it when requested, although it shouldn't cause any overhead
3593  * when no packet needs it. At most one packet in the queue may be
3594  * marked for time stamping, otherwise it would be impossible to tell
3595  * for sure to which packet the hardware time stamp belongs.
3596  *
3597  * Incoming time stamping has to be configured via the hardware filters.
3598  * Not all combinations are supported, in particular event type has to be
3599  * specified. Matching the kind of event packet is not supported, with the
3600  * exception of "all V2 events regardless of level 2 or 4".
3601  **/
3602 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3603                                   struct hwtstamp_config *config)
3604 {
3605         struct e1000_hw *hw = &adapter->hw;
3606         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3607         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3608         u32 rxmtrl = 0;
3609         u16 rxudp = 0;
3610         bool is_l4 = false;
3611         bool is_l2 = false;
3612         u32 regval;
3613
3614         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3615                 return -EINVAL;
3616
3617         /* flags reserved for future extensions - must be zero */
3618         if (config->flags)
3619                 return -EINVAL;
3620
3621         switch (config->tx_type) {
3622         case HWTSTAMP_TX_OFF:
3623                 tsync_tx_ctl = 0;
3624                 break;
3625         case HWTSTAMP_TX_ON:
3626                 break;
3627         default:
3628                 return -ERANGE;
3629         }
3630
3631         switch (config->rx_filter) {
3632         case HWTSTAMP_FILTER_NONE:
3633                 tsync_rx_ctl = 0;
3634                 break;
3635         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3636                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3637                 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3638                 is_l4 = true;
3639                 break;
3640         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3641                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3642                 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3643                 is_l4 = true;
3644                 break;
3645         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3646                 /* Also time stamps V2 L2 Path Delay Request/Response */
3647                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3648                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3649                 is_l2 = true;
3650                 break;
3651         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3652                 /* Also time stamps V2 L2 Path Delay Request/Response. */
3653                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3654                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3655                 is_l2 = true;
3656                 break;
3657         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3658                 /* Hardware cannot filter just V2 L4 Sync messages;
3659                  * fall-through to V2 (both L2 and L4) Sync.
3660                  */
3661         case HWTSTAMP_FILTER_PTP_V2_SYNC:
3662                 /* Also time stamps V2 Path Delay Request/Response. */
3663                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3664                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3665                 is_l2 = true;
3666                 is_l4 = true;
3667                 break;
3668         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3669                 /* Hardware cannot filter just V2 L4 Delay Request messages;
3670                  * fall-through to V2 (both L2 and L4) Delay Request.
3671                  */
3672         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3673                 /* Also time stamps V2 Path Delay Request/Response. */
3674                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3675                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3676                 is_l2 = true;
3677                 is_l4 = true;
3678                 break;
3679         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3680         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3681                 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3682                  * fall-through to all V2 (both L2 and L4) Events.
3683                  */
3684         case HWTSTAMP_FILTER_PTP_V2_EVENT:
3685                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3686                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3687                 is_l2 = true;
3688                 is_l4 = true;
3689                 break;
3690         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3691                 /* For V1, the hardware can only filter Sync messages or
3692                  * Delay Request messages but not both so fall-through to
3693                  * time stamp all packets.
3694                  */
3695         case HWTSTAMP_FILTER_NTP_ALL:
3696         case HWTSTAMP_FILTER_ALL:
3697                 is_l2 = true;
3698                 is_l4 = true;
3699                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3700                 config->rx_filter = HWTSTAMP_FILTER_ALL;
3701                 break;
3702         default:
3703                 return -ERANGE;
3704         }
3705
3706         adapter->hwtstamp_config = *config;
3707
3708         /* enable/disable Tx h/w time stamping */
3709         regval = er32(TSYNCTXCTL);
3710         regval &= ~E1000_TSYNCTXCTL_ENABLED;
3711         regval |= tsync_tx_ctl;
3712         ew32(TSYNCTXCTL, regval);
3713         if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3714             (regval & E1000_TSYNCTXCTL_ENABLED)) {
3715                 e_err("Timesync Tx Control register not set as expected\n");
3716                 return -EAGAIN;
3717         }
3718
3719         /* enable/disable Rx h/w time stamping */
3720         regval = er32(TSYNCRXCTL);
3721         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3722         regval |= tsync_rx_ctl;
3723         ew32(TSYNCRXCTL, regval);
3724         if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3725                                  E1000_TSYNCRXCTL_TYPE_MASK)) !=
3726             (regval & (E1000_TSYNCRXCTL_ENABLED |
3727                        E1000_TSYNCRXCTL_TYPE_MASK))) {
3728                 e_err("Timesync Rx Control register not set as expected\n");
3729                 return -EAGAIN;
3730         }
3731
3732         /* L2: define ethertype filter for time stamped packets */
3733         if (is_l2)
3734                 rxmtrl |= ETH_P_1588;
3735
3736         /* define which PTP packets get time stamped */
3737         ew32(RXMTRL, rxmtrl);
3738
3739         /* Filter by destination port */
3740         if (is_l4) {
3741                 rxudp = PTP_EV_PORT;
3742                 cpu_to_be16s(&rxudp);
3743         }
3744         ew32(RXUDP, rxudp);
3745
3746         e1e_flush();
3747
3748         /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3749         er32(RXSTMPH);
3750         er32(TXSTMPH);
3751
3752         return 0;
3753 }
3754
3755 /**
3756  * e1000_configure - configure the hardware for Rx and Tx
3757  * @adapter: private board structure
3758  **/
3759 static void e1000_configure(struct e1000_adapter *adapter)
3760 {
3761         struct e1000_ring *rx_ring = adapter->rx_ring;
3762
3763         e1000e_set_rx_mode(adapter->netdev);
3764
3765         e1000_restore_vlan(adapter);
3766         e1000_init_manageability_pt(adapter);
3767
3768         e1000_configure_tx(adapter);
3769
3770         if (adapter->netdev->features & NETIF_F_RXHASH)
3771                 e1000e_setup_rss_hash(adapter);
3772         e1000_setup_rctl(adapter);
3773         e1000_configure_rx(adapter);
3774         adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3775 }
3776
3777 /**
3778  * e1000e_power_up_phy - restore link in case the phy was powered down
3779  * @adapter: address of board private structure
3780  *
3781  * The phy may be powered down to save power and turn off link when the
3782  * driver is unloaded and wake on lan is not enabled (among others)
3783  * *** this routine MUST be followed by a call to e1000e_reset ***
3784  **/
3785 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3786 {
3787         if (adapter->hw.phy.ops.power_up)
3788                 adapter->hw.phy.ops.power_up(&adapter->hw);
3789
3790         adapter->hw.mac.ops.setup_link(&adapter->hw);
3791 }
3792
3793 /**
3794  * e1000_power_down_phy - Power down the PHY
3795  *
3796  * Power down the PHY so no link is implied when interface is down.
3797  * The PHY cannot be powered down if management or WoL is active.
3798  */
3799 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3800 {
3801         if (adapter->hw.phy.ops.power_down)
3802                 adapter->hw.phy.ops.power_down(&adapter->hw);
3803 }
3804
3805 /**
3806  * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3807  *
3808  * We want to clear all pending descriptors from the TX ring.
3809  * zeroing happens when the HW reads the regs. We  assign the ring itself as
3810  * the data of the next descriptor. We don't care about the data we are about
3811  * to reset the HW.
3812  */
3813 static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3814 {
3815         struct e1000_hw *hw = &adapter->hw;
3816         struct e1000_ring *tx_ring = adapter->tx_ring;
3817         struct e1000_tx_desc *tx_desc = NULL;
3818         u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3819         u16 size = 512;
3820
3821         tctl = er32(TCTL);
3822         ew32(TCTL, tctl | E1000_TCTL_EN);
3823         tdt = er32(TDT(0));
3824         BUG_ON(tdt != tx_ring->next_to_use);
3825         tx_desc =  E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3826         tx_desc->buffer_addr = tx_ring->dma;
3827
3828         tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3829         tx_desc->upper.data = 0;
3830         /* flush descriptors to memory before notifying the HW */
3831         wmb();
3832         tx_ring->next_to_use++;
3833         if (tx_ring->next_to_use == tx_ring->count)
3834                 tx_ring->next_to_use = 0;
3835         ew32(TDT(0), tx_ring->next_to_use);
3836         mmiowb();
3837         usleep_range(200, 250);
3838 }
3839
3840 /**
3841  * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3842  *
3843  * Mark all descriptors in the RX ring as consumed and disable the rx ring
3844  */
3845 static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3846 {
3847         u32 rctl, rxdctl;
3848         struct e1000_hw *hw = &adapter->hw;
3849
3850         rctl = er32(RCTL);
3851         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3852         e1e_flush();
3853         usleep_range(100, 150);
3854
3855         rxdctl = er32(RXDCTL(0));
3856         /* zero the lower 14 bits (prefetch and host thresholds) */
3857         rxdctl &= 0xffffc000;
3858
3859         /* update thresholds: prefetch threshold to 31, host threshold to 1
3860          * and make sure the granularity is "descriptors" and not "cache lines"
3861          */
3862         rxdctl |= (0x1F | BIT(8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3863
3864         ew32(RXDCTL(0), rxdctl);
3865         /* momentarily enable the RX ring for the changes to take effect */
3866         ew32(RCTL, rctl | E1000_RCTL_EN);
3867         e1e_flush();
3868         usleep_range(100, 150);
3869         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3870 }
3871
3872 /**
3873  * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3874  *
3875  * In i219, the descriptor rings must be emptied before resetting the HW
3876  * or before changing the device state to D3 during runtime (runtime PM).
3877  *
3878  * Failure to do this will cause the HW to enter a unit hang state which can
3879  * only be released by PCI reset on the device
3880  *
3881  */
3882
3883 static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3884 {
3885         u16 hang_state;
3886         u32 fext_nvm11, tdlen;
3887         struct e1000_hw *hw = &adapter->hw;
3888
3889         /* First, disable MULR fix in FEXTNVM11 */
3890         fext_nvm11 = er32(FEXTNVM11);
3891         fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3892         ew32(FEXTNVM11, fext_nvm11);
3893         /* do nothing if we're not in faulty state, or if the queue is empty */
3894         tdlen = er32(TDLEN(0));
3895         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3896                              &hang_state);
3897         if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3898                 return;
3899         e1000_flush_tx_ring(adapter);
3900         /* recheck, maybe the fault is caused by the rx ring */
3901         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3902                              &hang_state);
3903         if (hang_state & FLUSH_DESC_REQUIRED)
3904                 e1000_flush_rx_ring(adapter);
3905 }
3906
3907 /**
3908  * e1000e_systim_reset - reset the timesync registers after a hardware reset
3909  * @adapter: board private structure
3910  *
3911  * When the MAC is reset, all hardware bits for timesync will be reset to the
3912  * default values. This function will restore the settings last in place.
3913  * Since the clock SYSTIME registers are reset, we will simply restore the
3914  * cyclecounter to the kernel real clock time.
3915  **/
3916 static void e1000e_systim_reset(struct e1000_adapter *adapter)
3917 {
3918         struct ptp_clock_info *info = &adapter->ptp_clock_info;
3919         struct e1000_hw *hw = &adapter->hw;
3920         unsigned long flags;
3921         u32 timinca;
3922         s32 ret_val;
3923
3924         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3925                 return;
3926
3927         if (info->adjfreq) {
3928                 /* restore the previous ptp frequency delta */
3929                 ret_val = info->adjfreq(info, adapter->ptp_delta);
3930         } else {
3931                 /* set the default base frequency if no adjustment possible */
3932                 ret_val = e1000e_get_base_timinca(adapter, &timinca);
3933                 if (!ret_val)
3934                         ew32(TIMINCA, timinca);
3935         }
3936
3937         if (ret_val) {
3938                 dev_warn(&adapter->pdev->dev,
3939                          "Failed to restore TIMINCA clock rate delta: %d\n",
3940                          ret_val);
3941                 return;
3942         }
3943
3944         /* reset the systim ns time counter */
3945         spin_lock_irqsave(&adapter->systim_lock, flags);
3946         timecounter_init(&adapter->tc, &adapter->cc,
3947                          ktime_to_ns(ktime_get_real()));
3948         spin_unlock_irqrestore(&adapter->systim_lock, flags);
3949
3950         /* restore the previous hwtstamp configuration settings */
3951         e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3952 }
3953
3954 /**
3955  * e1000e_reset - bring the hardware into a known good state
3956  *
3957  * This function boots the hardware and enables some settings that
3958  * require a configuration cycle of the hardware - those cannot be
3959  * set/changed during runtime. After reset the device needs to be
3960  * properly configured for Rx, Tx etc.
3961  */
3962 void e1000e_reset(struct e1000_adapter *adapter)
3963 {
3964         struct e1000_mac_info *mac = &adapter->hw.mac;
3965         struct e1000_fc_info *fc = &adapter->hw.fc;
3966         struct e1000_hw *hw = &adapter->hw;
3967         u32 tx_space, min_tx_space, min_rx_space;
3968         u32 pba = adapter->pba;
3969         u16 hwm;
3970
3971         /* reset Packet Buffer Allocation to default */
3972         ew32(PBA, pba);
3973
3974         if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3975                 /* To maintain wire speed transmits, the Tx FIFO should be
3976                  * large enough to accommodate two full transmit packets,
3977                  * rounded up to the next 1KB and expressed in KB.  Likewise,
3978                  * the Rx FIFO should be large enough to accommodate at least
3979                  * one full receive packet and is similarly rounded up and
3980                  * expressed in KB.
3981                  */
3982                 pba = er32(PBA);
3983                 /* upper 16 bits has Tx packet buffer allocation size in KB */
3984                 tx_space = pba >> 16;
3985                 /* lower 16 bits has Rx packet buffer allocation size in KB */
3986                 pba &= 0xffff;
3987                 /* the Tx fifo also stores 16 bytes of information about the Tx
3988                  * but don't include ethernet FCS because hardware appends it
3989                  */
3990                 min_tx_space = (adapter->max_frame_size +
3991                                 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3992                 min_tx_space = ALIGN(min_tx_space, 1024);
3993                 min_tx_space >>= 10;
3994                 /* software strips receive CRC, so leave room for it */
3995                 min_rx_space = adapter->max_frame_size;
3996                 min_rx_space = ALIGN(min_rx_space, 1024);
3997                 min_rx_space >>= 10;
3998
3999                 /* If current Tx allocation is less than the min Tx FIFO size,
4000                  * and the min Tx FIFO size is less than the current Rx FIFO
4001                  * allocation, take space away from current Rx allocation
4002                  */
4003                 if ((tx_space < min_tx_space) &&
4004                     ((min_tx_space - tx_space) < pba)) {
4005                         pba -= min_tx_space - tx_space;
4006
4007                         /* if short on Rx space, Rx wins and must trump Tx
4008                          * adjustment
4009                          */
4010                         if (pba < min_rx_space)
4011                                 pba = min_rx_space;
4012                 }
4013
4014                 ew32(PBA, pba);
4015         }
4016
4017         /* flow control settings
4018          *
4019          * The high water mark must be low enough to fit one full frame
4020          * (or the size used for early receive) above it in the Rx FIFO.
4021          * Set it to the lower of:
4022          * - 90% of the Rx FIFO size, and
4023          * - the full Rx FIFO size minus one full frame
4024          */
4025         if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
4026                 fc->pause_time = 0xFFFF;
4027         else
4028                 fc->pause_time = E1000_FC_PAUSE_TIME;
4029         fc->send_xon = true;
4030         fc->current_mode = fc->requested_mode;
4031
4032         switch (hw->mac.type) {
4033         case e1000_ich9lan:
4034         case e1000_ich10lan:
4035                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4036                         pba = 14;
4037                         ew32(PBA, pba);
4038                         fc->high_water = 0x2800;
4039                         fc->low_water = fc->high_water - 8;
4040                         break;
4041                 }
4042                 /* fall-through */
4043         default:
4044                 hwm = min(((pba << 10) * 9 / 10),
4045                           ((pba << 10) - adapter->max_frame_size));
4046
4047                 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
4048                 fc->low_water = fc->high_water - 8;
4049                 break;
4050         case e1000_pchlan:
4051                 /* Workaround PCH LOM adapter hangs with certain network
4052                  * loads.  If hangs persist, try disabling Tx flow control.
4053                  */
4054                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4055                         fc->high_water = 0x3500;
4056                         fc->low_water = 0x1500;
4057                 } else {
4058                         fc->high_water = 0x5000;
4059                         fc->low_water = 0x3000;
4060                 }
4061                 fc->refresh_time = 0x1000;
4062                 break;
4063         case e1000_pch2lan:
4064         case e1000_pch_lpt:
4065         case e1000_pch_spt:
4066         case e1000_pch_cnp:
4067                 fc->refresh_time = 0x0400;
4068
4069                 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4070                         fc->high_water = 0x05C20;
4071                         fc->low_water = 0x05048;
4072                         fc->pause_time = 0x0650;
4073                         break;
4074                 }
4075
4076                 pba = 14;
4077                 ew32(PBA, pba);
4078                 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4079                 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4080                 break;
4081         }
4082
4083         /* Alignment of Tx data is on an arbitrary byte boundary with the
4084          * maximum size per Tx descriptor limited only to the transmit
4085          * allocation of the packet buffer minus 96 bytes with an upper
4086          * limit of 24KB due to receive synchronization limitations.
4087          */
4088         adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4089                                        24 << 10);
4090
4091         /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4092          * fit in receive buffer.
4093          */
4094         if (adapter->itr_setting & 0x3) {
4095                 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4096                         if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4097                                 dev_info(&adapter->pdev->dev,
4098                                          "Interrupt Throttle Rate off\n");
4099                                 adapter->flags2 |= FLAG2_DISABLE_AIM;
4100                                 e1000e_write_itr(adapter, 0);
4101                         }
4102                 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4103                         dev_info(&adapter->pdev->dev,
4104                                  "Interrupt Throttle Rate on\n");
4105                         adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4106                         adapter->itr = 20000;
4107                         e1000e_write_itr(adapter, adapter->itr);
4108                 }
4109         }
4110
4111         if (hw->mac.type >= e1000_pch_spt)
4112                 e1000_flush_desc_rings(adapter);
4113         /* Allow time for pending master requests to run */
4114         mac->ops.reset_hw(hw);
4115
4116         /* For parts with AMT enabled, let the firmware know
4117          * that the network interface is in control
4118          */
4119         if (adapter->flags & FLAG_HAS_AMT)
4120                 e1000e_get_hw_control(adapter);
4121
4122         ew32(WUC, 0);
4123
4124         if (mac->ops.init_hw(hw))
4125                 e_err("Hardware Error\n");
4126
4127         e1000_update_mng_vlan(adapter);
4128
4129         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4130         ew32(VET, ETH_P_8021Q);
4131
4132         e1000e_reset_adaptive(hw);
4133
4134         /* restore systim and hwtstamp settings */
4135         e1000e_systim_reset(adapter);
4136
4137         /* Set EEE advertisement as appropriate */
4138         if (adapter->flags2 & FLAG2_HAS_EEE) {
4139                 s32 ret_val;
4140                 u16 adv_addr;
4141
4142                 switch (hw->phy.type) {
4143                 case e1000_phy_82579:
4144                         adv_addr = I82579_EEE_ADVERTISEMENT;
4145                         break;
4146                 case e1000_phy_i217:
4147                         adv_addr = I217_EEE_ADVERTISEMENT;
4148                         break;
4149                 default:
4150                         dev_err(&adapter->pdev->dev,
4151                                 "Invalid PHY type setting EEE advertisement\n");
4152                         return;
4153                 }
4154
4155                 ret_val = hw->phy.ops.acquire(hw);
4156                 if (ret_val) {
4157                         dev_err(&adapter->pdev->dev,
4158                                 "EEE advertisement - unable to acquire PHY\n");
4159                         return;
4160                 }
4161
4162                 e1000_write_emi_reg_locked(hw, adv_addr,
4163                                            hw->dev_spec.ich8lan.eee_disable ?
4164                                            0 : adapter->eee_advert);
4165
4166                 hw->phy.ops.release(hw);
4167         }
4168
4169         if (!netif_running(adapter->netdev) &&
4170             !test_bit(__E1000_TESTING, &adapter->state))
4171                 e1000_power_down_phy(adapter);
4172
4173         e1000_get_phy_info(hw);
4174
4175         if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4176             !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4177                 u16 phy_data = 0;
4178                 /* speed up time to link by disabling smart power down, ignore
4179                  * the return value of this function because there is nothing
4180                  * different we would do if it failed
4181                  */
4182                 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4183                 phy_data &= ~IGP02E1000_PM_SPD;
4184                 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4185         }
4186         if (hw->mac.type >= e1000_pch_spt && adapter->int_mode == 0) {
4187                 u32 reg;
4188
4189                 /* Fextnvm7 @ 0xe4[2] = 1 */
4190                 reg = er32(FEXTNVM7);
4191                 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4192                 ew32(FEXTNVM7, reg);
4193                 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4194                 reg = er32(FEXTNVM9);
4195                 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4196                        E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4197                 ew32(FEXTNVM9, reg);
4198         }
4199
4200 }
4201
4202 /**
4203  * e1000e_trigger_lsc - trigger an LSC interrupt
4204  * @adapter:
4205  *
4206  * Fire a link status change interrupt to start the watchdog.
4207  **/
4208 static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4209 {
4210         struct e1000_hw *hw = &adapter->hw;
4211
4212         if (adapter->msix_entries)
4213                 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);
4214         else
4215                 ew32(ICS, E1000_ICS_LSC);
4216 }
4217
4218 void e1000e_up(struct e1000_adapter *adapter)
4219 {
4220         /* hardware has been reset, we need to reload some things */
4221         e1000_configure(adapter);
4222
4223         clear_bit(__E1000_DOWN, &adapter->state);
4224
4225         if (adapter->msix_entries)
4226                 e1000_configure_msix(adapter);
4227         e1000_irq_enable(adapter);
4228
4229         /* Tx queue started by watchdog timer when link is up */
4230
4231         e1000e_trigger_lsc(adapter);
4232 }
4233
4234 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4235 {
4236         struct e1000_hw *hw = &adapter->hw;
4237
4238         if (!(adapter->flags2 & FLAG2_DMA_BURST))
4239                 return;
4240
4241         /* flush pending descriptor writebacks to memory */
4242         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4243         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4244
4245         /* execute the writes immediately */
4246         e1e_flush();
4247
4248         /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4249          * write is successful
4250          */
4251         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4252         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4253
4254         /* execute the writes immediately */
4255         e1e_flush();
4256 }
4257
4258 static void e1000e_update_stats(struct e1000_adapter *adapter);
4259
4260 /**
4261  * e1000e_down - quiesce the device and optionally reset the hardware
4262  * @adapter: board private structure
4263  * @reset: boolean flag to reset the hardware or not
4264  */
4265 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4266 {
4267         struct net_device *netdev = adapter->netdev;
4268         struct e1000_hw *hw = &adapter->hw;
4269         u32 tctl, rctl;
4270
4271         /* signal that we're down so the interrupt handler does not
4272          * reschedule our watchdog timer
4273          */
4274         set_bit(__E1000_DOWN, &adapter->state);
4275
4276         netif_carrier_off(netdev);
4277
4278         /* disable receives in the hardware */
4279         rctl = er32(RCTL);
4280         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4281                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4282         /* flush and sleep below */
4283
4284         netif_stop_queue(netdev);
4285
4286         /* disable transmits in the hardware */
4287         tctl = er32(TCTL);
4288         tctl &= ~E1000_TCTL_EN;
4289         ew32(TCTL, tctl);
4290
4291         /* flush both disables and wait for them to finish */
4292         e1e_flush();
4293         usleep_range(10000, 20000);
4294
4295         e1000_irq_disable(adapter);
4296
4297         napi_synchronize(&adapter->napi);
4298
4299         del_timer_sync(&adapter->watchdog_timer);
4300         del_timer_sync(&adapter->phy_info_timer);
4301
4302         spin_lock(&adapter->stats64_lock);
4303         e1000e_update_stats(adapter);
4304         spin_unlock(&adapter->stats64_lock);
4305
4306         e1000e_flush_descriptors(adapter);
4307
4308         adapter->link_speed = 0;
4309         adapter->link_duplex = 0;
4310
4311         /* Disable Si errata workaround on PCHx for jumbo frame flow */
4312         if ((hw->mac.type >= e1000_pch2lan) &&
4313             (adapter->netdev->mtu > ETH_DATA_LEN) &&
4314             e1000_lv_jumbo_workaround_ich8lan(hw, false))
4315                 e_dbg("failed to disable jumbo frame workaround mode\n");
4316
4317         if (!pci_channel_offline(adapter->pdev)) {
4318                 if (reset)
4319                         e1000e_reset(adapter);
4320                 else if (hw->mac.type >= e1000_pch_spt)
4321                         e1000_flush_desc_rings(adapter);
4322         }
4323         e1000_clean_tx_ring(adapter->tx_ring);
4324         e1000_clean_rx_ring(adapter->rx_ring);
4325 }
4326
4327 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4328 {
4329         might_sleep();
4330         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4331                 usleep_range(1000, 2000);
4332         e1000e_down(adapter, true);
4333         e1000e_up(adapter);
4334         clear_bit(__E1000_RESETTING, &adapter->state);
4335 }
4336
4337 /**
4338  * e1000e_sanitize_systim - sanitize raw cycle counter reads
4339  * @hw: pointer to the HW structure
4340  * @systim: time value read, sanitized and returned
4341  *
4342  * Errata for 82574/82583 possible bad bits read from SYSTIMH/L:
4343  * check to see that the time is incrementing at a reasonable
4344  * rate and is a multiple of incvalue.
4345  **/
4346 static u64 e1000e_sanitize_systim(struct e1000_hw *hw, u64 systim)
4347 {
4348         u64 time_delta, rem, temp;
4349         u64 systim_next;
4350         u32 incvalue;
4351         int i;
4352
4353         incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4354         for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4355                 /* latch SYSTIMH on read of SYSTIML */
4356                 systim_next = (u64)er32(SYSTIML);
4357                 systim_next |= (u64)er32(SYSTIMH) << 32;
4358
4359                 time_delta = systim_next - systim;
4360                 temp = time_delta;
4361                 /* VMWare users have seen incvalue of zero, don't div / 0 */
4362                 rem = incvalue ? do_div(temp, incvalue) : (time_delta != 0);
4363
4364                 systim = systim_next;
4365
4366                 if ((time_delta < E1000_82574_SYSTIM_EPSILON) && (rem == 0))
4367                         break;
4368         }
4369
4370         return systim;
4371 }
4372
4373 /**
4374  * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4375  * @cc: cyclecounter structure
4376  **/
4377 static u64 e1000e_cyclecounter_read(const struct cyclecounter *cc)
4378 {
4379         struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4380                                                      cc);
4381         struct e1000_hw *hw = &adapter->hw;
4382         u32 systimel, systimeh;
4383         u64 systim;
4384         /* SYSTIMH latching upon SYSTIML read does not work well.
4385          * This means that if SYSTIML overflows after we read it but before
4386          * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4387          * will experience a huge non linear increment in the systime value
4388          * to fix that we test for overflow and if true, we re-read systime.
4389          */
4390         systimel = er32(SYSTIML);
4391         systimeh = er32(SYSTIMH);
4392         /* Is systimel is so large that overflow is possible? */
4393         if (systimel >= (u32)0xffffffff - E1000_TIMINCA_INCVALUE_MASK) {
4394                 u32 systimel_2 = er32(SYSTIML);
4395                 if (systimel > systimel_2) {
4396                         /* There was an overflow, read again SYSTIMH, and use
4397                          * systimel_2
4398                          */
4399                         systimeh = er32(SYSTIMH);
4400                         systimel = systimel_2;
4401                 }
4402         }
4403         systim = (u64)systimel;
4404         systim |= (u64)systimeh << 32;
4405
4406         if (adapter->flags2 & FLAG2_CHECK_SYSTIM_OVERFLOW)
4407                 systim = e1000e_sanitize_systim(hw, systim);
4408
4409         return systim;
4410 }
4411
4412 /**
4413  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4414  * @adapter: board private structure to initialize
4415  *
4416  * e1000_sw_init initializes the Adapter private data structure.
4417  * Fields are initialized based on PCI device information and
4418  * OS network device settings (MTU size).
4419  **/
4420 static int e1000_sw_init(struct e1000_adapter *adapter)
4421 {
4422         struct net_device *netdev = adapter->netdev;
4423
4424         adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4425         adapter->rx_ps_bsize0 = 128;
4426         adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4427         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4428         adapter->tx_ring_count = E1000_DEFAULT_TXD;
4429         adapter->rx_ring_count = E1000_DEFAULT_RXD;
4430
4431         spin_lock_init(&adapter->stats64_lock);
4432
4433         e1000e_set_interrupt_capability(adapter);
4434
4435         if (e1000_alloc_queues(adapter))
4436                 return -ENOMEM;
4437
4438         /* Setup hardware time stamping cyclecounter */
4439         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4440                 adapter->cc.read = e1000e_cyclecounter_read;
4441                 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4442                 adapter->cc.mult = 1;
4443                 /* cc.shift set in e1000e_get_base_tininca() */
4444
4445                 spin_lock_init(&adapter->systim_lock);
4446                 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4447         }
4448
4449         /* Explicitly disable IRQ since the NIC can be in any state. */
4450         e1000_irq_disable(adapter);
4451
4452         set_bit(__E1000_DOWN, &adapter->state);
4453         return 0;
4454 }
4455
4456 /**
4457  * e1000_intr_msi_test - Interrupt Handler
4458  * @irq: interrupt number
4459  * @data: pointer to a network interface device structure
4460  **/
4461 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4462 {
4463         struct net_device *netdev = data;
4464         struct e1000_adapter *adapter = netdev_priv(netdev);
4465         struct e1000_hw *hw = &adapter->hw;
4466         u32 icr = er32(ICR);
4467
4468         e_dbg("icr is %08X\n", icr);
4469         if (icr & E1000_ICR_RXSEQ) {
4470                 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4471                 /* Force memory writes to complete before acknowledging the
4472                  * interrupt is handled.
4473                  */
4474                 wmb();
4475         }
4476
4477         return IRQ_HANDLED;
4478 }
4479
4480 /**
4481  * e1000_test_msi_interrupt - Returns 0 for successful test
4482  * @adapter: board private struct
4483  *
4484  * code flow taken from tg3.c
4485  **/
4486 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4487 {
4488         struct net_device *netdev = adapter->netdev;
4489         struct e1000_hw *hw = &adapter->hw;
4490         int err;
4491
4492         /* poll_enable hasn't been called yet, so don't need disable */
4493         /* clear any pending events */
4494         er32(ICR);
4495
4496         /* free the real vector and request a test handler */
4497         e1000_free_irq(adapter);
4498         e1000e_reset_interrupt_capability(adapter);
4499
4500         /* Assume that the test fails, if it succeeds then the test
4501          * MSI irq handler will unset this flag
4502          */
4503         adapter->flags |= FLAG_MSI_TEST_FAILED;
4504
4505         err = pci_enable_msi(adapter->pdev);
4506         if (err)
4507                 goto msi_test_failed;
4508
4509         err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4510                           netdev->name, netdev);
4511         if (err) {
4512                 pci_disable_msi(adapter->pdev);
4513                 goto msi_test_failed;
4514         }
4515
4516         /* Force memory writes to complete before enabling and firing an
4517          * interrupt.
4518          */
4519         wmb();
4520
4521         e1000_irq_enable(adapter);
4522
4523         /* fire an unusual interrupt on the test handler */
4524         ew32(ICS, E1000_ICS_RXSEQ);
4525         e1e_flush();
4526         msleep(100);
4527
4528         e1000_irq_disable(adapter);
4529
4530         rmb();                  /* read flags after interrupt has been fired */
4531
4532         if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4533                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4534                 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4535         } else {
4536                 e_dbg("MSI interrupt test succeeded!\n");
4537         }
4538
4539         free_irq(adapter->pdev->irq, netdev);
4540         pci_disable_msi(adapter->pdev);
4541
4542 msi_test_failed:
4543         e1000e_set_interrupt_capability(adapter);
4544         return e1000_request_irq(adapter);
4545 }
4546
4547 /**
4548  * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4549  * @adapter: board private struct
4550  *
4551  * code flow taken from tg3.c, called with e1000 interrupts disabled.
4552  **/
4553 static int e1000_test_msi(struct e1000_adapter *adapter)
4554 {
4555         int err;
4556         u16 pci_cmd;
4557
4558         if (!(adapter->flags & FLAG_MSI_ENABLED))
4559                 return 0;
4560
4561         /* disable SERR in case the MSI write causes a master abort */
4562         pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4563         if (pci_cmd & PCI_COMMAND_SERR)
4564                 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4565                                       pci_cmd & ~PCI_COMMAND_SERR);
4566
4567         err = e1000_test_msi_interrupt(adapter);
4568
4569         /* re-enable SERR */
4570         if (pci_cmd & PCI_COMMAND_SERR) {
4571                 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4572                 pci_cmd |= PCI_COMMAND_SERR;
4573                 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4574         }
4575
4576         return err;
4577 }
4578
4579 /**
4580  * e1000e_open - Called when a network interface is made active
4581  * @netdev: network interface device structure
4582  *
4583  * Returns 0 on success, negative value on failure
4584  *
4585  * The open entry point is called when a network interface is made
4586  * active by the system (IFF_UP).  At this point all resources needed
4587  * for transmit and receive operations are allocated, the interrupt
4588  * handler is registered with the OS, the watchdog timer is started,
4589  * and the stack is notified that the interface is ready.
4590  **/
4591 int e1000e_open(struct net_device *netdev)
4592 {
4593         struct e1000_adapter *adapter = netdev_priv(netdev);
4594         struct e1000_hw *hw = &adapter->hw;
4595         struct pci_dev *pdev = adapter->pdev;
4596         int err;
4597
4598         /* disallow open during test */
4599         if (test_bit(__E1000_TESTING, &adapter->state))
4600                 return -EBUSY;
4601
4602         pm_runtime_get_sync(&pdev->dev);
4603
4604         netif_carrier_off(netdev);
4605         netif_stop_queue(netdev);
4606
4607         /* allocate transmit descriptors */
4608         err = e1000e_setup_tx_resources(adapter->tx_ring);
4609         if (err)
4610                 goto err_setup_tx;
4611
4612         /* allocate receive descriptors */
4613         err = e1000e_setup_rx_resources(adapter->rx_ring);
4614         if (err)
4615                 goto err_setup_rx;
4616
4617         /* If AMT is enabled, let the firmware know that the network
4618          * interface is now open and reset the part to a known state.
4619          */
4620         if (adapter->flags & FLAG_HAS_AMT) {
4621                 e1000e_get_hw_control(adapter);
4622                 e1000e_reset(adapter);
4623         }
4624
4625         e1000e_power_up_phy(adapter);
4626
4627         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4628         if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4629                 e1000_update_mng_vlan(adapter);
4630
4631         /* DMA latency requirement to workaround jumbo issue */
4632         pm_qos_add_request(&adapter->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
4633                            PM_QOS_DEFAULT_VALUE);
4634
4635         /* before we allocate an interrupt, we must be ready to handle it.
4636          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4637          * as soon as we call pci_request_irq, so we have to setup our
4638          * clean_rx handler before we do so.
4639          */
4640         e1000_configure(adapter);
4641
4642         err = e1000_request_irq(adapter);
4643         if (err)
4644                 goto err_req_irq;
4645
4646         /* Work around PCIe errata with MSI interrupts causing some chipsets to
4647          * ignore e1000e MSI messages, which means we need to test our MSI
4648          * interrupt now
4649          */
4650         if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4651                 err = e1000_test_msi(adapter);
4652                 if (err) {
4653                         e_err("Interrupt allocation failed\n");
4654                         goto err_req_irq;
4655                 }
4656         }
4657
4658         /* From here on the code is the same as e1000e_up() */
4659         clear_bit(__E1000_DOWN, &adapter->state);
4660
4661         napi_enable(&adapter->napi);
4662
4663         e1000_irq_enable(adapter);
4664
4665         adapter->tx_hang_recheck = false;
4666
4667         hw->mac.get_link_status = true;
4668         pm_runtime_put(&pdev->dev);
4669
4670         e1000e_trigger_lsc(adapter);
4671
4672         return 0;
4673
4674 err_req_irq:
4675         pm_qos_remove_request(&adapter->pm_qos_req);
4676         e1000e_release_hw_control(adapter);
4677         e1000_power_down_phy(adapter);
4678         e1000e_free_rx_resources(adapter->rx_ring);
4679 err_setup_rx:
4680         e1000e_free_tx_resources(adapter->tx_ring);
4681 err_setup_tx:
4682         e1000e_reset(adapter);
4683         pm_runtime_put_sync(&pdev->dev);
4684
4685         return err;
4686 }
4687
4688 /**
4689  * e1000e_close - Disables a network interface
4690  * @netdev: network interface device structure
4691  *
4692  * Returns 0, this is not allowed to fail
4693  *
4694  * The close entry point is called when an interface is de-activated
4695  * by the OS.  The hardware is still under the drivers control, but
4696  * needs to be disabled.  A global MAC reset is issued to stop the
4697  * hardware, and all transmit and receive resources are freed.
4698  **/
4699 int e1000e_close(struct net_device *netdev)
4700 {
4701         struct e1000_adapter *adapter = netdev_priv(netdev);
4702         struct pci_dev *pdev = adapter->pdev;
4703         int count = E1000_CHECK_RESET_COUNT;
4704
4705         while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4706                 usleep_range(10000, 20000);
4707
4708         WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4709
4710         pm_runtime_get_sync(&pdev->dev);
4711
4712         if (!test_bit(__E1000_DOWN, &adapter->state)) {
4713                 e1000e_down(adapter, true);
4714                 e1000_free_irq(adapter);
4715
4716                 /* Link status message must follow this format */
4717                 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
4718         }
4719
4720         napi_disable(&adapter->napi);
4721
4722         e1000e_free_tx_resources(adapter->tx_ring);
4723         e1000e_free_rx_resources(adapter->rx_ring);
4724
4725         /* kill manageability vlan ID if supported, but not if a vlan with
4726          * the same ID is registered on the host OS (let 8021q kill it)
4727          */
4728         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4729                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4730                                        adapter->mng_vlan_id);
4731
4732         /* If AMT is enabled, let the firmware know that the network
4733          * interface is now closed
4734          */
4735         if ((adapter->flags & FLAG_HAS_AMT) &&
4736             !test_bit(__E1000_TESTING, &adapter->state))
4737                 e1000e_release_hw_control(adapter);
4738
4739         pm_qos_remove_request(&adapter->pm_qos_req);
4740
4741         pm_runtime_put_sync(&pdev->dev);
4742
4743         return 0;
4744 }
4745
4746 /**
4747  * e1000_set_mac - Change the Ethernet Address of the NIC
4748  * @netdev: network interface device structure
4749  * @p: pointer to an address structure
4750  *
4751  * Returns 0 on success, negative on failure
4752  **/
4753 static int e1000_set_mac(struct net_device *netdev, void *p)
4754 {
4755         struct e1000_adapter *adapter = netdev_priv(netdev);
4756         struct e1000_hw *hw = &adapter->hw;
4757         struct sockaddr *addr = p;
4758
4759         if (!is_valid_ether_addr(addr->sa_data))
4760                 return -EADDRNOTAVAIL;
4761
4762         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4763         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4764
4765         hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4766
4767         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4768                 /* activate the work around */
4769                 e1000e_set_laa_state_82571(&adapter->hw, 1);
4770
4771                 /* Hold a copy of the LAA in RAR[14] This is done so that
4772                  * between the time RAR[0] gets clobbered  and the time it
4773                  * gets fixed (in e1000_watchdog), the actual LAA is in one
4774                  * of the RARs and no incoming packets directed to this port
4775                  * are dropped. Eventually the LAA will be in RAR[0] and
4776                  * RAR[14]
4777                  */
4778                 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4779                                     adapter->hw.mac.rar_entry_count - 1);
4780         }
4781
4782         return 0;
4783 }
4784
4785 /**
4786  * e1000e_update_phy_task - work thread to update phy
4787  * @work: pointer to our work struct
4788  *
4789  * this worker thread exists because we must acquire a
4790  * semaphore to read the phy, which we could msleep while
4791  * waiting for it, and we can't msleep in a timer.
4792  **/
4793 static void e1000e_update_phy_task(struct work_struct *work)
4794 {
4795         struct e1000_adapter *adapter = container_of(work,
4796                                                      struct e1000_adapter,
4797                                                      update_phy_task);
4798         struct e1000_hw *hw = &adapter->hw;
4799
4800         if (test_bit(__E1000_DOWN, &adapter->state))
4801                 return;
4802
4803         e1000_get_phy_info(hw);
4804
4805         /* Enable EEE on 82579 after link up */
4806         if (hw->phy.type >= e1000_phy_82579)
4807                 e1000_set_eee_pchlan(hw);
4808 }
4809
4810 /**
4811  * e1000_update_phy_info - timre call-back to update PHY info
4812  * @data: pointer to adapter cast into an unsigned long
4813  *
4814  * Need to wait a few seconds after link up to get diagnostic information from
4815  * the phy
4816  **/
4817 static void e1000_update_phy_info(unsigned long data)
4818 {
4819         struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4820
4821         if (test_bit(__E1000_DOWN, &adapter->state))
4822                 return;
4823
4824         schedule_work(&adapter->update_phy_task);
4825 }
4826
4827 /**
4828  * e1000e_update_phy_stats - Update the PHY statistics counters
4829  * @adapter: board private structure
4830  *
4831  * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4832  **/
4833 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4834 {
4835         struct e1000_hw *hw = &adapter->hw;
4836         s32 ret_val;
4837         u16 phy_data;
4838
4839         ret_val = hw->phy.ops.acquire(hw);
4840         if (ret_val)
4841                 return;
4842
4843         /* A page set is expensive so check if already on desired page.
4844          * If not, set to the page with the PHY status registers.
4845          */
4846         hw->phy.addr = 1;
4847         ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4848                                            &phy_data);
4849         if (ret_val)
4850                 goto release;
4851         if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4852                 ret_val = hw->phy.ops.set_page(hw,
4853                                                HV_STATS_PAGE << IGP_PAGE_SHIFT);
4854                 if (ret_val)
4855                         goto release;
4856         }
4857
4858         /* Single Collision Count */
4859         hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4860         ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4861         if (!ret_val)
4862                 adapter->stats.scc += phy_data;
4863
4864         /* Excessive Collision Count */
4865         hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4866         ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4867         if (!ret_val)
4868                 adapter->stats.ecol += phy_data;
4869
4870         /* Multiple Collision Count */
4871         hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4872         ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4873         if (!ret_val)
4874                 adapter->stats.mcc += phy_data;
4875
4876         /* Late Collision Count */
4877         hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4878         ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4879         if (!ret_val)
4880                 adapter->stats.latecol += phy_data;
4881
4882         /* Collision Count - also used for adaptive IFS */
4883         hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4884         ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4885         if (!ret_val)
4886                 hw->mac.collision_delta = phy_data;
4887
4888         /* Defer Count */
4889         hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4890         ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4891         if (!ret_val)
4892                 adapter->stats.dc += phy_data;
4893
4894         /* Transmit with no CRS */
4895         hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4896         ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4897         if (!ret_val)
4898                 adapter->stats.tncrs += phy_data;
4899
4900 release:
4901         hw->phy.ops.release(hw);
4902 }
4903
4904 /**
4905  * e1000e_update_stats - Update the board statistics counters
4906  * @adapter: board private structure
4907  **/
4908 static void e1000e_update_stats(struct e1000_adapter *adapter)
4909 {
4910         struct net_device *netdev = adapter->netdev;
4911         struct e1000_hw *hw = &adapter->hw;
4912         struct pci_dev *pdev = adapter->pdev;
4913
4914         /* Prevent stats update while adapter is being reset, or if the pci
4915          * connection is down.
4916          */
4917         if (adapter->link_speed == 0)
4918                 return;
4919         if (pci_channel_offline(pdev))
4920                 return;
4921
4922         adapter->stats.crcerrs += er32(CRCERRS);
4923         adapter->stats.gprc += er32(GPRC);
4924         adapter->stats.gorc += er32(GORCL);
4925         er32(GORCH);            /* Clear gorc */
4926         adapter->stats.bprc += er32(BPRC);
4927         adapter->stats.mprc += er32(MPRC);
4928         adapter->stats.roc += er32(ROC);
4929
4930         adapter->stats.mpc += er32(MPC);
4931
4932         /* Half-duplex statistics */
4933         if (adapter->link_duplex == HALF_DUPLEX) {
4934                 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4935                         e1000e_update_phy_stats(adapter);
4936                 } else {
4937                         adapter->stats.scc += er32(SCC);
4938                         adapter->stats.ecol += er32(ECOL);
4939                         adapter->stats.mcc += er32(MCC);
4940                         adapter->stats.latecol += er32(LATECOL);
4941                         adapter->stats.dc += er32(DC);
4942
4943                         hw->mac.collision_delta = er32(COLC);
4944
4945                         if ((hw->mac.type != e1000_82574) &&
4946                             (hw->mac.type != e1000_82583))
4947                                 adapter->stats.tncrs += er32(TNCRS);
4948                 }
4949                 adapter->stats.colc += hw->mac.collision_delta;
4950         }
4951
4952         adapter->stats.xonrxc += er32(XONRXC);
4953         adapter->stats.xontxc += er32(XONTXC);
4954         adapter->stats.xoffrxc += er32(XOFFRXC);
4955         adapter->stats.xofftxc += er32(XOFFTXC);
4956         adapter->stats.gptc += er32(GPTC);
4957         adapter->stats.gotc += er32(GOTCL);
4958         er32(GOTCH);            /* Clear gotc */
4959         adapter->stats.rnbc += er32(RNBC);
4960         adapter->stats.ruc += er32(RUC);
4961
4962         adapter->stats.mptc += er32(MPTC);
4963         adapter->stats.bptc += er32(BPTC);
4964
4965         /* used for adaptive IFS */
4966
4967         hw->mac.tx_packet_delta = er32(TPT);
4968         adapter->stats.tpt += hw->mac.tx_packet_delta;
4969
4970         adapter->stats.algnerrc += er32(ALGNERRC);
4971         adapter->stats.rxerrc += er32(RXERRC);
4972         adapter->stats.cexterr += er32(CEXTERR);
4973         adapter->stats.tsctc += er32(TSCTC);
4974         adapter->stats.tsctfc += er32(TSCTFC);
4975
4976         /* Fill out the OS statistics structure */
4977         netdev->stats.multicast = adapter->stats.mprc;
4978         netdev->stats.collisions = adapter->stats.colc;
4979
4980         /* Rx Errors */
4981
4982         /* RLEC on some newer hardware can be incorrect so build
4983          * our own version based on RUC and ROC
4984          */
4985         netdev->stats.rx_errors = adapter->stats.rxerrc +
4986             adapter->stats.crcerrs + adapter->stats.algnerrc +
4987             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4988         netdev->stats.rx_length_errors = adapter->stats.ruc +
4989             adapter->stats.roc;
4990         netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4991         netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4992         netdev->stats.rx_missed_errors = adapter->stats.mpc;
4993
4994         /* Tx Errors */
4995         netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
4996         netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4997         netdev->stats.tx_window_errors = adapter->stats.latecol;
4998         netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4999
5000         /* Tx Dropped needs to be maintained elsewhere */
5001
5002         /* Management Stats */
5003         adapter->stats.mgptc += er32(MGTPTC);
5004         adapter->stats.mgprc += er32(MGTPRC);
5005         adapter->stats.mgpdc += er32(MGTPDC);
5006
5007         /* Correctable ECC Errors */
5008         if (hw->mac.type >= e1000_pch_lpt) {
5009                 u32 pbeccsts = er32(PBECCSTS);
5010
5011                 adapter->corr_errors +=
5012                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
5013                 adapter->uncorr_errors +=
5014                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
5015                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
5016         }
5017 }
5018
5019 /**
5020  * e1000_phy_read_status - Update the PHY register status snapshot
5021  * @adapter: board private structure
5022  **/
5023 static void e1000_phy_read_status(struct e1000_adapter *adapter)
5024 {
5025         struct e1000_hw *hw = &adapter->hw;
5026         struct e1000_phy_regs *phy = &adapter->phy_regs;
5027
5028         if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
5029             (er32(STATUS) & E1000_STATUS_LU) &&
5030             (adapter->hw.phy.media_type == e1000_media_type_copper)) {
5031                 int ret_val;
5032
5033                 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
5034                 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
5035                 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
5036                 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
5037                 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
5038                 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
5039                 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
5040                 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
5041                 if (ret_val)
5042                         e_warn("Error reading PHY register\n");
5043         } else {
5044                 /* Do not read PHY registers if link is not up
5045                  * Set values to typical power-on defaults
5046                  */
5047                 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
5048                 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
5049                              BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
5050                              BMSR_ERCAP);
5051                 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
5052                                   ADVERTISE_ALL | ADVERTISE_CSMA);
5053                 phy->lpa = 0;
5054                 phy->expansion = EXPANSION_ENABLENPAGE;
5055                 phy->ctrl1000 = ADVERTISE_1000FULL;
5056                 phy->stat1000 = 0;
5057                 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
5058         }
5059 }
5060
5061 static void e1000_print_link_info(struct e1000_adapter *adapter)
5062 {
5063         struct e1000_hw *hw = &adapter->hw;
5064         u32 ctrl = er32(CTRL);
5065
5066         /* Link status message must follow this format for user tools */
5067         pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5068                 adapter->netdev->name, adapter->link_speed,
5069                 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5070                 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5071                 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
5072                 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5073 }
5074
5075 static bool e1000e_has_link(struct e1000_adapter *adapter)
5076 {
5077         struct e1000_hw *hw = &adapter->hw;
5078         bool link_active = false;
5079         s32 ret_val = 0;
5080
5081         /* get_link_status is set on LSC (link status) interrupt or
5082          * Rx sequence error interrupt.  get_link_status will stay
5083          * false until the check_for_link establishes link
5084          * for copper adapters ONLY
5085          */
5086         switch (hw->phy.media_type) {
5087         case e1000_media_type_copper:
5088                 if (hw->mac.get_link_status) {
5089                         ret_val = hw->mac.ops.check_for_link(hw);
5090                         link_active = !hw->mac.get_link_status;
5091                 } else {
5092                         link_active = true;
5093                 }
5094                 break;
5095         case e1000_media_type_fiber:
5096                 ret_val = hw->mac.ops.check_for_link(hw);
5097                 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5098                 break;
5099         case e1000_media_type_internal_serdes:
5100                 ret_val = hw->mac.ops.check_for_link(hw);
5101                 link_active = adapter->hw.mac.serdes_has_link;
5102                 break;
5103         default:
5104         case e1000_media_type_unknown:
5105                 break;
5106         }
5107
5108         if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5109             (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5110                 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5111                 e_info("Gigabit has been disabled, downgrading speed\n");
5112         }
5113
5114         return link_active;
5115 }
5116
5117 static void e1000e_enable_receives(struct e1000_adapter *adapter)
5118 {
5119         /* make sure the receive unit is started */
5120         if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5121             (adapter->flags & FLAG_RESTART_NOW)) {
5122                 struct e1000_hw *hw = &adapter->hw;
5123                 u32 rctl = er32(RCTL);
5124
5125                 ew32(RCTL, rctl | E1000_RCTL_EN);
5126                 adapter->flags &= ~FLAG_RESTART_NOW;
5127         }
5128 }
5129
5130 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5131 {
5132         struct e1000_hw *hw = &adapter->hw;
5133
5134         /* With 82574 controllers, PHY needs to be checked periodically
5135          * for hung state and reset, if two calls return true
5136          */
5137         if (e1000_check_phy_82574(hw))
5138                 adapter->phy_hang_count++;
5139         else
5140                 adapter->phy_hang_count = 0;
5141
5142         if (adapter->phy_hang_count > 1) {
5143                 adapter->phy_hang_count = 0;
5144                 e_dbg("PHY appears hung - resetting\n");
5145                 schedule_work(&adapter->reset_task);
5146         }
5147 }
5148
5149 /**
5150  * e1000_watchdog - Timer Call-back
5151  * @data: pointer to adapter cast into an unsigned long
5152  **/
5153 static void e1000_watchdog(unsigned long data)
5154 {
5155         struct e1000_adapter *adapter = (struct e1000_adapter *)data;
5156
5157         /* Do the rest outside of interrupt context */
5158         schedule_work(&adapter->watchdog_task);
5159
5160         /* TODO: make this use queue_delayed_work() */
5161 }
5162
5163 static void e1000_watchdog_task(struct work_struct *work)
5164 {
5165         struct e1000_adapter *adapter = container_of(work,
5166                                                      struct e1000_adapter,
5167                                                      watchdog_task);
5168         struct net_device *netdev = adapter->netdev;
5169         struct e1000_mac_info *mac = &adapter->hw.mac;
5170         struct e1000_phy_info *phy = &adapter->hw.phy;
5171         struct e1000_ring *tx_ring = adapter->tx_ring;
5172         struct e1000_hw *hw = &adapter->hw;
5173         u32 link, tctl;
5174
5175         if (test_bit(__E1000_DOWN, &adapter->state))
5176                 return;
5177
5178         link = e1000e_has_link(adapter);
5179         if ((netif_carrier_ok(netdev)) && link) {
5180                 /* Cancel scheduled suspend requests. */
5181                 pm_runtime_resume(netdev->dev.parent);
5182
5183                 e1000e_enable_receives(adapter);
5184                 goto link_up;
5185         }
5186
5187         if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5188             (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5189                 e1000_update_mng_vlan(adapter);
5190
5191         if (link) {
5192                 if (!netif_carrier_ok(netdev)) {
5193                         bool txb2b = true;
5194
5195                         /* Cancel scheduled suspend requests. */
5196                         pm_runtime_resume(netdev->dev.parent);
5197
5198                         /* update snapshot of PHY registers on LSC */
5199                         e1000_phy_read_status(adapter);
5200                         mac->ops.get_link_up_info(&adapter->hw,
5201                                                   &adapter->link_speed,
5202                                                   &adapter->link_duplex);
5203                         e1000_print_link_info(adapter);
5204
5205                         /* check if SmartSpeed worked */
5206                         e1000e_check_downshift(hw);
5207                         if (phy->speed_downgraded)
5208                                 netdev_warn(netdev,
5209                                             "Link Speed was downgraded by SmartSpeed\n");
5210
5211                         /* On supported PHYs, check for duplex mismatch only
5212                          * if link has autonegotiated at 10/100 half
5213                          */
5214                         if ((hw->phy.type == e1000_phy_igp_3 ||
5215                              hw->phy.type == e1000_phy_bm) &&
5216                             hw->mac.autoneg &&
5217                             (adapter->link_speed == SPEED_10 ||
5218                              adapter->link_speed == SPEED_100) &&
5219                             (adapter->link_duplex == HALF_DUPLEX)) {
5220                                 u16 autoneg_exp;
5221
5222                                 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5223
5224                                 if (!(autoneg_exp & EXPANSION_NWAY))
5225                                         e_info("Autonegotiated half duplex but link partner cannot autoneg.  Try forcing full duplex if link gets many collisions.\n");
5226                         }
5227
5228                         /* adjust timeout factor according to speed/duplex */
5229                         adapter->tx_timeout_factor = 1;
5230                         switch (adapter->link_speed) {
5231                         case SPEED_10:
5232                                 txb2b = false;
5233                                 adapter->tx_timeout_factor = 16;
5234                                 break;
5235                         case SPEED_100:
5236                                 txb2b = false;
5237                                 adapter->tx_timeout_factor = 10;
5238                                 break;
5239                         }
5240
5241                         /* workaround: re-program speed mode bit after
5242                          * link-up event
5243                          */
5244                         if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5245                             !txb2b) {
5246                                 u32 tarc0;
5247
5248                                 tarc0 = er32(TARC(0));
5249                                 tarc0 &= ~SPEED_MODE_BIT;
5250                                 ew32(TARC(0), tarc0);
5251                         }
5252
5253                         /* disable TSO for pcie and 10/100 speeds, to avoid
5254                          * some hardware issues
5255                          */
5256                         if (!(adapter->flags & FLAG_TSO_FORCE)) {
5257                                 switch (adapter->link_speed) {
5258                                 case SPEED_10:
5259                                 case SPEED_100:
5260                                         e_info("10/100 speed: disabling TSO\n");
5261                                         netdev->features &= ~NETIF_F_TSO;
5262                                         netdev->features &= ~NETIF_F_TSO6;
5263                                         break;
5264                                 case SPEED_1000:
5265                                         netdev->features |= NETIF_F_TSO;
5266                                         netdev->features |= NETIF_F_TSO6;
5267                                         break;
5268                                 default:
5269                                         /* oops */
5270                                         break;
5271                                 }
5272                                 if (hw->mac.type == e1000_pch_spt) {
5273                                         netdev->features &= ~NETIF_F_TSO;
5274                                         netdev->features &= ~NETIF_F_TSO6;
5275                                 }
5276                         }
5277
5278                         /* enable transmits in the hardware, need to do this
5279                          * after setting TARC(0)
5280                          */
5281                         tctl = er32(TCTL);
5282                         tctl |= E1000_TCTL_EN;
5283                         ew32(TCTL, tctl);
5284
5285                         /* Perform any post-link-up configuration before
5286                          * reporting link up.
5287                          */
5288                         if (phy->ops.cfg_on_link_up)
5289                                 phy->ops.cfg_on_link_up(hw);
5290
5291                         netif_wake_queue(netdev);
5292                         netif_carrier_on(netdev);
5293
5294                         if (!test_bit(__E1000_DOWN, &adapter->state))
5295                                 mod_timer(&adapter->phy_info_timer,
5296                                           round_jiffies(jiffies + 2 * HZ));
5297                 }
5298         } else {
5299                 if (netif_carrier_ok(netdev)) {
5300                         adapter->link_speed = 0;
5301                         adapter->link_duplex = 0;
5302                         /* Link status message must follow this format */
5303                         pr_info("%s NIC Link is Down\n", adapter->netdev->name);
5304                         netif_carrier_off(netdev);
5305                         netif_stop_queue(netdev);
5306                         if (!test_bit(__E1000_DOWN, &adapter->state))
5307                                 mod_timer(&adapter->phy_info_timer,
5308                                           round_jiffies(jiffies + 2 * HZ));
5309
5310                         /* 8000ES2LAN requires a Rx packet buffer work-around
5311                          * on link down event; reset the controller to flush
5312                          * the Rx packet buffer.
5313                          */
5314                         if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5315                                 adapter->flags |= FLAG_RESTART_NOW;
5316                         else
5317                                 pm_schedule_suspend(netdev->dev.parent,
5318                                                     LINK_TIMEOUT);
5319                 }
5320         }
5321
5322 link_up:
5323         spin_lock(&adapter->stats64_lock);
5324         e1000e_update_stats(adapter);
5325
5326         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5327         adapter->tpt_old = adapter->stats.tpt;
5328         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5329         adapter->colc_old = adapter->stats.colc;
5330
5331         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5332         adapter->gorc_old = adapter->stats.gorc;
5333         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5334         adapter->gotc_old = adapter->stats.gotc;
5335         spin_unlock(&adapter->stats64_lock);
5336
5337         /* If the link is lost the controller stops DMA, but
5338          * if there is queued Tx work it cannot be done.  So
5339          * reset the controller to flush the Tx packet buffers.
5340          */
5341         if (!netif_carrier_ok(netdev) &&
5342             (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5343                 adapter->flags |= FLAG_RESTART_NOW;
5344
5345         /* If reset is necessary, do it outside of interrupt context. */
5346         if (adapter->flags & FLAG_RESTART_NOW) {
5347                 schedule_work(&adapter->reset_task);
5348                 /* return immediately since reset is imminent */
5349                 return;
5350         }
5351
5352         e1000e_update_adaptive(&adapter->hw);
5353
5354         /* Simple mode for Interrupt Throttle Rate (ITR) */
5355         if (adapter->itr_setting == 4) {
5356                 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5357                  * Total asymmetrical Tx or Rx gets ITR=8000;
5358                  * everyone else is between 2000-8000.
5359                  */
5360                 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5361                 u32 dif = (adapter->gotc > adapter->gorc ?
5362                            adapter->gotc - adapter->gorc :
5363                            adapter->gorc - adapter->gotc) / 10000;
5364                 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5365
5366                 e1000e_write_itr(adapter, itr);
5367         }
5368
5369         /* Cause software interrupt to ensure Rx ring is cleaned */
5370         if (adapter->msix_entries)
5371                 ew32(ICS, adapter->rx_ring->ims_val);
5372         else
5373                 ew32(ICS, E1000_ICS_RXDMT0);
5374
5375         /* flush pending descriptors to memory before detecting Tx hang */
5376         e1000e_flush_descriptors(adapter);
5377
5378         /* Force detection of hung controller every watchdog period */
5379         adapter->detect_tx_hung = true;
5380
5381         /* With 82571 controllers, LAA may be overwritten due to controller
5382          * reset from the other port. Set the appropriate LAA in RAR[0]
5383          */
5384         if (e1000e_get_laa_state_82571(hw))
5385                 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5386
5387         if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5388                 e1000e_check_82574_phy_workaround(adapter);
5389
5390         /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5391         if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5392                 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5393                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5394                         er32(RXSTMPH);
5395                         adapter->rx_hwtstamp_cleared++;
5396                 } else {
5397                         adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5398                 }
5399         }
5400
5401         /* Reset the timer */
5402         if (!test_bit(__E1000_DOWN, &adapter->state))
5403                 mod_timer(&adapter->watchdog_timer,
5404                           round_jiffies(jiffies + 2 * HZ));
5405 }
5406
5407 #define E1000_TX_FLAGS_CSUM             0x00000001
5408 #define E1000_TX_FLAGS_VLAN             0x00000002
5409 #define E1000_TX_FLAGS_TSO              0x00000004
5410 #define E1000_TX_FLAGS_IPV4             0x00000008
5411 #define E1000_TX_FLAGS_NO_FCS           0x00000010
5412 #define E1000_TX_FLAGS_HWTSTAMP         0x00000020
5413 #define E1000_TX_FLAGS_VLAN_MASK        0xffff0000
5414 #define E1000_TX_FLAGS_VLAN_SHIFT       16
5415
5416 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5417                      __be16 protocol)
5418 {
5419         struct e1000_context_desc *context_desc;
5420         struct e1000_buffer *buffer_info;
5421         unsigned int i;
5422         u32 cmd_length = 0;
5423         u16 ipcse = 0, mss;
5424         u8 ipcss, ipcso, tucss, tucso, hdr_len;
5425         int err;
5426
5427         if (!skb_is_gso(skb))
5428                 return 0;
5429
5430         err = skb_cow_head(skb, 0);
5431         if (err < 0)
5432                 return err;
5433
5434         hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5435         mss = skb_shinfo(skb)->gso_size;
5436         if (protocol == htons(ETH_P_IP)) {
5437                 struct iphdr *iph = ip_hdr(skb);
5438                 iph->tot_len = 0;
5439                 iph->check = 0;
5440                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5441                                                          0, IPPROTO_TCP, 0);
5442                 cmd_length = E1000_TXD_CMD_IP;
5443                 ipcse = skb_transport_offset(skb) - 1;
5444         } else if (skb_is_gso_v6(skb)) {
5445                 ipv6_hdr(skb)->payload_len = 0;
5446                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5447                                                        &ipv6_hdr(skb)->daddr,
5448                                                        0, IPPROTO_TCP, 0);
5449                 ipcse = 0;
5450         }
5451         ipcss = skb_network_offset(skb);
5452         ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5453         tucss = skb_transport_offset(skb);
5454         tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5455
5456         cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5457                        E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5458
5459         i = tx_ring->next_to_use;
5460         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5461         buffer_info = &tx_ring->buffer_info[i];
5462
5463         context_desc->lower_setup.ip_fields.ipcss = ipcss;
5464         context_desc->lower_setup.ip_fields.ipcso = ipcso;
5465         context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5466         context_desc->upper_setup.tcp_fields.tucss = tucss;
5467         context_desc->upper_setup.tcp_fields.tucso = tucso;
5468         context_desc->upper_setup.tcp_fields.tucse = 0;
5469         context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5470         context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5471         context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5472
5473         buffer_info->time_stamp = jiffies;
5474         buffer_info->next_to_watch = i;
5475
5476         i++;
5477         if (i == tx_ring->count)
5478                 i = 0;
5479         tx_ring->next_to_use = i;
5480
5481         return 1;
5482 }
5483
5484 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5485                           __be16 protocol)
5486 {
5487         struct e1000_adapter *adapter = tx_ring->adapter;
5488         struct e1000_context_desc *context_desc;
5489         struct e1000_buffer *buffer_info;
5490         unsigned int i;
5491         u8 css;
5492         u32 cmd_len = E1000_TXD_CMD_DEXT;
5493
5494         if (skb->ip_summed != CHECKSUM_PARTIAL)
5495                 return false;
5496
5497         switch (protocol) {
5498         case cpu_to_be16(ETH_P_IP):
5499                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5500                         cmd_len |= E1000_TXD_CMD_TCP;
5501                 break;
5502         case cpu_to_be16(ETH_P_IPV6):
5503                 /* XXX not handling all IPV6 headers */
5504                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5505                         cmd_len |= E1000_TXD_CMD_TCP;
5506                 break;
5507         default:
5508                 if (unlikely(net_ratelimit()))
5509                         e_warn("checksum_partial proto=%x!\n",
5510                                be16_to_cpu(protocol));
5511                 break;
5512         }
5513
5514         css = skb_checksum_start_offset(skb);
5515
5516         i = tx_ring->next_to_use;
5517         buffer_info = &tx_ring->buffer_info[i];
5518         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5519
5520         context_desc->lower_setup.ip_config = 0;
5521         context_desc->upper_setup.tcp_fields.tucss = css;
5522         context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5523         context_desc->upper_setup.tcp_fields.tucse = 0;
5524         context_desc->tcp_seg_setup.data = 0;
5525         context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5526
5527         buffer_info->time_stamp = jiffies;
5528         buffer_info->next_to_watch = i;
5529
5530         i++;
5531         if (i == tx_ring->count)
5532                 i = 0;
5533         tx_ring->next_to_use = i;
5534
5535         return true;
5536 }
5537
5538 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5539                         unsigned int first, unsigned int max_per_txd,
5540                         unsigned int nr_frags)
5541 {
5542         struct e1000_adapter *adapter = tx_ring->adapter;
5543         struct pci_dev *pdev = adapter->pdev;
5544         struct e1000_buffer *buffer_info;
5545         unsigned int len = skb_headlen(skb);
5546         unsigned int offset = 0, size, count = 0, i;
5547         unsigned int f, bytecount, segs;
5548
5549         i = tx_ring->next_to_use;
5550
5551         while (len) {
5552                 buffer_info = &tx_ring->buffer_info[i];
5553                 size = min(len, max_per_txd);
5554
5555                 buffer_info->length = size;
5556                 buffer_info->time_stamp = jiffies;
5557                 buffer_info->next_to_watch = i;
5558                 buffer_info->dma = dma_map_single(&pdev->dev,
5559                                                   skb->data + offset,
5560                                                   size, DMA_TO_DEVICE);
5561                 buffer_info->mapped_as_page = false;
5562                 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5563                         goto dma_error;
5564
5565                 len -= size;
5566                 offset += size;
5567                 count++;
5568
5569                 if (len) {
5570                         i++;
5571                         if (i == tx_ring->count)
5572                                 i = 0;
5573                 }
5574         }
5575
5576         for (f = 0; f < nr_frags; f++) {
5577                 const struct skb_frag_struct *frag;
5578
5579                 frag = &skb_shinfo(skb)->frags[f];
5580                 len = skb_frag_size(frag);
5581                 offset = 0;
5582
5583                 while (len) {
5584                         i++;
5585                         if (i == tx_ring->count)
5586                                 i = 0;
5587
5588                         buffer_info = &tx_ring->buffer_info[i];
5589                         size = min(len, max_per_txd);
5590
5591                         buffer_info->length = size;
5592                         buffer_info->time_stamp = jiffies;
5593                         buffer_info->next_to_watch = i;
5594                         buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5595                                                             offset, size,
5596                                                             DMA_TO_DEVICE);
5597                         buffer_info->mapped_as_page = true;
5598                         if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5599                                 goto dma_error;
5600
5601                         len -= size;
5602                         offset += size;
5603                         count++;
5604                 }
5605         }
5606
5607         segs = skb_shinfo(skb)->gso_segs ? : 1;
5608         /* multiply data chunks by size of headers */
5609         bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5610
5611         tx_ring->buffer_info[i].skb = skb;
5612         tx_ring->buffer_info[i].segs = segs;
5613         tx_ring->buffer_info[i].bytecount = bytecount;
5614         tx_ring->buffer_info[first].next_to_watch = i;
5615
5616         return count;
5617
5618 dma_error:
5619         dev_err(&pdev->dev, "Tx DMA map failed\n");
5620         buffer_info->dma = 0;
5621         if (count)
5622                 count--;
5623
5624         while (count--) {
5625                 if (i == 0)
5626                         i += tx_ring->count;
5627                 i--;
5628                 buffer_info = &tx_ring->buffer_info[i];
5629                 e1000_put_txbuf(tx_ring, buffer_info);
5630         }
5631
5632         return 0;
5633 }
5634
5635 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5636 {
5637         struct e1000_adapter *adapter = tx_ring->adapter;
5638         struct e1000_tx_desc *tx_desc = NULL;
5639         struct e1000_buffer *buffer_info;
5640         u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5641         unsigned int i;
5642
5643         if (tx_flags & E1000_TX_FLAGS_TSO) {
5644                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5645                     E1000_TXD_CMD_TSE;
5646                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5647
5648                 if (tx_flags & E1000_TX_FLAGS_IPV4)
5649                         txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5650         }
5651
5652         if (tx_flags & E1000_TX_FLAGS_CSUM) {
5653                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5654                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5655         }
5656
5657         if (tx_flags & E1000_TX_FLAGS_VLAN) {
5658                 txd_lower |= E1000_TXD_CMD_VLE;
5659                 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5660         }
5661
5662         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5663                 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5664
5665         if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5666                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5667                 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5668         }
5669
5670         i = tx_ring->next_to_use;
5671
5672         do {
5673                 buffer_info = &tx_ring->buffer_info[i];
5674                 tx_desc = E1000_TX_DESC(*tx_ring, i);
5675                 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5676                 tx_desc->lower.data = cpu_to_le32(txd_lower |
5677                                                   buffer_info->length);
5678                 tx_desc->upper.data = cpu_to_le32(txd_upper);
5679
5680                 i++;
5681                 if (i == tx_ring->count)
5682                         i = 0;
5683         } while (--count > 0);
5684
5685         tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5686
5687         /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5688         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5689                 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5690
5691         /* Force memory writes to complete before letting h/w
5692          * know there are new descriptors to fetch.  (Only
5693          * applicable for weak-ordered memory model archs,
5694          * such as IA-64).
5695          */
5696         wmb();
5697
5698         tx_ring->next_to_use = i;
5699 }
5700
5701 #define MINIMUM_DHCP_PACKET_SIZE 282
5702 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5703                                     struct sk_buff *skb)
5704 {
5705         struct e1000_hw *hw = &adapter->hw;
5706         u16 length, offset;
5707
5708         if (skb_vlan_tag_present(skb) &&
5709             !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5710               (adapter->hw.mng_cookie.status &
5711                E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5712                 return 0;
5713
5714         if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5715                 return 0;
5716
5717         if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5718                 return 0;
5719
5720         {
5721                 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5722                 struct udphdr *udp;
5723
5724                 if (ip->protocol != IPPROTO_UDP)
5725                         return 0;
5726
5727                 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5728                 if (ntohs(udp->dest) != 67)
5729                         return 0;
5730
5731                 offset = (u8 *)udp + 8 - skb->data;
5732                 length = skb->len - offset;
5733                 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5734         }
5735
5736         return 0;
5737 }
5738
5739 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5740 {
5741         struct e1000_adapter *adapter = tx_ring->adapter;
5742
5743         netif_stop_queue(adapter->netdev);
5744         /* Herbert's original patch had:
5745          *  smp_mb__after_netif_stop_queue();
5746          * but since that doesn't exist yet, just open code it.
5747          */
5748         smp_mb();
5749
5750         /* We need to check again in a case another CPU has just
5751          * made room available.
5752          */
5753         if (e1000_desc_unused(tx_ring) < size)
5754                 return -EBUSY;
5755
5756         /* A reprieve! */
5757         netif_start_queue(adapter->netdev);
5758         ++adapter->restart_queue;
5759         return 0;
5760 }
5761
5762 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5763 {
5764         BUG_ON(size > tx_ring->count);
5765
5766         if (e1000_desc_unused(tx_ring) >= size)
5767                 return 0;
5768         return __e1000_maybe_stop_tx(tx_ring, size);
5769 }
5770
5771 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5772                                     struct net_device *netdev)
5773 {
5774         struct e1000_adapter *adapter = netdev_priv(netdev);
5775         struct e1000_ring *tx_ring = adapter->tx_ring;
5776         unsigned int first;
5777         unsigned int tx_flags = 0;
5778         unsigned int len = skb_headlen(skb);
5779         unsigned int nr_frags;
5780         unsigned int mss;
5781         int count = 0;
5782         int tso;
5783         unsigned int f;
5784         __be16 protocol = vlan_get_protocol(skb);
5785
5786         if (test_bit(__E1000_DOWN, &adapter->state)) {
5787                 dev_kfree_skb_any(skb);
5788                 return NETDEV_TX_OK;
5789         }
5790
5791         if (skb->len <= 0) {
5792                 dev_kfree_skb_any(skb);
5793                 return NETDEV_TX_OK;
5794         }
5795
5796         /* The minimum packet size with TCTL.PSP set is 17 bytes so
5797          * pad skb in order to meet this minimum size requirement
5798          */
5799         if (skb_put_padto(skb, 17))
5800                 return NETDEV_TX_OK;
5801
5802         mss = skb_shinfo(skb)->gso_size;
5803         if (mss) {
5804                 u8 hdr_len;
5805
5806                 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5807                  * points to just header, pull a few bytes of payload from
5808                  * frags into skb->data
5809                  */
5810                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5811                 /* we do this workaround for ES2LAN, but it is un-necessary,
5812                  * avoiding it could save a lot of cycles
5813                  */
5814                 if (skb->data_len && (hdr_len == len)) {
5815                         unsigned int pull_size;
5816
5817                         pull_size = min_t(unsigned int, 4, skb->data_len);
5818                         if (!__pskb_pull_tail(skb, pull_size)) {
5819                                 e_err("__pskb_pull_tail failed.\n");
5820                                 dev_kfree_skb_any(skb);
5821                                 return NETDEV_TX_OK;
5822                         }
5823                         len = skb_headlen(skb);
5824                 }
5825         }
5826
5827         /* reserve a descriptor for the offload context */
5828         if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5829                 count++;
5830         count++;
5831
5832         count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5833
5834         nr_frags = skb_shinfo(skb)->nr_frags;
5835         for (f = 0; f < nr_frags; f++)
5836                 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5837                                       adapter->tx_fifo_limit);
5838
5839         if (adapter->hw.mac.tx_pkt_filtering)
5840                 e1000_transfer_dhcp_info(adapter, skb);
5841
5842         /* need: count + 2 desc gap to keep tail from touching
5843          * head, otherwise try next time
5844          */
5845         if (e1000_maybe_stop_tx(tx_ring, count + 2))
5846                 return NETDEV_TX_BUSY;
5847
5848         if (skb_vlan_tag_present(skb)) {
5849                 tx_flags |= E1000_TX_FLAGS_VLAN;
5850                 tx_flags |= (skb_vlan_tag_get(skb) <<
5851                              E1000_TX_FLAGS_VLAN_SHIFT);
5852         }
5853
5854         first = tx_ring->next_to_use;
5855
5856         tso = e1000_tso(tx_ring, skb, protocol);
5857         if (tso < 0) {
5858                 dev_kfree_skb_any(skb);
5859                 return NETDEV_TX_OK;
5860         }
5861
5862         if (tso)
5863                 tx_flags |= E1000_TX_FLAGS_TSO;
5864         else if (e1000_tx_csum(tx_ring, skb, protocol))
5865                 tx_flags |= E1000_TX_FLAGS_CSUM;
5866
5867         /* Old method was to assume IPv4 packet by default if TSO was enabled.
5868          * 82571 hardware supports TSO capabilities for IPv6 as well...
5869          * no longer assume, we must.
5870          */
5871         if (protocol == htons(ETH_P_IP))
5872                 tx_flags |= E1000_TX_FLAGS_IPV4;
5873
5874         if (unlikely(skb->no_fcs))
5875                 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5876
5877         /* if count is 0 then mapping error has occurred */
5878         count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5879                              nr_frags);
5880         if (count) {
5881                 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5882                     (adapter->flags & FLAG_HAS_HW_TIMESTAMP)) {
5883                         if (!adapter->tx_hwtstamp_skb) {
5884                                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5885                                 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5886                                 adapter->tx_hwtstamp_skb = skb_get(skb);
5887                                 adapter->tx_hwtstamp_start = jiffies;
5888                                 schedule_work(&adapter->tx_hwtstamp_work);
5889                         } else {
5890                                 adapter->tx_hwtstamp_skipped++;
5891                         }
5892                 }
5893
5894                 skb_tx_timestamp(skb);
5895
5896                 netdev_sent_queue(netdev, skb->len);
5897                 e1000_tx_queue(tx_ring, tx_flags, count);
5898                 /* Make sure there is space in the ring for the next send. */
5899                 e1000_maybe_stop_tx(tx_ring,
5900                                     (MAX_SKB_FRAGS *
5901                                      DIV_ROUND_UP(PAGE_SIZE,
5902                                                   adapter->tx_fifo_limit) + 2));
5903
5904                 if (!skb->xmit_more ||
5905                     netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5906                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5907                                 e1000e_update_tdt_wa(tx_ring,
5908                                                      tx_ring->next_to_use);
5909                         else
5910                                 writel(tx_ring->next_to_use, tx_ring->tail);
5911
5912                         /* we need this if more than one processor can write
5913                          * to our tail at a time, it synchronizes IO on
5914                          *IA64/Altix systems
5915                          */
5916                         mmiowb();
5917                 }
5918         } else {
5919                 dev_kfree_skb_any(skb);
5920                 tx_ring->buffer_info[first].time_stamp = 0;
5921                 tx_ring->next_to_use = first;
5922         }
5923
5924         return NETDEV_TX_OK;
5925 }
5926
5927 /**
5928  * e1000_tx_timeout - Respond to a Tx Hang
5929  * @netdev: network interface device structure
5930  **/
5931 static void e1000_tx_timeout(struct net_device *netdev)
5932 {
5933         struct e1000_adapter *adapter = netdev_priv(netdev);
5934
5935         /* Do the reset outside of interrupt context */
5936         adapter->tx_timeout_count++;
5937         schedule_work(&adapter->reset_task);
5938 }
5939
5940 static void e1000_reset_task(struct work_struct *work)
5941 {
5942         struct e1000_adapter *adapter;
5943         adapter = container_of(work, struct e1000_adapter, reset_task);
5944
5945         rtnl_lock();
5946         /* don't run the task if already down */
5947         if (test_bit(__E1000_DOWN, &adapter->state)) {
5948                 rtnl_unlock();
5949                 return;
5950         }
5951
5952         if (!(adapter->flags & FLAG_RESTART_NOW)) {
5953                 e1000e_dump(adapter);
5954                 e_err("Reset adapter unexpectedly\n");
5955         }
5956         e1000e_reinit_locked(adapter);
5957         rtnl_unlock();
5958 }
5959
5960 /**
5961  * e1000_get_stats64 - Get System Network Statistics
5962  * @netdev: network interface device structure
5963  * @stats: rtnl_link_stats64 pointer
5964  *
5965  * Returns the address of the device statistics structure.
5966  **/
5967 void e1000e_get_stats64(struct net_device *netdev,
5968                         struct rtnl_link_stats64 *stats)
5969 {
5970         struct e1000_adapter *adapter = netdev_priv(netdev);
5971
5972         spin_lock(&adapter->stats64_lock);
5973         e1000e_update_stats(adapter);
5974         /* Fill out the OS statistics structure */
5975         stats->rx_bytes = adapter->stats.gorc;
5976         stats->rx_packets = adapter->stats.gprc;
5977         stats->tx_bytes = adapter->stats.gotc;
5978         stats->tx_packets = adapter->stats.gptc;
5979         stats->multicast = adapter->stats.mprc;
5980         stats->collisions = adapter->stats.colc;
5981
5982         /* Rx Errors */
5983
5984         /* RLEC on some newer hardware can be incorrect so build
5985          * our own version based on RUC and ROC
5986          */
5987         stats->rx_errors = adapter->stats.rxerrc +
5988             adapter->stats.crcerrs + adapter->stats.algnerrc +
5989             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5990         stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5991         stats->rx_crc_errors = adapter->stats.crcerrs;
5992         stats->rx_frame_errors = adapter->stats.algnerrc;
5993         stats->rx_missed_errors = adapter->stats.mpc;
5994
5995         /* Tx Errors */
5996         stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5997         stats->tx_aborted_errors = adapter->stats.ecol;
5998         stats->tx_window_errors = adapter->stats.latecol;
5999         stats->tx_carrier_errors = adapter->stats.tncrs;
6000
6001         /* Tx Dropped needs to be maintained elsewhere */
6002
6003         spin_unlock(&adapter->stats64_lock);
6004 }
6005
6006 /**
6007  * e1000_change_mtu - Change the Maximum Transfer Unit
6008  * @netdev: network interface device structure
6009  * @new_mtu: new value for maximum frame size
6010  *
6011  * Returns 0 on success, negative on failure
6012  **/
6013 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
6014 {
6015         struct e1000_adapter *adapter = netdev_priv(netdev);
6016         int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
6017
6018         /* Jumbo frame support */
6019         if ((new_mtu > ETH_DATA_LEN) &&
6020             !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
6021                 e_err("Jumbo Frames not supported.\n");
6022                 return -EINVAL;
6023         }
6024
6025         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6026         if ((adapter->hw.mac.type >= e1000_pch2lan) &&
6027             !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
6028             (new_mtu > ETH_DATA_LEN)) {
6029                 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
6030                 return -EINVAL;
6031         }
6032
6033         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
6034                 usleep_range(1000, 2000);
6035         /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
6036         adapter->max_frame_size = max_frame;
6037         e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6038         netdev->mtu = new_mtu;
6039
6040         pm_runtime_get_sync(netdev->dev.parent);
6041
6042         if (netif_running(netdev))
6043                 e1000e_down(adapter, true);
6044
6045         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
6046          * means we reserve 2 more, this pushes us to allocate from the next
6047          * larger slab size.
6048          * i.e. RXBUFFER_2048 --> size-4096 slab
6049          * However with the new *_jumbo_rx* routines, jumbo receives will use
6050          * fragmented skbs
6051          */
6052
6053         if (max_frame <= 2048)
6054                 adapter->rx_buffer_len = 2048;
6055         else
6056                 adapter->rx_buffer_len = 4096;
6057
6058         /* adjust allocation if LPE protects us, and we aren't using SBP */
6059         if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
6060                 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
6061
6062         if (netif_running(netdev))
6063                 e1000e_up(adapter);
6064         else
6065                 e1000e_reset(adapter);
6066
6067         pm_runtime_put_sync(netdev->dev.parent);
6068
6069         clear_bit(__E1000_RESETTING, &adapter->state);
6070
6071         return 0;
6072 }
6073
6074 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
6075                            int cmd)
6076 {
6077         struct e1000_adapter *adapter = netdev_priv(netdev);
6078         struct mii_ioctl_data *data = if_mii(ifr);
6079
6080         if (adapter->hw.phy.media_type != e1000_media_type_copper)
6081                 return -EOPNOTSUPP;
6082
6083         switch (cmd) {
6084         case SIOCGMIIPHY:
6085                 data->phy_id = adapter->hw.phy.addr;
6086                 break;
6087         case SIOCGMIIREG:
6088                 e1000_phy_read_status(adapter);
6089
6090                 switch (data->reg_num & 0x1F) {
6091                 case MII_BMCR:
6092                         data->val_out = adapter->phy_regs.bmcr;
6093                         break;
6094                 case MII_BMSR:
6095                         data->val_out = adapter->phy_regs.bmsr;
6096                         break;
6097                 case MII_PHYSID1:
6098                         data->val_out = (adapter->hw.phy.id >> 16);
6099                         break;
6100                 case MII_PHYSID2:
6101                         data->val_out = (adapter->hw.phy.id & 0xFFFF);
6102                         break;
6103                 case MII_ADVERTISE:
6104                         data->val_out = adapter->phy_regs.advertise;
6105                         break;
6106                 case MII_LPA:
6107                         data->val_out = adapter->phy_regs.lpa;
6108                         break;
6109                 case MII_EXPANSION:
6110                         data->val_out = adapter->phy_regs.expansion;
6111                         break;
6112                 case MII_CTRL1000:
6113                         data->val_out = adapter->phy_regs.ctrl1000;
6114                         break;
6115                 case MII_STAT1000:
6116                         data->val_out = adapter->phy_regs.stat1000;
6117                         break;
6118                 case MII_ESTATUS:
6119                         data->val_out = adapter->phy_regs.estatus;
6120                         break;
6121                 default:
6122                         return -EIO;
6123                 }
6124                 break;
6125         case SIOCSMIIREG:
6126         default:
6127                 return -EOPNOTSUPP;
6128         }
6129         return 0;
6130 }
6131
6132 /**
6133  * e1000e_hwtstamp_ioctl - control hardware time stamping
6134  * @netdev: network interface device structure
6135  * @ifreq: interface request
6136  *
6137  * Outgoing time stamping can be enabled and disabled. Play nice and
6138  * disable it when requested, although it shouldn't cause any overhead
6139  * when no packet needs it. At most one packet in the queue may be
6140  * marked for time stamping, otherwise it would be impossible to tell
6141  * for sure to which packet the hardware time stamp belongs.
6142  *
6143  * Incoming time stamping has to be configured via the hardware filters.
6144  * Not all combinations are supported, in particular event type has to be
6145  * specified. Matching the kind of event packet is not supported, with the
6146  * exception of "all V2 events regardless of level 2 or 4".
6147  **/
6148 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6149 {
6150         struct e1000_adapter *adapter = netdev_priv(netdev);
6151         struct hwtstamp_config config;
6152         int ret_val;
6153
6154         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6155                 return -EFAULT;
6156
6157         ret_val = e1000e_config_hwtstamp(adapter, &config);
6158         if (ret_val)
6159                 return ret_val;
6160
6161         switch (config.rx_filter) {
6162         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6163         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6164         case HWTSTAMP_FILTER_PTP_V2_SYNC:
6165         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6166         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6167         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6168                 /* With V2 type filters which specify a Sync or Delay Request,
6169                  * Path Delay Request/Response messages are also time stamped
6170                  * by hardware so notify the caller the requested packets plus
6171                  * some others are time stamped.
6172                  */
6173                 config.rx_filter = HWTSTAMP_FILTER_SOME;
6174                 break;
6175         default:
6176                 break;
6177         }
6178
6179         return copy_to_user(ifr->ifr_data, &config,
6180                             sizeof(config)) ? -EFAULT : 0;
6181 }
6182
6183 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6184 {
6185         struct e1000_adapter *adapter = netdev_priv(netdev);
6186
6187         return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6188                             sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6189 }
6190
6191 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6192 {
6193         switch (cmd) {
6194         case SIOCGMIIPHY:
6195         case SIOCGMIIREG:
6196         case SIOCSMIIREG:
6197                 return e1000_mii_ioctl(netdev, ifr, cmd);
6198         case SIOCSHWTSTAMP:
6199                 return e1000e_hwtstamp_set(netdev, ifr);
6200         case SIOCGHWTSTAMP:
6201                 return e1000e_hwtstamp_get(netdev, ifr);
6202         default:
6203                 return -EOPNOTSUPP;
6204         }
6205 }
6206
6207 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6208 {
6209         struct e1000_hw *hw = &adapter->hw;
6210         u32 i, mac_reg, wuc;
6211         u16 phy_reg, wuc_enable;
6212         int retval;
6213
6214         /* copy MAC RARs to PHY RARs */
6215         e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6216
6217         retval = hw->phy.ops.acquire(hw);
6218         if (retval) {
6219                 e_err("Could not acquire PHY\n");
6220                 return retval;
6221         }
6222
6223         /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6224         retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6225         if (retval)
6226                 goto release;
6227
6228         /* copy MAC MTA to PHY MTA - only needed for pchlan */
6229         for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6230                 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6231                 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6232                                            (u16)(mac_reg & 0xFFFF));
6233                 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6234                                            (u16)((mac_reg >> 16) & 0xFFFF));
6235         }
6236
6237         /* configure PHY Rx Control register */
6238         hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6239         mac_reg = er32(RCTL);
6240         if (mac_reg & E1000_RCTL_UPE)
6241                 phy_reg |= BM_RCTL_UPE;
6242         if (mac_reg & E1000_RCTL_MPE)
6243                 phy_reg |= BM_RCTL_MPE;
6244         phy_reg &= ~(BM_RCTL_MO_MASK);
6245         if (mac_reg & E1000_RCTL_MO_3)
6246                 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6247                             << BM_RCTL_MO_SHIFT);
6248         if (mac_reg & E1000_RCTL_BAM)
6249                 phy_reg |= BM_RCTL_BAM;
6250         if (mac_reg & E1000_RCTL_PMCF)
6251                 phy_reg |= BM_RCTL_PMCF;
6252         mac_reg = er32(CTRL);
6253         if (mac_reg & E1000_CTRL_RFCE)
6254                 phy_reg |= BM_RCTL_RFCE;
6255         hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6256
6257         wuc = E1000_WUC_PME_EN;
6258         if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6259                 wuc |= E1000_WUC_APME;
6260
6261         /* enable PHY wakeup in MAC register */
6262         ew32(WUFC, wufc);
6263         ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6264                    E1000_WUC_PME_STATUS | wuc));
6265
6266         /* configure and enable PHY wakeup in PHY registers */
6267         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6268         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6269
6270         /* activate PHY wakeup */
6271         wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6272         retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6273         if (retval)
6274                 e_err("Could not set PHY Host Wakeup bit\n");
6275 release:
6276         hw->phy.ops.release(hw);
6277
6278         return retval;
6279 }
6280
6281 static void e1000e_flush_lpic(struct pci_dev *pdev)
6282 {
6283         struct net_device *netdev = pci_get_drvdata(pdev);
6284         struct e1000_adapter *adapter = netdev_priv(netdev);
6285         struct e1000_hw *hw = &adapter->hw;
6286         u32 ret_val;
6287
6288         pm_runtime_get_sync(netdev->dev.parent);
6289
6290         ret_val = hw->phy.ops.acquire(hw);
6291         if (ret_val)
6292                 goto fl_out;
6293
6294         pr_info("EEE TX LPI TIMER: %08X\n",
6295                 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6296
6297         hw->phy.ops.release(hw);
6298
6299 fl_out:
6300         pm_runtime_put_sync(netdev->dev.parent);
6301 }
6302
6303 static int e1000e_pm_freeze(struct device *dev)
6304 {
6305         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6306         struct e1000_adapter *adapter = netdev_priv(netdev);
6307
6308         netif_device_detach(netdev);
6309
6310         if (netif_running(netdev)) {
6311                 int count = E1000_CHECK_RESET_COUNT;
6312
6313                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6314                         usleep_range(10000, 20000);
6315
6316                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6317
6318                 /* Quiesce the device without resetting the hardware */
6319                 e1000e_down(adapter, false);
6320                 e1000_free_irq(adapter);
6321         }
6322         e1000e_reset_interrupt_capability(adapter);
6323
6324         /* Allow time for pending master requests to run */
6325         e1000e_disable_pcie_master(&adapter->hw);
6326
6327         return 0;
6328 }
6329
6330 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6331 {
6332         struct net_device *netdev = pci_get_drvdata(pdev);
6333         struct e1000_adapter *adapter = netdev_priv(netdev);
6334         struct e1000_hw *hw = &adapter->hw;
6335         u32 ctrl, ctrl_ext, rctl, status, wufc;
6336         int retval = 0;
6337
6338         /* Runtime suspend should only enable wakeup for link changes */
6339         if (runtime)
6340                 wufc = E1000_WUFC_LNKC;
6341         else if (device_may_wakeup(&pdev->dev))
6342                 wufc = adapter->wol;
6343         else
6344                 wufc = 0;
6345
6346         status = er32(STATUS);
6347         if (status & E1000_STATUS_LU)
6348                 wufc &= ~E1000_WUFC_LNKC;
6349
6350         if (wufc) {
6351                 e1000_setup_rctl(adapter);
6352                 e1000e_set_rx_mode(netdev);
6353
6354                 /* turn on all-multi mode if wake on multicast is enabled */
6355                 if (wufc & E1000_WUFC_MC) {
6356                         rctl = er32(RCTL);
6357                         rctl |= E1000_RCTL_MPE;
6358                         ew32(RCTL, rctl);
6359                 }
6360
6361                 ctrl = er32(CTRL);
6362                 ctrl |= E1000_CTRL_ADVD3WUC;
6363                 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6364                         ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6365                 ew32(CTRL, ctrl);
6366
6367                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6368                     adapter->hw.phy.media_type ==
6369                     e1000_media_type_internal_serdes) {
6370                         /* keep the laser running in D3 */
6371                         ctrl_ext = er32(CTRL_EXT);
6372                         ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6373                         ew32(CTRL_EXT, ctrl_ext);
6374                 }
6375
6376                 if (!runtime)
6377                         e1000e_power_up_phy(adapter);
6378
6379                 if (adapter->flags & FLAG_IS_ICH)
6380                         e1000_suspend_workarounds_ich8lan(&adapter->hw);
6381
6382                 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6383                         /* enable wakeup by the PHY */
6384                         retval = e1000_init_phy_wakeup(adapter, wufc);
6385                         if (retval)
6386                                 return retval;
6387                 } else {
6388                         /* enable wakeup by the MAC */
6389                         ew32(WUFC, wufc);
6390                         ew32(WUC, E1000_WUC_PME_EN);
6391                 }
6392         } else {
6393                 ew32(WUC, 0);
6394                 ew32(WUFC, 0);
6395
6396                 e1000_power_down_phy(adapter);
6397         }
6398
6399         if (adapter->hw.phy.type == e1000_phy_igp_3) {
6400                 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6401         } else if (hw->mac.type >= e1000_pch_lpt) {
6402                 if (wufc && !(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6403                         /* ULP does not support wake from unicast, multicast
6404                          * or broadcast.
6405                          */
6406                         retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6407
6408                 if (retval)
6409                         return retval;
6410         }
6411
6412         /* Ensure that the appropriate bits are set in LPI_CTRL
6413          * for EEE in Sx
6414          */
6415         if ((hw->phy.type >= e1000_phy_i217) &&
6416             adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6417                 u16 lpi_ctrl = 0;
6418
6419                 retval = hw->phy.ops.acquire(hw);
6420                 if (!retval) {
6421                         retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6422                                                  &lpi_ctrl);
6423                         if (!retval) {
6424                                 if (adapter->eee_advert &
6425                                     hw->dev_spec.ich8lan.eee_lp_ability &
6426                                     I82579_EEE_100_SUPPORTED)
6427                                         lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6428                                 if (adapter->eee_advert &
6429                                     hw->dev_spec.ich8lan.eee_lp_ability &
6430                                     I82579_EEE_1000_SUPPORTED)
6431                                         lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6432
6433                                 retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6434                                                          lpi_ctrl);
6435                         }
6436                 }
6437                 hw->phy.ops.release(hw);
6438         }
6439
6440         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
6441          * would have already happened in close and is redundant.
6442          */
6443         e1000e_release_hw_control(adapter);
6444
6445         pci_clear_master(pdev);
6446
6447         /* The pci-e switch on some quad port adapters will report a
6448          * correctable error when the MAC transitions from D0 to D3.  To
6449          * prevent this we need to mask off the correctable errors on the
6450          * downstream port of the pci-e switch.
6451          *
6452          * We don't have the associated upstream bridge while assigning
6453          * the PCI device into guest. For example, the KVM on power is
6454          * one of the cases.
6455          */
6456         if (adapter->flags & FLAG_IS_QUAD_PORT) {
6457                 struct pci_dev *us_dev = pdev->bus->self;
6458                 u16 devctl;
6459
6460                 if (!us_dev)
6461                         return 0;
6462
6463                 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6464                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6465                                            (devctl & ~PCI_EXP_DEVCTL_CERE));
6466
6467                 pci_save_state(pdev);
6468                 pci_prepare_to_sleep(pdev);
6469
6470                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6471         }
6472
6473         return 0;
6474 }
6475
6476 /**
6477  * __e1000e_disable_aspm - Disable ASPM states
6478  * @pdev: pointer to PCI device struct
6479  * @state: bit-mask of ASPM states to disable
6480  * @locked: indication if this context holds pci_bus_sem locked.
6481  *
6482  * Some devices *must* have certain ASPM states disabled per hardware errata.
6483  **/
6484 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6485 {
6486         struct pci_dev *parent = pdev->bus->self;
6487         u16 aspm_dis_mask = 0;
6488         u16 pdev_aspmc, parent_aspmc;
6489
6490         switch (state) {
6491         case PCIE_LINK_STATE_L0S:
6492         case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6493                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6494                 /* fall-through - can't have L1 without L0s */
6495         case PCIE_LINK_STATE_L1:
6496                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6497                 break;
6498         default:
6499                 return;
6500         }
6501
6502         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6503         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6504
6505         if (parent) {
6506                 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6507                                           &parent_aspmc);
6508                 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6509         }
6510
6511         /* Nothing to do if the ASPM states to be disabled already are */
6512         if (!(pdev_aspmc & aspm_dis_mask) &&
6513             (!parent || !(parent_aspmc & aspm_dis_mask)))
6514                 return;
6515
6516         dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6517                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6518                  "L0s" : "",
6519                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6520                  "L1" : "");
6521
6522 #ifdef CONFIG_PCIEASPM
6523         if (locked)
6524                 pci_disable_link_state_locked(pdev, state);
6525         else
6526                 pci_disable_link_state(pdev, state);
6527
6528         /* Double-check ASPM control.  If not disabled by the above, the
6529          * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6530          * not enabled); override by writing PCI config space directly.
6531          */
6532         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6533         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6534
6535         if (!(aspm_dis_mask & pdev_aspmc))
6536                 return;
6537 #endif
6538
6539         /* Both device and parent should have the same ASPM setting.
6540          * Disable ASPM in downstream component first and then upstream.
6541          */
6542         pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6543
6544         if (parent)
6545                 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6546                                            aspm_dis_mask);
6547 }
6548
6549 /**
6550  * e1000e_disable_aspm - Disable ASPM states.
6551  * @pdev: pointer to PCI device struct
6552  * @state: bit-mask of ASPM states to disable
6553  *
6554  * This function acquires the pci_bus_sem!
6555  * Some devices *must* have certain ASPM states disabled per hardware errata.
6556  **/
6557 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6558 {
6559         __e1000e_disable_aspm(pdev, state, 0);
6560 }
6561
6562 /**
6563  * e1000e_disable_aspm_locked   Disable ASPM states.
6564  * @pdev: pointer to PCI device struct
6565  * @state: bit-mask of ASPM states to disable
6566  *
6567  * This function must be called with pci_bus_sem acquired!
6568  * Some devices *must* have certain ASPM states disabled per hardware errata.
6569  **/
6570 static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6571 {
6572         __e1000e_disable_aspm(pdev, state, 1);
6573 }
6574
6575 #ifdef CONFIG_PM
6576 static int __e1000_resume(struct pci_dev *pdev)
6577 {
6578         struct net_device *netdev = pci_get_drvdata(pdev);
6579         struct e1000_adapter *adapter = netdev_priv(netdev);
6580         struct e1000_hw *hw = &adapter->hw;
6581         u16 aspm_disable_flag = 0;
6582
6583         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6584                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6585         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6586                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6587         if (aspm_disable_flag)
6588                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6589
6590         pci_set_master(pdev);
6591
6592         if (hw->mac.type >= e1000_pch2lan)
6593                 e1000_resume_workarounds_pchlan(&adapter->hw);
6594
6595         e1000e_power_up_phy(adapter);
6596
6597         /* report the system wakeup cause from S3/S4 */
6598         if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6599                 u16 phy_data;
6600
6601                 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6602                 if (phy_data) {
6603                         e_info("PHY Wakeup cause - %s\n",
6604                                phy_data & E1000_WUS_EX ? "Unicast Packet" :
6605                                phy_data & E1000_WUS_MC ? "Multicast Packet" :
6606                                phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6607                                phy_data & E1000_WUS_MAG ? "Magic Packet" :
6608                                phy_data & E1000_WUS_LNKC ?
6609                                "Link Status Change" : "other");
6610                 }
6611                 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6612         } else {
6613                 u32 wus = er32(WUS);
6614
6615                 if (wus) {
6616                         e_info("MAC Wakeup cause - %s\n",
6617                                wus & E1000_WUS_EX ? "Unicast Packet" :
6618                                wus & E1000_WUS_MC ? "Multicast Packet" :
6619                                wus & E1000_WUS_BC ? "Broadcast Packet" :
6620                                wus & E1000_WUS_MAG ? "Magic Packet" :
6621                                wus & E1000_WUS_LNKC ? "Link Status Change" :
6622                                "other");
6623                 }
6624                 ew32(WUS, ~0);
6625         }
6626
6627         e1000e_reset(adapter);
6628
6629         e1000_init_manageability_pt(adapter);
6630
6631         /* If the controller has AMT, do not set DRV_LOAD until the interface
6632          * is up.  For all other cases, let the f/w know that the h/w is now
6633          * under the control of the driver.
6634          */
6635         if (!(adapter->flags & FLAG_HAS_AMT))
6636                 e1000e_get_hw_control(adapter);
6637
6638         return 0;
6639 }
6640
6641 #ifdef CONFIG_PM_SLEEP
6642 static int e1000e_pm_thaw(struct device *dev)
6643 {
6644         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6645         struct e1000_adapter *adapter = netdev_priv(netdev);
6646
6647         e1000e_set_interrupt_capability(adapter);
6648         if (netif_running(netdev)) {
6649                 u32 err = e1000_request_irq(adapter);
6650
6651                 if (err)
6652                         return err;
6653
6654                 e1000e_up(adapter);
6655         }
6656
6657         netif_device_attach(netdev);
6658
6659         return 0;
6660 }
6661
6662 static int e1000e_pm_suspend(struct device *dev)
6663 {
6664         struct pci_dev *pdev = to_pci_dev(dev);
6665         int rc;
6666
6667         e1000e_flush_lpic(pdev);
6668
6669         e1000e_pm_freeze(dev);
6670
6671         rc = __e1000_shutdown(pdev, false);
6672         if (rc)
6673                 e1000e_pm_thaw(dev);
6674
6675         return rc;
6676 }
6677
6678 static int e1000e_pm_resume(struct device *dev)
6679 {
6680         struct pci_dev *pdev = to_pci_dev(dev);
6681         int rc;
6682
6683         rc = __e1000_resume(pdev);
6684         if (rc)
6685                 return rc;
6686
6687         return e1000e_pm_thaw(dev);
6688 }
6689 #endif /* CONFIG_PM_SLEEP */
6690
6691 static int e1000e_pm_runtime_idle(struct device *dev)
6692 {
6693         struct pci_dev *pdev = to_pci_dev(dev);
6694         struct net_device *netdev = pci_get_drvdata(pdev);
6695         struct e1000_adapter *adapter = netdev_priv(netdev);
6696         u16 eee_lp;
6697
6698         eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
6699
6700         if (!e1000e_has_link(adapter)) {
6701                 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
6702                 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
6703         }
6704
6705         return -EBUSY;
6706 }
6707
6708 static int e1000e_pm_runtime_resume(struct device *dev)
6709 {
6710         struct pci_dev *pdev = to_pci_dev(dev);
6711         struct net_device *netdev = pci_get_drvdata(pdev);
6712         struct e1000_adapter *adapter = netdev_priv(netdev);
6713         int rc;
6714
6715         rc = __e1000_resume(pdev);
6716         if (rc)
6717                 return rc;
6718
6719         if (netdev->flags & IFF_UP)
6720                 e1000e_up(adapter);
6721
6722         return rc;
6723 }
6724
6725 static int e1000e_pm_runtime_suspend(struct device *dev)
6726 {
6727         struct pci_dev *pdev = to_pci_dev(dev);
6728         struct net_device *netdev = pci_get_drvdata(pdev);
6729         struct e1000_adapter *adapter = netdev_priv(netdev);
6730
6731         if (netdev->flags & IFF_UP) {
6732                 int count = E1000_CHECK_RESET_COUNT;
6733
6734                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6735                         usleep_range(10000, 20000);
6736
6737                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6738
6739                 /* Down the device without resetting the hardware */
6740                 e1000e_down(adapter, false);
6741         }
6742
6743         if (__e1000_shutdown(pdev, true)) {
6744                 e1000e_pm_runtime_resume(dev);
6745                 return -EBUSY;
6746         }
6747
6748         return 0;
6749 }
6750 #endif /* CONFIG_PM */
6751
6752 static void e1000_shutdown(struct pci_dev *pdev)
6753 {
6754         e1000e_flush_lpic(pdev);
6755
6756         e1000e_pm_freeze(&pdev->dev);
6757
6758         __e1000_shutdown(pdev, false);
6759 }
6760
6761 #ifdef CONFIG_NET_POLL_CONTROLLER
6762
6763 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
6764 {
6765         struct net_device *netdev = data;
6766         struct e1000_adapter *adapter = netdev_priv(netdev);
6767
6768         if (adapter->msix_entries) {
6769                 int vector, msix_irq;
6770
6771                 vector = 0;
6772                 msix_irq = adapter->msix_entries[vector].vector;
6773                 if (disable_hardirq(msix_irq))
6774                         e1000_intr_msix_rx(msix_irq, netdev);
6775                 enable_irq(msix_irq);
6776
6777                 vector++;
6778                 msix_irq = adapter->msix_entries[vector].vector;
6779                 if (disable_hardirq(msix_irq))
6780                         e1000_intr_msix_tx(msix_irq, netdev);
6781                 enable_irq(msix_irq);
6782
6783                 vector++;
6784                 msix_irq = adapter->msix_entries[vector].vector;
6785                 if (disable_hardirq(msix_irq))
6786                         e1000_msix_other(msix_irq, netdev);
6787                 enable_irq(msix_irq);
6788         }
6789
6790         return IRQ_HANDLED;
6791 }
6792
6793 /**
6794  * e1000_netpoll
6795  * @netdev: network interface device structure
6796  *
6797  * Polling 'interrupt' - used by things like netconsole to send skbs
6798  * without having to re-enable interrupts. It's not called while
6799  * the interrupt routine is executing.
6800  */
6801 static void e1000_netpoll(struct net_device *netdev)
6802 {
6803         struct e1000_adapter *adapter = netdev_priv(netdev);
6804
6805         switch (adapter->int_mode) {
6806         case E1000E_INT_MODE_MSIX:
6807                 e1000_intr_msix(adapter->pdev->irq, netdev);
6808                 break;
6809         case E1000E_INT_MODE_MSI:
6810                 if (disable_hardirq(adapter->pdev->irq))
6811                         e1000_intr_msi(adapter->pdev->irq, netdev);
6812                 enable_irq(adapter->pdev->irq);
6813                 break;
6814         default:                /* E1000E_INT_MODE_LEGACY */
6815                 if (disable_hardirq(adapter->pdev->irq))
6816                         e1000_intr(adapter->pdev->irq, netdev);
6817                 enable_irq(adapter->pdev->irq);
6818                 break;
6819         }
6820 }
6821 #endif
6822
6823 /**
6824  * e1000_io_error_detected - called when PCI error is detected
6825  * @pdev: Pointer to PCI device
6826  * @state: The current pci connection state
6827  *
6828  * This function is called after a PCI bus error affecting
6829  * this device has been detected.
6830  */
6831 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
6832                                                 pci_channel_state_t state)
6833 {
6834         struct net_device *netdev = pci_get_drvdata(pdev);
6835         struct e1000_adapter *adapter = netdev_priv(netdev);
6836
6837         netif_device_detach(netdev);
6838
6839         if (state == pci_channel_io_perm_failure)
6840                 return PCI_ERS_RESULT_DISCONNECT;
6841
6842         if (netif_running(netdev))
6843                 e1000e_down(adapter, true);
6844         pci_disable_device(pdev);
6845
6846         /* Request a slot slot reset. */
6847         return PCI_ERS_RESULT_NEED_RESET;
6848 }
6849
6850 /**
6851  * e1000_io_slot_reset - called after the pci bus has been reset.
6852  * @pdev: Pointer to PCI device
6853  *
6854  * Restart the card from scratch, as if from a cold-boot. Implementation
6855  * resembles the first-half of the e1000e_pm_resume routine.
6856  */
6857 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
6858 {
6859         struct net_device *netdev = pci_get_drvdata(pdev);
6860         struct e1000_adapter *adapter = netdev_priv(netdev);
6861         struct e1000_hw *hw = &adapter->hw;
6862         u16 aspm_disable_flag = 0;
6863         int err;
6864         pci_ers_result_t result;
6865
6866         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6867                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6868         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6869                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6870         if (aspm_disable_flag)
6871                 e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
6872
6873         err = pci_enable_device_mem(pdev);
6874         if (err) {
6875                 dev_err(&pdev->dev,
6876                         "Cannot re-enable PCI device after reset.\n");
6877                 result = PCI_ERS_RESULT_DISCONNECT;
6878         } else {
6879                 pdev->state_saved = true;
6880                 pci_restore_state(pdev);
6881                 pci_set_master(pdev);
6882
6883                 pci_enable_wake(pdev, PCI_D3hot, 0);
6884                 pci_enable_wake(pdev, PCI_D3cold, 0);
6885
6886                 e1000e_reset(adapter);
6887                 ew32(WUS, ~0);
6888                 result = PCI_ERS_RESULT_RECOVERED;
6889         }
6890
6891         pci_cleanup_aer_uncorrect_error_status(pdev);
6892
6893         return result;
6894 }
6895
6896 /**
6897  * e1000_io_resume - called when traffic can start flowing again.
6898  * @pdev: Pointer to PCI device
6899  *
6900  * This callback is called when the error recovery driver tells us that
6901  * its OK to resume normal operation. Implementation resembles the
6902  * second-half of the e1000e_pm_resume routine.
6903  */
6904 static void e1000_io_resume(struct pci_dev *pdev)
6905 {
6906         struct net_device *netdev = pci_get_drvdata(pdev);
6907         struct e1000_adapter *adapter = netdev_priv(netdev);
6908
6909         e1000_init_manageability_pt(adapter);
6910
6911         if (netif_running(netdev))
6912                 e1000e_up(adapter);
6913
6914         netif_device_attach(netdev);
6915
6916         /* If the controller has AMT, do not set DRV_LOAD until the interface
6917          * is up.  For all other cases, let the f/w know that the h/w is now
6918          * under the control of the driver.
6919          */
6920         if (!(adapter->flags & FLAG_HAS_AMT))
6921                 e1000e_get_hw_control(adapter);
6922 }
6923
6924 static void e1000_print_device_info(struct e1000_adapter *adapter)
6925 {
6926         struct e1000_hw *hw = &adapter->hw;
6927         struct net_device *netdev = adapter->netdev;
6928         u32 ret_val;
6929         u8 pba_str[E1000_PBANUM_LENGTH];
6930
6931         /* print bus type/speed/width info */
6932         e_info("(PCI Express:2.5GT/s:%s) %pM\n",
6933                /* bus width */
6934                ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
6935                 "Width x1"),
6936                /* MAC address */
6937                netdev->dev_addr);
6938         e_info("Intel(R) PRO/%s Network Connection\n",
6939                (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
6940         ret_val = e1000_read_pba_string_generic(hw, pba_str,
6941                                                 E1000_PBANUM_LENGTH);
6942         if (ret_val)
6943                 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
6944         e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6945                hw->mac.type, hw->phy.type, pba_str);
6946 }
6947
6948 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6949 {
6950         struct e1000_hw *hw = &adapter->hw;
6951         int ret_val;
6952         u16 buf = 0;
6953
6954         if (hw->mac.type != e1000_82573)
6955                 return;
6956
6957         ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
6958         le16_to_cpus(&buf);
6959         if (!ret_val && (!(buf & BIT(0)))) {
6960                 /* Deep Smart Power Down (DSPD) */
6961                 dev_warn(&adapter->pdev->dev,
6962                          "Warning: detected DSPD enabled in EEPROM\n");
6963         }
6964 }
6965
6966 static netdev_features_t e1000_fix_features(struct net_device *netdev,
6967                                             netdev_features_t features)
6968 {
6969         struct e1000_adapter *adapter = netdev_priv(netdev);
6970         struct e1000_hw *hw = &adapter->hw;
6971
6972         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6973         if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
6974                 features &= ~NETIF_F_RXFCS;
6975
6976         /* Since there is no support for separate Rx/Tx vlan accel
6977          * enable/disable make sure Tx flag is always in same state as Rx.
6978          */
6979         if (features & NETIF_F_HW_VLAN_CTAG_RX)
6980                 features |= NETIF_F_HW_VLAN_CTAG_TX;
6981         else
6982                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
6983
6984         return features;
6985 }
6986
6987 static int e1000_set_features(struct net_device *netdev,
6988                               netdev_features_t features)
6989 {
6990         struct e1000_adapter *adapter = netdev_priv(netdev);
6991         netdev_features_t changed = features ^ netdev->features;
6992
6993         if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6994                 adapter->flags |= FLAG_TSO_FORCE;
6995
6996         if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
6997                          NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6998                          NETIF_F_RXALL)))
6999                 return 0;
7000
7001         if (changed & NETIF_F_RXFCS) {
7002                 if (features & NETIF_F_RXFCS) {
7003                         adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7004                 } else {
7005                         /* We need to take it back to defaults, which might mean
7006                          * stripping is still disabled at the adapter level.
7007                          */
7008                         if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
7009                                 adapter->flags2 |= FLAG2_CRC_STRIPPING;
7010                         else
7011                                 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7012                 }
7013         }
7014
7015         netdev->features = features;
7016
7017         if (netif_running(netdev))
7018                 e1000e_reinit_locked(adapter);
7019         else
7020                 e1000e_reset(adapter);
7021
7022         return 0;
7023 }
7024
7025 static const struct net_device_ops e1000e_netdev_ops = {
7026         .ndo_open               = e1000e_open,
7027         .ndo_stop               = e1000e_close,
7028         .ndo_start_xmit         = e1000_xmit_frame,
7029         .ndo_get_stats64        = e1000e_get_stats64,
7030         .ndo_set_rx_mode        = e1000e_set_rx_mode,
7031         .ndo_set_mac_address    = e1000_set_mac,
7032         .ndo_change_mtu         = e1000_change_mtu,
7033         .ndo_do_ioctl           = e1000_ioctl,
7034         .ndo_tx_timeout         = e1000_tx_timeout,
7035         .ndo_validate_addr      = eth_validate_addr,
7036
7037         .ndo_vlan_rx_add_vid    = e1000_vlan_rx_add_vid,
7038         .ndo_vlan_rx_kill_vid   = e1000_vlan_rx_kill_vid,
7039 #ifdef CONFIG_NET_POLL_CONTROLLER
7040         .ndo_poll_controller    = e1000_netpoll,
7041 #endif
7042         .ndo_set_features = e1000_set_features,
7043         .ndo_fix_features = e1000_fix_features,
7044         .ndo_features_check     = passthru_features_check,
7045 };
7046
7047 /**
7048  * e1000_probe - Device Initialization Routine
7049  * @pdev: PCI device information struct
7050  * @ent: entry in e1000_pci_tbl
7051  *
7052  * Returns 0 on success, negative on failure
7053  *
7054  * e1000_probe initializes an adapter identified by a pci_dev structure.
7055  * The OS initialization, configuring of the adapter private structure,
7056  * and a hardware reset occur.
7057  **/
7058 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7059 {
7060         struct net_device *netdev;
7061         struct e1000_adapter *adapter;
7062         struct e1000_hw *hw;
7063         const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
7064         resource_size_t mmio_start, mmio_len;
7065         resource_size_t flash_start, flash_len;
7066         static int cards_found;
7067         u16 aspm_disable_flag = 0;
7068         int bars, i, err, pci_using_dac;
7069         u16 eeprom_data = 0;
7070         u16 eeprom_apme_mask = E1000_EEPROM_APME;
7071         s32 ret_val = 0;
7072
7073         if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
7074                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7075         if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
7076                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7077         if (aspm_disable_flag)
7078                 e1000e_disable_aspm(pdev, aspm_disable_flag);
7079
7080         err = pci_enable_device_mem(pdev);
7081         if (err)
7082                 return err;
7083
7084         pci_using_dac = 0;
7085         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7086         if (!err) {
7087                 pci_using_dac = 1;
7088         } else {
7089                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7090                 if (err) {
7091                         dev_err(&pdev->dev,
7092                                 "No usable DMA configuration, aborting\n");
7093                         goto err_dma;
7094                 }
7095         }
7096
7097         bars = pci_select_bars(pdev, IORESOURCE_MEM);
7098         err = pci_request_selected_regions_exclusive(pdev, bars,
7099                                                      e1000e_driver_name);
7100         if (err)
7101                 goto err_pci_reg;
7102
7103         /* AER (Advanced Error Reporting) hooks */
7104         pci_enable_pcie_error_reporting(pdev);
7105
7106         pci_set_master(pdev);
7107         /* PCI config space info */
7108         err = pci_save_state(pdev);
7109         if (err)
7110                 goto err_alloc_etherdev;
7111
7112         err = -ENOMEM;
7113         netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7114         if (!netdev)
7115                 goto err_alloc_etherdev;
7116
7117         SET_NETDEV_DEV(netdev, &pdev->dev);
7118
7119         netdev->irq = pdev->irq;
7120
7121         pci_set_drvdata(pdev, netdev);
7122         adapter = netdev_priv(netdev);
7123         hw = &adapter->hw;
7124         adapter->netdev = netdev;
7125         adapter->pdev = pdev;
7126         adapter->ei = ei;
7127         adapter->pba = ei->pba;
7128         adapter->flags = ei->flags;
7129         adapter->flags2 = ei->flags2;
7130         adapter->hw.adapter = adapter;
7131         adapter->hw.mac.type = ei->mac;
7132         adapter->max_hw_frame_size = ei->max_hw_frame_size;
7133         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7134
7135         mmio_start = pci_resource_start(pdev, 0);
7136         mmio_len = pci_resource_len(pdev, 0);
7137
7138         err = -EIO;
7139         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7140         if (!adapter->hw.hw_addr)
7141                 goto err_ioremap;
7142
7143         if ((adapter->flags & FLAG_HAS_FLASH) &&
7144             (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7145             (hw->mac.type < e1000_pch_spt)) {
7146                 flash_start = pci_resource_start(pdev, 1);
7147                 flash_len = pci_resource_len(pdev, 1);
7148                 adapter->hw.flash_address = ioremap(flash_start, flash_len);
7149                 if (!adapter->hw.flash_address)
7150                         goto err_flashmap;
7151         }
7152
7153         /* Set default EEE advertisement */
7154         if (adapter->flags2 & FLAG2_HAS_EEE)
7155                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7156
7157         /* construct the net_device struct */
7158         netdev->netdev_ops = &e1000e_netdev_ops;
7159         e1000e_set_ethtool_ops(netdev);
7160         netdev->watchdog_timeo = 5 * HZ;
7161         netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
7162         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7163
7164         netdev->mem_start = mmio_start;
7165         netdev->mem_end = mmio_start + mmio_len;
7166
7167         adapter->bd_number = cards_found++;
7168
7169         e1000e_check_options(adapter);
7170
7171         /* setup adapter struct */
7172         err = e1000_sw_init(adapter);
7173         if (err)
7174                 goto err_sw_init;
7175
7176         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7177         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7178         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7179
7180         err = ei->get_variants(adapter);
7181         if (err)
7182                 goto err_hw_init;
7183
7184         if ((adapter->flags & FLAG_IS_ICH) &&
7185             (adapter->flags & FLAG_READ_ONLY_NVM) &&
7186             (hw->mac.type < e1000_pch_spt))
7187                 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7188
7189         hw->mac.ops.get_bus_info(&adapter->hw);
7190
7191         adapter->hw.phy.autoneg_wait_to_complete = 0;
7192
7193         /* Copper options */
7194         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7195                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7196                 adapter->hw.phy.disable_polarity_correction = 0;
7197                 adapter->hw.phy.ms_type = e1000_ms_hw_default;
7198         }
7199
7200         if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7201                 dev_info(&pdev->dev,
7202                          "PHY reset is blocked due to SOL/IDER session.\n");
7203
7204         /* Set initial default active device features */
7205         netdev->features = (NETIF_F_SG |
7206                             NETIF_F_HW_VLAN_CTAG_RX |
7207                             NETIF_F_HW_VLAN_CTAG_TX |
7208                             NETIF_F_TSO |
7209                             NETIF_F_TSO6 |
7210                             NETIF_F_RXHASH |
7211                             NETIF_F_RXCSUM |
7212                             NETIF_F_HW_CSUM);
7213
7214         /* Set user-changeable features (subset of all device features) */
7215         netdev->hw_features = netdev->features;
7216         netdev->hw_features |= NETIF_F_RXFCS;
7217         netdev->priv_flags |= IFF_SUPP_NOFCS;
7218         netdev->hw_features |= NETIF_F_RXALL;
7219
7220         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7221                 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7222
7223         netdev->vlan_features |= (NETIF_F_SG |
7224                                   NETIF_F_TSO |
7225                                   NETIF_F_TSO6 |
7226                                   NETIF_F_HW_CSUM);
7227
7228         netdev->priv_flags |= IFF_UNICAST_FLT;
7229
7230         if (pci_using_dac) {
7231                 netdev->features |= NETIF_F_HIGHDMA;
7232                 netdev->vlan_features |= NETIF_F_HIGHDMA;
7233         }
7234
7235         /* MTU range: 68 - max_hw_frame_size */
7236         netdev->min_mtu = ETH_MIN_MTU;
7237         netdev->max_mtu = adapter->max_hw_frame_size -
7238                           (VLAN_ETH_HLEN + ETH_FCS_LEN);
7239
7240         if (e1000e_enable_mng_pass_thru(&adapter->hw))
7241                 adapter->flags |= FLAG_MNG_PT_ENABLED;
7242
7243         /* before reading the NVM, reset the controller to
7244          * put the device in a known good starting state
7245          */
7246         adapter->hw.mac.ops.reset_hw(&adapter->hw);
7247
7248         /* systems with ASPM and others may see the checksum fail on the first
7249          * attempt. Let's give it a few tries
7250          */
7251         for (i = 0;; i++) {
7252                 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7253                         break;
7254                 if (i == 2) {
7255                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7256                         err = -EIO;
7257                         goto err_eeprom;
7258                 }
7259         }
7260
7261         e1000_eeprom_checks(adapter);
7262
7263         /* copy the MAC address */
7264         if (e1000e_read_mac_addr(&adapter->hw))
7265                 dev_err(&pdev->dev,
7266                         "NVM Read Error while reading MAC address\n");
7267
7268         memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
7269
7270         if (!is_valid_ether_addr(netdev->dev_addr)) {
7271                 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7272                         netdev->dev_addr);
7273                 err = -EIO;
7274                 goto err_eeprom;
7275         }
7276
7277         init_timer(&adapter->watchdog_timer);
7278         adapter->watchdog_timer.function = e1000_watchdog;
7279         adapter->watchdog_timer.data = (unsigned long)adapter;
7280
7281         init_timer(&adapter->phy_info_timer);
7282         adapter->phy_info_timer.function = e1000_update_phy_info;
7283         adapter->phy_info_timer.data = (unsigned long)adapter;
7284
7285         INIT_WORK(&adapter->reset_task, e1000_reset_task);
7286         INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7287         INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7288         INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7289         INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7290
7291         /* Initialize link parameters. User can change them with ethtool */
7292         adapter->hw.mac.autoneg = 1;
7293         adapter->fc_autoneg = true;
7294         adapter->hw.fc.requested_mode = e1000_fc_default;
7295         adapter->hw.fc.current_mode = e1000_fc_default;
7296         adapter->hw.phy.autoneg_advertised = 0x2f;
7297
7298         /* Initial Wake on LAN setting - If APM wake is enabled in
7299          * the EEPROM, enable the ACPI Magic Packet filter
7300          */
7301         if (adapter->flags & FLAG_APME_IN_WUC) {
7302                 /* APME bit in EEPROM is mapped to WUC.APME */
7303                 eeprom_data = er32(WUC);
7304                 eeprom_apme_mask = E1000_WUC_APME;
7305                 if ((hw->mac.type > e1000_ich10lan) &&
7306                     (eeprom_data & E1000_WUC_PHY_WAKE))
7307                         adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7308         } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7309                 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7310                     (adapter->hw.bus.func == 1))
7311                         ret_val = e1000_read_nvm(&adapter->hw,
7312                                               NVM_INIT_CONTROL3_PORT_B,
7313                                               1, &eeprom_data);
7314                 else
7315                         ret_val = e1000_read_nvm(&adapter->hw,
7316                                               NVM_INIT_CONTROL3_PORT_A,
7317                                               1, &eeprom_data);
7318         }
7319
7320         /* fetch WoL from EEPROM */
7321         if (ret_val)
7322                 e_dbg("NVM read error getting WoL initial values: %d\n", ret_val);
7323         else if (eeprom_data & eeprom_apme_mask)
7324                 adapter->eeprom_wol |= E1000_WUFC_MAG;
7325
7326         /* now that we have the eeprom settings, apply the special cases
7327          * where the eeprom may be wrong or the board simply won't support
7328          * wake on lan on a particular port
7329          */
7330         if (!(adapter->flags & FLAG_HAS_WOL))
7331                 adapter->eeprom_wol = 0;
7332
7333         /* initialize the wol settings based on the eeprom settings */
7334         adapter->wol = adapter->eeprom_wol;
7335
7336         /* make sure adapter isn't asleep if manageability is enabled */
7337         if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7338             (hw->mac.ops.check_mng_mode(hw)))
7339                 device_wakeup_enable(&pdev->dev);
7340
7341         /* save off EEPROM version number */
7342         ret_val = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7343
7344         if (ret_val) {
7345                 e_dbg("NVM read error getting EEPROM version: %d\n", ret_val);
7346                 adapter->eeprom_vers = 0;
7347         }
7348
7349         /* init PTP hardware clock */
7350         e1000e_ptp_init(adapter);
7351
7352         /* reset the hardware with the new settings */
7353         e1000e_reset(adapter);
7354
7355         /* If the controller has AMT, do not set DRV_LOAD until the interface
7356          * is up.  For all other cases, let the f/w know that the h/w is now
7357          * under the control of the driver.
7358          */
7359         if (!(adapter->flags & FLAG_HAS_AMT))
7360                 e1000e_get_hw_control(adapter);
7361
7362         strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7363         err = register_netdev(netdev);
7364         if (err)
7365                 goto err_register;
7366
7367         /* carrier off reporting is important to ethtool even BEFORE open */
7368         netif_carrier_off(netdev);
7369
7370         e1000_print_device_info(adapter);
7371
7372         if (pci_dev_run_wake(pdev))
7373                 pm_runtime_put_noidle(&pdev->dev);
7374
7375         return 0;
7376
7377 err_register:
7378         if (!(adapter->flags & FLAG_HAS_AMT))
7379                 e1000e_release_hw_control(adapter);
7380 err_eeprom:
7381         if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7382                 e1000_phy_hw_reset(&adapter->hw);
7383 err_hw_init:
7384         kfree(adapter->tx_ring);
7385         kfree(adapter->rx_ring);
7386 err_sw_init:
7387         if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7388                 iounmap(adapter->hw.flash_address);
7389         e1000e_reset_interrupt_capability(adapter);
7390 err_flashmap:
7391         iounmap(adapter->hw.hw_addr);
7392 err_ioremap:
7393         free_netdev(netdev);
7394 err_alloc_etherdev:
7395         pci_disable_pcie_error_reporting(pdev);
7396         pci_release_mem_regions(pdev);
7397 err_pci_reg:
7398 err_dma:
7399         pci_disable_device(pdev);
7400         return err;
7401 }
7402
7403 /**
7404  * e1000_remove - Device Removal Routine
7405  * @pdev: PCI device information struct
7406  *
7407  * e1000_remove is called by the PCI subsystem to alert the driver
7408  * that it should release a PCI device.  The could be caused by a
7409  * Hot-Plug event, or because the driver is going to be removed from
7410  * memory.
7411  **/
7412 static void e1000_remove(struct pci_dev *pdev)
7413 {
7414         struct net_device *netdev = pci_get_drvdata(pdev);
7415         struct e1000_adapter *adapter = netdev_priv(netdev);
7416         bool down = test_bit(__E1000_DOWN, &adapter->state);
7417
7418         e1000e_ptp_remove(adapter);
7419
7420         /* The timers may be rescheduled, so explicitly disable them
7421          * from being rescheduled.
7422          */
7423         if (!down)
7424                 set_bit(__E1000_DOWN, &adapter->state);
7425         del_timer_sync(&adapter->watchdog_timer);
7426         del_timer_sync(&adapter->phy_info_timer);
7427
7428         cancel_work_sync(&adapter->reset_task);
7429         cancel_work_sync(&adapter->watchdog_task);
7430         cancel_work_sync(&adapter->downshift_task);
7431         cancel_work_sync(&adapter->update_phy_task);
7432         cancel_work_sync(&adapter->print_hang_task);
7433
7434         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7435                 cancel_work_sync(&adapter->tx_hwtstamp_work);
7436                 if (adapter->tx_hwtstamp_skb) {
7437                         dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
7438                         adapter->tx_hwtstamp_skb = NULL;
7439                 }
7440         }
7441
7442         /* Don't lie to e1000_close() down the road. */
7443         if (!down)
7444                 clear_bit(__E1000_DOWN, &adapter->state);
7445         unregister_netdev(netdev);
7446
7447         if (pci_dev_run_wake(pdev))
7448                 pm_runtime_get_noresume(&pdev->dev);
7449
7450         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7451          * would have already happened in close and is redundant.
7452          */
7453         e1000e_release_hw_control(adapter);
7454
7455         e1000e_reset_interrupt_capability(adapter);
7456         kfree(adapter->tx_ring);
7457         kfree(adapter->rx_ring);
7458
7459         iounmap(adapter->hw.hw_addr);
7460         if ((adapter->hw.flash_address) &&
7461             (adapter->hw.mac.type < e1000_pch_spt))
7462                 iounmap(adapter->hw.flash_address);
7463         pci_release_mem_regions(pdev);
7464
7465         free_netdev(netdev);
7466
7467         /* AER disable */
7468         pci_disable_pcie_error_reporting(pdev);
7469
7470         pci_disable_device(pdev);
7471 }
7472
7473 /* PCI Error Recovery (ERS) */
7474 static const struct pci_error_handlers e1000_err_handler = {
7475         .error_detected = e1000_io_error_detected,
7476         .slot_reset = e1000_io_slot_reset,
7477         .resume = e1000_io_resume,
7478 };
7479
7480 static const struct pci_device_id e1000_pci_tbl[] = {
7481         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7482         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7483         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7484         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7485           board_82571 },
7486         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7487         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7488         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7489         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7490         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7491
7492         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7493         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7494         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7495         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7496
7497         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7498         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7499         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7500
7501         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7502         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7503         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7504
7505         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7506           board_80003es2lan },
7507         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7508           board_80003es2lan },
7509         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7510           board_80003es2lan },
7511         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7512           board_80003es2lan },
7513
7514         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7515         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7516         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7517         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7518         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7519         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7520         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7521         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7522
7523         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7524         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7525         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7526         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7527         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7528         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7529         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7530         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7531         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7532
7533         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7534         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7535         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7536
7537         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7538         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7539         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7540
7541         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7542         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7543         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7544         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7545
7546         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7547         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7548
7549         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7550         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7551         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7552         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7553         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7554         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7555         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7556         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7557         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7558         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7559         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7560         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7561         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
7562         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM4), board_pch_spt },
7563         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
7564         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
7565         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
7566         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM6), board_pch_cnp },
7567         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V6), board_pch_cnp },
7568         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM7), board_pch_cnp },
7569         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V7), board_pch_cnp },
7570         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM8), board_pch_cnp },
7571         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
7572         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
7573         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
7574
7575         { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7576 };
7577 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7578
7579 static const struct dev_pm_ops e1000_pm_ops = {
7580 #ifdef CONFIG_PM_SLEEP
7581         .suspend        = e1000e_pm_suspend,
7582         .resume         = e1000e_pm_resume,
7583         .freeze         = e1000e_pm_freeze,
7584         .thaw           = e1000e_pm_thaw,
7585         .poweroff       = e1000e_pm_suspend,
7586         .restore        = e1000e_pm_resume,
7587 #endif
7588         SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7589                            e1000e_pm_runtime_idle)
7590 };
7591
7592 /* PCI Device API Driver */
7593 static struct pci_driver e1000_driver = {
7594         .name     = e1000e_driver_name,
7595         .id_table = e1000_pci_tbl,
7596         .probe    = e1000_probe,
7597         .remove   = e1000_remove,
7598         .driver   = {
7599                 .pm = &e1000_pm_ops,
7600         },
7601         .shutdown = e1000_shutdown,
7602         .err_handler = &e1000_err_handler
7603 };
7604
7605 /**
7606  * e1000_init_module - Driver Registration Routine
7607  *
7608  * e1000_init_module is the first routine called when the driver is
7609  * loaded. All it does is register with the PCI subsystem.
7610  **/
7611 static int __init e1000_init_module(void)
7612 {
7613         pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7614                 e1000e_driver_version);
7615         pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7616
7617         return pci_register_driver(&e1000_driver);
7618 }
7619 module_init(e1000_init_module);
7620
7621 /**
7622  * e1000_exit_module - Driver Exit Cleanup Routine
7623  *
7624  * e1000_exit_module is called just before the driver is removed
7625  * from memory.
7626  **/
7627 static void __exit e1000_exit_module(void)
7628 {
7629         pci_unregister_driver(&e1000_driver);
7630 }
7631 module_exit(e1000_exit_module);
7632
7633 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7634 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7635 MODULE_LICENSE("GPL");
7636 MODULE_VERSION(DRV_VERSION);
7637
7638 /* netdev.c */