drivers/net/ethernet/intel/e1000e/netdev.c

   1 /* Intel PRO/1000 Linux driver
   2  * Copyright(c) 1999 - 2015 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * The full GNU General Public License is included in this distribution in
  14  * the file called "COPYING".
  15  *
  16  * Contact Information:
  17  * Linux NICS <linux.nics@intel.com>
  18  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20  */
  21
  22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  23
  24 #include <linux/module.h>
  25 #include <linux/types.h>
  26 #include <linux/init.h>
  27 #include <linux/pci.h>
  28 #include <linux/vmalloc.h>
  29 #include <linux/pagemap.h>
  30 #include <linux/delay.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/tcp.h>
  34 #include <linux/ipv6.h>
  35 #include <linux/slab.h>
  36 #include <net/checksum.h>
  37 #include <net/ip6_checksum.h>
  38 #include <linux/ethtool.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/cpu.h>
  41 #include <linux/smp.h>
  42 #include <linux/pm_qos.h>
  43 #include <linux/pm_runtime.h>
  44 #include <linux/aer.h>
  45 #include <linux/prefetch.h>
  46
  47 #include "e1000.h"
  48
  49 #define DRV_EXTRAVERSION "-k"
  50
  51 #define DRV_VERSION "3.2.6" DRV_EXTRAVERSION
  52 char e1000e_driver_name[] = "e1000e";
  53 const char e1000e_driver_version[] = DRV_VERSION;
  54
  55 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  56 static int debug = -1;
  57 module_param(debug, int, 0);
  58 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  59
  60 static const struct e1000_info *e1000_info_tbl[] = {
  61         [board_82571]           = &e1000_82571_info,
  62         [board_82572]           = &e1000_82572_info,
  63         [board_82573]           = &e1000_82573_info,
  64         [board_82574]           = &e1000_82574_info,
  65         [board_82583]           = &e1000_82583_info,
  66         [board_80003es2lan]     = &e1000_es2_info,
  67         [board_ich8lan]         = &e1000_ich8_info,
  68         [board_ich9lan]         = &e1000_ich9_info,
  69         [board_ich10lan]        = &e1000_ich10_info,
  70         [board_pchlan]          = &e1000_pch_info,
  71         [board_pch2lan]         = &e1000_pch2_info,
  72         [board_pch_lpt]         = &e1000_pch_lpt_info,
  73         [board_pch_spt]         = &e1000_pch_spt_info,
  74 };
  75
  76 struct e1000_reg_info {
  77         u32 ofs;
  78         char *name;
  79 };
  80
  81 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
  82         /* General Registers */
  83         {E1000_CTRL, "CTRL"},
  84         {E1000_STATUS, "STATUS"},
  85         {E1000_CTRL_EXT, "CTRL_EXT"},
  86
  87         /* Interrupt Registers */
  88         {E1000_ICR, "ICR"},
  89
  90         /* Rx Registers */
  91         {E1000_RCTL, "RCTL"},
  92         {E1000_RDLEN(0), "RDLEN"},
  93         {E1000_RDH(0), "RDH"},
  94         {E1000_RDT(0), "RDT"},
  95         {E1000_RDTR, "RDTR"},
  96         {E1000_RXDCTL(0), "RXDCTL"},
  97         {E1000_ERT, "ERT"},
  98         {E1000_RDBAL(0), "RDBAL"},
  99         {E1000_RDBAH(0), "RDBAH"},
 100         {E1000_RDFH, "RDFH"},
 101         {E1000_RDFT, "RDFT"},
 102         {E1000_RDFHS, "RDFHS"},
 103         {E1000_RDFTS, "RDFTS"},
 104         {E1000_RDFPC, "RDFPC"},
 105
 106         /* Tx Registers */
 107         {E1000_TCTL, "TCTL"},
 108         {E1000_TDBAL(0), "TDBAL"},
 109         {E1000_TDBAH(0), "TDBAH"},
 110         {E1000_TDLEN(0), "TDLEN"},
 111         {E1000_TDH(0), "TDH"},
 112         {E1000_TDT(0), "TDT"},
 113         {E1000_TIDV, "TIDV"},
 114         {E1000_TXDCTL(0), "TXDCTL"},
 115         {E1000_TADV, "TADV"},
 116         {E1000_TARC(0), "TARC"},
 117         {E1000_TDFH, "TDFH"},
 118         {E1000_TDFT, "TDFT"},
 119         {E1000_TDFHS, "TDFHS"},
 120         {E1000_TDFTS, "TDFTS"},
 121         {E1000_TDFPC, "TDFPC"},
 122
 123         /* List Terminator */
 124         {0, NULL}
 125 };
 126
 127 /**
 128  * __ew32_prepare - prepare to write to MAC CSR register on certain parts
 129  * @hw: pointer to the HW structure
 130  *
 131  * When updating the MAC CSR registers, the Manageability Engine (ME) could
 132  * be accessing the registers at the same time.  Normally, this is handled in
 133  * h/w by an arbiter but on some parts there is a bug that acknowledges Host
 134  * accesses later than it should which could result in the register to have
 135  * an incorrect value.  Workaround this by checking the FWSM register which
 136  * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
 137  * and try again a number of times.
 138  **/
 139 static void __ew32_prepare(struct e1000_hw *hw)
 140 {
 141         s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
 142
 143         while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
 144                 udelay(50);
 145 }
 146
 147 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
 148 {
 149         if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 150                 __ew32_prepare(hw);
 151
 152         writel(val, hw->hw_addr + reg);
 153 }
 154
 155 /**
 156  * e1000_regdump - register printout routine
 157  * @hw: pointer to the HW structure
 158  * @reginfo: pointer to the register info table
 159  **/
 160 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
 161 {
 162         int n = 0;
 163         char rname[16];
 164         u32 regs[8];
 165
 166         switch (reginfo->ofs) {
 167         case E1000_RXDCTL(0):
 168                 for (n = 0; n < 2; n++)
 169                         regs[n] = __er32(hw, E1000_RXDCTL(n));
 170                 break;
 171         case E1000_TXDCTL(0):
 172                 for (n = 0; n < 2; n++)
 173                         regs[n] = __er32(hw, E1000_TXDCTL(n));
 174                 break;
 175         case E1000_TARC(0):
 176                 for (n = 0; n < 2; n++)
 177                         regs[n] = __er32(hw, E1000_TARC(n));
 178                 break;
 179         default:
 180                 pr_info("%-15s %08x\n",
 181                         reginfo->name, __er32(hw, reginfo->ofs));
 182                 return;
 183         }
 184
 185         snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
 186         pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
 187 }
 188
 189 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
 190                                  struct e1000_buffer *bi)
 191 {
 192         int i;
 193         struct e1000_ps_page *ps_page;
 194
 195         for (i = 0; i < adapter->rx_ps_pages; i++) {
 196                 ps_page = &bi->ps_pages[i];
 197
 198                 if (ps_page->page) {
 199                         pr_info("packet dump for ps_page %d:\n", i);
 200                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 201                                        16, 1, page_address(ps_page->page),
 202                                        PAGE_SIZE, true);
 203                 }
 204         }
 205 }
 206
 207 /**
 208  * e1000e_dump - Print registers, Tx-ring and Rx-ring
 209  * @adapter: board private structure
 210  **/
 211 static void e1000e_dump(struct e1000_adapter *adapter)
 212 {
 213         struct net_device *netdev = adapter->netdev;
 214         struct e1000_hw *hw = &adapter->hw;
 215         struct e1000_reg_info *reginfo;
 216         struct e1000_ring *tx_ring = adapter->tx_ring;
 217         struct e1000_tx_desc *tx_desc;
 218         struct my_u0 {
 219                 __le64 a;
 220                 __le64 b;
 221         } *u0;
 222         struct e1000_buffer *buffer_info;
 223         struct e1000_ring *rx_ring = adapter->rx_ring;
 224         union e1000_rx_desc_packet_split *rx_desc_ps;
 225         union e1000_rx_desc_extended *rx_desc;
 226         struct my_u1 {
 227                 __le64 a;
 228                 __le64 b;
 229                 __le64 c;
 230                 __le64 d;
 231         } *u1;
 232         u32 staterr;
 233         int i = 0;
 234
 235         if (!netif_msg_hw(adapter))
 236                 return;
 237
 238         /* Print netdevice Info */
 239         if (netdev) {
 240                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 241                 pr_info("Device Name     state            trans_start      last_rx\n");
 242                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 243                         netdev->state, dev_trans_start(netdev), netdev->last_rx);
 244         }
 245
 246         /* Print Registers */
 247         dev_info(&adapter->pdev->dev, "Register Dump\n");
 248         pr_info(" Register Name   Value\n");
 249         for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
 250              reginfo->name; reginfo++) {
 251                 e1000_regdump(hw, reginfo);
 252         }
 253
 254         /* Print Tx Ring Summary */
 255         if (!netdev || !netif_running(netdev))
 256                 return;
 257
 258         dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
 259         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 260         buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
 261         pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
 262                 0, tx_ring->next_to_use, tx_ring->next_to_clean,
 263                 (unsigned long long)buffer_info->dma,
 264                 buffer_info->length,
 265                 buffer_info->next_to_watch,
 266                 (unsigned long long)buffer_info->time_stamp);
 267
 268         /* Print Tx Ring */
 269         if (!netif_msg_tx_done(adapter))
 270                 goto rx_ring_summary;
 271
 272         dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
 273
 274         /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
 275          *
 276          * Legacy Transmit Descriptor
 277          *   +--------------------------------------------------------------+
 278          * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
 279          *   +--------------------------------------------------------------+
 280          * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
 281          *   +--------------------------------------------------------------+
 282          *   63       48 47        36 35    32 31     24 23    16 15        0
 283          *
 284          * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
 285          *   63      48 47    40 39       32 31             16 15    8 7      0
 286          *   +----------------------------------------------------------------+
 287          * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
 288          *   +----------------------------------------------------------------+
 289          * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
 290          *   +----------------------------------------------------------------+
 291          *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
 292          *
 293          * Extended Data Descriptor (DTYP=0x1)
 294          *   +----------------------------------------------------------------+
 295          * 0 |                     Buffer Address [63:0]                      |
 296          *   +----------------------------------------------------------------+
 297          * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
 298          *   +----------------------------------------------------------------+
 299          *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
 300          */
 301         pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");
 302         pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");
 303         pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");
 304         for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 305                 const char *next_desc;
 306                 tx_desc = E1000_TX_DESC(*tx_ring, i);
 307                 buffer_info = &tx_ring->buffer_info[i];
 308                 u0 = (struct my_u0 *)tx_desc;
 309                 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
 310                         next_desc = " NTC/U";
 311                 else if (i == tx_ring->next_to_use)
 312                         next_desc = " NTU";
 313                 else if (i == tx_ring->next_to_clean)
 314                         next_desc = " NTC";
 315                 else
 316                         next_desc = "";
 317                 pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",
 318                         (!(le64_to_cpu(u0->b) & BIT(29)) ? 'l' :
 319                          ((le64_to_cpu(u0->b) & BIT(20)) ? 'd' : 'c')),
 320                         i,
 321                         (unsigned long long)le64_to_cpu(u0->a),
 322                         (unsigned long long)le64_to_cpu(u0->b),
 323                         (unsigned long long)buffer_info->dma,
 324                         buffer_info->length, buffer_info->next_to_watch,
 325                         (unsigned long long)buffer_info->time_stamp,
 326                         buffer_info->skb, next_desc);
 327
 328                 if (netif_msg_pktdata(adapter) && buffer_info->skb)
 329                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 330                                        16, 1, buffer_info->skb->data,
 331                                        buffer_info->skb->len, true);
 332         }
 333
 334         /* Print Rx Ring Summary */
 335 rx_ring_summary:
 336         dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
 337         pr_info("Queue [NTU] [NTC]\n");
 338         pr_info(" %5d %5X %5X\n",
 339                 0, rx_ring->next_to_use, rx_ring->next_to_clean);
 340
 341         /* Print Rx Ring */
 342         if (!netif_msg_rx_status(adapter))
 343                 return;
 344
 345         dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
 346         switch (adapter->rx_ps_pages) {
 347         case 1:
 348         case 2:
 349         case 3:
 350                 /* [Extended] Packet Split Receive Descriptor Format
 351                  *
 352                  *    +-----------------------------------------------------+
 353                  *  0 |                Buffer Address 0 [63:0]              |
 354                  *    +-----------------------------------------------------+
 355                  *  8 |                Buffer Address 1 [63:0]              |
 356                  *    +-----------------------------------------------------+
 357                  * 16 |                Buffer Address 2 [63:0]              |
 358                  *    +-----------------------------------------------------+
 359                  * 24 |                Buffer Address 3 [63:0]              |
 360                  *    +-----------------------------------------------------+
 361                  */
 362                 pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");
 363                 /* [Extended] Receive Descriptor (Write-Back) Format
 364                  *
 365                  *   63       48 47    32 31     13 12    8 7    4 3        0
 366                  *   +------------------------------------------------------+
 367                  * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
 368                  *   | Checksum | Ident  |         | Queue |      |  Type   |
 369                  *   +------------------------------------------------------+
 370                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 371                  *   +------------------------------------------------------+
 372                  *   63       48 47    32 31            20 19               0
 373                  */
 374                 pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
 375                 for (i = 0; i < rx_ring->count; i++) {
 376                         const char *next_desc;
 377                         buffer_info = &rx_ring->buffer_info[i];
 378                         rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
 379                         u1 = (struct my_u1 *)rx_desc_ps;
 380                         staterr =
 381                             le32_to_cpu(rx_desc_ps->wb.middle.status_error);
 382
 383                         if (i == rx_ring->next_to_use)
 384                                 next_desc = " NTU";
 385                         else if (i == rx_ring->next_to_clean)
 386                                 next_desc = " NTC";
 387                         else
 388                                 next_desc = "";
 389
 390                         if (staterr & E1000_RXD_STAT_DD) {
 391                                 /* Descriptor Done */
 392                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",
 393                                         "RWB", i,
 394                                         (unsigned long long)le64_to_cpu(u1->a),
 395                                         (unsigned long long)le64_to_cpu(u1->b),
 396                                         (unsigned long long)le64_to_cpu(u1->c),
 397                                         (unsigned long long)le64_to_cpu(u1->d),
 398                                         buffer_info->skb, next_desc);
 399                         } else {
 400                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",
 401                                         "R  ", i,
 402                                         (unsigned long long)le64_to_cpu(u1->a),
 403                                         (unsigned long long)le64_to_cpu(u1->b),
 404                                         (unsigned long long)le64_to_cpu(u1->c),
 405                                         (unsigned long long)le64_to_cpu(u1->d),
 406                                         (unsigned long long)buffer_info->dma,
 407                                         buffer_info->skb, next_desc);
 408
 409                                 if (netif_msg_pktdata(adapter))
 410                                         e1000e_dump_ps_pages(adapter,
 411                                                              buffer_info);
 412                         }
 413                 }
 414                 break;
 415         default:
 416         case 0:
 417                 /* Extended Receive Descriptor (Read) Format
 418                  *
 419                  *   +-----------------------------------------------------+
 420                  * 0 |                Buffer Address [63:0]                |
 421                  *   +-----------------------------------------------------+
 422                  * 8 |                      Reserved                       |
 423                  *   +-----------------------------------------------------+
 424                  */
 425                 pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");
 426                 /* Extended Receive Descriptor (Write-Back) Format
 427                  *
 428                  *   63       48 47    32 31    24 23            4 3        0
 429                  *   +------------------------------------------------------+
 430                  *   |     RSS Hash      |        |               |         |
 431                  * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |
 432                  *   | Packet   | IP     |        |               |  Type   |
 433                  *   | Checksum | Ident  |        |               |         |
 434                  *   +------------------------------------------------------+
 435                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 436                  *   +------------------------------------------------------+
 437                  *   63       48 47    32 31            20 19               0
 438                  */
 439                 pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");
 440
 441                 for (i = 0; i < rx_ring->count; i++) {
 442                         const char *next_desc;
 443
 444                         buffer_info = &rx_ring->buffer_info[i];
 445                         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 446                         u1 = (struct my_u1 *)rx_desc;
 447                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 448
 449                         if (i == rx_ring->next_to_use)
 450                                 next_desc = " NTU";
 451                         else if (i == rx_ring->next_to_clean)
 452                                 next_desc = " NTC";
 453                         else
 454                                 next_desc = "";
 455
 456                         if (staterr & E1000_RXD_STAT_DD) {
 457                                 /* Descriptor Done */
 458                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 459                                         "RWB", i,
 460                                         (unsigned long long)le64_to_cpu(u1->a),
 461                                         (unsigned long long)le64_to_cpu(u1->b),
 462                                         buffer_info->skb, next_desc);
 463                         } else {
 464                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",
 465                                         "R  ", i,
 466                                         (unsigned long long)le64_to_cpu(u1->a),
 467                                         (unsigned long long)le64_to_cpu(u1->b),
 468                                         (unsigned long long)buffer_info->dma,
 469                                         buffer_info->skb, next_desc);
 470
 471                                 if (netif_msg_pktdata(adapter) &&
 472                                     buffer_info->skb)
 473                                         print_hex_dump(KERN_INFO, "",
 474                                                        DUMP_PREFIX_ADDRESS, 16,
 475                                                        1,
 476                                                        buffer_info->skb->data,
 477                                                        adapter->rx_buffer_len,
 478                                                        true);
 479                         }
 480                 }
 481         }
 482 }
 483
 484 /**
 485  * e1000_desc_unused - calculate if we have unused descriptors
 486  **/
 487 static int e1000_desc_unused(struct e1000_ring *ring)
 488 {
 489         if (ring->next_to_clean > ring->next_to_use)
 490                 return ring->next_to_clean - ring->next_to_use - 1;
 491
 492         return ring->count + ring->next_to_clean - ring->next_to_use - 1;
 493 }
 494
 495 /**
 496  * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
 497  * @adapter: board private structure
 498  * @hwtstamps: time stamp structure to update
 499  * @systim: unsigned 64bit system time value.
 500  *
 501  * Convert the system time value stored in the RX/TXSTMP registers into a
 502  * hwtstamp which can be used by the upper level time stamping functions.
 503  *
 504  * The 'systim_lock' spinlock is used to protect the consistency of the
 505  * system time value. This is needed because reading the 64 bit time
 506  * value involves reading two 32 bit registers. The first read latches the
 507  * value.
 508  **/
 509 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
 510                                       struct skb_shared_hwtstamps *hwtstamps,
 511                                       u64 systim)
 512 {
 513         u64 ns;
 514         unsigned long flags;
 515
 516         spin_lock_irqsave(&adapter->systim_lock, flags);
 517         ns = timecounter_cyc2time(&adapter->tc, systim);
 518         spin_unlock_irqrestore(&adapter->systim_lock, flags);
 519
 520         memset(hwtstamps, 0, sizeof(*hwtstamps));
 521         hwtstamps->hwtstamp = ns_to_ktime(ns);
 522 }
 523
 524 /**
 525  * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
 526  * @adapter: board private structure
 527  * @status: descriptor extended error and status field
 528  * @skb: particular skb to include time stamp
 529  *
 530  * If the time stamp is valid, convert it into the timecounter ns value
 531  * and store that result into the shhwtstamps structure which is passed
 532  * up the network stack.
 533  **/
 534 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
 535                                struct sk_buff *skb)
 536 {
 537         struct e1000_hw *hw = &adapter->hw;
 538         u64 rxstmp;
 539
 540         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
 541             !(status & E1000_RXDEXT_STATERR_TST) ||
 542             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 543                 return;
 544
 545         /* The Rx time stamp registers contain the time stamp.  No other
 546          * received packet will be time stamped until the Rx time stamp
 547          * registers are read.  Because only one packet can be time stamped
 548          * at a time, the register values must belong to this packet and
 549          * therefore none of the other additional attributes need to be
 550          * compared.
 551          */
 552         rxstmp = (u64)er32(RXSTMPL);
 553         rxstmp |= (u64)er32(RXSTMPH) << 32;
 554         e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
 555
 556         adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
 557 }
 558
 559 /**
 560  * e1000_receive_skb - helper function to handle Rx indications
 561  * @adapter: board private structure
 562  * @staterr: descriptor extended error and status field as written by hardware
 563  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
 564  * @skb: pointer to sk_buff to be indicated to stack
 565  **/
 566 static void e1000_receive_skb(struct e1000_adapter *adapter,
 567                               struct net_device *netdev, struct sk_buff *skb,
 568                               u32 staterr, __le16 vlan)
 569 {
 570         u16 tag = le16_to_cpu(vlan);
 571
 572         e1000e_rx_hwtstamp(adapter, staterr, skb);
 573
 574         skb->protocol = eth_type_trans(skb, netdev);
 575
 576         if (staterr & E1000_RXD_STAT_VP)
 577                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
 578
 579         napi_gro_receive(&adapter->napi, skb);
 580 }
 581
 582 /**
 583  * e1000_rx_checksum - Receive Checksum Offload
 584  * @adapter: board private structure
 585  * @status_err: receive descriptor status and error fields
 586  * @csum: receive descriptor csum field
 587  * @sk_buff: socket buffer with received data
 588  **/
 589 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
 590                               struct sk_buff *skb)
 591 {
 592         u16 status = (u16)status_err;
 593         u8 errors = (u8)(status_err >> 24);
 594
 595         skb_checksum_none_assert(skb);
 596
 597         /* Rx checksum disabled */
 598         if (!(adapter->netdev->features & NETIF_F_RXCSUM))
 599                 return;
 600
 601         /* Ignore Checksum bit is set */
 602         if (status & E1000_RXD_STAT_IXSM)
 603                 return;
 604
 605         /* TCP/UDP checksum error bit or IP checksum error bit is set */
 606         if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
 607                 /* let the stack verify checksum errors */
 608                 adapter->hw_csum_err++;
 609                 return;
 610         }
 611
 612         /* TCP/UDP Checksum has not been calculated */
 613         if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
 614                 return;
 615
 616         /* It must be a TCP or UDP packet with a valid checksum */
 617         skb->ip_summed = CHECKSUM_UNNECESSARY;
 618         adapter->hw_csum_good++;
 619 }
 620
 621 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
 622 {
 623         struct e1000_adapter *adapter = rx_ring->adapter;
 624         struct e1000_hw *hw = &adapter->hw;
 625
 626         __ew32_prepare(hw);
 627         writel(i, rx_ring->tail);
 628
 629         if (unlikely(i != readl(rx_ring->tail))) {
 630                 u32 rctl = er32(RCTL);
 631
 632                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
 633                 e_err("ME firmware caused invalid RDT - resetting\n");
 634                 schedule_work(&adapter->reset_task);
 635         }
 636 }
 637
 638 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
 639 {
 640         struct e1000_adapter *adapter = tx_ring->adapter;
 641         struct e1000_hw *hw = &adapter->hw;
 642
 643         __ew32_prepare(hw);
 644         writel(i, tx_ring->tail);
 645
 646         if (unlikely(i != readl(tx_ring->tail))) {
 647                 u32 tctl = er32(TCTL);
 648
 649                 ew32(TCTL, tctl & ~E1000_TCTL_EN);
 650                 e_err("ME firmware caused invalid TDT - resetting\n");
 651                 schedule_work(&adapter->reset_task);
 652         }
 653 }
 654
 655 /**
 656  * e1000_alloc_rx_buffers - Replace used receive buffers
 657  * @rx_ring: Rx descriptor ring
 658  **/
 659 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
 660                                    int cleaned_count, gfp_t gfp)
 661 {
 662         struct e1000_adapter *adapter = rx_ring->adapter;
 663         struct net_device *netdev = adapter->netdev;
 664         struct pci_dev *pdev = adapter->pdev;
 665         union e1000_rx_desc_extended *rx_desc;
 666         struct e1000_buffer *buffer_info;
 667         struct sk_buff *skb;
 668         unsigned int i;
 669         unsigned int bufsz = adapter->rx_buffer_len;
 670
 671         i = rx_ring->next_to_use;
 672         buffer_info = &rx_ring->buffer_info[i];
 673
 674         while (cleaned_count--) {
 675                 skb = buffer_info->skb;
 676                 if (skb) {
 677                         skb_trim(skb, 0);
 678                         goto map_skb;
 679                 }
 680
 681                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 682                 if (!skb) {
 683                         /* Better luck next round */
 684                         adapter->alloc_rx_buff_failed++;
 685                         break;
 686                 }
 687
 688                 buffer_info->skb = skb;
 689 map_skb:
 690                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 691                                                   adapter->rx_buffer_len,
 692                                                   DMA_FROM_DEVICE);
 693                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 694                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 695                         adapter->rx_dma_failed++;
 696                         break;
 697                 }
 698
 699                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 700                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 701
 702                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 703                         /* Force memory writes to complete before letting h/w
 704                          * know there are new descriptors to fetch.  (Only
 705                          * applicable for weak-ordered memory model archs,
 706                          * such as IA-64).
 707                          */
 708                         wmb();
 709                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 710                                 e1000e_update_rdt_wa(rx_ring, i);
 711                         else
 712                                 writel(i, rx_ring->tail);
 713                 }
 714                 i++;
 715                 if (i == rx_ring->count)
 716                         i = 0;
 717                 buffer_info = &rx_ring->buffer_info[i];
 718         }
 719
 720         rx_ring->next_to_use = i;
 721 }
 722
 723 /**
 724  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
 725  * @rx_ring: Rx descriptor ring
 726  **/
 727 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
 728                                       int cleaned_count, gfp_t gfp)
 729 {
 730         struct e1000_adapter *adapter = rx_ring->adapter;
 731         struct net_device *netdev = adapter->netdev;
 732         struct pci_dev *pdev = adapter->pdev;
 733         union e1000_rx_desc_packet_split *rx_desc;
 734         struct e1000_buffer *buffer_info;
 735         struct e1000_ps_page *ps_page;
 736         struct sk_buff *skb;
 737         unsigned int i, j;
 738
 739         i = rx_ring->next_to_use;
 740         buffer_info = &rx_ring->buffer_info[i];
 741
 742         while (cleaned_count--) {
 743                 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
 744
 745                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
 746                         ps_page = &buffer_info->ps_pages[j];
 747                         if (j >= adapter->rx_ps_pages) {
 748                                 /* all unused desc entries get hw null ptr */
 749                                 rx_desc->read.buffer_addr[j + 1] =
 750                                     ~cpu_to_le64(0);
 751                                 continue;
 752                         }
 753                         if (!ps_page->page) {
 754                                 ps_page->page = alloc_page(gfp);
 755                                 if (!ps_page->page) {
 756                                         adapter->alloc_rx_buff_failed++;
 757                                         goto no_buffers;
 758                                 }
 759                                 ps_page->dma = dma_map_page(&pdev->dev,
 760                                                             ps_page->page,
 761                                                             0, PAGE_SIZE,
 762                                                             DMA_FROM_DEVICE);
 763                                 if (dma_mapping_error(&pdev->dev,
 764                                                       ps_page->dma)) {
 765                                         dev_err(&adapter->pdev->dev,
 766                                                 "Rx DMA page map failed\n");
 767                                         adapter->rx_dma_failed++;
 768                                         goto no_buffers;
 769                                 }
 770                         }
 771                         /* Refresh the desc even if buffer_addrs
 772                          * didn't change because each write-back
 773                          * erases this info.
 774                          */
 775                         rx_desc->read.buffer_addr[j + 1] =
 776                             cpu_to_le64(ps_page->dma);
 777                 }
 778
 779                 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
 780                                                   gfp);
 781
 782                 if (!skb) {
 783                         adapter->alloc_rx_buff_failed++;
 784                         break;
 785                 }
 786
 787                 buffer_info->skb = skb;
 788                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 789                                                   adapter->rx_ps_bsize0,
 790                                                   DMA_FROM_DEVICE);
 791                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 792                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 793                         adapter->rx_dma_failed++;
 794                         /* cleanup skb */
 795                         dev_kfree_skb_any(skb);
 796                         buffer_info->skb = NULL;
 797                         break;
 798                 }
 799
 800                 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
 801
 802                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 803                         /* Force memory writes to complete before letting h/w
 804                          * know there are new descriptors to fetch.  (Only
 805                          * applicable for weak-ordered memory model archs,
 806                          * such as IA-64).
 807                          */
 808                         wmb();
 809                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 810                                 e1000e_update_rdt_wa(rx_ring, i << 1);
 811                         else
 812                                 writel(i << 1, rx_ring->tail);
 813                 }
 814
 815                 i++;
 816                 if (i == rx_ring->count)
 817                         i = 0;
 818                 buffer_info = &rx_ring->buffer_info[i];
 819         }
 820
 821 no_buffers:
 822         rx_ring->next_to_use = i;
 823 }
 824
 825 /**
 826  * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
 827  * @rx_ring: Rx descriptor ring
 828  * @cleaned_count: number of buffers to allocate this pass
 829  **/
 830
 831 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
 832                                          int cleaned_count, gfp_t gfp)
 833 {
 834         struct e1000_adapter *adapter = rx_ring->adapter;
 835         struct net_device *netdev = adapter->netdev;
 836         struct pci_dev *pdev = adapter->pdev;
 837         union e1000_rx_desc_extended *rx_desc;
 838         struct e1000_buffer *buffer_info;
 839         struct sk_buff *skb;
 840         unsigned int i;
 841         unsigned int bufsz = 256 - 16;  /* for skb_reserve */
 842
 843         i = rx_ring->next_to_use;
 844         buffer_info = &rx_ring->buffer_info[i];
 845
 846         while (cleaned_count--) {
 847                 skb = buffer_info->skb;
 848                 if (skb) {
 849                         skb_trim(skb, 0);
 850                         goto check_page;
 851                 }
 852
 853                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 854                 if (unlikely(!skb)) {
 855                         /* Better luck next round */
 856                         adapter->alloc_rx_buff_failed++;
 857                         break;
 858                 }
 859
 860                 buffer_info->skb = skb;
 861 check_page:
 862                 /* allocate a new page if necessary */
 863                 if (!buffer_info->page) {
 864                         buffer_info->page = alloc_page(gfp);
 865                         if (unlikely(!buffer_info->page)) {
 866                                 adapter->alloc_rx_buff_failed++;
 867                                 break;
 868                         }
 869                 }
 870
 871                 if (!buffer_info->dma) {
 872                         buffer_info->dma = dma_map_page(&pdev->dev,
 873                                                         buffer_info->page, 0,
 874                                                         PAGE_SIZE,
 875                                                         DMA_FROM_DEVICE);
 876                         if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 877                                 adapter->alloc_rx_buff_failed++;
 878                                 break;
 879                         }
 880                 }
 881
 882                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 883                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 884
 885                 if (unlikely(++i == rx_ring->count))
 886                         i = 0;
 887                 buffer_info = &rx_ring->buffer_info[i];
 888         }
 889
 890         if (likely(rx_ring->next_to_use != i)) {
 891                 rx_ring->next_to_use = i;
 892                 if (unlikely(i-- == 0))
 893                         i = (rx_ring->count - 1);
 894
 895                 /* Force memory writes to complete before letting h/w
 896                  * know there are new descriptors to fetch.  (Only
 897                  * applicable for weak-ordered memory model archs,
 898                  * such as IA-64).
 899                  */
 900                 wmb();
 901                 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 902                         e1000e_update_rdt_wa(rx_ring, i);
 903                 else
 904                         writel(i, rx_ring->tail);
 905         }
 906 }
 907
 908 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
 909                                  struct sk_buff *skb)
 910 {
 911         if (netdev->features & NETIF_F_RXHASH)
 912                 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
 913 }
 914
 915 /**
 916  * e1000_clean_rx_irq - Send received data up the network stack
 917  * @rx_ring: Rx descriptor ring
 918  *
 919  * the return value indicates whether actual cleaning was done, there
 920  * is no guarantee that everything was cleaned
 921  **/
 922 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
 923                                int work_to_do)
 924 {
 925         struct e1000_adapter *adapter = rx_ring->adapter;
 926         struct net_device *netdev = adapter->netdev;
 927         struct pci_dev *pdev = adapter->pdev;
 928         struct e1000_hw *hw = &adapter->hw;
 929         union e1000_rx_desc_extended *rx_desc, *next_rxd;
 930         struct e1000_buffer *buffer_info, *next_buffer;
 931         u32 length, staterr;
 932         unsigned int i;
 933         int cleaned_count = 0;
 934         bool cleaned = false;
 935         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 936
 937         i = rx_ring->next_to_clean;
 938         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 939         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 940         buffer_info = &rx_ring->buffer_info[i];
 941
 942         while (staterr & E1000_RXD_STAT_DD) {
 943                 struct sk_buff *skb;
 944
 945                 if (*work_done >= work_to_do)
 946                         break;
 947                 (*work_done)++;
 948                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
 949
 950                 skb = buffer_info->skb;
 951                 buffer_info->skb = NULL;
 952
 953                 prefetch(skb->data - NET_IP_ALIGN);
 954
 955                 i++;
 956                 if (i == rx_ring->count)
 957                         i = 0;
 958                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
 959                 prefetch(next_rxd);
 960
 961                 next_buffer = &rx_ring->buffer_info[i];
 962
 963                 cleaned = true;
 964                 cleaned_count++;
 965                 dma_unmap_single(&pdev->dev, buffer_info->dma,
 966                                  adapter->rx_buffer_len, DMA_FROM_DEVICE);
 967                 buffer_info->dma = 0;
 968
 969                 length = le16_to_cpu(rx_desc->wb.upper.length);
 970
 971                 /* !EOP means multiple descriptors were used to store a single
 972                  * packet, if that's the case we need to toss it.  In fact, we
 973                  * need to toss every packet with the EOP bit clear and the
 974                  * next frame that _does_ have the EOP bit set, as it is by
 975                  * definition only a frame fragment
 976                  */
 977                 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
 978                         adapter->flags2 |= FLAG2_IS_DISCARDING;
 979
 980                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
 981                         /* All receives must fit into a single buffer */
 982                         e_dbg("Receive packet consumed multiple buffers\n");
 983                         /* recycle */
 984                         buffer_info->skb = skb;
 985                         if (staterr & E1000_RXD_STAT_EOP)
 986                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
 987                         goto next_desc;
 988                 }
 989
 990                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
 991                              !(netdev->features & NETIF_F_RXALL))) {
 992                         /* recycle */
 993                         buffer_info->skb = skb;
 994                         goto next_desc;
 995                 }
 996
 997                 /* adjust length to remove Ethernet CRC */
 998                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
 999                         /* If configured to store CRC, don't subtract FCS,
1000                          * but keep the FCS bytes out of the total_rx_bytes
1001                          * counter
1002                          */
1003                         if (netdev->features & NETIF_F_RXFCS)
1004                                 total_rx_bytes -= 4;
1005                         else
1006                                 length -= 4;
1007                 }
1008
1009                 total_rx_bytes += length;
1010                 total_rx_packets++;
1011
1012                 /* code added for copybreak, this should improve
1013                  * performance for small packets with large amounts
1014                  * of reassembly being done in the stack
1015                  */
1016                 if (length < copybreak) {
1017                         struct sk_buff *new_skb =
1018                                 napi_alloc_skb(&adapter->napi, length);
1019                         if (new_skb) {
1020                                 skb_copy_to_linear_data_offset(new_skb,
1021                                                                -NET_IP_ALIGN,
1022                                                                (skb->data -
1023                                                                 NET_IP_ALIGN),
1024                                                                (length +
1025                                                                 NET_IP_ALIGN));
1026                                 /* save the skb in buffer_info as good */
1027                                 buffer_info->skb = skb;
1028                                 skb = new_skb;
1029                         }
1030                         /* else just continue with the old one */
1031                 }
1032                 /* end copybreak code */
1033                 skb_put(skb, length);
1034
1035                 /* Receive Checksum Offload */
1036                 e1000_rx_checksum(adapter, staterr, skb);
1037
1038                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1039
1040                 e1000_receive_skb(adapter, netdev, skb, staterr,
1041                                   rx_desc->wb.upper.vlan);
1042
1043 next_desc:
1044                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1045
1046                 /* return some buffers to hardware, one at a time is too slow */
1047                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1048                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1049                                               GFP_ATOMIC);
1050                         cleaned_count = 0;
1051                 }
1052
1053                 /* use prefetched values */
1054                 rx_desc = next_rxd;
1055                 buffer_info = next_buffer;
1056
1057                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1058         }
1059         rx_ring->next_to_clean = i;
1060
1061         cleaned_count = e1000_desc_unused(rx_ring);
1062         if (cleaned_count)
1063                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1064
1065         adapter->total_rx_bytes += total_rx_bytes;
1066         adapter->total_rx_packets += total_rx_packets;
1067         return cleaned;
1068 }
1069
1070 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1071                             struct e1000_buffer *buffer_info)
1072 {
1073         struct e1000_adapter *adapter = tx_ring->adapter;
1074
1075         if (buffer_info->dma) {
1076                 if (buffer_info->mapped_as_page)
1077                         dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1078                                        buffer_info->length, DMA_TO_DEVICE);
1079                 else
1080                         dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1081                                          buffer_info->length, DMA_TO_DEVICE);
1082                 buffer_info->dma = 0;
1083         }
1084         if (buffer_info->skb) {
1085                 dev_kfree_skb_any(buffer_info->skb);
1086                 buffer_info->skb = NULL;
1087         }
1088         buffer_info->time_stamp = 0;
1089 }
1090
1091 static void e1000_print_hw_hang(struct work_struct *work)
1092 {
1093         struct e1000_adapter *adapter = container_of(work,
1094                                                      struct e1000_adapter,
1095                                                      print_hang_task);
1096         struct net_device *netdev = adapter->netdev;
1097         struct e1000_ring *tx_ring = adapter->tx_ring;
1098         unsigned int i = tx_ring->next_to_clean;
1099         unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1100         struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1101         struct e1000_hw *hw = &adapter->hw;
1102         u16 phy_status, phy_1000t_status, phy_ext_status;
1103         u16 pci_status;
1104
1105         if (test_bit(__E1000_DOWN, &adapter->state))
1106                 return;
1107
1108         if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1109                 /* May be block on write-back, flush and detect again
1110                  * flush pending descriptor writebacks to memory
1111                  */
1112                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1113                 /* execute the writes immediately */
1114                 e1e_flush();
1115                 /* Due to rare timing issues, write to TIDV again to ensure
1116                  * the write is successful
1117                  */
1118                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1119                 /* execute the writes immediately */
1120                 e1e_flush();
1121                 adapter->tx_hang_recheck = true;
1122                 return;
1123         }
1124         adapter->tx_hang_recheck = false;
1125
1126         if (er32(TDH(0)) == er32(TDT(0))) {
1127                 e_dbg("false hang detected, ignoring\n");
1128                 return;
1129         }
1130
1131         /* Real hang detected */
1132         netif_stop_queue(netdev);
1133
1134         e1e_rphy(hw, MII_BMSR, &phy_status);
1135         e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1136         e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1137
1138         pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1139
1140         /* detected Hardware unit hang */
1141         e_err("Detected Hardware Unit Hang:\n"
1142               "  TDH                  <%x>\n"
1143               "  TDT                  <%x>\n"
1144               "  next_to_use          <%x>\n"
1145               "  next_to_clean        <%x>\n"
1146               "buffer_info[next_to_clean]:\n"
1147               "  time_stamp           <%lx>\n"
1148               "  next_to_watch        <%x>\n"
1149               "  jiffies              <%lx>\n"
1150               "  next_to_watch.status <%x>\n"
1151               "MAC Status             <%x>\n"
1152               "PHY Status             <%x>\n"
1153               "PHY 1000BASE-T Status  <%x>\n"
1154               "PHY Extended Status    <%x>\n"
1155               "PCI Status             <%x>\n",
1156               readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1157               tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1158               eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1159               phy_status, phy_1000t_status, phy_ext_status, pci_status);
1160
1161         e1000e_dump(adapter);
1162
1163         /* Suggest workaround for known h/w issue */
1164         if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1165                 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1166 }
1167
1168 /**
1169  * e1000e_tx_hwtstamp_work - check for Tx time stamp
1170  * @work: pointer to work struct
1171  *
1172  * This work function polls the TSYNCTXCTL valid bit to determine when a
1173  * timestamp has been taken for the current stored skb.  The timestamp must
1174  * be for this skb because only one such packet is allowed in the queue.
1175  */
1176 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1177 {
1178         struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1179                                                      tx_hwtstamp_work);
1180         struct e1000_hw *hw = &adapter->hw;
1181
1182         if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1183                 struct sk_buff *skb = adapter->tx_hwtstamp_skb;
1184                 struct skb_shared_hwtstamps shhwtstamps;
1185                 u64 txstmp;
1186
1187                 txstmp = er32(TXSTMPL);
1188                 txstmp |= (u64)er32(TXSTMPH) << 32;
1189
1190                 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1191
1192                 /* Clear the global tx_hwtstamp_skb pointer and force writes
1193                  * prior to notifying the stack of a Tx timestamp.
1194                  */
1195                 adapter->tx_hwtstamp_skb = NULL;
1196                 wmb(); /* force write prior to skb_tstamp_tx */
1197
1198                 skb_tstamp_tx(skb, &shhwtstamps);
1199                 dev_kfree_skb_any(skb);
1200         } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1201                               + adapter->tx_timeout_factor * HZ)) {
1202                 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1203                 adapter->tx_hwtstamp_skb = NULL;
1204                 adapter->tx_hwtstamp_timeouts++;
1205                 e_warn("clearing Tx timestamp hang\n");
1206         } else {
1207                 /* reschedule to check later */
1208                 schedule_work(&adapter->tx_hwtstamp_work);
1209         }
1210 }
1211
1212 /**
1213  * e1000_clean_tx_irq - Reclaim resources after transmit completes
1214  * @tx_ring: Tx descriptor ring
1215  *
1216  * the return value indicates whether actual cleaning was done, there
1217  * is no guarantee that everything was cleaned
1218  **/
1219 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1220 {
1221         struct e1000_adapter *adapter = tx_ring->adapter;
1222         struct net_device *netdev = adapter->netdev;
1223         struct e1000_hw *hw = &adapter->hw;
1224         struct e1000_tx_desc *tx_desc, *eop_desc;
1225         struct e1000_buffer *buffer_info;
1226         unsigned int i, eop;
1227         unsigned int count = 0;
1228         unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1229         unsigned int bytes_compl = 0, pkts_compl = 0;
1230
1231         i = tx_ring->next_to_clean;
1232         eop = tx_ring->buffer_info[i].next_to_watch;
1233         eop_desc = E1000_TX_DESC(*tx_ring, eop);
1234
1235         while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1236                (count < tx_ring->count)) {
1237                 bool cleaned = false;
1238
1239                 dma_rmb();              /* read buffer_info after eop_desc */
1240                 for (; !cleaned; count++) {
1241                         tx_desc = E1000_TX_DESC(*tx_ring, i);
1242                         buffer_info = &tx_ring->buffer_info[i];
1243                         cleaned = (i == eop);
1244
1245                         if (cleaned) {
1246                                 total_tx_packets += buffer_info->segs;
1247                                 total_tx_bytes += buffer_info->bytecount;
1248                                 if (buffer_info->skb) {
1249                                         bytes_compl += buffer_info->skb->len;
1250                                         pkts_compl++;
1251                                 }
1252                         }
1253
1254                         e1000_put_txbuf(tx_ring, buffer_info);
1255                         tx_desc->upper.data = 0;
1256
1257                         i++;
1258                         if (i == tx_ring->count)
1259                                 i = 0;
1260                 }
1261
1262                 if (i == tx_ring->next_to_use)
1263                         break;
1264                 eop = tx_ring->buffer_info[i].next_to_watch;
1265                 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1266         }
1267
1268         tx_ring->next_to_clean = i;
1269
1270         netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1271
1272 #define TX_WAKE_THRESHOLD 32
1273         if (count && netif_carrier_ok(netdev) &&
1274             e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1275                 /* Make sure that anybody stopping the queue after this
1276                  * sees the new next_to_clean.
1277                  */
1278                 smp_mb();
1279
1280                 if (netif_queue_stopped(netdev) &&
1281                     !(test_bit(__E1000_DOWN, &adapter->state))) {
1282                         netif_wake_queue(netdev);
1283                         ++adapter->restart_queue;
1284                 }
1285         }
1286
1287         if (adapter->detect_tx_hung) {
1288                 /* Detect a transmit hang in hardware, this serializes the
1289                  * check with the clearing of time_stamp and movement of i
1290                  */
1291                 adapter->detect_tx_hung = false;
1292                 if (tx_ring->buffer_info[i].time_stamp &&
1293                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1294                                + (adapter->tx_timeout_factor * HZ)) &&
1295                     !(er32(STATUS) & E1000_STATUS_TXOFF))
1296                         schedule_work(&adapter->print_hang_task);
1297                 else
1298                         adapter->tx_hang_recheck = false;
1299         }
1300         adapter->total_tx_bytes += total_tx_bytes;
1301         adapter->total_tx_packets += total_tx_packets;
1302         return count < tx_ring->count;
1303 }
1304
1305 /**
1306  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1307  * @rx_ring: Rx descriptor ring
1308  *
1309  * the return value indicates whether actual cleaning was done, there
1310  * is no guarantee that everything was cleaned
1311  **/
1312 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1313                                   int work_to_do)
1314 {
1315         struct e1000_adapter *adapter = rx_ring->adapter;
1316         struct e1000_hw *hw = &adapter->hw;
1317         union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1318         struct net_device *netdev = adapter->netdev;
1319         struct pci_dev *pdev = adapter->pdev;
1320         struct e1000_buffer *buffer_info, *next_buffer;
1321         struct e1000_ps_page *ps_page;
1322         struct sk_buff *skb;
1323         unsigned int i, j;
1324         u32 length, staterr;
1325         int cleaned_count = 0;
1326         bool cleaned = false;
1327         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1328
1329         i = rx_ring->next_to_clean;
1330         rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1331         staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1332         buffer_info = &rx_ring->buffer_info[i];
1333
1334         while (staterr & E1000_RXD_STAT_DD) {
1335                 if (*work_done >= work_to_do)
1336                         break;
1337                 (*work_done)++;
1338                 skb = buffer_info->skb;
1339                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1340
1341                 /* in the packet split case this is header only */
1342                 prefetch(skb->data - NET_IP_ALIGN);
1343
1344                 i++;
1345                 if (i == rx_ring->count)
1346                         i = 0;
1347                 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1348                 prefetch(next_rxd);
1349
1350                 next_buffer = &rx_ring->buffer_info[i];
1351
1352                 cleaned = true;
1353                 cleaned_count++;
1354                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1355                                  adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1356                 buffer_info->dma = 0;
1357
1358                 /* see !EOP comment in other Rx routine */
1359                 if (!(staterr & E1000_RXD_STAT_EOP))
1360                         adapter->flags2 |= FLAG2_IS_DISCARDING;
1361
1362                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1363                         e_dbg("Packet Split buffers didn't pick up the full packet\n");
1364                         dev_kfree_skb_irq(skb);
1365                         if (staterr & E1000_RXD_STAT_EOP)
1366                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1367                         goto next_desc;
1368                 }
1369
1370                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1371                              !(netdev->features & NETIF_F_RXALL))) {
1372                         dev_kfree_skb_irq(skb);
1373                         goto next_desc;
1374                 }
1375
1376                 length = le16_to_cpu(rx_desc->wb.middle.length0);
1377
1378                 if (!length) {
1379                         e_dbg("Last part of the packet spanning multiple descriptors\n");
1380                         dev_kfree_skb_irq(skb);
1381                         goto next_desc;
1382                 }
1383
1384                 /* Good Receive */
1385                 skb_put(skb, length);
1386
1387                 {
1388                         /* this looks ugly, but it seems compiler issues make
1389                          * it more efficient than reusing j
1390                          */
1391                         int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1392
1393                         /* page alloc/put takes too long and effects small
1394                          * packet throughput, so unsplit small packets and
1395                          * save the alloc/put only valid in softirq (napi)
1396                          * context to call kmap_*
1397                          */
1398                         if (l1 && (l1 <= copybreak) &&
1399                             ((length + l1) <= adapter->rx_ps_bsize0)) {
1400                                 u8 *vaddr;
1401
1402                                 ps_page = &buffer_info->ps_pages[0];
1403
1404                                 /* there is no documentation about how to call
1405                                  * kmap_atomic, so we can't hold the mapping
1406                                  * very long
1407                                  */
1408                                 dma_sync_single_for_cpu(&pdev->dev,
1409                                                         ps_page->dma,
1410                                                         PAGE_SIZE,
1411                                                         DMA_FROM_DEVICE);
1412                                 vaddr = kmap_atomic(ps_page->page);
1413                                 memcpy(skb_tail_pointer(skb), vaddr, l1);
1414                                 kunmap_atomic(vaddr);
1415                                 dma_sync_single_for_device(&pdev->dev,
1416                                                            ps_page->dma,
1417                                                            PAGE_SIZE,
1418                                                            DMA_FROM_DEVICE);
1419
1420                                 /* remove the CRC */
1421                                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1422                                         if (!(netdev->features & NETIF_F_RXFCS))
1423                                                 l1 -= 4;
1424                                 }
1425
1426                                 skb_put(skb, l1);
1427                                 goto copydone;
1428                         }       /* if */
1429                 }
1430
1431                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1432                         length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1433                         if (!length)
1434                                 break;
1435
1436                         ps_page = &buffer_info->ps_pages[j];
1437                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1438                                        DMA_FROM_DEVICE);
1439                         ps_page->dma = 0;
1440                         skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1441                         ps_page->page = NULL;
1442                         skb->len += length;
1443                         skb->data_len += length;
1444                         skb->truesize += PAGE_SIZE;
1445                 }
1446
1447                 /* strip the ethernet crc, problem is we're using pages now so
1448                  * this whole operation can get a little cpu intensive
1449                  */
1450                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1451                         if (!(netdev->features & NETIF_F_RXFCS))
1452                                 pskb_trim(skb, skb->len - 4);
1453                 }
1454
1455 copydone:
1456                 total_rx_bytes += skb->len;
1457                 total_rx_packets++;
1458
1459                 e1000_rx_checksum(adapter, staterr, skb);
1460
1461                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1462
1463                 if (rx_desc->wb.upper.header_status &
1464                     cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1465                         adapter->rx_hdr_split++;
1466
1467                 e1000_receive_skb(adapter, netdev, skb, staterr,
1468                                   rx_desc->wb.middle.vlan);
1469
1470 next_desc:
1471                 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1472                 buffer_info->skb = NULL;
1473
1474                 /* return some buffers to hardware, one at a time is too slow */
1475                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1476                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1477                                               GFP_ATOMIC);
1478                         cleaned_count = 0;
1479                 }
1480
1481                 /* use prefetched values */
1482                 rx_desc = next_rxd;
1483                 buffer_info = next_buffer;
1484
1485                 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1486         }
1487         rx_ring->next_to_clean = i;
1488
1489         cleaned_count = e1000_desc_unused(rx_ring);
1490         if (cleaned_count)
1491                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1492
1493         adapter->total_rx_bytes += total_rx_bytes;
1494         adapter->total_rx_packets += total_rx_packets;
1495         return cleaned;
1496 }
1497
1498 /**
1499  * e1000_consume_page - helper function
1500  **/
1501 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1502                                u16 length)
1503 {
1504         bi->page = NULL;
1505         skb->len += length;
1506         skb->data_len += length;
1507         skb->truesize += PAGE_SIZE;
1508 }
1509
1510 /**
1511  * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1512  * @adapter: board private structure
1513  *
1514  * the return value indicates whether actual cleaning was done, there
1515  * is no guarantee that everything was cleaned
1516  **/
1517 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1518                                      int work_to_do)
1519 {
1520         struct e1000_adapter *adapter = rx_ring->adapter;
1521         struct net_device *netdev = adapter->netdev;
1522         struct pci_dev *pdev = adapter->pdev;
1523         union e1000_rx_desc_extended *rx_desc, *next_rxd;
1524         struct e1000_buffer *buffer_info, *next_buffer;
1525         u32 length, staterr;
1526         unsigned int i;
1527         int cleaned_count = 0;
1528         bool cleaned = false;
1529         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1530         struct skb_shared_info *shinfo;
1531
1532         i = rx_ring->next_to_clean;
1533         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1534         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1535         buffer_info = &rx_ring->buffer_info[i];
1536
1537         while (staterr & E1000_RXD_STAT_DD) {
1538                 struct sk_buff *skb;
1539
1540                 if (*work_done >= work_to_do)
1541                         break;
1542                 (*work_done)++;
1543                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1544
1545                 skb = buffer_info->skb;
1546                 buffer_info->skb = NULL;
1547
1548                 ++i;
1549                 if (i == rx_ring->count)
1550                         i = 0;
1551                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1552                 prefetch(next_rxd);
1553
1554                 next_buffer = &rx_ring->buffer_info[i];
1555
1556                 cleaned = true;
1557                 cleaned_count++;
1558                 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1559                                DMA_FROM_DEVICE);
1560                 buffer_info->dma = 0;
1561
1562                 length = le16_to_cpu(rx_desc->wb.upper.length);
1563
1564                 /* errors is only valid for DD + EOP descriptors */
1565                 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1566                              ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1567                               !(netdev->features & NETIF_F_RXALL)))) {
1568                         /* recycle both page and skb */
1569                         buffer_info->skb = skb;
1570                         /* an error means any chain goes out the window too */
1571                         if (rx_ring->rx_skb_top)
1572                                 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1573                         rx_ring->rx_skb_top = NULL;
1574                         goto next_desc;
1575                 }
1576 #define rxtop (rx_ring->rx_skb_top)
1577                 if (!(staterr & E1000_RXD_STAT_EOP)) {
1578                         /* this descriptor is only the beginning (or middle) */
1579                         if (!rxtop) {
1580                                 /* this is the beginning of a chain */
1581                                 rxtop = skb;
1582                                 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1583                                                    0, length);
1584                         } else {
1585                                 /* this is the middle of a chain */
1586                                 shinfo = skb_shinfo(rxtop);
1587                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1588                                                    buffer_info->page, 0,
1589                                                    length);
1590                                 /* re-use the skb, only consumed the page */
1591                                 buffer_info->skb = skb;
1592                         }
1593                         e1000_consume_page(buffer_info, rxtop, length);
1594                         goto next_desc;
1595                 } else {
1596                         if (rxtop) {
1597                                 /* end of the chain */
1598                                 shinfo = skb_shinfo(rxtop);
1599                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1600                                                    buffer_info->page, 0,
1601                                                    length);
1602                                 /* re-use the current skb, we only consumed the
1603                                  * page
1604                                  */
1605                                 buffer_info->skb = skb;
1606                                 skb = rxtop;
1607                                 rxtop = NULL;
1608                                 e1000_consume_page(buffer_info, skb, length);
1609                         } else {
1610                                 /* no chain, got EOP, this buf is the packet
1611                                  * copybreak to save the put_page/alloc_page
1612                                  */
1613                                 if (length <= copybreak &&
1614                                     skb_tailroom(skb) >= length) {
1615                                         u8 *vaddr;
1616                                         vaddr = kmap_atomic(buffer_info->page);
1617                                         memcpy(skb_tail_pointer(skb), vaddr,
1618                                                length);
1619                                         kunmap_atomic(vaddr);
1620                                         /* re-use the page, so don't erase
1621                                          * buffer_info->page
1622                                          */
1623                                         skb_put(skb, length);
1624                                 } else {
1625                                         skb_fill_page_desc(skb, 0,
1626                                                            buffer_info->page, 0,
1627                                                            length);
1628                                         e1000_consume_page(buffer_info, skb,
1629                                                            length);
1630                                 }
1631                         }
1632                 }
1633
1634                 /* Receive Checksum Offload */
1635                 e1000_rx_checksum(adapter, staterr, skb);
1636
1637                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1638
1639                 /* probably a little skewed due to removing CRC */
1640                 total_rx_bytes += skb->len;
1641                 total_rx_packets++;
1642
1643                 /* eth type trans needs skb->data to point to something */
1644                 if (!pskb_may_pull(skb, ETH_HLEN)) {
1645                         e_err("pskb_may_pull failed.\n");
1646                         dev_kfree_skb_irq(skb);
1647                         goto next_desc;
1648                 }
1649
1650                 e1000_receive_skb(adapter, netdev, skb, staterr,
1651                                   rx_desc->wb.upper.vlan);
1652
1653 next_desc:
1654                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1655
1656                 /* return some buffers to hardware, one at a time is too slow */
1657                 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1658                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1659                                               GFP_ATOMIC);
1660                         cleaned_count = 0;
1661                 }
1662
1663                 /* use prefetched values */
1664                 rx_desc = next_rxd;
1665                 buffer_info = next_buffer;
1666
1667                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1668         }
1669         rx_ring->next_to_clean = i;
1670
1671         cleaned_count = e1000_desc_unused(rx_ring);
1672         if (cleaned_count)
1673                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1674
1675         adapter->total_rx_bytes += total_rx_bytes;
1676         adapter->total_rx_packets += total_rx_packets;
1677         return cleaned;
1678 }
1679
1680 /**
1681  * e1000_clean_rx_ring - Free Rx Buffers per Queue
1682  * @rx_ring: Rx descriptor ring
1683  **/
1684 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1685 {
1686         struct e1000_adapter *adapter = rx_ring->adapter;
1687         struct e1000_buffer *buffer_info;
1688         struct e1000_ps_page *ps_page;
1689         struct pci_dev *pdev = adapter->pdev;
1690         unsigned int i, j;
1691
1692         /* Free all the Rx ring sk_buffs */
1693         for (i = 0; i < rx_ring->count; i++) {
1694                 buffer_info = &rx_ring->buffer_info[i];
1695                 if (buffer_info->dma) {
1696                         if (adapter->clean_rx == e1000_clean_rx_irq)
1697                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1698                                                  adapter->rx_buffer_len,
1699                                                  DMA_FROM_DEVICE);
1700                         else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1701                                 dma_unmap_page(&pdev->dev, buffer_info->dma,
1702                                                PAGE_SIZE, DMA_FROM_DEVICE);
1703                         else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1704                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1705                                                  adapter->rx_ps_bsize0,
1706                                                  DMA_FROM_DEVICE);
1707                         buffer_info->dma = 0;
1708                 }
1709
1710                 if (buffer_info->page) {
1711                         put_page(buffer_info->page);
1712                         buffer_info->page = NULL;
1713                 }
1714
1715                 if (buffer_info->skb) {
1716                         dev_kfree_skb(buffer_info->skb);
1717                         buffer_info->skb = NULL;
1718                 }
1719
1720                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1721                         ps_page = &buffer_info->ps_pages[j];
1722                         if (!ps_page->page)
1723                                 break;
1724                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1725                                        DMA_FROM_DEVICE);
1726                         ps_page->dma = 0;
1727                         put_page(ps_page->page);
1728                         ps_page->page = NULL;
1729                 }
1730         }
1731
1732         /* there also may be some cached data from a chained receive */
1733         if (rx_ring->rx_skb_top) {
1734                 dev_kfree_skb(rx_ring->rx_skb_top);
1735                 rx_ring->rx_skb_top = NULL;
1736         }
1737
1738         /* Zero out the descriptor ring */
1739         memset(rx_ring->desc, 0, rx_ring->size);
1740
1741         rx_ring->next_to_clean = 0;
1742         rx_ring->next_to_use = 0;
1743         adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1744 }
1745
1746 static void e1000e_downshift_workaround(struct work_struct *work)
1747 {
1748         struct e1000_adapter *adapter = container_of(work,
1749                                                      struct e1000_adapter,
1750                                                      downshift_task);
1751
1752         if (test_bit(__E1000_DOWN, &adapter->state))
1753                 return;
1754
1755         e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1756 }
1757
1758 /**
1759  * e1000_intr_msi - Interrupt Handler
1760  * @irq: interrupt number
1761  * @data: pointer to a network interface device structure
1762  **/
1763 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1764 {
1765         struct net_device *netdev = data;
1766         struct e1000_adapter *adapter = netdev_priv(netdev);
1767         struct e1000_hw *hw = &adapter->hw;
1768         u32 icr = er32(ICR);
1769
1770         /* read ICR disables interrupts using IAM */
1771         if (icr & E1000_ICR_LSC) {
1772                 hw->mac.get_link_status = true;
1773                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1774                  * disconnect (LSC) before accessing any PHY registers
1775                  */
1776                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1777                     (!(er32(STATUS) & E1000_STATUS_LU)))
1778                         schedule_work(&adapter->downshift_task);
1779
1780                 /* 80003ES2LAN workaround-- For packet buffer work-around on
1781                  * link down event; disable receives here in the ISR and reset
1782                  * adapter in watchdog
1783                  */
1784                 if (netif_carrier_ok(netdev) &&
1785                     adapter->flags & FLAG_RX_NEEDS_RESTART) {
1786                         /* disable receives */
1787                         u32 rctl = er32(RCTL);
1788
1789                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1790                         adapter->flags |= FLAG_RESTART_NOW;
1791                 }
1792                 /* guard against interrupt when we're going down */
1793                 if (!test_bit(__E1000_DOWN, &adapter->state))
1794                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1795         }
1796
1797         /* Reset on uncorrectable ECC error */
1798         if ((icr & E1000_ICR_ECCER) && ((hw->mac.type == e1000_pch_lpt) ||
1799                                         (hw->mac.type == e1000_pch_spt))) {
1800                 u32 pbeccsts = er32(PBECCSTS);
1801
1802                 adapter->corr_errors +=
1803                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1804                 adapter->uncorr_errors +=
1805                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1806                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1807
1808                 /* Do the reset outside of interrupt context */
1809                 schedule_work(&adapter->reset_task);
1810
1811                 /* return immediately since reset is imminent */
1812                 return IRQ_HANDLED;
1813         }
1814
1815         if (napi_schedule_prep(&adapter->napi)) {
1816                 adapter->total_tx_bytes = 0;
1817                 adapter->total_tx_packets = 0;
1818                 adapter->total_rx_bytes = 0;
1819                 adapter->total_rx_packets = 0;
1820                 __napi_schedule(&adapter->napi);
1821         }
1822
1823         return IRQ_HANDLED;
1824 }
1825
1826 /**
1827  * e1000_intr - Interrupt Handler
1828  * @irq: interrupt number
1829  * @data: pointer to a network interface device structure
1830  **/
1831 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1832 {
1833         struct net_device *netdev = data;
1834         struct e1000_adapter *adapter = netdev_priv(netdev);
1835         struct e1000_hw *hw = &adapter->hw;
1836         u32 rctl, icr = er32(ICR);
1837
1838         if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1839                 return IRQ_NONE;        /* Not our interrupt */
1840
1841         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1842          * not set, then the adapter didn't send an interrupt
1843          */
1844         if (!(icr & E1000_ICR_INT_ASSERTED))
1845                 return IRQ_NONE;
1846
1847         /* Interrupt Auto-Mask...upon reading ICR,
1848          * interrupts are masked.  No need for the
1849          * IMC write
1850          */
1851
1852         if (icr & E1000_ICR_LSC) {
1853                 hw->mac.get_link_status = true;
1854                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1855                  * disconnect (LSC) before accessing any PHY registers
1856                  */
1857                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1858                     (!(er32(STATUS) & E1000_STATUS_LU)))
1859                         schedule_work(&adapter->downshift_task);
1860
1861                 /* 80003ES2LAN workaround--
1862                  * For packet buffer work-around on link down event;
1863                  * disable receives here in the ISR and
1864                  * reset adapter in watchdog
1865                  */
1866                 if (netif_carrier_ok(netdev) &&
1867                     (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1868                         /* disable receives */
1869                         rctl = er32(RCTL);
1870                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1871                         adapter->flags |= FLAG_RESTART_NOW;
1872                 }
1873                 /* guard against interrupt when we're going down */
1874                 if (!test_bit(__E1000_DOWN, &adapter->state))
1875                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1876         }
1877
1878         /* Reset on uncorrectable ECC error */
1879         if ((icr & E1000_ICR_ECCER) && ((hw->mac.type == e1000_pch_lpt) ||
1880                                         (hw->mac.type == e1000_pch_spt))) {
1881                 u32 pbeccsts = er32(PBECCSTS);
1882
1883                 adapter->corr_errors +=
1884                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1885                 adapter->uncorr_errors +=
1886                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1887                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1888
1889                 /* Do the reset outside of interrupt context */
1890                 schedule_work(&adapter->reset_task);
1891
1892                 /* return immediately since reset is imminent */
1893                 return IRQ_HANDLED;
1894         }
1895
1896         if (napi_schedule_prep(&adapter->napi)) {
1897                 adapter->total_tx_bytes = 0;
1898                 adapter->total_tx_packets = 0;
1899                 adapter->total_rx_bytes = 0;
1900                 adapter->total_rx_packets = 0;
1901                 __napi_schedule(&adapter->napi);
1902         }
1903
1904         return IRQ_HANDLED;
1905 }
1906
1907 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1908 {
1909         struct net_device *netdev = data;
1910         struct e1000_adapter *adapter = netdev_priv(netdev);
1911         struct e1000_hw *hw = &adapter->hw;
1912         u32 icr = er32(ICR);
1913
1914         if (icr & adapter->eiac_mask)
1915                 ew32(ICS, (icr & adapter->eiac_mask));
1916
1917         if (icr & E1000_ICR_LSC) {
1918                 hw->mac.get_link_status = true;
1919                 /* guard against interrupt when we're going down */
1920                 if (!test_bit(__E1000_DOWN, &adapter->state))
1921                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1922         }
1923
1924         if (!test_bit(__E1000_DOWN, &adapter->state))
1925                 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
1926
1927         return IRQ_HANDLED;
1928 }
1929
1930 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1931 {
1932         struct net_device *netdev = data;
1933         struct e1000_adapter *adapter = netdev_priv(netdev);
1934         struct e1000_hw *hw = &adapter->hw;
1935         struct e1000_ring *tx_ring = adapter->tx_ring;
1936
1937         adapter->total_tx_bytes = 0;
1938         adapter->total_tx_packets = 0;
1939
1940         if (!e1000_clean_tx_irq(tx_ring))
1941                 /* Ring was not completely cleaned, so fire another interrupt */
1942                 ew32(ICS, tx_ring->ims_val);
1943
1944         if (!test_bit(__E1000_DOWN, &adapter->state))
1945                 ew32(IMS, adapter->tx_ring->ims_val);
1946
1947         return IRQ_HANDLED;
1948 }
1949
1950 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1951 {
1952         struct net_device *netdev = data;
1953         struct e1000_adapter *adapter = netdev_priv(netdev);
1954         struct e1000_ring *rx_ring = adapter->rx_ring;
1955
1956         /* Write the ITR value calculated at the end of the
1957          * previous interrupt.
1958          */
1959         if (rx_ring->set_itr) {
1960                 u32 itr = rx_ring->itr_val ?
1961                           1000000000 / (rx_ring->itr_val * 256) : 0;
1962
1963                 writel(itr, rx_ring->itr_register);
1964                 rx_ring->set_itr = 0;
1965         }
1966
1967         if (napi_schedule_prep(&adapter->napi)) {
1968                 adapter->total_rx_bytes = 0;
1969                 adapter->total_rx_packets = 0;
1970                 __napi_schedule(&adapter->napi);
1971         }
1972         return IRQ_HANDLED;
1973 }
1974
1975 /**
1976  * e1000_configure_msix - Configure MSI-X hardware
1977  *
1978  * e1000_configure_msix sets up the hardware to properly
1979  * generate MSI-X interrupts.
1980  **/
1981 static void e1000_configure_msix(struct e1000_adapter *adapter)
1982 {
1983         struct e1000_hw *hw = &adapter->hw;
1984         struct e1000_ring *rx_ring = adapter->rx_ring;
1985         struct e1000_ring *tx_ring = adapter->tx_ring;
1986         int vector = 0;
1987         u32 ctrl_ext, ivar = 0;
1988
1989         adapter->eiac_mask = 0;
1990
1991         /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1992         if (hw->mac.type == e1000_82574) {
1993                 u32 rfctl = er32(RFCTL);
1994
1995                 rfctl |= E1000_RFCTL_ACK_DIS;
1996                 ew32(RFCTL, rfctl);
1997         }
1998
1999         /* Configure Rx vector */
2000         rx_ring->ims_val = E1000_IMS_RXQ0;
2001         adapter->eiac_mask |= rx_ring->ims_val;
2002         if (rx_ring->itr_val)
2003                 writel(1000000000 / (rx_ring->itr_val * 256),
2004                        rx_ring->itr_register);
2005         else
2006                 writel(1, rx_ring->itr_register);
2007         ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
2008
2009         /* Configure Tx vector */
2010         tx_ring->ims_val = E1000_IMS_TXQ0;
2011         vector++;
2012         if (tx_ring->itr_val)
2013                 writel(1000000000 / (tx_ring->itr_val * 256),
2014                        tx_ring->itr_register);
2015         else
2016                 writel(1, tx_ring->itr_register);
2017         adapter->eiac_mask |= tx_ring->ims_val;
2018         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2019
2020         /* set vector for Other Causes, e.g. link changes */
2021         vector++;
2022         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2023         if (rx_ring->itr_val)
2024                 writel(1000000000 / (rx_ring->itr_val * 256),
2025                        hw->hw_addr + E1000_EITR_82574(vector));
2026         else
2027                 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2028
2029         /* Cause Tx interrupts on every write back */
2030         ivar |= BIT(31);
2031
2032         ew32(IVAR, ivar);
2033
2034         /* enable MSI-X PBA support */
2035         ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2036         ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2037         ew32(CTRL_EXT, ctrl_ext);
2038         e1e_flush();
2039 }
2040
2041 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2042 {
2043         if (adapter->msix_entries) {
2044                 pci_disable_msix(adapter->pdev);
2045                 kfree(adapter->msix_entries);
2046                 adapter->msix_entries = NULL;
2047         } else if (adapter->flags & FLAG_MSI_ENABLED) {
2048                 pci_disable_msi(adapter->pdev);
2049                 adapter->flags &= ~FLAG_MSI_ENABLED;
2050         }
2051 }
2052
2053 /**
2054  * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2055  *
2056  * Attempt to configure interrupts using the best available
2057  * capabilities of the hardware and kernel.
2058  **/
2059 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2060 {
2061         int err;
2062         int i;
2063
2064         switch (adapter->int_mode) {
2065         case E1000E_INT_MODE_MSIX:
2066                 if (adapter->flags & FLAG_HAS_MSIX) {
2067                         adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2068                         adapter->msix_entries = kcalloc(adapter->num_vectors,
2069                                                         sizeof(struct
2070                                                                msix_entry),
2071                                                         GFP_KERNEL);
2072                         if (adapter->msix_entries) {
2073                                 struct e1000_adapter *a = adapter;
2074
2075                                 for (i = 0; i < adapter->num_vectors; i++)
2076                                         adapter->msix_entries[i].entry = i;
2077
2078                                 err = pci_enable_msix_range(a->pdev,
2079                                                             a->msix_entries,
2080                                                             a->num_vectors,
2081                                                             a->num_vectors);
2082                                 if (err > 0)
2083                                         return;
2084                         }
2085                         /* MSI-X failed, so fall through and try MSI */
2086                         e_err("Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.\n");
2087                         e1000e_reset_interrupt_capability(adapter);
2088                 }
2089                 adapter->int_mode = E1000E_INT_MODE_MSI;
2090                 /* Fall through */
2091         case E1000E_INT_MODE_MSI:
2092                 if (!pci_enable_msi(adapter->pdev)) {
2093                         adapter->flags |= FLAG_MSI_ENABLED;
2094                 } else {
2095                         adapter->int_mode = E1000E_INT_MODE_LEGACY;
2096                         e_err("Failed to initialize MSI interrupts.  Falling back to legacy interrupts.\n");
2097                 }
2098                 /* Fall through */
2099         case E1000E_INT_MODE_LEGACY:
2100                 /* Don't do anything; this is the system default */
2101                 break;
2102         }
2103
2104         /* store the number of vectors being used */
2105         adapter->num_vectors = 1;
2106 }
2107
2108 /**
2109  * e1000_request_msix - Initialize MSI-X interrupts
2110  *
2111  * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2112  * kernel.
2113  **/
2114 static int e1000_request_msix(struct e1000_adapter *adapter)
2115 {
2116         struct net_device *netdev = adapter->netdev;
2117         int err = 0, vector = 0;
2118
2119         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2120                 snprintf(adapter->rx_ring->name,
2121                          sizeof(adapter->rx_ring->name) - 1,
2122                          "%.14s-rx-0", netdev->name);
2123         else
2124                 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2125         err = request_irq(adapter->msix_entries[vector].vector,
2126                           e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2127                           netdev);
2128         if (err)
2129                 return err;
2130         adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2131             E1000_EITR_82574(vector);
2132         adapter->rx_ring->itr_val = adapter->itr;
2133         vector++;
2134
2135         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2136                 snprintf(adapter->tx_ring->name,
2137                          sizeof(adapter->tx_ring->name) - 1,
2138                          "%.14s-tx-0", netdev->name);
2139         else
2140                 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2141         err = request_irq(adapter->msix_entries[vector].vector,
2142                           e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2143                           netdev);
2144         if (err)
2145                 return err;
2146         adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2147             E1000_EITR_82574(vector);
2148         adapter->tx_ring->itr_val = adapter->itr;
2149         vector++;
2150
2151         err = request_irq(adapter->msix_entries[vector].vector,
2152                           e1000_msix_other, 0, netdev->name, netdev);
2153         if (err)
2154                 return err;
2155
2156         e1000_configure_msix(adapter);
2157
2158         return 0;
2159 }
2160
2161 /**
2162  * e1000_request_irq - initialize interrupts
2163  *
2164  * Attempts to configure interrupts using the best available
2165  * capabilities of the hardware and kernel.
2166  **/
2167 static int e1000_request_irq(struct e1000_adapter *adapter)
2168 {
2169         struct net_device *netdev = adapter->netdev;
2170         int err;
2171
2172         if (adapter->msix_entries) {
2173                 err = e1000_request_msix(adapter);
2174                 if (!err)
2175                         return err;
2176                 /* fall back to MSI */
2177                 e1000e_reset_interrupt_capability(adapter);
2178                 adapter->int_mode = E1000E_INT_MODE_MSI;
2179                 e1000e_set_interrupt_capability(adapter);
2180         }
2181         if (adapter->flags & FLAG_MSI_ENABLED) {
2182                 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2183                                   netdev->name, netdev);
2184                 if (!err)
2185                         return err;
2186
2187                 /* fall back to legacy interrupt */
2188                 e1000e_reset_interrupt_capability(adapter);
2189                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2190         }
2191
2192         err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2193                           netdev->name, netdev);
2194         if (err)
2195                 e_err("Unable to allocate interrupt, Error: %d\n", err);
2196
2197         return err;
2198 }
2199
2200 static void e1000_free_irq(struct e1000_adapter *adapter)
2201 {
2202         struct net_device *netdev = adapter->netdev;
2203
2204         if (adapter->msix_entries) {
2205                 int vector = 0;
2206
2207                 free_irq(adapter->msix_entries[vector].vector, netdev);
2208                 vector++;
2209
2210                 free_irq(adapter->msix_entries[vector].vector, netdev);
2211                 vector++;
2212
2213                 /* Other Causes interrupt vector */
2214                 free_irq(adapter->msix_entries[vector].vector, netdev);
2215                 return;
2216         }
2217
2218         free_irq(adapter->pdev->irq, netdev);
2219 }
2220
2221 /**
2222  * e1000_irq_disable - Mask off interrupt generation on the NIC
2223  **/
2224 static void e1000_irq_disable(struct e1000_adapter *adapter)
2225 {
2226         struct e1000_hw *hw = &adapter->hw;
2227
2228         ew32(IMC, ~0);
2229         if (adapter->msix_entries)
2230                 ew32(EIAC_82574, 0);
2231         e1e_flush();
2232
2233         if (adapter->msix_entries) {
2234                 int i;
2235
2236                 for (i = 0; i < adapter->num_vectors; i++)
2237                         synchronize_irq(adapter->msix_entries[i].vector);
2238         } else {
2239                 synchronize_irq(adapter->pdev->irq);
2240         }
2241 }
2242
2243 /**
2244  * e1000_irq_enable - Enable default interrupt generation settings
2245  **/
2246 static void e1000_irq_enable(struct e1000_adapter *adapter)
2247 {
2248         struct e1000_hw *hw = &adapter->hw;
2249
2250         if (adapter->msix_entries) {
2251                 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2252                 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
2253                      IMS_OTHER_MASK);
2254         } else if ((hw->mac.type == e1000_pch_lpt) ||
2255                    (hw->mac.type == e1000_pch_spt)) {
2256                 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2257         } else {
2258                 ew32(IMS, IMS_ENABLE_MASK);
2259         }
2260         e1e_flush();
2261 }
2262
2263 /**
2264  * e1000e_get_hw_control - get control of the h/w from f/w
2265  * @adapter: address of board private structure
2266  *
2267  * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2268  * For ASF and Pass Through versions of f/w this means that
2269  * the driver is loaded. For AMT version (only with 82573)
2270  * of the f/w this means that the network i/f is open.
2271  **/
2272 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2273 {
2274         struct e1000_hw *hw = &adapter->hw;
2275         u32 ctrl_ext;
2276         u32 swsm;
2277
2278         /* Let firmware know the driver has taken over */
2279         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2280                 swsm = er32(SWSM);
2281                 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2282         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2283                 ctrl_ext = er32(CTRL_EXT);
2284                 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2285         }
2286 }
2287
2288 /**
2289  * e1000e_release_hw_control - release control of the h/w to f/w
2290  * @adapter: address of board private structure
2291  *
2292  * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2293  * For ASF and Pass Through versions of f/w this means that the
2294  * driver is no longer loaded. For AMT version (only with 82573) i
2295  * of the f/w this means that the network i/f is closed.
2296  *
2297  **/
2298 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2299 {
2300         struct e1000_hw *hw = &adapter->hw;
2301         u32 ctrl_ext;
2302         u32 swsm;
2303
2304         /* Let firmware taken over control of h/w */
2305         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2306                 swsm = er32(SWSM);
2307                 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2308         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2309                 ctrl_ext = er32(CTRL_EXT);
2310                 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2311         }
2312 }
2313
2314 /**
2315  * e1000_alloc_ring_dma - allocate memory for a ring structure
2316  **/
2317 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2318                                 struct e1000_ring *ring)
2319 {
2320         struct pci_dev *pdev = adapter->pdev;
2321
2322         ring->desc = dma_zalloc_coherent(&pdev->dev, ring->size, &ring->dma,
2323                                          GFP_KERNEL);
2324         if (!ring->desc)
2325                 return -ENOMEM;
2326
2327         return 0;
2328 }
2329
2330 /**
2331  * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2332  * @tx_ring: Tx descriptor ring
2333  *
2334  * Return 0 on success, negative on failure
2335  **/
2336 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2337 {
2338         struct e1000_adapter *adapter = tx_ring->adapter;
2339         int err = -ENOMEM, size;
2340
2341         size = sizeof(struct e1000_buffer) * tx_ring->count;
2342         tx_ring->buffer_info = vzalloc(size);
2343         if (!tx_ring->buffer_info)
2344                 goto err;
2345
2346         /* round up to nearest 4K */
2347         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2348         tx_ring->size = ALIGN(tx_ring->size, 4096);
2349
2350         err = e1000_alloc_ring_dma(adapter, tx_ring);
2351         if (err)
2352                 goto err;
2353
2354         tx_ring->next_to_use = 0;
2355         tx_ring->next_to_clean = 0;
2356
2357         return 0;
2358 err:
2359         vfree(tx_ring->buffer_info);
2360         e_err("Unable to allocate memory for the transmit descriptor ring\n");
2361         return err;
2362 }
2363
2364 /**
2365  * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2366  * @rx_ring: Rx descriptor ring
2367  *
2368  * Returns 0 on success, negative on failure
2369  **/
2370 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2371 {
2372         struct e1000_adapter *adapter = rx_ring->adapter;
2373         struct e1000_buffer *buffer_info;
2374         int i, size, desc_len, err = -ENOMEM;
2375
2376         size = sizeof(struct e1000_buffer) * rx_ring->count;
2377         rx_ring->buffer_info = vzalloc(size);
2378         if (!rx_ring->buffer_info)
2379                 goto err;
2380
2381         for (i = 0; i < rx_ring->count; i++) {
2382                 buffer_info = &rx_ring->buffer_info[i];
2383                 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2384                                                 sizeof(struct e1000_ps_page),
2385                                                 GFP_KERNEL);
2386                 if (!buffer_info->ps_pages)
2387                         goto err_pages;
2388         }
2389
2390         desc_len = sizeof(union e1000_rx_desc_packet_split);
2391
2392         /* Round up to nearest 4K */
2393         rx_ring->size = rx_ring->count * desc_len;
2394         rx_ring->size = ALIGN(rx_ring->size, 4096);
2395
2396         err = e1000_alloc_ring_dma(adapter, rx_ring);
2397         if (err)
2398                 goto err_pages;
2399
2400         rx_ring->next_to_clean = 0;
2401         rx_ring->next_to_use = 0;
2402         rx_ring->rx_skb_top = NULL;
2403
2404         return 0;
2405
2406 err_pages:
2407         for (i = 0; i < rx_ring->count; i++) {
2408                 buffer_info = &rx_ring->buffer_info[i];
2409                 kfree(buffer_info->ps_pages);
2410         }
2411 err:
2412         vfree(rx_ring->buffer_info);
2413         e_err("Unable to allocate memory for the receive descriptor ring\n");
2414         return err;
2415 }
2416
2417 /**
2418  * e1000_clean_tx_ring - Free Tx Buffers
2419  * @tx_ring: Tx descriptor ring
2420  **/
2421 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2422 {
2423         struct e1000_adapter *adapter = tx_ring->adapter;
2424         struct e1000_buffer *buffer_info;
2425         unsigned long size;
2426         unsigned int i;
2427
2428         for (i = 0; i < tx_ring->count; i++) {
2429                 buffer_info = &tx_ring->buffer_info[i];
2430                 e1000_put_txbuf(tx_ring, buffer_info);
2431         }
2432
2433         netdev_reset_queue(adapter->netdev);
2434         size = sizeof(struct e1000_buffer) * tx_ring->count;
2435         memset(tx_ring->buffer_info, 0, size);
2436
2437         memset(tx_ring->desc, 0, tx_ring->size);
2438
2439         tx_ring->next_to_use = 0;
2440         tx_ring->next_to_clean = 0;
2441 }
2442
2443 /**
2444  * e1000e_free_tx_resources - Free Tx Resources per Queue
2445  * @tx_ring: Tx descriptor ring
2446  *
2447  * Free all transmit software resources
2448  **/
2449 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2450 {
2451         struct e1000_adapter *adapter = tx_ring->adapter;
2452         struct pci_dev *pdev = adapter->pdev;
2453
2454         e1000_clean_tx_ring(tx_ring);
2455
2456         vfree(tx_ring->buffer_info);
2457         tx_ring->buffer_info = NULL;
2458
2459         dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2460                           tx_ring->dma);
2461         tx_ring->desc = NULL;
2462 }
2463
2464 /**
2465  * e1000e_free_rx_resources - Free Rx Resources
2466  * @rx_ring: Rx descriptor ring
2467  *
2468  * Free all receive software resources
2469  **/
2470 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2471 {
2472         struct e1000_adapter *adapter = rx_ring->adapter;
2473         struct pci_dev *pdev = adapter->pdev;
2474         int i;
2475
2476         e1000_clean_rx_ring(rx_ring);
2477
2478         for (i = 0; i < rx_ring->count; i++)
2479                 kfree(rx_ring->buffer_info[i].ps_pages);
2480
2481         vfree(rx_ring->buffer_info);
2482         rx_ring->buffer_info = NULL;
2483
2484         dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2485                           rx_ring->dma);
2486         rx_ring->desc = NULL;
2487 }
2488
2489 /**
2490  * e1000_update_itr - update the dynamic ITR value based on statistics
2491  * @adapter: pointer to adapter
2492  * @itr_setting: current adapter->itr
2493  * @packets: the number of packets during this measurement interval
2494  * @bytes: the number of bytes during this measurement interval
2495  *
2496  *      Stores a new ITR value based on packets and byte
2497  *      counts during the last interrupt.  The advantage of per interrupt
2498  *      computation is faster updates and more accurate ITR for the current
2499  *      traffic pattern.  Constants in this function were computed
2500  *      based on theoretical maximum wire speed and thresholds were set based
2501  *      on testing data as well as attempting to minimize response time
2502  *      while increasing bulk throughput.  This functionality is controlled
2503  *      by the InterruptThrottleRate module parameter.
2504  **/
2505 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2506 {
2507         unsigned int retval = itr_setting;
2508
2509         if (packets == 0)
2510                 return itr_setting;
2511
2512         switch (itr_setting) {
2513         case lowest_latency:
2514                 /* handle TSO and jumbo frames */
2515                 if (bytes / packets > 8000)
2516                         retval = bulk_latency;
2517                 else if ((packets < 5) && (bytes > 512))
2518                         retval = low_latency;
2519                 break;
2520         case low_latency:       /* 50 usec aka 20000 ints/s */
2521                 if (bytes > 10000) {
2522                         /* this if handles the TSO accounting */
2523                         if (bytes / packets > 8000)
2524                                 retval = bulk_latency;
2525                         else if ((packets < 10) || ((bytes / packets) > 1200))
2526                                 retval = bulk_latency;
2527                         else if ((packets > 35))
2528                                 retval = lowest_latency;
2529                 } else if (bytes / packets > 2000) {
2530                         retval = bulk_latency;
2531                 } else if (packets <= 2 && bytes < 512) {
2532                         retval = lowest_latency;
2533                 }
2534                 break;
2535         case bulk_latency:      /* 250 usec aka 4000 ints/s */
2536                 if (bytes > 25000) {
2537                         if (packets > 35)
2538                                 retval = low_latency;
2539                 } else if (bytes < 6000) {
2540                         retval = low_latency;
2541                 }
2542                 break;
2543         }
2544
2545         return retval;
2546 }
2547
2548 static void e1000_set_itr(struct e1000_adapter *adapter)
2549 {
2550         u16 current_itr;
2551         u32 new_itr = adapter->itr;
2552
2553         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2554         if (adapter->link_speed != SPEED_1000) {
2555                 current_itr = 0;
2556                 new_itr = 4000;
2557                 goto set_itr_now;
2558         }
2559
2560         if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2561                 new_itr = 0;
2562                 goto set_itr_now;
2563         }
2564
2565         adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2566                                            adapter->total_tx_packets,
2567                                            adapter->total_tx_bytes);
2568         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2569         if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2570                 adapter->tx_itr = low_latency;
2571
2572         adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2573                                            adapter->total_rx_packets,
2574                                            adapter->total_rx_bytes);
2575         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2576         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2577                 adapter->rx_itr = low_latency;
2578
2579         current_itr = max(adapter->rx_itr, adapter->tx_itr);
2580
2581         /* counts and packets in update_itr are dependent on these numbers */
2582         switch (current_itr) {
2583         case lowest_latency:
2584                 new_itr = 70000;
2585                 break;
2586         case low_latency:
2587                 new_itr = 20000;        /* aka hwitr = ~200 */
2588                 break;
2589         case bulk_latency:
2590                 new_itr = 4000;
2591                 break;
2592         default:
2593                 break;
2594         }
2595
2596 set_itr_now:
2597         if (new_itr != adapter->itr) {
2598                 /* this attempts to bias the interrupt rate towards Bulk
2599                  * by adding intermediate steps when interrupt rate is
2600                  * increasing
2601                  */
2602                 new_itr = new_itr > adapter->itr ?
2603                     min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2604                 adapter->itr = new_itr;
2605                 adapter->rx_ring->itr_val = new_itr;
2606                 if (adapter->msix_entries)
2607                         adapter->rx_ring->set_itr = 1;
2608                 else
2609                         e1000e_write_itr(adapter, new_itr);
2610         }
2611 }
2612
2613 /**
2614  * e1000e_write_itr - write the ITR value to the appropriate registers
2615  * @adapter: address of board private structure
2616  * @itr: new ITR value to program
2617  *
2618  * e1000e_write_itr determines if the adapter is in MSI-X mode
2619  * and, if so, writes the EITR registers with the ITR value.
2620  * Otherwise, it writes the ITR value into the ITR register.
2621  **/
2622 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2623 {
2624         struct e1000_hw *hw = &adapter->hw;
2625         u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2626
2627         if (adapter->msix_entries) {
2628                 int vector;
2629
2630                 for (vector = 0; vector < adapter->num_vectors; vector++)
2631                         writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2632         } else {
2633                 ew32(ITR, new_itr);
2634         }
2635 }
2636
2637 /**
2638  * e1000_alloc_queues - Allocate memory for all rings
2639  * @adapter: board private structure to initialize
2640  **/
2641 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2642 {
2643         int size = sizeof(struct e1000_ring);
2644
2645         adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2646         if (!adapter->tx_ring)
2647                 goto err;
2648         adapter->tx_ring->count = adapter->tx_ring_count;
2649         adapter->tx_ring->adapter = adapter;
2650
2651         adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2652         if (!adapter->rx_ring)
2653                 goto err;
2654         adapter->rx_ring->count = adapter->rx_ring_count;
2655         adapter->rx_ring->adapter = adapter;
2656
2657         return 0;
2658 err:
2659         e_err("Unable to allocate memory for queues\n");
2660         kfree(adapter->rx_ring);
2661         kfree(adapter->tx_ring);
2662         return -ENOMEM;
2663 }
2664
2665 /**
2666  * e1000e_poll - NAPI Rx polling callback
2667  * @napi: struct associated with this polling callback
2668  * @weight: number of packets driver is allowed to process this poll
2669  **/
2670 static int e1000e_poll(struct napi_struct *napi, int weight)
2671 {
2672         struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2673                                                      napi);
2674         struct e1000_hw *hw = &adapter->hw;
2675         struct net_device *poll_dev = adapter->netdev;
2676         int tx_cleaned = 1, work_done = 0;
2677
2678         adapter = netdev_priv(poll_dev);
2679
2680         if (!adapter->msix_entries ||
2681             (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2682                 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2683
2684         adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2685
2686         if (!tx_cleaned)
2687                 work_done = weight;
2688
2689         /* If weight not fully consumed, exit the polling mode */
2690         if (work_done < weight) {
2691                 if (adapter->itr_setting & 3)
2692                         e1000_set_itr(adapter);
2693                 napi_complete_done(napi, work_done);
2694                 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2695                         if (adapter->msix_entries)
2696                                 ew32(IMS, adapter->rx_ring->ims_val);
2697                         else
2698                                 e1000_irq_enable(adapter);
2699                 }
2700         }
2701
2702         return work_done;
2703 }
2704
2705 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2706                                  __always_unused __be16 proto, u16 vid)
2707 {
2708         struct e1000_adapter *adapter = netdev_priv(netdev);
2709         struct e1000_hw *hw = &adapter->hw;
2710         u32 vfta, index;
2711
2712         /* don't update vlan cookie if already programmed */
2713         if ((adapter->hw.mng_cookie.status &
2714              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2715             (vid == adapter->mng_vlan_id))
2716                 return 0;
2717
2718         /* add VID to filter table */
2719         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2720                 index = (vid >> 5) & 0x7F;
2721                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2722                 vfta |= BIT((vid & 0x1F));
2723                 hw->mac.ops.write_vfta(hw, index, vfta);
2724         }
2725
2726         set_bit(vid, adapter->active_vlans);
2727
2728         return 0;
2729 }
2730
2731 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2732                                   __always_unused __be16 proto, u16 vid)
2733 {
2734         struct e1000_adapter *adapter = netdev_priv(netdev);
2735         struct e1000_hw *hw = &adapter->hw;
2736         u32 vfta, index;
2737
2738         if ((adapter->hw.mng_cookie.status &
2739              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2740             (vid == adapter->mng_vlan_id)) {
2741                 /* release control to f/w */
2742                 e1000e_release_hw_control(adapter);
2743                 return 0;
2744         }
2745
2746         /* remove VID from filter table */
2747         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2748                 index = (vid >> 5) & 0x7F;
2749                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2750                 vfta &= ~BIT((vid & 0x1F));
2751                 hw->mac.ops.write_vfta(hw, index, vfta);
2752         }
2753
2754         clear_bit(vid, adapter->active_vlans);
2755
2756         return 0;
2757 }
2758
2759 /**
2760  * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2761  * @adapter: board private structure to initialize
2762  **/
2763 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2764 {
2765         struct net_device *netdev = adapter->netdev;
2766         struct e1000_hw *hw = &adapter->hw;
2767         u32 rctl;
2768
2769         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2770                 /* disable VLAN receive filtering */
2771                 rctl = er32(RCTL);
2772                 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2773                 ew32(RCTL, rctl);
2774
2775                 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2776                         e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2777                                                adapter->mng_vlan_id);
2778                         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2779                 }
2780         }
2781 }
2782
2783 /**
2784  * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2785  * @adapter: board private structure to initialize
2786  **/
2787 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2788 {
2789         struct e1000_hw *hw = &adapter->hw;
2790         u32 rctl;
2791
2792         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2793                 /* enable VLAN receive filtering */
2794                 rctl = er32(RCTL);
2795                 rctl |= E1000_RCTL_VFE;
2796                 rctl &= ~E1000_RCTL_CFIEN;
2797                 ew32(RCTL, rctl);
2798         }
2799 }
2800
2801 /**
2802  * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping
2803  * @adapter: board private structure to initialize
2804  **/
2805 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2806 {
2807         struct e1000_hw *hw = &adapter->hw;
2808         u32 ctrl;
2809
2810         /* disable VLAN tag insert/strip */
2811         ctrl = er32(CTRL);
2812         ctrl &= ~E1000_CTRL_VME;
2813         ew32(CTRL, ctrl);
2814 }
2815
2816 /**
2817  * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2818  * @adapter: board private structure to initialize
2819  **/
2820 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2821 {
2822         struct e1000_hw *hw = &adapter->hw;
2823         u32 ctrl;
2824
2825         /* enable VLAN tag insert/strip */
2826         ctrl = er32(CTRL);
2827         ctrl |= E1000_CTRL_VME;
2828         ew32(CTRL, ctrl);
2829 }
2830
2831 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2832 {
2833         struct net_device *netdev = adapter->netdev;
2834         u16 vid = adapter->hw.mng_cookie.vlan_id;
2835         u16 old_vid = adapter->mng_vlan_id;
2836
2837         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2838                 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2839                 adapter->mng_vlan_id = vid;
2840         }
2841
2842         if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2843                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2844 }
2845
2846 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2847 {
2848         u16 vid;
2849
2850         e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2851
2852         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2853             e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2854 }
2855
2856 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2857 {
2858         struct e1000_hw *hw = &adapter->hw;
2859         u32 manc, manc2h, mdef, i, j;
2860
2861         if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2862                 return;
2863
2864         manc = er32(MANC);
2865
2866         /* enable receiving management packets to the host. this will probably
2867          * generate destination unreachable messages from the host OS, but
2868          * the packets will be handled on SMBUS
2869          */
2870         manc |= E1000_MANC_EN_MNG2HOST;
2871         manc2h = er32(MANC2H);
2872
2873         switch (hw->mac.type) {
2874         default:
2875                 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2876                 break;
2877         case e1000_82574:
2878         case e1000_82583:
2879                 /* Check if IPMI pass-through decision filter already exists;
2880                  * if so, enable it.
2881                  */
2882                 for (i = 0, j = 0; i < 8; i++) {
2883                         mdef = er32(MDEF(i));
2884
2885                         /* Ignore filters with anything other than IPMI ports */
2886                         if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2887                                 continue;
2888
2889                         /* Enable this decision filter in MANC2H */
2890                         if (mdef)
2891                                 manc2h |= BIT(i);
2892
2893                         j |= mdef;
2894                 }
2895
2896                 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2897                         break;
2898
2899                 /* Create new decision filter in an empty filter */
2900                 for (i = 0, j = 0; i < 8; i++)
2901                         if (er32(MDEF(i)) == 0) {
2902                                 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2903                                                E1000_MDEF_PORT_664));
2904                                 manc2h |= BIT(1);
2905                                 j++;
2906                                 break;
2907                         }
2908
2909                 if (!j)
2910                         e_warn("Unable to create IPMI pass-through filter\n");
2911                 break;
2912         }
2913
2914         ew32(MANC2H, manc2h);
2915         ew32(MANC, manc);
2916 }
2917
2918 /**
2919  * e1000_configure_tx - Configure Transmit Unit after Reset
2920  * @adapter: board private structure
2921  *
2922  * Configure the Tx unit of the MAC after a reset.
2923  **/
2924 static void e1000_configure_tx(struct e1000_adapter *adapter)
2925 {
2926         struct e1000_hw *hw = &adapter->hw;
2927         struct e1000_ring *tx_ring = adapter->tx_ring;
2928         u64 tdba;
2929         u32 tdlen, tctl, tarc;
2930
2931         /* Setup the HW Tx Head and Tail descriptor pointers */
2932         tdba = tx_ring->dma;
2933         tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2934         ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2935         ew32(TDBAH(0), (tdba >> 32));
2936         ew32(TDLEN(0), tdlen);
2937         ew32(TDH(0), 0);
2938         ew32(TDT(0), 0);
2939         tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2940         tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2941
2942         writel(0, tx_ring->head);
2943         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2944                 e1000e_update_tdt_wa(tx_ring, 0);
2945         else
2946                 writel(0, tx_ring->tail);
2947
2948         /* Set the Tx Interrupt Delay register */
2949         ew32(TIDV, adapter->tx_int_delay);
2950         /* Tx irq moderation */
2951         ew32(TADV, adapter->tx_abs_int_delay);
2952
2953         if (adapter->flags2 & FLAG2_DMA_BURST) {
2954                 u32 txdctl = er32(TXDCTL(0));
2955
2956                 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2957                             E1000_TXDCTL_WTHRESH);
2958                 /* set up some performance related parameters to encourage the
2959                  * hardware to use the bus more efficiently in bursts, depends
2960                  * on the tx_int_delay to be enabled,
2961                  * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2962                  * hthresh = 1 ==> prefetch when one or more available
2963                  * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2964                  * BEWARE: this seems to work but should be considered first if
2965                  * there are Tx hangs or other Tx related bugs
2966                  */
2967                 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2968                 ew32(TXDCTL(0), txdctl);
2969         }
2970         /* erratum work around: set txdctl the same for both queues */
2971         ew32(TXDCTL(1), er32(TXDCTL(0)));
2972
2973         /* Program the Transmit Control Register */
2974         tctl = er32(TCTL);
2975         tctl &= ~E1000_TCTL_CT;
2976         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2977                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2978
2979         if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2980                 tarc = er32(TARC(0));
2981                 /* set the speed mode bit, we'll clear it if we're not at
2982                  * gigabit link later
2983                  */
2984 #define SPEED_MODE_BIT BIT(21)
2985                 tarc |= SPEED_MODE_BIT;
2986                 ew32(TARC(0), tarc);
2987         }
2988
2989         /* errata: program both queues to unweighted RR */
2990         if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2991                 tarc = er32(TARC(0));
2992                 tarc |= 1;
2993                 ew32(TARC(0), tarc);
2994                 tarc = er32(TARC(1));
2995                 tarc |= 1;
2996                 ew32(TARC(1), tarc);
2997         }
2998
2999         /* Setup Transmit Descriptor Settings for eop descriptor */
3000         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
3001
3002         /* only set IDE if we are delaying interrupts using the timers */
3003         if (adapter->tx_int_delay)
3004                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3005
3006         /* enable Report Status bit */
3007         adapter->txd_cmd |= E1000_TXD_CMD_RS;
3008
3009         ew32(TCTL, tctl);
3010
3011         hw->mac.ops.config_collision_dist(hw);
3012
3013         /* SPT Si errata workaround to avoid data corruption */
3014         if (hw->mac.type == e1000_pch_spt) {
3015                 u32 reg_val;
3016
3017                 reg_val = er32(IOSFPC);
3018                 reg_val |= E1000_RCTL_RDMTS_HEX;
3019                 ew32(IOSFPC, reg_val);
3020
3021                 reg_val = er32(TARC(0));
3022                 reg_val |= E1000_TARC0_CB_MULTIQ_3_REQ;
3023                 ew32(TARC(0), reg_val);
3024         }
3025 }
3026
3027 /**
3028  * e1000_setup_rctl - configure the receive control registers
3029  * @adapter: Board private structure
3030  **/
3031 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3032                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3033 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3034 {
3035         struct e1000_hw *hw = &adapter->hw;
3036         u32 rctl, rfctl;
3037         u32 pages = 0;
3038
3039         /* Workaround Si errata on PCHx - configure jumbo frame flow.
3040          * If jumbo frames not set, program related MAC/PHY registers
3041          * to h/w defaults
3042          */
3043         if (hw->mac.type >= e1000_pch2lan) {
3044                 s32 ret_val;
3045
3046                 if (adapter->netdev->mtu > ETH_DATA_LEN)
3047                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3048                 else
3049                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3050
3051                 if (ret_val)
3052                         e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3053         }
3054
3055         /* Program MC offset vector base */
3056         rctl = er32(RCTL);
3057         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3058         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3059             E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3060             (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3061
3062         /* Do not Store bad packets */
3063         rctl &= ~E1000_RCTL_SBP;
3064
3065         /* Enable Long Packet receive */
3066         if (adapter->netdev->mtu <= ETH_DATA_LEN)
3067                 rctl &= ~E1000_RCTL_LPE;
3068         else
3069                 rctl |= E1000_RCTL_LPE;
3070
3071         /* Some systems expect that the CRC is included in SMBUS traffic. The
3072          * hardware strips the CRC before sending to both SMBUS (BMC) and to
3073          * host memory when this is enabled
3074          */
3075         if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3076                 rctl |= E1000_RCTL_SECRC;
3077
3078         /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3079         if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3080                 u16 phy_data;
3081
3082                 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3083                 phy_data &= 0xfff8;
3084                 phy_data |= BIT(2);
3085                 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3086
3087                 e1e_rphy(hw, 22, &phy_data);
3088                 phy_data &= 0x0fff;
3089                 phy_data |= BIT(14);
3090                 e1e_wphy(hw, 0x10, 0x2823);
3091                 e1e_wphy(hw, 0x11, 0x0003);
3092                 e1e_wphy(hw, 22, phy_data);
3093         }
3094
3095         /* Setup buffer sizes */
3096         rctl &= ~E1000_RCTL_SZ_4096;
3097         rctl |= E1000_RCTL_BSEX;
3098         switch (adapter->rx_buffer_len) {
3099         case 2048:
3100         default:
3101                 rctl |= E1000_RCTL_SZ_2048;
3102                 rctl &= ~E1000_RCTL_BSEX;
3103                 break;
3104         case 4096:
3105                 rctl |= E1000_RCTL_SZ_4096;
3106                 break;
3107         case 8192:
3108                 rctl |= E1000_RCTL_SZ_8192;
3109                 break;
3110         case 16384:
3111                 rctl |= E1000_RCTL_SZ_16384;
3112                 break;
3113         }
3114
3115         /* Enable Extended Status in all Receive Descriptors */
3116         rfctl = er32(RFCTL);
3117         rfctl |= E1000_RFCTL_EXTEN;
3118         ew32(RFCTL, rfctl);
3119
3120         /* 82571 and greater support packet-split where the protocol
3121          * header is placed in skb->data and the packet data is
3122          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3123          * In the case of a non-split, skb->data is linearly filled,
3124          * followed by the page buffers.  Therefore, skb->data is
3125          * sized to hold the largest protocol header.
3126          *
3127          * allocations using alloc_page take too long for regular MTU
3128          * so only enable packet split for jumbo frames
3129          *
3130          * Using pages when the page size is greater than 16k wastes
3131          * a lot of memory, since we allocate 3 pages at all times
3132          * per packet.
3133          */
3134         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3135         if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3136                 adapter->rx_ps_pages = pages;
3137         else
3138                 adapter->rx_ps_pages = 0;
3139
3140         if (adapter->rx_ps_pages) {
3141                 u32 psrctl = 0;
3142
3143                 /* Enable Packet split descriptors */
3144                 rctl |= E1000_RCTL_DTYP_PS;
3145
3146                 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3147
3148                 switch (adapter->rx_ps_pages) {
3149                 case 3:
3150                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3151                         /* fall-through */
3152                 case 2:
3153                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3154                         /* fall-through */
3155                 case 1:
3156                         psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3157                         break;
3158                 }
3159
3160                 ew32(PSRCTL, psrctl);
3161         }
3162
3163         /* This is useful for sniffing bad packets. */
3164         if (adapter->netdev->features & NETIF_F_RXALL) {
3165                 /* UPE and MPE will be handled by normal PROMISC logic
3166                  * in e1000e_set_rx_mode
3167                  */
3168                 rctl |= (E1000_RCTL_SBP |       /* Receive bad packets */
3169                          E1000_RCTL_BAM |       /* RX All Bcast Pkts */
3170                          E1000_RCTL_PMCF);      /* RX All MAC Ctrl Pkts */
3171
3172                 rctl &= ~(E1000_RCTL_VFE |      /* Disable VLAN filter */
3173                           E1000_RCTL_DPF |      /* Allow filtered pause */
3174                           E1000_RCTL_CFIEN);    /* Dis VLAN CFIEN Filter */
3175                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3176                  * and that breaks VLANs.
3177                  */
3178         }
3179
3180         ew32(RCTL, rctl);
3181         /* just started the receive unit, no need to restart */
3182         adapter->flags &= ~FLAG_RESTART_NOW;
3183 }
3184
3185 /**
3186  * e1000_configure_rx - Configure Receive Unit after Reset
3187  * @adapter: board private structure
3188  *
3189  * Configure the Rx unit of the MAC after a reset.
3190  **/
3191 static void e1000_configure_rx(struct e1000_adapter *adapter)
3192 {
3193         struct e1000_hw *hw = &adapter->hw;
3194         struct e1000_ring *rx_ring = adapter->rx_ring;
3195         u64 rdba;
3196         u32 rdlen, rctl, rxcsum, ctrl_ext;
3197
3198         if (adapter->rx_ps_pages) {
3199                 /* this is a 32 byte descriptor */
3200                 rdlen = rx_ring->count *
3201                     sizeof(union e1000_rx_desc_packet_split);
3202                 adapter->clean_rx = e1000_clean_rx_irq_ps;
3203                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3204         } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3205                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3206                 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3207                 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3208         } else {
3209                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3210                 adapter->clean_rx = e1000_clean_rx_irq;
3211                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3212         }
3213
3214         /* disable receives while setting up the descriptors */
3215         rctl = er32(RCTL);
3216         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3217                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3218         e1e_flush();
3219         usleep_range(10000, 20000);
3220
3221         if (adapter->flags2 & FLAG2_DMA_BURST) {
3222                 /* set the writeback threshold (only takes effect if the RDTR
3223                  * is set). set GRAN=1 and write back up to 0x4 worth, and
3224                  * enable prefetching of 0x20 Rx descriptors
3225                  * granularity = 01
3226                  * wthresh = 04,
3227                  * hthresh = 04,
3228                  * pthresh = 0x20
3229                  */
3230                 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3231                 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3232
3233                 /* override the delay timers for enabling bursting, only if
3234                  * the value was not set by the user via module options
3235                  */
3236                 if (adapter->rx_int_delay == DEFAULT_RDTR)
3237                         adapter->rx_int_delay = BURST_RDTR;
3238                 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3239                         adapter->rx_abs_int_delay = BURST_RADV;
3240         }
3241
3242         /* set the Receive Delay Timer Register */
3243         ew32(RDTR, adapter->rx_int_delay);
3244
3245         /* irq moderation */
3246         ew32(RADV, adapter->rx_abs_int_delay);
3247         if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3248                 e1000e_write_itr(adapter, adapter->itr);
3249
3250         ctrl_ext = er32(CTRL_EXT);
3251         /* Auto-Mask interrupts upon ICR access */
3252         ctrl_ext |= E1000_CTRL_EXT_IAME;
3253         ew32(IAM, 0xffffffff);
3254         ew32(CTRL_EXT, ctrl_ext);
3255         e1e_flush();
3256
3257         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3258          * the Base and Length of the Rx Descriptor Ring
3259          */
3260         rdba = rx_ring->dma;
3261         ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3262         ew32(RDBAH(0), (rdba >> 32));
3263         ew32(RDLEN(0), rdlen);
3264         ew32(RDH(0), 0);
3265         ew32(RDT(0), 0);
3266         rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3267         rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3268
3269         writel(0, rx_ring->head);
3270         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3271                 e1000e_update_rdt_wa(rx_ring, 0);
3272         else
3273                 writel(0, rx_ring->tail);
3274
3275         /* Enable Receive Checksum Offload for TCP and UDP */
3276         rxcsum = er32(RXCSUM);
3277         if (adapter->netdev->features & NETIF_F_RXCSUM)
3278                 rxcsum |= E1000_RXCSUM_TUOFL;
3279         else
3280                 rxcsum &= ~E1000_RXCSUM_TUOFL;
3281         ew32(RXCSUM, rxcsum);
3282
3283         /* With jumbo frames, excessive C-state transition latencies result
3284          * in dropped transactions.
3285          */
3286         if (adapter->netdev->mtu > ETH_DATA_LEN) {
3287                 u32 lat =
3288                     ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3289                      adapter->max_frame_size) * 8 / 1000;
3290
3291                 if (adapter->flags & FLAG_IS_ICH) {
3292                         u32 rxdctl = er32(RXDCTL(0));
3293
3294                         ew32(RXDCTL(0), rxdctl | 0x3);
3295                 }
3296
3297                 pm_qos_update_request(&adapter->pm_qos_req, lat);
3298         } else {
3299                 pm_qos_update_request(&adapter->pm_qos_req,
3300                                       PM_QOS_DEFAULT_VALUE);
3301         }
3302
3303         /* Enable Receives */
3304         ew32(RCTL, rctl);
3305 }
3306
3307 /**
3308  * e1000e_write_mc_addr_list - write multicast addresses to MTA
3309  * @netdev: network interface device structure
3310  *
3311  * Writes multicast address list to the MTA hash table.
3312  * Returns: -ENOMEM on failure
3313  *                0 on no addresses written
3314  *                X on writing X addresses to MTA
3315  */
3316 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3317 {
3318         struct e1000_adapter *adapter = netdev_priv(netdev);
3319         struct e1000_hw *hw = &adapter->hw;
3320         struct netdev_hw_addr *ha;
3321         u8 *mta_list;
3322         int i;
3323
3324         if (netdev_mc_empty(netdev)) {
3325                 /* nothing to program, so clear mc list */
3326                 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3327                 return 0;
3328         }
3329
3330         mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3331         if (!mta_list)
3332                 return -ENOMEM;
3333
3334         /* update_mc_addr_list expects a packed array of only addresses. */
3335         i = 0;
3336         netdev_for_each_mc_addr(ha, netdev)
3337             memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3338
3339         hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3340         kfree(mta_list);
3341
3342         return netdev_mc_count(netdev);
3343 }
3344
3345 /**
3346  * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3347  * @netdev: network interface device structure
3348  *
3349  * Writes unicast address list to the RAR table.
3350  * Returns: -ENOMEM on failure/insufficient address space
3351  *                0 on no addresses written
3352  *                X on writing X addresses to the RAR table
3353  **/
3354 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3355 {
3356         struct e1000_adapter *adapter = netdev_priv(netdev);
3357         struct e1000_hw *hw = &adapter->hw;
3358         unsigned int rar_entries;
3359         int count = 0;
3360
3361         rar_entries = hw->mac.ops.rar_get_count(hw);
3362
3363         /* save a rar entry for our hardware address */
3364         rar_entries--;
3365
3366         /* save a rar entry for the LAA workaround */
3367         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3368                 rar_entries--;
3369
3370         /* return ENOMEM indicating insufficient memory for addresses */
3371         if (netdev_uc_count(netdev) > rar_entries)
3372                 return -ENOMEM;
3373
3374         if (!netdev_uc_empty(netdev) && rar_entries) {
3375                 struct netdev_hw_addr *ha;
3376
3377                 /* write the addresses in reverse order to avoid write
3378                  * combining
3379                  */
3380                 netdev_for_each_uc_addr(ha, netdev) {
3381                         int ret_val;
3382
3383                         if (!rar_entries)
3384                                 break;
3385                         ret_val = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3386                         if (ret_val < 0)
3387                                 return -ENOMEM;
3388                         count++;
3389                 }
3390         }
3391
3392         /* zero out the remaining RAR entries not used above */
3393         for (; rar_entries > 0; rar_entries--) {
3394                 ew32(RAH(rar_entries), 0);
3395                 ew32(RAL(rar_entries), 0);
3396         }
3397         e1e_flush();
3398
3399         return count;
3400 }
3401
3402 /**
3403  * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3404  * @netdev: network interface device structure
3405  *
3406  * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3407  * address list or the network interface flags are updated.  This routine is
3408  * responsible for configuring the hardware for proper unicast, multicast,
3409  * promiscuous mode, and all-multi behavior.
3410  **/
3411 static void e1000e_set_rx_mode(struct net_device *netdev)
3412 {
3413         struct e1000_adapter *adapter = netdev_priv(netdev);
3414         struct e1000_hw *hw = &adapter->hw;
3415         u32 rctl;
3416
3417         if (pm_runtime_suspended(netdev->dev.parent))
3418                 return;
3419
3420         /* Check for Promiscuous and All Multicast modes */
3421         rctl = er32(RCTL);
3422
3423         /* clear the affected bits */
3424         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3425
3426         if (netdev->flags & IFF_PROMISC) {
3427                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3428                 /* Do not hardware filter VLANs in promisc mode */
3429                 e1000e_vlan_filter_disable(adapter);
3430         } else {
3431                 int count;
3432
3433                 if (netdev->flags & IFF_ALLMULTI) {
3434                         rctl |= E1000_RCTL_MPE;
3435                 } else {
3436                         /* Write addresses to the MTA, if the attempt fails
3437                          * then we should just turn on promiscuous mode so
3438                          * that we can at least receive multicast traffic
3439                          */
3440                         count = e1000e_write_mc_addr_list(netdev);
3441                         if (count < 0)
3442                                 rctl |= E1000_RCTL_MPE;
3443                 }
3444                 e1000e_vlan_filter_enable(adapter);
3445                 /* Write addresses to available RAR registers, if there is not
3446                  * sufficient space to store all the addresses then enable
3447                  * unicast promiscuous mode
3448                  */
3449                 count = e1000e_write_uc_addr_list(netdev);
3450                 if (count < 0)
3451                         rctl |= E1000_RCTL_UPE;
3452         }
3453
3454         ew32(RCTL, rctl);
3455
3456         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3457                 e1000e_vlan_strip_enable(adapter);
3458         else
3459                 e1000e_vlan_strip_disable(adapter);
3460 }
3461
3462 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3463 {
3464         struct e1000_hw *hw = &adapter->hw;
3465         u32 mrqc, rxcsum;
3466         u32 rss_key[10];
3467         int i;
3468
3469         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3470         for (i = 0; i < 10; i++)
3471                 ew32(RSSRK(i), rss_key[i]);
3472
3473         /* Direct all traffic to queue 0 */
3474         for (i = 0; i < 32; i++)
3475                 ew32(RETA(i), 0);
3476
3477         /* Disable raw packet checksumming so that RSS hash is placed in
3478          * descriptor on writeback.
3479          */
3480         rxcsum = er32(RXCSUM);
3481         rxcsum |= E1000_RXCSUM_PCSD;
3482
3483         ew32(RXCSUM, rxcsum);
3484
3485         mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3486                 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3487                 E1000_MRQC_RSS_FIELD_IPV6 |
3488                 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3489                 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3490
3491         ew32(MRQC, mrqc);
3492 }
3493
3494 /**
3495  * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3496  * @adapter: board private structure
3497  * @timinca: pointer to returned time increment attributes
3498  *
3499  * Get attributes for incrementing the System Time Register SYSTIML/H at
3500  * the default base frequency, and set the cyclecounter shift value.
3501  **/
3502 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3503 {
3504         struct e1000_hw *hw = &adapter->hw;
3505         u32 incvalue, incperiod, shift;
3506
3507         /* Make sure clock is enabled on I217/I218/I219  before checking
3508          * the frequency
3509          */
3510         if (((hw->mac.type == e1000_pch_lpt) ||
3511              (hw->mac.type == e1000_pch_spt)) &&
3512             !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3513             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3514                 u32 fextnvm7 = er32(FEXTNVM7);
3515
3516                 if (!(fextnvm7 & BIT(0))) {
3517                         ew32(FEXTNVM7, fextnvm7 | BIT(0));
3518                         e1e_flush();
3519                 }
3520         }
3521
3522         switch (hw->mac.type) {
3523         case e1000_pch2lan:
3524                 /* Stable 96MHz frequency */
3525                 incperiod = INCPERIOD_96MHz;
3526                 incvalue = INCVALUE_96MHz;
3527                 shift = INCVALUE_SHIFT_96MHz;
3528                 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
3529                 break;
3530         case e1000_pch_lpt:
3531                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3532                         /* Stable 96MHz frequency */
3533                         incperiod = INCPERIOD_96MHz;
3534                         incvalue = INCVALUE_96MHz;
3535                         shift = INCVALUE_SHIFT_96MHz;
3536                         adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
3537                 } else {
3538                         /* Stable 25MHz frequency */
3539                         incperiod = INCPERIOD_25MHz;
3540                         incvalue = INCVALUE_25MHz;
3541                         shift = INCVALUE_SHIFT_25MHz;
3542                         adapter->cc.shift = shift;
3543                 }
3544                 break;
3545         case e1000_pch_spt:
3546                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3547                         /* Stable 24MHz frequency */
3548                         incperiod = INCPERIOD_24MHz;
3549                         incvalue = INCVALUE_24MHz;
3550                         shift = INCVALUE_SHIFT_24MHz;
3551                         adapter->cc.shift = shift;
3552                         break;
3553                 }
3554                 return -EINVAL;
3555         case e1000_82574:
3556         case e1000_82583:
3557                 /* Stable 25MHz frequency */
3558                 incperiod = INCPERIOD_25MHz;
3559                 incvalue = INCVALUE_25MHz;
3560                 shift = INCVALUE_SHIFT_25MHz;
3561                 adapter->cc.shift = shift;
3562                 break;
3563         default:
3564                 return -EINVAL;
3565         }
3566
3567         *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3568                     ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3569
3570         return 0;
3571 }
3572
3573 /**
3574  * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3575  * @adapter: board private structure
3576  *
3577  * Outgoing time stamping can be enabled and disabled. Play nice and
3578  * disable it when requested, although it shouldn't cause any overhead
3579  * when no packet needs it. At most one packet in the queue may be
3580  * marked for time stamping, otherwise it would be impossible to tell
3581  * for sure to which packet the hardware time stamp belongs.
3582  *
3583  * Incoming time stamping has to be configured via the hardware filters.
3584  * Not all combinations are supported, in particular event type has to be
3585  * specified. Matching the kind of event packet is not supported, with the
3586  * exception of "all V2 events regardless of level 2 or 4".
3587  **/
3588 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3589                                   struct hwtstamp_config *config)
3590 {
3591         struct e1000_hw *hw = &adapter->hw;
3592         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3593         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3594         u32 rxmtrl = 0;
3595         u16 rxudp = 0;
3596         bool is_l4 = false;
3597         bool is_l2 = false;
3598         u32 regval;
3599
3600         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3601                 return -EINVAL;
3602
3603         /* flags reserved for future extensions - must be zero */
3604         if (config->flags)
3605                 return -EINVAL;
3606
3607         switch (config->tx_type) {
3608         case HWTSTAMP_TX_OFF:
3609                 tsync_tx_ctl = 0;
3610                 break;
3611         case HWTSTAMP_TX_ON:
3612                 break;
3613         default:
3614                 return -ERANGE;
3615         }
3616
3617         switch (config->rx_filter) {
3618         case HWTSTAMP_FILTER_NONE:
3619                 tsync_rx_ctl = 0;
3620                 break;
3621         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3622                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3623                 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3624                 is_l4 = true;
3625                 break;
3626         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3627                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3628                 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3629                 is_l4 = true;
3630                 break;
3631         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3632                 /* Also time stamps V2 L2 Path Delay Request/Response */
3633                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3634                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3635                 is_l2 = true;
3636                 break;
3637         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3638                 /* Also time stamps V2 L2 Path Delay Request/Response. */
3639                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3640                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3641                 is_l2 = true;
3642                 break;
3643         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3644                 /* Hardware cannot filter just V2 L4 Sync messages;
3645                  * fall-through to V2 (both L2 and L4) Sync.
3646                  */
3647         case HWTSTAMP_FILTER_PTP_V2_SYNC:
3648                 /* Also time stamps V2 Path Delay Request/Response. */
3649                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3650                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3651                 is_l2 = true;
3652                 is_l4 = true;
3653                 break;
3654         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3655                 /* Hardware cannot filter just V2 L4 Delay Request messages;
3656                  * fall-through to V2 (both L2 and L4) Delay Request.
3657                  */
3658         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3659                 /* Also time stamps V2 Path Delay Request/Response. */
3660                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3661                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3662                 is_l2 = true;
3663                 is_l4 = true;
3664                 break;
3665         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3666         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3667                 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3668                  * fall-through to all V2 (both L2 and L4) Events.
3669                  */
3670         case HWTSTAMP_FILTER_PTP_V2_EVENT:
3671                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3672                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3673                 is_l2 = true;
3674                 is_l4 = true;
3675                 break;
3676         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3677                 /* For V1, the hardware can only filter Sync messages or
3678                  * Delay Request messages but not both so fall-through to
3679                  * time stamp all packets.
3680                  */
3681         case HWTSTAMP_FILTER_ALL:
3682                 is_l2 = true;
3683                 is_l4 = true;
3684                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3685                 config->rx_filter = HWTSTAMP_FILTER_ALL;
3686                 break;
3687         default:
3688                 return -ERANGE;
3689         }
3690
3691         adapter->hwtstamp_config = *config;
3692
3693         /* enable/disable Tx h/w time stamping */
3694         regval = er32(TSYNCTXCTL);
3695         regval &= ~E1000_TSYNCTXCTL_ENABLED;
3696         regval |= tsync_tx_ctl;
3697         ew32(TSYNCTXCTL, regval);
3698         if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3699             (regval & E1000_TSYNCTXCTL_ENABLED)) {
3700                 e_err("Timesync Tx Control register not set as expected\n");
3701                 return -EAGAIN;
3702         }
3703
3704         /* enable/disable Rx h/w time stamping */
3705         regval = er32(TSYNCRXCTL);
3706         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3707         regval |= tsync_rx_ctl;
3708         ew32(TSYNCRXCTL, regval);
3709         if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3710                                  E1000_TSYNCRXCTL_TYPE_MASK)) !=
3711             (regval & (E1000_TSYNCRXCTL_ENABLED |
3712                        E1000_TSYNCRXCTL_TYPE_MASK))) {
3713                 e_err("Timesync Rx Control register not set as expected\n");
3714                 return -EAGAIN;
3715         }
3716
3717         /* L2: define ethertype filter for time stamped packets */
3718         if (is_l2)
3719                 rxmtrl |= ETH_P_1588;
3720
3721         /* define which PTP packets get time stamped */
3722         ew32(RXMTRL, rxmtrl);
3723
3724         /* Filter by destination port */
3725         if (is_l4) {
3726                 rxudp = PTP_EV_PORT;
3727                 cpu_to_be16s(&rxudp);
3728         }
3729         ew32(RXUDP, rxudp);
3730
3731         e1e_flush();
3732
3733         /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3734         er32(RXSTMPH);
3735         er32(TXSTMPH);
3736
3737         return 0;
3738 }
3739
3740 /**
3741  * e1000_configure - configure the hardware for Rx and Tx
3742  * @adapter: private board structure
3743  **/
3744 static void e1000_configure(struct e1000_adapter *adapter)
3745 {
3746         struct e1000_ring *rx_ring = adapter->rx_ring;
3747
3748         e1000e_set_rx_mode(adapter->netdev);
3749
3750         e1000_restore_vlan(adapter);
3751         e1000_init_manageability_pt(adapter);
3752
3753         e1000_configure_tx(adapter);
3754
3755         if (adapter->netdev->features & NETIF_F_RXHASH)
3756                 e1000e_setup_rss_hash(adapter);
3757         e1000_setup_rctl(adapter);
3758         e1000_configure_rx(adapter);
3759         adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3760 }
3761
3762 /**
3763  * e1000e_power_up_phy - restore link in case the phy was powered down
3764  * @adapter: address of board private structure
3765  *
3766  * The phy may be powered down to save power and turn off link when the
3767  * driver is unloaded and wake on lan is not enabled (among others)
3768  * *** this routine MUST be followed by a call to e1000e_reset ***
3769  **/
3770 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3771 {
3772         if (adapter->hw.phy.ops.power_up)
3773                 adapter->hw.phy.ops.power_up(&adapter->hw);
3774
3775         adapter->hw.mac.ops.setup_link(&adapter->hw);
3776 }
3777
3778 /**
3779  * e1000_power_down_phy - Power down the PHY
3780  *
3781  * Power down the PHY so no link is implied when interface is down.
3782  * The PHY cannot be powered down if management or WoL is active.
3783  */
3784 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3785 {
3786         if (adapter->hw.phy.ops.power_down)
3787                 adapter->hw.phy.ops.power_down(&adapter->hw);
3788 }
3789
3790 /**
3791  * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3792  *
3793  * We want to clear all pending descriptors from the TX ring.
3794  * zeroing happens when the HW reads the regs. We  assign the ring itself as
3795  * the data of the next descriptor. We don't care about the data we are about
3796  * to reset the HW.
3797  */
3798 static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3799 {
3800         struct e1000_hw *hw = &adapter->hw;
3801         struct e1000_ring *tx_ring = adapter->tx_ring;
3802         struct e1000_tx_desc *tx_desc = NULL;
3803         u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3804         u16 size = 512;
3805
3806         tctl = er32(TCTL);
3807         ew32(TCTL, tctl | E1000_TCTL_EN);
3808         tdt = er32(TDT(0));
3809         BUG_ON(tdt != tx_ring->next_to_use);
3810         tx_desc =  E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3811         tx_desc->buffer_addr = tx_ring->dma;
3812
3813         tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3814         tx_desc->upper.data = 0;
3815         /* flush descriptors to memory before notifying the HW */
3816         wmb();
3817         tx_ring->next_to_use++;
3818         if (tx_ring->next_to_use == tx_ring->count)
3819                 tx_ring->next_to_use = 0;
3820         ew32(TDT(0), tx_ring->next_to_use);
3821         mmiowb();
3822         usleep_range(200, 250);
3823 }
3824
3825 /**
3826  * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3827  *
3828  * Mark all descriptors in the RX ring as consumed and disable the rx ring
3829  */
3830 static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3831 {
3832         u32 rctl, rxdctl;
3833         struct e1000_hw *hw = &adapter->hw;
3834
3835         rctl = er32(RCTL);
3836         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3837         e1e_flush();
3838         usleep_range(100, 150);
3839
3840         rxdctl = er32(RXDCTL(0));
3841         /* zero the lower 14 bits (prefetch and host thresholds) */
3842         rxdctl &= 0xffffc000;
3843
3844         /* update thresholds: prefetch threshold to 31, host threshold to 1
3845          * and make sure the granularity is "descriptors" and not "cache lines"
3846          */
3847         rxdctl |= (0x1F | BIT(8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3848
3849         ew32(RXDCTL(0), rxdctl);
3850         /* momentarily enable the RX ring for the changes to take effect */
3851         ew32(RCTL, rctl | E1000_RCTL_EN);
3852         e1e_flush();
3853         usleep_range(100, 150);
3854         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3855 }
3856
3857 /**
3858  * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3859  *
3860  * In i219, the descriptor rings must be emptied before resetting the HW
3861  * or before changing the device state to D3 during runtime (runtime PM).
3862  *
3863  * Failure to do this will cause the HW to enter a unit hang state which can
3864  * only be released by PCI reset on the device
3865  *
3866  */
3867
3868 static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3869 {
3870         u16 hang_state;
3871         u32 fext_nvm11, tdlen;
3872         struct e1000_hw *hw = &adapter->hw;
3873
3874         /* First, disable MULR fix in FEXTNVM11 */
3875         fext_nvm11 = er32(FEXTNVM11);
3876         fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3877         ew32(FEXTNVM11, fext_nvm11);
3878         /* do nothing if we're not in faulty state, or if the queue is empty */
3879         tdlen = er32(TDLEN(0));
3880         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3881                              &hang_state);
3882         if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3883                 return;
3884         e1000_flush_tx_ring(adapter);
3885         /* recheck, maybe the fault is caused by the rx ring */
3886         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3887                              &hang_state);
3888         if (hang_state & FLUSH_DESC_REQUIRED)
3889                 e1000_flush_rx_ring(adapter);
3890 }
3891
3892 /**
3893  * e1000e_systim_reset - reset the timesync registers after a hardware reset
3894  * @adapter: board private structure
3895  *
3896  * When the MAC is reset, all hardware bits for timesync will be reset to the
3897  * default values. This function will restore the settings last in place.
3898  * Since the clock SYSTIME registers are reset, we will simply restore the
3899  * cyclecounter to the kernel real clock time.
3900  **/
3901 static void e1000e_systim_reset(struct e1000_adapter *adapter)
3902 {
3903         struct ptp_clock_info *info = &adapter->ptp_clock_info;
3904         struct e1000_hw *hw = &adapter->hw;
3905         unsigned long flags;
3906         u32 timinca;
3907         s32 ret_val;
3908
3909         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3910                 return;
3911
3912         if (info->adjfreq) {
3913                 /* restore the previous ptp frequency delta */
3914                 ret_val = info->adjfreq(info, adapter->ptp_delta);
3915         } else {
3916                 /* set the default base frequency if no adjustment possible */
3917                 ret_val = e1000e_get_base_timinca(adapter, &timinca);
3918                 if (!ret_val)
3919                         ew32(TIMINCA, timinca);
3920         }
3921
3922         if (ret_val) {
3923                 dev_warn(&adapter->pdev->dev,
3924                          "Failed to restore TIMINCA clock rate delta: %d\n",
3925                          ret_val);
3926                 return;
3927         }
3928
3929         /* reset the systim ns time counter */
3930         spin_lock_irqsave(&adapter->systim_lock, flags);
3931         timecounter_init(&adapter->tc, &adapter->cc,
3932                          ktime_to_ns(ktime_get_real()));
3933         spin_unlock_irqrestore(&adapter->systim_lock, flags);
3934
3935         /* restore the previous hwtstamp configuration settings */
3936         e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3937 }
3938
3939 /**
3940  * e1000e_reset - bring the hardware into a known good state
3941  *
3942  * This function boots the hardware and enables some settings that
3943  * require a configuration cycle of the hardware - those cannot be
3944  * set/changed during runtime. After reset the device needs to be
3945  * properly configured for Rx, Tx etc.
3946  */
3947 void e1000e_reset(struct e1000_adapter *adapter)
3948 {
3949         struct e1000_mac_info *mac = &adapter->hw.mac;
3950         struct e1000_fc_info *fc = &adapter->hw.fc;
3951         struct e1000_hw *hw = &adapter->hw;
3952         u32 tx_space, min_tx_space, min_rx_space;
3953         u32 pba = adapter->pba;
3954         u16 hwm;
3955
3956         /* reset Packet Buffer Allocation to default */
3957         ew32(PBA, pba);
3958
3959         if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3960                 /* To maintain wire speed transmits, the Tx FIFO should be
3961                  * large enough to accommodate two full transmit packets,
3962                  * rounded up to the next 1KB and expressed in KB.  Likewise,
3963                  * the Rx FIFO should be large enough to accommodate at least
3964                  * one full receive packet and is similarly rounded up and
3965                  * expressed in KB.
3966                  */
3967                 pba = er32(PBA);
3968                 /* upper 16 bits has Tx packet buffer allocation size in KB */
3969                 tx_space = pba >> 16;
3970                 /* lower 16 bits has Rx packet buffer allocation size in KB */
3971                 pba &= 0xffff;
3972                 /* the Tx fifo also stores 16 bytes of information about the Tx
3973                  * but don't include ethernet FCS because hardware appends it
3974                  */
3975                 min_tx_space = (adapter->max_frame_size +
3976                                 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3977                 min_tx_space = ALIGN(min_tx_space, 1024);
3978                 min_tx_space >>= 10;
3979                 /* software strips receive CRC, so leave room for it */
3980                 min_rx_space = adapter->max_frame_size;
3981                 min_rx_space = ALIGN(min_rx_space, 1024);
3982                 min_rx_space >>= 10;
3983
3984                 /* If current Tx allocation is less than the min Tx FIFO size,
3985                  * and the min Tx FIFO size is less than the current Rx FIFO
3986                  * allocation, take space away from current Rx allocation
3987                  */
3988                 if ((tx_space < min_tx_space) &&
3989                     ((min_tx_space - tx_space) < pba)) {
3990                         pba -= min_tx_space - tx_space;
3991
3992                         /* if short on Rx space, Rx wins and must trump Tx
3993                          * adjustment
3994                          */
3995                         if (pba < min_rx_space)
3996                                 pba = min_rx_space;
3997                 }
3998
3999                 ew32(PBA, pba);
4000         }
4001
4002         /* flow control settings
4003          *
4004          * The high water mark must be low enough to fit one full frame
4005          * (or the size used for early receive) above it in the Rx FIFO.
4006          * Set it to the lower of:
4007          * - 90% of the Rx FIFO size, and
4008          * - the full Rx FIFO size minus one full frame
4009          */
4010         if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
4011                 fc->pause_time = 0xFFFF;
4012         else
4013                 fc->pause_time = E1000_FC_PAUSE_TIME;
4014         fc->send_xon = true;
4015         fc->current_mode = fc->requested_mode;
4016
4017         switch (hw->mac.type) {
4018         case e1000_ich9lan:
4019         case e1000_ich10lan:
4020                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4021                         pba = 14;
4022                         ew32(PBA, pba);
4023                         fc->high_water = 0x2800;
4024                         fc->low_water = fc->high_water - 8;
4025                         break;
4026                 }
4027                 /* fall-through */
4028         default:
4029                 hwm = min(((pba << 10) * 9 / 10),
4030                           ((pba << 10) - adapter->max_frame_size));
4031
4032                 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
4033                 fc->low_water = fc->high_water - 8;
4034                 break;
4035         case e1000_pchlan:
4036                 /* Workaround PCH LOM adapter hangs with certain network
4037                  * loads.  If hangs persist, try disabling Tx flow control.
4038                  */
4039                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4040                         fc->high_water = 0x3500;
4041                         fc->low_water = 0x1500;
4042                 } else {
4043                         fc->high_water = 0x5000;
4044                         fc->low_water = 0x3000;
4045                 }
4046                 fc->refresh_time = 0x1000;
4047                 break;
4048         case e1000_pch2lan:
4049         case e1000_pch_lpt:
4050         case e1000_pch_spt:
4051                 fc->refresh_time = 0x0400;
4052
4053                 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4054                         fc->high_water = 0x05C20;
4055                         fc->low_water = 0x05048;
4056                         fc->pause_time = 0x0650;
4057                         break;
4058                 }
4059
4060                 pba = 14;
4061                 ew32(PBA, pba);
4062                 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4063                 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4064                 break;
4065         }
4066
4067         /* Alignment of Tx data is on an arbitrary byte boundary with the
4068          * maximum size per Tx descriptor limited only to the transmit
4069          * allocation of the packet buffer minus 96 bytes with an upper
4070          * limit of 24KB due to receive synchronization limitations.
4071          */
4072         adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4073                                        24 << 10);
4074
4075         /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4076          * fit in receive buffer.
4077          */
4078         if (adapter->itr_setting & 0x3) {
4079                 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4080                         if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4081                                 dev_info(&adapter->pdev->dev,
4082                                          "Interrupt Throttle Rate off\n");
4083                                 adapter->flags2 |= FLAG2_DISABLE_AIM;
4084                                 e1000e_write_itr(adapter, 0);
4085                         }
4086                 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4087                         dev_info(&adapter->pdev->dev,
4088                                  "Interrupt Throttle Rate on\n");
4089                         adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4090                         adapter->itr = 20000;
4091                         e1000e_write_itr(adapter, adapter->itr);
4092                 }
4093         }
4094
4095         if (hw->mac.type == e1000_pch_spt)
4096                 e1000_flush_desc_rings(adapter);
4097         /* Allow time for pending master requests to run */
4098         mac->ops.reset_hw(hw);
4099
4100         /* For parts with AMT enabled, let the firmware know
4101          * that the network interface is in control
4102          */
4103         if (adapter->flags & FLAG_HAS_AMT)
4104                 e1000e_get_hw_control(adapter);
4105
4106         ew32(WUC, 0);
4107
4108         if (mac->ops.init_hw(hw))
4109                 e_err("Hardware Error\n");
4110
4111         e1000_update_mng_vlan(adapter);
4112
4113         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4114         ew32(VET, ETH_P_8021Q);
4115
4116         e1000e_reset_adaptive(hw);
4117
4118         /* restore systim and hwtstamp settings */
4119         e1000e_systim_reset(adapter);
4120
4121         /* Set EEE advertisement as appropriate */
4122         if (adapter->flags2 & FLAG2_HAS_EEE) {
4123                 s32 ret_val;
4124                 u16 adv_addr;
4125
4126                 switch (hw->phy.type) {
4127                 case e1000_phy_82579:
4128                         adv_addr = I82579_EEE_ADVERTISEMENT;
4129                         break;
4130                 case e1000_phy_i217:
4131                         adv_addr = I217_EEE_ADVERTISEMENT;
4132                         break;
4133                 default:
4134                         dev_err(&adapter->pdev->dev,
4135                                 "Invalid PHY type setting EEE advertisement\n");
4136                         return;
4137                 }
4138
4139                 ret_val = hw->phy.ops.acquire(hw);
4140                 if (ret_val) {
4141                         dev_err(&adapter->pdev->dev,
4142                                 "EEE advertisement - unable to acquire PHY\n");
4143                         return;
4144                 }
4145
4146                 e1000_write_emi_reg_locked(hw, adv_addr,
4147                                            hw->dev_spec.ich8lan.eee_disable ?
4148                                            0 : adapter->eee_advert);
4149
4150                 hw->phy.ops.release(hw);
4151         }
4152
4153         if (!netif_running(adapter->netdev) &&
4154             !test_bit(__E1000_TESTING, &adapter->state))
4155                 e1000_power_down_phy(adapter);
4156
4157         e1000_get_phy_info(hw);
4158
4159         if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4160             !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4161                 u16 phy_data = 0;
4162                 /* speed up time to link by disabling smart power down, ignore
4163                  * the return value of this function because there is nothing
4164                  * different we would do if it failed
4165                  */
4166                 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4167                 phy_data &= ~IGP02E1000_PM_SPD;
4168                 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4169         }
4170         if (hw->mac.type == e1000_pch_spt && adapter->int_mode == 0) {
4171                 u32 reg;
4172
4173                 /* Fextnvm7 @ 0xe4[2] = 1 */
4174                 reg = er32(FEXTNVM7);
4175                 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4176                 ew32(FEXTNVM7, reg);
4177                 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4178                 reg = er32(FEXTNVM9);
4179                 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4180                        E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4181                 ew32(FEXTNVM9, reg);
4182         }
4183
4184 }
4185
4186 /**
4187  * e1000e_trigger_lsc - trigger an LSC interrupt
4188  * @adapter:
4189  *
4190  * Fire a link status change interrupt to start the watchdog.
4191  **/
4192 static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4193 {
4194         struct e1000_hw *hw = &adapter->hw;
4195
4196         if (adapter->msix_entries)
4197                 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);
4198         else
4199                 ew32(ICS, E1000_ICS_LSC);
4200 }
4201
4202 void e1000e_up(struct e1000_adapter *adapter)
4203 {
4204         /* hardware has been reset, we need to reload some things */
4205         e1000_configure(adapter);
4206
4207         clear_bit(__E1000_DOWN, &adapter->state);
4208
4209         if (adapter->msix_entries)
4210                 e1000_configure_msix(adapter);
4211         e1000_irq_enable(adapter);
4212
4213         /* Tx queue started by watchdog timer when link is up */
4214
4215         e1000e_trigger_lsc(adapter);
4216 }
4217
4218 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4219 {
4220         struct e1000_hw *hw = &adapter->hw;
4221
4222         if (!(adapter->flags2 & FLAG2_DMA_BURST))
4223                 return;
4224
4225         /* flush pending descriptor writebacks to memory */
4226         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4227         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4228
4229         /* execute the writes immediately */
4230         e1e_flush();
4231
4232         /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4233          * write is successful
4234          */
4235         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4236         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4237
4238         /* execute the writes immediately */
4239         e1e_flush();
4240 }
4241
4242 static void e1000e_update_stats(struct e1000_adapter *adapter);
4243
4244 /**
4245  * e1000e_down - quiesce the device and optionally reset the hardware
4246  * @adapter: board private structure
4247  * @reset: boolean flag to reset the hardware or not
4248  */
4249 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4250 {
4251         struct net_device *netdev = adapter->netdev;
4252         struct e1000_hw *hw = &adapter->hw;
4253         u32 tctl, rctl;
4254
4255         /* signal that we're down so the interrupt handler does not
4256          * reschedule our watchdog timer
4257          */
4258         set_bit(__E1000_DOWN, &adapter->state);
4259
4260         netif_carrier_off(netdev);
4261
4262         /* disable receives in the hardware */
4263         rctl = er32(RCTL);
4264         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4265                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4266         /* flush and sleep below */
4267
4268         netif_stop_queue(netdev);
4269
4270         /* disable transmits in the hardware */
4271         tctl = er32(TCTL);
4272         tctl &= ~E1000_TCTL_EN;
4273         ew32(TCTL, tctl);
4274
4275         /* flush both disables and wait for them to finish */
4276         e1e_flush();
4277         usleep_range(10000, 20000);
4278
4279         e1000_irq_disable(adapter);
4280
4281         napi_synchronize(&adapter->napi);
4282
4283         del_timer_sync(&adapter->watchdog_timer);
4284         del_timer_sync(&adapter->phy_info_timer);
4285
4286         spin_lock(&adapter->stats64_lock);
4287         e1000e_update_stats(adapter);
4288         spin_unlock(&adapter->stats64_lock);
4289
4290         e1000e_flush_descriptors(adapter);
4291
4292         adapter->link_speed = 0;
4293         adapter->link_duplex = 0;
4294
4295         /* Disable Si errata workaround on PCHx for jumbo frame flow */
4296         if ((hw->mac.type >= e1000_pch2lan) &&
4297             (adapter->netdev->mtu > ETH_DATA_LEN) &&
4298             e1000_lv_jumbo_workaround_ich8lan(hw, false))
4299                 e_dbg("failed to disable jumbo frame workaround mode\n");
4300
4301         if (!pci_channel_offline(adapter->pdev)) {
4302                 if (reset)
4303                         e1000e_reset(adapter);
4304                 else if (hw->mac.type == e1000_pch_spt)
4305                         e1000_flush_desc_rings(adapter);
4306         }
4307         e1000_clean_tx_ring(adapter->tx_ring);
4308         e1000_clean_rx_ring(adapter->rx_ring);
4309 }
4310
4311 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4312 {
4313         might_sleep();
4314         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4315                 usleep_range(1000, 2000);
4316         e1000e_down(adapter, true);
4317         e1000e_up(adapter);
4318         clear_bit(__E1000_RESETTING, &adapter->state);
4319 }
4320
4321 /**
4322  * e1000e_sanitize_systim - sanitize raw cycle counter reads
4323  * @hw: pointer to the HW structure
4324  * @systim: cycle_t value read, sanitized and returned
4325  *
4326  * Errata for 82574/82583 possible bad bits read from SYSTIMH/L:
4327  * check to see that the time is incrementing at a reasonable
4328  * rate and is a multiple of incvalue.
4329  **/
4330 static cycle_t e1000e_sanitize_systim(struct e1000_hw *hw, cycle_t systim)
4331 {
4332         u64 time_delta, rem, temp;
4333         cycle_t systim_next;
4334         u32 incvalue;
4335         int i;
4336
4337         incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4338         for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4339                 /* latch SYSTIMH on read of SYSTIML */
4340                 systim_next = (cycle_t)er32(SYSTIML);
4341                 systim_next |= (cycle_t)er32(SYSTIMH) << 32;
4342
4343                 time_delta = systim_next - systim;
4344                 temp = time_delta;
4345                 /* VMWare users have seen incvalue of zero, don't div / 0 */
4346                 rem = incvalue ? do_div(temp, incvalue) : (time_delta != 0);
4347
4348                 systim = systim_next;
4349
4350                 if ((time_delta < E1000_82574_SYSTIM_EPSILON) && (rem == 0))
4351                         break;
4352         }
4353
4354         return systim;
4355 }
4356
4357 /**
4358  * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4359  * @cc: cyclecounter structure
4360  **/
4361 static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc)
4362 {
4363         struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4364                                                      cc);
4365         struct e1000_hw *hw = &adapter->hw;
4366         u32 systimel, systimeh;
4367         cycle_t systim;
4368         /* SYSTIMH latching upon SYSTIML read does not work well.
4369          * This means that if SYSTIML overflows after we read it but before
4370          * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4371          * will experience a huge non linear increment in the systime value
4372          * to fix that we test for overflow and if true, we re-read systime.
4373          */
4374         systimel = er32(SYSTIML);
4375         systimeh = er32(SYSTIMH);
4376         /* Is systimel is so large that overflow is possible? */
4377         if (systimel >= (u32)0xffffffff - E1000_TIMINCA_INCVALUE_MASK) {
4378                 u32 systimel_2 = er32(SYSTIML);
4379                 if (systimel > systimel_2) {
4380                         /* There was an overflow, read again SYSTIMH, and use
4381                          * systimel_2
4382                          */
4383                         systimeh = er32(SYSTIMH);
4384                         systimel = systimel_2;
4385                 }
4386         }
4387         systim = (cycle_t)systimel;
4388         systim |= (cycle_t)systimeh << 32;
4389
4390         if (adapter->flags2 & FLAG2_CHECK_SYSTIM_OVERFLOW)
4391                 systim = e1000e_sanitize_systim(hw, systim);
4392
4393         return systim;
4394 }
4395
4396 /**
4397  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4398  * @adapter: board private structure to initialize
4399  *
4400  * e1000_sw_init initializes the Adapter private data structure.
4401  * Fields are initialized based on PCI device information and
4402  * OS network device settings (MTU size).
4403  **/
4404 static int e1000_sw_init(struct e1000_adapter *adapter)
4405 {
4406         struct net_device *netdev = adapter->netdev;
4407
4408         adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4409         adapter->rx_ps_bsize0 = 128;
4410         adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4411         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4412         adapter->tx_ring_count = E1000_DEFAULT_TXD;
4413         adapter->rx_ring_count = E1000_DEFAULT_RXD;
4414
4415         spin_lock_init(&adapter->stats64_lock);
4416
4417         e1000e_set_interrupt_capability(adapter);
4418
4419         if (e1000_alloc_queues(adapter))
4420                 return -ENOMEM;
4421
4422         /* Setup hardware time stamping cyclecounter */
4423         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4424                 adapter->cc.read = e1000e_cyclecounter_read;
4425                 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4426                 adapter->cc.mult = 1;
4427                 /* cc.shift set in e1000e_get_base_tininca() */
4428
4429                 spin_lock_init(&adapter->systim_lock);
4430                 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4431         }
4432
4433         /* Explicitly disable IRQ since the NIC can be in any state. */
4434         e1000_irq_disable(adapter);
4435
4436         set_bit(__E1000_DOWN, &adapter->state);
4437         return 0;
4438 }
4439
4440 /**
4441  * e1000_intr_msi_test - Interrupt Handler
4442  * @irq: interrupt number
4443  * @data: pointer to a network interface device structure
4444  **/
4445 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4446 {
4447         struct net_device *netdev = data;
4448         struct e1000_adapter *adapter = netdev_priv(netdev);
4449         struct e1000_hw *hw = &adapter->hw;
4450         u32 icr = er32(ICR);
4451
4452         e_dbg("icr is %08X\n", icr);
4453         if (icr & E1000_ICR_RXSEQ) {
4454                 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4455                 /* Force memory writes to complete before acknowledging the
4456                  * interrupt is handled.
4457                  */
4458                 wmb();
4459         }
4460
4461         return IRQ_HANDLED;
4462 }
4463
4464 /**
4465  * e1000_test_msi_interrupt - Returns 0 for successful test
4466  * @adapter: board private struct
4467  *
4468  * code flow taken from tg3.c
4469  **/
4470 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4471 {
4472         struct net_device *netdev = adapter->netdev;
4473         struct e1000_hw *hw = &adapter->hw;
4474         int err;
4475
4476         /* poll_enable hasn't been called yet, so don't need disable */
4477         /* clear any pending events */
4478         er32(ICR);
4479
4480         /* free the real vector and request a test handler */
4481         e1000_free_irq(adapter);
4482         e1000e_reset_interrupt_capability(adapter);
4483
4484         /* Assume that the test fails, if it succeeds then the test
4485          * MSI irq handler will unset this flag
4486          */
4487         adapter->flags |= FLAG_MSI_TEST_FAILED;
4488
4489         err = pci_enable_msi(adapter->pdev);
4490         if (err)
4491                 goto msi_test_failed;
4492
4493         err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4494                           netdev->name, netdev);
4495         if (err) {
4496                 pci_disable_msi(adapter->pdev);
4497                 goto msi_test_failed;
4498         }
4499
4500         /* Force memory writes to complete before enabling and firing an
4501          * interrupt.
4502          */
4503         wmb();
4504
4505         e1000_irq_enable(adapter);
4506
4507         /* fire an unusual interrupt on the test handler */
4508         ew32(ICS, E1000_ICS_RXSEQ);
4509         e1e_flush();
4510         msleep(100);
4511
4512         e1000_irq_disable(adapter);
4513
4514         rmb();                  /* read flags after interrupt has been fired */
4515
4516         if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4517                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4518                 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4519         } else {
4520                 e_dbg("MSI interrupt test succeeded!\n");
4521         }
4522
4523         free_irq(adapter->pdev->irq, netdev);
4524         pci_disable_msi(adapter->pdev);
4525
4526 msi_test_failed:
4527         e1000e_set_interrupt_capability(adapter);
4528         return e1000_request_irq(adapter);
4529 }
4530
4531 /**
4532  * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4533  * @adapter: board private struct
4534  *
4535  * code flow taken from tg3.c, called with e1000 interrupts disabled.
4536  **/
4537 static int e1000_test_msi(struct e1000_adapter *adapter)
4538 {
4539         int err;
4540         u16 pci_cmd;
4541
4542         if (!(adapter->flags & FLAG_MSI_ENABLED))
4543                 return 0;
4544
4545         /* disable SERR in case the MSI write causes a master abort */
4546         pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4547         if (pci_cmd & PCI_COMMAND_SERR)
4548                 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4549                                       pci_cmd & ~PCI_COMMAND_SERR);
4550
4551         err = e1000_test_msi_interrupt(adapter);
4552
4553         /* re-enable SERR */
4554         if (pci_cmd & PCI_COMMAND_SERR) {
4555                 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4556                 pci_cmd |= PCI_COMMAND_SERR;
4557                 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4558         }
4559
4560         return err;
4561 }
4562
4563 /**
4564  * e1000e_open - Called when a network interface is made active
4565  * @netdev: network interface device structure
4566  *
4567  * Returns 0 on success, negative value on failure
4568  *
4569  * The open entry point is called when a network interface is made
4570  * active by the system (IFF_UP).  At this point all resources needed
4571  * for transmit and receive operations are allocated, the interrupt
4572  * handler is registered with the OS, the watchdog timer is started,
4573  * and the stack is notified that the interface is ready.
4574  **/
4575 int e1000e_open(struct net_device *netdev)
4576 {
4577         struct e1000_adapter *adapter = netdev_priv(netdev);
4578         struct e1000_hw *hw = &adapter->hw;
4579         struct pci_dev *pdev = adapter->pdev;
4580         int err;
4581
4582         /* disallow open during test */
4583         if (test_bit(__E1000_TESTING, &adapter->state))
4584                 return -EBUSY;
4585
4586         pm_runtime_get_sync(&pdev->dev);
4587
4588         netif_carrier_off(netdev);
4589         netif_stop_queue(netdev);
4590
4591         /* allocate transmit descriptors */
4592         err = e1000e_setup_tx_resources(adapter->tx_ring);
4593         if (err)
4594                 goto err_setup_tx;
4595
4596         /* allocate receive descriptors */
4597         err = e1000e_setup_rx_resources(adapter->rx_ring);
4598         if (err)
4599                 goto err_setup_rx;
4600
4601         /* If AMT is enabled, let the firmware know that the network
4602          * interface is now open and reset the part to a known state.
4603          */
4604         if (adapter->flags & FLAG_HAS_AMT) {
4605                 e1000e_get_hw_control(adapter);
4606                 e1000e_reset(adapter);
4607         }
4608
4609         e1000e_power_up_phy(adapter);
4610
4611         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4612         if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4613                 e1000_update_mng_vlan(adapter);
4614
4615         /* DMA latency requirement to workaround jumbo issue */
4616         pm_qos_add_request(&adapter->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
4617                            PM_QOS_DEFAULT_VALUE);
4618
4619         /* before we allocate an interrupt, we must be ready to handle it.
4620          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4621          * as soon as we call pci_request_irq, so we have to setup our
4622          * clean_rx handler before we do so.
4623          */
4624         e1000_configure(adapter);
4625
4626         err = e1000_request_irq(adapter);
4627         if (err)
4628                 goto err_req_irq;
4629
4630         /* Work around PCIe errata with MSI interrupts causing some chipsets to
4631          * ignore e1000e MSI messages, which means we need to test our MSI
4632          * interrupt now
4633          */
4634         if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4635                 err = e1000_test_msi(adapter);
4636                 if (err) {
4637                         e_err("Interrupt allocation failed\n");
4638                         goto err_req_irq;
4639                 }
4640         }
4641
4642         /* From here on the code is the same as e1000e_up() */
4643         clear_bit(__E1000_DOWN, &adapter->state);
4644
4645         napi_enable(&adapter->napi);
4646
4647         e1000_irq_enable(adapter);
4648
4649         adapter->tx_hang_recheck = false;
4650
4651         hw->mac.get_link_status = true;
4652         pm_runtime_put(&pdev->dev);
4653
4654         e1000e_trigger_lsc(adapter);
4655
4656         return 0;
4657
4658 err_req_irq:
4659         pm_qos_remove_request(&adapter->pm_qos_req);
4660         e1000e_release_hw_control(adapter);
4661         e1000_power_down_phy(adapter);
4662         e1000e_free_rx_resources(adapter->rx_ring);
4663 err_setup_rx:
4664         e1000e_free_tx_resources(adapter->tx_ring);
4665 err_setup_tx:
4666         e1000e_reset(adapter);
4667         pm_runtime_put_sync(&pdev->dev);
4668
4669         return err;
4670 }
4671
4672 /**
4673  * e1000e_close - Disables a network interface
4674  * @netdev: network interface device structure
4675  *
4676  * Returns 0, this is not allowed to fail
4677  *
4678  * The close entry point is called when an interface is de-activated
4679  * by the OS.  The hardware is still under the drivers control, but
4680  * needs to be disabled.  A global MAC reset is issued to stop the
4681  * hardware, and all transmit and receive resources are freed.
4682  **/
4683 int e1000e_close(struct net_device *netdev)
4684 {
4685         struct e1000_adapter *adapter = netdev_priv(netdev);
4686         struct pci_dev *pdev = adapter->pdev;
4687         int count = E1000_CHECK_RESET_COUNT;
4688
4689         while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4690                 usleep_range(10000, 20000);
4691
4692         WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4693
4694         pm_runtime_get_sync(&pdev->dev);
4695
4696         if (!test_bit(__E1000_DOWN, &adapter->state)) {
4697                 e1000e_down(adapter, true);
4698                 e1000_free_irq(adapter);
4699
4700                 /* Link status message must follow this format */
4701                 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
4702         }
4703
4704         napi_disable(&adapter->napi);
4705
4706         e1000e_free_tx_resources(adapter->tx_ring);
4707         e1000e_free_rx_resources(adapter->rx_ring);
4708
4709         /* kill manageability vlan ID if supported, but not if a vlan with
4710          * the same ID is registered on the host OS (let 8021q kill it)
4711          */
4712         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4713                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4714                                        adapter->mng_vlan_id);
4715
4716         /* If AMT is enabled, let the firmware know that the network
4717          * interface is now closed
4718          */
4719         if ((adapter->flags & FLAG_HAS_AMT) &&
4720             !test_bit(__E1000_TESTING, &adapter->state))
4721                 e1000e_release_hw_control(adapter);
4722
4723         pm_qos_remove_request(&adapter->pm_qos_req);
4724
4725         pm_runtime_put_sync(&pdev->dev);
4726
4727         return 0;
4728 }
4729
4730 /**
4731  * e1000_set_mac - Change the Ethernet Address of the NIC
4732  * @netdev: network interface device structure
4733  * @p: pointer to an address structure
4734  *
4735  * Returns 0 on success, negative on failure
4736  **/
4737 static int e1000_set_mac(struct net_device *netdev, void *p)
4738 {
4739         struct e1000_adapter *adapter = netdev_priv(netdev);
4740         struct e1000_hw *hw = &adapter->hw;
4741         struct sockaddr *addr = p;
4742
4743         if (!is_valid_ether_addr(addr->sa_data))
4744                 return -EADDRNOTAVAIL;
4745
4746         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4747         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4748
4749         hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4750
4751         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4752                 /* activate the work around */
4753                 e1000e_set_laa_state_82571(&adapter->hw, 1);
4754
4755                 /* Hold a copy of the LAA in RAR[14] This is done so that
4756                  * between the time RAR[0] gets clobbered  and the time it
4757                  * gets fixed (in e1000_watchdog), the actual LAA is in one
4758                  * of the RARs and no incoming packets directed to this port
4759                  * are dropped. Eventually the LAA will be in RAR[0] and
4760                  * RAR[14]
4761                  */
4762                 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4763                                     adapter->hw.mac.rar_entry_count - 1);
4764         }
4765
4766         return 0;
4767 }
4768
4769 /**
4770  * e1000e_update_phy_task - work thread to update phy
4771  * @work: pointer to our work struct
4772  *
4773  * this worker thread exists because we must acquire a
4774  * semaphore to read the phy, which we could msleep while
4775  * waiting for it, and we can't msleep in a timer.
4776  **/
4777 static void e1000e_update_phy_task(struct work_struct *work)
4778 {
4779         struct e1000_adapter *adapter = container_of(work,
4780                                                      struct e1000_adapter,
4781                                                      update_phy_task);
4782         struct e1000_hw *hw = &adapter->hw;
4783
4784         if (test_bit(__E1000_DOWN, &adapter->state))
4785                 return;
4786
4787         e1000_get_phy_info(hw);
4788
4789         /* Enable EEE on 82579 after link up */
4790         if (hw->phy.type >= e1000_phy_82579)
4791                 e1000_set_eee_pchlan(hw);
4792 }
4793
4794 /**
4795  * e1000_update_phy_info - timre call-back to update PHY info
4796  * @data: pointer to adapter cast into an unsigned long
4797  *
4798  * Need to wait a few seconds after link up to get diagnostic information from
4799  * the phy
4800  **/
4801 static void e1000_update_phy_info(unsigned long data)
4802 {
4803         struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4804
4805         if (test_bit(__E1000_DOWN, &adapter->state))
4806                 return;
4807
4808         schedule_work(&adapter->update_phy_task);
4809 }
4810
4811 /**
4812  * e1000e_update_phy_stats - Update the PHY statistics counters
4813  * @adapter: board private structure
4814  *
4815  * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4816  **/
4817 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4818 {
4819         struct e1000_hw *hw = &adapter->hw;
4820         s32 ret_val;
4821         u16 phy_data;
4822
4823         ret_val = hw->phy.ops.acquire(hw);
4824         if (ret_val)
4825                 return;
4826
4827         /* A page set is expensive so check if already on desired page.
4828          * If not, set to the page with the PHY status registers.
4829          */
4830         hw->phy.addr = 1;
4831         ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4832                                            &phy_data);
4833         if (ret_val)
4834                 goto release;
4835         if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4836                 ret_val = hw->phy.ops.set_page(hw,
4837                                                HV_STATS_PAGE << IGP_PAGE_SHIFT);
4838                 if (ret_val)
4839                         goto release;
4840         }
4841
4842         /* Single Collision Count */
4843         hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4844         ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4845         if (!ret_val)
4846                 adapter->stats.scc += phy_data;
4847
4848         /* Excessive Collision Count */
4849         hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4850         ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4851         if (!ret_val)
4852                 adapter->stats.ecol += phy_data;
4853
4854         /* Multiple Collision Count */
4855         hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4856         ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4857         if (!ret_val)
4858                 adapter->stats.mcc += phy_data;
4859
4860         /* Late Collision Count */
4861         hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4862         ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4863         if (!ret_val)
4864                 adapter->stats.latecol += phy_data;
4865
4866         /* Collision Count - also used for adaptive IFS */
4867         hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4868         ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4869         if (!ret_val)
4870                 hw->mac.collision_delta = phy_data;
4871
4872         /* Defer Count */
4873         hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4874         ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4875         if (!ret_val)
4876                 adapter->stats.dc += phy_data;
4877
4878         /* Transmit with no CRS */
4879         hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4880         ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4881         if (!ret_val)
4882                 adapter->stats.tncrs += phy_data;
4883
4884 release:
4885         hw->phy.ops.release(hw);
4886 }
4887
4888 /**
4889  * e1000e_update_stats - Update the board statistics counters
4890  * @adapter: board private structure
4891  **/
4892 static void e1000e_update_stats(struct e1000_adapter *adapter)
4893 {
4894         struct net_device *netdev = adapter->netdev;
4895         struct e1000_hw *hw = &adapter->hw;
4896         struct pci_dev *pdev = adapter->pdev;
4897
4898         /* Prevent stats update while adapter is being reset, or if the pci
4899          * connection is down.
4900          */
4901         if (adapter->link_speed == 0)
4902                 return;
4903         if (pci_channel_offline(pdev))
4904                 return;
4905
4906         adapter->stats.crcerrs += er32(CRCERRS);
4907         adapter->stats.gprc += er32(GPRC);
4908         adapter->stats.gorc += er32(GORCL);
4909         er32(GORCH);            /* Clear gorc */
4910         adapter->stats.bprc += er32(BPRC);
4911         adapter->stats.mprc += er32(MPRC);
4912         adapter->stats.roc += er32(ROC);
4913
4914         adapter->stats.mpc += er32(MPC);
4915
4916         /* Half-duplex statistics */
4917         if (adapter->link_duplex == HALF_DUPLEX) {
4918                 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4919                         e1000e_update_phy_stats(adapter);
4920                 } else {
4921                         adapter->stats.scc += er32(SCC);
4922                         adapter->stats.ecol += er32(ECOL);
4923                         adapter->stats.mcc += er32(MCC);
4924                         adapter->stats.latecol += er32(LATECOL);
4925                         adapter->stats.dc += er32(DC);
4926
4927                         hw->mac.collision_delta = er32(COLC);
4928
4929                         if ((hw->mac.type != e1000_82574) &&
4930                             (hw->mac.type != e1000_82583))
4931                                 adapter->stats.tncrs += er32(TNCRS);
4932                 }
4933                 adapter->stats.colc += hw->mac.collision_delta;
4934         }
4935
4936         adapter->stats.xonrxc += er32(XONRXC);
4937         adapter->stats.xontxc += er32(XONTXC);
4938         adapter->stats.xoffrxc += er32(XOFFRXC);
4939         adapter->stats.xofftxc += er32(XOFFTXC);
4940         adapter->stats.gptc += er32(GPTC);
4941         adapter->stats.gotc += er32(GOTCL);
4942         er32(GOTCH);            /* Clear gotc */
4943         adapter->stats.rnbc += er32(RNBC);
4944         adapter->stats.ruc += er32(RUC);
4945
4946         adapter->stats.mptc += er32(MPTC);
4947         adapter->stats.bptc += er32(BPTC);
4948
4949         /* used for adaptive IFS */
4950
4951         hw->mac.tx_packet_delta = er32(TPT);
4952         adapter->stats.tpt += hw->mac.tx_packet_delta;
4953
4954         adapter->stats.algnerrc += er32(ALGNERRC);
4955         adapter->stats.rxerrc += er32(RXERRC);
4956         adapter->stats.cexterr += er32(CEXTERR);
4957         adapter->stats.tsctc += er32(TSCTC);
4958         adapter->stats.tsctfc += er32(TSCTFC);
4959
4960         /* Fill out the OS statistics structure */
4961         netdev->stats.multicast = adapter->stats.mprc;
4962         netdev->stats.collisions = adapter->stats.colc;
4963
4964         /* Rx Errors */
4965
4966         /* RLEC on some newer hardware can be incorrect so build
4967          * our own version based on RUC and ROC
4968          */
4969         netdev->stats.rx_errors = adapter->stats.rxerrc +
4970             adapter->stats.crcerrs + adapter->stats.algnerrc +
4971             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4972         netdev->stats.rx_length_errors = adapter->stats.ruc +
4973             adapter->stats.roc;
4974         netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4975         netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4976         netdev->stats.rx_missed_errors = adapter->stats.mpc;
4977
4978         /* Tx Errors */
4979         netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
4980         netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4981         netdev->stats.tx_window_errors = adapter->stats.latecol;
4982         netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4983
4984         /* Tx Dropped needs to be maintained elsewhere */
4985
4986         /* Management Stats */
4987         adapter->stats.mgptc += er32(MGTPTC);
4988         adapter->stats.mgprc += er32(MGTPRC);
4989         adapter->stats.mgpdc += er32(MGTPDC);
4990
4991         /* Correctable ECC Errors */
4992         if ((hw->mac.type == e1000_pch_lpt) ||
4993             (hw->mac.type == e1000_pch_spt)) {
4994                 u32 pbeccsts = er32(PBECCSTS);
4995
4996                 adapter->corr_errors +=
4997                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
4998                 adapter->uncorr_errors +=
4999                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
5000                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
5001         }
5002 }
5003
5004 /**
5005  * e1000_phy_read_status - Update the PHY register status snapshot
5006  * @adapter: board private structure
5007  **/
5008 static void e1000_phy_read_status(struct e1000_adapter *adapter)
5009 {
5010         struct e1000_hw *hw = &adapter->hw;
5011         struct e1000_phy_regs *phy = &adapter->phy_regs;
5012
5013         if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
5014             (er32(STATUS) & E1000_STATUS_LU) &&
5015             (adapter->hw.phy.media_type == e1000_media_type_copper)) {
5016                 int ret_val;
5017
5018                 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
5019                 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
5020                 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
5021                 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
5022                 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
5023                 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
5024                 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
5025                 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
5026                 if (ret_val)
5027                         e_warn("Error reading PHY register\n");
5028         } else {
5029                 /* Do not read PHY registers if link is not up
5030                  * Set values to typical power-on defaults
5031                  */
5032                 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
5033                 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
5034                              BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
5035                              BMSR_ERCAP);
5036                 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
5037                                   ADVERTISE_ALL | ADVERTISE_CSMA);
5038                 phy->lpa = 0;
5039                 phy->expansion = EXPANSION_ENABLENPAGE;
5040                 phy->ctrl1000 = ADVERTISE_1000FULL;
5041                 phy->stat1000 = 0;
5042                 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
5043         }
5044 }
5045
5046 static void e1000_print_link_info(struct e1000_adapter *adapter)
5047 {
5048         struct e1000_hw *hw = &adapter->hw;
5049         u32 ctrl = er32(CTRL);
5050
5051         /* Link status message must follow this format for user tools */
5052         pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5053                 adapter->netdev->name, adapter->link_speed,
5054                 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5055                 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5056                 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
5057                 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5058 }
5059
5060 static bool e1000e_has_link(struct e1000_adapter *adapter)
5061 {
5062         struct e1000_hw *hw = &adapter->hw;
5063         bool link_active = false;
5064         s32 ret_val = 0;
5065
5066         /* get_link_status is set on LSC (link status) interrupt or
5067          * Rx sequence error interrupt.  get_link_status will stay
5068          * false until the check_for_link establishes link
5069          * for copper adapters ONLY
5070          */
5071         switch (hw->phy.media_type) {
5072         case e1000_media_type_copper:
5073                 if (hw->mac.get_link_status) {
5074                         ret_val = hw->mac.ops.check_for_link(hw);
5075                         link_active = !hw->mac.get_link_status;
5076                 } else {
5077                         link_active = true;
5078                 }
5079                 break;
5080         case e1000_media_type_fiber:
5081                 ret_val = hw->mac.ops.check_for_link(hw);
5082                 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5083                 break;
5084         case e1000_media_type_internal_serdes:
5085                 ret_val = hw->mac.ops.check_for_link(hw);
5086                 link_active = adapter->hw.mac.serdes_has_link;
5087                 break;
5088         default:
5089         case e1000_media_type_unknown:
5090                 break;
5091         }
5092
5093         if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5094             (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5095                 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5096                 e_info("Gigabit has been disabled, downgrading speed\n");
5097         }
5098
5099         return link_active;
5100 }
5101
5102 static void e1000e_enable_receives(struct e1000_adapter *adapter)
5103 {
5104         /* make sure the receive unit is started */
5105         if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5106             (adapter->flags & FLAG_RESTART_NOW)) {
5107                 struct e1000_hw *hw = &adapter->hw;
5108                 u32 rctl = er32(RCTL);
5109
5110                 ew32(RCTL, rctl | E1000_RCTL_EN);
5111                 adapter->flags &= ~FLAG_RESTART_NOW;
5112         }
5113 }
5114
5115 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5116 {
5117         struct e1000_hw *hw = &adapter->hw;
5118
5119         /* With 82574 controllers, PHY needs to be checked periodically
5120          * for hung state and reset, if two calls return true
5121          */
5122         if (e1000_check_phy_82574(hw))
5123                 adapter->phy_hang_count++;
5124         else
5125                 adapter->phy_hang_count = 0;
5126
5127         if (adapter->phy_hang_count > 1) {
5128                 adapter->phy_hang_count = 0;
5129                 e_dbg("PHY appears hung - resetting\n");
5130                 schedule_work(&adapter->reset_task);
5131         }
5132 }
5133
5134 /**
5135  * e1000_watchdog - Timer Call-back
5136  * @data: pointer to adapter cast into an unsigned long
5137  **/
5138 static void e1000_watchdog(unsigned long data)
5139 {
5140         struct e1000_adapter *adapter = (struct e1000_adapter *)data;
5141
5142         /* Do the rest outside of interrupt context */
5143         schedule_work(&adapter->watchdog_task);
5144
5145         /* TODO: make this use queue_delayed_work() */
5146 }
5147
5148 static void e1000_watchdog_task(struct work_struct *work)
5149 {
5150         struct e1000_adapter *adapter = container_of(work,
5151                                                      struct e1000_adapter,
5152                                                      watchdog_task);
5153         struct net_device *netdev = adapter->netdev;
5154         struct e1000_mac_info *mac = &adapter->hw.mac;
5155         struct e1000_phy_info *phy = &adapter->hw.phy;
5156         struct e1000_ring *tx_ring = adapter->tx_ring;
5157         struct e1000_hw *hw = &adapter->hw;
5158         u32 link, tctl;
5159
5160         if (test_bit(__E1000_DOWN, &adapter->state))
5161                 return;
5162
5163         link = e1000e_has_link(adapter);
5164         if ((netif_carrier_ok(netdev)) && link) {
5165                 /* Cancel scheduled suspend requests. */
5166                 pm_runtime_resume(netdev->dev.parent);
5167
5168                 e1000e_enable_receives(adapter);
5169                 goto link_up;
5170         }
5171
5172         if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5173             (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5174                 e1000_update_mng_vlan(adapter);
5175
5176         if (link) {
5177                 if (!netif_carrier_ok(netdev)) {
5178                         bool txb2b = true;
5179
5180                         /* Cancel scheduled suspend requests. */
5181                         pm_runtime_resume(netdev->dev.parent);
5182
5183                         /* update snapshot of PHY registers on LSC */
5184                         e1000_phy_read_status(adapter);
5185                         mac->ops.get_link_up_info(&adapter->hw,
5186                                                   &adapter->link_speed,
5187                                                   &adapter->link_duplex);
5188                         e1000_print_link_info(adapter);
5189
5190                         /* check if SmartSpeed worked */
5191                         e1000e_check_downshift(hw);
5192                         if (phy->speed_downgraded)
5193                                 netdev_warn(netdev,
5194                                             "Link Speed was downgraded by SmartSpeed\n");
5195
5196                         /* On supported PHYs, check for duplex mismatch only
5197                          * if link has autonegotiated at 10/100 half
5198                          */
5199                         if ((hw->phy.type == e1000_phy_igp_3 ||
5200                              hw->phy.type == e1000_phy_bm) &&
5201                             hw->mac.autoneg &&
5202                             (adapter->link_speed == SPEED_10 ||
5203                              adapter->link_speed == SPEED_100) &&
5204                             (adapter->link_duplex == HALF_DUPLEX)) {
5205                                 u16 autoneg_exp;
5206
5207                                 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5208
5209                                 if (!(autoneg_exp & EXPANSION_NWAY))
5210                                         e_info("Autonegotiated half duplex but link partner cannot autoneg.  Try forcing full duplex if link gets many collisions.\n");
5211                         }
5212
5213                         /* adjust timeout factor according to speed/duplex */
5214                         adapter->tx_timeout_factor = 1;
5215                         switch (adapter->link_speed) {
5216                         case SPEED_10:
5217                                 txb2b = false;
5218                                 adapter->tx_timeout_factor = 16;
5219                                 break;
5220                         case SPEED_100:
5221                                 txb2b = false;
5222                                 adapter->tx_timeout_factor = 10;
5223                                 break;
5224                         }
5225
5226                         /* workaround: re-program speed mode bit after
5227                          * link-up event
5228                          */
5229                         if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5230                             !txb2b) {
5231                                 u32 tarc0;
5232
5233                                 tarc0 = er32(TARC(0));
5234                                 tarc0 &= ~SPEED_MODE_BIT;
5235                                 ew32(TARC(0), tarc0);
5236                         }
5237
5238                         /* disable TSO for pcie and 10/100 speeds, to avoid
5239                          * some hardware issues
5240                          */
5241                         if (!(adapter->flags & FLAG_TSO_FORCE)) {
5242                                 switch (adapter->link_speed) {
5243                                 case SPEED_10:
5244                                 case SPEED_100:
5245                                         e_info("10/100 speed: disabling TSO\n");
5246                                         netdev->features &= ~NETIF_F_TSO;
5247                                         netdev->features &= ~NETIF_F_TSO6;
5248                                         break;
5249                                 case SPEED_1000:
5250                                         netdev->features |= NETIF_F_TSO;
5251                                         netdev->features |= NETIF_F_TSO6;
5252                                         break;
5253                                 default:
5254                                         /* oops */
5255                                         break;
5256                                 }
5257                         }
5258
5259                         /* enable transmits in the hardware, need to do this
5260                          * after setting TARC(0)
5261                          */
5262                         tctl = er32(TCTL);
5263                         tctl |= E1000_TCTL_EN;
5264                         ew32(TCTL, tctl);
5265
5266                         /* Perform any post-link-up configuration before
5267                          * reporting link up.
5268                          */
5269                         if (phy->ops.cfg_on_link_up)
5270                                 phy->ops.cfg_on_link_up(hw);
5271
5272                         netif_wake_queue(netdev);
5273                         netif_carrier_on(netdev);
5274
5275                         if (!test_bit(__E1000_DOWN, &adapter->state))
5276                                 mod_timer(&adapter->phy_info_timer,
5277                                           round_jiffies(jiffies + 2 * HZ));
5278                 }
5279         } else {
5280                 if (netif_carrier_ok(netdev)) {
5281                         adapter->link_speed = 0;
5282                         adapter->link_duplex = 0;
5283                         /* Link status message must follow this format */
5284                         pr_info("%s NIC Link is Down\n", adapter->netdev->name);
5285                         netif_carrier_off(netdev);
5286                         netif_stop_queue(netdev);
5287                         if (!test_bit(__E1000_DOWN, &adapter->state))
5288                                 mod_timer(&adapter->phy_info_timer,
5289                                           round_jiffies(jiffies + 2 * HZ));
5290
5291                         /* 8000ES2LAN requires a Rx packet buffer work-around
5292                          * on link down event; reset the controller to flush
5293                          * the Rx packet buffer.
5294                          */
5295                         if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5296                                 adapter->flags |= FLAG_RESTART_NOW;
5297                         else
5298                                 pm_schedule_suspend(netdev->dev.parent,
5299                                                     LINK_TIMEOUT);
5300                 }
5301         }
5302
5303 link_up:
5304         spin_lock(&adapter->stats64_lock);
5305         e1000e_update_stats(adapter);
5306
5307         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5308         adapter->tpt_old = adapter->stats.tpt;
5309         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5310         adapter->colc_old = adapter->stats.colc;
5311
5312         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5313         adapter->gorc_old = adapter->stats.gorc;
5314         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5315         adapter->gotc_old = adapter->stats.gotc;
5316         spin_unlock(&adapter->stats64_lock);
5317
5318         /* If the link is lost the controller stops DMA, but
5319          * if there is queued Tx work it cannot be done.  So
5320          * reset the controller to flush the Tx packet buffers.
5321          */
5322         if (!netif_carrier_ok(netdev) &&
5323             (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5324                 adapter->flags |= FLAG_RESTART_NOW;
5325
5326         /* If reset is necessary, do it outside of interrupt context. */
5327         if (adapter->flags & FLAG_RESTART_NOW) {
5328                 schedule_work(&adapter->reset_task);
5329                 /* return immediately since reset is imminent */
5330                 return;
5331         }
5332
5333         e1000e_update_adaptive(&adapter->hw);
5334
5335         /* Simple mode for Interrupt Throttle Rate (ITR) */
5336         if (adapter->itr_setting == 4) {
5337                 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5338                  * Total asymmetrical Tx or Rx gets ITR=8000;
5339                  * everyone else is between 2000-8000.
5340                  */
5341                 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5342                 u32 dif = (adapter->gotc > adapter->gorc ?
5343                            adapter->gotc - adapter->gorc :
5344                            adapter->gorc - adapter->gotc) / 10000;
5345                 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5346
5347                 e1000e_write_itr(adapter, itr);
5348         }
5349
5350         /* Cause software interrupt to ensure Rx ring is cleaned */
5351         if (adapter->msix_entries)
5352                 ew32(ICS, adapter->rx_ring->ims_val);
5353         else
5354                 ew32(ICS, E1000_ICS_RXDMT0);
5355
5356         /* flush pending descriptors to memory before detecting Tx hang */
5357         e1000e_flush_descriptors(adapter);
5358
5359         /* Force detection of hung controller every watchdog period */
5360         adapter->detect_tx_hung = true;
5361
5362         /* With 82571 controllers, LAA may be overwritten due to controller
5363          * reset from the other port. Set the appropriate LAA in RAR[0]
5364          */
5365         if (e1000e_get_laa_state_82571(hw))
5366                 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5367
5368         if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5369                 e1000e_check_82574_phy_workaround(adapter);
5370
5371         /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5372         if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5373                 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5374                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5375                         er32(RXSTMPH);
5376                         adapter->rx_hwtstamp_cleared++;
5377                 } else {
5378                         adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5379                 }
5380         }
5381
5382         /* Reset the timer */
5383         if (!test_bit(__E1000_DOWN, &adapter->state))
5384                 mod_timer(&adapter->watchdog_timer,
5385                           round_jiffies(jiffies + 2 * HZ));
5386 }
5387
5388 #define E1000_TX_FLAGS_CSUM             0x00000001
5389 #define E1000_TX_FLAGS_VLAN             0x00000002
5390 #define E1000_TX_FLAGS_TSO              0x00000004
5391 #define E1000_TX_FLAGS_IPV4             0x00000008
5392 #define E1000_TX_FLAGS_NO_FCS           0x00000010
5393 #define E1000_TX_FLAGS_HWTSTAMP         0x00000020
5394 #define E1000_TX_FLAGS_VLAN_MASK        0xffff0000
5395 #define E1000_TX_FLAGS_VLAN_SHIFT       16
5396
5397 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5398                      __be16 protocol)
5399 {
5400         struct e1000_context_desc *context_desc;
5401         struct e1000_buffer *buffer_info;
5402         unsigned int i;
5403         u32 cmd_length = 0;
5404         u16 ipcse = 0, mss;
5405         u8 ipcss, ipcso, tucss, tucso, hdr_len;
5406         int err;
5407
5408         if (!skb_is_gso(skb))
5409                 return 0;
5410
5411         err = skb_cow_head(skb, 0);
5412         if (err < 0)
5413                 return err;
5414
5415         hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5416         mss = skb_shinfo(skb)->gso_size;
5417         if (protocol == htons(ETH_P_IP)) {
5418                 struct iphdr *iph = ip_hdr(skb);
5419                 iph->tot_len = 0;
5420                 iph->check = 0;
5421                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5422                                                          0, IPPROTO_TCP, 0);
5423                 cmd_length = E1000_TXD_CMD_IP;
5424                 ipcse = skb_transport_offset(skb) - 1;
5425         } else if (skb_is_gso_v6(skb)) {
5426                 ipv6_hdr(skb)->payload_len = 0;
5427                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5428                                                        &ipv6_hdr(skb)->daddr,
5429                                                        0, IPPROTO_TCP, 0);
5430                 ipcse = 0;
5431         }
5432         ipcss = skb_network_offset(skb);
5433         ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5434         tucss = skb_transport_offset(skb);
5435         tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5436
5437         cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5438                        E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5439
5440         i = tx_ring->next_to_use;
5441         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5442         buffer_info = &tx_ring->buffer_info[i];
5443
5444         context_desc->lower_setup.ip_fields.ipcss = ipcss;
5445         context_desc->lower_setup.ip_fields.ipcso = ipcso;
5446         context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5447         context_desc->upper_setup.tcp_fields.tucss = tucss;
5448         context_desc->upper_setup.tcp_fields.tucso = tucso;
5449         context_desc->upper_setup.tcp_fields.tucse = 0;
5450         context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5451         context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5452         context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5453
5454         buffer_info->time_stamp = jiffies;
5455         buffer_info->next_to_watch = i;
5456
5457         i++;
5458         if (i == tx_ring->count)
5459                 i = 0;
5460         tx_ring->next_to_use = i;
5461
5462         return 1;
5463 }
5464
5465 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5466                           __be16 protocol)
5467 {
5468         struct e1000_adapter *adapter = tx_ring->adapter;
5469         struct e1000_context_desc *context_desc;
5470         struct e1000_buffer *buffer_info;
5471         unsigned int i;
5472         u8 css;
5473         u32 cmd_len = E1000_TXD_CMD_DEXT;
5474
5475         if (skb->ip_summed != CHECKSUM_PARTIAL)
5476                 return false;
5477
5478         switch (protocol) {
5479         case cpu_to_be16(ETH_P_IP):
5480                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5481                         cmd_len |= E1000_TXD_CMD_TCP;
5482                 break;
5483         case cpu_to_be16(ETH_P_IPV6):
5484                 /* XXX not handling all IPV6 headers */
5485                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5486                         cmd_len |= E1000_TXD_CMD_TCP;
5487                 break;
5488         default:
5489                 if (unlikely(net_ratelimit()))
5490                         e_warn("checksum_partial proto=%x!\n",
5491                                be16_to_cpu(protocol));
5492                 break;
5493         }
5494
5495         css = skb_checksum_start_offset(skb);
5496
5497         i = tx_ring->next_to_use;
5498         buffer_info = &tx_ring->buffer_info[i];
5499         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5500
5501         context_desc->lower_setup.ip_config = 0;
5502         context_desc->upper_setup.tcp_fields.tucss = css;
5503         context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5504         context_desc->upper_setup.tcp_fields.tucse = 0;
5505         context_desc->tcp_seg_setup.data = 0;
5506         context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5507
5508         buffer_info->time_stamp = jiffies;
5509         buffer_info->next_to_watch = i;
5510
5511         i++;
5512         if (i == tx_ring->count)
5513                 i = 0;
5514         tx_ring->next_to_use = i;
5515
5516         return true;
5517 }
5518
5519 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5520                         unsigned int first, unsigned int max_per_txd,
5521                         unsigned int nr_frags)
5522 {
5523         struct e1000_adapter *adapter = tx_ring->adapter;
5524         struct pci_dev *pdev = adapter->pdev;
5525         struct e1000_buffer *buffer_info;
5526         unsigned int len = skb_headlen(skb);
5527         unsigned int offset = 0, size, count = 0, i;
5528         unsigned int f, bytecount, segs;
5529
5530         i = tx_ring->next_to_use;
5531
5532         while (len) {
5533                 buffer_info = &tx_ring->buffer_info[i];
5534                 size = min(len, max_per_txd);
5535
5536                 buffer_info->length = size;
5537                 buffer_info->time_stamp = jiffies;
5538                 buffer_info->next_to_watch = i;
5539                 buffer_info->dma = dma_map_single(&pdev->dev,
5540                                                   skb->data + offset,
5541                                                   size, DMA_TO_DEVICE);
5542                 buffer_info->mapped_as_page = false;
5543                 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5544                         goto dma_error;
5545
5546                 len -= size;
5547                 offset += size;
5548                 count++;
5549
5550                 if (len) {
5551                         i++;
5552                         if (i == tx_ring->count)
5553                                 i = 0;
5554                 }
5555         }
5556
5557         for (f = 0; f < nr_frags; f++) {
5558                 const struct skb_frag_struct *frag;
5559
5560                 frag = &skb_shinfo(skb)->frags[f];
5561                 len = skb_frag_size(frag);
5562                 offset = 0;
5563
5564                 while (len) {
5565                         i++;
5566                         if (i == tx_ring->count)
5567                                 i = 0;
5568
5569                         buffer_info = &tx_ring->buffer_info[i];
5570                         size = min(len, max_per_txd);
5571
5572                         buffer_info->length = size;
5573                         buffer_info->time_stamp = jiffies;
5574                         buffer_info->next_to_watch = i;
5575                         buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5576                                                             offset, size,
5577                                                             DMA_TO_DEVICE);
5578                         buffer_info->mapped_as_page = true;
5579                         if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5580                                 goto dma_error;
5581
5582                         len -= size;
5583                         offset += size;
5584                         count++;
5585                 }
5586         }
5587
5588         segs = skb_shinfo(skb)->gso_segs ? : 1;
5589         /* multiply data chunks by size of headers */
5590         bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5591
5592         tx_ring->buffer_info[i].skb = skb;
5593         tx_ring->buffer_info[i].segs = segs;
5594         tx_ring->buffer_info[i].bytecount = bytecount;
5595         tx_ring->buffer_info[first].next_to_watch = i;
5596
5597         return count;
5598
5599 dma_error:
5600         dev_err(&pdev->dev, "Tx DMA map failed\n");
5601         buffer_info->dma = 0;
5602         if (count)
5603                 count--;
5604
5605         while (count--) {
5606                 if (i == 0)
5607                         i += tx_ring->count;
5608                 i--;
5609                 buffer_info = &tx_ring->buffer_info[i];
5610                 e1000_put_txbuf(tx_ring, buffer_info);
5611         }
5612
5613         return 0;
5614 }
5615
5616 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5617 {
5618         struct e1000_adapter *adapter = tx_ring->adapter;
5619         struct e1000_tx_desc *tx_desc = NULL;
5620         struct e1000_buffer *buffer_info;
5621         u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5622         unsigned int i;
5623
5624         if (tx_flags & E1000_TX_FLAGS_TSO) {
5625                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5626                     E1000_TXD_CMD_TSE;
5627                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5628
5629                 if (tx_flags & E1000_TX_FLAGS_IPV4)
5630                         txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5631         }
5632
5633         if (tx_flags & E1000_TX_FLAGS_CSUM) {
5634                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5635                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5636         }
5637
5638         if (tx_flags & E1000_TX_FLAGS_VLAN) {
5639                 txd_lower |= E1000_TXD_CMD_VLE;
5640                 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5641         }
5642
5643         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5644                 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5645
5646         if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5647                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5648                 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5649         }
5650
5651         i = tx_ring->next_to_use;
5652
5653         do {
5654                 buffer_info = &tx_ring->buffer_info[i];
5655                 tx_desc = E1000_TX_DESC(*tx_ring, i);
5656                 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5657                 tx_desc->lower.data = cpu_to_le32(txd_lower |
5658                                                   buffer_info->length);
5659                 tx_desc->upper.data = cpu_to_le32(txd_upper);
5660
5661                 i++;
5662                 if (i == tx_ring->count)
5663                         i = 0;
5664         } while (--count > 0);
5665
5666         tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5667
5668         /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5669         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5670                 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5671
5672         /* Force memory writes to complete before letting h/w
5673          * know there are new descriptors to fetch.  (Only
5674          * applicable for weak-ordered memory model archs,
5675          * such as IA-64).
5676          */
5677         wmb();
5678
5679         tx_ring->next_to_use = i;
5680 }
5681
5682 #define MINIMUM_DHCP_PACKET_SIZE 282
5683 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5684                                     struct sk_buff *skb)
5685 {
5686         struct e1000_hw *hw = &adapter->hw;
5687         u16 length, offset;
5688
5689         if (skb_vlan_tag_present(skb) &&
5690             !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5691               (adapter->hw.mng_cookie.status &
5692                E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5693                 return 0;
5694
5695         if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5696                 return 0;
5697
5698         if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5699                 return 0;
5700
5701         {
5702                 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5703                 struct udphdr *udp;
5704
5705                 if (ip->protocol != IPPROTO_UDP)
5706                         return 0;
5707
5708                 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5709                 if (ntohs(udp->dest) != 67)
5710                         return 0;
5711
5712                 offset = (u8 *)udp + 8 - skb->data;
5713                 length = skb->len - offset;
5714                 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5715         }
5716
5717         return 0;
5718 }
5719
5720 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5721 {
5722         struct e1000_adapter *adapter = tx_ring->adapter;
5723
5724         netif_stop_queue(adapter->netdev);
5725         /* Herbert's original patch had:
5726          *  smp_mb__after_netif_stop_queue();
5727          * but since that doesn't exist yet, just open code it.
5728          */
5729         smp_mb();
5730
5731         /* We need to check again in a case another CPU has just
5732          * made room available.
5733          */
5734         if (e1000_desc_unused(tx_ring) < size)
5735                 return -EBUSY;
5736
5737         /* A reprieve! */
5738         netif_start_queue(adapter->netdev);
5739         ++adapter->restart_queue;
5740         return 0;
5741 }
5742
5743 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5744 {
5745         BUG_ON(size > tx_ring->count);
5746
5747         if (e1000_desc_unused(tx_ring) >= size)
5748                 return 0;
5749         return __e1000_maybe_stop_tx(tx_ring, size);
5750 }
5751
5752 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5753                                     struct net_device *netdev)
5754 {
5755         struct e1000_adapter *adapter = netdev_priv(netdev);
5756         struct e1000_ring *tx_ring = adapter->tx_ring;
5757         unsigned int first;
5758         unsigned int tx_flags = 0;
5759         unsigned int len = skb_headlen(skb);
5760         unsigned int nr_frags;
5761         unsigned int mss;
5762         int count = 0;
5763         int tso;
5764         unsigned int f;
5765         __be16 protocol = vlan_get_protocol(skb);
5766
5767         if (test_bit(__E1000_DOWN, &adapter->state)) {
5768                 dev_kfree_skb_any(skb);
5769                 return NETDEV_TX_OK;
5770         }
5771
5772         if (skb->len <= 0) {
5773                 dev_kfree_skb_any(skb);
5774                 return NETDEV_TX_OK;
5775         }
5776
5777         /* The minimum packet size with TCTL.PSP set is 17 bytes so
5778          * pad skb in order to meet this minimum size requirement
5779          */
5780         if (skb_put_padto(skb, 17))
5781                 return NETDEV_TX_OK;
5782
5783         mss = skb_shinfo(skb)->gso_size;
5784         if (mss) {
5785                 u8 hdr_len;
5786
5787                 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5788                  * points to just header, pull a few bytes of payload from
5789                  * frags into skb->data
5790                  */
5791                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5792                 /* we do this workaround for ES2LAN, but it is un-necessary,
5793                  * avoiding it could save a lot of cycles
5794                  */
5795                 if (skb->data_len && (hdr_len == len)) {
5796                         unsigned int pull_size;
5797
5798                         pull_size = min_t(unsigned int, 4, skb->data_len);
5799                         if (!__pskb_pull_tail(skb, pull_size)) {
5800                                 e_err("__pskb_pull_tail failed.\n");
5801                                 dev_kfree_skb_any(skb);
5802                                 return NETDEV_TX_OK;
5803                         }
5804                         len = skb_headlen(skb);
5805                 }
5806         }
5807
5808         /* reserve a descriptor for the offload context */
5809         if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5810                 count++;
5811         count++;
5812
5813         count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5814
5815         nr_frags = skb_shinfo(skb)->nr_frags;
5816         for (f = 0; f < nr_frags; f++)
5817                 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5818                                       adapter->tx_fifo_limit);
5819
5820         if (adapter->hw.mac.tx_pkt_filtering)
5821                 e1000_transfer_dhcp_info(adapter, skb);
5822
5823         /* need: count + 2 desc gap to keep tail from touching
5824          * head, otherwise try next time
5825          */
5826         if (e1000_maybe_stop_tx(tx_ring, count + 2))
5827                 return NETDEV_TX_BUSY;
5828
5829         if (skb_vlan_tag_present(skb)) {
5830                 tx_flags |= E1000_TX_FLAGS_VLAN;
5831                 tx_flags |= (skb_vlan_tag_get(skb) <<
5832                              E1000_TX_FLAGS_VLAN_SHIFT);
5833         }
5834
5835         first = tx_ring->next_to_use;
5836
5837         tso = e1000_tso(tx_ring, skb, protocol);
5838         if (tso < 0) {
5839                 dev_kfree_skb_any(skb);
5840                 return NETDEV_TX_OK;
5841         }
5842
5843         if (tso)
5844                 tx_flags |= E1000_TX_FLAGS_TSO;
5845         else if (e1000_tx_csum(tx_ring, skb, protocol))
5846                 tx_flags |= E1000_TX_FLAGS_CSUM;
5847
5848         /* Old method was to assume IPv4 packet by default if TSO was enabled.
5849          * 82571 hardware supports TSO capabilities for IPv6 as well...
5850          * no longer assume, we must.
5851          */
5852         if (protocol == htons(ETH_P_IP))
5853                 tx_flags |= E1000_TX_FLAGS_IPV4;
5854
5855         if (unlikely(skb->no_fcs))
5856                 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5857
5858         /* if count is 0 then mapping error has occurred */
5859         count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5860                              nr_frags);
5861         if (count) {
5862                 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5863                     (adapter->flags & FLAG_HAS_HW_TIMESTAMP) &&
5864                     !adapter->tx_hwtstamp_skb) {
5865                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5866                         tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5867                         adapter->tx_hwtstamp_skb = skb_get(skb);
5868                         adapter->tx_hwtstamp_start = jiffies;
5869                         schedule_work(&adapter->tx_hwtstamp_work);
5870                 } else {
5871                         skb_tx_timestamp(skb);
5872                 }
5873
5874                 netdev_sent_queue(netdev, skb->len);
5875                 e1000_tx_queue(tx_ring, tx_flags, count);
5876                 /* Make sure there is space in the ring for the next send. */
5877                 e1000_maybe_stop_tx(tx_ring,
5878                                     ((MAX_SKB_FRAGS + 1) *
5879                                      DIV_ROUND_UP(PAGE_SIZE,
5880                                                   adapter->tx_fifo_limit) + 4));
5881
5882                 if (!skb->xmit_more ||
5883                     netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5884                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5885                                 e1000e_update_tdt_wa(tx_ring,
5886                                                      tx_ring->next_to_use);
5887                         else
5888                                 writel(tx_ring->next_to_use, tx_ring->tail);
5889
5890                         /* we need this if more than one processor can write
5891                          * to our tail at a time, it synchronizes IO on
5892                          *IA64/Altix systems
5893                          */
5894                         mmiowb();
5895                 }
5896         } else {
5897                 dev_kfree_skb_any(skb);
5898                 tx_ring->buffer_info[first].time_stamp = 0;
5899                 tx_ring->next_to_use = first;
5900         }
5901
5902         return NETDEV_TX_OK;
5903 }
5904
5905 /**
5906  * e1000_tx_timeout - Respond to a Tx Hang
5907  * @netdev: network interface device structure
5908  **/
5909 static void e1000_tx_timeout(struct net_device *netdev)
5910 {
5911         struct e1000_adapter *adapter = netdev_priv(netdev);
5912
5913         /* Do the reset outside of interrupt context */
5914         adapter->tx_timeout_count++;
5915         schedule_work(&adapter->reset_task);
5916 }
5917
5918 static void e1000_reset_task(struct work_struct *work)
5919 {
5920         struct e1000_adapter *adapter;
5921         adapter = container_of(work, struct e1000_adapter, reset_task);
5922
5923         rtnl_lock();
5924         /* don't run the task if already down */
5925         if (test_bit(__E1000_DOWN, &adapter->state)) {
5926                 rtnl_unlock();
5927                 return;
5928         }
5929
5930         if (!(adapter->flags & FLAG_RESTART_NOW)) {
5931                 e1000e_dump(adapter);
5932                 e_err("Reset adapter unexpectedly\n");
5933         }
5934         e1000e_reinit_locked(adapter);
5935         rtnl_unlock();
5936 }
5937
5938 /**
5939  * e1000_get_stats64 - Get System Network Statistics
5940  * @netdev: network interface device structure
5941  * @stats: rtnl_link_stats64 pointer
5942  *
5943  * Returns the address of the device statistics structure.
5944  **/
5945 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
5946                                              struct rtnl_link_stats64 *stats)
5947 {
5948         struct e1000_adapter *adapter = netdev_priv(netdev);
5949
5950         memset(stats, 0, sizeof(struct rtnl_link_stats64));
5951         spin_lock(&adapter->stats64_lock);
5952         e1000e_update_stats(adapter);
5953         /* Fill out the OS statistics structure */
5954         stats->rx_bytes = adapter->stats.gorc;
5955         stats->rx_packets = adapter->stats.gprc;
5956         stats->tx_bytes = adapter->stats.gotc;
5957         stats->tx_packets = adapter->stats.gptc;
5958         stats->multicast = adapter->stats.mprc;
5959         stats->collisions = adapter->stats.colc;
5960
5961         /* Rx Errors */
5962
5963         /* RLEC on some newer hardware can be incorrect so build
5964          * our own version based on RUC and ROC
5965          */
5966         stats->rx_errors = adapter->stats.rxerrc +
5967             adapter->stats.crcerrs + adapter->stats.algnerrc +
5968             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5969         stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5970         stats->rx_crc_errors = adapter->stats.crcerrs;
5971         stats->rx_frame_errors = adapter->stats.algnerrc;
5972         stats->rx_missed_errors = adapter->stats.mpc;
5973
5974         /* Tx Errors */
5975         stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5976         stats->tx_aborted_errors = adapter->stats.ecol;
5977         stats->tx_window_errors = adapter->stats.latecol;
5978         stats->tx_carrier_errors = adapter->stats.tncrs;
5979
5980         /* Tx Dropped needs to be maintained elsewhere */
5981
5982         spin_unlock(&adapter->stats64_lock);
5983         return stats;
5984 }
5985
5986 /**
5987  * e1000_change_mtu - Change the Maximum Transfer Unit
5988  * @netdev: network interface device structure
5989  * @new_mtu: new value for maximum frame size
5990  *
5991  * Returns 0 on success, negative on failure
5992  **/
5993 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5994 {
5995         struct e1000_adapter *adapter = netdev_priv(netdev);
5996         int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
5997
5998         /* Jumbo frame support */
5999         if ((max_frame > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) &&
6000             !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
6001                 e_err("Jumbo Frames not supported.\n");
6002                 return -EINVAL;
6003         }
6004
6005         /* Supported frame sizes */
6006         if ((new_mtu < (VLAN_ETH_ZLEN + ETH_FCS_LEN)) ||
6007             (max_frame > adapter->max_hw_frame_size)) {
6008                 e_err("Unsupported MTU setting\n");
6009                 return -EINVAL;
6010         }
6011
6012         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6013         if ((adapter->hw.mac.type >= e1000_pch2lan) &&
6014             !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
6015             (new_mtu > ETH_DATA_LEN)) {
6016                 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
6017                 return -EINVAL;
6018         }
6019
6020         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
6021                 usleep_range(1000, 2000);
6022         /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
6023         adapter->max_frame_size = max_frame;
6024         e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6025         netdev->mtu = new_mtu;
6026
6027         pm_runtime_get_sync(netdev->dev.parent);
6028
6029         if (netif_running(netdev))
6030                 e1000e_down(adapter, true);
6031
6032         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
6033          * means we reserve 2 more, this pushes us to allocate from the next
6034          * larger slab size.
6035          * i.e. RXBUFFER_2048 --> size-4096 slab
6036          * However with the new *_jumbo_rx* routines, jumbo receives will use
6037          * fragmented skbs
6038          */
6039
6040         if (max_frame <= 2048)
6041                 adapter->rx_buffer_len = 2048;
6042         else
6043                 adapter->rx_buffer_len = 4096;
6044
6045         /* adjust allocation if LPE protects us, and we aren't using SBP */
6046         if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
6047                 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
6048
6049         if (netif_running(netdev))
6050                 e1000e_up(adapter);
6051         else
6052                 e1000e_reset(adapter);
6053
6054         pm_runtime_put_sync(netdev->dev.parent);
6055
6056         clear_bit(__E1000_RESETTING, &adapter->state);
6057
6058         return 0;
6059 }
6060
6061 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
6062                            int cmd)
6063 {
6064         struct e1000_adapter *adapter = netdev_priv(netdev);
6065         struct mii_ioctl_data *data = if_mii(ifr);
6066
6067         if (adapter->hw.phy.media_type != e1000_media_type_copper)
6068                 return -EOPNOTSUPP;
6069
6070         switch (cmd) {
6071         case SIOCGMIIPHY:
6072                 data->phy_id = adapter->hw.phy.addr;
6073                 break;
6074         case SIOCGMIIREG:
6075                 e1000_phy_read_status(adapter);
6076
6077                 switch (data->reg_num & 0x1F) {
6078                 case MII_BMCR:
6079                         data->val_out = adapter->phy_regs.bmcr;
6080                         break;
6081                 case MII_BMSR:
6082                         data->val_out = adapter->phy_regs.bmsr;
6083                         break;
6084                 case MII_PHYSID1:
6085                         data->val_out = (adapter->hw.phy.id >> 16);
6086                         break;
6087                 case MII_PHYSID2:
6088                         data->val_out = (adapter->hw.phy.id & 0xFFFF);
6089                         break;
6090                 case MII_ADVERTISE:
6091                         data->val_out = adapter->phy_regs.advertise;
6092                         break;
6093                 case MII_LPA:
6094                         data->val_out = adapter->phy_regs.lpa;
6095                         break;
6096                 case MII_EXPANSION:
6097                         data->val_out = adapter->phy_regs.expansion;
6098                         break;
6099                 case MII_CTRL1000:
6100                         data->val_out = adapter->phy_regs.ctrl1000;
6101                         break;
6102                 case MII_STAT1000:
6103                         data->val_out = adapter->phy_regs.stat1000;
6104                         break;
6105                 case MII_ESTATUS:
6106                         data->val_out = adapter->phy_regs.estatus;
6107                         break;
6108                 default:
6109                         return -EIO;
6110                 }
6111                 break;
6112         case SIOCSMIIREG:
6113         default:
6114                 return -EOPNOTSUPP;
6115         }
6116         return 0;
6117 }
6118
6119 /**
6120  * e1000e_hwtstamp_ioctl - control hardware time stamping
6121  * @netdev: network interface device structure
6122  * @ifreq: interface request
6123  *
6124  * Outgoing time stamping can be enabled and disabled. Play nice and
6125  * disable it when requested, although it shouldn't cause any overhead
6126  * when no packet needs it. At most one packet in the queue may be
6127  * marked for time stamping, otherwise it would be impossible to tell
6128  * for sure to which packet the hardware time stamp belongs.
6129  *
6130  * Incoming time stamping has to be configured via the hardware filters.
6131  * Not all combinations are supported, in particular event type has to be
6132  * specified. Matching the kind of event packet is not supported, with the
6133  * exception of "all V2 events regardless of level 2 or 4".
6134  **/
6135 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6136 {
6137         struct e1000_adapter *adapter = netdev_priv(netdev);
6138         struct hwtstamp_config config;
6139         int ret_val;
6140
6141         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6142                 return -EFAULT;
6143
6144         ret_val = e1000e_config_hwtstamp(adapter, &config);
6145         if (ret_val)
6146                 return ret_val;
6147
6148         switch (config.rx_filter) {
6149         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6150         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6151         case HWTSTAMP_FILTER_PTP_V2_SYNC:
6152         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6153         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6154         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6155                 /* With V2 type filters which specify a Sync or Delay Request,
6156                  * Path Delay Request/Response messages are also time stamped
6157                  * by hardware so notify the caller the requested packets plus
6158                  * some others are time stamped.
6159                  */
6160                 config.rx_filter = HWTSTAMP_FILTER_SOME;
6161                 break;
6162         default:
6163                 break;
6164         }
6165
6166         return copy_to_user(ifr->ifr_data, &config,
6167                             sizeof(config)) ? -EFAULT : 0;
6168 }
6169
6170 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6171 {
6172         struct e1000_adapter *adapter = netdev_priv(netdev);
6173
6174         return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6175                             sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6176 }
6177
6178 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6179 {
6180         switch (cmd) {
6181         case SIOCGMIIPHY:
6182         case SIOCGMIIREG:
6183         case SIOCSMIIREG:
6184                 return e1000_mii_ioctl(netdev, ifr, cmd);
6185         case SIOCSHWTSTAMP:
6186                 return e1000e_hwtstamp_set(netdev, ifr);
6187         case SIOCGHWTSTAMP:
6188                 return e1000e_hwtstamp_get(netdev, ifr);
6189         default:
6190                 return -EOPNOTSUPP;
6191         }
6192 }
6193
6194 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6195 {
6196         struct e1000_hw *hw = &adapter->hw;
6197         u32 i, mac_reg, wuc;
6198         u16 phy_reg, wuc_enable;
6199         int retval;
6200
6201         /* copy MAC RARs to PHY RARs */
6202         e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6203
6204         retval = hw->phy.ops.acquire(hw);
6205         if (retval) {
6206                 e_err("Could not acquire PHY\n");
6207                 return retval;
6208         }
6209
6210         /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6211         retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6212         if (retval)
6213                 goto release;
6214
6215         /* copy MAC MTA to PHY MTA - only needed for pchlan */
6216         for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6217                 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6218                 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6219                                            (u16)(mac_reg & 0xFFFF));
6220                 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6221                                            (u16)((mac_reg >> 16) & 0xFFFF));
6222         }
6223
6224         /* configure PHY Rx Control register */
6225         hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6226         mac_reg = er32(RCTL);
6227         if (mac_reg & E1000_RCTL_UPE)
6228                 phy_reg |= BM_RCTL_UPE;
6229         if (mac_reg & E1000_RCTL_MPE)
6230                 phy_reg |= BM_RCTL_MPE;
6231         phy_reg &= ~(BM_RCTL_MO_MASK);
6232         if (mac_reg & E1000_RCTL_MO_3)
6233                 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6234                             << BM_RCTL_MO_SHIFT);
6235         if (mac_reg & E1000_RCTL_BAM)
6236                 phy_reg |= BM_RCTL_BAM;
6237         if (mac_reg & E1000_RCTL_PMCF)
6238                 phy_reg |= BM_RCTL_PMCF;
6239         mac_reg = er32(CTRL);
6240         if (mac_reg & E1000_CTRL_RFCE)
6241                 phy_reg |= BM_RCTL_RFCE;
6242         hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6243
6244         wuc = E1000_WUC_PME_EN;
6245         if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6246                 wuc |= E1000_WUC_APME;
6247
6248         /* enable PHY wakeup in MAC register */
6249         ew32(WUFC, wufc);
6250         ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6251                    E1000_WUC_PME_STATUS | wuc));
6252
6253         /* configure and enable PHY wakeup in PHY registers */
6254         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6255         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6256
6257         /* activate PHY wakeup */
6258         wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6259         retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6260         if (retval)
6261                 e_err("Could not set PHY Host Wakeup bit\n");
6262 release:
6263         hw->phy.ops.release(hw);
6264
6265         return retval;
6266 }
6267
6268 static void e1000e_flush_lpic(struct pci_dev *pdev)
6269 {
6270         struct net_device *netdev = pci_get_drvdata(pdev);
6271         struct e1000_adapter *adapter = netdev_priv(netdev);
6272         struct e1000_hw *hw = &adapter->hw;
6273         u32 ret_val;
6274
6275         pm_runtime_get_sync(netdev->dev.parent);
6276
6277         ret_val = hw->phy.ops.acquire(hw);
6278         if (ret_val)
6279                 goto fl_out;
6280
6281         pr_info("EEE TX LPI TIMER: %08X\n",
6282                 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6283
6284         hw->phy.ops.release(hw);
6285
6286 fl_out:
6287         pm_runtime_put_sync(netdev->dev.parent);
6288 }
6289
6290 static int e1000e_pm_freeze(struct device *dev)
6291 {
6292         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6293         struct e1000_adapter *adapter = netdev_priv(netdev);
6294
6295         netif_device_detach(netdev);
6296
6297         if (netif_running(netdev)) {
6298                 int count = E1000_CHECK_RESET_COUNT;
6299
6300                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6301                         usleep_range(10000, 20000);
6302
6303                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6304
6305                 /* Quiesce the device without resetting the hardware */
6306                 e1000e_down(adapter, false);
6307                 e1000_free_irq(adapter);
6308         }
6309         e1000e_reset_interrupt_capability(adapter);
6310
6311         /* Allow time for pending master requests to run */
6312         e1000e_disable_pcie_master(&adapter->hw);
6313
6314         return 0;
6315 }
6316
6317 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6318 {
6319         struct net_device *netdev = pci_get_drvdata(pdev);
6320         struct e1000_adapter *adapter = netdev_priv(netdev);
6321         struct e1000_hw *hw = &adapter->hw;
6322         u32 ctrl, ctrl_ext, rctl, status, wufc;
6323         int retval = 0;
6324
6325         /* Runtime suspend should only enable wakeup for link changes */
6326         if (runtime)
6327                 wufc = E1000_WUFC_LNKC;
6328         else if (device_may_wakeup(&pdev->dev))
6329                 wufc = adapter->wol;
6330         else
6331                 wufc = 0;
6332
6333         status = er32(STATUS);
6334         if (status & E1000_STATUS_LU)
6335                 wufc &= ~E1000_WUFC_LNKC;
6336
6337         if (wufc) {
6338                 e1000_setup_rctl(adapter);
6339                 e1000e_set_rx_mode(netdev);
6340
6341                 /* turn on all-multi mode if wake on multicast is enabled */
6342                 if (wufc & E1000_WUFC_MC) {
6343                         rctl = er32(RCTL);
6344                         rctl |= E1000_RCTL_MPE;
6345                         ew32(RCTL, rctl);
6346                 }
6347
6348                 ctrl = er32(CTRL);
6349                 ctrl |= E1000_CTRL_ADVD3WUC;
6350                 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6351                         ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6352                 ew32(CTRL, ctrl);
6353
6354                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6355                     adapter->hw.phy.media_type ==
6356                     e1000_media_type_internal_serdes) {
6357                         /* keep the laser running in D3 */
6358                         ctrl_ext = er32(CTRL_EXT);
6359                         ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6360                         ew32(CTRL_EXT, ctrl_ext);
6361                 }
6362
6363                 if (!runtime)
6364                         e1000e_power_up_phy(adapter);
6365
6366                 if (adapter->flags & FLAG_IS_ICH)
6367                         e1000_suspend_workarounds_ich8lan(&adapter->hw);
6368
6369                 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6370                         /* enable wakeup by the PHY */
6371                         retval = e1000_init_phy_wakeup(adapter, wufc);
6372                         if (retval)
6373                                 return retval;
6374                 } else {
6375                         /* enable wakeup by the MAC */
6376                         ew32(WUFC, wufc);
6377                         ew32(WUC, E1000_WUC_PME_EN);
6378                 }
6379         } else {
6380                 ew32(WUC, 0);
6381                 ew32(WUFC, 0);
6382
6383                 e1000_power_down_phy(adapter);
6384         }
6385
6386         if (adapter->hw.phy.type == e1000_phy_igp_3) {
6387                 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6388         } else if ((hw->mac.type == e1000_pch_lpt) ||
6389                    (hw->mac.type == e1000_pch_spt)) {
6390                 if (wufc && !(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6391                         /* ULP does not support wake from unicast, multicast
6392                          * or broadcast.
6393                          */
6394                         retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6395
6396                 if (retval)
6397                         return retval;
6398         }
6399
6400         /* Ensure that the appropriate bits are set in LPI_CTRL
6401          * for EEE in Sx
6402          */
6403         if ((hw->phy.type >= e1000_phy_i217) &&
6404             adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6405                 u16 lpi_ctrl = 0;
6406
6407                 retval = hw->phy.ops.acquire(hw);
6408                 if (!retval) {
6409                         retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6410                                                  &lpi_ctrl);
6411                         if (!retval) {
6412                                 if (adapter->eee_advert &
6413                                     hw->dev_spec.ich8lan.eee_lp_ability &
6414                                     I82579_EEE_100_SUPPORTED)
6415                                         lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6416                                 if (adapter->eee_advert &
6417                                     hw->dev_spec.ich8lan.eee_lp_ability &
6418                                     I82579_EEE_1000_SUPPORTED)
6419                                         lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6420
6421                                 retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6422                                                          lpi_ctrl);
6423                         }
6424                 }
6425                 hw->phy.ops.release(hw);
6426         }
6427
6428         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
6429          * would have already happened in close and is redundant.
6430          */
6431         e1000e_release_hw_control(adapter);
6432
6433         pci_clear_master(pdev);
6434
6435         /* The pci-e switch on some quad port adapters will report a
6436          * correctable error when the MAC transitions from D0 to D3.  To
6437          * prevent this we need to mask off the correctable errors on the
6438          * downstream port of the pci-e switch.
6439          *
6440          * We don't have the associated upstream bridge while assigning
6441          * the PCI device into guest. For example, the KVM on power is
6442          * one of the cases.
6443          */
6444         if (adapter->flags & FLAG_IS_QUAD_PORT) {
6445                 struct pci_dev *us_dev = pdev->bus->self;
6446                 u16 devctl;
6447
6448                 if (!us_dev)
6449                         return 0;
6450
6451                 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6452                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6453                                            (devctl & ~PCI_EXP_DEVCTL_CERE));
6454
6455                 pci_save_state(pdev);
6456                 pci_prepare_to_sleep(pdev);
6457
6458                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6459         }
6460
6461         return 0;
6462 }
6463
6464 /**
6465  * __e1000e_disable_aspm - Disable ASPM states
6466  * @pdev: pointer to PCI device struct
6467  * @state: bit-mask of ASPM states to disable
6468  * @locked: indication if this context holds pci_bus_sem locked.
6469  *
6470  * Some devices *must* have certain ASPM states disabled per hardware errata.
6471  **/
6472 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6473 {
6474         struct pci_dev *parent = pdev->bus->self;
6475         u16 aspm_dis_mask = 0;
6476         u16 pdev_aspmc, parent_aspmc;
6477
6478         switch (state) {
6479         case PCIE_LINK_STATE_L0S:
6480         case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6481                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6482                 /* fall-through - can't have L1 without L0s */
6483         case PCIE_LINK_STATE_L1:
6484                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6485                 break;
6486         default:
6487                 return;
6488         }
6489
6490         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6491         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6492
6493         if (parent) {
6494                 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6495                                           &parent_aspmc);
6496                 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6497         }
6498
6499         /* Nothing to do if the ASPM states to be disabled already are */
6500         if (!(pdev_aspmc & aspm_dis_mask) &&
6501             (!parent || !(parent_aspmc & aspm_dis_mask)))
6502                 return;
6503
6504         dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6505                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6506                  "L0s" : "",
6507                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6508                  "L1" : "");
6509
6510 #ifdef CONFIG_PCIEASPM
6511         if (locked)
6512                 pci_disable_link_state_locked(pdev, state);
6513         else
6514                 pci_disable_link_state(pdev, state);
6515
6516         /* Double-check ASPM control.  If not disabled by the above, the
6517          * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6518          * not enabled); override by writing PCI config space directly.
6519          */
6520         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6521         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6522
6523         if (!(aspm_dis_mask & pdev_aspmc))
6524                 return;
6525 #endif
6526
6527         /* Both device and parent should have the same ASPM setting.
6528          * Disable ASPM in downstream component first and then upstream.
6529          */
6530         pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6531
6532         if (parent)
6533                 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6534                                            aspm_dis_mask);
6535 }
6536
6537 /**
6538  * e1000e_disable_aspm - Disable ASPM states.
6539  * @pdev: pointer to PCI device struct
6540  * @state: bit-mask of ASPM states to disable
6541  *
6542  * This function acquires the pci_bus_sem!
6543  * Some devices *must* have certain ASPM states disabled per hardware errata.
6544  **/
6545 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6546 {
6547         __e1000e_disable_aspm(pdev, state, 0);
6548 }
6549
6550 /**
6551  * e1000e_disable_aspm_locked   Disable ASPM states.
6552  * @pdev: pointer to PCI device struct
6553  * @state: bit-mask of ASPM states to disable
6554  *
6555  * This function must be called with pci_bus_sem acquired!
6556  * Some devices *must* have certain ASPM states disabled per hardware errata.
6557  **/
6558 static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6559 {
6560         __e1000e_disable_aspm(pdev, state, 1);
6561 }
6562
6563 #ifdef CONFIG_PM
6564 static int __e1000_resume(struct pci_dev *pdev)
6565 {
6566         struct net_device *netdev = pci_get_drvdata(pdev);
6567         struct e1000_adapter *adapter = netdev_priv(netdev);
6568         struct e1000_hw *hw = &adapter->hw;
6569         u16 aspm_disable_flag = 0;
6570
6571         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6572                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6573         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6574                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6575         if (aspm_disable_flag)
6576                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6577
6578         pci_set_master(pdev);
6579
6580         if (hw->mac.type >= e1000_pch2lan)
6581                 e1000_resume_workarounds_pchlan(&adapter->hw);
6582
6583         e1000e_power_up_phy(adapter);
6584
6585         /* report the system wakeup cause from S3/S4 */
6586         if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6587                 u16 phy_data;
6588
6589                 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6590                 if (phy_data) {
6591                         e_info("PHY Wakeup cause - %s\n",
6592                                phy_data & E1000_WUS_EX ? "Unicast Packet" :
6593                                phy_data & E1000_WUS_MC ? "Multicast Packet" :
6594                                phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6595                                phy_data & E1000_WUS_MAG ? "Magic Packet" :
6596                                phy_data & E1000_WUS_LNKC ?
6597                                "Link Status Change" : "other");
6598                 }
6599                 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6600         } else {
6601                 u32 wus = er32(WUS);
6602
6603                 if (wus) {
6604                         e_info("MAC Wakeup cause - %s\n",
6605                                wus & E1000_WUS_EX ? "Unicast Packet" :
6606                                wus & E1000_WUS_MC ? "Multicast Packet" :
6607                                wus & E1000_WUS_BC ? "Broadcast Packet" :
6608                                wus & E1000_WUS_MAG ? "Magic Packet" :
6609                                wus & E1000_WUS_LNKC ? "Link Status Change" :
6610                                "other");
6611                 }
6612                 ew32(WUS, ~0);
6613         }
6614
6615         e1000e_reset(adapter);
6616
6617         e1000_init_manageability_pt(adapter);
6618
6619         /* If the controller has AMT, do not set DRV_LOAD until the interface
6620          * is up.  For all other cases, let the f/w know that the h/w is now
6621          * under the control of the driver.
6622          */
6623         if (!(adapter->flags & FLAG_HAS_AMT))
6624                 e1000e_get_hw_control(adapter);
6625
6626         return 0;
6627 }
6628
6629 #ifdef CONFIG_PM_SLEEP
6630 static int e1000e_pm_thaw(struct device *dev)
6631 {
6632         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6633         struct e1000_adapter *adapter = netdev_priv(netdev);
6634
6635         e1000e_set_interrupt_capability(adapter);
6636         if (netif_running(netdev)) {
6637                 u32 err = e1000_request_irq(adapter);
6638
6639                 if (err)
6640                         return err;
6641
6642                 e1000e_up(adapter);
6643         }
6644
6645         netif_device_attach(netdev);
6646
6647         return 0;
6648 }
6649
6650 static int e1000e_pm_suspend(struct device *dev)
6651 {
6652         struct pci_dev *pdev = to_pci_dev(dev);
6653         int rc;
6654
6655         e1000e_flush_lpic(pdev);
6656
6657         e1000e_pm_freeze(dev);
6658
6659         rc = __e1000_shutdown(pdev, false);
6660         if (rc)
6661                 e1000e_pm_thaw(dev);
6662
6663         return rc;
6664 }
6665
6666 static int e1000e_pm_resume(struct device *dev)
6667 {
6668         struct pci_dev *pdev = to_pci_dev(dev);
6669         int rc;
6670
6671         rc = __e1000_resume(pdev);
6672         if (rc)
6673                 return rc;
6674
6675         return e1000e_pm_thaw(dev);
6676 }
6677 #endif /* CONFIG_PM_SLEEP */
6678
6679 static int e1000e_pm_runtime_idle(struct device *dev)
6680 {
6681         struct pci_dev *pdev = to_pci_dev(dev);
6682         struct net_device *netdev = pci_get_drvdata(pdev);
6683         struct e1000_adapter *adapter = netdev_priv(netdev);
6684         u16 eee_lp;
6685
6686         eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
6687
6688         if (!e1000e_has_link(adapter)) {
6689                 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
6690                 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
6691         }
6692
6693         return -EBUSY;
6694 }
6695
6696 static int e1000e_pm_runtime_resume(struct device *dev)
6697 {
6698         struct pci_dev *pdev = to_pci_dev(dev);
6699         struct net_device *netdev = pci_get_drvdata(pdev);
6700         struct e1000_adapter *adapter = netdev_priv(netdev);
6701         int rc;
6702
6703         rc = __e1000_resume(pdev);
6704         if (rc)
6705                 return rc;
6706
6707         if (netdev->flags & IFF_UP)
6708                 e1000e_up(adapter);
6709
6710         return rc;
6711 }
6712
6713 static int e1000e_pm_runtime_suspend(struct device *dev)
6714 {
6715         struct pci_dev *pdev = to_pci_dev(dev);
6716         struct net_device *netdev = pci_get_drvdata(pdev);
6717         struct e1000_adapter *adapter = netdev_priv(netdev);
6718
6719         if (netdev->flags & IFF_UP) {
6720                 int count = E1000_CHECK_RESET_COUNT;
6721
6722                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6723                         usleep_range(10000, 20000);
6724
6725                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6726
6727                 /* Down the device without resetting the hardware */
6728                 e1000e_down(adapter, false);
6729         }
6730
6731         if (__e1000_shutdown(pdev, true)) {
6732                 e1000e_pm_runtime_resume(dev);
6733                 return -EBUSY;
6734         }
6735
6736         return 0;
6737 }
6738 #endif /* CONFIG_PM */
6739
6740 static void e1000_shutdown(struct pci_dev *pdev)
6741 {
6742         e1000e_flush_lpic(pdev);
6743
6744         e1000e_pm_freeze(&pdev->dev);
6745
6746         __e1000_shutdown(pdev, false);
6747 }
6748
6749 #ifdef CONFIG_NET_POLL_CONTROLLER
6750
6751 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
6752 {
6753         struct net_device *netdev = data;
6754         struct e1000_adapter *adapter = netdev_priv(netdev);
6755
6756         if (adapter->msix_entries) {
6757                 int vector, msix_irq;
6758
6759                 vector = 0;
6760                 msix_irq = adapter->msix_entries[vector].vector;
6761                 disable_irq(msix_irq);
6762                 e1000_intr_msix_rx(msix_irq, netdev);
6763                 enable_irq(msix_irq);
6764
6765                 vector++;
6766                 msix_irq = adapter->msix_entries[vector].vector;
6767                 disable_irq(msix_irq);
6768                 e1000_intr_msix_tx(msix_irq, netdev);
6769                 enable_irq(msix_irq);
6770
6771                 vector++;
6772                 msix_irq = adapter->msix_entries[vector].vector;
6773                 disable_irq(msix_irq);
6774                 e1000_msix_other(msix_irq, netdev);
6775                 enable_irq(msix_irq);
6776         }
6777
6778         return IRQ_HANDLED;
6779 }
6780
6781 /**
6782  * e1000_netpoll
6783  * @netdev: network interface device structure
6784  *
6785  * Polling 'interrupt' - used by things like netconsole to send skbs
6786  * without having to re-enable interrupts. It's not called while
6787  * the interrupt routine is executing.
6788  */
6789 static void e1000_netpoll(struct net_device *netdev)
6790 {
6791         struct e1000_adapter *adapter = netdev_priv(netdev);
6792
6793         switch (adapter->int_mode) {
6794         case E1000E_INT_MODE_MSIX:
6795                 e1000_intr_msix(adapter->pdev->irq, netdev);
6796                 break;
6797         case E1000E_INT_MODE_MSI:
6798                 disable_irq(adapter->pdev->irq);
6799                 e1000_intr_msi(adapter->pdev->irq, netdev);
6800                 enable_irq(adapter->pdev->irq);
6801                 break;
6802         default:                /* E1000E_INT_MODE_LEGACY */
6803                 disable_irq(adapter->pdev->irq);
6804                 e1000_intr(adapter->pdev->irq, netdev);
6805                 enable_irq(adapter->pdev->irq);
6806                 break;
6807         }
6808 }
6809 #endif
6810
6811 /**
6812  * e1000_io_error_detected - called when PCI error is detected
6813  * @pdev: Pointer to PCI device
6814  * @state: The current pci connection state
6815  *
6816  * This function is called after a PCI bus error affecting
6817  * this device has been detected.
6818  */
6819 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
6820                                                 pci_channel_state_t state)
6821 {
6822         struct net_device *netdev = pci_get_drvdata(pdev);
6823         struct e1000_adapter *adapter = netdev_priv(netdev);
6824
6825         netif_device_detach(netdev);
6826
6827         if (state == pci_channel_io_perm_failure)
6828                 return PCI_ERS_RESULT_DISCONNECT;
6829
6830         if (netif_running(netdev))
6831                 e1000e_down(adapter, true);
6832         pci_disable_device(pdev);
6833
6834         /* Request a slot slot reset. */
6835         return PCI_ERS_RESULT_NEED_RESET;
6836 }
6837
6838 /**
6839  * e1000_io_slot_reset - called after the pci bus has been reset.
6840  * @pdev: Pointer to PCI device
6841  *
6842  * Restart the card from scratch, as if from a cold-boot. Implementation
6843  * resembles the first-half of the e1000e_pm_resume routine.
6844  */
6845 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
6846 {
6847         struct net_device *netdev = pci_get_drvdata(pdev);
6848         struct e1000_adapter *adapter = netdev_priv(netdev);
6849         struct e1000_hw *hw = &adapter->hw;
6850         u16 aspm_disable_flag = 0;
6851         int err;
6852         pci_ers_result_t result;
6853
6854         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6855                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6856         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6857                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6858         if (aspm_disable_flag)
6859                 e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
6860
6861         err = pci_enable_device_mem(pdev);
6862         if (err) {
6863                 dev_err(&pdev->dev,
6864                         "Cannot re-enable PCI device after reset.\n");
6865                 result = PCI_ERS_RESULT_DISCONNECT;
6866         } else {
6867                 pdev->state_saved = true;
6868                 pci_restore_state(pdev);
6869                 pci_set_master(pdev);
6870
6871                 pci_enable_wake(pdev, PCI_D3hot, 0);
6872                 pci_enable_wake(pdev, PCI_D3cold, 0);
6873
6874                 e1000e_reset(adapter);
6875                 ew32(WUS, ~0);
6876                 result = PCI_ERS_RESULT_RECOVERED;
6877         }
6878
6879         pci_cleanup_aer_uncorrect_error_status(pdev);
6880
6881         return result;
6882 }
6883
6884 /**
6885  * e1000_io_resume - called when traffic can start flowing again.
6886  * @pdev: Pointer to PCI device
6887  *
6888  * This callback is called when the error recovery driver tells us that
6889  * its OK to resume normal operation. Implementation resembles the
6890  * second-half of the e1000e_pm_resume routine.
6891  */
6892 static void e1000_io_resume(struct pci_dev *pdev)
6893 {
6894         struct net_device *netdev = pci_get_drvdata(pdev);
6895         struct e1000_adapter *adapter = netdev_priv(netdev);
6896
6897         e1000_init_manageability_pt(adapter);
6898
6899         if (netif_running(netdev))
6900                 e1000e_up(adapter);
6901
6902         netif_device_attach(netdev);
6903
6904         /* If the controller has AMT, do not set DRV_LOAD until the interface
6905          * is up.  For all other cases, let the f/w know that the h/w is now
6906          * under the control of the driver.
6907          */
6908         if (!(adapter->flags & FLAG_HAS_AMT))
6909                 e1000e_get_hw_control(adapter);
6910 }
6911
6912 static void e1000_print_device_info(struct e1000_adapter *adapter)
6913 {
6914         struct e1000_hw *hw = &adapter->hw;
6915         struct net_device *netdev = adapter->netdev;
6916         u32 ret_val;
6917         u8 pba_str[E1000_PBANUM_LENGTH];
6918
6919         /* print bus type/speed/width info */
6920         e_info("(PCI Express:2.5GT/s:%s) %pM\n",
6921                /* bus width */
6922                ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
6923                 "Width x1"),
6924                /* MAC address */
6925                netdev->dev_addr);
6926         e_info("Intel(R) PRO/%s Network Connection\n",
6927                (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
6928         ret_val = e1000_read_pba_string_generic(hw, pba_str,
6929                                                 E1000_PBANUM_LENGTH);
6930         if (ret_val)
6931                 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
6932         e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6933                hw->mac.type, hw->phy.type, pba_str);
6934 }
6935
6936 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6937 {
6938         struct e1000_hw *hw = &adapter->hw;
6939         int ret_val;
6940         u16 buf = 0;
6941
6942         if (hw->mac.type != e1000_82573)
6943                 return;
6944
6945         ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
6946         le16_to_cpus(&buf);
6947         if (!ret_val && (!(buf & BIT(0)))) {
6948                 /* Deep Smart Power Down (DSPD) */
6949                 dev_warn(&adapter->pdev->dev,
6950                          "Warning: detected DSPD enabled in EEPROM\n");
6951         }
6952 }
6953
6954 static netdev_features_t e1000_fix_features(struct net_device *netdev,
6955                                             netdev_features_t features)
6956 {
6957         struct e1000_adapter *adapter = netdev_priv(netdev);
6958         struct e1000_hw *hw = &adapter->hw;
6959
6960         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6961         if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
6962                 features &= ~NETIF_F_RXFCS;
6963
6964         /* Since there is no support for separate Rx/Tx vlan accel
6965          * enable/disable make sure Tx flag is always in same state as Rx.
6966          */
6967         if (features & NETIF_F_HW_VLAN_CTAG_RX)
6968                 features |= NETIF_F_HW_VLAN_CTAG_TX;
6969         else
6970                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
6971
6972         return features;
6973 }
6974
6975 static int e1000_set_features(struct net_device *netdev,
6976                               netdev_features_t features)
6977 {
6978         struct e1000_adapter *adapter = netdev_priv(netdev);
6979         netdev_features_t changed = features ^ netdev->features;
6980
6981         if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6982                 adapter->flags |= FLAG_TSO_FORCE;
6983
6984         if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
6985                          NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6986                          NETIF_F_RXALL)))
6987                 return 0;
6988
6989         if (changed & NETIF_F_RXFCS) {
6990                 if (features & NETIF_F_RXFCS) {
6991                         adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6992                 } else {
6993                         /* We need to take it back to defaults, which might mean
6994                          * stripping is still disabled at the adapter level.
6995                          */
6996                         if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6997                                 adapter->flags2 |= FLAG2_CRC_STRIPPING;
6998                         else
6999                                 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7000                 }
7001         }
7002
7003         netdev->features = features;
7004
7005         if (netif_running(netdev))
7006                 e1000e_reinit_locked(adapter);
7007         else
7008                 e1000e_reset(adapter);
7009
7010         return 0;
7011 }
7012
7013 static const struct net_device_ops e1000e_netdev_ops = {
7014         .ndo_open               = e1000e_open,
7015         .ndo_stop               = e1000e_close,
7016         .ndo_start_xmit         = e1000_xmit_frame,
7017         .ndo_get_stats64        = e1000e_get_stats64,
7018         .ndo_set_rx_mode        = e1000e_set_rx_mode,
7019         .ndo_set_mac_address    = e1000_set_mac,
7020         .ndo_change_mtu         = e1000_change_mtu,
7021         .ndo_do_ioctl           = e1000_ioctl,
7022         .ndo_tx_timeout         = e1000_tx_timeout,
7023         .ndo_validate_addr      = eth_validate_addr,
7024
7025         .ndo_vlan_rx_add_vid    = e1000_vlan_rx_add_vid,
7026         .ndo_vlan_rx_kill_vid   = e1000_vlan_rx_kill_vid,
7027 #ifdef CONFIG_NET_POLL_CONTROLLER
7028         .ndo_poll_controller    = e1000_netpoll,
7029 #endif
7030         .ndo_set_features = e1000_set_features,
7031         .ndo_fix_features = e1000_fix_features,
7032         .ndo_features_check     = passthru_features_check,
7033 };
7034
7035 /**
7036  * e1000_probe - Device Initialization Routine
7037  * @pdev: PCI device information struct
7038  * @ent: entry in e1000_pci_tbl
7039  *
7040  * Returns 0 on success, negative on failure
7041  *
7042  * e1000_probe initializes an adapter identified by a pci_dev structure.
7043  * The OS initialization, configuring of the adapter private structure,
7044  * and a hardware reset occur.
7045  **/
7046 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7047 {
7048         struct net_device *netdev;
7049         struct e1000_adapter *adapter;
7050         struct e1000_hw *hw;
7051         const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
7052         resource_size_t mmio_start, mmio_len;
7053         resource_size_t flash_start, flash_len;
7054         static int cards_found;
7055         u16 aspm_disable_flag = 0;
7056         int bars, i, err, pci_using_dac;
7057         u16 eeprom_data = 0;
7058         u16 eeprom_apme_mask = E1000_EEPROM_APME;
7059         s32 ret_val = 0;
7060
7061         if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
7062                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7063         if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
7064                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7065         if (aspm_disable_flag)
7066                 e1000e_disable_aspm(pdev, aspm_disable_flag);
7067
7068         err = pci_enable_device_mem(pdev);
7069         if (err)
7070                 return err;
7071
7072         pci_using_dac = 0;
7073         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7074         if (!err) {
7075                 pci_using_dac = 1;
7076         } else {
7077                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7078                 if (err) {
7079                         dev_err(&pdev->dev,
7080                                 "No usable DMA configuration, aborting\n");
7081                         goto err_dma;
7082                 }
7083         }
7084
7085         bars = pci_select_bars(pdev, IORESOURCE_MEM);
7086         err = pci_request_selected_regions_exclusive(pdev, bars,
7087                                                      e1000e_driver_name);
7088         if (err)
7089                 goto err_pci_reg;
7090
7091         /* AER (Advanced Error Reporting) hooks */
7092         pci_enable_pcie_error_reporting(pdev);
7093
7094         pci_set_master(pdev);
7095         /* PCI config space info */
7096         err = pci_save_state(pdev);
7097         if (err)
7098                 goto err_alloc_etherdev;
7099
7100         err = -ENOMEM;
7101         netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7102         if (!netdev)
7103                 goto err_alloc_etherdev;
7104
7105         SET_NETDEV_DEV(netdev, &pdev->dev);
7106
7107         netdev->irq = pdev->irq;
7108
7109         pci_set_drvdata(pdev, netdev);
7110         adapter = netdev_priv(netdev);
7111         hw = &adapter->hw;
7112         adapter->netdev = netdev;
7113         adapter->pdev = pdev;
7114         adapter->ei = ei;
7115         adapter->pba = ei->pba;
7116         adapter->flags = ei->flags;
7117         adapter->flags2 = ei->flags2;
7118         adapter->hw.adapter = adapter;
7119         adapter->hw.mac.type = ei->mac;
7120         adapter->max_hw_frame_size = ei->max_hw_frame_size;
7121         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7122
7123         mmio_start = pci_resource_start(pdev, 0);
7124         mmio_len = pci_resource_len(pdev, 0);
7125
7126         err = -EIO;
7127         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7128         if (!adapter->hw.hw_addr)
7129                 goto err_ioremap;
7130
7131         if ((adapter->flags & FLAG_HAS_FLASH) &&
7132             (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7133             (hw->mac.type < e1000_pch_spt)) {
7134                 flash_start = pci_resource_start(pdev, 1);
7135                 flash_len = pci_resource_len(pdev, 1);
7136                 adapter->hw.flash_address = ioremap(flash_start, flash_len);
7137                 if (!adapter->hw.flash_address)
7138                         goto err_flashmap;
7139         }
7140
7141         /* Set default EEE advertisement */
7142         if (adapter->flags2 & FLAG2_HAS_EEE)
7143                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7144
7145         /* construct the net_device struct */
7146         netdev->netdev_ops = &e1000e_netdev_ops;
7147         e1000e_set_ethtool_ops(netdev);
7148         netdev->watchdog_timeo = 5 * HZ;
7149         netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
7150         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7151
7152         netdev->mem_start = mmio_start;
7153         netdev->mem_end = mmio_start + mmio_len;
7154
7155         adapter->bd_number = cards_found++;
7156
7157         e1000e_check_options(adapter);
7158
7159         /* setup adapter struct */
7160         err = e1000_sw_init(adapter);
7161         if (err)
7162                 goto err_sw_init;
7163
7164         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7165         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7166         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7167
7168         err = ei->get_variants(adapter);
7169         if (err)
7170                 goto err_hw_init;
7171
7172         if ((adapter->flags & FLAG_IS_ICH) &&
7173             (adapter->flags & FLAG_READ_ONLY_NVM) &&
7174             (hw->mac.type < e1000_pch_spt))
7175                 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7176
7177         hw->mac.ops.get_bus_info(&adapter->hw);
7178
7179         adapter->hw.phy.autoneg_wait_to_complete = 0;
7180
7181         /* Copper options */
7182         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7183                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7184                 adapter->hw.phy.disable_polarity_correction = 0;
7185                 adapter->hw.phy.ms_type = e1000_ms_hw_default;
7186         }
7187
7188         if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7189                 dev_info(&pdev->dev,
7190                          "PHY reset is blocked due to SOL/IDER session.\n");
7191
7192         /* Set initial default active device features */
7193         netdev->features = (NETIF_F_SG |
7194                             NETIF_F_HW_VLAN_CTAG_RX |
7195                             NETIF_F_HW_VLAN_CTAG_TX |
7196                             NETIF_F_TSO |
7197                             NETIF_F_TSO6 |
7198                             NETIF_F_RXHASH |
7199                             NETIF_F_RXCSUM |
7200                             NETIF_F_HW_CSUM);
7201
7202         /* Set user-changeable features (subset of all device features) */
7203         netdev->hw_features = netdev->features;
7204         netdev->hw_features |= NETIF_F_RXFCS;
7205         netdev->priv_flags |= IFF_SUPP_NOFCS;
7206         netdev->hw_features |= NETIF_F_RXALL;
7207
7208         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7209                 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7210
7211         netdev->vlan_features |= (NETIF_F_SG |
7212                                   NETIF_F_TSO |
7213                                   NETIF_F_TSO6 |
7214                                   NETIF_F_HW_CSUM);
7215
7216         netdev->priv_flags |= IFF_UNICAST_FLT;
7217
7218         if (pci_using_dac) {
7219                 netdev->features |= NETIF_F_HIGHDMA;
7220                 netdev->vlan_features |= NETIF_F_HIGHDMA;
7221         }
7222
7223         if (e1000e_enable_mng_pass_thru(&adapter->hw))
7224                 adapter->flags |= FLAG_MNG_PT_ENABLED;
7225
7226         /* before reading the NVM, reset the controller to
7227          * put the device in a known good starting state
7228          */
7229         adapter->hw.mac.ops.reset_hw(&adapter->hw);
7230
7231         /* systems with ASPM and others may see the checksum fail on the first
7232          * attempt. Let's give it a few tries
7233          */
7234         for (i = 0;; i++) {
7235                 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7236                         break;
7237                 if (i == 2) {
7238                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7239                         err = -EIO;
7240                         goto err_eeprom;
7241                 }
7242         }
7243
7244         e1000_eeprom_checks(adapter);
7245
7246         /* copy the MAC address */
7247         if (e1000e_read_mac_addr(&adapter->hw))
7248                 dev_err(&pdev->dev,
7249                         "NVM Read Error while reading MAC address\n");
7250
7251         memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
7252
7253         if (!is_valid_ether_addr(netdev->dev_addr)) {
7254                 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7255                         netdev->dev_addr);
7256                 err = -EIO;
7257                 goto err_eeprom;
7258         }
7259
7260         init_timer(&adapter->watchdog_timer);
7261         adapter->watchdog_timer.function = e1000_watchdog;
7262         adapter->watchdog_timer.data = (unsigned long)adapter;
7263
7264         init_timer(&adapter->phy_info_timer);
7265         adapter->phy_info_timer.function = e1000_update_phy_info;
7266         adapter->phy_info_timer.data = (unsigned long)adapter;
7267
7268         INIT_WORK(&adapter->reset_task, e1000_reset_task);
7269         INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7270         INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7271         INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7272         INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7273
7274         /* Initialize link parameters. User can change them with ethtool */
7275         adapter->hw.mac.autoneg = 1;
7276         adapter->fc_autoneg = true;
7277         adapter->hw.fc.requested_mode = e1000_fc_default;
7278         adapter->hw.fc.current_mode = e1000_fc_default;
7279         adapter->hw.phy.autoneg_advertised = 0x2f;
7280
7281         /* Initial Wake on LAN setting - If APM wake is enabled in
7282          * the EEPROM, enable the ACPI Magic Packet filter
7283          */
7284         if (adapter->flags & FLAG_APME_IN_WUC) {
7285                 /* APME bit in EEPROM is mapped to WUC.APME */
7286                 eeprom_data = er32(WUC);
7287                 eeprom_apme_mask = E1000_WUC_APME;
7288                 if ((hw->mac.type > e1000_ich10lan) &&
7289                     (eeprom_data & E1000_WUC_PHY_WAKE))
7290                         adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7291         } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7292                 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7293                     (adapter->hw.bus.func == 1))
7294                         ret_val = e1000_read_nvm(&adapter->hw,
7295                                               NVM_INIT_CONTROL3_PORT_B,
7296                                               1, &eeprom_data);
7297                 else
7298                         ret_val = e1000_read_nvm(&adapter->hw,
7299                                               NVM_INIT_CONTROL3_PORT_A,
7300                                               1, &eeprom_data);
7301         }
7302
7303         /* fetch WoL from EEPROM */
7304         if (ret_val)
7305                 e_dbg("NVM read error getting WoL initial values: %d\n", ret_val);
7306         else if (eeprom_data & eeprom_apme_mask)
7307                 adapter->eeprom_wol |= E1000_WUFC_MAG;
7308
7309         /* now that we have the eeprom settings, apply the special cases
7310          * where the eeprom may be wrong or the board simply won't support
7311          * wake on lan on a particular port
7312          */
7313         if (!(adapter->flags & FLAG_HAS_WOL))
7314                 adapter->eeprom_wol = 0;
7315
7316         /* initialize the wol settings based on the eeprom settings */
7317         adapter->wol = adapter->eeprom_wol;
7318
7319         /* make sure adapter isn't asleep if manageability is enabled */
7320         if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7321             (hw->mac.ops.check_mng_mode(hw)))
7322                 device_wakeup_enable(&pdev->dev);
7323
7324         /* save off EEPROM version number */
7325         ret_val = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7326
7327         if (ret_val) {
7328                 e_dbg("NVM read error getting EEPROM version: %d\n", ret_val);
7329                 adapter->eeprom_vers = 0;
7330         }
7331
7332         /* init PTP hardware clock */
7333         e1000e_ptp_init(adapter);
7334
7335         /* reset the hardware with the new settings */
7336         e1000e_reset(adapter);
7337
7338         /* If the controller has AMT, do not set DRV_LOAD until the interface
7339          * is up.  For all other cases, let the f/w know that the h/w is now
7340          * under the control of the driver.
7341          */
7342         if (!(adapter->flags & FLAG_HAS_AMT))
7343                 e1000e_get_hw_control(adapter);
7344
7345         strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7346         err = register_netdev(netdev);
7347         if (err)
7348                 goto err_register;
7349
7350         /* carrier off reporting is important to ethtool even BEFORE open */
7351         netif_carrier_off(netdev);
7352
7353         e1000_print_device_info(adapter);
7354
7355         if (pci_dev_run_wake(pdev))
7356                 pm_runtime_put_noidle(&pdev->dev);
7357
7358         return 0;
7359
7360 err_register:
7361         if (!(adapter->flags & FLAG_HAS_AMT))
7362                 e1000e_release_hw_control(adapter);
7363 err_eeprom:
7364         if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7365                 e1000_phy_hw_reset(&adapter->hw);
7366 err_hw_init:
7367         kfree(adapter->tx_ring);
7368         kfree(adapter->rx_ring);
7369 err_sw_init:
7370         if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7371                 iounmap(adapter->hw.flash_address);
7372         e1000e_reset_interrupt_capability(adapter);
7373 err_flashmap:
7374         iounmap(adapter->hw.hw_addr);
7375 err_ioremap:
7376         free_netdev(netdev);
7377 err_alloc_etherdev:
7378         pci_disable_pcie_error_reporting(pdev);
7379         pci_release_mem_regions(pdev);
7380 err_pci_reg:
7381 err_dma:
7382         pci_disable_device(pdev);
7383         return err;
7384 }
7385
7386 /**
7387  * e1000_remove - Device Removal Routine
7388  * @pdev: PCI device information struct
7389  *
7390  * e1000_remove is called by the PCI subsystem to alert the driver
7391  * that it should release a PCI device.  The could be caused by a
7392  * Hot-Plug event, or because the driver is going to be removed from
7393  * memory.
7394  **/
7395 static void e1000_remove(struct pci_dev *pdev)
7396 {
7397         struct net_device *netdev = pci_get_drvdata(pdev);
7398         struct e1000_adapter *adapter = netdev_priv(netdev);
7399         bool down = test_bit(__E1000_DOWN, &adapter->state);
7400
7401         e1000e_ptp_remove(adapter);
7402
7403         /* The timers may be rescheduled, so explicitly disable them
7404          * from being rescheduled.
7405          */
7406         if (!down)
7407                 set_bit(__E1000_DOWN, &adapter->state);
7408         del_timer_sync(&adapter->watchdog_timer);
7409         del_timer_sync(&adapter->phy_info_timer);
7410
7411         cancel_work_sync(&adapter->reset_task);
7412         cancel_work_sync(&adapter->watchdog_task);
7413         cancel_work_sync(&adapter->downshift_task);
7414         cancel_work_sync(&adapter->update_phy_task);
7415         cancel_work_sync(&adapter->print_hang_task);
7416
7417         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7418                 cancel_work_sync(&adapter->tx_hwtstamp_work);
7419                 if (adapter->tx_hwtstamp_skb) {
7420                         dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
7421                         adapter->tx_hwtstamp_skb = NULL;
7422                 }
7423         }
7424
7425         /* Don't lie to e1000_close() down the road. */
7426         if (!down)
7427                 clear_bit(__E1000_DOWN, &adapter->state);
7428         unregister_netdev(netdev);
7429
7430         if (pci_dev_run_wake(pdev))
7431                 pm_runtime_get_noresume(&pdev->dev);
7432
7433         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7434          * would have already happened in close and is redundant.
7435          */
7436         e1000e_release_hw_control(adapter);
7437
7438         e1000e_reset_interrupt_capability(adapter);
7439         kfree(adapter->tx_ring);
7440         kfree(adapter->rx_ring);
7441
7442         iounmap(adapter->hw.hw_addr);
7443         if ((adapter->hw.flash_address) &&
7444             (adapter->hw.mac.type < e1000_pch_spt))
7445                 iounmap(adapter->hw.flash_address);
7446         pci_release_mem_regions(pdev);
7447
7448         free_netdev(netdev);
7449
7450         /* AER disable */
7451         pci_disable_pcie_error_reporting(pdev);
7452
7453         pci_disable_device(pdev);
7454 }
7455
7456 /* PCI Error Recovery (ERS) */
7457 static const struct pci_error_handlers e1000_err_handler = {
7458         .error_detected = e1000_io_error_detected,
7459         .slot_reset = e1000_io_slot_reset,
7460         .resume = e1000_io_resume,
7461 };
7462
7463 static const struct pci_device_id e1000_pci_tbl[] = {
7464         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7465         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7466         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7467         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7468           board_82571 },
7469         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7470         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7471         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7472         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7473         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7474
7475         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7476         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7477         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7478         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7479
7480         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7481         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7482         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7483
7484         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7485         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7486         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7487
7488         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7489           board_80003es2lan },
7490         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7491           board_80003es2lan },
7492         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7493           board_80003es2lan },
7494         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7495           board_80003es2lan },
7496
7497         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7498         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7499         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7500         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7501         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7502         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7503         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7504         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7505
7506         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7507         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7508         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7509         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7510         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7511         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7512         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7513         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7514         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7515
7516         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7517         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7518         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7519
7520         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7521         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7522         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7523
7524         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7525         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7526         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7527         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7528
7529         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7530         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7531
7532         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7533         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7534         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7535         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7536         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7537         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7538         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7539         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7540         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7541         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7542         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7543         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7544         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
7545         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM4), board_pch_spt },
7546         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
7547         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
7548         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
7549
7550         { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7551 };
7552 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7553
7554 static const struct dev_pm_ops e1000_pm_ops = {
7555 #ifdef CONFIG_PM_SLEEP
7556         .suspend        = e1000e_pm_suspend,
7557         .resume         = e1000e_pm_resume,
7558         .freeze         = e1000e_pm_freeze,
7559         .thaw           = e1000e_pm_thaw,
7560         .poweroff       = e1000e_pm_suspend,
7561         .restore        = e1000e_pm_resume,
7562 #endif
7563         SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7564                            e1000e_pm_runtime_idle)
7565 };
7566
7567 /* PCI Device API Driver */
7568 static struct pci_driver e1000_driver = {
7569         .name     = e1000e_driver_name,
7570         .id_table = e1000_pci_tbl,
7571         .probe    = e1000_probe,
7572         .remove   = e1000_remove,
7573         .driver   = {
7574                 .pm = &e1000_pm_ops,
7575         },
7576         .shutdown = e1000_shutdown,
7577         .err_handler = &e1000_err_handler
7578 };
7579
7580 /**
7581  * e1000_init_module - Driver Registration Routine
7582  *
7583  * e1000_init_module is the first routine called when the driver is
7584  * loaded. All it does is register with the PCI subsystem.
7585  **/
7586 static int __init e1000_init_module(void)
7587 {
7588         pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7589                 e1000e_driver_version);
7590         pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7591
7592         return pci_register_driver(&e1000_driver);
7593 }
7594 module_init(e1000_init_module);
7595
7596 /**
7597  * e1000_exit_module - Driver Exit Cleanup Routine
7598  *
7599  * e1000_exit_module is called just before the driver is removed
7600  * from memory.
7601  **/
7602 static void __exit e1000_exit_module(void)
7603 {
7604         pci_unregister_driver(&e1000_driver);
7605 }
7606 module_exit(e1000_exit_module);
7607
7608 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7609 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7610 MODULE_LICENSE("GPL");
7611 MODULE_VERSION(DRV_VERSION);
7612
7613 /* netdev.c */