1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2017 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
32 #include <linux/types.h>
33 #include <linux/errno.h>
34 #include <linux/module.h>
35 #include <linux/pci.h>
36 #include <linux/aer.h>
37 #include <linux/netdevice.h>
38 #include <linux/ioport.h>
39 #include <linux/iommu.h>
40 #include <linux/slab.h>
41 #include <linux/list.h>
42 #include <linux/hashtable.h>
43 #include <linux/string.h>
46 #include <linux/sctp.h>
47 #include <linux/pkt_sched.h>
48 #include <linux/ipv6.h>
49 #include <net/checksum.h>
50 #include <net/ip6_checksum.h>
51 #include <linux/ethtool.h>
52 #include <linux/if_vlan.h>
53 #include <linux/if_bridge.h>
54 #include <linux/clocksource.h>
55 #include <linux/net_tstamp.h>
56 #include <linux/ptp_clock_kernel.h>
57 #include "i40e_type.h"
58 #include "i40e_prototype.h"
59 #include "i40e_client.h"
60 #include <linux/avf/virtchnl.h>
61 #include "i40e_virtchnl_pf.h"
62 #include "i40e_txrx.h"
65 /* Useful i40e defaults */
66 #define I40E_MAX_VEB 16
68 #define I40E_MAX_NUM_DESCRIPTORS 4096
69 #define I40E_MAX_CSR_SPACE (4 * 1024 * 1024 - 64 * 1024)
70 #define I40E_DEFAULT_NUM_DESCRIPTORS 512
71 #define I40E_REQ_DESCRIPTOR_MULTIPLE 32
72 #define I40E_MIN_NUM_DESCRIPTORS 64
73 #define I40E_MIN_MSIX 2
74 #define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
75 #define I40E_MIN_VSI_ALLOC 83 /* LAN, ATR, FCOE, 64 VF */
77 #define i40e_default_queues_per_vmdq(pf) \
78 (((pf)->hw_features & I40E_HW_RSS_AQ_CAPABLE) ? 4 : 1)
79 #define I40E_DEFAULT_QUEUES_PER_VF 4
80 #define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
81 #define i40e_pf_get_max_q_per_tc(pf) \
82 (((pf)->hw_features & I40E_HW_128_QP_RSS_CAPABLE) ? 128 : 64)
83 #define I40E_FDIR_RING 0
84 #define I40E_FDIR_RING_COUNT 32
85 #define I40E_MAX_AQ_BUF_SIZE 4096
86 #define I40E_AQ_LEN 256
87 #define I40E_AQ_WORK_LIMIT 66 /* max number of VFs + a little */
88 #define I40E_MAX_USER_PRIORITY 8
89 #define I40E_DEFAULT_TRAFFIC_CLASS BIT(0)
90 #define I40E_DEFAULT_MSG_ENABLE 4
91 #define I40E_QUEUE_WAIT_RETRY_LIMIT 10
92 #define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 16)
94 #define I40E_NVM_VERSION_LO_SHIFT 0
95 #define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
96 #define I40E_NVM_VERSION_HI_SHIFT 12
97 #define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
98 #define I40E_OEM_VER_BUILD_MASK 0xffff
99 #define I40E_OEM_VER_PATCH_MASK 0xff
100 #define I40E_OEM_VER_BUILD_SHIFT 8
101 #define I40E_OEM_VER_SHIFT 24
102 #define I40E_PHY_DEBUG_ALL \
103 (I40E_AQ_PHY_DEBUG_DISABLE_LINK_FW | \
104 I40E_AQ_PHY_DEBUG_DISABLE_ALL_LINK_FW)
106 #define I40E_OEM_EETRACK_ID 0xffffffff
107 #define I40E_OEM_GEN_SHIFT 24
108 #define I40E_OEM_SNAP_MASK 0x00ff0000
109 #define I40E_OEM_SNAP_SHIFT 16
110 #define I40E_OEM_RELEASE_MASK 0x0000ffff
112 /* The values in here are decimal coded as hex as is the case in the NVM map*/
113 #define I40E_CURRENT_NVM_VERSION_HI 0x2
114 #define I40E_CURRENT_NVM_VERSION_LO 0x40
116 #define I40E_RX_DESC(R, i) \
117 (&(((union i40e_32byte_rx_desc *)((R)->desc))[i]))
118 #define I40E_TX_DESC(R, i) \
119 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
120 #define I40E_TX_CTXTDESC(R, i) \
121 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
122 #define I40E_TX_FDIRDESC(R, i) \
123 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
125 /* default to trying for four seconds */
126 #define I40E_TRY_LINK_TIMEOUT (4 * HZ)
128 /* driver state flags */
134 __I40E_SERVICE_SCHED,
135 __I40E_ADMINQ_EVENT_PENDING,
136 __I40E_MDD_EVENT_PENDING,
137 __I40E_VFLR_EVENT_PENDING,
138 __I40E_RESET_RECOVERY_PENDING,
139 __I40E_RESET_INTR_RECEIVED,
140 __I40E_REINIT_REQUESTED,
141 __I40E_PF_RESET_REQUESTED,
142 __I40E_CORE_RESET_REQUESTED,
143 __I40E_GLOBAL_RESET_REQUESTED,
144 __I40E_EMP_RESET_REQUESTED,
145 __I40E_EMP_RESET_INTR_RECEIVED,
147 __I40E_PTP_TX_IN_PROGRESS,
149 __I40E_DOWN_REQUESTED,
150 __I40E_FD_FLUSH_REQUESTED,
152 __I40E_PORT_SUSPENDED,
154 /* This must be last as it determines the size of the BITMAP */
158 /* VSI state flags */
159 enum i40e_vsi_state_t {
161 __I40E_VSI_NEEDS_RESTART,
162 __I40E_VSI_SYNCING_FILTERS,
163 __I40E_VSI_OVERFLOW_PROMISC,
164 __I40E_VSI_REINIT_REQUESTED,
165 __I40E_VSI_DOWN_REQUESTED,
166 __I40E_VSI_RELEASING,
167 /* This must be last as it determines the size of the BITMAP */
168 __I40E_VSI_STATE_SIZE__,
171 enum i40e_interrupt_policy {
172 I40E_INTERRUPT_BEST_CASE,
173 I40E_INTERRUPT_MEDIUM,
174 I40E_INTERRUPT_LOWEST
177 struct i40e_lump_tracking {
181 #define I40E_PILE_VALID_BIT 0x8000
182 #define I40E_IWARP_IRQ_PILE_ID (I40E_PILE_VALID_BIT - 2)
185 #define I40E_DEFAULT_ATR_SAMPLE_RATE 20
186 #define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
187 #define I40E_FDIR_BUFFER_FULL_MARGIN 10
188 #define I40E_FDIR_BUFFER_HEAD_ROOM 32
189 #define I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR (I40E_FDIR_BUFFER_HEAD_ROOM * 4)
191 #define I40E_HKEY_ARRAY_SIZE ((I40E_PFQF_HKEY_MAX_INDEX + 1) * 4)
192 #define I40E_HLUT_ARRAY_SIZE ((I40E_PFQF_HLUT_MAX_INDEX + 1) * 4)
193 #define I40E_VF_HLUT_ARRAY_SIZE ((I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4)
195 enum i40e_fd_stat_idx {
198 I40E_FD_STAT_ATR_TUNNEL,
199 I40E_FD_STAT_PF_COUNT
201 #define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
202 #define I40E_FD_ATR_STAT_IDX(pf_id) \
203 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
204 #define I40E_FD_SB_STAT_IDX(pf_id) \
205 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
206 #define I40E_FD_ATR_TUNNEL_STAT_IDX(pf_id) \
207 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR_TUNNEL)
209 /* The following structure contains the data parsed from the user-defined
210 * field of the ethtool_rx_flow_spec structure.
212 struct i40e_rx_flow_userdef {
218 struct i40e_fdir_filter {
219 struct hlist_node fdir_node;
220 /* filter ipnut set */
223 /* TX packet view of src and dst */
230 /* Flexible data to match within the packet payload */
246 #define I40E_ETH_P_LLDP 0x88cc
248 #define I40E_DCB_PRIO_TYPE_STRICT 0
249 #define I40E_DCB_PRIO_TYPE_ETS 1
250 #define I40E_DCB_STRICT_PRIO_CREDITS 127
251 /* DCB per TC information data structure */
252 struct i40e_tc_info {
253 u16 qoffset; /* Queue offset from base queue */
254 u16 qcount; /* Total Queues */
255 u8 netdev_tc; /* Netdev TC index if netdev associated */
258 /* TC configuration data structure */
259 struct i40e_tc_configuration {
260 u8 numtc; /* Total number of enabled TCs */
261 u8 enabled_tc; /* TC map */
262 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
265 struct i40e_udp_port_config {
266 /* AdminQ command interface expects port number in Host byte order */
271 /* macros related to FLX_PIT */
272 #define I40E_FLEX_SET_FSIZE(fsize) (((fsize) << \
273 I40E_PRTQF_FLX_PIT_FSIZE_SHIFT) & \
274 I40E_PRTQF_FLX_PIT_FSIZE_MASK)
275 #define I40E_FLEX_SET_DST_WORD(dst) (((dst) << \
276 I40E_PRTQF_FLX_PIT_DEST_OFF_SHIFT) & \
277 I40E_PRTQF_FLX_PIT_DEST_OFF_MASK)
278 #define I40E_FLEX_SET_SRC_WORD(src) (((src) << \
279 I40E_PRTQF_FLX_PIT_SOURCE_OFF_SHIFT) & \
280 I40E_PRTQF_FLX_PIT_SOURCE_OFF_MASK)
281 #define I40E_FLEX_PREP_VAL(dst, fsize, src) (I40E_FLEX_SET_DST_WORD(dst) | \
282 I40E_FLEX_SET_FSIZE(fsize) | \
283 I40E_FLEX_SET_SRC_WORD(src))
285 #define I40E_FLEX_PIT_GET_SRC(flex) (((flex) & \
286 I40E_PRTQF_FLX_PIT_SOURCE_OFF_MASK) >> \
287 I40E_PRTQF_FLX_PIT_SOURCE_OFF_SHIFT)
288 #define I40E_FLEX_PIT_GET_DST(flex) (((flex) & \
289 I40E_PRTQF_FLX_PIT_DEST_OFF_MASK) >> \
290 I40E_PRTQF_FLX_PIT_DEST_OFF_SHIFT)
291 #define I40E_FLEX_PIT_GET_FSIZE(flex) (((flex) & \
292 I40E_PRTQF_FLX_PIT_FSIZE_MASK) >> \
293 I40E_PRTQF_FLX_PIT_FSIZE_SHIFT)
295 #define I40E_MAX_FLEX_SRC_OFFSET 0x1F
297 /* macros related to GLQF_ORT */
298 #define I40E_ORT_SET_IDX(idx) (((idx) << \
299 I40E_GLQF_ORT_PIT_INDX_SHIFT) & \
300 I40E_GLQF_ORT_PIT_INDX_MASK)
302 #define I40E_ORT_SET_COUNT(count) (((count) << \
303 I40E_GLQF_ORT_FIELD_CNT_SHIFT) & \
304 I40E_GLQF_ORT_FIELD_CNT_MASK)
306 #define I40E_ORT_SET_PAYLOAD(payload) (((payload) << \
307 I40E_GLQF_ORT_FLX_PAYLOAD_SHIFT) & \
308 I40E_GLQF_ORT_FLX_PAYLOAD_MASK)
310 #define I40E_ORT_PREP_VAL(idx, count, payload) (I40E_ORT_SET_IDX(idx) | \
311 I40E_ORT_SET_COUNT(count) | \
312 I40E_ORT_SET_PAYLOAD(payload))
314 #define I40E_L3_GLQF_ORT_IDX 34
315 #define I40E_L4_GLQF_ORT_IDX 35
317 /* Flex PIT register index */
318 #define I40E_FLEX_PIT_IDX_START_L2 0
319 #define I40E_FLEX_PIT_IDX_START_L3 3
320 #define I40E_FLEX_PIT_IDX_START_L4 6
322 #define I40E_FLEX_PIT_TABLE_SIZE 3
324 #define I40E_FLEX_DEST_UNUSED 63
326 #define I40E_FLEX_INDEX_ENTRIES 8
328 /* Flex MASK to disable all flexible entries */
329 #define I40E_FLEX_INPUT_MASK (I40E_FLEX_50_MASK | I40E_FLEX_51_MASK | \
330 I40E_FLEX_52_MASK | I40E_FLEX_53_MASK | \
331 I40E_FLEX_54_MASK | I40E_FLEX_55_MASK | \
332 I40E_FLEX_56_MASK | I40E_FLEX_57_MASK)
334 struct i40e_flex_pit {
335 struct list_head list;
340 /* struct that defines the Ethernet device */
342 struct pci_dev *pdev;
344 DECLARE_BITMAP(state, __I40E_STATE_SIZE__);
345 struct msix_entry *msix_entries;
346 bool fc_autoneg_status;
349 u16 num_vmdq_vsis; /* num vmdq vsis this PF has set up */
350 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
351 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
352 u16 num_req_vfs; /* num VFs requested for this VF */
353 u16 num_vf_qps; /* num queue pairs per VF */
354 u16 num_lan_qps; /* num lan queues this PF has set up */
355 u16 num_lan_msix; /* num queue vectors for the base PF vsi */
356 u16 num_fdsb_msix; /* num queue vectors for sideband Fdir */
357 u16 num_iwarp_msix; /* num of iwarp vectors for this PF */
358 int iwarp_base_vector;
359 int queues_left; /* queues left unclaimed */
360 u16 alloc_rss_size; /* allocated RSS queues */
361 u16 rss_size_max; /* HW defined max RSS queues */
362 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
363 u16 num_alloc_vsi; /* num VSIs this driver supports */
367 struct hlist_head fdir_filter_list;
368 u16 fdir_pf_active_filters;
369 unsigned long fd_flush_timestamp;
374 /* Book-keeping of side-band filter count per flow-type.
375 * This is used to detect and handle input set changes for
376 * respective flow-type.
378 u16 fd_tcp4_filter_cnt;
379 u16 fd_udp4_filter_cnt;
380 u16 fd_sctp4_filter_cnt;
381 u16 fd_ip4_filter_cnt;
383 /* Flexible filter table values that need to be programmed into
384 * hardware, which expects L3 and L4 to be programmed separately. We
385 * need to ensure that the values are in ascended order and don't have
386 * duplicates, so we track each L3 and L4 values in separate lists.
388 struct list_head l3_flex_pit_list;
389 struct list_head l4_flex_pit_list;
391 struct i40e_udp_port_config udp_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
392 u16 pending_udp_bitmap;
394 enum i40e_interrupt_policy int_policy;
398 char int_name[I40E_INT_NAME_STR_LEN];
399 u16 adminq_work_limit; /* num of admin receive queue desc to process */
400 unsigned long service_timer_period;
401 unsigned long service_timer_previous;
402 struct timer_list service_timer;
403 struct work_struct service_task;
406 #define I40E_HW_RSS_AQ_CAPABLE BIT_ULL(0)
407 #define I40E_HW_128_QP_RSS_CAPABLE BIT_ULL(1)
408 #define I40E_HW_ATR_EVICT_CAPABLE BIT_ULL(2)
409 #define I40E_HW_WB_ON_ITR_CAPABLE BIT_ULL(3)
410 #define I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE BIT_ULL(4)
411 #define I40E_HW_NO_PCI_LINK_CHECK BIT_ULL(5)
412 #define I40E_HW_100M_SGMII_CAPABLE BIT_ULL(6)
413 #define I40E_HW_NO_DCB_SUPPORT BIT_ULL(7)
414 #define I40E_HW_USE_SET_LLDP_MIB BIT_ULL(8)
415 #define I40E_HW_GENEVE_OFFLOAD_CAPABLE BIT_ULL(9)
416 #define I40E_HW_PTP_L4_CAPABLE BIT_ULL(10)
417 #define I40E_HW_WOL_MC_MAGIC_PKT_WAKE BIT_ULL(11)
418 #define I40E_HW_MPLS_HDR_OFFLOAD_CAPABLE BIT_ULL(12)
419 #define I40E_HW_HAVE_CRT_RETIMER BIT_ULL(13)
420 #define I40E_HW_OUTER_UDP_CSUM_CAPABLE BIT_ULL(14)
421 #define I40E_HW_PHY_CONTROLS_LEDS BIT_ULL(15)
422 #define I40E_HW_STOP_FW_LLDP BIT_ULL(16)
423 #define I40E_HW_PORT_ID_VALID BIT_ULL(17)
424 #define I40E_HW_RESTART_AUTONEG BIT_ULL(18)
427 #define I40E_FLAG_RX_CSUM_ENABLED BIT_ULL(1)
428 #define I40E_FLAG_MSI_ENABLED BIT_ULL(2)
429 #define I40E_FLAG_MSIX_ENABLED BIT_ULL(3)
430 #define I40E_FLAG_HW_ATR_EVICT_ENABLED BIT_ULL(4)
431 #define I40E_FLAG_RSS_ENABLED BIT_ULL(6)
432 #define I40E_FLAG_VMDQ_ENABLED BIT_ULL(7)
433 #define I40E_FLAG_IWARP_ENABLED BIT_ULL(10)
434 #define I40E_FLAG_FILTER_SYNC BIT_ULL(15)
435 #define I40E_FLAG_SERVICE_CLIENT_REQUESTED BIT_ULL(16)
436 #define I40E_FLAG_SRIOV_ENABLED BIT_ULL(19)
437 #define I40E_FLAG_DCB_ENABLED BIT_ULL(20)
438 #define I40E_FLAG_FD_SB_ENABLED BIT_ULL(21)
439 #define I40E_FLAG_FD_ATR_ENABLED BIT_ULL(22)
440 #define I40E_FLAG_FD_SB_AUTO_DISABLED BIT_ULL(23)
441 #define I40E_FLAG_FD_ATR_AUTO_DISABLED BIT_ULL(24)
442 #define I40E_FLAG_PTP BIT_ULL(25)
443 #define I40E_FLAG_MFP_ENABLED BIT_ULL(26)
444 #define I40E_FLAG_UDP_FILTER_SYNC BIT_ULL(27)
445 #define I40E_FLAG_DCB_CAPABLE BIT_ULL(29)
446 #define I40E_FLAG_VEB_STATS_ENABLED BIT_ULL(37)
447 #define I40E_FLAG_LINK_POLLING_ENABLED BIT_ULL(39)
448 #define I40E_FLAG_VEB_MODE_ENABLED BIT_ULL(40)
449 #define I40E_FLAG_TRUE_PROMISC_SUPPORT BIT_ULL(51)
450 #define I40E_FLAG_CLIENT_RESET BIT_ULL(54)
451 #define I40E_FLAG_TEMP_LINK_POLLING BIT_ULL(55)
452 #define I40E_FLAG_CLIENT_L2_CHANGE BIT_ULL(56)
453 #define I40E_FLAG_LEGACY_RX BIT_ULL(58)
455 struct i40e_client_instance *cinst;
456 bool stat_offsets_loaded;
457 struct i40e_hw_port_stats stats;
458 struct i40e_hw_port_stats stats_offsets;
459 u32 tx_timeout_count;
460 u32 tx_timeout_recovery_level;
461 unsigned long tx_timeout_last_recovery;
462 u32 tx_sluggish_count;
463 u32 hw_csum_rx_error;
465 u16 corer_count; /* Core reset count */
466 u16 globr_count; /* Global reset count */
467 u16 empr_count; /* EMP reset count */
468 u16 pfr_count; /* PF reset count */
469 u16 sw_int_count; /* SW interrupt count */
471 struct mutex switch_mutex;
472 u16 lan_vsi; /* our default LAN VSI */
473 u16 lan_veb; /* initial relay, if exists */
474 #define I40E_NO_VEB 0xffff
475 #define I40E_NO_VSI 0xffff
476 u16 next_vsi; /* Next unallocated VSI - 0-based! */
477 struct i40e_vsi **vsi;
478 struct i40e_veb *veb[I40E_MAX_VEB];
480 struct i40e_lump_tracking *qp_pile;
481 struct i40e_lump_tracking *irq_pile;
483 /* switch config info */
487 struct kobject *switch_kobj;
488 #ifdef CONFIG_DEBUG_FS
489 struct dentry *i40e_dbg_pf;
490 #endif /* CONFIG_DEBUG_FS */
493 u16 instance; /* A unique number per i40e_pf instance in the system */
495 /* sr-iov config info */
497 int num_alloc_vfs; /* actual number of VFs allocated */
499 u32 arq_overflows; /* Not fatal, possibly indicative of problems */
501 /* DCBx/DCBNL capability for PF that indicates
502 * whether DCBx is managed by firmware or host
503 * based agent (LLDPAD). Also, indicates what
504 * flavor of DCBx protocol (IEEE/CEE) is supported
505 * by the device. For now we're supporting IEEE
510 struct i40e_filter_control_settings filter_settings;
512 struct ptp_clock *ptp_clock;
513 struct ptp_clock_info ptp_caps;
514 struct sk_buff *ptp_tx_skb;
515 unsigned long ptp_tx_start;
516 struct hwtstamp_config tstamp_config;
517 struct mutex tmreg_lock; /* Used to protect the SYSTIME registers. */
519 u32 tx_hwtstamp_timeouts;
520 u32 tx_hwtstamp_skipped;
521 u32 rx_hwtstamp_cleared;
522 u32 latch_event_flags;
523 spinlock_t ptp_rx_lock; /* Used to protect Rx timestamp registers. */
524 unsigned long latch_events[4];
527 u16 rss_table_size; /* HW RSS table size */
537 * i40e_mac_to_hkey - Convert a 6-byte MAC Address to a u64 hash key
538 * @macaddr: the MAC Address as the base key
540 * Simply copies the address and returns it as a u64 for hashing
542 static inline u64 i40e_addr_to_hkey(const u8 *macaddr)
546 ether_addr_copy((u8 *)&key, macaddr);
550 enum i40e_filter_state {
551 I40E_FILTER_INVALID = 0, /* Invalid state */
552 I40E_FILTER_NEW, /* New, not sent to FW yet */
553 I40E_FILTER_ACTIVE, /* Added to switch by FW */
554 I40E_FILTER_FAILED, /* Rejected by FW */
555 I40E_FILTER_REMOVE, /* To be removed */
556 /* There is no 'removed' state; the filter struct is freed */
558 struct i40e_mac_filter {
559 struct hlist_node hlist;
560 u8 macaddr[ETH_ALEN];
561 #define I40E_VLAN_ANY -1
563 enum i40e_filter_state state;
566 /* Wrapper structure to keep track of filters while we are preparing to send
567 * firmware commands. We cannot send firmware commands while holding a
568 * spinlock, since it might sleep. To avoid this, we wrap the added filters in
569 * a separate structure, which will track the state change and update the real
570 * filter while under lock. We can't simply hold the filters in a separate
571 * list, as this opens a window for a race condition when adding new MAC
572 * addresses to all VLANs, or when adding new VLANs to all MAC addresses.
574 struct i40e_new_mac_filter {
575 struct hlist_node hlist;
576 struct i40e_mac_filter *f;
578 /* Track future changes to state separately */
579 enum i40e_filter_state state;
585 u16 veb_idx; /* index of VEB parent */
588 u16 stats_idx; /* index of VEB parent */
590 u16 bridge_mode; /* Bridge Mode (VEB/VEPA) */
595 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
596 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
597 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
598 struct kobject *kobj;
599 bool stat_offsets_loaded;
600 struct i40e_eth_stats stats;
601 struct i40e_eth_stats stats_offsets;
602 struct i40e_veb_tc_stats tc_stats;
603 struct i40e_veb_tc_stats tc_stats_offsets;
606 /* struct that defines a VSI, associated with a dev */
608 struct net_device *netdev;
609 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
610 bool netdev_registered;
611 bool stat_offsets_loaded;
613 u32 current_netdev_flags;
614 DECLARE_BITMAP(state, __I40E_VSI_STATE_SIZE__);
615 #define I40E_VSI_FLAG_FILTER_CHANGED BIT(0)
616 #define I40E_VSI_FLAG_VEB_OWNER BIT(1)
619 /* Per VSI lock to protect elements/hash (MAC filter) */
620 spinlock_t mac_filter_hash_lock;
621 /* Fixed size hash table with 2^8 buckets for MAC filters */
622 DECLARE_HASHTABLE(mac_filter_hash, 8);
623 bool has_vlan_filter;
626 struct rtnl_link_stats64 net_stats;
627 struct rtnl_link_stats64 net_stats_offsets;
628 struct i40e_eth_stats eth_stats;
629 struct i40e_eth_stats eth_stats_offsets;
637 /* These are containers of ring pointers, allocated at run-time */
638 struct i40e_ring **rx_rings;
639 struct i40e_ring **tx_rings;
640 struct i40e_ring **xdp_rings; /* XDP Tx rings */
643 u32 promisc_threshold;
646 u16 int_rate_limit; /* value in usecs */
648 u16 rss_table_size; /* HW RSS table size */
649 u16 rss_size; /* Allocated RSS queues */
650 u8 *rss_hkey_user; /* User configured hash keys */
651 u8 *rss_lut_user; /* User configured lookup table entries */
657 struct bpf_prog *xdp_prog;
659 /* List of q_vectors allocated to this VSI */
660 struct i40e_q_vector **q_vectors;
665 u16 seid; /* HW index of this VSI (absolute index) */
666 u16 id; /* VSI number */
669 u16 base_queue; /* vsi's first queue in hw array */
670 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
671 u16 req_queue_pairs; /* User requested queue pairs */
672 u16 num_queue_pairs; /* Used tx and rx pairs */
674 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
675 s16 vf_id; /* Virtual function ID for SRIOV VSIs */
677 struct i40e_tc_configuration tc_config;
678 struct i40e_aqc_vsi_properties_data info;
680 /* VSI BW limit (absolute across all TCs) */
681 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
682 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
684 /* Relative TC credits across VSIs */
685 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
686 /* TC BW limit credits within VSI */
687 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
688 /* TC BW limit max quanta within VSI */
689 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
691 struct i40e_pf *back; /* Backreference to associated PF */
692 u16 idx; /* index in pf->vsi[] */
693 u16 veb_idx; /* index of VEB parent */
694 struct kobject *kobj; /* sysfs object */
695 bool current_isup; /* Sync 'link up' logging */
696 enum i40e_aq_link_speed current_speed; /* Sync link speed logging */
698 void *priv; /* client driver data reference. */
700 /* VSI specific handlers */
701 irqreturn_t (*irq_handler)(int irq, void *data);
702 } ____cacheline_internodealigned_in_smp;
704 struct i40e_netdev_priv {
705 struct i40e_vsi *vsi;
708 /* struct that defines an interrupt vector */
709 struct i40e_q_vector {
710 struct i40e_vsi *vsi;
712 u16 v_idx; /* index in the vsi->q_vector array. */
713 u16 reg_idx; /* register index of the interrupt */
715 struct napi_struct napi;
717 struct i40e_ring_container rx;
718 struct i40e_ring_container tx;
720 u8 num_ringpairs; /* total number of ring pairs in vector */
722 cpumask_t affinity_mask;
723 struct irq_affinity_notify affinity_notify;
725 struct rcu_head rcu; /* to avoid race with update stats on free */
726 char name[I40E_INT_NAME_STR_LEN];
728 #define ITR_COUNTDOWN_START 100
729 u8 itr_countdown; /* when 0 should adjust ITR */
730 } ____cacheline_internodealigned_in_smp;
734 struct list_head list;
739 * i40e_nvm_version_str - format the NVM version strings
740 * @hw: ptr to the hardware info
742 static inline char *i40e_nvm_version_str(struct i40e_hw *hw)
747 full_ver = hw->nvm.oem_ver;
749 if (hw->nvm.eetrack == I40E_OEM_EETRACK_ID) {
753 gen = (u8)(full_ver >> I40E_OEM_GEN_SHIFT);
754 snap = (u8)((full_ver & I40E_OEM_SNAP_MASK) >>
755 I40E_OEM_SNAP_SHIFT);
756 release = (u16)(full_ver & I40E_OEM_RELEASE_MASK);
758 snprintf(buf, sizeof(buf), "%x.%x.%x", gen, snap, release);
763 ver = (u8)(full_ver >> I40E_OEM_VER_SHIFT);
764 build = (u16)((full_ver >> I40E_OEM_VER_BUILD_SHIFT) &
765 I40E_OEM_VER_BUILD_MASK);
766 patch = (u8)(full_ver & I40E_OEM_VER_PATCH_MASK);
768 snprintf(buf, sizeof(buf),
769 "%x.%02x 0x%x %d.%d.%d",
770 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
771 I40E_NVM_VERSION_HI_SHIFT,
772 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
773 I40E_NVM_VERSION_LO_SHIFT,
774 hw->nvm.eetrack, ver, build, patch);
781 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
782 * @netdev: the corresponding netdev
784 * Return the PF struct for the given netdev
786 static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
788 struct i40e_netdev_priv *np = netdev_priv(netdev);
789 struct i40e_vsi *vsi = np->vsi;
794 static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
795 irqreturn_t (*irq_handler)(int, void *))
797 vsi->irq_handler = irq_handler;
801 * i40e_get_fd_cnt_all - get the total FD filter space available
802 * @pf: pointer to the PF struct
804 static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
806 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
810 * i40e_read_fd_input_set - reads value of flow director input set register
811 * @pf: pointer to the PF struct
812 * @addr: register addr
814 * This function reads value of flow director input set register
815 * specified by 'addr' (which is specific to flow-type)
817 static inline u64 i40e_read_fd_input_set(struct i40e_pf *pf, u16 addr)
821 val = i40e_read_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 1));
823 val += i40e_read_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 0));
829 * i40e_write_fd_input_set - writes value into flow director input set register
830 * @pf: pointer to the PF struct
831 * @addr: register addr
832 * @val: value to be written
834 * This function writes specified value to the register specified by 'addr'.
835 * This register is input set register based on flow-type.
837 static inline void i40e_write_fd_input_set(struct i40e_pf *pf,
840 i40e_write_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 1),
842 i40e_write_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 0),
843 (u32)(val & 0xFFFFFFFFULL));
846 /* needed by i40e_ethtool.c */
847 int i40e_up(struct i40e_vsi *vsi);
848 void i40e_down(struct i40e_vsi *vsi);
849 extern const char i40e_driver_name[];
850 extern const char i40e_driver_version_str[];
851 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
852 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired);
853 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
854 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
855 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
856 u16 rss_table_size, u16 rss_size);
857 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id);
859 * i40e_find_vsi_by_type - Find and return Flow Director VSI
860 * @pf: PF to search for VSI
861 * @type: Value indicating type of VSI we are looking for
863 static inline struct i40e_vsi *
864 i40e_find_vsi_by_type(struct i40e_pf *pf, u16 type)
868 for (i = 0; i < pf->num_alloc_vsi; i++) {
869 struct i40e_vsi *vsi = pf->vsi[i];
871 if (vsi && vsi->type == type)
877 void i40e_update_stats(struct i40e_vsi *vsi);
878 void i40e_update_eth_stats(struct i40e_vsi *vsi);
879 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
880 int i40e_fetch_switch_configuration(struct i40e_pf *pf,
883 int i40e_add_del_fdir(struct i40e_vsi *vsi,
884 struct i40e_fdir_filter *input, bool add);
885 void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
886 u32 i40e_get_current_fd_count(struct i40e_pf *pf);
887 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);
888 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf);
889 u32 i40e_get_global_fd_count(struct i40e_pf *pf);
890 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
891 void i40e_set_ethtool_ops(struct net_device *netdev);
892 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
893 const u8 *macaddr, s16 vlan);
894 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f);
895 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan);
896 int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
897 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
898 u16 uplink, u32 param1);
899 int i40e_vsi_release(struct i40e_vsi *vsi);
900 void i40e_service_event_schedule(struct i40e_pf *pf);
901 void i40e_notify_client_of_vf_msg(struct i40e_vsi *vsi, u32 vf_id,
904 int i40e_vsi_start_rings(struct i40e_vsi *vsi);
905 void i40e_vsi_stop_rings(struct i40e_vsi *vsi);
906 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi);
907 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi);
908 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
909 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
910 u16 downlink_seid, u8 enabled_tc);
911 void i40e_veb_release(struct i40e_veb *veb);
913 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
914 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
915 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
916 void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
917 void i40e_pf_reset_stats(struct i40e_pf *pf);
918 #ifdef CONFIG_DEBUG_FS
919 void i40e_dbg_pf_init(struct i40e_pf *pf);
920 void i40e_dbg_pf_exit(struct i40e_pf *pf);
921 void i40e_dbg_init(void);
922 void i40e_dbg_exit(void);
924 static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
925 static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
926 static inline void i40e_dbg_init(void) {}
927 static inline void i40e_dbg_exit(void) {}
928 #endif /* CONFIG_DEBUG_FS*/
929 /* needed by client drivers */
930 int i40e_lan_add_device(struct i40e_pf *pf);
931 int i40e_lan_del_device(struct i40e_pf *pf);
932 void i40e_client_subtask(struct i40e_pf *pf);
933 void i40e_notify_client_of_l2_param_changes(struct i40e_vsi *vsi);
934 void i40e_notify_client_of_netdev_close(struct i40e_vsi *vsi, bool reset);
935 void i40e_notify_client_of_vf_enable(struct i40e_pf *pf, u32 num_vfs);
936 void i40e_notify_client_of_vf_reset(struct i40e_pf *pf, u32 vf_id);
937 int i40e_vf_client_capable(struct i40e_pf *pf, u32 vf_id);
939 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
940 * @vsi: pointer to a vsi
941 * @vector: enable a particular Hw Interrupt vector, without base_vector
943 static inline void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
945 struct i40e_pf *pf = vsi->back;
946 struct i40e_hw *hw = &pf->hw;
949 /* definitely clear the PBA here, as this function is meant to
950 * clean out all previous interrupts AND enable the interrupt
952 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
953 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
954 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
955 wr32(hw, I40E_PFINT_DYN_CTLN(vector + vsi->base_vector - 1), val);
959 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
960 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba);
961 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
962 int i40e_open(struct net_device *netdev);
963 int i40e_close(struct net_device *netdev);
964 int i40e_vsi_open(struct i40e_vsi *vsi);
965 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
966 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid);
967 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid);
968 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid);
969 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid);
970 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
972 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr);
973 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
974 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr);
975 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
976 #ifdef CONFIG_I40E_DCB
977 void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
978 struct i40e_dcbx_config *old_cfg,
979 struct i40e_dcbx_config *new_cfg);
980 void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
981 void i40e_dcbnl_setup(struct i40e_vsi *vsi);
982 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
983 struct i40e_dcbx_config *old_cfg,
984 struct i40e_dcbx_config *new_cfg);
985 #endif /* CONFIG_I40E_DCB */
986 void i40e_ptp_rx_hang(struct i40e_pf *pf);
987 void i40e_ptp_tx_hang(struct i40e_pf *pf);
988 void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
989 void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
990 void i40e_ptp_set_increment(struct i40e_pf *pf);
991 int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
992 int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
993 void i40e_ptp_init(struct i40e_pf *pf);
994 void i40e_ptp_stop(struct i40e_pf *pf);
995 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi);
996 i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf);
997 i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf);
998 i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf);
999 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup);
1001 static inline bool i40e_enabled_xdp_vsi(struct i40e_vsi *vsi)
1003 return !!vsi->xdp_prog;
1005 #endif /* _I40E_H_ */