drivers/net/ethernet/intel/igb/igb_ethtool.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
   3
   4 /* ethtool support for igb */
   5
   6 #include <linux/vmalloc.h>
   7 #include <linux/netdevice.h>
   8 #include <linux/pci.h>
   9 #include <linux/delay.h>
  10 #include <linux/interrupt.h>
  11 #include <linux/if_ether.h>
  12 #include <linux/ethtool.h>
  13 #include <linux/sched.h>
  14 #include <linux/slab.h>
  15 #include <linux/pm_runtime.h>
  16 #include <linux/highmem.h>
  17 #include <linux/mdio.h>
  18
  19 #include "igb.h"
  20
  21 struct igb_stats {
  22         char stat_string[ETH_GSTRING_LEN];
  23         int sizeof_stat;
  24         int stat_offset;
  25 };
  26
  27 #define IGB_STAT(_name, _stat) { \
  28         .stat_string = _name, \
  29         .sizeof_stat = FIELD_SIZEOF(struct igb_adapter, _stat), \
  30         .stat_offset = offsetof(struct igb_adapter, _stat) \
  31 }
  32 static const struct igb_stats igb_gstrings_stats[] = {
  33         IGB_STAT("rx_packets", stats.gprc),
  34         IGB_STAT("tx_packets", stats.gptc),
  35         IGB_STAT("rx_bytes", stats.gorc),
  36         IGB_STAT("tx_bytes", stats.gotc),
  37         IGB_STAT("rx_broadcast", stats.bprc),
  38         IGB_STAT("tx_broadcast", stats.bptc),
  39         IGB_STAT("rx_multicast", stats.mprc),
  40         IGB_STAT("tx_multicast", stats.mptc),
  41         IGB_STAT("multicast", stats.mprc),
  42         IGB_STAT("collisions", stats.colc),
  43         IGB_STAT("rx_crc_errors", stats.crcerrs),
  44         IGB_STAT("rx_no_buffer_count", stats.rnbc),
  45         IGB_STAT("rx_missed_errors", stats.mpc),
  46         IGB_STAT("tx_aborted_errors", stats.ecol),
  47         IGB_STAT("tx_carrier_errors", stats.tncrs),
  48         IGB_STAT("tx_window_errors", stats.latecol),
  49         IGB_STAT("tx_abort_late_coll", stats.latecol),
  50         IGB_STAT("tx_deferred_ok", stats.dc),
  51         IGB_STAT("tx_single_coll_ok", stats.scc),
  52         IGB_STAT("tx_multi_coll_ok", stats.mcc),
  53         IGB_STAT("tx_timeout_count", tx_timeout_count),
  54         IGB_STAT("rx_long_length_errors", stats.roc),
  55         IGB_STAT("rx_short_length_errors", stats.ruc),
  56         IGB_STAT("rx_align_errors", stats.algnerrc),
  57         IGB_STAT("tx_tcp_seg_good", stats.tsctc),
  58         IGB_STAT("tx_tcp_seg_failed", stats.tsctfc),
  59         IGB_STAT("rx_flow_control_xon", stats.xonrxc),
  60         IGB_STAT("rx_flow_control_xoff", stats.xoffrxc),
  61         IGB_STAT("tx_flow_control_xon", stats.xontxc),
  62         IGB_STAT("tx_flow_control_xoff", stats.xofftxc),
  63         IGB_STAT("rx_long_byte_count", stats.gorc),
  64         IGB_STAT("tx_dma_out_of_sync", stats.doosync),
  65         IGB_STAT("tx_smbus", stats.mgptc),
  66         IGB_STAT("rx_smbus", stats.mgprc),
  67         IGB_STAT("dropped_smbus", stats.mgpdc),
  68         IGB_STAT("os2bmc_rx_by_bmc", stats.o2bgptc),
  69         IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
  70         IGB_STAT("os2bmc_tx_by_host", stats.o2bspc),
  71         IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc),
  72         IGB_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
  73         IGB_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped),
  74         IGB_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
  75 };
  76
  77 #define IGB_NETDEV_STAT(_net_stat) { \
  78         .stat_string = __stringify(_net_stat), \
  79         .sizeof_stat = FIELD_SIZEOF(struct rtnl_link_stats64, _net_stat), \
  80         .stat_offset = offsetof(struct rtnl_link_stats64, _net_stat) \
  81 }
  82 static const struct igb_stats igb_gstrings_net_stats[] = {
  83         IGB_NETDEV_STAT(rx_errors),
  84         IGB_NETDEV_STAT(tx_errors),
  85         IGB_NETDEV_STAT(tx_dropped),
  86         IGB_NETDEV_STAT(rx_length_errors),
  87         IGB_NETDEV_STAT(rx_over_errors),
  88         IGB_NETDEV_STAT(rx_frame_errors),
  89         IGB_NETDEV_STAT(rx_fifo_errors),
  90         IGB_NETDEV_STAT(tx_fifo_errors),
  91         IGB_NETDEV_STAT(tx_heartbeat_errors)
  92 };
  93
  94 #define IGB_GLOBAL_STATS_LEN    \
  95         (sizeof(igb_gstrings_stats) / sizeof(struct igb_stats))
  96 #define IGB_NETDEV_STATS_LEN    \
  97         (sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats))
  98 #define IGB_RX_QUEUE_STATS_LEN \
  99         (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
 100
 101 #define IGB_TX_QUEUE_STATS_LEN 3 /* packets, bytes, restart_queue */
 102
 103 #define IGB_QUEUE_STATS_LEN \
 104         ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
 105           IGB_RX_QUEUE_STATS_LEN) + \
 106          (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
 107           IGB_TX_QUEUE_STATS_LEN))
 108 #define IGB_STATS_LEN \
 109         (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
 110
 111 enum igb_diagnostics_results {
 112         TEST_REG = 0,
 113         TEST_EEP,
 114         TEST_IRQ,
 115         TEST_LOOP,
 116         TEST_LINK
 117 };
 118
 119 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
 120         [TEST_REG]  = "Register test  (offline)",
 121         [TEST_EEP]  = "Eeprom test    (offline)",
 122         [TEST_IRQ]  = "Interrupt test (offline)",
 123         [TEST_LOOP] = "Loopback test  (offline)",
 124         [TEST_LINK] = "Link test   (on/offline)"
 125 };
 126 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
 127
 128 static const char igb_priv_flags_strings[][ETH_GSTRING_LEN] = {
 129 #define IGB_PRIV_FLAGS_LEGACY_RX        BIT(0)
 130         "legacy-rx",
 131 };
 132
 133 #define IGB_PRIV_FLAGS_STR_LEN ARRAY_SIZE(igb_priv_flags_strings)
 134
 135 static int igb_get_link_ksettings(struct net_device *netdev,
 136                                   struct ethtool_link_ksettings *cmd)
 137 {
 138         struct igb_adapter *adapter = netdev_priv(netdev);
 139         struct e1000_hw *hw = &adapter->hw;
 140         struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;
 141         struct e1000_sfp_flags *eth_flags = &dev_spec->eth_flags;
 142         u32 status;
 143         u32 speed;
 144         u32 supported, advertising;
 145
 146         status = pm_runtime_suspended(&adapter->pdev->dev) ?
 147                  0 : rd32(E1000_STATUS);
 148         if (hw->phy.media_type == e1000_media_type_copper) {
 149
 150                 supported = (SUPPORTED_10baseT_Half |
 151                              SUPPORTED_10baseT_Full |
 152                              SUPPORTED_100baseT_Half |
 153                              SUPPORTED_100baseT_Full |
 154                              SUPPORTED_1000baseT_Full|
 155                              SUPPORTED_Autoneg |
 156                              SUPPORTED_TP |
 157                              SUPPORTED_Pause);
 158                 advertising = ADVERTISED_TP;
 159
 160                 if (hw->mac.autoneg == 1) {
 161                         advertising |= ADVERTISED_Autoneg;
 162                         /* the e1000 autoneg seems to match ethtool nicely */
 163                         advertising |= hw->phy.autoneg_advertised;
 164                 }
 165
 166                 cmd->base.port = PORT_TP;
 167                 cmd->base.phy_address = hw->phy.addr;
 168         } else {
 169                 supported = (SUPPORTED_FIBRE |
 170                              SUPPORTED_1000baseKX_Full |
 171                              SUPPORTED_Autoneg |
 172                              SUPPORTED_Pause);
 173                 advertising = (ADVERTISED_FIBRE |
 174                                ADVERTISED_1000baseKX_Full);
 175                 if (hw->mac.type == e1000_i354) {
 176                         if ((hw->device_id ==
 177                              E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) &&
 178                             !(status & E1000_STATUS_2P5_SKU_OVER)) {
 179                                 supported |= SUPPORTED_2500baseX_Full;
 180                                 supported &= ~SUPPORTED_1000baseKX_Full;
 181                                 advertising |= ADVERTISED_2500baseX_Full;
 182                                 advertising &= ~ADVERTISED_1000baseKX_Full;
 183                         }
 184                 }
 185                 if (eth_flags->e100_base_fx || eth_flags->e100_base_lx) {
 186                         supported |= SUPPORTED_100baseT_Full;
 187                         advertising |= ADVERTISED_100baseT_Full;
 188                 }
 189                 if (hw->mac.autoneg == 1)
 190                         advertising |= ADVERTISED_Autoneg;
 191
 192                 cmd->base.port = PORT_FIBRE;
 193         }
 194         if (hw->mac.autoneg != 1)
 195                 advertising &= ~(ADVERTISED_Pause |
 196                                  ADVERTISED_Asym_Pause);
 197
 198         switch (hw->fc.requested_mode) {
 199         case e1000_fc_full:
 200                 advertising |= ADVERTISED_Pause;
 201                 break;
 202         case e1000_fc_rx_pause:
 203                 advertising |= (ADVERTISED_Pause |
 204                                 ADVERTISED_Asym_Pause);
 205                 break;
 206         case e1000_fc_tx_pause:
 207                 advertising |=  ADVERTISED_Asym_Pause;
 208                 break;
 209         default:
 210                 advertising &= ~(ADVERTISED_Pause |
 211                                  ADVERTISED_Asym_Pause);
 212         }
 213         if (status & E1000_STATUS_LU) {
 214                 if ((status & E1000_STATUS_2P5_SKU) &&
 215                     !(status & E1000_STATUS_2P5_SKU_OVER)) {
 216                         speed = SPEED_2500;
 217                 } else if (status & E1000_STATUS_SPEED_1000) {
 218                         speed = SPEED_1000;
 219                 } else if (status & E1000_STATUS_SPEED_100) {
 220                         speed = SPEED_100;
 221                 } else {
 222                         speed = SPEED_10;
 223                 }
 224                 if ((status & E1000_STATUS_FD) ||
 225                     hw->phy.media_type != e1000_media_type_copper)
 226                         cmd->base.duplex = DUPLEX_FULL;
 227                 else
 228                         cmd->base.duplex = DUPLEX_HALF;
 229         } else {
 230                 speed = SPEED_UNKNOWN;
 231                 cmd->base.duplex = DUPLEX_UNKNOWN;
 232         }
 233         cmd->base.speed = speed;
 234         if ((hw->phy.media_type == e1000_media_type_fiber) ||
 235             hw->mac.autoneg)
 236                 cmd->base.autoneg = AUTONEG_ENABLE;
 237         else
 238                 cmd->base.autoneg = AUTONEG_DISABLE;
 239
 240         /* MDI-X => 2; MDI =>1; Invalid =>0 */
 241         if (hw->phy.media_type == e1000_media_type_copper)
 242                 cmd->base.eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X :
 243                                                       ETH_TP_MDI;
 244         else
 245                 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
 246
 247         if (hw->phy.mdix == AUTO_ALL_MODES)
 248                 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
 249         else
 250                 cmd->base.eth_tp_mdix_ctrl = hw->phy.mdix;
 251
 252         ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
 253                                                 supported);
 254         ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
 255                                                 advertising);
 256
 257         return 0;
 258 }
 259
 260 static int igb_set_link_ksettings(struct net_device *netdev,
 261                                   const struct ethtool_link_ksettings *cmd)
 262 {
 263         struct igb_adapter *adapter = netdev_priv(netdev);
 264         struct e1000_hw *hw = &adapter->hw;
 265         u32 advertising;
 266
 267         /* When SoL/IDER sessions are active, autoneg/speed/duplex
 268          * cannot be changed
 269          */
 270         if (igb_check_reset_block(hw)) {
 271                 dev_err(&adapter->pdev->dev,
 272                         "Cannot change link characteristics when SoL/IDER is active.\n");
 273                 return -EINVAL;
 274         }
 275
 276         /* MDI setting is only allowed when autoneg enabled because
 277          * some hardware doesn't allow MDI setting when speed or
 278          * duplex is forced.
 279          */
 280         if (cmd->base.eth_tp_mdix_ctrl) {
 281                 if (hw->phy.media_type != e1000_media_type_copper)
 282                         return -EOPNOTSUPP;
 283
 284                 if ((cmd->base.eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
 285                     (cmd->base.autoneg != AUTONEG_ENABLE)) {
 286                         dev_err(&adapter->pdev->dev, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
 287                         return -EINVAL;
 288                 }
 289         }
 290
 291         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 292                 usleep_range(1000, 2000);
 293
 294         ethtool_convert_link_mode_to_legacy_u32(&advertising,
 295                                                 cmd->link_modes.advertising);
 296
 297         if (cmd->base.autoneg == AUTONEG_ENABLE) {
 298                 hw->mac.autoneg = 1;
 299                 if (hw->phy.media_type == e1000_media_type_fiber) {
 300                         hw->phy.autoneg_advertised = advertising |
 301                                                      ADVERTISED_FIBRE |
 302                                                      ADVERTISED_Autoneg;
 303                         switch (adapter->link_speed) {
 304                         case SPEED_2500:
 305                                 hw->phy.autoneg_advertised =
 306                                         ADVERTISED_2500baseX_Full;
 307                                 break;
 308                         case SPEED_1000:
 309                                 hw->phy.autoneg_advertised =
 310                                         ADVERTISED_1000baseT_Full;
 311                                 break;
 312                         case SPEED_100:
 313                                 hw->phy.autoneg_advertised =
 314                                         ADVERTISED_100baseT_Full;
 315                                 break;
 316                         default:
 317                                 break;
 318                         }
 319                 } else {
 320                         hw->phy.autoneg_advertised = advertising |
 321                                                      ADVERTISED_TP |
 322                                                      ADVERTISED_Autoneg;
 323                 }
 324                 advertising = hw->phy.autoneg_advertised;
 325                 if (adapter->fc_autoneg)
 326                         hw->fc.requested_mode = e1000_fc_default;
 327         } else {
 328                 u32 speed = cmd->base.speed;
 329                 /* calling this overrides forced MDI setting */
 330                 if (igb_set_spd_dplx(adapter, speed, cmd->base.duplex)) {
 331                         clear_bit(__IGB_RESETTING, &adapter->state);
 332                         return -EINVAL;
 333                 }
 334         }
 335
 336         /* MDI-X => 2; MDI => 1; Auto => 3 */
 337         if (cmd->base.eth_tp_mdix_ctrl) {
 338                 /* fix up the value for auto (3 => 0) as zero is mapped
 339                  * internally to auto
 340                  */
 341                 if (cmd->base.eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
 342                         hw->phy.mdix = AUTO_ALL_MODES;
 343                 else
 344                         hw->phy.mdix = cmd->base.eth_tp_mdix_ctrl;
 345         }
 346
 347         /* reset the link */
 348         if (netif_running(adapter->netdev)) {
 349                 igb_down(adapter);
 350                 igb_up(adapter);
 351         } else
 352                 igb_reset(adapter);
 353
 354         clear_bit(__IGB_RESETTING, &adapter->state);
 355         return 0;
 356 }
 357
 358 static u32 igb_get_link(struct net_device *netdev)
 359 {
 360         struct igb_adapter *adapter = netdev_priv(netdev);
 361         struct e1000_mac_info *mac = &adapter->hw.mac;
 362
 363         /* If the link is not reported up to netdev, interrupts are disabled,
 364          * and so the physical link state may have changed since we last
 365          * looked. Set get_link_status to make sure that the true link
 366          * state is interrogated, rather than pulling a cached and possibly
 367          * stale link state from the driver.
 368          */
 369         if (!netif_carrier_ok(netdev))
 370                 mac->get_link_status = 1;
 371
 372         return igb_has_link(adapter);
 373 }
 374
 375 static void igb_get_pauseparam(struct net_device *netdev,
 376                                struct ethtool_pauseparam *pause)
 377 {
 378         struct igb_adapter *adapter = netdev_priv(netdev);
 379         struct e1000_hw *hw = &adapter->hw;
 380
 381         pause->autoneg =
 382                 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
 383
 384         if (hw->fc.current_mode == e1000_fc_rx_pause)
 385                 pause->rx_pause = 1;
 386         else if (hw->fc.current_mode == e1000_fc_tx_pause)
 387                 pause->tx_pause = 1;
 388         else if (hw->fc.current_mode == e1000_fc_full) {
 389                 pause->rx_pause = 1;
 390                 pause->tx_pause = 1;
 391         }
 392 }
 393
 394 static int igb_set_pauseparam(struct net_device *netdev,
 395                               struct ethtool_pauseparam *pause)
 396 {
 397         struct igb_adapter *adapter = netdev_priv(netdev);
 398         struct e1000_hw *hw = &adapter->hw;
 399         int retval = 0;
 400
 401         /* 100basefx does not support setting link flow control */
 402         if (hw->dev_spec._82575.eth_flags.e100_base_fx)
 403                 return -EINVAL;
 404
 405         adapter->fc_autoneg = pause->autoneg;
 406
 407         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 408                 usleep_range(1000, 2000);
 409
 410         if (adapter->fc_autoneg == AUTONEG_ENABLE) {
 411                 hw->fc.requested_mode = e1000_fc_default;
 412                 if (netif_running(adapter->netdev)) {
 413                         igb_down(adapter);
 414                         igb_up(adapter);
 415                 } else {
 416                         igb_reset(adapter);
 417                 }
 418         } else {
 419                 if (pause->rx_pause && pause->tx_pause)
 420                         hw->fc.requested_mode = e1000_fc_full;
 421                 else if (pause->rx_pause && !pause->tx_pause)
 422                         hw->fc.requested_mode = e1000_fc_rx_pause;
 423                 else if (!pause->rx_pause && pause->tx_pause)
 424                         hw->fc.requested_mode = e1000_fc_tx_pause;
 425                 else if (!pause->rx_pause && !pause->tx_pause)
 426                         hw->fc.requested_mode = e1000_fc_none;
 427
 428                 hw->fc.current_mode = hw->fc.requested_mode;
 429
 430                 retval = ((hw->phy.media_type == e1000_media_type_copper) ?
 431                           igb_force_mac_fc(hw) : igb_setup_link(hw));
 432         }
 433
 434         clear_bit(__IGB_RESETTING, &adapter->state);
 435         return retval;
 436 }
 437
 438 static u32 igb_get_msglevel(struct net_device *netdev)
 439 {
 440         struct igb_adapter *adapter = netdev_priv(netdev);
 441         return adapter->msg_enable;
 442 }
 443
 444 static void igb_set_msglevel(struct net_device *netdev, u32 data)
 445 {
 446         struct igb_adapter *adapter = netdev_priv(netdev);
 447         adapter->msg_enable = data;
 448 }
 449
 450 static int igb_get_regs_len(struct net_device *netdev)
 451 {
 452 #define IGB_REGS_LEN 739
 453         return IGB_REGS_LEN * sizeof(u32);
 454 }
 455
 456 static void igb_get_regs(struct net_device *netdev,
 457                          struct ethtool_regs *regs, void *p)
 458 {
 459         struct igb_adapter *adapter = netdev_priv(netdev);
 460         struct e1000_hw *hw = &adapter->hw;
 461         u32 *regs_buff = p;
 462         u8 i;
 463
 464         memset(p, 0, IGB_REGS_LEN * sizeof(u32));
 465
 466         regs->version = (1u << 24) | (hw->revision_id << 16) | hw->device_id;
 467
 468         /* General Registers */
 469         regs_buff[0] = rd32(E1000_CTRL);
 470         regs_buff[1] = rd32(E1000_STATUS);
 471         regs_buff[2] = rd32(E1000_CTRL_EXT);
 472         regs_buff[3] = rd32(E1000_MDIC);
 473         regs_buff[4] = rd32(E1000_SCTL);
 474         regs_buff[5] = rd32(E1000_CONNSW);
 475         regs_buff[6] = rd32(E1000_VET);
 476         regs_buff[7] = rd32(E1000_LEDCTL);
 477         regs_buff[8] = rd32(E1000_PBA);
 478         regs_buff[9] = rd32(E1000_PBS);
 479         regs_buff[10] = rd32(E1000_FRTIMER);
 480         regs_buff[11] = rd32(E1000_TCPTIMER);
 481
 482         /* NVM Register */
 483         regs_buff[12] = rd32(E1000_EECD);
 484
 485         /* Interrupt */
 486         /* Reading EICS for EICR because they read the
 487          * same but EICS does not clear on read
 488          */
 489         regs_buff[13] = rd32(E1000_EICS);
 490         regs_buff[14] = rd32(E1000_EICS);
 491         regs_buff[15] = rd32(E1000_EIMS);
 492         regs_buff[16] = rd32(E1000_EIMC);
 493         regs_buff[17] = rd32(E1000_EIAC);
 494         regs_buff[18] = rd32(E1000_EIAM);
 495         /* Reading ICS for ICR because they read the
 496          * same but ICS does not clear on read
 497          */
 498         regs_buff[19] = rd32(E1000_ICS);
 499         regs_buff[20] = rd32(E1000_ICS);
 500         regs_buff[21] = rd32(E1000_IMS);
 501         regs_buff[22] = rd32(E1000_IMC);
 502         regs_buff[23] = rd32(E1000_IAC);
 503         regs_buff[24] = rd32(E1000_IAM);
 504         regs_buff[25] = rd32(E1000_IMIRVP);
 505
 506         /* Flow Control */
 507         regs_buff[26] = rd32(E1000_FCAL);
 508         regs_buff[27] = rd32(E1000_FCAH);
 509         regs_buff[28] = rd32(E1000_FCTTV);
 510         regs_buff[29] = rd32(E1000_FCRTL);
 511         regs_buff[30] = rd32(E1000_FCRTH);
 512         regs_buff[31] = rd32(E1000_FCRTV);
 513
 514         /* Receive */
 515         regs_buff[32] = rd32(E1000_RCTL);
 516         regs_buff[33] = rd32(E1000_RXCSUM);
 517         regs_buff[34] = rd32(E1000_RLPML);
 518         regs_buff[35] = rd32(E1000_RFCTL);
 519         regs_buff[36] = rd32(E1000_MRQC);
 520         regs_buff[37] = rd32(E1000_VT_CTL);
 521
 522         /* Transmit */
 523         regs_buff[38] = rd32(E1000_TCTL);
 524         regs_buff[39] = rd32(E1000_TCTL_EXT);
 525         regs_buff[40] = rd32(E1000_TIPG);
 526         regs_buff[41] = rd32(E1000_DTXCTL);
 527
 528         /* Wake Up */
 529         regs_buff[42] = rd32(E1000_WUC);
 530         regs_buff[43] = rd32(E1000_WUFC);
 531         regs_buff[44] = rd32(E1000_WUS);
 532         regs_buff[45] = rd32(E1000_IPAV);
 533         regs_buff[46] = rd32(E1000_WUPL);
 534
 535         /* MAC */
 536         regs_buff[47] = rd32(E1000_PCS_CFG0);
 537         regs_buff[48] = rd32(E1000_PCS_LCTL);
 538         regs_buff[49] = rd32(E1000_PCS_LSTAT);
 539         regs_buff[50] = rd32(E1000_PCS_ANADV);
 540         regs_buff[51] = rd32(E1000_PCS_LPAB);
 541         regs_buff[52] = rd32(E1000_PCS_NPTX);
 542         regs_buff[53] = rd32(E1000_PCS_LPABNP);
 543
 544         /* Statistics */
 545         regs_buff[54] = adapter->stats.crcerrs;
 546         regs_buff[55] = adapter->stats.algnerrc;
 547         regs_buff[56] = adapter->stats.symerrs;
 548         regs_buff[57] = adapter->stats.rxerrc;
 549         regs_buff[58] = adapter->stats.mpc;
 550         regs_buff[59] = adapter->stats.scc;
 551         regs_buff[60] = adapter->stats.ecol;
 552         regs_buff[61] = adapter->stats.mcc;
 553         regs_buff[62] = adapter->stats.latecol;
 554         regs_buff[63] = adapter->stats.colc;
 555         regs_buff[64] = adapter->stats.dc;
 556         regs_buff[65] = adapter->stats.tncrs;
 557         regs_buff[66] = adapter->stats.sec;
 558         regs_buff[67] = adapter->stats.htdpmc;
 559         regs_buff[68] = adapter->stats.rlec;
 560         regs_buff[69] = adapter->stats.xonrxc;
 561         regs_buff[70] = adapter->stats.xontxc;
 562         regs_buff[71] = adapter->stats.xoffrxc;
 563         regs_buff[72] = adapter->stats.xofftxc;
 564         regs_buff[73] = adapter->stats.fcruc;
 565         regs_buff[74] = adapter->stats.prc64;
 566         regs_buff[75] = adapter->stats.prc127;
 567         regs_buff[76] = adapter->stats.prc255;
 568         regs_buff[77] = adapter->stats.prc511;
 569         regs_buff[78] = adapter->stats.prc1023;
 570         regs_buff[79] = adapter->stats.prc1522;
 571         regs_buff[80] = adapter->stats.gprc;
 572         regs_buff[81] = adapter->stats.bprc;
 573         regs_buff[82] = adapter->stats.mprc;
 574         regs_buff[83] = adapter->stats.gptc;
 575         regs_buff[84] = adapter->stats.gorc;
 576         regs_buff[86] = adapter->stats.gotc;
 577         regs_buff[88] = adapter->stats.rnbc;
 578         regs_buff[89] = adapter->stats.ruc;
 579         regs_buff[90] = adapter->stats.rfc;
 580         regs_buff[91] = adapter->stats.roc;
 581         regs_buff[92] = adapter->stats.rjc;
 582         regs_buff[93] = adapter->stats.mgprc;
 583         regs_buff[94] = adapter->stats.mgpdc;
 584         regs_buff[95] = adapter->stats.mgptc;
 585         regs_buff[96] = adapter->stats.tor;
 586         regs_buff[98] = adapter->stats.tot;
 587         regs_buff[100] = adapter->stats.tpr;
 588         regs_buff[101] = adapter->stats.tpt;
 589         regs_buff[102] = adapter->stats.ptc64;
 590         regs_buff[103] = adapter->stats.ptc127;
 591         regs_buff[104] = adapter->stats.ptc255;
 592         regs_buff[105] = adapter->stats.ptc511;
 593         regs_buff[106] = adapter->stats.ptc1023;
 594         regs_buff[107] = adapter->stats.ptc1522;
 595         regs_buff[108] = adapter->stats.mptc;
 596         regs_buff[109] = adapter->stats.bptc;
 597         regs_buff[110] = adapter->stats.tsctc;
 598         regs_buff[111] = adapter->stats.iac;
 599         regs_buff[112] = adapter->stats.rpthc;
 600         regs_buff[113] = adapter->stats.hgptc;
 601         regs_buff[114] = adapter->stats.hgorc;
 602         regs_buff[116] = adapter->stats.hgotc;
 603         regs_buff[118] = adapter->stats.lenerrs;
 604         regs_buff[119] = adapter->stats.scvpc;
 605         regs_buff[120] = adapter->stats.hrmpc;
 606
 607         for (i = 0; i < 4; i++)
 608                 regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
 609         for (i = 0; i < 4; i++)
 610                 regs_buff[125 + i] = rd32(E1000_PSRTYPE(i));
 611         for (i = 0; i < 4; i++)
 612                 regs_buff[129 + i] = rd32(E1000_RDBAL(i));
 613         for (i = 0; i < 4; i++)
 614                 regs_buff[133 + i] = rd32(E1000_RDBAH(i));
 615         for (i = 0; i < 4; i++)
 616                 regs_buff[137 + i] = rd32(E1000_RDLEN(i));
 617         for (i = 0; i < 4; i++)
 618                 regs_buff[141 + i] = rd32(E1000_RDH(i));
 619         for (i = 0; i < 4; i++)
 620                 regs_buff[145 + i] = rd32(E1000_RDT(i));
 621         for (i = 0; i < 4; i++)
 622                 regs_buff[149 + i] = rd32(E1000_RXDCTL(i));
 623
 624         for (i = 0; i < 10; i++)
 625                 regs_buff[153 + i] = rd32(E1000_EITR(i));
 626         for (i = 0; i < 8; i++)
 627                 regs_buff[163 + i] = rd32(E1000_IMIR(i));
 628         for (i = 0; i < 8; i++)
 629                 regs_buff[171 + i] = rd32(E1000_IMIREXT(i));
 630         for (i = 0; i < 16; i++)
 631                 regs_buff[179 + i] = rd32(E1000_RAL(i));
 632         for (i = 0; i < 16; i++)
 633                 regs_buff[195 + i] = rd32(E1000_RAH(i));
 634
 635         for (i = 0; i < 4; i++)
 636                 regs_buff[211 + i] = rd32(E1000_TDBAL(i));
 637         for (i = 0; i < 4; i++)
 638                 regs_buff[215 + i] = rd32(E1000_TDBAH(i));
 639         for (i = 0; i < 4; i++)
 640                 regs_buff[219 + i] = rd32(E1000_TDLEN(i));
 641         for (i = 0; i < 4; i++)
 642                 regs_buff[223 + i] = rd32(E1000_TDH(i));
 643         for (i = 0; i < 4; i++)
 644                 regs_buff[227 + i] = rd32(E1000_TDT(i));
 645         for (i = 0; i < 4; i++)
 646                 regs_buff[231 + i] = rd32(E1000_TXDCTL(i));
 647         for (i = 0; i < 4; i++)
 648                 regs_buff[235 + i] = rd32(E1000_TDWBAL(i));
 649         for (i = 0; i < 4; i++)
 650                 regs_buff[239 + i] = rd32(E1000_TDWBAH(i));
 651         for (i = 0; i < 4; i++)
 652                 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i));
 653
 654         for (i = 0; i < 4; i++)
 655                 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i));
 656         for (i = 0; i < 4; i++)
 657                 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i));
 658         for (i = 0; i < 32; i++)
 659                 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i));
 660         for (i = 0; i < 128; i++)
 661                 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i));
 662         for (i = 0; i < 128; i++)
 663                 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i));
 664         for (i = 0; i < 4; i++)
 665                 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i));
 666
 667         regs_buff[547] = rd32(E1000_TDFH);
 668         regs_buff[548] = rd32(E1000_TDFT);
 669         regs_buff[549] = rd32(E1000_TDFHS);
 670         regs_buff[550] = rd32(E1000_TDFPC);
 671
 672         if (hw->mac.type > e1000_82580) {
 673                 regs_buff[551] = adapter->stats.o2bgptc;
 674                 regs_buff[552] = adapter->stats.b2ospc;
 675                 regs_buff[553] = adapter->stats.o2bspc;
 676                 regs_buff[554] = adapter->stats.b2ogprc;
 677         }
 678
 679         if (hw->mac.type != e1000_82576)
 680                 return;
 681         for (i = 0; i < 12; i++)
 682                 regs_buff[555 + i] = rd32(E1000_SRRCTL(i + 4));
 683         for (i = 0; i < 4; i++)
 684                 regs_buff[567 + i] = rd32(E1000_PSRTYPE(i + 4));
 685         for (i = 0; i < 12; i++)
 686                 regs_buff[571 + i] = rd32(E1000_RDBAL(i + 4));
 687         for (i = 0; i < 12; i++)
 688                 regs_buff[583 + i] = rd32(E1000_RDBAH(i + 4));
 689         for (i = 0; i < 12; i++)
 690                 regs_buff[595 + i] = rd32(E1000_RDLEN(i + 4));
 691         for (i = 0; i < 12; i++)
 692                 regs_buff[607 + i] = rd32(E1000_RDH(i + 4));
 693         for (i = 0; i < 12; i++)
 694                 regs_buff[619 + i] = rd32(E1000_RDT(i + 4));
 695         for (i = 0; i < 12; i++)
 696                 regs_buff[631 + i] = rd32(E1000_RXDCTL(i + 4));
 697
 698         for (i = 0; i < 12; i++)
 699                 regs_buff[643 + i] = rd32(E1000_TDBAL(i + 4));
 700         for (i = 0; i < 12; i++)
 701                 regs_buff[655 + i] = rd32(E1000_TDBAH(i + 4));
 702         for (i = 0; i < 12; i++)
 703                 regs_buff[667 + i] = rd32(E1000_TDLEN(i + 4));
 704         for (i = 0; i < 12; i++)
 705                 regs_buff[679 + i] = rd32(E1000_TDH(i + 4));
 706         for (i = 0; i < 12; i++)
 707                 regs_buff[691 + i] = rd32(E1000_TDT(i + 4));
 708         for (i = 0; i < 12; i++)
 709                 regs_buff[703 + i] = rd32(E1000_TXDCTL(i + 4));
 710         for (i = 0; i < 12; i++)
 711                 regs_buff[715 + i] = rd32(E1000_TDWBAL(i + 4));
 712         for (i = 0; i < 12; i++)
 713                 regs_buff[727 + i] = rd32(E1000_TDWBAH(i + 4));
 714 }
 715
 716 static int igb_get_eeprom_len(struct net_device *netdev)
 717 {
 718         struct igb_adapter *adapter = netdev_priv(netdev);
 719         return adapter->hw.nvm.word_size * 2;
 720 }
 721
 722 static int igb_get_eeprom(struct net_device *netdev,
 723                           struct ethtool_eeprom *eeprom, u8 *bytes)
 724 {
 725         struct igb_adapter *adapter = netdev_priv(netdev);
 726         struct e1000_hw *hw = &adapter->hw;
 727         u16 *eeprom_buff;
 728         int first_word, last_word;
 729         int ret_val = 0;
 730         u16 i;
 731
 732         if (eeprom->len == 0)
 733                 return -EINVAL;
 734
 735         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 736
 737         first_word = eeprom->offset >> 1;
 738         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 739
 740         eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
 741                                     GFP_KERNEL);
 742         if (!eeprom_buff)
 743                 return -ENOMEM;
 744
 745         if (hw->nvm.type == e1000_nvm_eeprom_spi)
 746                 ret_val = hw->nvm.ops.read(hw, first_word,
 747                                            last_word - first_word + 1,
 748                                            eeprom_buff);
 749         else {
 750                 for (i = 0; i < last_word - first_word + 1; i++) {
 751                         ret_val = hw->nvm.ops.read(hw, first_word + i, 1,
 752                                                    &eeprom_buff[i]);
 753                         if (ret_val)
 754                                 break;
 755                 }
 756         }
 757
 758         /* Device's eeprom is always little-endian, word addressable */
 759         for (i = 0; i < last_word - first_word + 1; i++)
 760                 le16_to_cpus(&eeprom_buff[i]);
 761
 762         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
 763                         eeprom->len);
 764         kfree(eeprom_buff);
 765
 766         return ret_val;
 767 }
 768
 769 static int igb_set_eeprom(struct net_device *netdev,
 770                           struct ethtool_eeprom *eeprom, u8 *bytes)
 771 {
 772         struct igb_adapter *adapter = netdev_priv(netdev);
 773         struct e1000_hw *hw = &adapter->hw;
 774         u16 *eeprom_buff;
 775         void *ptr;
 776         int max_len, first_word, last_word, ret_val = 0;
 777         u16 i;
 778
 779         if (eeprom->len == 0)
 780                 return -EOPNOTSUPP;
 781
 782         if ((hw->mac.type >= e1000_i210) &&
 783             !igb_get_flash_presence_i210(hw)) {
 784                 return -EOPNOTSUPP;
 785         }
 786
 787         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 788                 return -EFAULT;
 789
 790         max_len = hw->nvm.word_size * 2;
 791
 792         first_word = eeprom->offset >> 1;
 793         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 794         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 795         if (!eeprom_buff)
 796                 return -ENOMEM;
 797
 798         ptr = (void *)eeprom_buff;
 799
 800         if (eeprom->offset & 1) {
 801                 /* need read/modify/write of first changed EEPROM word
 802                  * only the second byte of the word is being modified
 803                  */
 804                 ret_val = hw->nvm.ops.read(hw, first_word, 1,
 805                                             &eeprom_buff[0]);
 806                 ptr++;
 807         }
 808         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
 809                 /* need read/modify/write of last changed EEPROM word
 810                  * only the first byte of the word is being modified
 811                  */
 812                 ret_val = hw->nvm.ops.read(hw, last_word, 1,
 813                                    &eeprom_buff[last_word - first_word]);
 814         }
 815
 816         /* Device's eeprom is always little-endian, word addressable */
 817         for (i = 0; i < last_word - first_word + 1; i++)
 818                 le16_to_cpus(&eeprom_buff[i]);
 819
 820         memcpy(ptr, bytes, eeprom->len);
 821
 822         for (i = 0; i < last_word - first_word + 1; i++)
 823                 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
 824
 825         ret_val = hw->nvm.ops.write(hw, first_word,
 826                                     last_word - first_word + 1, eeprom_buff);
 827
 828         /* Update the checksum if nvm write succeeded */
 829         if (ret_val == 0)
 830                 hw->nvm.ops.update(hw);
 831
 832         igb_set_fw_version(adapter);
 833         kfree(eeprom_buff);
 834         return ret_val;
 835 }
 836
 837 static void igb_get_drvinfo(struct net_device *netdev,
 838                             struct ethtool_drvinfo *drvinfo)
 839 {
 840         struct igb_adapter *adapter = netdev_priv(netdev);
 841
 842         strlcpy(drvinfo->driver,  igb_driver_name, sizeof(drvinfo->driver));
 843         strlcpy(drvinfo->version, igb_driver_version, sizeof(drvinfo->version));
 844
 845         /* EEPROM image version # is reported as firmware version # for
 846          * 82575 controllers
 847          */
 848         strlcpy(drvinfo->fw_version, adapter->fw_version,
 849                 sizeof(drvinfo->fw_version));
 850         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
 851                 sizeof(drvinfo->bus_info));
 852
 853         drvinfo->n_priv_flags = IGB_PRIV_FLAGS_STR_LEN;
 854 }
 855
 856 static void igb_get_ringparam(struct net_device *netdev,
 857                               struct ethtool_ringparam *ring)
 858 {
 859         struct igb_adapter *adapter = netdev_priv(netdev);
 860
 861         ring->rx_max_pending = IGB_MAX_RXD;
 862         ring->tx_max_pending = IGB_MAX_TXD;
 863         ring->rx_pending = adapter->rx_ring_count;
 864         ring->tx_pending = adapter->tx_ring_count;
 865 }
 866
 867 static int igb_set_ringparam(struct net_device *netdev,
 868                              struct ethtool_ringparam *ring)
 869 {
 870         struct igb_adapter *adapter = netdev_priv(netdev);
 871         struct igb_ring *temp_ring;
 872         int i, err = 0;
 873         u16 new_rx_count, new_tx_count;
 874
 875         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 876                 return -EINVAL;
 877
 878         new_rx_count = min_t(u32, ring->rx_pending, IGB_MAX_RXD);
 879         new_rx_count = max_t(u16, new_rx_count, IGB_MIN_RXD);
 880         new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
 881
 882         new_tx_count = min_t(u32, ring->tx_pending, IGB_MAX_TXD);
 883         new_tx_count = max_t(u16, new_tx_count, IGB_MIN_TXD);
 884         new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
 885
 886         if ((new_tx_count == adapter->tx_ring_count) &&
 887             (new_rx_count == adapter->rx_ring_count)) {
 888                 /* nothing to do */
 889                 return 0;
 890         }
 891
 892         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 893                 usleep_range(1000, 2000);
 894
 895         if (!netif_running(adapter->netdev)) {
 896                 for (i = 0; i < adapter->num_tx_queues; i++)
 897                         adapter->tx_ring[i]->count = new_tx_count;
 898                 for (i = 0; i < adapter->num_rx_queues; i++)
 899                         adapter->rx_ring[i]->count = new_rx_count;
 900                 adapter->tx_ring_count = new_tx_count;
 901                 adapter->rx_ring_count = new_rx_count;
 902                 goto clear_reset;
 903         }
 904
 905         if (adapter->num_tx_queues > adapter->num_rx_queues)
 906                 temp_ring = vmalloc(array_size(sizeof(struct igb_ring),
 907                                                adapter->num_tx_queues));
 908         else
 909                 temp_ring = vmalloc(array_size(sizeof(struct igb_ring),
 910                                                adapter->num_rx_queues));
 911
 912         if (!temp_ring) {
 913                 err = -ENOMEM;
 914                 goto clear_reset;
 915         }
 916
 917         igb_down(adapter);
 918
 919         /* We can't just free everything and then setup again,
 920          * because the ISRs in MSI-X mode get passed pointers
 921          * to the Tx and Rx ring structs.
 922          */
 923         if (new_tx_count != adapter->tx_ring_count) {
 924                 for (i = 0; i < adapter->num_tx_queues; i++) {
 925                         memcpy(&temp_ring[i], adapter->tx_ring[i],
 926                                sizeof(struct igb_ring));
 927
 928                         temp_ring[i].count = new_tx_count;
 929                         err = igb_setup_tx_resources(&temp_ring[i]);
 930                         if (err) {
 931                                 while (i) {
 932                                         i--;
 933                                         igb_free_tx_resources(&temp_ring[i]);
 934                                 }
 935                                 goto err_setup;
 936                         }
 937                 }
 938
 939                 for (i = 0; i < adapter->num_tx_queues; i++) {
 940                         igb_free_tx_resources(adapter->tx_ring[i]);
 941
 942                         memcpy(adapter->tx_ring[i], &temp_ring[i],
 943                                sizeof(struct igb_ring));
 944                 }
 945
 946                 adapter->tx_ring_count = new_tx_count;
 947         }
 948
 949         if (new_rx_count != adapter->rx_ring_count) {
 950                 for (i = 0; i < adapter->num_rx_queues; i++) {
 951                         memcpy(&temp_ring[i], adapter->rx_ring[i],
 952                                sizeof(struct igb_ring));
 953
 954                         temp_ring[i].count = new_rx_count;
 955                         err = igb_setup_rx_resources(&temp_ring[i]);
 956                         if (err) {
 957                                 while (i) {
 958                                         i--;
 959                                         igb_free_rx_resources(&temp_ring[i]);
 960                                 }
 961                                 goto err_setup;
 962                         }
 963
 964                 }
 965
 966                 for (i = 0; i < adapter->num_rx_queues; i++) {
 967                         igb_free_rx_resources(adapter->rx_ring[i]);
 968
 969                         memcpy(adapter->rx_ring[i], &temp_ring[i],
 970                                sizeof(struct igb_ring));
 971                 }
 972
 973                 adapter->rx_ring_count = new_rx_count;
 974         }
 975 err_setup:
 976         igb_up(adapter);
 977         vfree(temp_ring);
 978 clear_reset:
 979         clear_bit(__IGB_RESETTING, &adapter->state);
 980         return err;
 981 }
 982
 983 /* ethtool register test data */
 984 struct igb_reg_test {
 985         u16 reg;
 986         u16 reg_offset;
 987         u16 array_len;
 988         u16 test_type;
 989         u32 mask;
 990         u32 write;
 991 };
 992
 993 /* In the hardware, registers are laid out either singly, in arrays
 994  * spaced 0x100 bytes apart, or in contiguous tables.  We assume
 995  * most tests take place on arrays or single registers (handled
 996  * as a single-element array) and special-case the tables.
 997  * Table tests are always pattern tests.
 998  *
 999  * We also make provision for some required setup steps by specifying
1000  * registers to be written without any read-back testing.
1001  */
1002
1003 #define PATTERN_TEST    1
1004 #define SET_READ_TEST   2
1005 #define WRITE_NO_TEST   3
1006 #define TABLE32_TEST    4
1007 #define TABLE64_TEST_LO 5
1008 #define TABLE64_TEST_HI 6
1009
1010 /* i210 reg test */
1011 static struct igb_reg_test reg_test_i210[] = {
1012         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1013         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1014         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1015         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1016         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1017         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1018         /* RDH is read-only for i210, only test RDT. */
1019         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1020         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1021         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1022         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1023         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1024         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1025         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1026         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1027         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1028         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1029         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1030         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1031         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1032                                                 0xFFFFFFFF, 0xFFFFFFFF },
1033         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1034                                                 0x900FFFFF, 0xFFFFFFFF },
1035         { E1000_MTA,       0, 128, TABLE32_TEST,
1036                                                 0xFFFFFFFF, 0xFFFFFFFF },
1037         { 0, 0, 0, 0, 0 }
1038 };
1039
1040 /* i350 reg test */
1041 static struct igb_reg_test reg_test_i350[] = {
1042         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1043         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1044         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1045         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFF0000, 0xFFFF0000 },
1046         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1047         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1048         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1049         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1050         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1051         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1052         /* RDH is read-only for i350, only test RDT. */
1053         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1054         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1055         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1056         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1057         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1058         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1059         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1060         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1061         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1062         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1063         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1064         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1065         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1066         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1067         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1068         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1069         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1070         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1071                                                 0xFFFFFFFF, 0xFFFFFFFF },
1072         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1073                                                 0xC3FFFFFF, 0xFFFFFFFF },
1074         { E1000_RA2,       0, 16, TABLE64_TEST_LO,
1075                                                 0xFFFFFFFF, 0xFFFFFFFF },
1076         { E1000_RA2,       0, 16, TABLE64_TEST_HI,
1077                                                 0xC3FFFFFF, 0xFFFFFFFF },
1078         { E1000_MTA,       0, 128, TABLE32_TEST,
1079                                                 0xFFFFFFFF, 0xFFFFFFFF },
1080         { 0, 0, 0, 0 }
1081 };
1082
1083 /* 82580 reg test */
1084 static struct igb_reg_test reg_test_82580[] = {
1085         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1086         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1087         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1088         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1089         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1090         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1091         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1092         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1093         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1094         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1095         /* RDH is read-only for 82580, only test RDT. */
1096         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1097         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1098         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1099         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1100         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1101         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1102         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1103         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1104         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1105         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1106         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1107         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1108         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1109         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1110         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1111         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1112         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1113         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1114                                                 0xFFFFFFFF, 0xFFFFFFFF },
1115         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1116                                                 0x83FFFFFF, 0xFFFFFFFF },
1117         { E1000_RA2,       0, 8, TABLE64_TEST_LO,
1118                                                 0xFFFFFFFF, 0xFFFFFFFF },
1119         { E1000_RA2,       0, 8, TABLE64_TEST_HI,
1120                                                 0x83FFFFFF, 0xFFFFFFFF },
1121         { E1000_MTA,       0, 128, TABLE32_TEST,
1122                                                 0xFFFFFFFF, 0xFFFFFFFF },
1123         { 0, 0, 0, 0 }
1124 };
1125
1126 /* 82576 reg test */
1127 static struct igb_reg_test reg_test_82576[] = {
1128         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1129         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1130         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1131         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1132         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1133         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1134         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1135         { E1000_RDBAL(4),  0x40, 12, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1136         { E1000_RDBAH(4),  0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1137         { E1000_RDLEN(4),  0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1138         /* Enable all RX queues before testing. */
1139         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0,
1140           E1000_RXDCTL_QUEUE_ENABLE },
1141         { E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST, 0,
1142           E1000_RXDCTL_QUEUE_ENABLE },
1143         /* RDH is read-only for 82576, only test RDT. */
1144         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1145         { E1000_RDT(4),    0x40, 12,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1146         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, 0 },
1147         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, 0 },
1148         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1149         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1150         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1151         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1152         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1153         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1154         { E1000_TDBAL(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1155         { E1000_TDBAH(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1156         { E1000_TDLEN(4),  0x40, 12,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1157         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1158         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1159         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1160         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1161         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1162         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1163         { E1000_RA2,       0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1164         { E1000_RA2,       0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1165         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1166         { 0, 0, 0, 0 }
1167 };
1168
1169 /* 82575 register test */
1170 static struct igb_reg_test reg_test_82575[] = {
1171         { E1000_FCAL,      0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1172         { E1000_FCAH,      0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1173         { E1000_FCT,       0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1174         { E1000_VET,       0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1175         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1176         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1177         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1178         /* Enable all four RX queues before testing. */
1179         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0,
1180           E1000_RXDCTL_QUEUE_ENABLE },
1181         /* RDH is read-only for 82575, only test RDT. */
1182         { E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1183         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 },
1184         { E1000_FCRTH,     0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1185         { E1000_FCTTV,     0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1186         { E1000_TIPG,      0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1187         { E1000_TDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1188         { E1000_TDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1189         { E1000_TDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1190         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1191         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0x003FFFFB },
1192         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0xFFFFFFFF },
1193         { E1000_TCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1194         { E1000_TXCW,      0x100, 1, PATTERN_TEST, 0xC000FFFF, 0x0000FFFF },
1195         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1196         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x800FFFFF, 0xFFFFFFFF },
1197         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1198         { 0, 0, 0, 0 }
1199 };
1200
1201 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
1202                              int reg, u32 mask, u32 write)
1203 {
1204         struct e1000_hw *hw = &adapter->hw;
1205         u32 pat, val;
1206         static const u32 _test[] = {
1207                 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1208         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
1209                 wr32(reg, (_test[pat] & write));
1210                 val = rd32(reg) & mask;
1211                 if (val != (_test[pat] & write & mask)) {
1212                         dev_err(&adapter->pdev->dev,
1213                                 "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1214                                 reg, val, (_test[pat] & write & mask));
1215                         *data = reg;
1216                         return true;
1217                 }
1218         }
1219
1220         return false;
1221 }
1222
1223 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
1224                               int reg, u32 mask, u32 write)
1225 {
1226         struct e1000_hw *hw = &adapter->hw;
1227         u32 val;
1228
1229         wr32(reg, write & mask);
1230         val = rd32(reg);
1231         if ((write & mask) != (val & mask)) {
1232                 dev_err(&adapter->pdev->dev,
1233                         "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
1234                         reg, (val & mask), (write & mask));
1235                 *data = reg;
1236                 return true;
1237         }
1238
1239         return false;
1240 }
1241
1242 #define REG_PATTERN_TEST(reg, mask, write) \
1243         do { \
1244                 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1245                         return 1; \
1246         } while (0)
1247
1248 #define REG_SET_AND_CHECK(reg, mask, write) \
1249         do { \
1250                 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1251                         return 1; \
1252         } while (0)
1253
1254 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
1255 {
1256         struct e1000_hw *hw = &adapter->hw;
1257         struct igb_reg_test *test;
1258         u32 value, before, after;
1259         u32 i, toggle;
1260
1261         switch (adapter->hw.mac.type) {
1262         case e1000_i350:
1263         case e1000_i354:
1264                 test = reg_test_i350;
1265                 toggle = 0x7FEFF3FF;
1266                 break;
1267         case e1000_i210:
1268         case e1000_i211:
1269                 test = reg_test_i210;
1270                 toggle = 0x7FEFF3FF;
1271                 break;
1272         case e1000_82580:
1273                 test = reg_test_82580;
1274                 toggle = 0x7FEFF3FF;
1275                 break;
1276         case e1000_82576:
1277                 test = reg_test_82576;
1278                 toggle = 0x7FFFF3FF;
1279                 break;
1280         default:
1281                 test = reg_test_82575;
1282                 toggle = 0x7FFFF3FF;
1283                 break;
1284         }
1285
1286         /* Because the status register is such a special case,
1287          * we handle it separately from the rest of the register
1288          * tests.  Some bits are read-only, some toggle, and some
1289          * are writable on newer MACs.
1290          */
1291         before = rd32(E1000_STATUS);
1292         value = (rd32(E1000_STATUS) & toggle);
1293         wr32(E1000_STATUS, toggle);
1294         after = rd32(E1000_STATUS) & toggle;
1295         if (value != after) {
1296                 dev_err(&adapter->pdev->dev,
1297                         "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1298                         after, value);
1299                 *data = 1;
1300                 return 1;
1301         }
1302         /* restore previous status */
1303         wr32(E1000_STATUS, before);
1304
1305         /* Perform the remainder of the register test, looping through
1306          * the test table until we either fail or reach the null entry.
1307          */
1308         while (test->reg) {
1309                 for (i = 0; i < test->array_len; i++) {
1310                         switch (test->test_type) {
1311                         case PATTERN_TEST:
1312                                 REG_PATTERN_TEST(test->reg +
1313                                                 (i * test->reg_offset),
1314                                                 test->mask,
1315                                                 test->write);
1316                                 break;
1317                         case SET_READ_TEST:
1318                                 REG_SET_AND_CHECK(test->reg +
1319                                                 (i * test->reg_offset),
1320                                                 test->mask,
1321                                                 test->write);
1322                                 break;
1323                         case WRITE_NO_TEST:
1324                                 writel(test->write,
1325                                     (adapter->hw.hw_addr + test->reg)
1326                                         + (i * test->reg_offset));
1327                                 break;
1328                         case TABLE32_TEST:
1329                                 REG_PATTERN_TEST(test->reg + (i * 4),
1330                                                 test->mask,
1331                                                 test->write);
1332                                 break;
1333                         case TABLE64_TEST_LO:
1334                                 REG_PATTERN_TEST(test->reg + (i * 8),
1335                                                 test->mask,
1336                                                 test->write);
1337                                 break;
1338                         case TABLE64_TEST_HI:
1339                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1340                                                 test->mask,
1341                                                 test->write);
1342                                 break;
1343                         }
1344                 }
1345                 test++;
1346         }
1347
1348         *data = 0;
1349         return 0;
1350 }
1351
1352 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1353 {
1354         struct e1000_hw *hw = &adapter->hw;
1355
1356         *data = 0;
1357
1358         /* Validate eeprom on all parts but flashless */
1359         switch (hw->mac.type) {
1360         case e1000_i210:
1361         case e1000_i211:
1362                 if (igb_get_flash_presence_i210(hw)) {
1363                         if (adapter->hw.nvm.ops.validate(&adapter->hw) < 0)
1364                                 *data = 2;
1365                 }
1366                 break;
1367         default:
1368                 if (adapter->hw.nvm.ops.validate(&adapter->hw) < 0)
1369                         *data = 2;
1370                 break;
1371         }
1372
1373         return *data;
1374 }
1375
1376 static irqreturn_t igb_test_intr(int irq, void *data)
1377 {
1378         struct igb_adapter *adapter = (struct igb_adapter *) data;
1379         struct e1000_hw *hw = &adapter->hw;
1380
1381         adapter->test_icr |= rd32(E1000_ICR);
1382
1383         return IRQ_HANDLED;
1384 }
1385
1386 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1387 {
1388         struct e1000_hw *hw = &adapter->hw;
1389         struct net_device *netdev = adapter->netdev;
1390         u32 mask, ics_mask, i = 0, shared_int = true;
1391         u32 irq = adapter->pdev->irq;
1392
1393         *data = 0;
1394
1395         /* Hook up test interrupt handler just for this test */
1396         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1397                 if (request_irq(adapter->msix_entries[0].vector,
1398                                 igb_test_intr, 0, netdev->name, adapter)) {
1399                         *data = 1;
1400                         return -1;
1401                 }
1402         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1403                 shared_int = false;
1404                 if (request_irq(irq,
1405                                 igb_test_intr, 0, netdev->name, adapter)) {
1406                         *data = 1;
1407                         return -1;
1408                 }
1409         } else if (!request_irq(irq, igb_test_intr, IRQF_PROBE_SHARED,
1410                                 netdev->name, adapter)) {
1411                 shared_int = false;
1412         } else if (request_irq(irq, igb_test_intr, IRQF_SHARED,
1413                  netdev->name, adapter)) {
1414                 *data = 1;
1415                 return -1;
1416         }
1417         dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
1418                 (shared_int ? "shared" : "unshared"));
1419
1420         /* Disable all the interrupts */
1421         wr32(E1000_IMC, ~0);
1422         wrfl();
1423         usleep_range(10000, 11000);
1424
1425         /* Define all writable bits for ICS */
1426         switch (hw->mac.type) {
1427         case e1000_82575:
1428                 ics_mask = 0x37F47EDD;
1429                 break;
1430         case e1000_82576:
1431                 ics_mask = 0x77D4FBFD;
1432                 break;
1433         case e1000_82580:
1434                 ics_mask = 0x77DCFED5;
1435                 break;
1436         case e1000_i350:
1437         case e1000_i354:
1438         case e1000_i210:
1439         case e1000_i211:
1440                 ics_mask = 0x77DCFED5;
1441                 break;
1442         default:
1443                 ics_mask = 0x7FFFFFFF;
1444                 break;
1445         }
1446
1447         /* Test each interrupt */
1448         for (; i < 31; i++) {
1449                 /* Interrupt to test */
1450                 mask = BIT(i);
1451
1452                 if (!(mask & ics_mask))
1453                         continue;
1454
1455                 if (!shared_int) {
1456                         /* Disable the interrupt to be reported in
1457                          * the cause register and then force the same
1458                          * interrupt and see if one gets posted.  If
1459                          * an interrupt was posted to the bus, the
1460                          * test failed.
1461                          */
1462                         adapter->test_icr = 0;
1463
1464                         /* Flush any pending interrupts */
1465                         wr32(E1000_ICR, ~0);
1466
1467                         wr32(E1000_IMC, mask);
1468                         wr32(E1000_ICS, mask);
1469                         wrfl();
1470                         usleep_range(10000, 11000);
1471
1472                         if (adapter->test_icr & mask) {
1473                                 *data = 3;
1474                                 break;
1475                         }
1476                 }
1477
1478                 /* Enable the interrupt to be reported in
1479                  * the cause register and then force the same
1480                  * interrupt and see if one gets posted.  If
1481                  * an interrupt was not posted to the bus, the
1482                  * test failed.
1483                  */
1484                 adapter->test_icr = 0;
1485
1486                 /* Flush any pending interrupts */
1487                 wr32(E1000_ICR, ~0);
1488
1489                 wr32(E1000_IMS, mask);
1490                 wr32(E1000_ICS, mask);
1491                 wrfl();
1492                 usleep_range(10000, 11000);
1493
1494                 if (!(adapter->test_icr & mask)) {
1495                         *data = 4;
1496                         break;
1497                 }
1498
1499                 if (!shared_int) {
1500                         /* Disable the other interrupts to be reported in
1501                          * the cause register and then force the other
1502                          * interrupts and see if any get posted.  If
1503                          * an interrupt was posted to the bus, the
1504                          * test failed.
1505                          */
1506                         adapter->test_icr = 0;
1507
1508                         /* Flush any pending interrupts */
1509                         wr32(E1000_ICR, ~0);
1510
1511                         wr32(E1000_IMC, ~mask);
1512                         wr32(E1000_ICS, ~mask);
1513                         wrfl();
1514                         usleep_range(10000, 11000);
1515
1516                         if (adapter->test_icr & mask) {
1517                                 *data = 5;
1518                                 break;
1519                         }
1520                 }
1521         }
1522
1523         /* Disable all the interrupts */
1524         wr32(E1000_IMC, ~0);
1525         wrfl();
1526         usleep_range(10000, 11000);
1527
1528         /* Unhook test interrupt handler */
1529         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1530                 free_irq(adapter->msix_entries[0].vector, adapter);
1531         else
1532                 free_irq(irq, adapter);
1533
1534         return *data;
1535 }
1536
1537 static void igb_free_desc_rings(struct igb_adapter *adapter)
1538 {
1539         igb_free_tx_resources(&adapter->test_tx_ring);
1540         igb_free_rx_resources(&adapter->test_rx_ring);
1541 }
1542
1543 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1544 {
1545         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1546         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1547         struct e1000_hw *hw = &adapter->hw;
1548         int ret_val;
1549
1550         /* Setup Tx descriptor ring and Tx buffers */
1551         tx_ring->count = IGB_DEFAULT_TXD;
1552         tx_ring->dev = &adapter->pdev->dev;
1553         tx_ring->netdev = adapter->netdev;
1554         tx_ring->reg_idx = adapter->vfs_allocated_count;
1555
1556         if (igb_setup_tx_resources(tx_ring)) {
1557                 ret_val = 1;
1558                 goto err_nomem;
1559         }
1560
1561         igb_setup_tctl(adapter);
1562         igb_configure_tx_ring(adapter, tx_ring);
1563
1564         /* Setup Rx descriptor ring and Rx buffers */
1565         rx_ring->count = IGB_DEFAULT_RXD;
1566         rx_ring->dev = &adapter->pdev->dev;
1567         rx_ring->netdev = adapter->netdev;
1568         rx_ring->reg_idx = adapter->vfs_allocated_count;
1569
1570         if (igb_setup_rx_resources(rx_ring)) {
1571                 ret_val = 3;
1572                 goto err_nomem;
1573         }
1574
1575         /* set the default queue to queue 0 of PF */
1576         wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);
1577
1578         /* enable receive ring */
1579         igb_setup_rctl(adapter);
1580         igb_configure_rx_ring(adapter, rx_ring);
1581
1582         igb_alloc_rx_buffers(rx_ring, igb_desc_unused(rx_ring));
1583
1584         return 0;
1585
1586 err_nomem:
1587         igb_free_desc_rings(adapter);
1588         return ret_val;
1589 }
1590
1591 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1592 {
1593         struct e1000_hw *hw = &adapter->hw;
1594
1595         /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1596         igb_write_phy_reg(hw, 29, 0x001F);
1597         igb_write_phy_reg(hw, 30, 0x8FFC);
1598         igb_write_phy_reg(hw, 29, 0x001A);
1599         igb_write_phy_reg(hw, 30, 0x8FF0);
1600 }
1601
1602 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1603 {
1604         struct e1000_hw *hw = &adapter->hw;
1605         u32 ctrl_reg = 0;
1606
1607         hw->mac.autoneg = false;
1608
1609         if (hw->phy.type == e1000_phy_m88) {
1610                 if (hw->phy.id != I210_I_PHY_ID) {
1611                         /* Auto-MDI/MDIX Off */
1612                         igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1613                         /* reset to update Auto-MDI/MDIX */
1614                         igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1615                         /* autoneg off */
1616                         igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1617                 } else {
1618                         /* force 1000, set loopback  */
1619                         igb_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0);
1620                         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1621                 }
1622         } else if (hw->phy.type == e1000_phy_82580) {
1623                 /* enable MII loopback */
1624                 igb_write_phy_reg(hw, I82580_PHY_LBK_CTRL, 0x8041);
1625         }
1626
1627         /* add small delay to avoid loopback test failure */
1628         msleep(50);
1629
1630         /* force 1000, set loopback */
1631         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1632
1633         /* Now set up the MAC to the same speed/duplex as the PHY. */
1634         ctrl_reg = rd32(E1000_CTRL);
1635         ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1636         ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1637                      E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1638                      E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1639                      E1000_CTRL_FD |     /* Force Duplex to FULL */
1640                      E1000_CTRL_SLU);    /* Set link up enable bit */
1641
1642         if (hw->phy.type == e1000_phy_m88)
1643                 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1644
1645         wr32(E1000_CTRL, ctrl_reg);
1646
1647         /* Disable the receiver on the PHY so when a cable is plugged in, the
1648          * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1649          */
1650         if (hw->phy.type == e1000_phy_m88)
1651                 igb_phy_disable_receiver(adapter);
1652
1653         msleep(500);
1654         return 0;
1655 }
1656
1657 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1658 {
1659         return igb_integrated_phy_loopback(adapter);
1660 }
1661
1662 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1663 {
1664         struct e1000_hw *hw = &adapter->hw;
1665         u32 reg;
1666
1667         reg = rd32(E1000_CTRL_EXT);
1668
1669         /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1670         if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
1671                 if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1672                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1673                 (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1674                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP) ||
1675                 (hw->device_id == E1000_DEV_ID_I354_SGMII) ||
1676                 (hw->device_id == E1000_DEV_ID_I354_BACKPLANE_2_5GBPS)) {
1677                         /* Enable DH89xxCC MPHY for near end loopback */
1678                         reg = rd32(E1000_MPHY_ADDR_CTL);
1679                         reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1680                         E1000_MPHY_PCS_CLK_REG_OFFSET;
1681                         wr32(E1000_MPHY_ADDR_CTL, reg);
1682
1683                         reg = rd32(E1000_MPHY_DATA);
1684                         reg |= E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1685                         wr32(E1000_MPHY_DATA, reg);
1686                 }
1687
1688                 reg = rd32(E1000_RCTL);
1689                 reg |= E1000_RCTL_LBM_TCVR;
1690                 wr32(E1000_RCTL, reg);
1691
1692                 wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1693
1694                 reg = rd32(E1000_CTRL);
1695                 reg &= ~(E1000_CTRL_RFCE |
1696                          E1000_CTRL_TFCE |
1697                          E1000_CTRL_LRST);
1698                 reg |= E1000_CTRL_SLU |
1699                        E1000_CTRL_FD;
1700                 wr32(E1000_CTRL, reg);
1701
1702                 /* Unset switch control to serdes energy detect */
1703                 reg = rd32(E1000_CONNSW);
1704                 reg &= ~E1000_CONNSW_ENRGSRC;
1705                 wr32(E1000_CONNSW, reg);
1706
1707                 /* Unset sigdetect for SERDES loopback on
1708                  * 82580 and newer devices.
1709                  */
1710                 if (hw->mac.type >= e1000_82580) {
1711                         reg = rd32(E1000_PCS_CFG0);
1712                         reg |= E1000_PCS_CFG_IGN_SD;
1713                         wr32(E1000_PCS_CFG0, reg);
1714                 }
1715
1716                 /* Set PCS register for forced speed */
1717                 reg = rd32(E1000_PCS_LCTL);
1718                 reg &= ~E1000_PCS_LCTL_AN_ENABLE;     /* Disable Autoneg*/
1719                 reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
1720                        E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
1721                        E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
1722                        E1000_PCS_LCTL_FSD |           /* Force Speed */
1723                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
1724                 wr32(E1000_PCS_LCTL, reg);
1725
1726                 return 0;
1727         }
1728
1729         return igb_set_phy_loopback(adapter);
1730 }
1731
1732 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1733 {
1734         struct e1000_hw *hw = &adapter->hw;
1735         u32 rctl;
1736         u16 phy_reg;
1737
1738         if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1739         (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1740         (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1741         (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP) ||
1742         (hw->device_id == E1000_DEV_ID_I354_SGMII)) {
1743                 u32 reg;
1744
1745                 /* Disable near end loopback on DH89xxCC */
1746                 reg = rd32(E1000_MPHY_ADDR_CTL);
1747                 reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1748                 E1000_MPHY_PCS_CLK_REG_OFFSET;
1749                 wr32(E1000_MPHY_ADDR_CTL, reg);
1750
1751                 reg = rd32(E1000_MPHY_DATA);
1752                 reg &= ~E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1753                 wr32(E1000_MPHY_DATA, reg);
1754         }
1755
1756         rctl = rd32(E1000_RCTL);
1757         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1758         wr32(E1000_RCTL, rctl);
1759
1760         hw->mac.autoneg = true;
1761         igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1762         if (phy_reg & MII_CR_LOOPBACK) {
1763                 phy_reg &= ~MII_CR_LOOPBACK;
1764                 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1765                 igb_phy_sw_reset(hw);
1766         }
1767 }
1768
1769 static void igb_create_lbtest_frame(struct sk_buff *skb,
1770                                     unsigned int frame_size)
1771 {
1772         memset(skb->data, 0xFF, frame_size);
1773         frame_size /= 2;
1774         memset(&skb->data[frame_size], 0xAA, frame_size - 1);
1775         memset(&skb->data[frame_size + 10], 0xBE, 1);
1776         memset(&skb->data[frame_size + 12], 0xAF, 1);
1777 }
1778
1779 static int igb_check_lbtest_frame(struct igb_rx_buffer *rx_buffer,
1780                                   unsigned int frame_size)
1781 {
1782         unsigned char *data;
1783         bool match = true;
1784
1785         frame_size >>= 1;
1786
1787         data = kmap(rx_buffer->page);
1788
1789         if (data[3] != 0xFF ||
1790             data[frame_size + 10] != 0xBE ||
1791             data[frame_size + 12] != 0xAF)
1792                 match = false;
1793
1794         kunmap(rx_buffer->page);
1795
1796         return match;
1797 }
1798
1799 static int igb_clean_test_rings(struct igb_ring *rx_ring,
1800                                 struct igb_ring *tx_ring,
1801                                 unsigned int size)
1802 {
1803         union e1000_adv_rx_desc *rx_desc;
1804         struct igb_rx_buffer *rx_buffer_info;
1805         struct igb_tx_buffer *tx_buffer_info;
1806         u16 rx_ntc, tx_ntc, count = 0;
1807
1808         /* initialize next to clean and descriptor values */
1809         rx_ntc = rx_ring->next_to_clean;
1810         tx_ntc = tx_ring->next_to_clean;
1811         rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1812
1813         while (rx_desc->wb.upper.length) {
1814                 /* check Rx buffer */
1815                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1816
1817                 /* sync Rx buffer for CPU read */
1818                 dma_sync_single_for_cpu(rx_ring->dev,
1819                                         rx_buffer_info->dma,
1820                                         size,
1821                                         DMA_FROM_DEVICE);
1822
1823                 /* verify contents of skb */
1824                 if (igb_check_lbtest_frame(rx_buffer_info, size))
1825                         count++;
1826
1827                 /* sync Rx buffer for device write */
1828                 dma_sync_single_for_device(rx_ring->dev,
1829                                            rx_buffer_info->dma,
1830                                            size,
1831                                            DMA_FROM_DEVICE);
1832
1833                 /* unmap buffer on Tx side */
1834                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1835
1836                 /* Free all the Tx ring sk_buffs */
1837                 dev_kfree_skb_any(tx_buffer_info->skb);
1838
1839                 /* unmap skb header data */
1840                 dma_unmap_single(tx_ring->dev,
1841                                  dma_unmap_addr(tx_buffer_info, dma),
1842                                  dma_unmap_len(tx_buffer_info, len),
1843                                  DMA_TO_DEVICE);
1844                 dma_unmap_len_set(tx_buffer_info, len, 0);
1845
1846                 /* increment Rx/Tx next to clean counters */
1847                 rx_ntc++;
1848                 if (rx_ntc == rx_ring->count)
1849                         rx_ntc = 0;
1850                 tx_ntc++;
1851                 if (tx_ntc == tx_ring->count)
1852                         tx_ntc = 0;
1853
1854                 /* fetch next descriptor */
1855                 rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1856         }
1857
1858         netdev_tx_reset_queue(txring_txq(tx_ring));
1859
1860         /* re-map buffers to ring, store next to clean values */
1861         igb_alloc_rx_buffers(rx_ring, count);
1862         rx_ring->next_to_clean = rx_ntc;
1863         tx_ring->next_to_clean = tx_ntc;
1864
1865         return count;
1866 }
1867
1868 static int igb_run_loopback_test(struct igb_adapter *adapter)
1869 {
1870         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1871         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1872         u16 i, j, lc, good_cnt;
1873         int ret_val = 0;
1874         unsigned int size = IGB_RX_HDR_LEN;
1875         netdev_tx_t tx_ret_val;
1876         struct sk_buff *skb;
1877
1878         /* allocate test skb */
1879         skb = alloc_skb(size, GFP_KERNEL);
1880         if (!skb)
1881                 return 11;
1882
1883         /* place data into test skb */
1884         igb_create_lbtest_frame(skb, size);
1885         skb_put(skb, size);
1886
1887         /* Calculate the loop count based on the largest descriptor ring
1888          * The idea is to wrap the largest ring a number of times using 64
1889          * send/receive pairs during each loop
1890          */
1891
1892         if (rx_ring->count <= tx_ring->count)
1893                 lc = ((tx_ring->count / 64) * 2) + 1;
1894         else
1895                 lc = ((rx_ring->count / 64) * 2) + 1;
1896
1897         for (j = 0; j <= lc; j++) { /* loop count loop */
1898                 /* reset count of good packets */
1899                 good_cnt = 0;
1900
1901                 /* place 64 packets on the transmit queue*/
1902                 for (i = 0; i < 64; i++) {
1903                         skb_get(skb);
1904                         tx_ret_val = igb_xmit_frame_ring(skb, tx_ring);
1905                         if (tx_ret_val == NETDEV_TX_OK)
1906                                 good_cnt++;
1907                 }
1908
1909                 if (good_cnt != 64) {
1910                         ret_val = 12;
1911                         break;
1912                 }
1913
1914                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1915                 msleep(200);
1916
1917                 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1918                 if (good_cnt != 64) {
1919                         ret_val = 13;
1920                         break;
1921                 }
1922         } /* end loop count loop */
1923
1924         /* free the original skb */
1925         kfree_skb(skb);
1926
1927         return ret_val;
1928 }
1929
1930 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1931 {
1932         /* PHY loopback cannot be performed if SoL/IDER
1933          * sessions are active
1934          */
1935         if (igb_check_reset_block(&adapter->hw)) {
1936                 dev_err(&adapter->pdev->dev,
1937                         "Cannot do PHY loopback test when SoL/IDER is active.\n");
1938                 *data = 0;
1939                 goto out;
1940         }
1941
1942         if (adapter->hw.mac.type == e1000_i354) {
1943                 dev_info(&adapter->pdev->dev,
1944                         "Loopback test not supported on i354.\n");
1945                 *data = 0;
1946                 goto out;
1947         }
1948         *data = igb_setup_desc_rings(adapter);
1949         if (*data)
1950                 goto out;
1951         *data = igb_setup_loopback_test(adapter);
1952         if (*data)
1953                 goto err_loopback;
1954         *data = igb_run_loopback_test(adapter);
1955         igb_loopback_cleanup(adapter);
1956
1957 err_loopback:
1958         igb_free_desc_rings(adapter);
1959 out:
1960         return *data;
1961 }
1962
1963 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1964 {
1965         struct e1000_hw *hw = &adapter->hw;
1966         *data = 0;
1967         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1968                 int i = 0;
1969
1970                 hw->mac.serdes_has_link = false;
1971
1972                 /* On some blade server designs, link establishment
1973                  * could take as long as 2-3 minutes
1974                  */
1975                 do {
1976                         hw->mac.ops.check_for_link(&adapter->hw);
1977                         if (hw->mac.serdes_has_link)
1978                                 return *data;
1979                         msleep(20);
1980                 } while (i++ < 3750);
1981
1982                 *data = 1;
1983         } else {
1984                 hw->mac.ops.check_for_link(&adapter->hw);
1985                 if (hw->mac.autoneg)
1986                         msleep(5000);
1987
1988                 if (!(rd32(E1000_STATUS) & E1000_STATUS_LU))
1989                         *data = 1;
1990         }
1991         return *data;
1992 }
1993
1994 static void igb_diag_test(struct net_device *netdev,
1995                           struct ethtool_test *eth_test, u64 *data)
1996 {
1997         struct igb_adapter *adapter = netdev_priv(netdev);
1998         u16 autoneg_advertised;
1999         u8 forced_speed_duplex, autoneg;
2000         bool if_running = netif_running(netdev);
2001
2002         set_bit(__IGB_TESTING, &adapter->state);
2003
2004         /* can't do offline tests on media switching devices */
2005         if (adapter->hw.dev_spec._82575.mas_capable)
2006                 eth_test->flags &= ~ETH_TEST_FL_OFFLINE;
2007         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2008                 /* Offline tests */
2009
2010                 /* save speed, duplex, autoneg settings */
2011                 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
2012                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
2013                 autoneg = adapter->hw.mac.autoneg;
2014
2015                 dev_info(&adapter->pdev->dev, "offline testing starting\n");
2016
2017                 /* power up link for link test */
2018                 igb_power_up_link(adapter);
2019
2020                 /* Link test performed before hardware reset so autoneg doesn't
2021                  * interfere with test result
2022                  */
2023                 if (igb_link_test(adapter, &data[TEST_LINK]))
2024                         eth_test->flags |= ETH_TEST_FL_FAILED;
2025
2026                 if (if_running)
2027                         /* indicate we're in test mode */
2028                         igb_close(netdev);
2029                 else
2030                         igb_reset(adapter);
2031
2032                 if (igb_reg_test(adapter, &data[TEST_REG]))
2033                         eth_test->flags |= ETH_TEST_FL_FAILED;
2034
2035                 igb_reset(adapter);
2036                 if (igb_eeprom_test(adapter, &data[TEST_EEP]))
2037                         eth_test->flags |= ETH_TEST_FL_FAILED;
2038
2039                 igb_reset(adapter);
2040                 if (igb_intr_test(adapter, &data[TEST_IRQ]))
2041                         eth_test->flags |= ETH_TEST_FL_FAILED;
2042
2043                 igb_reset(adapter);
2044                 /* power up link for loopback test */
2045                 igb_power_up_link(adapter);
2046                 if (igb_loopback_test(adapter, &data[TEST_LOOP]))
2047                         eth_test->flags |= ETH_TEST_FL_FAILED;
2048
2049                 /* restore speed, duplex, autoneg settings */
2050                 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
2051                 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
2052                 adapter->hw.mac.autoneg = autoneg;
2053
2054                 /* force this routine to wait until autoneg complete/timeout */
2055                 adapter->hw.phy.autoneg_wait_to_complete = true;
2056                 igb_reset(adapter);
2057                 adapter->hw.phy.autoneg_wait_to_complete = false;
2058
2059                 clear_bit(__IGB_TESTING, &adapter->state);
2060                 if (if_running)
2061                         igb_open(netdev);
2062         } else {
2063                 dev_info(&adapter->pdev->dev, "online testing starting\n");
2064
2065                 /* PHY is powered down when interface is down */
2066                 if (if_running && igb_link_test(adapter, &data[TEST_LINK]))
2067                         eth_test->flags |= ETH_TEST_FL_FAILED;
2068                 else
2069                         data[TEST_LINK] = 0;
2070
2071                 /* Online tests aren't run; pass by default */
2072                 data[TEST_REG] = 0;
2073                 data[TEST_EEP] = 0;
2074                 data[TEST_IRQ] = 0;
2075                 data[TEST_LOOP] = 0;
2076
2077                 clear_bit(__IGB_TESTING, &adapter->state);
2078         }
2079         msleep_interruptible(4 * 1000);
2080 }
2081
2082 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2083 {
2084         struct igb_adapter *adapter = netdev_priv(netdev);
2085
2086         wol->wolopts = 0;
2087
2088         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2089                 return;
2090
2091         wol->supported = WAKE_UCAST | WAKE_MCAST |
2092                          WAKE_BCAST | WAKE_MAGIC |
2093                          WAKE_PHY;
2094
2095         /* apply any specific unsupported masks here */
2096         switch (adapter->hw.device_id) {
2097         default:
2098                 break;
2099         }
2100
2101         if (adapter->wol & E1000_WUFC_EX)
2102                 wol->wolopts |= WAKE_UCAST;
2103         if (adapter->wol & E1000_WUFC_MC)
2104                 wol->wolopts |= WAKE_MCAST;
2105         if (adapter->wol & E1000_WUFC_BC)
2106                 wol->wolopts |= WAKE_BCAST;
2107         if (adapter->wol & E1000_WUFC_MAG)
2108                 wol->wolopts |= WAKE_MAGIC;
2109         if (adapter->wol & E1000_WUFC_LNKC)
2110                 wol->wolopts |= WAKE_PHY;
2111 }
2112
2113 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2114 {
2115         struct igb_adapter *adapter = netdev_priv(netdev);
2116
2117         if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
2118                 return -EOPNOTSUPP;
2119
2120         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2121                 return wol->wolopts ? -EOPNOTSUPP : 0;
2122
2123         /* these settings will always override what we currently have */
2124         adapter->wol = 0;
2125
2126         if (wol->wolopts & WAKE_UCAST)
2127                 adapter->wol |= E1000_WUFC_EX;
2128         if (wol->wolopts & WAKE_MCAST)
2129                 adapter->wol |= E1000_WUFC_MC;
2130         if (wol->wolopts & WAKE_BCAST)
2131                 adapter->wol |= E1000_WUFC_BC;
2132         if (wol->wolopts & WAKE_MAGIC)
2133                 adapter->wol |= E1000_WUFC_MAG;
2134         if (wol->wolopts & WAKE_PHY)
2135                 adapter->wol |= E1000_WUFC_LNKC;
2136         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2137
2138         return 0;
2139 }
2140
2141 /* bit defines for adapter->led_status */
2142 #define IGB_LED_ON              0
2143
2144 static int igb_set_phys_id(struct net_device *netdev,
2145                            enum ethtool_phys_id_state state)
2146 {
2147         struct igb_adapter *adapter = netdev_priv(netdev);
2148         struct e1000_hw *hw = &adapter->hw;
2149
2150         switch (state) {
2151         case ETHTOOL_ID_ACTIVE:
2152                 igb_blink_led(hw);
2153                 return 2;
2154         case ETHTOOL_ID_ON:
2155                 igb_blink_led(hw);
2156                 break;
2157         case ETHTOOL_ID_OFF:
2158                 igb_led_off(hw);
2159                 break;
2160         case ETHTOOL_ID_INACTIVE:
2161                 igb_led_off(hw);
2162                 clear_bit(IGB_LED_ON, &adapter->led_status);
2163                 igb_cleanup_led(hw);
2164                 break;
2165         }
2166
2167         return 0;
2168 }
2169
2170 static int igb_set_coalesce(struct net_device *netdev,
2171                             struct ethtool_coalesce *ec)
2172 {
2173         struct igb_adapter *adapter = netdev_priv(netdev);
2174         int i;
2175
2176         if (ec->rx_max_coalesced_frames ||
2177             ec->rx_coalesce_usecs_irq ||
2178             ec->rx_max_coalesced_frames_irq ||
2179             ec->tx_max_coalesced_frames ||
2180             ec->tx_coalesce_usecs_irq ||
2181             ec->stats_block_coalesce_usecs ||
2182             ec->use_adaptive_rx_coalesce ||
2183             ec->use_adaptive_tx_coalesce ||
2184             ec->pkt_rate_low ||
2185             ec->rx_coalesce_usecs_low ||
2186             ec->rx_max_coalesced_frames_low ||
2187             ec->tx_coalesce_usecs_low ||
2188             ec->tx_max_coalesced_frames_low ||
2189             ec->pkt_rate_high ||
2190             ec->rx_coalesce_usecs_high ||
2191             ec->rx_max_coalesced_frames_high ||
2192             ec->tx_coalesce_usecs_high ||
2193             ec->tx_max_coalesced_frames_high ||
2194             ec->rate_sample_interval)
2195                 return -ENOTSUPP;
2196
2197         if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2198             ((ec->rx_coalesce_usecs > 3) &&
2199              (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2200             (ec->rx_coalesce_usecs == 2))
2201                 return -EINVAL;
2202
2203         if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2204             ((ec->tx_coalesce_usecs > 3) &&
2205              (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2206             (ec->tx_coalesce_usecs == 2))
2207                 return -EINVAL;
2208
2209         if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
2210                 return -EINVAL;
2211
2212         /* If ITR is disabled, disable DMAC */
2213         if (ec->rx_coalesce_usecs == 0) {
2214                 if (adapter->flags & IGB_FLAG_DMAC)
2215                         adapter->flags &= ~IGB_FLAG_DMAC;
2216         }
2217
2218         /* convert to rate of irq's per second */
2219         if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
2220                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2221         else
2222                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2223
2224         /* convert to rate of irq's per second */
2225         if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
2226                 adapter->tx_itr_setting = adapter->rx_itr_setting;
2227         else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
2228                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2229         else
2230                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2231
2232         for (i = 0; i < adapter->num_q_vectors; i++) {
2233                 struct igb_q_vector *q_vector = adapter->q_vector[i];
2234                 q_vector->tx.work_limit = adapter->tx_work_limit;
2235                 if (q_vector->rx.ring)
2236                         q_vector->itr_val = adapter->rx_itr_setting;
2237                 else
2238                         q_vector->itr_val = adapter->tx_itr_setting;
2239                 if (q_vector->itr_val && q_vector->itr_val <= 3)
2240                         q_vector->itr_val = IGB_START_ITR;
2241                 q_vector->set_itr = 1;
2242         }
2243
2244         return 0;
2245 }
2246
2247 static int igb_get_coalesce(struct net_device *netdev,
2248                             struct ethtool_coalesce *ec)
2249 {
2250         struct igb_adapter *adapter = netdev_priv(netdev);
2251
2252         if (adapter->rx_itr_setting <= 3)
2253                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2254         else
2255                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2256
2257         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
2258                 if (adapter->tx_itr_setting <= 3)
2259                         ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2260                 else
2261                         ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2262         }
2263
2264         return 0;
2265 }
2266
2267 static int igb_nway_reset(struct net_device *netdev)
2268 {
2269         struct igb_adapter *adapter = netdev_priv(netdev);
2270         if (netif_running(netdev))
2271                 igb_reinit_locked(adapter);
2272         return 0;
2273 }
2274
2275 static int igb_get_sset_count(struct net_device *netdev, int sset)
2276 {
2277         switch (sset) {
2278         case ETH_SS_STATS:
2279                 return IGB_STATS_LEN;
2280         case ETH_SS_TEST:
2281                 return IGB_TEST_LEN;
2282         case ETH_SS_PRIV_FLAGS:
2283                 return IGB_PRIV_FLAGS_STR_LEN;
2284         default:
2285                 return -ENOTSUPP;
2286         }
2287 }
2288
2289 static void igb_get_ethtool_stats(struct net_device *netdev,
2290                                   struct ethtool_stats *stats, u64 *data)
2291 {
2292         struct igb_adapter *adapter = netdev_priv(netdev);
2293         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
2294         unsigned int start;
2295         struct igb_ring *ring;
2296         int i, j;
2297         char *p;
2298
2299         spin_lock(&adapter->stats64_lock);
2300         igb_update_stats(adapter);
2301
2302         for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2303                 p = (char *)adapter + igb_gstrings_stats[i].stat_offset;
2304                 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
2305                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2306         }
2307         for (j = 0; j < IGB_NETDEV_STATS_LEN; j++, i++) {
2308                 p = (char *)net_stats + igb_gstrings_net_stats[j].stat_offset;
2309                 data[i] = (igb_gstrings_net_stats[j].sizeof_stat ==
2310                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2311         }
2312         for (j = 0; j < adapter->num_tx_queues; j++) {
2313                 u64     restart2;
2314
2315                 ring = adapter->tx_ring[j];
2316                 do {
2317                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
2318                         data[i]   = ring->tx_stats.packets;
2319                         data[i+1] = ring->tx_stats.bytes;
2320                         data[i+2] = ring->tx_stats.restart_queue;
2321                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
2322                 do {
2323                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp2);
2324                         restart2  = ring->tx_stats.restart_queue2;
2325                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp2, start));
2326                 data[i+2] += restart2;
2327
2328                 i += IGB_TX_QUEUE_STATS_LEN;
2329         }
2330         for (j = 0; j < adapter->num_rx_queues; j++) {
2331                 ring = adapter->rx_ring[j];
2332                 do {
2333                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
2334                         data[i]   = ring->rx_stats.packets;
2335                         data[i+1] = ring->rx_stats.bytes;
2336                         data[i+2] = ring->rx_stats.drops;
2337                         data[i+3] = ring->rx_stats.csum_err;
2338                         data[i+4] = ring->rx_stats.alloc_failed;
2339                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
2340                 i += IGB_RX_QUEUE_STATS_LEN;
2341         }
2342         spin_unlock(&adapter->stats64_lock);
2343 }
2344
2345 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2346 {
2347         struct igb_adapter *adapter = netdev_priv(netdev);
2348         u8 *p = data;
2349         int i;
2350
2351         switch (stringset) {
2352         case ETH_SS_TEST:
2353                 memcpy(data, *igb_gstrings_test,
2354                         IGB_TEST_LEN*ETH_GSTRING_LEN);
2355                 break;
2356         case ETH_SS_STATS:
2357                 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2358                         memcpy(p, igb_gstrings_stats[i].stat_string,
2359                                ETH_GSTRING_LEN);
2360                         p += ETH_GSTRING_LEN;
2361                 }
2362                 for (i = 0; i < IGB_NETDEV_STATS_LEN; i++) {
2363                         memcpy(p, igb_gstrings_net_stats[i].stat_string,
2364                                ETH_GSTRING_LEN);
2365                         p += ETH_GSTRING_LEN;
2366                 }
2367                 for (i = 0; i < adapter->num_tx_queues; i++) {
2368                         sprintf(p, "tx_queue_%u_packets", i);
2369                         p += ETH_GSTRING_LEN;
2370                         sprintf(p, "tx_queue_%u_bytes", i);
2371                         p += ETH_GSTRING_LEN;
2372                         sprintf(p, "tx_queue_%u_restart", i);
2373                         p += ETH_GSTRING_LEN;
2374                 }
2375                 for (i = 0; i < adapter->num_rx_queues; i++) {
2376                         sprintf(p, "rx_queue_%u_packets", i);
2377                         p += ETH_GSTRING_LEN;
2378                         sprintf(p, "rx_queue_%u_bytes", i);
2379                         p += ETH_GSTRING_LEN;
2380                         sprintf(p, "rx_queue_%u_drops", i);
2381                         p += ETH_GSTRING_LEN;
2382                         sprintf(p, "rx_queue_%u_csum_err", i);
2383                         p += ETH_GSTRING_LEN;
2384                         sprintf(p, "rx_queue_%u_alloc_failed", i);
2385                         p += ETH_GSTRING_LEN;
2386                 }
2387                 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2388                 break;
2389         case ETH_SS_PRIV_FLAGS:
2390                 memcpy(data, igb_priv_flags_strings,
2391                        IGB_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN);
2392                 break;
2393         }
2394 }
2395
2396 static int igb_get_ts_info(struct net_device *dev,
2397                            struct ethtool_ts_info *info)
2398 {
2399         struct igb_adapter *adapter = netdev_priv(dev);
2400
2401         if (adapter->ptp_clock)
2402                 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2403         else
2404                 info->phc_index = -1;
2405
2406         switch (adapter->hw.mac.type) {
2407         case e1000_82575:
2408                 info->so_timestamping =
2409                         SOF_TIMESTAMPING_TX_SOFTWARE |
2410                         SOF_TIMESTAMPING_RX_SOFTWARE |
2411                         SOF_TIMESTAMPING_SOFTWARE;
2412                 return 0;
2413         case e1000_82576:
2414         case e1000_82580:
2415         case e1000_i350:
2416         case e1000_i354:
2417         case e1000_i210:
2418         case e1000_i211:
2419                 info->so_timestamping =
2420                         SOF_TIMESTAMPING_TX_SOFTWARE |
2421                         SOF_TIMESTAMPING_RX_SOFTWARE |
2422                         SOF_TIMESTAMPING_SOFTWARE |
2423                         SOF_TIMESTAMPING_TX_HARDWARE |
2424                         SOF_TIMESTAMPING_RX_HARDWARE |
2425                         SOF_TIMESTAMPING_RAW_HARDWARE;
2426
2427                 info->tx_types =
2428                         BIT(HWTSTAMP_TX_OFF) |
2429                         BIT(HWTSTAMP_TX_ON);
2430
2431                 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE);
2432
2433                 /* 82576 does not support timestamping all packets. */
2434                 if (adapter->hw.mac.type >= e1000_82580)
2435                         info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL);
2436                 else
2437                         info->rx_filters |=
2438                                 BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2439                                 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2440                                 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
2441
2442                 return 0;
2443         default:
2444                 return -EOPNOTSUPP;
2445         }
2446 }
2447
2448 #define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
2449 static int igb_get_ethtool_nfc_entry(struct igb_adapter *adapter,
2450                                      struct ethtool_rxnfc *cmd)
2451 {
2452         struct ethtool_rx_flow_spec *fsp = &cmd->fs;
2453         struct igb_nfc_filter *rule = NULL;
2454
2455         /* report total rule count */
2456         cmd->data = IGB_MAX_RXNFC_FILTERS;
2457
2458         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2459                 if (fsp->location <= rule->sw_idx)
2460                         break;
2461         }
2462
2463         if (!rule || fsp->location != rule->sw_idx)
2464                 return -EINVAL;
2465
2466         if (rule->filter.match_flags) {
2467                 fsp->flow_type = ETHER_FLOW;
2468                 fsp->ring_cookie = rule->action;
2469                 if (rule->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE) {
2470                         fsp->h_u.ether_spec.h_proto = rule->filter.etype;
2471                         fsp->m_u.ether_spec.h_proto = ETHER_TYPE_FULL_MASK;
2472                 }
2473                 if (rule->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI) {
2474                         fsp->flow_type |= FLOW_EXT;
2475                         fsp->h_ext.vlan_tci = rule->filter.vlan_tci;
2476                         fsp->m_ext.vlan_tci = htons(VLAN_PRIO_MASK);
2477                 }
2478                 if (rule->filter.match_flags & IGB_FILTER_FLAG_DST_MAC_ADDR) {
2479                         ether_addr_copy(fsp->h_u.ether_spec.h_dest,
2480                                         rule->filter.dst_addr);
2481                         /* As we only support matching by the full
2482                          * mask, return the mask to userspace
2483                          */
2484                         eth_broadcast_addr(fsp->m_u.ether_spec.h_dest);
2485                 }
2486                 if (rule->filter.match_flags & IGB_FILTER_FLAG_SRC_MAC_ADDR) {
2487                         ether_addr_copy(fsp->h_u.ether_spec.h_source,
2488                                         rule->filter.src_addr);
2489                         /* As we only support matching by the full
2490                          * mask, return the mask to userspace
2491                          */
2492                         eth_broadcast_addr(fsp->m_u.ether_spec.h_source);
2493                 }
2494
2495                 return 0;
2496         }
2497         return -EINVAL;
2498 }
2499
2500 static int igb_get_ethtool_nfc_all(struct igb_adapter *adapter,
2501                                    struct ethtool_rxnfc *cmd,
2502                                    u32 *rule_locs)
2503 {
2504         struct igb_nfc_filter *rule;
2505         int cnt = 0;
2506
2507         /* report total rule count */
2508         cmd->data = IGB_MAX_RXNFC_FILTERS;
2509
2510         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2511                 if (cnt == cmd->rule_cnt)
2512                         return -EMSGSIZE;
2513                 rule_locs[cnt] = rule->sw_idx;
2514                 cnt++;
2515         }
2516
2517         cmd->rule_cnt = cnt;
2518
2519         return 0;
2520 }
2521
2522 static int igb_get_rss_hash_opts(struct igb_adapter *adapter,
2523                                  struct ethtool_rxnfc *cmd)
2524 {
2525         cmd->data = 0;
2526
2527         /* Report default options for RSS on igb */
2528         switch (cmd->flow_type) {
2529         case TCP_V4_FLOW:
2530                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2531                 /* Fall through */
2532         case UDP_V4_FLOW:
2533                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2534                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2535                 /* Fall through */
2536         case SCTP_V4_FLOW:
2537         case AH_ESP_V4_FLOW:
2538         case AH_V4_FLOW:
2539         case ESP_V4_FLOW:
2540         case IPV4_FLOW:
2541                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2542                 break;
2543         case TCP_V6_FLOW:
2544                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2545                 /* Fall through */
2546         case UDP_V6_FLOW:
2547                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2548                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2549                 /* Fall through */
2550         case SCTP_V6_FLOW:
2551         case AH_ESP_V6_FLOW:
2552         case AH_V6_FLOW:
2553         case ESP_V6_FLOW:
2554         case IPV6_FLOW:
2555                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2556                 break;
2557         default:
2558                 return -EINVAL;
2559         }
2560
2561         return 0;
2562 }
2563
2564 static int igb_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2565                          u32 *rule_locs)
2566 {
2567         struct igb_adapter *adapter = netdev_priv(dev);
2568         int ret = -EOPNOTSUPP;
2569
2570         switch (cmd->cmd) {
2571         case ETHTOOL_GRXRINGS:
2572                 cmd->data = adapter->num_rx_queues;
2573                 ret = 0;
2574                 break;
2575         case ETHTOOL_GRXCLSRLCNT:
2576                 cmd->rule_cnt = adapter->nfc_filter_count;
2577                 ret = 0;
2578                 break;
2579         case ETHTOOL_GRXCLSRULE:
2580                 ret = igb_get_ethtool_nfc_entry(adapter, cmd);
2581                 break;
2582         case ETHTOOL_GRXCLSRLALL:
2583                 ret = igb_get_ethtool_nfc_all(adapter, cmd, rule_locs);
2584                 break;
2585         case ETHTOOL_GRXFH:
2586                 ret = igb_get_rss_hash_opts(adapter, cmd);
2587                 break;
2588         default:
2589                 break;
2590         }
2591
2592         return ret;
2593 }
2594
2595 #define UDP_RSS_FLAGS (IGB_FLAG_RSS_FIELD_IPV4_UDP | \
2596                        IGB_FLAG_RSS_FIELD_IPV6_UDP)
2597 static int igb_set_rss_hash_opt(struct igb_adapter *adapter,
2598                                 struct ethtool_rxnfc *nfc)
2599 {
2600         u32 flags = adapter->flags;
2601
2602         /* RSS does not support anything other than hashing
2603          * to queues on src and dst IPs and ports
2604          */
2605         if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2606                           RXH_L4_B_0_1 | RXH_L4_B_2_3))
2607                 return -EINVAL;
2608
2609         switch (nfc->flow_type) {
2610         case TCP_V4_FLOW:
2611         case TCP_V6_FLOW:
2612                 if (!(nfc->data & RXH_IP_SRC) ||
2613                     !(nfc->data & RXH_IP_DST) ||
2614                     !(nfc->data & RXH_L4_B_0_1) ||
2615                     !(nfc->data & RXH_L4_B_2_3))
2616                         return -EINVAL;
2617                 break;
2618         case UDP_V4_FLOW:
2619                 if (!(nfc->data & RXH_IP_SRC) ||
2620                     !(nfc->data & RXH_IP_DST))
2621                         return -EINVAL;
2622                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2623                 case 0:
2624                         flags &= ~IGB_FLAG_RSS_FIELD_IPV4_UDP;
2625                         break;
2626                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2627                         flags |= IGB_FLAG_RSS_FIELD_IPV4_UDP;
2628                         break;
2629                 default:
2630                         return -EINVAL;
2631                 }
2632                 break;
2633         case UDP_V6_FLOW:
2634                 if (!(nfc->data & RXH_IP_SRC) ||
2635                     !(nfc->data & RXH_IP_DST))
2636                         return -EINVAL;
2637                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2638                 case 0:
2639                         flags &= ~IGB_FLAG_RSS_FIELD_IPV6_UDP;
2640                         break;
2641                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2642                         flags |= IGB_FLAG_RSS_FIELD_IPV6_UDP;
2643                         break;
2644                 default:
2645                         return -EINVAL;
2646                 }
2647                 break;
2648         case AH_ESP_V4_FLOW:
2649         case AH_V4_FLOW:
2650         case ESP_V4_FLOW:
2651         case SCTP_V4_FLOW:
2652         case AH_ESP_V6_FLOW:
2653         case AH_V6_FLOW:
2654         case ESP_V6_FLOW:
2655         case SCTP_V6_FLOW:
2656                 if (!(nfc->data & RXH_IP_SRC) ||
2657                     !(nfc->data & RXH_IP_DST) ||
2658                     (nfc->data & RXH_L4_B_0_1) ||
2659                     (nfc->data & RXH_L4_B_2_3))
2660                         return -EINVAL;
2661                 break;
2662         default:
2663                 return -EINVAL;
2664         }
2665
2666         /* if we changed something we need to update flags */
2667         if (flags != adapter->flags) {
2668                 struct e1000_hw *hw = &adapter->hw;
2669                 u32 mrqc = rd32(E1000_MRQC);
2670
2671                 if ((flags & UDP_RSS_FLAGS) &&
2672                     !(adapter->flags & UDP_RSS_FLAGS))
2673                         dev_err(&adapter->pdev->dev,
2674                                 "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2675
2676                 adapter->flags = flags;
2677
2678                 /* Perform hash on these packet types */
2679                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4 |
2680                         E1000_MRQC_RSS_FIELD_IPV4_TCP |
2681                         E1000_MRQC_RSS_FIELD_IPV6 |
2682                         E1000_MRQC_RSS_FIELD_IPV6_TCP;
2683
2684                 mrqc &= ~(E1000_MRQC_RSS_FIELD_IPV4_UDP |
2685                           E1000_MRQC_RSS_FIELD_IPV6_UDP);
2686
2687                 if (flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2688                         mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
2689
2690                 if (flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2691                         mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
2692
2693                 wr32(E1000_MRQC, mrqc);
2694         }
2695
2696         return 0;
2697 }
2698
2699 static int igb_rxnfc_write_etype_filter(struct igb_adapter *adapter,
2700                                         struct igb_nfc_filter *input)
2701 {
2702         struct e1000_hw *hw = &adapter->hw;
2703         u8 i;
2704         u32 etqf;
2705         u16 etype;
2706
2707         /* find an empty etype filter register */
2708         for (i = 0; i < MAX_ETYPE_FILTER; ++i) {
2709                 if (!adapter->etype_bitmap[i])
2710                         break;
2711         }
2712         if (i == MAX_ETYPE_FILTER) {
2713                 dev_err(&adapter->pdev->dev, "ethtool -N: etype filters are all used.\n");
2714                 return -EINVAL;
2715         }
2716
2717         adapter->etype_bitmap[i] = true;
2718
2719         etqf = rd32(E1000_ETQF(i));
2720         etype = ntohs(input->filter.etype & ETHER_TYPE_FULL_MASK);
2721
2722         etqf |= E1000_ETQF_FILTER_ENABLE;
2723         etqf &= ~E1000_ETQF_ETYPE_MASK;
2724         etqf |= (etype & E1000_ETQF_ETYPE_MASK);
2725
2726         etqf &= ~E1000_ETQF_QUEUE_MASK;
2727         etqf |= ((input->action << E1000_ETQF_QUEUE_SHIFT)
2728                 & E1000_ETQF_QUEUE_MASK);
2729         etqf |= E1000_ETQF_QUEUE_ENABLE;
2730
2731         wr32(E1000_ETQF(i), etqf);
2732
2733         input->etype_reg_index = i;
2734
2735         return 0;
2736 }
2737
2738 static int igb_rxnfc_write_vlan_prio_filter(struct igb_adapter *adapter,
2739                                             struct igb_nfc_filter *input)
2740 {
2741         struct e1000_hw *hw = &adapter->hw;
2742         u8 vlan_priority;
2743         u16 queue_index;
2744         u32 vlapqf;
2745
2746         vlapqf = rd32(E1000_VLAPQF);
2747         vlan_priority = (ntohs(input->filter.vlan_tci) & VLAN_PRIO_MASK)
2748                                 >> VLAN_PRIO_SHIFT;
2749         queue_index = (vlapqf >> (vlan_priority * 4)) & E1000_VLAPQF_QUEUE_MASK;
2750
2751         /* check whether this vlan prio is already set */
2752         if ((vlapqf & E1000_VLAPQF_P_VALID(vlan_priority)) &&
2753             (queue_index != input->action)) {
2754                 dev_err(&adapter->pdev->dev, "ethtool rxnfc set vlan prio filter failed.\n");
2755                 return -EEXIST;
2756         }
2757
2758         vlapqf |= E1000_VLAPQF_P_VALID(vlan_priority);
2759         vlapqf |= E1000_VLAPQF_QUEUE_SEL(vlan_priority, input->action);
2760
2761         wr32(E1000_VLAPQF, vlapqf);
2762
2763         return 0;
2764 }
2765
2766 int igb_add_filter(struct igb_adapter *adapter, struct igb_nfc_filter *input)
2767 {
2768         struct e1000_hw *hw = &adapter->hw;
2769         int err = -EINVAL;
2770
2771         if (hw->mac.type == e1000_i210 &&
2772             !(input->filter.match_flags & ~IGB_FILTER_FLAG_SRC_MAC_ADDR)) {
2773                 dev_err(&adapter->pdev->dev,
2774                         "i210 doesn't support flow classification rules specifying only source addresses.\n");
2775                 return -EOPNOTSUPP;
2776         }
2777
2778         if (input->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE) {
2779                 err = igb_rxnfc_write_etype_filter(adapter, input);
2780                 if (err)
2781                         return err;
2782         }
2783
2784         if (input->filter.match_flags & IGB_FILTER_FLAG_DST_MAC_ADDR) {
2785                 err = igb_add_mac_steering_filter(adapter,
2786                                                   input->filter.dst_addr,
2787                                                   input->action, 0);
2788                 err = min_t(int, err, 0);
2789                 if (err)
2790                         return err;
2791         }
2792
2793         if (input->filter.match_flags & IGB_FILTER_FLAG_SRC_MAC_ADDR) {
2794                 err = igb_add_mac_steering_filter(adapter,
2795                                                   input->filter.src_addr,
2796                                                   input->action,
2797                                                   IGB_MAC_STATE_SRC_ADDR);
2798                 err = min_t(int, err, 0);
2799                 if (err)
2800                         return err;
2801         }
2802
2803         if (input->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI)
2804                 err = igb_rxnfc_write_vlan_prio_filter(adapter, input);
2805
2806         return err;
2807 }
2808
2809 static void igb_clear_etype_filter_regs(struct igb_adapter *adapter,
2810                                         u16 reg_index)
2811 {
2812         struct e1000_hw *hw = &adapter->hw;
2813         u32 etqf = rd32(E1000_ETQF(reg_index));
2814
2815         etqf &= ~E1000_ETQF_QUEUE_ENABLE;
2816         etqf &= ~E1000_ETQF_QUEUE_MASK;
2817         etqf &= ~E1000_ETQF_FILTER_ENABLE;
2818
2819         wr32(E1000_ETQF(reg_index), etqf);
2820
2821         adapter->etype_bitmap[reg_index] = false;
2822 }
2823
2824 static void igb_clear_vlan_prio_filter(struct igb_adapter *adapter,
2825                                        u16 vlan_tci)
2826 {
2827         struct e1000_hw *hw = &adapter->hw;
2828         u8 vlan_priority;
2829         u32 vlapqf;
2830
2831         vlan_priority = (vlan_tci & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
2832
2833         vlapqf = rd32(E1000_VLAPQF);
2834         vlapqf &= ~E1000_VLAPQF_P_VALID(vlan_priority);
2835         vlapqf &= ~E1000_VLAPQF_QUEUE_SEL(vlan_priority,
2836                                                 E1000_VLAPQF_QUEUE_MASK);
2837
2838         wr32(E1000_VLAPQF, vlapqf);
2839 }
2840
2841 int igb_erase_filter(struct igb_adapter *adapter, struct igb_nfc_filter *input)
2842 {
2843         if (input->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE)
2844                 igb_clear_etype_filter_regs(adapter,
2845                                             input->etype_reg_index);
2846
2847         if (input->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI)
2848                 igb_clear_vlan_prio_filter(adapter,
2849                                            ntohs(input->filter.vlan_tci));
2850
2851         if (input->filter.match_flags & IGB_FILTER_FLAG_SRC_MAC_ADDR)
2852                 igb_del_mac_steering_filter(adapter, input->filter.src_addr,
2853                                             input->action,
2854                                             IGB_MAC_STATE_SRC_ADDR);
2855
2856         if (input->filter.match_flags & IGB_FILTER_FLAG_DST_MAC_ADDR)
2857                 igb_del_mac_steering_filter(adapter, input->filter.dst_addr,
2858                                             input->action, 0);
2859
2860         return 0;
2861 }
2862
2863 static int igb_update_ethtool_nfc_entry(struct igb_adapter *adapter,
2864                                         struct igb_nfc_filter *input,
2865                                         u16 sw_idx)
2866 {
2867         struct igb_nfc_filter *rule, *parent;
2868         int err = -EINVAL;
2869
2870         parent = NULL;
2871         rule = NULL;
2872
2873         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2874                 /* hash found, or no matching entry */
2875                 if (rule->sw_idx >= sw_idx)
2876                         break;
2877                 parent = rule;
2878         }
2879
2880         /* if there is an old rule occupying our place remove it */
2881         if (rule && (rule->sw_idx == sw_idx)) {
2882                 if (!input)
2883                         err = igb_erase_filter(adapter, rule);
2884
2885                 hlist_del(&rule->nfc_node);
2886                 kfree(rule);
2887                 adapter->nfc_filter_count--;
2888         }
2889
2890         /* If no input this was a delete, err should be 0 if a rule was
2891          * successfully found and removed from the list else -EINVAL
2892          */
2893         if (!input)
2894                 return err;
2895
2896         /* initialize node */
2897         INIT_HLIST_NODE(&input->nfc_node);
2898
2899         /* add filter to the list */
2900         if (parent)
2901                 hlist_add_behind(&input->nfc_node, &parent->nfc_node);
2902         else
2903                 hlist_add_head(&input->nfc_node, &adapter->nfc_filter_list);
2904
2905         /* update counts */
2906         adapter->nfc_filter_count++;
2907
2908         return 0;
2909 }
2910
2911 static int igb_add_ethtool_nfc_entry(struct igb_adapter *adapter,
2912                                      struct ethtool_rxnfc *cmd)
2913 {
2914         struct net_device *netdev = adapter->netdev;
2915         struct ethtool_rx_flow_spec *fsp =
2916                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2917         struct igb_nfc_filter *input, *rule;
2918         int err = 0;
2919
2920         if (!(netdev->hw_features & NETIF_F_NTUPLE))
2921                 return -EOPNOTSUPP;
2922
2923         /* Don't allow programming if the action is a queue greater than
2924          * the number of online Rx queues.
2925          */
2926         if ((fsp->ring_cookie == RX_CLS_FLOW_DISC) ||
2927             (fsp->ring_cookie >= adapter->num_rx_queues)) {
2928                 dev_err(&adapter->pdev->dev, "ethtool -N: The specified action is invalid\n");
2929                 return -EINVAL;
2930         }
2931
2932         /* Don't allow indexes to exist outside of available space */
2933         if (fsp->location >= IGB_MAX_RXNFC_FILTERS) {
2934                 dev_err(&adapter->pdev->dev, "Location out of range\n");
2935                 return -EINVAL;
2936         }
2937
2938         if ((fsp->flow_type & ~FLOW_EXT) != ETHER_FLOW)
2939                 return -EINVAL;
2940
2941         input = kzalloc(sizeof(*input), GFP_KERNEL);
2942         if (!input)
2943                 return -ENOMEM;
2944
2945         if (fsp->m_u.ether_spec.h_proto == ETHER_TYPE_FULL_MASK) {
2946                 input->filter.etype = fsp->h_u.ether_spec.h_proto;
2947                 input->filter.match_flags = IGB_FILTER_FLAG_ETHER_TYPE;
2948         }
2949
2950         /* Only support matching addresses by the full mask */
2951         if (is_broadcast_ether_addr(fsp->m_u.ether_spec.h_source)) {
2952                 input->filter.match_flags |= IGB_FILTER_FLAG_SRC_MAC_ADDR;
2953                 ether_addr_copy(input->filter.src_addr,
2954                                 fsp->h_u.ether_spec.h_source);
2955         }
2956
2957         /* Only support matching addresses by the full mask */
2958         if (is_broadcast_ether_addr(fsp->m_u.ether_spec.h_dest)) {
2959                 input->filter.match_flags |= IGB_FILTER_FLAG_DST_MAC_ADDR;
2960                 ether_addr_copy(input->filter.dst_addr,
2961                                 fsp->h_u.ether_spec.h_dest);
2962         }
2963
2964         if ((fsp->flow_type & FLOW_EXT) && fsp->m_ext.vlan_tci) {
2965                 if (fsp->m_ext.vlan_tci != htons(VLAN_PRIO_MASK)) {
2966                         err = -EINVAL;
2967                         goto err_out;
2968                 }
2969                 input->filter.vlan_tci = fsp->h_ext.vlan_tci;
2970                 input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI;
2971         }
2972
2973         input->action = fsp->ring_cookie;
2974         input->sw_idx = fsp->location;
2975
2976         spin_lock(&adapter->nfc_lock);
2977
2978         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2979                 if (!memcmp(&input->filter, &rule->filter,
2980                             sizeof(input->filter))) {
2981                         err = -EEXIST;
2982                         dev_err(&adapter->pdev->dev,
2983                                 "ethtool: this filter is already set\n");
2984                         goto err_out_w_lock;
2985                 }
2986         }
2987
2988         err = igb_add_filter(adapter, input);
2989         if (err)
2990                 goto err_out_w_lock;
2991
2992         igb_update_ethtool_nfc_entry(adapter, input, input->sw_idx);
2993
2994         spin_unlock(&adapter->nfc_lock);
2995         return 0;
2996
2997 err_out_w_lock:
2998         spin_unlock(&adapter->nfc_lock);
2999 err_out:
3000         kfree(input);
3001         return err;
3002 }
3003
3004 static int igb_del_ethtool_nfc_entry(struct igb_adapter *adapter,
3005                                      struct ethtool_rxnfc *cmd)
3006 {
3007         struct ethtool_rx_flow_spec *fsp =
3008                 (struct ethtool_rx_flow_spec *)&cmd->fs;
3009         int err;
3010
3011         spin_lock(&adapter->nfc_lock);
3012         err = igb_update_ethtool_nfc_entry(adapter, NULL, fsp->location);
3013         spin_unlock(&adapter->nfc_lock);
3014
3015         return err;
3016 }
3017
3018 static int igb_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
3019 {
3020         struct igb_adapter *adapter = netdev_priv(dev);
3021         int ret = -EOPNOTSUPP;
3022
3023         switch (cmd->cmd) {
3024         case ETHTOOL_SRXFH:
3025                 ret = igb_set_rss_hash_opt(adapter, cmd);
3026                 break;
3027         case ETHTOOL_SRXCLSRLINS:
3028                 ret = igb_add_ethtool_nfc_entry(adapter, cmd);
3029                 break;
3030         case ETHTOOL_SRXCLSRLDEL:
3031                 ret = igb_del_ethtool_nfc_entry(adapter, cmd);
3032         default:
3033                 break;
3034         }
3035
3036         return ret;
3037 }
3038
3039 static int igb_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
3040 {
3041         struct igb_adapter *adapter = netdev_priv(netdev);
3042         struct e1000_hw *hw = &adapter->hw;
3043         u32 ret_val;
3044         u16 phy_data;
3045
3046         if ((hw->mac.type < e1000_i350) ||
3047             (hw->phy.media_type != e1000_media_type_copper))
3048                 return -EOPNOTSUPP;
3049
3050         edata->supported = (SUPPORTED_1000baseT_Full |
3051                             SUPPORTED_100baseT_Full);
3052         if (!hw->dev_spec._82575.eee_disable)
3053                 edata->advertised =
3054                         mmd_eee_adv_to_ethtool_adv_t(adapter->eee_advert);
3055
3056         /* The IPCNFG and EEER registers are not supported on I354. */
3057         if (hw->mac.type == e1000_i354) {
3058                 igb_get_eee_status_i354(hw, (bool *)&edata->eee_active);
3059         } else {
3060                 u32 eeer;
3061
3062                 eeer = rd32(E1000_EEER);
3063
3064                 /* EEE status on negotiated link */
3065                 if (eeer & E1000_EEER_EEE_NEG)
3066                         edata->eee_active = true;
3067
3068                 if (eeer & E1000_EEER_TX_LPI_EN)
3069                         edata->tx_lpi_enabled = true;
3070         }
3071
3072         /* EEE Link Partner Advertised */
3073         switch (hw->mac.type) {
3074         case e1000_i350:
3075                 ret_val = igb_read_emi_reg(hw, E1000_EEE_LP_ADV_ADDR_I350,
3076                                            &phy_data);
3077                 if (ret_val)
3078                         return -ENODATA;
3079
3080                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
3081                 break;
3082         case e1000_i354:
3083         case e1000_i210:
3084         case e1000_i211:
3085                 ret_val = igb_read_xmdio_reg(hw, E1000_EEE_LP_ADV_ADDR_I210,
3086                                              E1000_EEE_LP_ADV_DEV_I210,
3087                                              &phy_data);
3088                 if (ret_val)
3089                         return -ENODATA;
3090
3091                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
3092
3093                 break;
3094         default:
3095                 break;
3096         }
3097
3098         edata->eee_enabled = !hw->dev_spec._82575.eee_disable;
3099
3100         if ((hw->mac.type == e1000_i354) &&
3101             (edata->eee_enabled))
3102                 edata->tx_lpi_enabled = true;
3103
3104         /* Report correct negotiated EEE status for devices that
3105          * wrongly report EEE at half-duplex
3106          */
3107         if (adapter->link_duplex == HALF_DUPLEX) {
3108                 edata->eee_enabled = false;
3109                 edata->eee_active = false;
3110                 edata->tx_lpi_enabled = false;
3111                 edata->advertised &= ~edata->advertised;
3112         }
3113
3114         return 0;
3115 }
3116
3117 static int igb_set_eee(struct net_device *netdev,
3118                        struct ethtool_eee *edata)
3119 {
3120         struct igb_adapter *adapter = netdev_priv(netdev);
3121         struct e1000_hw *hw = &adapter->hw;
3122         struct ethtool_eee eee_curr;
3123         bool adv1g_eee = true, adv100m_eee = true;
3124         s32 ret_val;
3125
3126         if ((hw->mac.type < e1000_i350) ||
3127             (hw->phy.media_type != e1000_media_type_copper))
3128                 return -EOPNOTSUPP;
3129
3130         memset(&eee_curr, 0, sizeof(struct ethtool_eee));
3131
3132         ret_val = igb_get_eee(netdev, &eee_curr);
3133         if (ret_val)
3134                 return ret_val;
3135
3136         if (eee_curr.eee_enabled) {
3137                 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
3138                         dev_err(&adapter->pdev->dev,
3139                                 "Setting EEE tx-lpi is not supported\n");
3140                         return -EINVAL;
3141                 }
3142
3143                 /* Tx LPI timer is not implemented currently */
3144                 if (edata->tx_lpi_timer) {
3145                         dev_err(&adapter->pdev->dev,
3146                                 "Setting EEE Tx LPI timer is not supported\n");
3147                         return -EINVAL;
3148                 }
3149
3150                 if (!edata->advertised || (edata->advertised &
3151                     ~(ADVERTISE_100_FULL | ADVERTISE_1000_FULL))) {
3152                         dev_err(&adapter->pdev->dev,
3153                                 "EEE Advertisement supports only 100Tx and/or 100T full duplex\n");
3154                         return -EINVAL;
3155                 }
3156                 adv100m_eee = !!(edata->advertised & ADVERTISE_100_FULL);
3157                 adv1g_eee = !!(edata->advertised & ADVERTISE_1000_FULL);
3158
3159         } else if (!edata->eee_enabled) {
3160                 dev_err(&adapter->pdev->dev,
3161                         "Setting EEE options are not supported with EEE disabled\n");
3162                         return -EINVAL;
3163                 }
3164
3165         adapter->eee_advert = ethtool_adv_to_mmd_eee_adv_t(edata->advertised);
3166         if (hw->dev_spec._82575.eee_disable != !edata->eee_enabled) {
3167                 hw->dev_spec._82575.eee_disable = !edata->eee_enabled;
3168                 adapter->flags |= IGB_FLAG_EEE;
3169
3170                 /* reset link */
3171                 if (netif_running(netdev))
3172                         igb_reinit_locked(adapter);
3173                 else
3174                         igb_reset(adapter);
3175         }
3176
3177         if (hw->mac.type == e1000_i354)
3178                 ret_val = igb_set_eee_i354(hw, adv1g_eee, adv100m_eee);
3179         else
3180                 ret_val = igb_set_eee_i350(hw, adv1g_eee, adv100m_eee);
3181
3182         if (ret_val) {
3183                 dev_err(&adapter->pdev->dev,
3184                         "Problem setting EEE advertisement options\n");
3185                 return -EINVAL;
3186         }
3187
3188         return 0;
3189 }
3190
3191 static int igb_get_module_info(struct net_device *netdev,
3192                                struct ethtool_modinfo *modinfo)
3193 {
3194         struct igb_adapter *adapter = netdev_priv(netdev);
3195         struct e1000_hw *hw = &adapter->hw;
3196         u32 status = 0;
3197         u16 sff8472_rev, addr_mode;
3198         bool page_swap = false;
3199
3200         if ((hw->phy.media_type == e1000_media_type_copper) ||
3201             (hw->phy.media_type == e1000_media_type_unknown))
3202                 return -EOPNOTSUPP;
3203
3204         /* Check whether we support SFF-8472 or not */
3205         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_COMP, &sff8472_rev);
3206         if (status)
3207                 return -EIO;
3208
3209         /* addressing mode is not supported */
3210         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_SWAP, &addr_mode);
3211         if (status)
3212                 return -EIO;
3213
3214         /* addressing mode is not supported */
3215         if ((addr_mode & 0xFF) & IGB_SFF_ADDRESSING_MODE) {
3216                 hw_dbg("Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
3217                 page_swap = true;
3218         }
3219
3220         if ((sff8472_rev & 0xFF) == IGB_SFF_8472_UNSUP || page_swap) {
3221                 /* We have an SFP, but it does not support SFF-8472 */
3222                 modinfo->type = ETH_MODULE_SFF_8079;
3223                 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
3224         } else {
3225                 /* We have an SFP which supports a revision of SFF-8472 */
3226                 modinfo->type = ETH_MODULE_SFF_8472;
3227                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
3228         }
3229
3230         return 0;
3231 }
3232
3233 static int igb_get_module_eeprom(struct net_device *netdev,
3234                                  struct ethtool_eeprom *ee, u8 *data)
3235 {
3236         struct igb_adapter *adapter = netdev_priv(netdev);
3237         struct e1000_hw *hw = &adapter->hw;
3238         u32 status = 0;
3239         u16 *dataword;
3240         u16 first_word, last_word;
3241         int i = 0;
3242
3243         if (ee->len == 0)
3244                 return -EINVAL;
3245
3246         first_word = ee->offset >> 1;
3247         last_word = (ee->offset + ee->len - 1) >> 1;
3248
3249         dataword = kmalloc_array(last_word - first_word + 1, sizeof(u16),
3250                                  GFP_KERNEL);
3251         if (!dataword)
3252                 return -ENOMEM;
3253
3254         /* Read EEPROM block, SFF-8079/SFF-8472, word at a time */
3255         for (i = 0; i < last_word - first_word + 1; i++) {
3256                 status = igb_read_phy_reg_i2c(hw, (first_word + i) * 2,
3257                                               &dataword[i]);
3258                 if (status) {
3259                         /* Error occurred while reading module */
3260                         kfree(dataword);
3261                         return -EIO;
3262                 }
3263
3264                 be16_to_cpus(&dataword[i]);
3265         }
3266
3267         memcpy(data, (u8 *)dataword + (ee->offset & 1), ee->len);
3268         kfree(dataword);
3269
3270         return 0;
3271 }
3272
3273 static int igb_ethtool_begin(struct net_device *netdev)
3274 {
3275         struct igb_adapter *adapter = netdev_priv(netdev);
3276         pm_runtime_get_sync(&adapter->pdev->dev);
3277         return 0;
3278 }
3279
3280 static void igb_ethtool_complete(struct net_device *netdev)
3281 {
3282         struct igb_adapter *adapter = netdev_priv(netdev);
3283         pm_runtime_put(&adapter->pdev->dev);
3284 }
3285
3286 static u32 igb_get_rxfh_indir_size(struct net_device *netdev)
3287 {
3288         return IGB_RETA_SIZE;
3289 }
3290
3291 static int igb_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
3292                         u8 *hfunc)
3293 {
3294         struct igb_adapter *adapter = netdev_priv(netdev);
3295         int i;
3296
3297         if (hfunc)
3298                 *hfunc = ETH_RSS_HASH_TOP;
3299         if (!indir)
3300                 return 0;
3301         for (i = 0; i < IGB_RETA_SIZE; i++)
3302                 indir[i] = adapter->rss_indir_tbl[i];
3303
3304         return 0;
3305 }
3306
3307 void igb_write_rss_indir_tbl(struct igb_adapter *adapter)
3308 {
3309         struct e1000_hw *hw = &adapter->hw;
3310         u32 reg = E1000_RETA(0);
3311         u32 shift = 0;
3312         int i = 0;
3313
3314         switch (hw->mac.type) {
3315         case e1000_82575:
3316                 shift = 6;
3317                 break;
3318         case e1000_82576:
3319                 /* 82576 supports 2 RSS queues for SR-IOV */
3320                 if (adapter->vfs_allocated_count)
3321                         shift = 3;
3322                 break;
3323         default:
3324                 break;
3325         }
3326
3327         while (i < IGB_RETA_SIZE) {
3328                 u32 val = 0;
3329                 int j;
3330
3331                 for (j = 3; j >= 0; j--) {
3332                         val <<= 8;
3333                         val |= adapter->rss_indir_tbl[i + j];
3334                 }
3335
3336                 wr32(reg, val << shift);
3337                 reg += 4;
3338                 i += 4;
3339         }
3340 }
3341
3342 static int igb_set_rxfh(struct net_device *netdev, const u32 *indir,
3343                         const u8 *key, const u8 hfunc)
3344 {
3345         struct igb_adapter *adapter = netdev_priv(netdev);
3346         struct e1000_hw *hw = &adapter->hw;
3347         int i;
3348         u32 num_queues;
3349
3350         /* We do not allow change in unsupported parameters */
3351         if (key ||
3352             (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP))
3353                 return -EOPNOTSUPP;
3354         if (!indir)
3355                 return 0;
3356
3357         num_queues = adapter->rss_queues;
3358
3359         switch (hw->mac.type) {
3360         case e1000_82576:
3361                 /* 82576 supports 2 RSS queues for SR-IOV */
3362                 if (adapter->vfs_allocated_count)
3363                         num_queues = 2;
3364                 break;
3365         default:
3366                 break;
3367         }
3368
3369         /* Verify user input. */
3370         for (i = 0; i < IGB_RETA_SIZE; i++)
3371                 if (indir[i] >= num_queues)
3372                         return -EINVAL;
3373
3374
3375         for (i = 0; i < IGB_RETA_SIZE; i++)
3376                 adapter->rss_indir_tbl[i] = indir[i];
3377
3378         igb_write_rss_indir_tbl(adapter);
3379
3380         return 0;
3381 }
3382
3383 static unsigned int igb_max_channels(struct igb_adapter *adapter)
3384 {
3385         return igb_get_max_rss_queues(adapter);
3386 }
3387
3388 static void igb_get_channels(struct net_device *netdev,
3389                              struct ethtool_channels *ch)
3390 {
3391         struct igb_adapter *adapter = netdev_priv(netdev);
3392
3393         /* Report maximum channels */
3394         ch->max_combined = igb_max_channels(adapter);
3395
3396         /* Report info for other vector */
3397         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
3398                 ch->max_other = NON_Q_VECTORS;
3399                 ch->other_count = NON_Q_VECTORS;
3400         }
3401
3402         ch->combined_count = adapter->rss_queues;
3403 }
3404
3405 static int igb_set_channels(struct net_device *netdev,
3406                             struct ethtool_channels *ch)
3407 {
3408         struct igb_adapter *adapter = netdev_priv(netdev);
3409         unsigned int count = ch->combined_count;
3410         unsigned int max_combined = 0;
3411
3412         /* Verify they are not requesting separate vectors */
3413         if (!count || ch->rx_count || ch->tx_count)
3414                 return -EINVAL;
3415
3416         /* Verify other_count is valid and has not been changed */
3417         if (ch->other_count != NON_Q_VECTORS)
3418                 return -EINVAL;
3419
3420         /* Verify the number of channels doesn't exceed hw limits */
3421         max_combined = igb_max_channels(adapter);
3422         if (count > max_combined)
3423                 return -EINVAL;
3424
3425         if (count != adapter->rss_queues) {
3426                 adapter->rss_queues = count;
3427                 igb_set_flag_queue_pairs(adapter, max_combined);
3428
3429                 /* Hardware has to reinitialize queues and interrupts to
3430                  * match the new configuration.
3431                  */
3432                 return igb_reinit_queues(adapter);
3433         }
3434
3435         return 0;
3436 }
3437
3438 static u32 igb_get_priv_flags(struct net_device *netdev)
3439 {
3440         struct igb_adapter *adapter = netdev_priv(netdev);
3441         u32 priv_flags = 0;
3442
3443         if (adapter->flags & IGB_FLAG_RX_LEGACY)
3444                 priv_flags |= IGB_PRIV_FLAGS_LEGACY_RX;
3445
3446         return priv_flags;
3447 }
3448
3449 static int igb_set_priv_flags(struct net_device *netdev, u32 priv_flags)
3450 {
3451         struct igb_adapter *adapter = netdev_priv(netdev);
3452         unsigned int flags = adapter->flags;
3453
3454         flags &= ~IGB_FLAG_RX_LEGACY;
3455         if (priv_flags & IGB_PRIV_FLAGS_LEGACY_RX)
3456                 flags |= IGB_FLAG_RX_LEGACY;
3457
3458         if (flags != adapter->flags) {
3459                 adapter->flags = flags;
3460
3461                 /* reset interface to repopulate queues */
3462                 if (netif_running(netdev))
3463                         igb_reinit_locked(adapter);
3464         }
3465
3466         return 0;
3467 }
3468
3469 static const struct ethtool_ops igb_ethtool_ops = {
3470         .get_drvinfo            = igb_get_drvinfo,
3471         .get_regs_len           = igb_get_regs_len,
3472         .get_regs               = igb_get_regs,
3473         .get_wol                = igb_get_wol,
3474         .set_wol                = igb_set_wol,
3475         .get_msglevel           = igb_get_msglevel,
3476         .set_msglevel           = igb_set_msglevel,
3477         .nway_reset             = igb_nway_reset,
3478         .get_link               = igb_get_link,
3479         .get_eeprom_len         = igb_get_eeprom_len,
3480         .get_eeprom             = igb_get_eeprom,
3481         .set_eeprom             = igb_set_eeprom,
3482         .get_ringparam          = igb_get_ringparam,
3483         .set_ringparam          = igb_set_ringparam,
3484         .get_pauseparam         = igb_get_pauseparam,
3485         .set_pauseparam         = igb_set_pauseparam,
3486         .self_test              = igb_diag_test,
3487         .get_strings            = igb_get_strings,
3488         .set_phys_id            = igb_set_phys_id,
3489         .get_sset_count         = igb_get_sset_count,
3490         .get_ethtool_stats      = igb_get_ethtool_stats,
3491         .get_coalesce           = igb_get_coalesce,
3492         .set_coalesce           = igb_set_coalesce,
3493         .get_ts_info            = igb_get_ts_info,
3494         .get_rxnfc              = igb_get_rxnfc,
3495         .set_rxnfc              = igb_set_rxnfc,
3496         .get_eee                = igb_get_eee,
3497         .set_eee                = igb_set_eee,
3498         .get_module_info        = igb_get_module_info,
3499         .get_module_eeprom      = igb_get_module_eeprom,
3500         .get_rxfh_indir_size    = igb_get_rxfh_indir_size,
3501         .get_rxfh               = igb_get_rxfh,
3502         .set_rxfh               = igb_set_rxfh,
3503         .get_channels           = igb_get_channels,
3504         .set_channels           = igb_set_channels,
3505         .get_priv_flags         = igb_get_priv_flags,
3506         .set_priv_flags         = igb_set_priv_flags,
3507         .begin                  = igb_ethtool_begin,
3508         .complete               = igb_ethtool_complete,
3509         .get_link_ksettings     = igb_get_link_ksettings,
3510         .set_link_ksettings     = igb_set_link_ksettings,
3511 };
3512
3513 void igb_set_ethtool_ops(struct net_device *netdev)
3514 {
3515         netdev->ethtool_ops = &igb_ethtool_ops;
3516 }