drivers/net/ethernet/intel/igb/igb_ethtool.c

   1 /* Intel(R) Gigabit Ethernet Linux driver
   2  * Copyright(c) 2007-2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program; if not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * The full GNU General Public License is included in this distribution in
  17  * the file called "COPYING".
  18  *
  19  * Contact Information:
  20  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  21  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  22  */
  23
  24 /* ethtool support for igb */
  25
  26 #include <linux/vmalloc.h>
  27 #include <linux/netdevice.h>
  28 #include <linux/pci.h>
  29 #include <linux/delay.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/if_ether.h>
  32 #include <linux/ethtool.h>
  33 #include <linux/sched.h>
  34 #include <linux/slab.h>
  35 #include <linux/pm_runtime.h>
  36 #include <linux/highmem.h>
  37 #include <linux/mdio.h>
  38
  39 #include "igb.h"
  40
  41 struct igb_stats {
  42         char stat_string[ETH_GSTRING_LEN];
  43         int sizeof_stat;
  44         int stat_offset;
  45 };
  46
  47 #define IGB_STAT(_name, _stat) { \
  48         .stat_string = _name, \
  49         .sizeof_stat = FIELD_SIZEOF(struct igb_adapter, _stat), \
  50         .stat_offset = offsetof(struct igb_adapter, _stat) \
  51 }
  52 static const struct igb_stats igb_gstrings_stats[] = {
  53         IGB_STAT("rx_packets", stats.gprc),
  54         IGB_STAT("tx_packets", stats.gptc),
  55         IGB_STAT("rx_bytes", stats.gorc),
  56         IGB_STAT("tx_bytes", stats.gotc),
  57         IGB_STAT("rx_broadcast", stats.bprc),
  58         IGB_STAT("tx_broadcast", stats.bptc),
  59         IGB_STAT("rx_multicast", stats.mprc),
  60         IGB_STAT("tx_multicast", stats.mptc),
  61         IGB_STAT("multicast", stats.mprc),
  62         IGB_STAT("collisions", stats.colc),
  63         IGB_STAT("rx_crc_errors", stats.crcerrs),
  64         IGB_STAT("rx_no_buffer_count", stats.rnbc),
  65         IGB_STAT("rx_missed_errors", stats.mpc),
  66         IGB_STAT("tx_aborted_errors", stats.ecol),
  67         IGB_STAT("tx_carrier_errors", stats.tncrs),
  68         IGB_STAT("tx_window_errors", stats.latecol),
  69         IGB_STAT("tx_abort_late_coll", stats.latecol),
  70         IGB_STAT("tx_deferred_ok", stats.dc),
  71         IGB_STAT("tx_single_coll_ok", stats.scc),
  72         IGB_STAT("tx_multi_coll_ok", stats.mcc),
  73         IGB_STAT("tx_timeout_count", tx_timeout_count),
  74         IGB_STAT("rx_long_length_errors", stats.roc),
  75         IGB_STAT("rx_short_length_errors", stats.ruc),
  76         IGB_STAT("rx_align_errors", stats.algnerrc),
  77         IGB_STAT("tx_tcp_seg_good", stats.tsctc),
  78         IGB_STAT("tx_tcp_seg_failed", stats.tsctfc),
  79         IGB_STAT("rx_flow_control_xon", stats.xonrxc),
  80         IGB_STAT("rx_flow_control_xoff", stats.xoffrxc),
  81         IGB_STAT("tx_flow_control_xon", stats.xontxc),
  82         IGB_STAT("tx_flow_control_xoff", stats.xofftxc),
  83         IGB_STAT("rx_long_byte_count", stats.gorc),
  84         IGB_STAT("tx_dma_out_of_sync", stats.doosync),
  85         IGB_STAT("tx_smbus", stats.mgptc),
  86         IGB_STAT("rx_smbus", stats.mgprc),
  87         IGB_STAT("dropped_smbus", stats.mgpdc),
  88         IGB_STAT("os2bmc_rx_by_bmc", stats.o2bgptc),
  89         IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
  90         IGB_STAT("os2bmc_tx_by_host", stats.o2bspc),
  91         IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc),
  92         IGB_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
  93         IGB_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
  94 };
  95
  96 #define IGB_NETDEV_STAT(_net_stat) { \
  97         .stat_string = __stringify(_net_stat), \
  98         .sizeof_stat = FIELD_SIZEOF(struct rtnl_link_stats64, _net_stat), \
  99         .stat_offset = offsetof(struct rtnl_link_stats64, _net_stat) \
 100 }
 101 static const struct igb_stats igb_gstrings_net_stats[] = {
 102         IGB_NETDEV_STAT(rx_errors),
 103         IGB_NETDEV_STAT(tx_errors),
 104         IGB_NETDEV_STAT(tx_dropped),
 105         IGB_NETDEV_STAT(rx_length_errors),
 106         IGB_NETDEV_STAT(rx_over_errors),
 107         IGB_NETDEV_STAT(rx_frame_errors),
 108         IGB_NETDEV_STAT(rx_fifo_errors),
 109         IGB_NETDEV_STAT(tx_fifo_errors),
 110         IGB_NETDEV_STAT(tx_heartbeat_errors)
 111 };
 112
 113 #define IGB_GLOBAL_STATS_LEN    \
 114         (sizeof(igb_gstrings_stats) / sizeof(struct igb_stats))
 115 #define IGB_NETDEV_STATS_LEN    \
 116         (sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats))
 117 #define IGB_RX_QUEUE_STATS_LEN \
 118         (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
 119
 120 #define IGB_TX_QUEUE_STATS_LEN 3 /* packets, bytes, restart_queue */
 121
 122 #define IGB_QUEUE_STATS_LEN \
 123         ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
 124           IGB_RX_QUEUE_STATS_LEN) + \
 125          (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
 126           IGB_TX_QUEUE_STATS_LEN))
 127 #define IGB_STATS_LEN \
 128         (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
 129
 130 enum igb_diagnostics_results {
 131         TEST_REG = 0,
 132         TEST_EEP,
 133         TEST_IRQ,
 134         TEST_LOOP,
 135         TEST_LINK
 136 };
 137
 138 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
 139         [TEST_REG]  = "Register test  (offline)",
 140         [TEST_EEP]  = "Eeprom test    (offline)",
 141         [TEST_IRQ]  = "Interrupt test (offline)",
 142         [TEST_LOOP] = "Loopback test  (offline)",
 143         [TEST_LINK] = "Link test   (on/offline)"
 144 };
 145 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
 146
 147 static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 148 {
 149         struct igb_adapter *adapter = netdev_priv(netdev);
 150         struct e1000_hw *hw = &adapter->hw;
 151         struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;
 152         struct e1000_sfp_flags *eth_flags = &dev_spec->eth_flags;
 153         u32 status;
 154         u32 speed;
 155
 156         status = pm_runtime_suspended(&adapter->pdev->dev) ?
 157                  0 : rd32(E1000_STATUS);
 158         if (hw->phy.media_type == e1000_media_type_copper) {
 159
 160                 ecmd->supported = (SUPPORTED_10baseT_Half |
 161                                    SUPPORTED_10baseT_Full |
 162                                    SUPPORTED_100baseT_Half |
 163                                    SUPPORTED_100baseT_Full |
 164                                    SUPPORTED_1000baseT_Full|
 165                                    SUPPORTED_Autoneg |
 166                                    SUPPORTED_TP |
 167                                    SUPPORTED_Pause);
 168                 ecmd->advertising = ADVERTISED_TP;
 169
 170                 if (hw->mac.autoneg == 1) {
 171                         ecmd->advertising |= ADVERTISED_Autoneg;
 172                         /* the e1000 autoneg seems to match ethtool nicely */
 173                         ecmd->advertising |= hw->phy.autoneg_advertised;
 174                 }
 175
 176                 ecmd->port = PORT_TP;
 177                 ecmd->phy_address = hw->phy.addr;
 178                 ecmd->transceiver = XCVR_INTERNAL;
 179         } else {
 180                 ecmd->supported = (SUPPORTED_FIBRE |
 181                                    SUPPORTED_1000baseKX_Full |
 182                                    SUPPORTED_Autoneg |
 183                                    SUPPORTED_Pause);
 184                 ecmd->advertising = (ADVERTISED_FIBRE |
 185                                      ADVERTISED_1000baseKX_Full);
 186                 if (hw->mac.type == e1000_i354) {
 187                         if ((hw->device_id ==
 188                              E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) &&
 189                             !(status & E1000_STATUS_2P5_SKU_OVER)) {
 190                                 ecmd->supported |= SUPPORTED_2500baseX_Full;
 191                                 ecmd->supported &=
 192                                         ~SUPPORTED_1000baseKX_Full;
 193                                 ecmd->advertising |= ADVERTISED_2500baseX_Full;
 194                                 ecmd->advertising &=
 195                                         ~ADVERTISED_1000baseKX_Full;
 196                         }
 197                 }
 198                 if (eth_flags->e100_base_fx) {
 199                         ecmd->supported |= SUPPORTED_100baseT_Full;
 200                         ecmd->advertising |= ADVERTISED_100baseT_Full;
 201                 }
 202                 if (hw->mac.autoneg == 1)
 203                         ecmd->advertising |= ADVERTISED_Autoneg;
 204
 205                 ecmd->port = PORT_FIBRE;
 206                 ecmd->transceiver = XCVR_EXTERNAL;
 207         }
 208         if (hw->mac.autoneg != 1)
 209                 ecmd->advertising &= ~(ADVERTISED_Pause |
 210                                        ADVERTISED_Asym_Pause);
 211
 212         switch (hw->fc.requested_mode) {
 213         case e1000_fc_full:
 214                 ecmd->advertising |= ADVERTISED_Pause;
 215                 break;
 216         case e1000_fc_rx_pause:
 217                 ecmd->advertising |= (ADVERTISED_Pause |
 218                                       ADVERTISED_Asym_Pause);
 219                 break;
 220         case e1000_fc_tx_pause:
 221                 ecmd->advertising |=  ADVERTISED_Asym_Pause;
 222                 break;
 223         default:
 224                 ecmd->advertising &= ~(ADVERTISED_Pause |
 225                                        ADVERTISED_Asym_Pause);
 226         }
 227         if (status & E1000_STATUS_LU) {
 228                 if ((status & E1000_STATUS_2P5_SKU) &&
 229                     !(status & E1000_STATUS_2P5_SKU_OVER)) {
 230                         speed = SPEED_2500;
 231                 } else if (status & E1000_STATUS_SPEED_1000) {
 232                         speed = SPEED_1000;
 233                 } else if (status & E1000_STATUS_SPEED_100) {
 234                         speed = SPEED_100;
 235                 } else {
 236                         speed = SPEED_10;
 237                 }
 238                 if ((status & E1000_STATUS_FD) ||
 239                     hw->phy.media_type != e1000_media_type_copper)
 240                         ecmd->duplex = DUPLEX_FULL;
 241                 else
 242                         ecmd->duplex = DUPLEX_HALF;
 243         } else {
 244                 speed = SPEED_UNKNOWN;
 245                 ecmd->duplex = DUPLEX_UNKNOWN;
 246         }
 247         ethtool_cmd_speed_set(ecmd, speed);
 248         if ((hw->phy.media_type == e1000_media_type_fiber) ||
 249             hw->mac.autoneg)
 250                 ecmd->autoneg = AUTONEG_ENABLE;
 251         else
 252                 ecmd->autoneg = AUTONEG_DISABLE;
 253
 254         /* MDI-X => 2; MDI =>1; Invalid =>0 */
 255         if (hw->phy.media_type == e1000_media_type_copper)
 256                 ecmd->eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X :
 257                                                       ETH_TP_MDI;
 258         else
 259                 ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
 260
 261         if (hw->phy.mdix == AUTO_ALL_MODES)
 262                 ecmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
 263         else
 264                 ecmd->eth_tp_mdix_ctrl = hw->phy.mdix;
 265
 266         return 0;
 267 }
 268
 269 static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 270 {
 271         struct igb_adapter *adapter = netdev_priv(netdev);
 272         struct e1000_hw *hw = &adapter->hw;
 273
 274         /* When SoL/IDER sessions are active, autoneg/speed/duplex
 275          * cannot be changed
 276          */
 277         if (igb_check_reset_block(hw)) {
 278                 dev_err(&adapter->pdev->dev,
 279                         "Cannot change link characteristics when SoL/IDER is active.\n");
 280                 return -EINVAL;
 281         }
 282
 283         /* MDI setting is only allowed when autoneg enabled because
 284          * some hardware doesn't allow MDI setting when speed or
 285          * duplex is forced.
 286          */
 287         if (ecmd->eth_tp_mdix_ctrl) {
 288                 if (hw->phy.media_type != e1000_media_type_copper)
 289                         return -EOPNOTSUPP;
 290
 291                 if ((ecmd->eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
 292                     (ecmd->autoneg != AUTONEG_ENABLE)) {
 293                         dev_err(&adapter->pdev->dev, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
 294                         return -EINVAL;
 295                 }
 296         }
 297
 298         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 299                 usleep_range(1000, 2000);
 300
 301         if (ecmd->autoneg == AUTONEG_ENABLE) {
 302                 hw->mac.autoneg = 1;
 303                 if (hw->phy.media_type == e1000_media_type_fiber) {
 304                         hw->phy.autoneg_advertised = ecmd->advertising |
 305                                                      ADVERTISED_FIBRE |
 306                                                      ADVERTISED_Autoneg;
 307                         switch (adapter->link_speed) {
 308                         case SPEED_2500:
 309                                 hw->phy.autoneg_advertised =
 310                                         ADVERTISED_2500baseX_Full;
 311                                 break;
 312                         case SPEED_1000:
 313                                 hw->phy.autoneg_advertised =
 314                                         ADVERTISED_1000baseT_Full;
 315                                 break;
 316                         case SPEED_100:
 317                                 hw->phy.autoneg_advertised =
 318                                         ADVERTISED_100baseT_Full;
 319                                 break;
 320                         default:
 321                                 break;
 322                         }
 323                 } else {
 324                         hw->phy.autoneg_advertised = ecmd->advertising |
 325                                                      ADVERTISED_TP |
 326                                                      ADVERTISED_Autoneg;
 327                 }
 328                 ecmd->advertising = hw->phy.autoneg_advertised;
 329                 if (adapter->fc_autoneg)
 330                         hw->fc.requested_mode = e1000_fc_default;
 331         } else {
 332                 u32 speed = ethtool_cmd_speed(ecmd);
 333                 /* calling this overrides forced MDI setting */
 334                 if (igb_set_spd_dplx(adapter, speed, ecmd->duplex)) {
 335                         clear_bit(__IGB_RESETTING, &adapter->state);
 336                         return -EINVAL;
 337                 }
 338         }
 339
 340         /* MDI-X => 2; MDI => 1; Auto => 3 */
 341         if (ecmd->eth_tp_mdix_ctrl) {
 342                 /* fix up the value for auto (3 => 0) as zero is mapped
 343                  * internally to auto
 344                  */
 345                 if (ecmd->eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
 346                         hw->phy.mdix = AUTO_ALL_MODES;
 347                 else
 348                         hw->phy.mdix = ecmd->eth_tp_mdix_ctrl;
 349         }
 350
 351         /* reset the link */
 352         if (netif_running(adapter->netdev)) {
 353                 igb_down(adapter);
 354                 igb_up(adapter);
 355         } else
 356                 igb_reset(adapter);
 357
 358         clear_bit(__IGB_RESETTING, &adapter->state);
 359         return 0;
 360 }
 361
 362 static u32 igb_get_link(struct net_device *netdev)
 363 {
 364         struct igb_adapter *adapter = netdev_priv(netdev);
 365         struct e1000_mac_info *mac = &adapter->hw.mac;
 366
 367         /* If the link is not reported up to netdev, interrupts are disabled,
 368          * and so the physical link state may have changed since we last
 369          * looked. Set get_link_status to make sure that the true link
 370          * state is interrogated, rather than pulling a cached and possibly
 371          * stale link state from the driver.
 372          */
 373         if (!netif_carrier_ok(netdev))
 374                 mac->get_link_status = 1;
 375
 376         return igb_has_link(adapter);
 377 }
 378
 379 static void igb_get_pauseparam(struct net_device *netdev,
 380                                struct ethtool_pauseparam *pause)
 381 {
 382         struct igb_adapter *adapter = netdev_priv(netdev);
 383         struct e1000_hw *hw = &adapter->hw;
 384
 385         pause->autoneg =
 386                 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
 387
 388         if (hw->fc.current_mode == e1000_fc_rx_pause)
 389                 pause->rx_pause = 1;
 390         else if (hw->fc.current_mode == e1000_fc_tx_pause)
 391                 pause->tx_pause = 1;
 392         else if (hw->fc.current_mode == e1000_fc_full) {
 393                 pause->rx_pause = 1;
 394                 pause->tx_pause = 1;
 395         }
 396 }
 397
 398 static int igb_set_pauseparam(struct net_device *netdev,
 399                               struct ethtool_pauseparam *pause)
 400 {
 401         struct igb_adapter *adapter = netdev_priv(netdev);
 402         struct e1000_hw *hw = &adapter->hw;
 403         int retval = 0;
 404
 405         /* 100basefx does not support setting link flow control */
 406         if (hw->dev_spec._82575.eth_flags.e100_base_fx)
 407                 return -EINVAL;
 408
 409         adapter->fc_autoneg = pause->autoneg;
 410
 411         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 412                 usleep_range(1000, 2000);
 413
 414         if (adapter->fc_autoneg == AUTONEG_ENABLE) {
 415                 hw->fc.requested_mode = e1000_fc_default;
 416                 if (netif_running(adapter->netdev)) {
 417                         igb_down(adapter);
 418                         igb_up(adapter);
 419                 } else {
 420                         igb_reset(adapter);
 421                 }
 422         } else {
 423                 if (pause->rx_pause && pause->tx_pause)
 424                         hw->fc.requested_mode = e1000_fc_full;
 425                 else if (pause->rx_pause && !pause->tx_pause)
 426                         hw->fc.requested_mode = e1000_fc_rx_pause;
 427                 else if (!pause->rx_pause && pause->tx_pause)
 428                         hw->fc.requested_mode = e1000_fc_tx_pause;
 429                 else if (!pause->rx_pause && !pause->tx_pause)
 430                         hw->fc.requested_mode = e1000_fc_none;
 431
 432                 hw->fc.current_mode = hw->fc.requested_mode;
 433
 434                 retval = ((hw->phy.media_type == e1000_media_type_copper) ?
 435                           igb_force_mac_fc(hw) : igb_setup_link(hw));
 436         }
 437
 438         clear_bit(__IGB_RESETTING, &adapter->state);
 439         return retval;
 440 }
 441
 442 static u32 igb_get_msglevel(struct net_device *netdev)
 443 {
 444         struct igb_adapter *adapter = netdev_priv(netdev);
 445         return adapter->msg_enable;
 446 }
 447
 448 static void igb_set_msglevel(struct net_device *netdev, u32 data)
 449 {
 450         struct igb_adapter *adapter = netdev_priv(netdev);
 451         adapter->msg_enable = data;
 452 }
 453
 454 static int igb_get_regs_len(struct net_device *netdev)
 455 {
 456 #define IGB_REGS_LEN 739
 457         return IGB_REGS_LEN * sizeof(u32);
 458 }
 459
 460 static void igb_get_regs(struct net_device *netdev,
 461                          struct ethtool_regs *regs, void *p)
 462 {
 463         struct igb_adapter *adapter = netdev_priv(netdev);
 464         struct e1000_hw *hw = &adapter->hw;
 465         u32 *regs_buff = p;
 466         u8 i;
 467
 468         memset(p, 0, IGB_REGS_LEN * sizeof(u32));
 469
 470         regs->version = (1u << 24) | (hw->revision_id << 16) | hw->device_id;
 471
 472         /* General Registers */
 473         regs_buff[0] = rd32(E1000_CTRL);
 474         regs_buff[1] = rd32(E1000_STATUS);
 475         regs_buff[2] = rd32(E1000_CTRL_EXT);
 476         regs_buff[3] = rd32(E1000_MDIC);
 477         regs_buff[4] = rd32(E1000_SCTL);
 478         regs_buff[5] = rd32(E1000_CONNSW);
 479         regs_buff[6] = rd32(E1000_VET);
 480         regs_buff[7] = rd32(E1000_LEDCTL);
 481         regs_buff[8] = rd32(E1000_PBA);
 482         regs_buff[9] = rd32(E1000_PBS);
 483         regs_buff[10] = rd32(E1000_FRTIMER);
 484         regs_buff[11] = rd32(E1000_TCPTIMER);
 485
 486         /* NVM Register */
 487         regs_buff[12] = rd32(E1000_EECD);
 488
 489         /* Interrupt */
 490         /* Reading EICS for EICR because they read the
 491          * same but EICS does not clear on read
 492          */
 493         regs_buff[13] = rd32(E1000_EICS);
 494         regs_buff[14] = rd32(E1000_EICS);
 495         regs_buff[15] = rd32(E1000_EIMS);
 496         regs_buff[16] = rd32(E1000_EIMC);
 497         regs_buff[17] = rd32(E1000_EIAC);
 498         regs_buff[18] = rd32(E1000_EIAM);
 499         /* Reading ICS for ICR because they read the
 500          * same but ICS does not clear on read
 501          */
 502         regs_buff[19] = rd32(E1000_ICS);
 503         regs_buff[20] = rd32(E1000_ICS);
 504         regs_buff[21] = rd32(E1000_IMS);
 505         regs_buff[22] = rd32(E1000_IMC);
 506         regs_buff[23] = rd32(E1000_IAC);
 507         regs_buff[24] = rd32(E1000_IAM);
 508         regs_buff[25] = rd32(E1000_IMIRVP);
 509
 510         /* Flow Control */
 511         regs_buff[26] = rd32(E1000_FCAL);
 512         regs_buff[27] = rd32(E1000_FCAH);
 513         regs_buff[28] = rd32(E1000_FCTTV);
 514         regs_buff[29] = rd32(E1000_FCRTL);
 515         regs_buff[30] = rd32(E1000_FCRTH);
 516         regs_buff[31] = rd32(E1000_FCRTV);
 517
 518         /* Receive */
 519         regs_buff[32] = rd32(E1000_RCTL);
 520         regs_buff[33] = rd32(E1000_RXCSUM);
 521         regs_buff[34] = rd32(E1000_RLPML);
 522         regs_buff[35] = rd32(E1000_RFCTL);
 523         regs_buff[36] = rd32(E1000_MRQC);
 524         regs_buff[37] = rd32(E1000_VT_CTL);
 525
 526         /* Transmit */
 527         regs_buff[38] = rd32(E1000_TCTL);
 528         regs_buff[39] = rd32(E1000_TCTL_EXT);
 529         regs_buff[40] = rd32(E1000_TIPG);
 530         regs_buff[41] = rd32(E1000_DTXCTL);
 531
 532         /* Wake Up */
 533         regs_buff[42] = rd32(E1000_WUC);
 534         regs_buff[43] = rd32(E1000_WUFC);
 535         regs_buff[44] = rd32(E1000_WUS);
 536         regs_buff[45] = rd32(E1000_IPAV);
 537         regs_buff[46] = rd32(E1000_WUPL);
 538
 539         /* MAC */
 540         regs_buff[47] = rd32(E1000_PCS_CFG0);
 541         regs_buff[48] = rd32(E1000_PCS_LCTL);
 542         regs_buff[49] = rd32(E1000_PCS_LSTAT);
 543         regs_buff[50] = rd32(E1000_PCS_ANADV);
 544         regs_buff[51] = rd32(E1000_PCS_LPAB);
 545         regs_buff[52] = rd32(E1000_PCS_NPTX);
 546         regs_buff[53] = rd32(E1000_PCS_LPABNP);
 547
 548         /* Statistics */
 549         regs_buff[54] = adapter->stats.crcerrs;
 550         regs_buff[55] = adapter->stats.algnerrc;
 551         regs_buff[56] = adapter->stats.symerrs;
 552         regs_buff[57] = adapter->stats.rxerrc;
 553         regs_buff[58] = adapter->stats.mpc;
 554         regs_buff[59] = adapter->stats.scc;
 555         regs_buff[60] = adapter->stats.ecol;
 556         regs_buff[61] = adapter->stats.mcc;
 557         regs_buff[62] = adapter->stats.latecol;
 558         regs_buff[63] = adapter->stats.colc;
 559         regs_buff[64] = adapter->stats.dc;
 560         regs_buff[65] = adapter->stats.tncrs;
 561         regs_buff[66] = adapter->stats.sec;
 562         regs_buff[67] = adapter->stats.htdpmc;
 563         regs_buff[68] = adapter->stats.rlec;
 564         regs_buff[69] = adapter->stats.xonrxc;
 565         regs_buff[70] = adapter->stats.xontxc;
 566         regs_buff[71] = adapter->stats.xoffrxc;
 567         regs_buff[72] = adapter->stats.xofftxc;
 568         regs_buff[73] = adapter->stats.fcruc;
 569         regs_buff[74] = adapter->stats.prc64;
 570         regs_buff[75] = adapter->stats.prc127;
 571         regs_buff[76] = adapter->stats.prc255;
 572         regs_buff[77] = adapter->stats.prc511;
 573         regs_buff[78] = adapter->stats.prc1023;
 574         regs_buff[79] = adapter->stats.prc1522;
 575         regs_buff[80] = adapter->stats.gprc;
 576         regs_buff[81] = adapter->stats.bprc;
 577         regs_buff[82] = adapter->stats.mprc;
 578         regs_buff[83] = adapter->stats.gptc;
 579         regs_buff[84] = adapter->stats.gorc;
 580         regs_buff[86] = adapter->stats.gotc;
 581         regs_buff[88] = adapter->stats.rnbc;
 582         regs_buff[89] = adapter->stats.ruc;
 583         regs_buff[90] = adapter->stats.rfc;
 584         regs_buff[91] = adapter->stats.roc;
 585         regs_buff[92] = adapter->stats.rjc;
 586         regs_buff[93] = adapter->stats.mgprc;
 587         regs_buff[94] = adapter->stats.mgpdc;
 588         regs_buff[95] = adapter->stats.mgptc;
 589         regs_buff[96] = adapter->stats.tor;
 590         regs_buff[98] = adapter->stats.tot;
 591         regs_buff[100] = adapter->stats.tpr;
 592         regs_buff[101] = adapter->stats.tpt;
 593         regs_buff[102] = adapter->stats.ptc64;
 594         regs_buff[103] = adapter->stats.ptc127;
 595         regs_buff[104] = adapter->stats.ptc255;
 596         regs_buff[105] = adapter->stats.ptc511;
 597         regs_buff[106] = adapter->stats.ptc1023;
 598         regs_buff[107] = adapter->stats.ptc1522;
 599         regs_buff[108] = adapter->stats.mptc;
 600         regs_buff[109] = adapter->stats.bptc;
 601         regs_buff[110] = adapter->stats.tsctc;
 602         regs_buff[111] = adapter->stats.iac;
 603         regs_buff[112] = adapter->stats.rpthc;
 604         regs_buff[113] = adapter->stats.hgptc;
 605         regs_buff[114] = adapter->stats.hgorc;
 606         regs_buff[116] = adapter->stats.hgotc;
 607         regs_buff[118] = adapter->stats.lenerrs;
 608         regs_buff[119] = adapter->stats.scvpc;
 609         regs_buff[120] = adapter->stats.hrmpc;
 610
 611         for (i = 0; i < 4; i++)
 612                 regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
 613         for (i = 0; i < 4; i++)
 614                 regs_buff[125 + i] = rd32(E1000_PSRTYPE(i));
 615         for (i = 0; i < 4; i++)
 616                 regs_buff[129 + i] = rd32(E1000_RDBAL(i));
 617         for (i = 0; i < 4; i++)
 618                 regs_buff[133 + i] = rd32(E1000_RDBAH(i));
 619         for (i = 0; i < 4; i++)
 620                 regs_buff[137 + i] = rd32(E1000_RDLEN(i));
 621         for (i = 0; i < 4; i++)
 622                 regs_buff[141 + i] = rd32(E1000_RDH(i));
 623         for (i = 0; i < 4; i++)
 624                 regs_buff[145 + i] = rd32(E1000_RDT(i));
 625         for (i = 0; i < 4; i++)
 626                 regs_buff[149 + i] = rd32(E1000_RXDCTL(i));
 627
 628         for (i = 0; i < 10; i++)
 629                 regs_buff[153 + i] = rd32(E1000_EITR(i));
 630         for (i = 0; i < 8; i++)
 631                 regs_buff[163 + i] = rd32(E1000_IMIR(i));
 632         for (i = 0; i < 8; i++)
 633                 regs_buff[171 + i] = rd32(E1000_IMIREXT(i));
 634         for (i = 0; i < 16; i++)
 635                 regs_buff[179 + i] = rd32(E1000_RAL(i));
 636         for (i = 0; i < 16; i++)
 637                 regs_buff[195 + i] = rd32(E1000_RAH(i));
 638
 639         for (i = 0; i < 4; i++)
 640                 regs_buff[211 + i] = rd32(E1000_TDBAL(i));
 641         for (i = 0; i < 4; i++)
 642                 regs_buff[215 + i] = rd32(E1000_TDBAH(i));
 643         for (i = 0; i < 4; i++)
 644                 regs_buff[219 + i] = rd32(E1000_TDLEN(i));
 645         for (i = 0; i < 4; i++)
 646                 regs_buff[223 + i] = rd32(E1000_TDH(i));
 647         for (i = 0; i < 4; i++)
 648                 regs_buff[227 + i] = rd32(E1000_TDT(i));
 649         for (i = 0; i < 4; i++)
 650                 regs_buff[231 + i] = rd32(E1000_TXDCTL(i));
 651         for (i = 0; i < 4; i++)
 652                 regs_buff[235 + i] = rd32(E1000_TDWBAL(i));
 653         for (i = 0; i < 4; i++)
 654                 regs_buff[239 + i] = rd32(E1000_TDWBAH(i));
 655         for (i = 0; i < 4; i++)
 656                 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i));
 657
 658         for (i = 0; i < 4; i++)
 659                 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i));
 660         for (i = 0; i < 4; i++)
 661                 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i));
 662         for (i = 0; i < 32; i++)
 663                 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i));
 664         for (i = 0; i < 128; i++)
 665                 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i));
 666         for (i = 0; i < 128; i++)
 667                 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i));
 668         for (i = 0; i < 4; i++)
 669                 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i));
 670
 671         regs_buff[547] = rd32(E1000_TDFH);
 672         regs_buff[548] = rd32(E1000_TDFT);
 673         regs_buff[549] = rd32(E1000_TDFHS);
 674         regs_buff[550] = rd32(E1000_TDFPC);
 675
 676         if (hw->mac.type > e1000_82580) {
 677                 regs_buff[551] = adapter->stats.o2bgptc;
 678                 regs_buff[552] = adapter->stats.b2ospc;
 679                 regs_buff[553] = adapter->stats.o2bspc;
 680                 regs_buff[554] = adapter->stats.b2ogprc;
 681         }
 682
 683         if (hw->mac.type != e1000_82576)
 684                 return;
 685         for (i = 0; i < 12; i++)
 686                 regs_buff[555 + i] = rd32(E1000_SRRCTL(i + 4));
 687         for (i = 0; i < 4; i++)
 688                 regs_buff[567 + i] = rd32(E1000_PSRTYPE(i + 4));
 689         for (i = 0; i < 12; i++)
 690                 regs_buff[571 + i] = rd32(E1000_RDBAL(i + 4));
 691         for (i = 0; i < 12; i++)
 692                 regs_buff[583 + i] = rd32(E1000_RDBAH(i + 4));
 693         for (i = 0; i < 12; i++)
 694                 regs_buff[595 + i] = rd32(E1000_RDLEN(i + 4));
 695         for (i = 0; i < 12; i++)
 696                 regs_buff[607 + i] = rd32(E1000_RDH(i + 4));
 697         for (i = 0; i < 12; i++)
 698                 regs_buff[619 + i] = rd32(E1000_RDT(i + 4));
 699         for (i = 0; i < 12; i++)
 700                 regs_buff[631 + i] = rd32(E1000_RXDCTL(i + 4));
 701
 702         for (i = 0; i < 12; i++)
 703                 regs_buff[643 + i] = rd32(E1000_TDBAL(i + 4));
 704         for (i = 0; i < 12; i++)
 705                 regs_buff[655 + i] = rd32(E1000_TDBAH(i + 4));
 706         for (i = 0; i < 12; i++)
 707                 regs_buff[667 + i] = rd32(E1000_TDLEN(i + 4));
 708         for (i = 0; i < 12; i++)
 709                 regs_buff[679 + i] = rd32(E1000_TDH(i + 4));
 710         for (i = 0; i < 12; i++)
 711                 regs_buff[691 + i] = rd32(E1000_TDT(i + 4));
 712         for (i = 0; i < 12; i++)
 713                 regs_buff[703 + i] = rd32(E1000_TXDCTL(i + 4));
 714         for (i = 0; i < 12; i++)
 715                 regs_buff[715 + i] = rd32(E1000_TDWBAL(i + 4));
 716         for (i = 0; i < 12; i++)
 717                 regs_buff[727 + i] = rd32(E1000_TDWBAH(i + 4));
 718 }
 719
 720 static int igb_get_eeprom_len(struct net_device *netdev)
 721 {
 722         struct igb_adapter *adapter = netdev_priv(netdev);
 723         return adapter->hw.nvm.word_size * 2;
 724 }
 725
 726 static int igb_get_eeprom(struct net_device *netdev,
 727                           struct ethtool_eeprom *eeprom, u8 *bytes)
 728 {
 729         struct igb_adapter *adapter = netdev_priv(netdev);
 730         struct e1000_hw *hw = &adapter->hw;
 731         u16 *eeprom_buff;
 732         int first_word, last_word;
 733         int ret_val = 0;
 734         u16 i;
 735
 736         if (eeprom->len == 0)
 737                 return -EINVAL;
 738
 739         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 740
 741         first_word = eeprom->offset >> 1;
 742         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 743
 744         eeprom_buff = kmalloc(sizeof(u16) *
 745                         (last_word - first_word + 1), GFP_KERNEL);
 746         if (!eeprom_buff)
 747                 return -ENOMEM;
 748
 749         if (hw->nvm.type == e1000_nvm_eeprom_spi)
 750                 ret_val = hw->nvm.ops.read(hw, first_word,
 751                                            last_word - first_word + 1,
 752                                            eeprom_buff);
 753         else {
 754                 for (i = 0; i < last_word - first_word + 1; i++) {
 755                         ret_val = hw->nvm.ops.read(hw, first_word + i, 1,
 756                                                    &eeprom_buff[i]);
 757                         if (ret_val)
 758                                 break;
 759                 }
 760         }
 761
 762         /* Device's eeprom is always little-endian, word addressable */
 763         for (i = 0; i < last_word - first_word + 1; i++)
 764                 le16_to_cpus(&eeprom_buff[i]);
 765
 766         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
 767                         eeprom->len);
 768         kfree(eeprom_buff);
 769
 770         return ret_val;
 771 }
 772
 773 static int igb_set_eeprom(struct net_device *netdev,
 774                           struct ethtool_eeprom *eeprom, u8 *bytes)
 775 {
 776         struct igb_adapter *adapter = netdev_priv(netdev);
 777         struct e1000_hw *hw = &adapter->hw;
 778         u16 *eeprom_buff;
 779         void *ptr;
 780         int max_len, first_word, last_word, ret_val = 0;
 781         u16 i;
 782
 783         if (eeprom->len == 0)
 784                 return -EOPNOTSUPP;
 785
 786         if ((hw->mac.type >= e1000_i210) &&
 787             !igb_get_flash_presence_i210(hw)) {
 788                 return -EOPNOTSUPP;
 789         }
 790
 791         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 792                 return -EFAULT;
 793
 794         max_len = hw->nvm.word_size * 2;
 795
 796         first_word = eeprom->offset >> 1;
 797         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 798         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 799         if (!eeprom_buff)
 800                 return -ENOMEM;
 801
 802         ptr = (void *)eeprom_buff;
 803
 804         if (eeprom->offset & 1) {
 805                 /* need read/modify/write of first changed EEPROM word
 806                  * only the second byte of the word is being modified
 807                  */
 808                 ret_val = hw->nvm.ops.read(hw, first_word, 1,
 809                                             &eeprom_buff[0]);
 810                 ptr++;
 811         }
 812         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
 813                 /* need read/modify/write of last changed EEPROM word
 814                  * only the first byte of the word is being modified
 815                  */
 816                 ret_val = hw->nvm.ops.read(hw, last_word, 1,
 817                                    &eeprom_buff[last_word - first_word]);
 818         }
 819
 820         /* Device's eeprom is always little-endian, word addressable */
 821         for (i = 0; i < last_word - first_word + 1; i++)
 822                 le16_to_cpus(&eeprom_buff[i]);
 823
 824         memcpy(ptr, bytes, eeprom->len);
 825
 826         for (i = 0; i < last_word - first_word + 1; i++)
 827                 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
 828
 829         ret_val = hw->nvm.ops.write(hw, first_word,
 830                                     last_word - first_word + 1, eeprom_buff);
 831
 832         /* Update the checksum if nvm write succeeded */
 833         if (ret_val == 0)
 834                 hw->nvm.ops.update(hw);
 835
 836         igb_set_fw_version(adapter);
 837         kfree(eeprom_buff);
 838         return ret_val;
 839 }
 840
 841 static void igb_get_drvinfo(struct net_device *netdev,
 842                             struct ethtool_drvinfo *drvinfo)
 843 {
 844         struct igb_adapter *adapter = netdev_priv(netdev);
 845
 846         strlcpy(drvinfo->driver,  igb_driver_name, sizeof(drvinfo->driver));
 847         strlcpy(drvinfo->version, igb_driver_version, sizeof(drvinfo->version));
 848
 849         /* EEPROM image version # is reported as firmware version # for
 850          * 82575 controllers
 851          */
 852         strlcpy(drvinfo->fw_version, adapter->fw_version,
 853                 sizeof(drvinfo->fw_version));
 854         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
 855                 sizeof(drvinfo->bus_info));
 856 }
 857
 858 static void igb_get_ringparam(struct net_device *netdev,
 859                               struct ethtool_ringparam *ring)
 860 {
 861         struct igb_adapter *adapter = netdev_priv(netdev);
 862
 863         ring->rx_max_pending = IGB_MAX_RXD;
 864         ring->tx_max_pending = IGB_MAX_TXD;
 865         ring->rx_pending = adapter->rx_ring_count;
 866         ring->tx_pending = adapter->tx_ring_count;
 867 }
 868
 869 static int igb_set_ringparam(struct net_device *netdev,
 870                              struct ethtool_ringparam *ring)
 871 {
 872         struct igb_adapter *adapter = netdev_priv(netdev);
 873         struct igb_ring *temp_ring;
 874         int i, err = 0;
 875         u16 new_rx_count, new_tx_count;
 876
 877         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 878                 return -EINVAL;
 879
 880         new_rx_count = min_t(u32, ring->rx_pending, IGB_MAX_RXD);
 881         new_rx_count = max_t(u16, new_rx_count, IGB_MIN_RXD);
 882         new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
 883
 884         new_tx_count = min_t(u32, ring->tx_pending, IGB_MAX_TXD);
 885         new_tx_count = max_t(u16, new_tx_count, IGB_MIN_TXD);
 886         new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
 887
 888         if ((new_tx_count == adapter->tx_ring_count) &&
 889             (new_rx_count == adapter->rx_ring_count)) {
 890                 /* nothing to do */
 891                 return 0;
 892         }
 893
 894         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 895                 usleep_range(1000, 2000);
 896
 897         if (!netif_running(adapter->netdev)) {
 898                 for (i = 0; i < adapter->num_tx_queues; i++)
 899                         adapter->tx_ring[i]->count = new_tx_count;
 900                 for (i = 0; i < adapter->num_rx_queues; i++)
 901                         adapter->rx_ring[i]->count = new_rx_count;
 902                 adapter->tx_ring_count = new_tx_count;
 903                 adapter->rx_ring_count = new_rx_count;
 904                 goto clear_reset;
 905         }
 906
 907         if (adapter->num_tx_queues > adapter->num_rx_queues)
 908                 temp_ring = vmalloc(adapter->num_tx_queues *
 909                                     sizeof(struct igb_ring));
 910         else
 911                 temp_ring = vmalloc(adapter->num_rx_queues *
 912                                     sizeof(struct igb_ring));
 913
 914         if (!temp_ring) {
 915                 err = -ENOMEM;
 916                 goto clear_reset;
 917         }
 918
 919         igb_down(adapter);
 920
 921         /* We can't just free everything and then setup again,
 922          * because the ISRs in MSI-X mode get passed pointers
 923          * to the Tx and Rx ring structs.
 924          */
 925         if (new_tx_count != adapter->tx_ring_count) {
 926                 for (i = 0; i < adapter->num_tx_queues; i++) {
 927                         memcpy(&temp_ring[i], adapter->tx_ring[i],
 928                                sizeof(struct igb_ring));
 929
 930                         temp_ring[i].count = new_tx_count;
 931                         err = igb_setup_tx_resources(&temp_ring[i]);
 932                         if (err) {
 933                                 while (i) {
 934                                         i--;
 935                                         igb_free_tx_resources(&temp_ring[i]);
 936                                 }
 937                                 goto err_setup;
 938                         }
 939                 }
 940
 941                 for (i = 0; i < adapter->num_tx_queues; i++) {
 942                         igb_free_tx_resources(adapter->tx_ring[i]);
 943
 944                         memcpy(adapter->tx_ring[i], &temp_ring[i],
 945                                sizeof(struct igb_ring));
 946                 }
 947
 948                 adapter->tx_ring_count = new_tx_count;
 949         }
 950
 951         if (new_rx_count != adapter->rx_ring_count) {
 952                 for (i = 0; i < adapter->num_rx_queues; i++) {
 953                         memcpy(&temp_ring[i], adapter->rx_ring[i],
 954                                sizeof(struct igb_ring));
 955
 956                         temp_ring[i].count = new_rx_count;
 957                         err = igb_setup_rx_resources(&temp_ring[i]);
 958                         if (err) {
 959                                 while (i) {
 960                                         i--;
 961                                         igb_free_rx_resources(&temp_ring[i]);
 962                                 }
 963                                 goto err_setup;
 964                         }
 965
 966                 }
 967
 968                 for (i = 0; i < adapter->num_rx_queues; i++) {
 969                         igb_free_rx_resources(adapter->rx_ring[i]);
 970
 971                         memcpy(adapter->rx_ring[i], &temp_ring[i],
 972                                sizeof(struct igb_ring));
 973                 }
 974
 975                 adapter->rx_ring_count = new_rx_count;
 976         }
 977 err_setup:
 978         igb_up(adapter);
 979         vfree(temp_ring);
 980 clear_reset:
 981         clear_bit(__IGB_RESETTING, &adapter->state);
 982         return err;
 983 }
 984
 985 /* ethtool register test data */
 986 struct igb_reg_test {
 987         u16 reg;
 988         u16 reg_offset;
 989         u16 array_len;
 990         u16 test_type;
 991         u32 mask;
 992         u32 write;
 993 };
 994
 995 /* In the hardware, registers are laid out either singly, in arrays
 996  * spaced 0x100 bytes apart, or in contiguous tables.  We assume
 997  * most tests take place on arrays or single registers (handled
 998  * as a single-element array) and special-case the tables.
 999  * Table tests are always pattern tests.
1000  *
1001  * We also make provision for some required setup steps by specifying
1002  * registers to be written without any read-back testing.
1003  */
1004
1005 #define PATTERN_TEST    1
1006 #define SET_READ_TEST   2
1007 #define WRITE_NO_TEST   3
1008 #define TABLE32_TEST    4
1009 #define TABLE64_TEST_LO 5
1010 #define TABLE64_TEST_HI 6
1011
1012 /* i210 reg test */
1013 static struct igb_reg_test reg_test_i210[] = {
1014         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1015         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1016         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1017         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1018         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1019         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1020         /* RDH is read-only for i210, only test RDT. */
1021         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1022         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1023         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1024         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1025         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1026         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1027         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1028         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1029         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1030         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1031         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1032         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1033         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1034                                                 0xFFFFFFFF, 0xFFFFFFFF },
1035         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1036                                                 0x900FFFFF, 0xFFFFFFFF },
1037         { E1000_MTA,       0, 128, TABLE32_TEST,
1038                                                 0xFFFFFFFF, 0xFFFFFFFF },
1039         { 0, 0, 0, 0, 0 }
1040 };
1041
1042 /* i350 reg test */
1043 static struct igb_reg_test reg_test_i350[] = {
1044         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1045         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1046         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1047         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFF0000, 0xFFFF0000 },
1048         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1049         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1050         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1051         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1052         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1053         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1054         /* RDH is read-only for i350, only test RDT. */
1055         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1056         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1057         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1058         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1059         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1060         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1061         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1062         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1063         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1064         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1065         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1066         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1067         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1068         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1069         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1070         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1071         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1072         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1073                                                 0xFFFFFFFF, 0xFFFFFFFF },
1074         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1075                                                 0xC3FFFFFF, 0xFFFFFFFF },
1076         { E1000_RA2,       0, 16, TABLE64_TEST_LO,
1077                                                 0xFFFFFFFF, 0xFFFFFFFF },
1078         { E1000_RA2,       0, 16, TABLE64_TEST_HI,
1079                                                 0xC3FFFFFF, 0xFFFFFFFF },
1080         { E1000_MTA,       0, 128, TABLE32_TEST,
1081                                                 0xFFFFFFFF, 0xFFFFFFFF },
1082         { 0, 0, 0, 0 }
1083 };
1084
1085 /* 82580 reg test */
1086 static struct igb_reg_test reg_test_82580[] = {
1087         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1088         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1089         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1090         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1091         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1092         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1093         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1094         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1095         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1096         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1097         /* RDH is read-only for 82580, only test RDT. */
1098         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1099         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1100         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1101         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1102         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1103         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1104         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1105         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1106         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1107         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1108         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1109         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1110         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1111         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1112         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1113         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1114         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1115         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1116                                                 0xFFFFFFFF, 0xFFFFFFFF },
1117         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1118                                                 0x83FFFFFF, 0xFFFFFFFF },
1119         { E1000_RA2,       0, 8, TABLE64_TEST_LO,
1120                                                 0xFFFFFFFF, 0xFFFFFFFF },
1121         { E1000_RA2,       0, 8, TABLE64_TEST_HI,
1122                                                 0x83FFFFFF, 0xFFFFFFFF },
1123         { E1000_MTA,       0, 128, TABLE32_TEST,
1124                                                 0xFFFFFFFF, 0xFFFFFFFF },
1125         { 0, 0, 0, 0 }
1126 };
1127
1128 /* 82576 reg test */
1129 static struct igb_reg_test reg_test_82576[] = {
1130         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1131         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1132         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1133         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1134         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1135         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1136         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1137         { E1000_RDBAL(4),  0x40, 12, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1138         { E1000_RDBAH(4),  0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1139         { E1000_RDLEN(4),  0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1140         /* Enable all RX queues before testing. */
1141         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0,
1142           E1000_RXDCTL_QUEUE_ENABLE },
1143         { E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST, 0,
1144           E1000_RXDCTL_QUEUE_ENABLE },
1145         /* RDH is read-only for 82576, only test RDT. */
1146         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1147         { E1000_RDT(4),    0x40, 12,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1148         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, 0 },
1149         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, 0 },
1150         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1151         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1152         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1153         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1154         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1155         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1156         { E1000_TDBAL(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1157         { E1000_TDBAH(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1158         { E1000_TDLEN(4),  0x40, 12,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1159         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1160         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1161         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1162         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1163         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1164         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1165         { E1000_RA2,       0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1166         { E1000_RA2,       0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1167         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1168         { 0, 0, 0, 0 }
1169 };
1170
1171 /* 82575 register test */
1172 static struct igb_reg_test reg_test_82575[] = {
1173         { E1000_FCAL,      0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1174         { E1000_FCAH,      0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1175         { E1000_FCT,       0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1176         { E1000_VET,       0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1177         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1178         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1179         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1180         /* Enable all four RX queues before testing. */
1181         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0,
1182           E1000_RXDCTL_QUEUE_ENABLE },
1183         /* RDH is read-only for 82575, only test RDT. */
1184         { E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1185         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 },
1186         { E1000_FCRTH,     0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1187         { E1000_FCTTV,     0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1188         { E1000_TIPG,      0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1189         { E1000_TDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1190         { E1000_TDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1191         { E1000_TDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1192         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1193         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0x003FFFFB },
1194         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0xFFFFFFFF },
1195         { E1000_TCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1196         { E1000_TXCW,      0x100, 1, PATTERN_TEST, 0xC000FFFF, 0x0000FFFF },
1197         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1198         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x800FFFFF, 0xFFFFFFFF },
1199         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1200         { 0, 0, 0, 0 }
1201 };
1202
1203 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
1204                              int reg, u32 mask, u32 write)
1205 {
1206         struct e1000_hw *hw = &adapter->hw;
1207         u32 pat, val;
1208         static const u32 _test[] = {
1209                 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1210         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
1211                 wr32(reg, (_test[pat] & write));
1212                 val = rd32(reg) & mask;
1213                 if (val != (_test[pat] & write & mask)) {
1214                         dev_err(&adapter->pdev->dev,
1215                                 "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1216                                 reg, val, (_test[pat] & write & mask));
1217                         *data = reg;
1218                         return true;
1219                 }
1220         }
1221
1222         return false;
1223 }
1224
1225 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
1226                               int reg, u32 mask, u32 write)
1227 {
1228         struct e1000_hw *hw = &adapter->hw;
1229         u32 val;
1230
1231         wr32(reg, write & mask);
1232         val = rd32(reg);
1233         if ((write & mask) != (val & mask)) {
1234                 dev_err(&adapter->pdev->dev,
1235                         "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
1236                         reg, (val & mask), (write & mask));
1237                 *data = reg;
1238                 return true;
1239         }
1240
1241         return false;
1242 }
1243
1244 #define REG_PATTERN_TEST(reg, mask, write) \
1245         do { \
1246                 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1247                         return 1; \
1248         } while (0)
1249
1250 #define REG_SET_AND_CHECK(reg, mask, write) \
1251         do { \
1252                 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1253                         return 1; \
1254         } while (0)
1255
1256 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
1257 {
1258         struct e1000_hw *hw = &adapter->hw;
1259         struct igb_reg_test *test;
1260         u32 value, before, after;
1261         u32 i, toggle;
1262
1263         switch (adapter->hw.mac.type) {
1264         case e1000_i350:
1265         case e1000_i354:
1266                 test = reg_test_i350;
1267                 toggle = 0x7FEFF3FF;
1268                 break;
1269         case e1000_i210:
1270         case e1000_i211:
1271                 test = reg_test_i210;
1272                 toggle = 0x7FEFF3FF;
1273                 break;
1274         case e1000_82580:
1275                 test = reg_test_82580;
1276                 toggle = 0x7FEFF3FF;
1277                 break;
1278         case e1000_82576:
1279                 test = reg_test_82576;
1280                 toggle = 0x7FFFF3FF;
1281                 break;
1282         default:
1283                 test = reg_test_82575;
1284                 toggle = 0x7FFFF3FF;
1285                 break;
1286         }
1287
1288         /* Because the status register is such a special case,
1289          * we handle it separately from the rest of the register
1290          * tests.  Some bits are read-only, some toggle, and some
1291          * are writable on newer MACs.
1292          */
1293         before = rd32(E1000_STATUS);
1294         value = (rd32(E1000_STATUS) & toggle);
1295         wr32(E1000_STATUS, toggle);
1296         after = rd32(E1000_STATUS) & toggle;
1297         if (value != after) {
1298                 dev_err(&adapter->pdev->dev,
1299                         "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1300                         after, value);
1301                 *data = 1;
1302                 return 1;
1303         }
1304         /* restore previous status */
1305         wr32(E1000_STATUS, before);
1306
1307         /* Perform the remainder of the register test, looping through
1308          * the test table until we either fail or reach the null entry.
1309          */
1310         while (test->reg) {
1311                 for (i = 0; i < test->array_len; i++) {
1312                         switch (test->test_type) {
1313                         case PATTERN_TEST:
1314                                 REG_PATTERN_TEST(test->reg +
1315                                                 (i * test->reg_offset),
1316                                                 test->mask,
1317                                                 test->write);
1318                                 break;
1319                         case SET_READ_TEST:
1320                                 REG_SET_AND_CHECK(test->reg +
1321                                                 (i * test->reg_offset),
1322                                                 test->mask,
1323                                                 test->write);
1324                                 break;
1325                         case WRITE_NO_TEST:
1326                                 writel(test->write,
1327                                     (adapter->hw.hw_addr + test->reg)
1328                                         + (i * test->reg_offset));
1329                                 break;
1330                         case TABLE32_TEST:
1331                                 REG_PATTERN_TEST(test->reg + (i * 4),
1332                                                 test->mask,
1333                                                 test->write);
1334                                 break;
1335                         case TABLE64_TEST_LO:
1336                                 REG_PATTERN_TEST(test->reg + (i * 8),
1337                                                 test->mask,
1338                                                 test->write);
1339                                 break;
1340                         case TABLE64_TEST_HI:
1341                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1342                                                 test->mask,
1343                                                 test->write);
1344                                 break;
1345                         }
1346                 }
1347                 test++;
1348         }
1349
1350         *data = 0;
1351         return 0;
1352 }
1353
1354 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1355 {
1356         struct e1000_hw *hw = &adapter->hw;
1357
1358         *data = 0;
1359
1360         /* Validate eeprom on all parts but flashless */
1361         switch (hw->mac.type) {
1362         case e1000_i210:
1363         case e1000_i211:
1364                 if (igb_get_flash_presence_i210(hw)) {
1365                         if (adapter->hw.nvm.ops.validate(&adapter->hw) < 0)
1366                                 *data = 2;
1367                 }
1368                 break;
1369         default:
1370                 if (adapter->hw.nvm.ops.validate(&adapter->hw) < 0)
1371                         *data = 2;
1372                 break;
1373         }
1374
1375         return *data;
1376 }
1377
1378 static irqreturn_t igb_test_intr(int irq, void *data)
1379 {
1380         struct igb_adapter *adapter = (struct igb_adapter *) data;
1381         struct e1000_hw *hw = &adapter->hw;
1382
1383         adapter->test_icr |= rd32(E1000_ICR);
1384
1385         return IRQ_HANDLED;
1386 }
1387
1388 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1389 {
1390         struct e1000_hw *hw = &adapter->hw;
1391         struct net_device *netdev = adapter->netdev;
1392         u32 mask, ics_mask, i = 0, shared_int = true;
1393         u32 irq = adapter->pdev->irq;
1394
1395         *data = 0;
1396
1397         /* Hook up test interrupt handler just for this test */
1398         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1399                 if (request_irq(adapter->msix_entries[0].vector,
1400                                 igb_test_intr, 0, netdev->name, adapter)) {
1401                         *data = 1;
1402                         return -1;
1403                 }
1404                 wr32(E1000_IVAR_MISC, E1000_IVAR_VALID << 8);
1405                 wr32(E1000_EIMS, BIT(0));
1406         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1407                 shared_int = false;
1408                 if (request_irq(irq,
1409                                 igb_test_intr, 0, netdev->name, adapter)) {
1410                         *data = 1;
1411                         return -1;
1412                 }
1413         } else if (!request_irq(irq, igb_test_intr, IRQF_PROBE_SHARED,
1414                                 netdev->name, adapter)) {
1415                 shared_int = false;
1416         } else if (request_irq(irq, igb_test_intr, IRQF_SHARED,
1417                  netdev->name, adapter)) {
1418                 *data = 1;
1419                 return -1;
1420         }
1421         dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
1422                 (shared_int ? "shared" : "unshared"));
1423
1424         /* Disable all the interrupts */
1425         wr32(E1000_IMC, ~0);
1426         wrfl();
1427         usleep_range(10000, 11000);
1428
1429         /* Define all writable bits for ICS */
1430         switch (hw->mac.type) {
1431         case e1000_82575:
1432                 ics_mask = 0x37F47EDD;
1433                 break;
1434         case e1000_82576:
1435                 ics_mask = 0x77D4FBFD;
1436                 break;
1437         case e1000_82580:
1438                 ics_mask = 0x77DCFED5;
1439                 break;
1440         case e1000_i350:
1441         case e1000_i354:
1442         case e1000_i210:
1443         case e1000_i211:
1444                 ics_mask = 0x77DCFED5;
1445                 break;
1446         default:
1447                 ics_mask = 0x7FFFFFFF;
1448                 break;
1449         }
1450
1451         /* Test each interrupt */
1452         for (; i < 31; i++) {
1453                 /* Interrupt to test */
1454                 mask = BIT(i);
1455
1456                 if (!(mask & ics_mask))
1457                         continue;
1458
1459                 if (!shared_int) {
1460                         /* Disable the interrupt to be reported in
1461                          * the cause register and then force the same
1462                          * interrupt and see if one gets posted.  If
1463                          * an interrupt was posted to the bus, the
1464                          * test failed.
1465                          */
1466                         adapter->test_icr = 0;
1467
1468                         /* Flush any pending interrupts */
1469                         wr32(E1000_ICR, ~0);
1470
1471                         wr32(E1000_IMC, mask);
1472                         wr32(E1000_ICS, mask);
1473                         wrfl();
1474                         usleep_range(10000, 11000);
1475
1476                         if (adapter->test_icr & mask) {
1477                                 *data = 3;
1478                                 break;
1479                         }
1480                 }
1481
1482                 /* Enable the interrupt to be reported in
1483                  * the cause register and then force the same
1484                  * interrupt and see if one gets posted.  If
1485                  * an interrupt was not posted to the bus, the
1486                  * test failed.
1487                  */
1488                 adapter->test_icr = 0;
1489
1490                 /* Flush any pending interrupts */
1491                 wr32(E1000_ICR, ~0);
1492
1493                 wr32(E1000_IMS, mask);
1494                 wr32(E1000_ICS, mask);
1495                 wrfl();
1496                 usleep_range(10000, 11000);
1497
1498                 if (!(adapter->test_icr & mask)) {
1499                         *data = 4;
1500                         break;
1501                 }
1502
1503                 if (!shared_int) {
1504                         /* Disable the other interrupts to be reported in
1505                          * the cause register and then force the other
1506                          * interrupts and see if any get posted.  If
1507                          * an interrupt was posted to the bus, the
1508                          * test failed.
1509                          */
1510                         adapter->test_icr = 0;
1511
1512                         /* Flush any pending interrupts */
1513                         wr32(E1000_ICR, ~0);
1514
1515                         wr32(E1000_IMC, ~mask);
1516                         wr32(E1000_ICS, ~mask);
1517                         wrfl();
1518                         usleep_range(10000, 11000);
1519
1520                         if (adapter->test_icr & mask) {
1521                                 *data = 5;
1522                                 break;
1523                         }
1524                 }
1525         }
1526
1527         /* Disable all the interrupts */
1528         wr32(E1000_IMC, ~0);
1529         wrfl();
1530         usleep_range(10000, 11000);
1531
1532         /* Unhook test interrupt handler */
1533         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1534                 free_irq(adapter->msix_entries[0].vector, adapter);
1535         else
1536                 free_irq(irq, adapter);
1537
1538         return *data;
1539 }
1540
1541 static void igb_free_desc_rings(struct igb_adapter *adapter)
1542 {
1543         igb_free_tx_resources(&adapter->test_tx_ring);
1544         igb_free_rx_resources(&adapter->test_rx_ring);
1545 }
1546
1547 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1548 {
1549         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1550         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1551         struct e1000_hw *hw = &adapter->hw;
1552         int ret_val;
1553
1554         /* Setup Tx descriptor ring and Tx buffers */
1555         tx_ring->count = IGB_DEFAULT_TXD;
1556         tx_ring->dev = &adapter->pdev->dev;
1557         tx_ring->netdev = adapter->netdev;
1558         tx_ring->reg_idx = adapter->vfs_allocated_count;
1559
1560         if (igb_setup_tx_resources(tx_ring)) {
1561                 ret_val = 1;
1562                 goto err_nomem;
1563         }
1564
1565         igb_setup_tctl(adapter);
1566         igb_configure_tx_ring(adapter, tx_ring);
1567
1568         /* Setup Rx descriptor ring and Rx buffers */
1569         rx_ring->count = IGB_DEFAULT_RXD;
1570         rx_ring->dev = &adapter->pdev->dev;
1571         rx_ring->netdev = adapter->netdev;
1572         rx_ring->reg_idx = adapter->vfs_allocated_count;
1573
1574         if (igb_setup_rx_resources(rx_ring)) {
1575                 ret_val = 3;
1576                 goto err_nomem;
1577         }
1578
1579         /* set the default queue to queue 0 of PF */
1580         wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);
1581
1582         /* enable receive ring */
1583         igb_setup_rctl(adapter);
1584         igb_configure_rx_ring(adapter, rx_ring);
1585
1586         igb_alloc_rx_buffers(rx_ring, igb_desc_unused(rx_ring));
1587
1588         return 0;
1589
1590 err_nomem:
1591         igb_free_desc_rings(adapter);
1592         return ret_val;
1593 }
1594
1595 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1596 {
1597         struct e1000_hw *hw = &adapter->hw;
1598
1599         /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1600         igb_write_phy_reg(hw, 29, 0x001F);
1601         igb_write_phy_reg(hw, 30, 0x8FFC);
1602         igb_write_phy_reg(hw, 29, 0x001A);
1603         igb_write_phy_reg(hw, 30, 0x8FF0);
1604 }
1605
1606 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1607 {
1608         struct e1000_hw *hw = &adapter->hw;
1609         u32 ctrl_reg = 0;
1610
1611         hw->mac.autoneg = false;
1612
1613         if (hw->phy.type == e1000_phy_m88) {
1614                 if (hw->phy.id != I210_I_PHY_ID) {
1615                         /* Auto-MDI/MDIX Off */
1616                         igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1617                         /* reset to update Auto-MDI/MDIX */
1618                         igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1619                         /* autoneg off */
1620                         igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1621                 } else {
1622                         /* force 1000, set loopback  */
1623                         igb_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0);
1624                         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1625                 }
1626         } else if (hw->phy.type == e1000_phy_82580) {
1627                 /* enable MII loopback */
1628                 igb_write_phy_reg(hw, I82580_PHY_LBK_CTRL, 0x8041);
1629         }
1630
1631         /* add small delay to avoid loopback test failure */
1632         msleep(50);
1633
1634         /* force 1000, set loopback */
1635         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1636
1637         /* Now set up the MAC to the same speed/duplex as the PHY. */
1638         ctrl_reg = rd32(E1000_CTRL);
1639         ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1640         ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1641                      E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1642                      E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1643                      E1000_CTRL_FD |     /* Force Duplex to FULL */
1644                      E1000_CTRL_SLU);    /* Set link up enable bit */
1645
1646         if (hw->phy.type == e1000_phy_m88)
1647                 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1648
1649         wr32(E1000_CTRL, ctrl_reg);
1650
1651         /* Disable the receiver on the PHY so when a cable is plugged in, the
1652          * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1653          */
1654         if (hw->phy.type == e1000_phy_m88)
1655                 igb_phy_disable_receiver(adapter);
1656
1657         mdelay(500);
1658         return 0;
1659 }
1660
1661 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1662 {
1663         return igb_integrated_phy_loopback(adapter);
1664 }
1665
1666 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1667 {
1668         struct e1000_hw *hw = &adapter->hw;
1669         u32 reg;
1670
1671         reg = rd32(E1000_CTRL_EXT);
1672
1673         /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1674         if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
1675                 if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1676                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1677                 (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1678                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP) ||
1679                 (hw->device_id == E1000_DEV_ID_I354_SGMII) ||
1680                 (hw->device_id == E1000_DEV_ID_I354_BACKPLANE_2_5GBPS)) {
1681                         /* Enable DH89xxCC MPHY for near end loopback */
1682                         reg = rd32(E1000_MPHY_ADDR_CTL);
1683                         reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1684                         E1000_MPHY_PCS_CLK_REG_OFFSET;
1685                         wr32(E1000_MPHY_ADDR_CTL, reg);
1686
1687                         reg = rd32(E1000_MPHY_DATA);
1688                         reg |= E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1689                         wr32(E1000_MPHY_DATA, reg);
1690                 }
1691
1692                 reg = rd32(E1000_RCTL);
1693                 reg |= E1000_RCTL_LBM_TCVR;
1694                 wr32(E1000_RCTL, reg);
1695
1696                 wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1697
1698                 reg = rd32(E1000_CTRL);
1699                 reg &= ~(E1000_CTRL_RFCE |
1700                          E1000_CTRL_TFCE |
1701                          E1000_CTRL_LRST);
1702                 reg |= E1000_CTRL_SLU |
1703                        E1000_CTRL_FD;
1704                 wr32(E1000_CTRL, reg);
1705
1706                 /* Unset switch control to serdes energy detect */
1707                 reg = rd32(E1000_CONNSW);
1708                 reg &= ~E1000_CONNSW_ENRGSRC;
1709                 wr32(E1000_CONNSW, reg);
1710
1711                 /* Unset sigdetect for SERDES loopback on
1712                  * 82580 and newer devices.
1713                  */
1714                 if (hw->mac.type >= e1000_82580) {
1715                         reg = rd32(E1000_PCS_CFG0);
1716                         reg |= E1000_PCS_CFG_IGN_SD;
1717                         wr32(E1000_PCS_CFG0, reg);
1718                 }
1719
1720                 /* Set PCS register for forced speed */
1721                 reg = rd32(E1000_PCS_LCTL);
1722                 reg &= ~E1000_PCS_LCTL_AN_ENABLE;     /* Disable Autoneg*/
1723                 reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
1724                        E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
1725                        E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
1726                        E1000_PCS_LCTL_FSD |           /* Force Speed */
1727                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
1728                 wr32(E1000_PCS_LCTL, reg);
1729
1730                 return 0;
1731         }
1732
1733         return igb_set_phy_loopback(adapter);
1734 }
1735
1736 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1737 {
1738         struct e1000_hw *hw = &adapter->hw;
1739         u32 rctl;
1740         u16 phy_reg;
1741
1742         if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1743         (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1744         (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1745         (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP) ||
1746         (hw->device_id == E1000_DEV_ID_I354_SGMII)) {
1747                 u32 reg;
1748
1749                 /* Disable near end loopback on DH89xxCC */
1750                 reg = rd32(E1000_MPHY_ADDR_CTL);
1751                 reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1752                 E1000_MPHY_PCS_CLK_REG_OFFSET;
1753                 wr32(E1000_MPHY_ADDR_CTL, reg);
1754
1755                 reg = rd32(E1000_MPHY_DATA);
1756                 reg &= ~E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1757                 wr32(E1000_MPHY_DATA, reg);
1758         }
1759
1760         rctl = rd32(E1000_RCTL);
1761         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1762         wr32(E1000_RCTL, rctl);
1763
1764         hw->mac.autoneg = true;
1765         igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1766         if (phy_reg & MII_CR_LOOPBACK) {
1767                 phy_reg &= ~MII_CR_LOOPBACK;
1768                 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1769                 igb_phy_sw_reset(hw);
1770         }
1771 }
1772
1773 static void igb_create_lbtest_frame(struct sk_buff *skb,
1774                                     unsigned int frame_size)
1775 {
1776         memset(skb->data, 0xFF, frame_size);
1777         frame_size /= 2;
1778         memset(&skb->data[frame_size], 0xAA, frame_size - 1);
1779         memset(&skb->data[frame_size + 10], 0xBE, 1);
1780         memset(&skb->data[frame_size + 12], 0xAF, 1);
1781 }
1782
1783 static int igb_check_lbtest_frame(struct igb_rx_buffer *rx_buffer,
1784                                   unsigned int frame_size)
1785 {
1786         unsigned char *data;
1787         bool match = true;
1788
1789         frame_size >>= 1;
1790
1791         data = kmap(rx_buffer->page);
1792
1793         if (data[3] != 0xFF ||
1794             data[frame_size + 10] != 0xBE ||
1795             data[frame_size + 12] != 0xAF)
1796                 match = false;
1797
1798         kunmap(rx_buffer->page);
1799
1800         return match;
1801 }
1802
1803 static int igb_clean_test_rings(struct igb_ring *rx_ring,
1804                                 struct igb_ring *tx_ring,
1805                                 unsigned int size)
1806 {
1807         union e1000_adv_rx_desc *rx_desc;
1808         struct igb_rx_buffer *rx_buffer_info;
1809         struct igb_tx_buffer *tx_buffer_info;
1810         u16 rx_ntc, tx_ntc, count = 0;
1811
1812         /* initialize next to clean and descriptor values */
1813         rx_ntc = rx_ring->next_to_clean;
1814         tx_ntc = tx_ring->next_to_clean;
1815         rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1816
1817         while (igb_test_staterr(rx_desc, E1000_RXD_STAT_DD)) {
1818                 /* check Rx buffer */
1819                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1820
1821                 /* sync Rx buffer for CPU read */
1822                 dma_sync_single_for_cpu(rx_ring->dev,
1823                                         rx_buffer_info->dma,
1824                                         IGB_RX_BUFSZ,
1825                                         DMA_FROM_DEVICE);
1826
1827                 /* verify contents of skb */
1828                 if (igb_check_lbtest_frame(rx_buffer_info, size))
1829                         count++;
1830
1831                 /* sync Rx buffer for device write */
1832                 dma_sync_single_for_device(rx_ring->dev,
1833                                            rx_buffer_info->dma,
1834                                            IGB_RX_BUFSZ,
1835                                            DMA_FROM_DEVICE);
1836
1837                 /* unmap buffer on Tx side */
1838                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1839                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1840
1841                 /* increment Rx/Tx next to clean counters */
1842                 rx_ntc++;
1843                 if (rx_ntc == rx_ring->count)
1844                         rx_ntc = 0;
1845                 tx_ntc++;
1846                 if (tx_ntc == tx_ring->count)
1847                         tx_ntc = 0;
1848
1849                 /* fetch next descriptor */
1850                 rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1851         }
1852
1853         netdev_tx_reset_queue(txring_txq(tx_ring));
1854
1855         /* re-map buffers to ring, store next to clean values */
1856         igb_alloc_rx_buffers(rx_ring, count);
1857         rx_ring->next_to_clean = rx_ntc;
1858         tx_ring->next_to_clean = tx_ntc;
1859
1860         return count;
1861 }
1862
1863 static int igb_run_loopback_test(struct igb_adapter *adapter)
1864 {
1865         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1866         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1867         u16 i, j, lc, good_cnt;
1868         int ret_val = 0;
1869         unsigned int size = IGB_RX_HDR_LEN;
1870         netdev_tx_t tx_ret_val;
1871         struct sk_buff *skb;
1872
1873         /* allocate test skb */
1874         skb = alloc_skb(size, GFP_KERNEL);
1875         if (!skb)
1876                 return 11;
1877
1878         /* place data into test skb */
1879         igb_create_lbtest_frame(skb, size);
1880         skb_put(skb, size);
1881
1882         /* Calculate the loop count based on the largest descriptor ring
1883          * The idea is to wrap the largest ring a number of times using 64
1884          * send/receive pairs during each loop
1885          */
1886
1887         if (rx_ring->count <= tx_ring->count)
1888                 lc = ((tx_ring->count / 64) * 2) + 1;
1889         else
1890                 lc = ((rx_ring->count / 64) * 2) + 1;
1891
1892         for (j = 0; j <= lc; j++) { /* loop count loop */
1893                 /* reset count of good packets */
1894                 good_cnt = 0;
1895
1896                 /* place 64 packets on the transmit queue*/
1897                 for (i = 0; i < 64; i++) {
1898                         skb_get(skb);
1899                         tx_ret_val = igb_xmit_frame_ring(skb, tx_ring);
1900                         if (tx_ret_val == NETDEV_TX_OK)
1901                                 good_cnt++;
1902                 }
1903
1904                 if (good_cnt != 64) {
1905                         ret_val = 12;
1906                         break;
1907                 }
1908
1909                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1910                 msleep(200);
1911
1912                 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1913                 if (good_cnt != 64) {
1914                         ret_val = 13;
1915                         break;
1916                 }
1917         } /* end loop count loop */
1918
1919         /* free the original skb */
1920         kfree_skb(skb);
1921
1922         return ret_val;
1923 }
1924
1925 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1926 {
1927         /* PHY loopback cannot be performed if SoL/IDER
1928          * sessions are active
1929          */
1930         if (igb_check_reset_block(&adapter->hw)) {
1931                 dev_err(&adapter->pdev->dev,
1932                         "Cannot do PHY loopback test when SoL/IDER is active.\n");
1933                 *data = 0;
1934                 goto out;
1935         }
1936
1937         if (adapter->hw.mac.type == e1000_i354) {
1938                 dev_info(&adapter->pdev->dev,
1939                         "Loopback test not supported on i354.\n");
1940                 *data = 0;
1941                 goto out;
1942         }
1943         *data = igb_setup_desc_rings(adapter);
1944         if (*data)
1945                 goto out;
1946         *data = igb_setup_loopback_test(adapter);
1947         if (*data)
1948                 goto err_loopback;
1949         *data = igb_run_loopback_test(adapter);
1950         igb_loopback_cleanup(adapter);
1951
1952 err_loopback:
1953         igb_free_desc_rings(adapter);
1954 out:
1955         return *data;
1956 }
1957
1958 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1959 {
1960         struct e1000_hw *hw = &adapter->hw;
1961         *data = 0;
1962         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1963                 int i = 0;
1964
1965                 hw->mac.serdes_has_link = false;
1966
1967                 /* On some blade server designs, link establishment
1968                  * could take as long as 2-3 minutes
1969                  */
1970                 do {
1971                         hw->mac.ops.check_for_link(&adapter->hw);
1972                         if (hw->mac.serdes_has_link)
1973                                 return *data;
1974                         msleep(20);
1975                 } while (i++ < 3750);
1976
1977                 *data = 1;
1978         } else {
1979                 hw->mac.ops.check_for_link(&adapter->hw);
1980                 if (hw->mac.autoneg)
1981                         msleep(5000);
1982
1983                 if (!(rd32(E1000_STATUS) & E1000_STATUS_LU))
1984                         *data = 1;
1985         }
1986         return *data;
1987 }
1988
1989 static void igb_diag_test(struct net_device *netdev,
1990                           struct ethtool_test *eth_test, u64 *data)
1991 {
1992         struct igb_adapter *adapter = netdev_priv(netdev);
1993         u16 autoneg_advertised;
1994         u8 forced_speed_duplex, autoneg;
1995         bool if_running = netif_running(netdev);
1996
1997         set_bit(__IGB_TESTING, &adapter->state);
1998
1999         /* can't do offline tests on media switching devices */
2000         if (adapter->hw.dev_spec._82575.mas_capable)
2001                 eth_test->flags &= ~ETH_TEST_FL_OFFLINE;
2002         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2003                 /* Offline tests */
2004
2005                 /* save speed, duplex, autoneg settings */
2006                 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
2007                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
2008                 autoneg = adapter->hw.mac.autoneg;
2009
2010                 dev_info(&adapter->pdev->dev, "offline testing starting\n");
2011
2012                 /* power up link for link test */
2013                 igb_power_up_link(adapter);
2014
2015                 /* Link test performed before hardware reset so autoneg doesn't
2016                  * interfere with test result
2017                  */
2018                 if (igb_link_test(adapter, &data[TEST_LINK]))
2019                         eth_test->flags |= ETH_TEST_FL_FAILED;
2020
2021                 if (if_running)
2022                         /* indicate we're in test mode */
2023                         igb_close(netdev);
2024                 else
2025                         igb_reset(adapter);
2026
2027                 if (igb_reg_test(adapter, &data[TEST_REG]))
2028                         eth_test->flags |= ETH_TEST_FL_FAILED;
2029
2030                 igb_reset(adapter);
2031                 if (igb_eeprom_test(adapter, &data[TEST_EEP]))
2032                         eth_test->flags |= ETH_TEST_FL_FAILED;
2033
2034                 igb_reset(adapter);
2035                 if (igb_intr_test(adapter, &data[TEST_IRQ]))
2036                         eth_test->flags |= ETH_TEST_FL_FAILED;
2037
2038                 igb_reset(adapter);
2039                 /* power up link for loopback test */
2040                 igb_power_up_link(adapter);
2041                 if (igb_loopback_test(adapter, &data[TEST_LOOP]))
2042                         eth_test->flags |= ETH_TEST_FL_FAILED;
2043
2044                 /* restore speed, duplex, autoneg settings */
2045                 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
2046                 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
2047                 adapter->hw.mac.autoneg = autoneg;
2048
2049                 /* force this routine to wait until autoneg complete/timeout */
2050                 adapter->hw.phy.autoneg_wait_to_complete = true;
2051                 igb_reset(adapter);
2052                 adapter->hw.phy.autoneg_wait_to_complete = false;
2053
2054                 clear_bit(__IGB_TESTING, &adapter->state);
2055                 if (if_running)
2056                         igb_open(netdev);
2057         } else {
2058                 dev_info(&adapter->pdev->dev, "online testing starting\n");
2059
2060                 /* PHY is powered down when interface is down */
2061                 if (if_running && igb_link_test(adapter, &data[TEST_LINK]))
2062                         eth_test->flags |= ETH_TEST_FL_FAILED;
2063                 else
2064                         data[TEST_LINK] = 0;
2065
2066                 /* Online tests aren't run; pass by default */
2067                 data[TEST_REG] = 0;
2068                 data[TEST_EEP] = 0;
2069                 data[TEST_IRQ] = 0;
2070                 data[TEST_LOOP] = 0;
2071
2072                 clear_bit(__IGB_TESTING, &adapter->state);
2073         }
2074         msleep_interruptible(4 * 1000);
2075 }
2076
2077 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2078 {
2079         struct igb_adapter *adapter = netdev_priv(netdev);
2080
2081         wol->wolopts = 0;
2082
2083         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2084                 return;
2085
2086         wol->supported = WAKE_UCAST | WAKE_MCAST |
2087                          WAKE_BCAST | WAKE_MAGIC |
2088                          WAKE_PHY;
2089
2090         /* apply any specific unsupported masks here */
2091         switch (adapter->hw.device_id) {
2092         default:
2093                 break;
2094         }
2095
2096         if (adapter->wol & E1000_WUFC_EX)
2097                 wol->wolopts |= WAKE_UCAST;
2098         if (adapter->wol & E1000_WUFC_MC)
2099                 wol->wolopts |= WAKE_MCAST;
2100         if (adapter->wol & E1000_WUFC_BC)
2101                 wol->wolopts |= WAKE_BCAST;
2102         if (adapter->wol & E1000_WUFC_MAG)
2103                 wol->wolopts |= WAKE_MAGIC;
2104         if (adapter->wol & E1000_WUFC_LNKC)
2105                 wol->wolopts |= WAKE_PHY;
2106 }
2107
2108 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2109 {
2110         struct igb_adapter *adapter = netdev_priv(netdev);
2111
2112         if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
2113                 return -EOPNOTSUPP;
2114
2115         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2116                 return wol->wolopts ? -EOPNOTSUPP : 0;
2117
2118         /* these settings will always override what we currently have */
2119         adapter->wol = 0;
2120
2121         if (wol->wolopts & WAKE_UCAST)
2122                 adapter->wol |= E1000_WUFC_EX;
2123         if (wol->wolopts & WAKE_MCAST)
2124                 adapter->wol |= E1000_WUFC_MC;
2125         if (wol->wolopts & WAKE_BCAST)
2126                 adapter->wol |= E1000_WUFC_BC;
2127         if (wol->wolopts & WAKE_MAGIC)
2128                 adapter->wol |= E1000_WUFC_MAG;
2129         if (wol->wolopts & WAKE_PHY)
2130                 adapter->wol |= E1000_WUFC_LNKC;
2131         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2132
2133         return 0;
2134 }
2135
2136 /* bit defines for adapter->led_status */
2137 #define IGB_LED_ON              0
2138
2139 static int igb_set_phys_id(struct net_device *netdev,
2140                            enum ethtool_phys_id_state state)
2141 {
2142         struct igb_adapter *adapter = netdev_priv(netdev);
2143         struct e1000_hw *hw = &adapter->hw;
2144
2145         switch (state) {
2146         case ETHTOOL_ID_ACTIVE:
2147                 igb_blink_led(hw);
2148                 return 2;
2149         case ETHTOOL_ID_ON:
2150                 igb_blink_led(hw);
2151                 break;
2152         case ETHTOOL_ID_OFF:
2153                 igb_led_off(hw);
2154                 break;
2155         case ETHTOOL_ID_INACTIVE:
2156                 igb_led_off(hw);
2157                 clear_bit(IGB_LED_ON, &adapter->led_status);
2158                 igb_cleanup_led(hw);
2159                 break;
2160         }
2161
2162         return 0;
2163 }
2164
2165 static int igb_set_coalesce(struct net_device *netdev,
2166                             struct ethtool_coalesce *ec)
2167 {
2168         struct igb_adapter *adapter = netdev_priv(netdev);
2169         int i;
2170
2171         if (ec->rx_max_coalesced_frames ||
2172             ec->rx_coalesce_usecs_irq ||
2173             ec->rx_max_coalesced_frames_irq ||
2174             ec->tx_max_coalesced_frames ||
2175             ec->tx_coalesce_usecs_irq ||
2176             ec->stats_block_coalesce_usecs ||
2177             ec->use_adaptive_rx_coalesce ||
2178             ec->use_adaptive_tx_coalesce ||
2179             ec->pkt_rate_low ||
2180             ec->rx_coalesce_usecs_low ||
2181             ec->rx_max_coalesced_frames_low ||
2182             ec->tx_coalesce_usecs_low ||
2183             ec->tx_max_coalesced_frames_low ||
2184             ec->pkt_rate_high ||
2185             ec->rx_coalesce_usecs_high ||
2186             ec->rx_max_coalesced_frames_high ||
2187             ec->tx_coalesce_usecs_high ||
2188             ec->tx_max_coalesced_frames_high ||
2189             ec->rate_sample_interval)
2190                 return -ENOTSUPP;
2191
2192         if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2193             ((ec->rx_coalesce_usecs > 3) &&
2194              (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2195             (ec->rx_coalesce_usecs == 2))
2196                 return -EINVAL;
2197
2198         if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2199             ((ec->tx_coalesce_usecs > 3) &&
2200              (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2201             (ec->tx_coalesce_usecs == 2))
2202                 return -EINVAL;
2203
2204         if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
2205                 return -EINVAL;
2206
2207         /* If ITR is disabled, disable DMAC */
2208         if (ec->rx_coalesce_usecs == 0) {
2209                 if (adapter->flags & IGB_FLAG_DMAC)
2210                         adapter->flags &= ~IGB_FLAG_DMAC;
2211         }
2212
2213         /* convert to rate of irq's per second */
2214         if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
2215                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2216         else
2217                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2218
2219         /* convert to rate of irq's per second */
2220         if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
2221                 adapter->tx_itr_setting = adapter->rx_itr_setting;
2222         else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
2223                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2224         else
2225                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2226
2227         for (i = 0; i < adapter->num_q_vectors; i++) {
2228                 struct igb_q_vector *q_vector = adapter->q_vector[i];
2229                 q_vector->tx.work_limit = adapter->tx_work_limit;
2230                 if (q_vector->rx.ring)
2231                         q_vector->itr_val = adapter->rx_itr_setting;
2232                 else
2233                         q_vector->itr_val = adapter->tx_itr_setting;
2234                 if (q_vector->itr_val && q_vector->itr_val <= 3)
2235                         q_vector->itr_val = IGB_START_ITR;
2236                 q_vector->set_itr = 1;
2237         }
2238
2239         return 0;
2240 }
2241
2242 static int igb_get_coalesce(struct net_device *netdev,
2243                             struct ethtool_coalesce *ec)
2244 {
2245         struct igb_adapter *adapter = netdev_priv(netdev);
2246
2247         if (adapter->rx_itr_setting <= 3)
2248                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2249         else
2250                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2251
2252         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
2253                 if (adapter->tx_itr_setting <= 3)
2254                         ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2255                 else
2256                         ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2257         }
2258
2259         return 0;
2260 }
2261
2262 static int igb_nway_reset(struct net_device *netdev)
2263 {
2264         struct igb_adapter *adapter = netdev_priv(netdev);
2265         if (netif_running(netdev))
2266                 igb_reinit_locked(adapter);
2267         return 0;
2268 }
2269
2270 static int igb_get_sset_count(struct net_device *netdev, int sset)
2271 {
2272         switch (sset) {
2273         case ETH_SS_STATS:
2274                 return IGB_STATS_LEN;
2275         case ETH_SS_TEST:
2276                 return IGB_TEST_LEN;
2277         default:
2278                 return -ENOTSUPP;
2279         }
2280 }
2281
2282 static void igb_get_ethtool_stats(struct net_device *netdev,
2283                                   struct ethtool_stats *stats, u64 *data)
2284 {
2285         struct igb_adapter *adapter = netdev_priv(netdev);
2286         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
2287         unsigned int start;
2288         struct igb_ring *ring;
2289         int i, j;
2290         char *p;
2291
2292         spin_lock(&adapter->stats64_lock);
2293         igb_update_stats(adapter, net_stats);
2294
2295         for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2296                 p = (char *)adapter + igb_gstrings_stats[i].stat_offset;
2297                 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
2298                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2299         }
2300         for (j = 0; j < IGB_NETDEV_STATS_LEN; j++, i++) {
2301                 p = (char *)net_stats + igb_gstrings_net_stats[j].stat_offset;
2302                 data[i] = (igb_gstrings_net_stats[j].sizeof_stat ==
2303                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2304         }
2305         for (j = 0; j < adapter->num_tx_queues; j++) {
2306                 u64     restart2;
2307
2308                 ring = adapter->tx_ring[j];
2309                 do {
2310                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
2311                         data[i]   = ring->tx_stats.packets;
2312                         data[i+1] = ring->tx_stats.bytes;
2313                         data[i+2] = ring->tx_stats.restart_queue;
2314                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
2315                 do {
2316                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp2);
2317                         restart2  = ring->tx_stats.restart_queue2;
2318                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp2, start));
2319                 data[i+2] += restart2;
2320
2321                 i += IGB_TX_QUEUE_STATS_LEN;
2322         }
2323         for (j = 0; j < adapter->num_rx_queues; j++) {
2324                 ring = adapter->rx_ring[j];
2325                 do {
2326                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
2327                         data[i]   = ring->rx_stats.packets;
2328                         data[i+1] = ring->rx_stats.bytes;
2329                         data[i+2] = ring->rx_stats.drops;
2330                         data[i+3] = ring->rx_stats.csum_err;
2331                         data[i+4] = ring->rx_stats.alloc_failed;
2332                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
2333                 i += IGB_RX_QUEUE_STATS_LEN;
2334         }
2335         spin_unlock(&adapter->stats64_lock);
2336 }
2337
2338 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2339 {
2340         struct igb_adapter *adapter = netdev_priv(netdev);
2341         u8 *p = data;
2342         int i;
2343
2344         switch (stringset) {
2345         case ETH_SS_TEST:
2346                 memcpy(data, *igb_gstrings_test,
2347                         IGB_TEST_LEN*ETH_GSTRING_LEN);
2348                 break;
2349         case ETH_SS_STATS:
2350                 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2351                         memcpy(p, igb_gstrings_stats[i].stat_string,
2352                                ETH_GSTRING_LEN);
2353                         p += ETH_GSTRING_LEN;
2354                 }
2355                 for (i = 0; i < IGB_NETDEV_STATS_LEN; i++) {
2356                         memcpy(p, igb_gstrings_net_stats[i].stat_string,
2357                                ETH_GSTRING_LEN);
2358                         p += ETH_GSTRING_LEN;
2359                 }
2360                 for (i = 0; i < adapter->num_tx_queues; i++) {
2361                         sprintf(p, "tx_queue_%u_packets", i);
2362                         p += ETH_GSTRING_LEN;
2363                         sprintf(p, "tx_queue_%u_bytes", i);
2364                         p += ETH_GSTRING_LEN;
2365                         sprintf(p, "tx_queue_%u_restart", i);
2366                         p += ETH_GSTRING_LEN;
2367                 }
2368                 for (i = 0; i < adapter->num_rx_queues; i++) {
2369                         sprintf(p, "rx_queue_%u_packets", i);
2370                         p += ETH_GSTRING_LEN;
2371                         sprintf(p, "rx_queue_%u_bytes", i);
2372                         p += ETH_GSTRING_LEN;
2373                         sprintf(p, "rx_queue_%u_drops", i);
2374                         p += ETH_GSTRING_LEN;
2375                         sprintf(p, "rx_queue_%u_csum_err", i);
2376                         p += ETH_GSTRING_LEN;
2377                         sprintf(p, "rx_queue_%u_alloc_failed", i);
2378                         p += ETH_GSTRING_LEN;
2379                 }
2380                 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2381                 break;
2382         }
2383 }
2384
2385 static int igb_get_ts_info(struct net_device *dev,
2386                            struct ethtool_ts_info *info)
2387 {
2388         struct igb_adapter *adapter = netdev_priv(dev);
2389
2390         if (adapter->ptp_clock)
2391                 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2392         else
2393                 info->phc_index = -1;
2394
2395         switch (adapter->hw.mac.type) {
2396         case e1000_82575:
2397                 info->so_timestamping =
2398                         SOF_TIMESTAMPING_TX_SOFTWARE |
2399                         SOF_TIMESTAMPING_RX_SOFTWARE |
2400                         SOF_TIMESTAMPING_SOFTWARE;
2401                 return 0;
2402         case e1000_82576:
2403         case e1000_82580:
2404         case e1000_i350:
2405         case e1000_i354:
2406         case e1000_i210:
2407         case e1000_i211:
2408                 info->so_timestamping =
2409                         SOF_TIMESTAMPING_TX_SOFTWARE |
2410                         SOF_TIMESTAMPING_RX_SOFTWARE |
2411                         SOF_TIMESTAMPING_SOFTWARE |
2412                         SOF_TIMESTAMPING_TX_HARDWARE |
2413                         SOF_TIMESTAMPING_RX_HARDWARE |
2414                         SOF_TIMESTAMPING_RAW_HARDWARE;
2415
2416                 info->tx_types =
2417                         BIT(HWTSTAMP_TX_OFF) |
2418                         BIT(HWTSTAMP_TX_ON);
2419
2420                 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE);
2421
2422                 /* 82576 does not support timestamping all packets. */
2423                 if (adapter->hw.mac.type >= e1000_82580)
2424                         info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL);
2425                 else
2426                         info->rx_filters |=
2427                                 BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2428                                 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2429                                 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
2430
2431                 return 0;
2432         default:
2433                 return -EOPNOTSUPP;
2434         }
2435 }
2436
2437 #define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
2438 static int igb_get_ethtool_nfc_entry(struct igb_adapter *adapter,
2439                                      struct ethtool_rxnfc *cmd)
2440 {
2441         struct ethtool_rx_flow_spec *fsp = &cmd->fs;
2442         struct igb_nfc_filter *rule = NULL;
2443
2444         /* report total rule count */
2445         cmd->data = IGB_MAX_RXNFC_FILTERS;
2446
2447         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2448                 if (fsp->location <= rule->sw_idx)
2449                         break;
2450         }
2451
2452         if (!rule || fsp->location != rule->sw_idx)
2453                 return -EINVAL;
2454
2455         if (rule->filter.match_flags) {
2456                 fsp->flow_type = ETHER_FLOW;
2457                 fsp->ring_cookie = rule->action;
2458                 if (rule->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE) {
2459                         fsp->h_u.ether_spec.h_proto = rule->filter.etype;
2460                         fsp->m_u.ether_spec.h_proto = ETHER_TYPE_FULL_MASK;
2461                 }
2462                 if (rule->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI) {
2463                         fsp->flow_type |= FLOW_EXT;
2464                         fsp->h_ext.vlan_tci = rule->filter.vlan_tci;
2465                         fsp->m_ext.vlan_tci = htons(VLAN_PRIO_MASK);
2466                 }
2467                 return 0;
2468         }
2469         return -EINVAL;
2470 }
2471
2472 static int igb_get_ethtool_nfc_all(struct igb_adapter *adapter,
2473                                    struct ethtool_rxnfc *cmd,
2474                                    u32 *rule_locs)
2475 {
2476         struct igb_nfc_filter *rule;
2477         int cnt = 0;
2478
2479         /* report total rule count */
2480         cmd->data = IGB_MAX_RXNFC_FILTERS;
2481
2482         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2483                 if (cnt == cmd->rule_cnt)
2484                         return -EMSGSIZE;
2485                 rule_locs[cnt] = rule->sw_idx;
2486                 cnt++;
2487         }
2488
2489         cmd->rule_cnt = cnt;
2490
2491         return 0;
2492 }
2493
2494 static int igb_get_rss_hash_opts(struct igb_adapter *adapter,
2495                                  struct ethtool_rxnfc *cmd)
2496 {
2497         cmd->data = 0;
2498
2499         /* Report default options for RSS on igb */
2500         switch (cmd->flow_type) {
2501         case TCP_V4_FLOW:
2502                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2503                 /* Fall through */
2504         case UDP_V4_FLOW:
2505                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2506                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2507                 /* Fall through */
2508         case SCTP_V4_FLOW:
2509         case AH_ESP_V4_FLOW:
2510         case AH_V4_FLOW:
2511         case ESP_V4_FLOW:
2512         case IPV4_FLOW:
2513                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2514                 break;
2515         case TCP_V6_FLOW:
2516                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2517                 /* Fall through */
2518         case UDP_V6_FLOW:
2519                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2520                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2521                 /* Fall through */
2522         case SCTP_V6_FLOW:
2523         case AH_ESP_V6_FLOW:
2524         case AH_V6_FLOW:
2525         case ESP_V6_FLOW:
2526         case IPV6_FLOW:
2527                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2528                 break;
2529         default:
2530                 return -EINVAL;
2531         }
2532
2533         return 0;
2534 }
2535
2536 static int igb_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2537                          u32 *rule_locs)
2538 {
2539         struct igb_adapter *adapter = netdev_priv(dev);
2540         int ret = -EOPNOTSUPP;
2541
2542         switch (cmd->cmd) {
2543         case ETHTOOL_GRXRINGS:
2544                 cmd->data = adapter->num_rx_queues;
2545                 ret = 0;
2546                 break;
2547         case ETHTOOL_GRXCLSRLCNT:
2548                 cmd->rule_cnt = adapter->nfc_filter_count;
2549                 ret = 0;
2550                 break;
2551         case ETHTOOL_GRXCLSRULE:
2552                 ret = igb_get_ethtool_nfc_entry(adapter, cmd);
2553                 break;
2554         case ETHTOOL_GRXCLSRLALL:
2555                 ret = igb_get_ethtool_nfc_all(adapter, cmd, rule_locs);
2556                 break;
2557         case ETHTOOL_GRXFH:
2558                 ret = igb_get_rss_hash_opts(adapter, cmd);
2559                 break;
2560         default:
2561                 break;
2562         }
2563
2564         return ret;
2565 }
2566
2567 #define UDP_RSS_FLAGS (IGB_FLAG_RSS_FIELD_IPV4_UDP | \
2568                        IGB_FLAG_RSS_FIELD_IPV6_UDP)
2569 static int igb_set_rss_hash_opt(struct igb_adapter *adapter,
2570                                 struct ethtool_rxnfc *nfc)
2571 {
2572         u32 flags = adapter->flags;
2573
2574         /* RSS does not support anything other than hashing
2575          * to queues on src and dst IPs and ports
2576          */
2577         if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2578                           RXH_L4_B_0_1 | RXH_L4_B_2_3))
2579                 return -EINVAL;
2580
2581         switch (nfc->flow_type) {
2582         case TCP_V4_FLOW:
2583         case TCP_V6_FLOW:
2584                 if (!(nfc->data & RXH_IP_SRC) ||
2585                     !(nfc->data & RXH_IP_DST) ||
2586                     !(nfc->data & RXH_L4_B_0_1) ||
2587                     !(nfc->data & RXH_L4_B_2_3))
2588                         return -EINVAL;
2589                 break;
2590         case UDP_V4_FLOW:
2591                 if (!(nfc->data & RXH_IP_SRC) ||
2592                     !(nfc->data & RXH_IP_DST))
2593                         return -EINVAL;
2594                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2595                 case 0:
2596                         flags &= ~IGB_FLAG_RSS_FIELD_IPV4_UDP;
2597                         break;
2598                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2599                         flags |= IGB_FLAG_RSS_FIELD_IPV4_UDP;
2600                         break;
2601                 default:
2602                         return -EINVAL;
2603                 }
2604                 break;
2605         case UDP_V6_FLOW:
2606                 if (!(nfc->data & RXH_IP_SRC) ||
2607                     !(nfc->data & RXH_IP_DST))
2608                         return -EINVAL;
2609                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2610                 case 0:
2611                         flags &= ~IGB_FLAG_RSS_FIELD_IPV6_UDP;
2612                         break;
2613                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2614                         flags |= IGB_FLAG_RSS_FIELD_IPV6_UDP;
2615                         break;
2616                 default:
2617                         return -EINVAL;
2618                 }
2619                 break;
2620         case AH_ESP_V4_FLOW:
2621         case AH_V4_FLOW:
2622         case ESP_V4_FLOW:
2623         case SCTP_V4_FLOW:
2624         case AH_ESP_V6_FLOW:
2625         case AH_V6_FLOW:
2626         case ESP_V6_FLOW:
2627         case SCTP_V6_FLOW:
2628                 if (!(nfc->data & RXH_IP_SRC) ||
2629                     !(nfc->data & RXH_IP_DST) ||
2630                     (nfc->data & RXH_L4_B_0_1) ||
2631                     (nfc->data & RXH_L4_B_2_3))
2632                         return -EINVAL;
2633                 break;
2634         default:
2635                 return -EINVAL;
2636         }
2637
2638         /* if we changed something we need to update flags */
2639         if (flags != adapter->flags) {
2640                 struct e1000_hw *hw = &adapter->hw;
2641                 u32 mrqc = rd32(E1000_MRQC);
2642
2643                 if ((flags & UDP_RSS_FLAGS) &&
2644                     !(adapter->flags & UDP_RSS_FLAGS))
2645                         dev_err(&adapter->pdev->dev,
2646                                 "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2647
2648                 adapter->flags = flags;
2649
2650                 /* Perform hash on these packet types */
2651                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4 |
2652                         E1000_MRQC_RSS_FIELD_IPV4_TCP |
2653                         E1000_MRQC_RSS_FIELD_IPV6 |
2654                         E1000_MRQC_RSS_FIELD_IPV6_TCP;
2655
2656                 mrqc &= ~(E1000_MRQC_RSS_FIELD_IPV4_UDP |
2657                           E1000_MRQC_RSS_FIELD_IPV6_UDP);
2658
2659                 if (flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2660                         mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
2661
2662                 if (flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2663                         mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
2664
2665                 wr32(E1000_MRQC, mrqc);
2666         }
2667
2668         return 0;
2669 }
2670
2671 static int igb_rxnfc_write_etype_filter(struct igb_adapter *adapter,
2672                                         struct igb_nfc_filter *input)
2673 {
2674         struct e1000_hw *hw = &adapter->hw;
2675         u8 i;
2676         u32 etqf;
2677         u16 etype;
2678
2679         /* find an empty etype filter register */
2680         for (i = 0; i < MAX_ETYPE_FILTER; ++i) {
2681                 if (!adapter->etype_bitmap[i])
2682                         break;
2683         }
2684         if (i == MAX_ETYPE_FILTER) {
2685                 dev_err(&adapter->pdev->dev, "ethtool -N: etype filters are all used.\n");
2686                 return -EINVAL;
2687         }
2688
2689         adapter->etype_bitmap[i] = true;
2690
2691         etqf = rd32(E1000_ETQF(i));
2692         etype = ntohs(input->filter.etype & ETHER_TYPE_FULL_MASK);
2693
2694         etqf |= E1000_ETQF_FILTER_ENABLE;
2695         etqf &= ~E1000_ETQF_ETYPE_MASK;
2696         etqf |= (etype & E1000_ETQF_ETYPE_MASK);
2697
2698         etqf &= ~E1000_ETQF_QUEUE_MASK;
2699         etqf |= ((input->action << E1000_ETQF_QUEUE_SHIFT)
2700                 & E1000_ETQF_QUEUE_MASK);
2701         etqf |= E1000_ETQF_QUEUE_ENABLE;
2702
2703         wr32(E1000_ETQF(i), etqf);
2704
2705         input->etype_reg_index = i;
2706
2707         return 0;
2708 }
2709
2710 static int igb_rxnfc_write_vlan_prio_filter(struct igb_adapter *adapter,
2711                                             struct igb_nfc_filter *input)
2712 {
2713         struct e1000_hw *hw = &adapter->hw;
2714         u8 vlan_priority;
2715         u16 queue_index;
2716         u32 vlapqf;
2717
2718         vlapqf = rd32(E1000_VLAPQF);
2719         vlan_priority = (ntohs(input->filter.vlan_tci) & VLAN_PRIO_MASK)
2720                                 >> VLAN_PRIO_SHIFT;
2721         queue_index = (vlapqf >> (vlan_priority * 4)) & E1000_VLAPQF_QUEUE_MASK;
2722
2723         /* check whether this vlan prio is already set */
2724         if ((vlapqf & E1000_VLAPQF_P_VALID(vlan_priority)) &&
2725             (queue_index != input->action)) {
2726                 dev_err(&adapter->pdev->dev, "ethtool rxnfc set vlan prio filter failed.\n");
2727                 return -EEXIST;
2728         }
2729
2730         vlapqf |= E1000_VLAPQF_P_VALID(vlan_priority);
2731         vlapqf |= E1000_VLAPQF_QUEUE_SEL(vlan_priority, input->action);
2732
2733         wr32(E1000_VLAPQF, vlapqf);
2734
2735         return 0;
2736 }
2737
2738 int igb_add_filter(struct igb_adapter *adapter, struct igb_nfc_filter *input)
2739 {
2740         int err = -EINVAL;
2741
2742         if (input->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE) {
2743                 err = igb_rxnfc_write_etype_filter(adapter, input);
2744                 if (err)
2745                         return err;
2746         }
2747
2748         if (input->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI)
2749                 err = igb_rxnfc_write_vlan_prio_filter(adapter, input);
2750
2751         return err;
2752 }
2753
2754 static void igb_clear_etype_filter_regs(struct igb_adapter *adapter,
2755                                         u16 reg_index)
2756 {
2757         struct e1000_hw *hw = &adapter->hw;
2758         u32 etqf = rd32(E1000_ETQF(reg_index));
2759
2760         etqf &= ~E1000_ETQF_QUEUE_ENABLE;
2761         etqf &= ~E1000_ETQF_QUEUE_MASK;
2762         etqf &= ~E1000_ETQF_FILTER_ENABLE;
2763
2764         wr32(E1000_ETQF(reg_index), etqf);
2765
2766         adapter->etype_bitmap[reg_index] = false;
2767 }
2768
2769 static void igb_clear_vlan_prio_filter(struct igb_adapter *adapter,
2770                                        u16 vlan_tci)
2771 {
2772         struct e1000_hw *hw = &adapter->hw;
2773         u8 vlan_priority;
2774         u32 vlapqf;
2775
2776         vlan_priority = (vlan_tci & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
2777
2778         vlapqf = rd32(E1000_VLAPQF);
2779         vlapqf &= ~E1000_VLAPQF_P_VALID(vlan_priority);
2780         vlapqf &= ~E1000_VLAPQF_QUEUE_SEL(vlan_priority,
2781                                                 E1000_VLAPQF_QUEUE_MASK);
2782
2783         wr32(E1000_VLAPQF, vlapqf);
2784 }
2785
2786 int igb_erase_filter(struct igb_adapter *adapter, struct igb_nfc_filter *input)
2787 {
2788         if (input->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE)
2789                 igb_clear_etype_filter_regs(adapter,
2790                                             input->etype_reg_index);
2791
2792         if (input->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI)
2793                 igb_clear_vlan_prio_filter(adapter,
2794                                            ntohs(input->filter.vlan_tci));
2795
2796         return 0;
2797 }
2798
2799 static int igb_update_ethtool_nfc_entry(struct igb_adapter *adapter,
2800                                         struct igb_nfc_filter *input,
2801                                         u16 sw_idx)
2802 {
2803         struct igb_nfc_filter *rule, *parent;
2804         int err = -EINVAL;
2805
2806         parent = NULL;
2807         rule = NULL;
2808
2809         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2810                 /* hash found, or no matching entry */
2811                 if (rule->sw_idx >= sw_idx)
2812                         break;
2813                 parent = rule;
2814         }
2815
2816         /* if there is an old rule occupying our place remove it */
2817         if (rule && (rule->sw_idx == sw_idx)) {
2818                 if (!input)
2819                         err = igb_erase_filter(adapter, rule);
2820
2821                 hlist_del(&rule->nfc_node);
2822                 kfree(rule);
2823                 adapter->nfc_filter_count--;
2824         }
2825
2826         /* If no input this was a delete, err should be 0 if a rule was
2827          * successfully found and removed from the list else -EINVAL
2828          */
2829         if (!input)
2830                 return err;
2831
2832         /* initialize node */
2833         INIT_HLIST_NODE(&input->nfc_node);
2834
2835         /* add filter to the list */
2836         if (parent)
2837                 hlist_add_behind(&parent->nfc_node, &input->nfc_node);
2838         else
2839                 hlist_add_head(&input->nfc_node, &adapter->nfc_filter_list);
2840
2841         /* update counts */
2842         adapter->nfc_filter_count++;
2843
2844         return 0;
2845 }
2846
2847 static int igb_add_ethtool_nfc_entry(struct igb_adapter *adapter,
2848                                      struct ethtool_rxnfc *cmd)
2849 {
2850         struct net_device *netdev = adapter->netdev;
2851         struct ethtool_rx_flow_spec *fsp =
2852                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2853         struct igb_nfc_filter *input, *rule;
2854         int err = 0;
2855
2856         if (!(netdev->hw_features & NETIF_F_NTUPLE))
2857                 return -EOPNOTSUPP;
2858
2859         /* Don't allow programming if the action is a queue greater than
2860          * the number of online Rx queues.
2861          */
2862         if ((fsp->ring_cookie == RX_CLS_FLOW_DISC) ||
2863             (fsp->ring_cookie >= adapter->num_rx_queues)) {
2864                 dev_err(&adapter->pdev->dev, "ethtool -N: The specified action is invalid\n");
2865                 return -EINVAL;
2866         }
2867
2868         /* Don't allow indexes to exist outside of available space */
2869         if (fsp->location >= IGB_MAX_RXNFC_FILTERS) {
2870                 dev_err(&adapter->pdev->dev, "Location out of range\n");
2871                 return -EINVAL;
2872         }
2873
2874         if ((fsp->flow_type & ~FLOW_EXT) != ETHER_FLOW)
2875                 return -EINVAL;
2876
2877         if (fsp->m_u.ether_spec.h_proto != ETHER_TYPE_FULL_MASK &&
2878             fsp->m_ext.vlan_tci != htons(VLAN_PRIO_MASK))
2879                 return -EINVAL;
2880
2881         input = kzalloc(sizeof(*input), GFP_KERNEL);
2882         if (!input)
2883                 return -ENOMEM;
2884
2885         if (fsp->m_u.ether_spec.h_proto == ETHER_TYPE_FULL_MASK) {
2886                 input->filter.etype = fsp->h_u.ether_spec.h_proto;
2887                 input->filter.match_flags = IGB_FILTER_FLAG_ETHER_TYPE;
2888         }
2889
2890         if ((fsp->flow_type & FLOW_EXT) && fsp->m_ext.vlan_tci) {
2891                 if (fsp->m_ext.vlan_tci != htons(VLAN_PRIO_MASK)) {
2892                         err = -EINVAL;
2893                         goto err_out;
2894                 }
2895                 input->filter.vlan_tci = fsp->h_ext.vlan_tci;
2896                 input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI;
2897         }
2898
2899         input->action = fsp->ring_cookie;
2900         input->sw_idx = fsp->location;
2901
2902         spin_lock(&adapter->nfc_lock);
2903
2904         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2905                 if (!memcmp(&input->filter, &rule->filter,
2906                             sizeof(input->filter))) {
2907                         err = -EEXIST;
2908                         dev_err(&adapter->pdev->dev,
2909                                 "ethtool: this filter is already set\n");
2910                         goto err_out_w_lock;
2911                 }
2912         }
2913
2914         err = igb_add_filter(adapter, input);
2915         if (err)
2916                 goto err_out_w_lock;
2917
2918         igb_update_ethtool_nfc_entry(adapter, input, input->sw_idx);
2919
2920         spin_unlock(&adapter->nfc_lock);
2921         return 0;
2922
2923 err_out_w_lock:
2924         spin_unlock(&adapter->nfc_lock);
2925 err_out:
2926         kfree(input);
2927         return err;
2928 }
2929
2930 static int igb_del_ethtool_nfc_entry(struct igb_adapter *adapter,
2931                                      struct ethtool_rxnfc *cmd)
2932 {
2933         struct ethtool_rx_flow_spec *fsp =
2934                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2935         int err;
2936
2937         spin_lock(&adapter->nfc_lock);
2938         err = igb_update_ethtool_nfc_entry(adapter, NULL, fsp->location);
2939         spin_unlock(&adapter->nfc_lock);
2940
2941         return err;
2942 }
2943
2944 static int igb_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2945 {
2946         struct igb_adapter *adapter = netdev_priv(dev);
2947         int ret = -EOPNOTSUPP;
2948
2949         switch (cmd->cmd) {
2950         case ETHTOOL_SRXFH:
2951                 ret = igb_set_rss_hash_opt(adapter, cmd);
2952                 break;
2953         case ETHTOOL_SRXCLSRLINS:
2954                 ret = igb_add_ethtool_nfc_entry(adapter, cmd);
2955                 break;
2956         case ETHTOOL_SRXCLSRLDEL:
2957                 ret = igb_del_ethtool_nfc_entry(adapter, cmd);
2958         default:
2959                 break;
2960         }
2961
2962         return ret;
2963 }
2964
2965 static int igb_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
2966 {
2967         struct igb_adapter *adapter = netdev_priv(netdev);
2968         struct e1000_hw *hw = &adapter->hw;
2969         u32 ret_val;
2970         u16 phy_data;
2971
2972         if ((hw->mac.type < e1000_i350) ||
2973             (hw->phy.media_type != e1000_media_type_copper))
2974                 return -EOPNOTSUPP;
2975
2976         edata->supported = (SUPPORTED_1000baseT_Full |
2977                             SUPPORTED_100baseT_Full);
2978         if (!hw->dev_spec._82575.eee_disable)
2979                 edata->advertised =
2980                         mmd_eee_adv_to_ethtool_adv_t(adapter->eee_advert);
2981
2982         /* The IPCNFG and EEER registers are not supported on I354. */
2983         if (hw->mac.type == e1000_i354) {
2984                 igb_get_eee_status_i354(hw, (bool *)&edata->eee_active);
2985         } else {
2986                 u32 eeer;
2987
2988                 eeer = rd32(E1000_EEER);
2989
2990                 /* EEE status on negotiated link */
2991                 if (eeer & E1000_EEER_EEE_NEG)
2992                         edata->eee_active = true;
2993
2994                 if (eeer & E1000_EEER_TX_LPI_EN)
2995                         edata->tx_lpi_enabled = true;
2996         }
2997
2998         /* EEE Link Partner Advertised */
2999         switch (hw->mac.type) {
3000         case e1000_i350:
3001                 ret_val = igb_read_emi_reg(hw, E1000_EEE_LP_ADV_ADDR_I350,
3002                                            &phy_data);
3003                 if (ret_val)
3004                         return -ENODATA;
3005
3006                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
3007                 break;
3008         case e1000_i354:
3009         case e1000_i210:
3010         case e1000_i211:
3011                 ret_val = igb_read_xmdio_reg(hw, E1000_EEE_LP_ADV_ADDR_I210,
3012                                              E1000_EEE_LP_ADV_DEV_I210,
3013                                              &phy_data);
3014                 if (ret_val)
3015                         return -ENODATA;
3016
3017                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
3018
3019                 break;
3020         default:
3021                 break;
3022         }
3023
3024         edata->eee_enabled = !hw->dev_spec._82575.eee_disable;
3025
3026         if ((hw->mac.type == e1000_i354) &&
3027             (edata->eee_enabled))
3028                 edata->tx_lpi_enabled = true;
3029
3030         /* Report correct negotiated EEE status for devices that
3031          * wrongly report EEE at half-duplex
3032          */
3033         if (adapter->link_duplex == HALF_DUPLEX) {
3034                 edata->eee_enabled = false;
3035                 edata->eee_active = false;
3036                 edata->tx_lpi_enabled = false;
3037                 edata->advertised &= ~edata->advertised;
3038         }
3039
3040         return 0;
3041 }
3042
3043 static int igb_set_eee(struct net_device *netdev,
3044                        struct ethtool_eee *edata)
3045 {
3046         struct igb_adapter *adapter = netdev_priv(netdev);
3047         struct e1000_hw *hw = &adapter->hw;
3048         struct ethtool_eee eee_curr;
3049         bool adv1g_eee = true, adv100m_eee = true;
3050         s32 ret_val;
3051
3052         if ((hw->mac.type < e1000_i350) ||
3053             (hw->phy.media_type != e1000_media_type_copper))
3054                 return -EOPNOTSUPP;
3055
3056         memset(&eee_curr, 0, sizeof(struct ethtool_eee));
3057
3058         ret_val = igb_get_eee(netdev, &eee_curr);
3059         if (ret_val)
3060                 return ret_val;
3061
3062         if (eee_curr.eee_enabled) {
3063                 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
3064                         dev_err(&adapter->pdev->dev,
3065                                 "Setting EEE tx-lpi is not supported\n");
3066                         return -EINVAL;
3067                 }
3068
3069                 /* Tx LPI timer is not implemented currently */
3070                 if (edata->tx_lpi_timer) {
3071                         dev_err(&adapter->pdev->dev,
3072                                 "Setting EEE Tx LPI timer is not supported\n");
3073                         return -EINVAL;
3074                 }
3075
3076                 if (!edata->advertised || (edata->advertised &
3077                     ~(ADVERTISE_100_FULL | ADVERTISE_1000_FULL))) {
3078                         dev_err(&adapter->pdev->dev,
3079                                 "EEE Advertisement supports only 100Tx and/or 100T full duplex\n");
3080                         return -EINVAL;
3081                 }
3082                 adv100m_eee = !!(edata->advertised & ADVERTISE_100_FULL);
3083                 adv1g_eee = !!(edata->advertised & ADVERTISE_1000_FULL);
3084
3085         } else if (!edata->eee_enabled) {
3086                 dev_err(&adapter->pdev->dev,
3087                         "Setting EEE options are not supported with EEE disabled\n");
3088                         return -EINVAL;
3089                 }
3090
3091         adapter->eee_advert = ethtool_adv_to_mmd_eee_adv_t(edata->advertised);
3092         if (hw->dev_spec._82575.eee_disable != !edata->eee_enabled) {
3093                 hw->dev_spec._82575.eee_disable = !edata->eee_enabled;
3094                 adapter->flags |= IGB_FLAG_EEE;
3095
3096                 /* reset link */
3097                 if (netif_running(netdev))
3098                         igb_reinit_locked(adapter);
3099                 else
3100                         igb_reset(adapter);
3101         }
3102
3103         if (hw->mac.type == e1000_i354)
3104                 ret_val = igb_set_eee_i354(hw, adv1g_eee, adv100m_eee);
3105         else
3106                 ret_val = igb_set_eee_i350(hw, adv1g_eee, adv100m_eee);
3107
3108         if (ret_val) {
3109                 dev_err(&adapter->pdev->dev,
3110                         "Problem setting EEE advertisement options\n");
3111                 return -EINVAL;
3112         }
3113
3114         return 0;
3115 }
3116
3117 static int igb_get_module_info(struct net_device *netdev,
3118                                struct ethtool_modinfo *modinfo)
3119 {
3120         struct igb_adapter *adapter = netdev_priv(netdev);
3121         struct e1000_hw *hw = &adapter->hw;
3122         u32 status = 0;
3123         u16 sff8472_rev, addr_mode;
3124         bool page_swap = false;
3125
3126         if ((hw->phy.media_type == e1000_media_type_copper) ||
3127             (hw->phy.media_type == e1000_media_type_unknown))
3128                 return -EOPNOTSUPP;
3129
3130         /* Check whether we support SFF-8472 or not */
3131         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_COMP, &sff8472_rev);
3132         if (status)
3133                 return -EIO;
3134
3135         /* addressing mode is not supported */
3136         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_SWAP, &addr_mode);
3137         if (status)
3138                 return -EIO;
3139
3140         /* addressing mode is not supported */
3141         if ((addr_mode & 0xFF) & IGB_SFF_ADDRESSING_MODE) {
3142                 hw_dbg("Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
3143                 page_swap = true;
3144         }
3145
3146         if ((sff8472_rev & 0xFF) == IGB_SFF_8472_UNSUP || page_swap) {
3147                 /* We have an SFP, but it does not support SFF-8472 */
3148                 modinfo->type = ETH_MODULE_SFF_8079;
3149                 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
3150         } else {
3151                 /* We have an SFP which supports a revision of SFF-8472 */
3152                 modinfo->type = ETH_MODULE_SFF_8472;
3153                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
3154         }
3155
3156         return 0;
3157 }
3158
3159 static int igb_get_module_eeprom(struct net_device *netdev,
3160                                  struct ethtool_eeprom *ee, u8 *data)
3161 {
3162         struct igb_adapter *adapter = netdev_priv(netdev);
3163         struct e1000_hw *hw = &adapter->hw;
3164         u32 status = 0;
3165         u16 *dataword;
3166         u16 first_word, last_word;
3167         int i = 0;
3168
3169         if (ee->len == 0)
3170                 return -EINVAL;
3171
3172         first_word = ee->offset >> 1;
3173         last_word = (ee->offset + ee->len - 1) >> 1;
3174
3175         dataword = kmalloc(sizeof(u16) * (last_word - first_word + 1),
3176                            GFP_KERNEL);
3177         if (!dataword)
3178                 return -ENOMEM;
3179
3180         /* Read EEPROM block, SFF-8079/SFF-8472, word at a time */
3181         for (i = 0; i < last_word - first_word + 1; i++) {
3182                 status = igb_read_phy_reg_i2c(hw, (first_word + i) * 2,
3183                                               &dataword[i]);
3184                 if (status) {
3185                         /* Error occurred while reading module */
3186                         kfree(dataword);
3187                         return -EIO;
3188                 }
3189
3190                 be16_to_cpus(&dataword[i]);
3191         }
3192
3193         memcpy(data, (u8 *)dataword + (ee->offset & 1), ee->len);
3194         kfree(dataword);
3195
3196         return 0;
3197 }
3198
3199 static int igb_ethtool_begin(struct net_device *netdev)
3200 {
3201         struct igb_adapter *adapter = netdev_priv(netdev);
3202         pm_runtime_get_sync(&adapter->pdev->dev);
3203         return 0;
3204 }
3205
3206 static void igb_ethtool_complete(struct net_device *netdev)
3207 {
3208         struct igb_adapter *adapter = netdev_priv(netdev);
3209         pm_runtime_put(&adapter->pdev->dev);
3210 }
3211
3212 static u32 igb_get_rxfh_indir_size(struct net_device *netdev)
3213 {
3214         return IGB_RETA_SIZE;
3215 }
3216
3217 static int igb_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
3218                         u8 *hfunc)
3219 {
3220         struct igb_adapter *adapter = netdev_priv(netdev);
3221         int i;
3222
3223         if (hfunc)
3224                 *hfunc = ETH_RSS_HASH_TOP;
3225         if (!indir)
3226                 return 0;
3227         for (i = 0; i < IGB_RETA_SIZE; i++)
3228                 indir[i] = adapter->rss_indir_tbl[i];
3229
3230         return 0;
3231 }
3232
3233 void igb_write_rss_indir_tbl(struct igb_adapter *adapter)
3234 {
3235         struct e1000_hw *hw = &adapter->hw;
3236         u32 reg = E1000_RETA(0);
3237         u32 shift = 0;
3238         int i = 0;
3239
3240         switch (hw->mac.type) {
3241         case e1000_82575:
3242                 shift = 6;
3243                 break;
3244         case e1000_82576:
3245                 /* 82576 supports 2 RSS queues for SR-IOV */
3246                 if (adapter->vfs_allocated_count)
3247                         shift = 3;
3248                 break;
3249         default:
3250                 break;
3251         }
3252
3253         while (i < IGB_RETA_SIZE) {
3254                 u32 val = 0;
3255                 int j;
3256
3257                 for (j = 3; j >= 0; j--) {
3258                         val <<= 8;
3259                         val |= adapter->rss_indir_tbl[i + j];
3260                 }
3261
3262                 wr32(reg, val << shift);
3263                 reg += 4;
3264                 i += 4;
3265         }
3266 }
3267
3268 static int igb_set_rxfh(struct net_device *netdev, const u32 *indir,
3269                         const u8 *key, const u8 hfunc)
3270 {
3271         struct igb_adapter *adapter = netdev_priv(netdev);
3272         struct e1000_hw *hw = &adapter->hw;
3273         int i;
3274         u32 num_queues;
3275
3276         /* We do not allow change in unsupported parameters */
3277         if (key ||
3278             (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP))
3279                 return -EOPNOTSUPP;
3280         if (!indir)
3281                 return 0;
3282
3283         num_queues = adapter->rss_queues;
3284
3285         switch (hw->mac.type) {
3286         case e1000_82576:
3287                 /* 82576 supports 2 RSS queues for SR-IOV */
3288                 if (adapter->vfs_allocated_count)
3289                         num_queues = 2;
3290                 break;
3291         default:
3292                 break;
3293         }
3294
3295         /* Verify user input. */
3296         for (i = 0; i < IGB_RETA_SIZE; i++)
3297                 if (indir[i] >= num_queues)
3298                         return -EINVAL;
3299
3300
3301         for (i = 0; i < IGB_RETA_SIZE; i++)
3302                 adapter->rss_indir_tbl[i] = indir[i];
3303
3304         igb_write_rss_indir_tbl(adapter);
3305
3306         return 0;
3307 }
3308
3309 static unsigned int igb_max_channels(struct igb_adapter *adapter)
3310 {
3311         struct e1000_hw *hw = &adapter->hw;
3312         unsigned int max_combined = 0;
3313
3314         switch (hw->mac.type) {
3315         case e1000_i211:
3316                 max_combined = IGB_MAX_RX_QUEUES_I211;
3317                 break;
3318         case e1000_82575:
3319         case e1000_i210:
3320                 max_combined = IGB_MAX_RX_QUEUES_82575;
3321                 break;
3322         case e1000_i350:
3323                 if (!!adapter->vfs_allocated_count) {
3324                         max_combined = 1;
3325                         break;
3326                 }
3327                 /* fall through */
3328         case e1000_82576:
3329                 if (!!adapter->vfs_allocated_count) {
3330                         max_combined = 2;
3331                         break;
3332                 }
3333                 /* fall through */
3334         case e1000_82580:
3335         case e1000_i354:
3336         default:
3337                 max_combined = IGB_MAX_RX_QUEUES;
3338                 break;
3339         }
3340
3341         return max_combined;
3342 }
3343
3344 static void igb_get_channels(struct net_device *netdev,
3345                              struct ethtool_channels *ch)
3346 {
3347         struct igb_adapter *adapter = netdev_priv(netdev);
3348
3349         /* Report maximum channels */
3350         ch->max_combined = igb_max_channels(adapter);
3351
3352         /* Report info for other vector */
3353         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
3354                 ch->max_other = NON_Q_VECTORS;
3355                 ch->other_count = NON_Q_VECTORS;
3356         }
3357
3358         ch->combined_count = adapter->rss_queues;
3359 }
3360
3361 static int igb_set_channels(struct net_device *netdev,
3362                             struct ethtool_channels *ch)
3363 {
3364         struct igb_adapter *adapter = netdev_priv(netdev);
3365         unsigned int count = ch->combined_count;
3366         unsigned int max_combined = 0;
3367
3368         /* Verify they are not requesting separate vectors */
3369         if (!count || ch->rx_count || ch->tx_count)
3370                 return -EINVAL;
3371
3372         /* Verify other_count is valid and has not been changed */
3373         if (ch->other_count != NON_Q_VECTORS)
3374                 return -EINVAL;
3375
3376         /* Verify the number of channels doesn't exceed hw limits */
3377         max_combined = igb_max_channels(adapter);
3378         if (count > max_combined)
3379                 return -EINVAL;
3380
3381         if (count != adapter->rss_queues) {
3382                 adapter->rss_queues = count;
3383                 igb_set_flag_queue_pairs(adapter, max_combined);
3384
3385                 /* Hardware has to reinitialize queues and interrupts to
3386                  * match the new configuration.
3387                  */
3388                 return igb_reinit_queues(adapter);
3389         }
3390
3391         return 0;
3392 }
3393
3394 static const struct ethtool_ops igb_ethtool_ops = {
3395         .get_settings           = igb_get_settings,
3396         .set_settings           = igb_set_settings,
3397         .get_drvinfo            = igb_get_drvinfo,
3398         .get_regs_len           = igb_get_regs_len,
3399         .get_regs               = igb_get_regs,
3400         .get_wol                = igb_get_wol,
3401         .set_wol                = igb_set_wol,
3402         .get_msglevel           = igb_get_msglevel,
3403         .set_msglevel           = igb_set_msglevel,
3404         .nway_reset             = igb_nway_reset,
3405         .get_link               = igb_get_link,
3406         .get_eeprom_len         = igb_get_eeprom_len,
3407         .get_eeprom             = igb_get_eeprom,
3408         .set_eeprom             = igb_set_eeprom,
3409         .get_ringparam          = igb_get_ringparam,
3410         .set_ringparam          = igb_set_ringparam,
3411         .get_pauseparam         = igb_get_pauseparam,
3412         .set_pauseparam         = igb_set_pauseparam,
3413         .self_test              = igb_diag_test,
3414         .get_strings            = igb_get_strings,
3415         .set_phys_id            = igb_set_phys_id,
3416         .get_sset_count         = igb_get_sset_count,
3417         .get_ethtool_stats      = igb_get_ethtool_stats,
3418         .get_coalesce           = igb_get_coalesce,
3419         .set_coalesce           = igb_set_coalesce,
3420         .get_ts_info            = igb_get_ts_info,
3421         .get_rxnfc              = igb_get_rxnfc,
3422         .set_rxnfc              = igb_set_rxnfc,
3423         .get_eee                = igb_get_eee,
3424         .set_eee                = igb_set_eee,
3425         .get_module_info        = igb_get_module_info,
3426         .get_module_eeprom      = igb_get_module_eeprom,
3427         .get_rxfh_indir_size    = igb_get_rxfh_indir_size,
3428         .get_rxfh               = igb_get_rxfh,
3429         .set_rxfh               = igb_set_rxfh,
3430         .get_channels           = igb_get_channels,
3431         .set_channels           = igb_set_channels,
3432         .begin                  = igb_ethtool_begin,
3433         .complete               = igb_ethtool_complete,
3434 };
3435
3436 void igb_set_ethtool_ops(struct net_device *netdev)
3437 {
3438         netdev->ethtool_ops = &igb_ethtool_ops;
3439 }