drivers/net/ethernet/intel/igb/igb_ethtool.c

   1 /* Intel(R) Gigabit Ethernet Linux driver
   2  * Copyright(c) 2007-2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program; if not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * The full GNU General Public License is included in this distribution in
  17  * the file called "COPYING".
  18  *
  19  * Contact Information:
  20  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  21  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  22  */
  23
  24 /* ethtool support for igb */
  25
  26 #include <linux/vmalloc.h>
  27 #include <linux/netdevice.h>
  28 #include <linux/pci.h>
  29 #include <linux/delay.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/if_ether.h>
  32 #include <linux/ethtool.h>
  33 #include <linux/sched.h>
  34 #include <linux/slab.h>
  35 #include <linux/pm_runtime.h>
  36 #include <linux/highmem.h>
  37 #include <linux/mdio.h>
  38
  39 #include "igb.h"
  40
  41 struct igb_stats {
  42         char stat_string[ETH_GSTRING_LEN];
  43         int sizeof_stat;
  44         int stat_offset;
  45 };
  46
  47 #define IGB_STAT(_name, _stat) { \
  48         .stat_string = _name, \
  49         .sizeof_stat = FIELD_SIZEOF(struct igb_adapter, _stat), \
  50         .stat_offset = offsetof(struct igb_adapter, _stat) \
  51 }
  52 static const struct igb_stats igb_gstrings_stats[] = {
  53         IGB_STAT("rx_packets", stats.gprc),
  54         IGB_STAT("tx_packets", stats.gptc),
  55         IGB_STAT("rx_bytes", stats.gorc),
  56         IGB_STAT("tx_bytes", stats.gotc),
  57         IGB_STAT("rx_broadcast", stats.bprc),
  58         IGB_STAT("tx_broadcast", stats.bptc),
  59         IGB_STAT("rx_multicast", stats.mprc),
  60         IGB_STAT("tx_multicast", stats.mptc),
  61         IGB_STAT("multicast", stats.mprc),
  62         IGB_STAT("collisions", stats.colc),
  63         IGB_STAT("rx_crc_errors", stats.crcerrs),
  64         IGB_STAT("rx_no_buffer_count", stats.rnbc),
  65         IGB_STAT("rx_missed_errors", stats.mpc),
  66         IGB_STAT("tx_aborted_errors", stats.ecol),
  67         IGB_STAT("tx_carrier_errors", stats.tncrs),
  68         IGB_STAT("tx_window_errors", stats.latecol),
  69         IGB_STAT("tx_abort_late_coll", stats.latecol),
  70         IGB_STAT("tx_deferred_ok", stats.dc),
  71         IGB_STAT("tx_single_coll_ok", stats.scc),
  72         IGB_STAT("tx_multi_coll_ok", stats.mcc),
  73         IGB_STAT("tx_timeout_count", tx_timeout_count),
  74         IGB_STAT("rx_long_length_errors", stats.roc),
  75         IGB_STAT("rx_short_length_errors", stats.ruc),
  76         IGB_STAT("rx_align_errors", stats.algnerrc),
  77         IGB_STAT("tx_tcp_seg_good", stats.tsctc),
  78         IGB_STAT("tx_tcp_seg_failed", stats.tsctfc),
  79         IGB_STAT("rx_flow_control_xon", stats.xonrxc),
  80         IGB_STAT("rx_flow_control_xoff", stats.xoffrxc),
  81         IGB_STAT("tx_flow_control_xon", stats.xontxc),
  82         IGB_STAT("tx_flow_control_xoff", stats.xofftxc),
  83         IGB_STAT("rx_long_byte_count", stats.gorc),
  84         IGB_STAT("tx_dma_out_of_sync", stats.doosync),
  85         IGB_STAT("tx_smbus", stats.mgptc),
  86         IGB_STAT("rx_smbus", stats.mgprc),
  87         IGB_STAT("dropped_smbus", stats.mgpdc),
  88         IGB_STAT("os2bmc_rx_by_bmc", stats.o2bgptc),
  89         IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
  90         IGB_STAT("os2bmc_tx_by_host", stats.o2bspc),
  91         IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc),
  92         IGB_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
  93         IGB_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped),
  94         IGB_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
  95 };
  96
  97 #define IGB_NETDEV_STAT(_net_stat) { \
  98         .stat_string = __stringify(_net_stat), \
  99         .sizeof_stat = FIELD_SIZEOF(struct rtnl_link_stats64, _net_stat), \
 100         .stat_offset = offsetof(struct rtnl_link_stats64, _net_stat) \
 101 }
 102 static const struct igb_stats igb_gstrings_net_stats[] = {
 103         IGB_NETDEV_STAT(rx_errors),
 104         IGB_NETDEV_STAT(tx_errors),
 105         IGB_NETDEV_STAT(tx_dropped),
 106         IGB_NETDEV_STAT(rx_length_errors),
 107         IGB_NETDEV_STAT(rx_over_errors),
 108         IGB_NETDEV_STAT(rx_frame_errors),
 109         IGB_NETDEV_STAT(rx_fifo_errors),
 110         IGB_NETDEV_STAT(tx_fifo_errors),
 111         IGB_NETDEV_STAT(tx_heartbeat_errors)
 112 };
 113
 114 #define IGB_GLOBAL_STATS_LEN    \
 115         (sizeof(igb_gstrings_stats) / sizeof(struct igb_stats))
 116 #define IGB_NETDEV_STATS_LEN    \
 117         (sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats))
 118 #define IGB_RX_QUEUE_STATS_LEN \
 119         (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
 120
 121 #define IGB_TX_QUEUE_STATS_LEN 3 /* packets, bytes, restart_queue */
 122
 123 #define IGB_QUEUE_STATS_LEN \
 124         ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
 125           IGB_RX_QUEUE_STATS_LEN) + \
 126          (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
 127           IGB_TX_QUEUE_STATS_LEN))
 128 #define IGB_STATS_LEN \
 129         (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
 130
 131 enum igb_diagnostics_results {
 132         TEST_REG = 0,
 133         TEST_EEP,
 134         TEST_IRQ,
 135         TEST_LOOP,
 136         TEST_LINK
 137 };
 138
 139 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
 140         [TEST_REG]  = "Register test  (offline)",
 141         [TEST_EEP]  = "Eeprom test    (offline)",
 142         [TEST_IRQ]  = "Interrupt test (offline)",
 143         [TEST_LOOP] = "Loopback test  (offline)",
 144         [TEST_LINK] = "Link test   (on/offline)"
 145 };
 146 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
 147
 148 static const char igb_priv_flags_strings[][ETH_GSTRING_LEN] = {
 149 #define IGB_PRIV_FLAGS_LEGACY_RX        BIT(0)
 150         "legacy-rx",
 151 };
 152
 153 #define IGB_PRIV_FLAGS_STR_LEN ARRAY_SIZE(igb_priv_flags_strings)
 154
 155 static int igb_get_link_ksettings(struct net_device *netdev,
 156                                   struct ethtool_link_ksettings *cmd)
 157 {
 158         struct igb_adapter *adapter = netdev_priv(netdev);
 159         struct e1000_hw *hw = &adapter->hw;
 160         struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;
 161         struct e1000_sfp_flags *eth_flags = &dev_spec->eth_flags;
 162         u32 status;
 163         u32 speed;
 164         u32 supported, advertising;
 165
 166         status = pm_runtime_suspended(&adapter->pdev->dev) ?
 167                  0 : rd32(E1000_STATUS);
 168         if (hw->phy.media_type == e1000_media_type_copper) {
 169
 170                 supported = (SUPPORTED_10baseT_Half |
 171                              SUPPORTED_10baseT_Full |
 172                              SUPPORTED_100baseT_Half |
 173                              SUPPORTED_100baseT_Full |
 174                              SUPPORTED_1000baseT_Full|
 175                              SUPPORTED_Autoneg |
 176                              SUPPORTED_TP |
 177                              SUPPORTED_Pause);
 178                 advertising = ADVERTISED_TP;
 179
 180                 if (hw->mac.autoneg == 1) {
 181                         advertising |= ADVERTISED_Autoneg;
 182                         /* the e1000 autoneg seems to match ethtool nicely */
 183                         advertising |= hw->phy.autoneg_advertised;
 184                 }
 185
 186                 cmd->base.port = PORT_TP;
 187                 cmd->base.phy_address = hw->phy.addr;
 188         } else {
 189                 supported = (SUPPORTED_FIBRE |
 190                              SUPPORTED_1000baseKX_Full |
 191                              SUPPORTED_Autoneg |
 192                              SUPPORTED_Pause);
 193                 advertising = (ADVERTISED_FIBRE |
 194                                ADVERTISED_1000baseKX_Full);
 195                 if (hw->mac.type == e1000_i354) {
 196                         if ((hw->device_id ==
 197                              E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) &&
 198                             !(status & E1000_STATUS_2P5_SKU_OVER)) {
 199                                 supported |= SUPPORTED_2500baseX_Full;
 200                                 supported &= ~SUPPORTED_1000baseKX_Full;
 201                                 advertising |= ADVERTISED_2500baseX_Full;
 202                                 advertising &= ~ADVERTISED_1000baseKX_Full;
 203                         }
 204                 }
 205                 if (eth_flags->e100_base_fx || eth_flags->e100_base_lx) {
 206                         supported |= SUPPORTED_100baseT_Full;
 207                         advertising |= ADVERTISED_100baseT_Full;
 208                 }
 209                 if (hw->mac.autoneg == 1)
 210                         advertising |= ADVERTISED_Autoneg;
 211
 212                 cmd->base.port = PORT_FIBRE;
 213         }
 214         if (hw->mac.autoneg != 1)
 215                 advertising &= ~(ADVERTISED_Pause |
 216                                  ADVERTISED_Asym_Pause);
 217
 218         switch (hw->fc.requested_mode) {
 219         case e1000_fc_full:
 220                 advertising |= ADVERTISED_Pause;
 221                 break;
 222         case e1000_fc_rx_pause:
 223                 advertising |= (ADVERTISED_Pause |
 224                                 ADVERTISED_Asym_Pause);
 225                 break;
 226         case e1000_fc_tx_pause:
 227                 advertising |=  ADVERTISED_Asym_Pause;
 228                 break;
 229         default:
 230                 advertising &= ~(ADVERTISED_Pause |
 231                                  ADVERTISED_Asym_Pause);
 232         }
 233         if (status & E1000_STATUS_LU) {
 234                 if ((status & E1000_STATUS_2P5_SKU) &&
 235                     !(status & E1000_STATUS_2P5_SKU_OVER)) {
 236                         speed = SPEED_2500;
 237                 } else if (status & E1000_STATUS_SPEED_1000) {
 238                         speed = SPEED_1000;
 239                 } else if (status & E1000_STATUS_SPEED_100) {
 240                         speed = SPEED_100;
 241                 } else {
 242                         speed = SPEED_10;
 243                 }
 244                 if ((status & E1000_STATUS_FD) ||
 245                     hw->phy.media_type != e1000_media_type_copper)
 246                         cmd->base.duplex = DUPLEX_FULL;
 247                 else
 248                         cmd->base.duplex = DUPLEX_HALF;
 249         } else {
 250                 speed = SPEED_UNKNOWN;
 251                 cmd->base.duplex = DUPLEX_UNKNOWN;
 252         }
 253         cmd->base.speed = speed;
 254         if ((hw->phy.media_type == e1000_media_type_fiber) ||
 255             hw->mac.autoneg)
 256                 cmd->base.autoneg = AUTONEG_ENABLE;
 257         else
 258                 cmd->base.autoneg = AUTONEG_DISABLE;
 259
 260         /* MDI-X => 2; MDI =>1; Invalid =>0 */
 261         if (hw->phy.media_type == e1000_media_type_copper)
 262                 cmd->base.eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X :
 263                                                       ETH_TP_MDI;
 264         else
 265                 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
 266
 267         if (hw->phy.mdix == AUTO_ALL_MODES)
 268                 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
 269         else
 270                 cmd->base.eth_tp_mdix_ctrl = hw->phy.mdix;
 271
 272         ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
 273                                                 supported);
 274         ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
 275                                                 advertising);
 276
 277         return 0;
 278 }
 279
 280 static int igb_set_link_ksettings(struct net_device *netdev,
 281                                   const struct ethtool_link_ksettings *cmd)
 282 {
 283         struct igb_adapter *adapter = netdev_priv(netdev);
 284         struct e1000_hw *hw = &adapter->hw;
 285         u32 advertising;
 286
 287         /* When SoL/IDER sessions are active, autoneg/speed/duplex
 288          * cannot be changed
 289          */
 290         if (igb_check_reset_block(hw)) {
 291                 dev_err(&adapter->pdev->dev,
 292                         "Cannot change link characteristics when SoL/IDER is active.\n");
 293                 return -EINVAL;
 294         }
 295
 296         /* MDI setting is only allowed when autoneg enabled because
 297          * some hardware doesn't allow MDI setting when speed or
 298          * duplex is forced.
 299          */
 300         if (cmd->base.eth_tp_mdix_ctrl) {
 301                 if (hw->phy.media_type != e1000_media_type_copper)
 302                         return -EOPNOTSUPP;
 303
 304                 if ((cmd->base.eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
 305                     (cmd->base.autoneg != AUTONEG_ENABLE)) {
 306                         dev_err(&adapter->pdev->dev, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
 307                         return -EINVAL;
 308                 }
 309         }
 310
 311         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 312                 usleep_range(1000, 2000);
 313
 314         ethtool_convert_link_mode_to_legacy_u32(&advertising,
 315                                                 cmd->link_modes.advertising);
 316
 317         if (cmd->base.autoneg == AUTONEG_ENABLE) {
 318                 hw->mac.autoneg = 1;
 319                 if (hw->phy.media_type == e1000_media_type_fiber) {
 320                         hw->phy.autoneg_advertised = advertising |
 321                                                      ADVERTISED_FIBRE |
 322                                                      ADVERTISED_Autoneg;
 323                         switch (adapter->link_speed) {
 324                         case SPEED_2500:
 325                                 hw->phy.autoneg_advertised =
 326                                         ADVERTISED_2500baseX_Full;
 327                                 break;
 328                         case SPEED_1000:
 329                                 hw->phy.autoneg_advertised =
 330                                         ADVERTISED_1000baseT_Full;
 331                                 break;
 332                         case SPEED_100:
 333                                 hw->phy.autoneg_advertised =
 334                                         ADVERTISED_100baseT_Full;
 335                                 break;
 336                         default:
 337                                 break;
 338                         }
 339                 } else {
 340                         hw->phy.autoneg_advertised = advertising |
 341                                                      ADVERTISED_TP |
 342                                                      ADVERTISED_Autoneg;
 343                 }
 344                 advertising = hw->phy.autoneg_advertised;
 345                 if (adapter->fc_autoneg)
 346                         hw->fc.requested_mode = e1000_fc_default;
 347         } else {
 348                 u32 speed = cmd->base.speed;
 349                 /* calling this overrides forced MDI setting */
 350                 if (igb_set_spd_dplx(adapter, speed, cmd->base.duplex)) {
 351                         clear_bit(__IGB_RESETTING, &adapter->state);
 352                         return -EINVAL;
 353                 }
 354         }
 355
 356         /* MDI-X => 2; MDI => 1; Auto => 3 */
 357         if (cmd->base.eth_tp_mdix_ctrl) {
 358                 /* fix up the value for auto (3 => 0) as zero is mapped
 359                  * internally to auto
 360                  */
 361                 if (cmd->base.eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
 362                         hw->phy.mdix = AUTO_ALL_MODES;
 363                 else
 364                         hw->phy.mdix = cmd->base.eth_tp_mdix_ctrl;
 365         }
 366
 367         /* reset the link */
 368         if (netif_running(adapter->netdev)) {
 369                 igb_down(adapter);
 370                 igb_up(adapter);
 371         } else
 372                 igb_reset(adapter);
 373
 374         clear_bit(__IGB_RESETTING, &adapter->state);
 375         return 0;
 376 }
 377
 378 static u32 igb_get_link(struct net_device *netdev)
 379 {
 380         struct igb_adapter *adapter = netdev_priv(netdev);
 381         struct e1000_mac_info *mac = &adapter->hw.mac;
 382
 383         /* If the link is not reported up to netdev, interrupts are disabled,
 384          * and so the physical link state may have changed since we last
 385          * looked. Set get_link_status to make sure that the true link
 386          * state is interrogated, rather than pulling a cached and possibly
 387          * stale link state from the driver.
 388          */
 389         if (!netif_carrier_ok(netdev))
 390                 mac->get_link_status = 1;
 391
 392         return igb_has_link(adapter);
 393 }
 394
 395 static void igb_get_pauseparam(struct net_device *netdev,
 396                                struct ethtool_pauseparam *pause)
 397 {
 398         struct igb_adapter *adapter = netdev_priv(netdev);
 399         struct e1000_hw *hw = &adapter->hw;
 400
 401         pause->autoneg =
 402                 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
 403
 404         if (hw->fc.current_mode == e1000_fc_rx_pause)
 405                 pause->rx_pause = 1;
 406         else if (hw->fc.current_mode == e1000_fc_tx_pause)
 407                 pause->tx_pause = 1;
 408         else if (hw->fc.current_mode == e1000_fc_full) {
 409                 pause->rx_pause = 1;
 410                 pause->tx_pause = 1;
 411         }
 412 }
 413
 414 static int igb_set_pauseparam(struct net_device *netdev,
 415                               struct ethtool_pauseparam *pause)
 416 {
 417         struct igb_adapter *adapter = netdev_priv(netdev);
 418         struct e1000_hw *hw = &adapter->hw;
 419         int retval = 0;
 420
 421         /* 100basefx does not support setting link flow control */
 422         if (hw->dev_spec._82575.eth_flags.e100_base_fx)
 423                 return -EINVAL;
 424
 425         adapter->fc_autoneg = pause->autoneg;
 426
 427         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 428                 usleep_range(1000, 2000);
 429
 430         if (adapter->fc_autoneg == AUTONEG_ENABLE) {
 431                 hw->fc.requested_mode = e1000_fc_default;
 432                 if (netif_running(adapter->netdev)) {
 433                         igb_down(adapter);
 434                         igb_up(adapter);
 435                 } else {
 436                         igb_reset(adapter);
 437                 }
 438         } else {
 439                 if (pause->rx_pause && pause->tx_pause)
 440                         hw->fc.requested_mode = e1000_fc_full;
 441                 else if (pause->rx_pause && !pause->tx_pause)
 442                         hw->fc.requested_mode = e1000_fc_rx_pause;
 443                 else if (!pause->rx_pause && pause->tx_pause)
 444                         hw->fc.requested_mode = e1000_fc_tx_pause;
 445                 else if (!pause->rx_pause && !pause->tx_pause)
 446                         hw->fc.requested_mode = e1000_fc_none;
 447
 448                 hw->fc.current_mode = hw->fc.requested_mode;
 449
 450                 retval = ((hw->phy.media_type == e1000_media_type_copper) ?
 451                           igb_force_mac_fc(hw) : igb_setup_link(hw));
 452         }
 453
 454         clear_bit(__IGB_RESETTING, &adapter->state);
 455         return retval;
 456 }
 457
 458 static u32 igb_get_msglevel(struct net_device *netdev)
 459 {
 460         struct igb_adapter *adapter = netdev_priv(netdev);
 461         return adapter->msg_enable;
 462 }
 463
 464 static void igb_set_msglevel(struct net_device *netdev, u32 data)
 465 {
 466         struct igb_adapter *adapter = netdev_priv(netdev);
 467         adapter->msg_enable = data;
 468 }
 469
 470 static int igb_get_regs_len(struct net_device *netdev)
 471 {
 472 #define IGB_REGS_LEN 739
 473         return IGB_REGS_LEN * sizeof(u32);
 474 }
 475
 476 static void igb_get_regs(struct net_device *netdev,
 477                          struct ethtool_regs *regs, void *p)
 478 {
 479         struct igb_adapter *adapter = netdev_priv(netdev);
 480         struct e1000_hw *hw = &adapter->hw;
 481         u32 *regs_buff = p;
 482         u8 i;
 483
 484         memset(p, 0, IGB_REGS_LEN * sizeof(u32));
 485
 486         regs->version = (1u << 24) | (hw->revision_id << 16) | hw->device_id;
 487
 488         /* General Registers */
 489         regs_buff[0] = rd32(E1000_CTRL);
 490         regs_buff[1] = rd32(E1000_STATUS);
 491         regs_buff[2] = rd32(E1000_CTRL_EXT);
 492         regs_buff[3] = rd32(E1000_MDIC);
 493         regs_buff[4] = rd32(E1000_SCTL);
 494         regs_buff[5] = rd32(E1000_CONNSW);
 495         regs_buff[6] = rd32(E1000_VET);
 496         regs_buff[7] = rd32(E1000_LEDCTL);
 497         regs_buff[8] = rd32(E1000_PBA);
 498         regs_buff[9] = rd32(E1000_PBS);
 499         regs_buff[10] = rd32(E1000_FRTIMER);
 500         regs_buff[11] = rd32(E1000_TCPTIMER);
 501
 502         /* NVM Register */
 503         regs_buff[12] = rd32(E1000_EECD);
 504
 505         /* Interrupt */
 506         /* Reading EICS for EICR because they read the
 507          * same but EICS does not clear on read
 508          */
 509         regs_buff[13] = rd32(E1000_EICS);
 510         regs_buff[14] = rd32(E1000_EICS);
 511         regs_buff[15] = rd32(E1000_EIMS);
 512         regs_buff[16] = rd32(E1000_EIMC);
 513         regs_buff[17] = rd32(E1000_EIAC);
 514         regs_buff[18] = rd32(E1000_EIAM);
 515         /* Reading ICS for ICR because they read the
 516          * same but ICS does not clear on read
 517          */
 518         regs_buff[19] = rd32(E1000_ICS);
 519         regs_buff[20] = rd32(E1000_ICS);
 520         regs_buff[21] = rd32(E1000_IMS);
 521         regs_buff[22] = rd32(E1000_IMC);
 522         regs_buff[23] = rd32(E1000_IAC);
 523         regs_buff[24] = rd32(E1000_IAM);
 524         regs_buff[25] = rd32(E1000_IMIRVP);
 525
 526         /* Flow Control */
 527         regs_buff[26] = rd32(E1000_FCAL);
 528         regs_buff[27] = rd32(E1000_FCAH);
 529         regs_buff[28] = rd32(E1000_FCTTV);
 530         regs_buff[29] = rd32(E1000_FCRTL);
 531         regs_buff[30] = rd32(E1000_FCRTH);
 532         regs_buff[31] = rd32(E1000_FCRTV);
 533
 534         /* Receive */
 535         regs_buff[32] = rd32(E1000_RCTL);
 536         regs_buff[33] = rd32(E1000_RXCSUM);
 537         regs_buff[34] = rd32(E1000_RLPML);
 538         regs_buff[35] = rd32(E1000_RFCTL);
 539         regs_buff[36] = rd32(E1000_MRQC);
 540         regs_buff[37] = rd32(E1000_VT_CTL);
 541
 542         /* Transmit */
 543         regs_buff[38] = rd32(E1000_TCTL);
 544         regs_buff[39] = rd32(E1000_TCTL_EXT);
 545         regs_buff[40] = rd32(E1000_TIPG);
 546         regs_buff[41] = rd32(E1000_DTXCTL);
 547
 548         /* Wake Up */
 549         regs_buff[42] = rd32(E1000_WUC);
 550         regs_buff[43] = rd32(E1000_WUFC);
 551         regs_buff[44] = rd32(E1000_WUS);
 552         regs_buff[45] = rd32(E1000_IPAV);
 553         regs_buff[46] = rd32(E1000_WUPL);
 554
 555         /* MAC */
 556         regs_buff[47] = rd32(E1000_PCS_CFG0);
 557         regs_buff[48] = rd32(E1000_PCS_LCTL);
 558         regs_buff[49] = rd32(E1000_PCS_LSTAT);
 559         regs_buff[50] = rd32(E1000_PCS_ANADV);
 560         regs_buff[51] = rd32(E1000_PCS_LPAB);
 561         regs_buff[52] = rd32(E1000_PCS_NPTX);
 562         regs_buff[53] = rd32(E1000_PCS_LPABNP);
 563
 564         /* Statistics */
 565         regs_buff[54] = adapter->stats.crcerrs;
 566         regs_buff[55] = adapter->stats.algnerrc;
 567         regs_buff[56] = adapter->stats.symerrs;
 568         regs_buff[57] = adapter->stats.rxerrc;
 569         regs_buff[58] = adapter->stats.mpc;
 570         regs_buff[59] = adapter->stats.scc;
 571         regs_buff[60] = adapter->stats.ecol;
 572         regs_buff[61] = adapter->stats.mcc;
 573         regs_buff[62] = adapter->stats.latecol;
 574         regs_buff[63] = adapter->stats.colc;
 575         regs_buff[64] = adapter->stats.dc;
 576         regs_buff[65] = adapter->stats.tncrs;
 577         regs_buff[66] = adapter->stats.sec;
 578         regs_buff[67] = adapter->stats.htdpmc;
 579         regs_buff[68] = adapter->stats.rlec;
 580         regs_buff[69] = adapter->stats.xonrxc;
 581         regs_buff[70] = adapter->stats.xontxc;
 582         regs_buff[71] = adapter->stats.xoffrxc;
 583         regs_buff[72] = adapter->stats.xofftxc;
 584         regs_buff[73] = adapter->stats.fcruc;
 585         regs_buff[74] = adapter->stats.prc64;
 586         regs_buff[75] = adapter->stats.prc127;
 587         regs_buff[76] = adapter->stats.prc255;
 588         regs_buff[77] = adapter->stats.prc511;
 589         regs_buff[78] = adapter->stats.prc1023;
 590         regs_buff[79] = adapter->stats.prc1522;
 591         regs_buff[80] = adapter->stats.gprc;
 592         regs_buff[81] = adapter->stats.bprc;
 593         regs_buff[82] = adapter->stats.mprc;
 594         regs_buff[83] = adapter->stats.gptc;
 595         regs_buff[84] = adapter->stats.gorc;
 596         regs_buff[86] = adapter->stats.gotc;
 597         regs_buff[88] = adapter->stats.rnbc;
 598         regs_buff[89] = adapter->stats.ruc;
 599         regs_buff[90] = adapter->stats.rfc;
 600         regs_buff[91] = adapter->stats.roc;
 601         regs_buff[92] = adapter->stats.rjc;
 602         regs_buff[93] = adapter->stats.mgprc;
 603         regs_buff[94] = adapter->stats.mgpdc;
 604         regs_buff[95] = adapter->stats.mgptc;
 605         regs_buff[96] = adapter->stats.tor;
 606         regs_buff[98] = adapter->stats.tot;
 607         regs_buff[100] = adapter->stats.tpr;
 608         regs_buff[101] = adapter->stats.tpt;
 609         regs_buff[102] = adapter->stats.ptc64;
 610         regs_buff[103] = adapter->stats.ptc127;
 611         regs_buff[104] = adapter->stats.ptc255;
 612         regs_buff[105] = adapter->stats.ptc511;
 613         regs_buff[106] = adapter->stats.ptc1023;
 614         regs_buff[107] = adapter->stats.ptc1522;
 615         regs_buff[108] = adapter->stats.mptc;
 616         regs_buff[109] = adapter->stats.bptc;
 617         regs_buff[110] = adapter->stats.tsctc;
 618         regs_buff[111] = adapter->stats.iac;
 619         regs_buff[112] = adapter->stats.rpthc;
 620         regs_buff[113] = adapter->stats.hgptc;
 621         regs_buff[114] = adapter->stats.hgorc;
 622         regs_buff[116] = adapter->stats.hgotc;
 623         regs_buff[118] = adapter->stats.lenerrs;
 624         regs_buff[119] = adapter->stats.scvpc;
 625         regs_buff[120] = adapter->stats.hrmpc;
 626
 627         for (i = 0; i < 4; i++)
 628                 regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
 629         for (i = 0; i < 4; i++)
 630                 regs_buff[125 + i] = rd32(E1000_PSRTYPE(i));
 631         for (i = 0; i < 4; i++)
 632                 regs_buff[129 + i] = rd32(E1000_RDBAL(i));
 633         for (i = 0; i < 4; i++)
 634                 regs_buff[133 + i] = rd32(E1000_RDBAH(i));
 635         for (i = 0; i < 4; i++)
 636                 regs_buff[137 + i] = rd32(E1000_RDLEN(i));
 637         for (i = 0; i < 4; i++)
 638                 regs_buff[141 + i] = rd32(E1000_RDH(i));
 639         for (i = 0; i < 4; i++)
 640                 regs_buff[145 + i] = rd32(E1000_RDT(i));
 641         for (i = 0; i < 4; i++)
 642                 regs_buff[149 + i] = rd32(E1000_RXDCTL(i));
 643
 644         for (i = 0; i < 10; i++)
 645                 regs_buff[153 + i] = rd32(E1000_EITR(i));
 646         for (i = 0; i < 8; i++)
 647                 regs_buff[163 + i] = rd32(E1000_IMIR(i));
 648         for (i = 0; i < 8; i++)
 649                 regs_buff[171 + i] = rd32(E1000_IMIREXT(i));
 650         for (i = 0; i < 16; i++)
 651                 regs_buff[179 + i] = rd32(E1000_RAL(i));
 652         for (i = 0; i < 16; i++)
 653                 regs_buff[195 + i] = rd32(E1000_RAH(i));
 654
 655         for (i = 0; i < 4; i++)
 656                 regs_buff[211 + i] = rd32(E1000_TDBAL(i));
 657         for (i = 0; i < 4; i++)
 658                 regs_buff[215 + i] = rd32(E1000_TDBAH(i));
 659         for (i = 0; i < 4; i++)
 660                 regs_buff[219 + i] = rd32(E1000_TDLEN(i));
 661         for (i = 0; i < 4; i++)
 662                 regs_buff[223 + i] = rd32(E1000_TDH(i));
 663         for (i = 0; i < 4; i++)
 664                 regs_buff[227 + i] = rd32(E1000_TDT(i));
 665         for (i = 0; i < 4; i++)
 666                 regs_buff[231 + i] = rd32(E1000_TXDCTL(i));
 667         for (i = 0; i < 4; i++)
 668                 regs_buff[235 + i] = rd32(E1000_TDWBAL(i));
 669         for (i = 0; i < 4; i++)
 670                 regs_buff[239 + i] = rd32(E1000_TDWBAH(i));
 671         for (i = 0; i < 4; i++)
 672                 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i));
 673
 674         for (i = 0; i < 4; i++)
 675                 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i));
 676         for (i = 0; i < 4; i++)
 677                 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i));
 678         for (i = 0; i < 32; i++)
 679                 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i));
 680         for (i = 0; i < 128; i++)
 681                 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i));
 682         for (i = 0; i < 128; i++)
 683                 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i));
 684         for (i = 0; i < 4; i++)
 685                 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i));
 686
 687         regs_buff[547] = rd32(E1000_TDFH);
 688         regs_buff[548] = rd32(E1000_TDFT);
 689         regs_buff[549] = rd32(E1000_TDFHS);
 690         regs_buff[550] = rd32(E1000_TDFPC);
 691
 692         if (hw->mac.type > e1000_82580) {
 693                 regs_buff[551] = adapter->stats.o2bgptc;
 694                 regs_buff[552] = adapter->stats.b2ospc;
 695                 regs_buff[553] = adapter->stats.o2bspc;
 696                 regs_buff[554] = adapter->stats.b2ogprc;
 697         }
 698
 699         if (hw->mac.type != e1000_82576)
 700                 return;
 701         for (i = 0; i < 12; i++)
 702                 regs_buff[555 + i] = rd32(E1000_SRRCTL(i + 4));
 703         for (i = 0; i < 4; i++)
 704                 regs_buff[567 + i] = rd32(E1000_PSRTYPE(i + 4));
 705         for (i = 0; i < 12; i++)
 706                 regs_buff[571 + i] = rd32(E1000_RDBAL(i + 4));
 707         for (i = 0; i < 12; i++)
 708                 regs_buff[583 + i] = rd32(E1000_RDBAH(i + 4));
 709         for (i = 0; i < 12; i++)
 710                 regs_buff[595 + i] = rd32(E1000_RDLEN(i + 4));
 711         for (i = 0; i < 12; i++)
 712                 regs_buff[607 + i] = rd32(E1000_RDH(i + 4));
 713         for (i = 0; i < 12; i++)
 714                 regs_buff[619 + i] = rd32(E1000_RDT(i + 4));
 715         for (i = 0; i < 12; i++)
 716                 regs_buff[631 + i] = rd32(E1000_RXDCTL(i + 4));
 717
 718         for (i = 0; i < 12; i++)
 719                 regs_buff[643 + i] = rd32(E1000_TDBAL(i + 4));
 720         for (i = 0; i < 12; i++)
 721                 regs_buff[655 + i] = rd32(E1000_TDBAH(i + 4));
 722         for (i = 0; i < 12; i++)
 723                 regs_buff[667 + i] = rd32(E1000_TDLEN(i + 4));
 724         for (i = 0; i < 12; i++)
 725                 regs_buff[679 + i] = rd32(E1000_TDH(i + 4));
 726         for (i = 0; i < 12; i++)
 727                 regs_buff[691 + i] = rd32(E1000_TDT(i + 4));
 728         for (i = 0; i < 12; i++)
 729                 regs_buff[703 + i] = rd32(E1000_TXDCTL(i + 4));
 730         for (i = 0; i < 12; i++)
 731                 regs_buff[715 + i] = rd32(E1000_TDWBAL(i + 4));
 732         for (i = 0; i < 12; i++)
 733                 regs_buff[727 + i] = rd32(E1000_TDWBAH(i + 4));
 734 }
 735
 736 static int igb_get_eeprom_len(struct net_device *netdev)
 737 {
 738         struct igb_adapter *adapter = netdev_priv(netdev);
 739         return adapter->hw.nvm.word_size * 2;
 740 }
 741
 742 static int igb_get_eeprom(struct net_device *netdev,
 743                           struct ethtool_eeprom *eeprom, u8 *bytes)
 744 {
 745         struct igb_adapter *adapter = netdev_priv(netdev);
 746         struct e1000_hw *hw = &adapter->hw;
 747         u16 *eeprom_buff;
 748         int first_word, last_word;
 749         int ret_val = 0;
 750         u16 i;
 751
 752         if (eeprom->len == 0)
 753                 return -EINVAL;
 754
 755         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 756
 757         first_word = eeprom->offset >> 1;
 758         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 759
 760         eeprom_buff = kmalloc(sizeof(u16) *
 761                         (last_word - first_word + 1), GFP_KERNEL);
 762         if (!eeprom_buff)
 763                 return -ENOMEM;
 764
 765         if (hw->nvm.type == e1000_nvm_eeprom_spi)
 766                 ret_val = hw->nvm.ops.read(hw, first_word,
 767                                            last_word - first_word + 1,
 768                                            eeprom_buff);
 769         else {
 770                 for (i = 0; i < last_word - first_word + 1; i++) {
 771                         ret_val = hw->nvm.ops.read(hw, first_word + i, 1,
 772                                                    &eeprom_buff[i]);
 773                         if (ret_val)
 774                                 break;
 775                 }
 776         }
 777
 778         /* Device's eeprom is always little-endian, word addressable */
 779         for (i = 0; i < last_word - first_word + 1; i++)
 780                 le16_to_cpus(&eeprom_buff[i]);
 781
 782         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
 783                         eeprom->len);
 784         kfree(eeprom_buff);
 785
 786         return ret_val;
 787 }
 788
 789 static int igb_set_eeprom(struct net_device *netdev,
 790                           struct ethtool_eeprom *eeprom, u8 *bytes)
 791 {
 792         struct igb_adapter *adapter = netdev_priv(netdev);
 793         struct e1000_hw *hw = &adapter->hw;
 794         u16 *eeprom_buff;
 795         void *ptr;
 796         int max_len, first_word, last_word, ret_val = 0;
 797         u16 i;
 798
 799         if (eeprom->len == 0)
 800                 return -EOPNOTSUPP;
 801
 802         if ((hw->mac.type >= e1000_i210) &&
 803             !igb_get_flash_presence_i210(hw)) {
 804                 return -EOPNOTSUPP;
 805         }
 806
 807         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 808                 return -EFAULT;
 809
 810         max_len = hw->nvm.word_size * 2;
 811
 812         first_word = eeprom->offset >> 1;
 813         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 814         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 815         if (!eeprom_buff)
 816                 return -ENOMEM;
 817
 818         ptr = (void *)eeprom_buff;
 819
 820         if (eeprom->offset & 1) {
 821                 /* need read/modify/write of first changed EEPROM word
 822                  * only the second byte of the word is being modified
 823                  */
 824                 ret_val = hw->nvm.ops.read(hw, first_word, 1,
 825                                             &eeprom_buff[0]);
 826                 ptr++;
 827         }
 828         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
 829                 /* need read/modify/write of last changed EEPROM word
 830                  * only the first byte of the word is being modified
 831                  */
 832                 ret_val = hw->nvm.ops.read(hw, last_word, 1,
 833                                    &eeprom_buff[last_word - first_word]);
 834         }
 835
 836         /* Device's eeprom is always little-endian, word addressable */
 837         for (i = 0; i < last_word - first_word + 1; i++)
 838                 le16_to_cpus(&eeprom_buff[i]);
 839
 840         memcpy(ptr, bytes, eeprom->len);
 841
 842         for (i = 0; i < last_word - first_word + 1; i++)
 843                 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
 844
 845         ret_val = hw->nvm.ops.write(hw, first_word,
 846                                     last_word - first_word + 1, eeprom_buff);
 847
 848         /* Update the checksum if nvm write succeeded */
 849         if (ret_val == 0)
 850                 hw->nvm.ops.update(hw);
 851
 852         igb_set_fw_version(adapter);
 853         kfree(eeprom_buff);
 854         return ret_val;
 855 }
 856
 857 static void igb_get_drvinfo(struct net_device *netdev,
 858                             struct ethtool_drvinfo *drvinfo)
 859 {
 860         struct igb_adapter *adapter = netdev_priv(netdev);
 861
 862         strlcpy(drvinfo->driver,  igb_driver_name, sizeof(drvinfo->driver));
 863         strlcpy(drvinfo->version, igb_driver_version, sizeof(drvinfo->version));
 864
 865         /* EEPROM image version # is reported as firmware version # for
 866          * 82575 controllers
 867          */
 868         strlcpy(drvinfo->fw_version, adapter->fw_version,
 869                 sizeof(drvinfo->fw_version));
 870         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
 871                 sizeof(drvinfo->bus_info));
 872
 873         drvinfo->n_priv_flags = IGB_PRIV_FLAGS_STR_LEN;
 874 }
 875
 876 static void igb_get_ringparam(struct net_device *netdev,
 877                               struct ethtool_ringparam *ring)
 878 {
 879         struct igb_adapter *adapter = netdev_priv(netdev);
 880
 881         ring->rx_max_pending = IGB_MAX_RXD;
 882         ring->tx_max_pending = IGB_MAX_TXD;
 883         ring->rx_pending = adapter->rx_ring_count;
 884         ring->tx_pending = adapter->tx_ring_count;
 885 }
 886
 887 static int igb_set_ringparam(struct net_device *netdev,
 888                              struct ethtool_ringparam *ring)
 889 {
 890         struct igb_adapter *adapter = netdev_priv(netdev);
 891         struct igb_ring *temp_ring;
 892         int i, err = 0;
 893         u16 new_rx_count, new_tx_count;
 894
 895         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 896                 return -EINVAL;
 897
 898         new_rx_count = min_t(u32, ring->rx_pending, IGB_MAX_RXD);
 899         new_rx_count = max_t(u16, new_rx_count, IGB_MIN_RXD);
 900         new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
 901
 902         new_tx_count = min_t(u32, ring->tx_pending, IGB_MAX_TXD);
 903         new_tx_count = max_t(u16, new_tx_count, IGB_MIN_TXD);
 904         new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
 905
 906         if ((new_tx_count == adapter->tx_ring_count) &&
 907             (new_rx_count == adapter->rx_ring_count)) {
 908                 /* nothing to do */
 909                 return 0;
 910         }
 911
 912         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 913                 usleep_range(1000, 2000);
 914
 915         if (!netif_running(adapter->netdev)) {
 916                 for (i = 0; i < adapter->num_tx_queues; i++)
 917                         adapter->tx_ring[i]->count = new_tx_count;
 918                 for (i = 0; i < adapter->num_rx_queues; i++)
 919                         adapter->rx_ring[i]->count = new_rx_count;
 920                 adapter->tx_ring_count = new_tx_count;
 921                 adapter->rx_ring_count = new_rx_count;
 922                 goto clear_reset;
 923         }
 924
 925         if (adapter->num_tx_queues > adapter->num_rx_queues)
 926                 temp_ring = vmalloc(adapter->num_tx_queues *
 927                                     sizeof(struct igb_ring));
 928         else
 929                 temp_ring = vmalloc(adapter->num_rx_queues *
 930                                     sizeof(struct igb_ring));
 931
 932         if (!temp_ring) {
 933                 err = -ENOMEM;
 934                 goto clear_reset;
 935         }
 936
 937         igb_down(adapter);
 938
 939         /* We can't just free everything and then setup again,
 940          * because the ISRs in MSI-X mode get passed pointers
 941          * to the Tx and Rx ring structs.
 942          */
 943         if (new_tx_count != adapter->tx_ring_count) {
 944                 for (i = 0; i < adapter->num_tx_queues; i++) {
 945                         memcpy(&temp_ring[i], adapter->tx_ring[i],
 946                                sizeof(struct igb_ring));
 947
 948                         temp_ring[i].count = new_tx_count;
 949                         err = igb_setup_tx_resources(&temp_ring[i]);
 950                         if (err) {
 951                                 while (i) {
 952                                         i--;
 953                                         igb_free_tx_resources(&temp_ring[i]);
 954                                 }
 955                                 goto err_setup;
 956                         }
 957                 }
 958
 959                 for (i = 0; i < adapter->num_tx_queues; i++) {
 960                         igb_free_tx_resources(adapter->tx_ring[i]);
 961
 962                         memcpy(adapter->tx_ring[i], &temp_ring[i],
 963                                sizeof(struct igb_ring));
 964                 }
 965
 966                 adapter->tx_ring_count = new_tx_count;
 967         }
 968
 969         if (new_rx_count != adapter->rx_ring_count) {
 970                 for (i = 0; i < adapter->num_rx_queues; i++) {
 971                         memcpy(&temp_ring[i], adapter->rx_ring[i],
 972                                sizeof(struct igb_ring));
 973
 974                         temp_ring[i].count = new_rx_count;
 975                         err = igb_setup_rx_resources(&temp_ring[i]);
 976                         if (err) {
 977                                 while (i) {
 978                                         i--;
 979                                         igb_free_rx_resources(&temp_ring[i]);
 980                                 }
 981                                 goto err_setup;
 982                         }
 983
 984                 }
 985
 986                 for (i = 0; i < adapter->num_rx_queues; i++) {
 987                         igb_free_rx_resources(adapter->rx_ring[i]);
 988
 989                         memcpy(adapter->rx_ring[i], &temp_ring[i],
 990                                sizeof(struct igb_ring));
 991                 }
 992
 993                 adapter->rx_ring_count = new_rx_count;
 994         }
 995 err_setup:
 996         igb_up(adapter);
 997         vfree(temp_ring);
 998 clear_reset:
 999         clear_bit(__IGB_RESETTING, &adapter->state);
1000         return err;
1001 }
1002
1003 /* ethtool register test data */
1004 struct igb_reg_test {
1005         u16 reg;
1006         u16 reg_offset;
1007         u16 array_len;
1008         u16 test_type;
1009         u32 mask;
1010         u32 write;
1011 };
1012
1013 /* In the hardware, registers are laid out either singly, in arrays
1014  * spaced 0x100 bytes apart, or in contiguous tables.  We assume
1015  * most tests take place on arrays or single registers (handled
1016  * as a single-element array) and special-case the tables.
1017  * Table tests are always pattern tests.
1018  *
1019  * We also make provision for some required setup steps by specifying
1020  * registers to be written without any read-back testing.
1021  */
1022
1023 #define PATTERN_TEST    1
1024 #define SET_READ_TEST   2
1025 #define WRITE_NO_TEST   3
1026 #define TABLE32_TEST    4
1027 #define TABLE64_TEST_LO 5
1028 #define TABLE64_TEST_HI 6
1029
1030 /* i210 reg test */
1031 static struct igb_reg_test reg_test_i210[] = {
1032         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1033         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1034         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1035         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1036         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1037         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1038         /* RDH is read-only for i210, only test RDT. */
1039         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1040         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1041         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1042         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1043         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1044         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1045         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1046         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1047         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1048         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1049         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1050         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1051         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1052                                                 0xFFFFFFFF, 0xFFFFFFFF },
1053         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1054                                                 0x900FFFFF, 0xFFFFFFFF },
1055         { E1000_MTA,       0, 128, TABLE32_TEST,
1056                                                 0xFFFFFFFF, 0xFFFFFFFF },
1057         { 0, 0, 0, 0, 0 }
1058 };
1059
1060 /* i350 reg test */
1061 static struct igb_reg_test reg_test_i350[] = {
1062         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1063         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1064         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1065         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFF0000, 0xFFFF0000 },
1066         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1067         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1068         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1069         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1070         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1071         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1072         /* RDH is read-only for i350, only test RDT. */
1073         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1074         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1075         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1076         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1077         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1078         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1079         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1080         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1081         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1082         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1083         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1084         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1085         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1086         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1087         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1088         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1089         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1090         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1091                                                 0xFFFFFFFF, 0xFFFFFFFF },
1092         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1093                                                 0xC3FFFFFF, 0xFFFFFFFF },
1094         { E1000_RA2,       0, 16, TABLE64_TEST_LO,
1095                                                 0xFFFFFFFF, 0xFFFFFFFF },
1096         { E1000_RA2,       0, 16, TABLE64_TEST_HI,
1097                                                 0xC3FFFFFF, 0xFFFFFFFF },
1098         { E1000_MTA,       0, 128, TABLE32_TEST,
1099                                                 0xFFFFFFFF, 0xFFFFFFFF },
1100         { 0, 0, 0, 0 }
1101 };
1102
1103 /* 82580 reg test */
1104 static struct igb_reg_test reg_test_82580[] = {
1105         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1106         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1107         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1108         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1109         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1110         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1111         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1112         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1113         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1114         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1115         /* RDH is read-only for 82580, only test RDT. */
1116         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1117         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1118         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1119         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1120         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1121         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1122         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1123         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1124         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1125         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1126         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1127         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1128         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1129         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1130         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1131         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1132         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1133         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1134                                                 0xFFFFFFFF, 0xFFFFFFFF },
1135         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1136                                                 0x83FFFFFF, 0xFFFFFFFF },
1137         { E1000_RA2,       0, 8, TABLE64_TEST_LO,
1138                                                 0xFFFFFFFF, 0xFFFFFFFF },
1139         { E1000_RA2,       0, 8, TABLE64_TEST_HI,
1140                                                 0x83FFFFFF, 0xFFFFFFFF },
1141         { E1000_MTA,       0, 128, TABLE32_TEST,
1142                                                 0xFFFFFFFF, 0xFFFFFFFF },
1143         { 0, 0, 0, 0 }
1144 };
1145
1146 /* 82576 reg test */
1147 static struct igb_reg_test reg_test_82576[] = {
1148         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1149         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1150         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1151         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1152         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1153         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1154         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1155         { E1000_RDBAL(4),  0x40, 12, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1156         { E1000_RDBAH(4),  0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1157         { E1000_RDLEN(4),  0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1158         /* Enable all RX queues before testing. */
1159         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0,
1160           E1000_RXDCTL_QUEUE_ENABLE },
1161         { E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST, 0,
1162           E1000_RXDCTL_QUEUE_ENABLE },
1163         /* RDH is read-only for 82576, only test RDT. */
1164         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1165         { E1000_RDT(4),    0x40, 12,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1166         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, 0 },
1167         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, 0 },
1168         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1169         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1170         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1171         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1172         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1173         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1174         { E1000_TDBAL(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1175         { E1000_TDBAH(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1176         { E1000_TDLEN(4),  0x40, 12,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1177         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1178         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1179         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1180         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1181         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1182         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1183         { E1000_RA2,       0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1184         { E1000_RA2,       0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1185         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1186         { 0, 0, 0, 0 }
1187 };
1188
1189 /* 82575 register test */
1190 static struct igb_reg_test reg_test_82575[] = {
1191         { E1000_FCAL,      0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1192         { E1000_FCAH,      0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1193         { E1000_FCT,       0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1194         { E1000_VET,       0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1195         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1196         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1197         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1198         /* Enable all four RX queues before testing. */
1199         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0,
1200           E1000_RXDCTL_QUEUE_ENABLE },
1201         /* RDH is read-only for 82575, only test RDT. */
1202         { E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1203         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 },
1204         { E1000_FCRTH,     0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1205         { E1000_FCTTV,     0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1206         { E1000_TIPG,      0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1207         { E1000_TDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1208         { E1000_TDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1209         { E1000_TDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1210         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1211         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0x003FFFFB },
1212         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0xFFFFFFFF },
1213         { E1000_TCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1214         { E1000_TXCW,      0x100, 1, PATTERN_TEST, 0xC000FFFF, 0x0000FFFF },
1215         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1216         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x800FFFFF, 0xFFFFFFFF },
1217         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1218         { 0, 0, 0, 0 }
1219 };
1220
1221 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
1222                              int reg, u32 mask, u32 write)
1223 {
1224         struct e1000_hw *hw = &adapter->hw;
1225         u32 pat, val;
1226         static const u32 _test[] = {
1227                 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1228         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
1229                 wr32(reg, (_test[pat] & write));
1230                 val = rd32(reg) & mask;
1231                 if (val != (_test[pat] & write & mask)) {
1232                         dev_err(&adapter->pdev->dev,
1233                                 "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1234                                 reg, val, (_test[pat] & write & mask));
1235                         *data = reg;
1236                         return true;
1237                 }
1238         }
1239
1240         return false;
1241 }
1242
1243 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
1244                               int reg, u32 mask, u32 write)
1245 {
1246         struct e1000_hw *hw = &adapter->hw;
1247         u32 val;
1248
1249         wr32(reg, write & mask);
1250         val = rd32(reg);
1251         if ((write & mask) != (val & mask)) {
1252                 dev_err(&adapter->pdev->dev,
1253                         "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
1254                         reg, (val & mask), (write & mask));
1255                 *data = reg;
1256                 return true;
1257         }
1258
1259         return false;
1260 }
1261
1262 #define REG_PATTERN_TEST(reg, mask, write) \
1263         do { \
1264                 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1265                         return 1; \
1266         } while (0)
1267
1268 #define REG_SET_AND_CHECK(reg, mask, write) \
1269         do { \
1270                 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1271                         return 1; \
1272         } while (0)
1273
1274 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
1275 {
1276         struct e1000_hw *hw = &adapter->hw;
1277         struct igb_reg_test *test;
1278         u32 value, before, after;
1279         u32 i, toggle;
1280
1281         switch (adapter->hw.mac.type) {
1282         case e1000_i350:
1283         case e1000_i354:
1284                 test = reg_test_i350;
1285                 toggle = 0x7FEFF3FF;
1286                 break;
1287         case e1000_i210:
1288         case e1000_i211:
1289                 test = reg_test_i210;
1290                 toggle = 0x7FEFF3FF;
1291                 break;
1292         case e1000_82580:
1293                 test = reg_test_82580;
1294                 toggle = 0x7FEFF3FF;
1295                 break;
1296         case e1000_82576:
1297                 test = reg_test_82576;
1298                 toggle = 0x7FFFF3FF;
1299                 break;
1300         default:
1301                 test = reg_test_82575;
1302                 toggle = 0x7FFFF3FF;
1303                 break;
1304         }
1305
1306         /* Because the status register is such a special case,
1307          * we handle it separately from the rest of the register
1308          * tests.  Some bits are read-only, some toggle, and some
1309          * are writable on newer MACs.
1310          */
1311         before = rd32(E1000_STATUS);
1312         value = (rd32(E1000_STATUS) & toggle);
1313         wr32(E1000_STATUS, toggle);
1314         after = rd32(E1000_STATUS) & toggle;
1315         if (value != after) {
1316                 dev_err(&adapter->pdev->dev,
1317                         "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1318                         after, value);
1319                 *data = 1;
1320                 return 1;
1321         }
1322         /* restore previous status */
1323         wr32(E1000_STATUS, before);
1324
1325         /* Perform the remainder of the register test, looping through
1326          * the test table until we either fail or reach the null entry.
1327          */
1328         while (test->reg) {
1329                 for (i = 0; i < test->array_len; i++) {
1330                         switch (test->test_type) {
1331                         case PATTERN_TEST:
1332                                 REG_PATTERN_TEST(test->reg +
1333                                                 (i * test->reg_offset),
1334                                                 test->mask,
1335                                                 test->write);
1336                                 break;
1337                         case SET_READ_TEST:
1338                                 REG_SET_AND_CHECK(test->reg +
1339                                                 (i * test->reg_offset),
1340                                                 test->mask,
1341                                                 test->write);
1342                                 break;
1343                         case WRITE_NO_TEST:
1344                                 writel(test->write,
1345                                     (adapter->hw.hw_addr + test->reg)
1346                                         + (i * test->reg_offset));
1347                                 break;
1348                         case TABLE32_TEST:
1349                                 REG_PATTERN_TEST(test->reg + (i * 4),
1350                                                 test->mask,
1351                                                 test->write);
1352                                 break;
1353                         case TABLE64_TEST_LO:
1354                                 REG_PATTERN_TEST(test->reg + (i * 8),
1355                                                 test->mask,
1356                                                 test->write);
1357                                 break;
1358                         case TABLE64_TEST_HI:
1359                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1360                                                 test->mask,
1361                                                 test->write);
1362                                 break;
1363                         }
1364                 }
1365                 test++;
1366         }
1367
1368         *data = 0;
1369         return 0;
1370 }
1371
1372 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1373 {
1374         struct e1000_hw *hw = &adapter->hw;
1375
1376         *data = 0;
1377
1378         /* Validate eeprom on all parts but flashless */
1379         switch (hw->mac.type) {
1380         case e1000_i210:
1381         case e1000_i211:
1382                 if (igb_get_flash_presence_i210(hw)) {
1383                         if (adapter->hw.nvm.ops.validate(&adapter->hw) < 0)
1384                                 *data = 2;
1385                 }
1386                 break;
1387         default:
1388                 if (adapter->hw.nvm.ops.validate(&adapter->hw) < 0)
1389                         *data = 2;
1390                 break;
1391         }
1392
1393         return *data;
1394 }
1395
1396 static irqreturn_t igb_test_intr(int irq, void *data)
1397 {
1398         struct igb_adapter *adapter = (struct igb_adapter *) data;
1399         struct e1000_hw *hw = &adapter->hw;
1400
1401         adapter->test_icr |= rd32(E1000_ICR);
1402
1403         return IRQ_HANDLED;
1404 }
1405
1406 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1407 {
1408         struct e1000_hw *hw = &adapter->hw;
1409         struct net_device *netdev = adapter->netdev;
1410         u32 mask, ics_mask, i = 0, shared_int = true;
1411         u32 irq = adapter->pdev->irq;
1412
1413         *data = 0;
1414
1415         /* Hook up test interrupt handler just for this test */
1416         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1417                 if (request_irq(adapter->msix_entries[0].vector,
1418                                 igb_test_intr, 0, netdev->name, adapter)) {
1419                         *data = 1;
1420                         return -1;
1421                 }
1422         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1423                 shared_int = false;
1424                 if (request_irq(irq,
1425                                 igb_test_intr, 0, netdev->name, adapter)) {
1426                         *data = 1;
1427                         return -1;
1428                 }
1429         } else if (!request_irq(irq, igb_test_intr, IRQF_PROBE_SHARED,
1430                                 netdev->name, adapter)) {
1431                 shared_int = false;
1432         } else if (request_irq(irq, igb_test_intr, IRQF_SHARED,
1433                  netdev->name, adapter)) {
1434                 *data = 1;
1435                 return -1;
1436         }
1437         dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
1438                 (shared_int ? "shared" : "unshared"));
1439
1440         /* Disable all the interrupts */
1441         wr32(E1000_IMC, ~0);
1442         wrfl();
1443         usleep_range(10000, 11000);
1444
1445         /* Define all writable bits for ICS */
1446         switch (hw->mac.type) {
1447         case e1000_82575:
1448                 ics_mask = 0x37F47EDD;
1449                 break;
1450         case e1000_82576:
1451                 ics_mask = 0x77D4FBFD;
1452                 break;
1453         case e1000_82580:
1454                 ics_mask = 0x77DCFED5;
1455                 break;
1456         case e1000_i350:
1457         case e1000_i354:
1458         case e1000_i210:
1459         case e1000_i211:
1460                 ics_mask = 0x77DCFED5;
1461                 break;
1462         default:
1463                 ics_mask = 0x7FFFFFFF;
1464                 break;
1465         }
1466
1467         /* Test each interrupt */
1468         for (; i < 31; i++) {
1469                 /* Interrupt to test */
1470                 mask = BIT(i);
1471
1472                 if (!(mask & ics_mask))
1473                         continue;
1474
1475                 if (!shared_int) {
1476                         /* Disable the interrupt to be reported in
1477                          * the cause register and then force the same
1478                          * interrupt and see if one gets posted.  If
1479                          * an interrupt was posted to the bus, the
1480                          * test failed.
1481                          */
1482                         adapter->test_icr = 0;
1483
1484                         /* Flush any pending interrupts */
1485                         wr32(E1000_ICR, ~0);
1486
1487                         wr32(E1000_IMC, mask);
1488                         wr32(E1000_ICS, mask);
1489                         wrfl();
1490                         usleep_range(10000, 11000);
1491
1492                         if (adapter->test_icr & mask) {
1493                                 *data = 3;
1494                                 break;
1495                         }
1496                 }
1497
1498                 /* Enable the interrupt to be reported in
1499                  * the cause register and then force the same
1500                  * interrupt and see if one gets posted.  If
1501                  * an interrupt was not posted to the bus, the
1502                  * test failed.
1503                  */
1504                 adapter->test_icr = 0;
1505
1506                 /* Flush any pending interrupts */
1507                 wr32(E1000_ICR, ~0);
1508
1509                 wr32(E1000_IMS, mask);
1510                 wr32(E1000_ICS, mask);
1511                 wrfl();
1512                 usleep_range(10000, 11000);
1513
1514                 if (!(adapter->test_icr & mask)) {
1515                         *data = 4;
1516                         break;
1517                 }
1518
1519                 if (!shared_int) {
1520                         /* Disable the other interrupts to be reported in
1521                          * the cause register and then force the other
1522                          * interrupts and see if any get posted.  If
1523                          * an interrupt was posted to the bus, the
1524                          * test failed.
1525                          */
1526                         adapter->test_icr = 0;
1527
1528                         /* Flush any pending interrupts */
1529                         wr32(E1000_ICR, ~0);
1530
1531                         wr32(E1000_IMC, ~mask);
1532                         wr32(E1000_ICS, ~mask);
1533                         wrfl();
1534                         usleep_range(10000, 11000);
1535
1536                         if (adapter->test_icr & mask) {
1537                                 *data = 5;
1538                                 break;
1539                         }
1540                 }
1541         }
1542
1543         /* Disable all the interrupts */
1544         wr32(E1000_IMC, ~0);
1545         wrfl();
1546         usleep_range(10000, 11000);
1547
1548         /* Unhook test interrupt handler */
1549         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1550                 free_irq(adapter->msix_entries[0].vector, adapter);
1551         else
1552                 free_irq(irq, adapter);
1553
1554         return *data;
1555 }
1556
1557 static void igb_free_desc_rings(struct igb_adapter *adapter)
1558 {
1559         igb_free_tx_resources(&adapter->test_tx_ring);
1560         igb_free_rx_resources(&adapter->test_rx_ring);
1561 }
1562
1563 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1564 {
1565         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1566         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1567         struct e1000_hw *hw = &adapter->hw;
1568         int ret_val;
1569
1570         /* Setup Tx descriptor ring and Tx buffers */
1571         tx_ring->count = IGB_DEFAULT_TXD;
1572         tx_ring->dev = &adapter->pdev->dev;
1573         tx_ring->netdev = adapter->netdev;
1574         tx_ring->reg_idx = adapter->vfs_allocated_count;
1575
1576         if (igb_setup_tx_resources(tx_ring)) {
1577                 ret_val = 1;
1578                 goto err_nomem;
1579         }
1580
1581         igb_setup_tctl(adapter);
1582         igb_configure_tx_ring(adapter, tx_ring);
1583
1584         /* Setup Rx descriptor ring and Rx buffers */
1585         rx_ring->count = IGB_DEFAULT_RXD;
1586         rx_ring->dev = &adapter->pdev->dev;
1587         rx_ring->netdev = adapter->netdev;
1588         rx_ring->reg_idx = adapter->vfs_allocated_count;
1589
1590         if (igb_setup_rx_resources(rx_ring)) {
1591                 ret_val = 3;
1592                 goto err_nomem;
1593         }
1594
1595         /* set the default queue to queue 0 of PF */
1596         wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);
1597
1598         /* enable receive ring */
1599         igb_setup_rctl(adapter);
1600         igb_configure_rx_ring(adapter, rx_ring);
1601
1602         igb_alloc_rx_buffers(rx_ring, igb_desc_unused(rx_ring));
1603
1604         return 0;
1605
1606 err_nomem:
1607         igb_free_desc_rings(adapter);
1608         return ret_val;
1609 }
1610
1611 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1612 {
1613         struct e1000_hw *hw = &adapter->hw;
1614
1615         /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1616         igb_write_phy_reg(hw, 29, 0x001F);
1617         igb_write_phy_reg(hw, 30, 0x8FFC);
1618         igb_write_phy_reg(hw, 29, 0x001A);
1619         igb_write_phy_reg(hw, 30, 0x8FF0);
1620 }
1621
1622 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1623 {
1624         struct e1000_hw *hw = &adapter->hw;
1625         u32 ctrl_reg = 0;
1626
1627         hw->mac.autoneg = false;
1628
1629         if (hw->phy.type == e1000_phy_m88) {
1630                 if (hw->phy.id != I210_I_PHY_ID) {
1631                         /* Auto-MDI/MDIX Off */
1632                         igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1633                         /* reset to update Auto-MDI/MDIX */
1634                         igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1635                         /* autoneg off */
1636                         igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1637                 } else {
1638                         /* force 1000, set loopback  */
1639                         igb_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0);
1640                         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1641                 }
1642         } else if (hw->phy.type == e1000_phy_82580) {
1643                 /* enable MII loopback */
1644                 igb_write_phy_reg(hw, I82580_PHY_LBK_CTRL, 0x8041);
1645         }
1646
1647         /* add small delay to avoid loopback test failure */
1648         msleep(50);
1649
1650         /* force 1000, set loopback */
1651         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1652
1653         /* Now set up the MAC to the same speed/duplex as the PHY. */
1654         ctrl_reg = rd32(E1000_CTRL);
1655         ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1656         ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1657                      E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1658                      E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1659                      E1000_CTRL_FD |     /* Force Duplex to FULL */
1660                      E1000_CTRL_SLU);    /* Set link up enable bit */
1661
1662         if (hw->phy.type == e1000_phy_m88)
1663                 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1664
1665         wr32(E1000_CTRL, ctrl_reg);
1666
1667         /* Disable the receiver on the PHY so when a cable is plugged in, the
1668          * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1669          */
1670         if (hw->phy.type == e1000_phy_m88)
1671                 igb_phy_disable_receiver(adapter);
1672
1673         mdelay(500);
1674         return 0;
1675 }
1676
1677 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1678 {
1679         return igb_integrated_phy_loopback(adapter);
1680 }
1681
1682 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1683 {
1684         struct e1000_hw *hw = &adapter->hw;
1685         u32 reg;
1686
1687         reg = rd32(E1000_CTRL_EXT);
1688
1689         /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1690         if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
1691                 if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1692                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1693                 (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1694                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP) ||
1695                 (hw->device_id == E1000_DEV_ID_I354_SGMII) ||
1696                 (hw->device_id == E1000_DEV_ID_I354_BACKPLANE_2_5GBPS)) {
1697                         /* Enable DH89xxCC MPHY for near end loopback */
1698                         reg = rd32(E1000_MPHY_ADDR_CTL);
1699                         reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1700                         E1000_MPHY_PCS_CLK_REG_OFFSET;
1701                         wr32(E1000_MPHY_ADDR_CTL, reg);
1702
1703                         reg = rd32(E1000_MPHY_DATA);
1704                         reg |= E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1705                         wr32(E1000_MPHY_DATA, reg);
1706                 }
1707
1708                 reg = rd32(E1000_RCTL);
1709                 reg |= E1000_RCTL_LBM_TCVR;
1710                 wr32(E1000_RCTL, reg);
1711
1712                 wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1713
1714                 reg = rd32(E1000_CTRL);
1715                 reg &= ~(E1000_CTRL_RFCE |
1716                          E1000_CTRL_TFCE |
1717                          E1000_CTRL_LRST);
1718                 reg |= E1000_CTRL_SLU |
1719                        E1000_CTRL_FD;
1720                 wr32(E1000_CTRL, reg);
1721
1722                 /* Unset switch control to serdes energy detect */
1723                 reg = rd32(E1000_CONNSW);
1724                 reg &= ~E1000_CONNSW_ENRGSRC;
1725                 wr32(E1000_CONNSW, reg);
1726
1727                 /* Unset sigdetect for SERDES loopback on
1728                  * 82580 and newer devices.
1729                  */
1730                 if (hw->mac.type >= e1000_82580) {
1731                         reg = rd32(E1000_PCS_CFG0);
1732                         reg |= E1000_PCS_CFG_IGN_SD;
1733                         wr32(E1000_PCS_CFG0, reg);
1734                 }
1735
1736                 /* Set PCS register for forced speed */
1737                 reg = rd32(E1000_PCS_LCTL);
1738                 reg &= ~E1000_PCS_LCTL_AN_ENABLE;     /* Disable Autoneg*/
1739                 reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
1740                        E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
1741                        E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
1742                        E1000_PCS_LCTL_FSD |           /* Force Speed */
1743                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
1744                 wr32(E1000_PCS_LCTL, reg);
1745
1746                 return 0;
1747         }
1748
1749         return igb_set_phy_loopback(adapter);
1750 }
1751
1752 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1753 {
1754         struct e1000_hw *hw = &adapter->hw;
1755         u32 rctl;
1756         u16 phy_reg;
1757
1758         if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1759         (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1760         (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1761         (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP) ||
1762         (hw->device_id == E1000_DEV_ID_I354_SGMII)) {
1763                 u32 reg;
1764
1765                 /* Disable near end loopback on DH89xxCC */
1766                 reg = rd32(E1000_MPHY_ADDR_CTL);
1767                 reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1768                 E1000_MPHY_PCS_CLK_REG_OFFSET;
1769                 wr32(E1000_MPHY_ADDR_CTL, reg);
1770
1771                 reg = rd32(E1000_MPHY_DATA);
1772                 reg &= ~E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1773                 wr32(E1000_MPHY_DATA, reg);
1774         }
1775
1776         rctl = rd32(E1000_RCTL);
1777         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1778         wr32(E1000_RCTL, rctl);
1779
1780         hw->mac.autoneg = true;
1781         igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1782         if (phy_reg & MII_CR_LOOPBACK) {
1783                 phy_reg &= ~MII_CR_LOOPBACK;
1784                 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1785                 igb_phy_sw_reset(hw);
1786         }
1787 }
1788
1789 static void igb_create_lbtest_frame(struct sk_buff *skb,
1790                                     unsigned int frame_size)
1791 {
1792         memset(skb->data, 0xFF, frame_size);
1793         frame_size /= 2;
1794         memset(&skb->data[frame_size], 0xAA, frame_size - 1);
1795         memset(&skb->data[frame_size + 10], 0xBE, 1);
1796         memset(&skb->data[frame_size + 12], 0xAF, 1);
1797 }
1798
1799 static int igb_check_lbtest_frame(struct igb_rx_buffer *rx_buffer,
1800                                   unsigned int frame_size)
1801 {
1802         unsigned char *data;
1803         bool match = true;
1804
1805         frame_size >>= 1;
1806
1807         data = kmap(rx_buffer->page);
1808
1809         if (data[3] != 0xFF ||
1810             data[frame_size + 10] != 0xBE ||
1811             data[frame_size + 12] != 0xAF)
1812                 match = false;
1813
1814         kunmap(rx_buffer->page);
1815
1816         return match;
1817 }
1818
1819 static int igb_clean_test_rings(struct igb_ring *rx_ring,
1820                                 struct igb_ring *tx_ring,
1821                                 unsigned int size)
1822 {
1823         union e1000_adv_rx_desc *rx_desc;
1824         struct igb_rx_buffer *rx_buffer_info;
1825         struct igb_tx_buffer *tx_buffer_info;
1826         u16 rx_ntc, tx_ntc, count = 0;
1827
1828         /* initialize next to clean and descriptor values */
1829         rx_ntc = rx_ring->next_to_clean;
1830         tx_ntc = tx_ring->next_to_clean;
1831         rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1832
1833         while (rx_desc->wb.upper.length) {
1834                 /* check Rx buffer */
1835                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1836
1837                 /* sync Rx buffer for CPU read */
1838                 dma_sync_single_for_cpu(rx_ring->dev,
1839                                         rx_buffer_info->dma,
1840                                         size,
1841                                         DMA_FROM_DEVICE);
1842
1843                 /* verify contents of skb */
1844                 if (igb_check_lbtest_frame(rx_buffer_info, size))
1845                         count++;
1846
1847                 /* sync Rx buffer for device write */
1848                 dma_sync_single_for_device(rx_ring->dev,
1849                                            rx_buffer_info->dma,
1850                                            size,
1851                                            DMA_FROM_DEVICE);
1852
1853                 /* unmap buffer on Tx side */
1854                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1855
1856                 /* Free all the Tx ring sk_buffs */
1857                 dev_kfree_skb_any(tx_buffer_info->skb);
1858
1859                 /* unmap skb header data */
1860                 dma_unmap_single(tx_ring->dev,
1861                                  dma_unmap_addr(tx_buffer_info, dma),
1862                                  dma_unmap_len(tx_buffer_info, len),
1863                                  DMA_TO_DEVICE);
1864                 dma_unmap_len_set(tx_buffer_info, len, 0);
1865
1866                 /* increment Rx/Tx next to clean counters */
1867                 rx_ntc++;
1868                 if (rx_ntc == rx_ring->count)
1869                         rx_ntc = 0;
1870                 tx_ntc++;
1871                 if (tx_ntc == tx_ring->count)
1872                         tx_ntc = 0;
1873
1874                 /* fetch next descriptor */
1875                 rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1876         }
1877
1878         netdev_tx_reset_queue(txring_txq(tx_ring));
1879
1880         /* re-map buffers to ring, store next to clean values */
1881         igb_alloc_rx_buffers(rx_ring, count);
1882         rx_ring->next_to_clean = rx_ntc;
1883         tx_ring->next_to_clean = tx_ntc;
1884
1885         return count;
1886 }
1887
1888 static int igb_run_loopback_test(struct igb_adapter *adapter)
1889 {
1890         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1891         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1892         u16 i, j, lc, good_cnt;
1893         int ret_val = 0;
1894         unsigned int size = IGB_RX_HDR_LEN;
1895         netdev_tx_t tx_ret_val;
1896         struct sk_buff *skb;
1897
1898         /* allocate test skb */
1899         skb = alloc_skb(size, GFP_KERNEL);
1900         if (!skb)
1901                 return 11;
1902
1903         /* place data into test skb */
1904         igb_create_lbtest_frame(skb, size);
1905         skb_put(skb, size);
1906
1907         /* Calculate the loop count based on the largest descriptor ring
1908          * The idea is to wrap the largest ring a number of times using 64
1909          * send/receive pairs during each loop
1910          */
1911
1912         if (rx_ring->count <= tx_ring->count)
1913                 lc = ((tx_ring->count / 64) * 2) + 1;
1914         else
1915                 lc = ((rx_ring->count / 64) * 2) + 1;
1916
1917         for (j = 0; j <= lc; j++) { /* loop count loop */
1918                 /* reset count of good packets */
1919                 good_cnt = 0;
1920
1921                 /* place 64 packets on the transmit queue*/
1922                 for (i = 0; i < 64; i++) {
1923                         skb_get(skb);
1924                         tx_ret_val = igb_xmit_frame_ring(skb, tx_ring);
1925                         if (tx_ret_val == NETDEV_TX_OK)
1926                                 good_cnt++;
1927                 }
1928
1929                 if (good_cnt != 64) {
1930                         ret_val = 12;
1931                         break;
1932                 }
1933
1934                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1935                 msleep(200);
1936
1937                 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1938                 if (good_cnt != 64) {
1939                         ret_val = 13;
1940                         break;
1941                 }
1942         } /* end loop count loop */
1943
1944         /* free the original skb */
1945         kfree_skb(skb);
1946
1947         return ret_val;
1948 }
1949
1950 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1951 {
1952         /* PHY loopback cannot be performed if SoL/IDER
1953          * sessions are active
1954          */
1955         if (igb_check_reset_block(&adapter->hw)) {
1956                 dev_err(&adapter->pdev->dev,
1957                         "Cannot do PHY loopback test when SoL/IDER is active.\n");
1958                 *data = 0;
1959                 goto out;
1960         }
1961
1962         if (adapter->hw.mac.type == e1000_i354) {
1963                 dev_info(&adapter->pdev->dev,
1964                         "Loopback test not supported on i354.\n");
1965                 *data = 0;
1966                 goto out;
1967         }
1968         *data = igb_setup_desc_rings(adapter);
1969         if (*data)
1970                 goto out;
1971         *data = igb_setup_loopback_test(adapter);
1972         if (*data)
1973                 goto err_loopback;
1974         *data = igb_run_loopback_test(adapter);
1975         igb_loopback_cleanup(adapter);
1976
1977 err_loopback:
1978         igb_free_desc_rings(adapter);
1979 out:
1980         return *data;
1981 }
1982
1983 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1984 {
1985         struct e1000_hw *hw = &adapter->hw;
1986         *data = 0;
1987         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1988                 int i = 0;
1989
1990                 hw->mac.serdes_has_link = false;
1991
1992                 /* On some blade server designs, link establishment
1993                  * could take as long as 2-3 minutes
1994                  */
1995                 do {
1996                         hw->mac.ops.check_for_link(&adapter->hw);
1997                         if (hw->mac.serdes_has_link)
1998                                 return *data;
1999                         msleep(20);
2000                 } while (i++ < 3750);
2001
2002                 *data = 1;
2003         } else {
2004                 hw->mac.ops.check_for_link(&adapter->hw);
2005                 if (hw->mac.autoneg)
2006                         msleep(5000);
2007
2008                 if (!(rd32(E1000_STATUS) & E1000_STATUS_LU))
2009                         *data = 1;
2010         }
2011         return *data;
2012 }
2013
2014 static void igb_diag_test(struct net_device *netdev,
2015                           struct ethtool_test *eth_test, u64 *data)
2016 {
2017         struct igb_adapter *adapter = netdev_priv(netdev);
2018         u16 autoneg_advertised;
2019         u8 forced_speed_duplex, autoneg;
2020         bool if_running = netif_running(netdev);
2021
2022         set_bit(__IGB_TESTING, &adapter->state);
2023
2024         /* can't do offline tests on media switching devices */
2025         if (adapter->hw.dev_spec._82575.mas_capable)
2026                 eth_test->flags &= ~ETH_TEST_FL_OFFLINE;
2027         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2028                 /* Offline tests */
2029
2030                 /* save speed, duplex, autoneg settings */
2031                 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
2032                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
2033                 autoneg = adapter->hw.mac.autoneg;
2034
2035                 dev_info(&adapter->pdev->dev, "offline testing starting\n");
2036
2037                 /* power up link for link test */
2038                 igb_power_up_link(adapter);
2039
2040                 /* Link test performed before hardware reset so autoneg doesn't
2041                  * interfere with test result
2042                  */
2043                 if (igb_link_test(adapter, &data[TEST_LINK]))
2044                         eth_test->flags |= ETH_TEST_FL_FAILED;
2045
2046                 if (if_running)
2047                         /* indicate we're in test mode */
2048                         igb_close(netdev);
2049                 else
2050                         igb_reset(adapter);
2051
2052                 if (igb_reg_test(adapter, &data[TEST_REG]))
2053                         eth_test->flags |= ETH_TEST_FL_FAILED;
2054
2055                 igb_reset(adapter);
2056                 if (igb_eeprom_test(adapter, &data[TEST_EEP]))
2057                         eth_test->flags |= ETH_TEST_FL_FAILED;
2058
2059                 igb_reset(adapter);
2060                 if (igb_intr_test(adapter, &data[TEST_IRQ]))
2061                         eth_test->flags |= ETH_TEST_FL_FAILED;
2062
2063                 igb_reset(adapter);
2064                 /* power up link for loopback test */
2065                 igb_power_up_link(adapter);
2066                 if (igb_loopback_test(adapter, &data[TEST_LOOP]))
2067                         eth_test->flags |= ETH_TEST_FL_FAILED;
2068
2069                 /* restore speed, duplex, autoneg settings */
2070                 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
2071                 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
2072                 adapter->hw.mac.autoneg = autoneg;
2073
2074                 /* force this routine to wait until autoneg complete/timeout */
2075                 adapter->hw.phy.autoneg_wait_to_complete = true;
2076                 igb_reset(adapter);
2077                 adapter->hw.phy.autoneg_wait_to_complete = false;
2078
2079                 clear_bit(__IGB_TESTING, &adapter->state);
2080                 if (if_running)
2081                         igb_open(netdev);
2082         } else {
2083                 dev_info(&adapter->pdev->dev, "online testing starting\n");
2084
2085                 /* PHY is powered down when interface is down */
2086                 if (if_running && igb_link_test(adapter, &data[TEST_LINK]))
2087                         eth_test->flags |= ETH_TEST_FL_FAILED;
2088                 else
2089                         data[TEST_LINK] = 0;
2090
2091                 /* Online tests aren't run; pass by default */
2092                 data[TEST_REG] = 0;
2093                 data[TEST_EEP] = 0;
2094                 data[TEST_IRQ] = 0;
2095                 data[TEST_LOOP] = 0;
2096
2097                 clear_bit(__IGB_TESTING, &adapter->state);
2098         }
2099         msleep_interruptible(4 * 1000);
2100 }
2101
2102 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2103 {
2104         struct igb_adapter *adapter = netdev_priv(netdev);
2105
2106         wol->wolopts = 0;
2107
2108         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2109                 return;
2110
2111         wol->supported = WAKE_UCAST | WAKE_MCAST |
2112                          WAKE_BCAST | WAKE_MAGIC |
2113                          WAKE_PHY;
2114
2115         /* apply any specific unsupported masks here */
2116         switch (adapter->hw.device_id) {
2117         default:
2118                 break;
2119         }
2120
2121         if (adapter->wol & E1000_WUFC_EX)
2122                 wol->wolopts |= WAKE_UCAST;
2123         if (adapter->wol & E1000_WUFC_MC)
2124                 wol->wolopts |= WAKE_MCAST;
2125         if (adapter->wol & E1000_WUFC_BC)
2126                 wol->wolopts |= WAKE_BCAST;
2127         if (adapter->wol & E1000_WUFC_MAG)
2128                 wol->wolopts |= WAKE_MAGIC;
2129         if (adapter->wol & E1000_WUFC_LNKC)
2130                 wol->wolopts |= WAKE_PHY;
2131 }
2132
2133 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2134 {
2135         struct igb_adapter *adapter = netdev_priv(netdev);
2136
2137         if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
2138                 return -EOPNOTSUPP;
2139
2140         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2141                 return wol->wolopts ? -EOPNOTSUPP : 0;
2142
2143         /* these settings will always override what we currently have */
2144         adapter->wol = 0;
2145
2146         if (wol->wolopts & WAKE_UCAST)
2147                 adapter->wol |= E1000_WUFC_EX;
2148         if (wol->wolopts & WAKE_MCAST)
2149                 adapter->wol |= E1000_WUFC_MC;
2150         if (wol->wolopts & WAKE_BCAST)
2151                 adapter->wol |= E1000_WUFC_BC;
2152         if (wol->wolopts & WAKE_MAGIC)
2153                 adapter->wol |= E1000_WUFC_MAG;
2154         if (wol->wolopts & WAKE_PHY)
2155                 adapter->wol |= E1000_WUFC_LNKC;
2156         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2157
2158         return 0;
2159 }
2160
2161 /* bit defines for adapter->led_status */
2162 #define IGB_LED_ON              0
2163
2164 static int igb_set_phys_id(struct net_device *netdev,
2165                            enum ethtool_phys_id_state state)
2166 {
2167         struct igb_adapter *adapter = netdev_priv(netdev);
2168         struct e1000_hw *hw = &adapter->hw;
2169
2170         switch (state) {
2171         case ETHTOOL_ID_ACTIVE:
2172                 igb_blink_led(hw);
2173                 return 2;
2174         case ETHTOOL_ID_ON:
2175                 igb_blink_led(hw);
2176                 break;
2177         case ETHTOOL_ID_OFF:
2178                 igb_led_off(hw);
2179                 break;
2180         case ETHTOOL_ID_INACTIVE:
2181                 igb_led_off(hw);
2182                 clear_bit(IGB_LED_ON, &adapter->led_status);
2183                 igb_cleanup_led(hw);
2184                 break;
2185         }
2186
2187         return 0;
2188 }
2189
2190 static int igb_set_coalesce(struct net_device *netdev,
2191                             struct ethtool_coalesce *ec)
2192 {
2193         struct igb_adapter *adapter = netdev_priv(netdev);
2194         int i;
2195
2196         if (ec->rx_max_coalesced_frames ||
2197             ec->rx_coalesce_usecs_irq ||
2198             ec->rx_max_coalesced_frames_irq ||
2199             ec->tx_max_coalesced_frames ||
2200             ec->tx_coalesce_usecs_irq ||
2201             ec->stats_block_coalesce_usecs ||
2202             ec->use_adaptive_rx_coalesce ||
2203             ec->use_adaptive_tx_coalesce ||
2204             ec->pkt_rate_low ||
2205             ec->rx_coalesce_usecs_low ||
2206             ec->rx_max_coalesced_frames_low ||
2207             ec->tx_coalesce_usecs_low ||
2208             ec->tx_max_coalesced_frames_low ||
2209             ec->pkt_rate_high ||
2210             ec->rx_coalesce_usecs_high ||
2211             ec->rx_max_coalesced_frames_high ||
2212             ec->tx_coalesce_usecs_high ||
2213             ec->tx_max_coalesced_frames_high ||
2214             ec->rate_sample_interval)
2215                 return -ENOTSUPP;
2216
2217         if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2218             ((ec->rx_coalesce_usecs > 3) &&
2219              (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2220             (ec->rx_coalesce_usecs == 2))
2221                 return -EINVAL;
2222
2223         if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2224             ((ec->tx_coalesce_usecs > 3) &&
2225              (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2226             (ec->tx_coalesce_usecs == 2))
2227                 return -EINVAL;
2228
2229         if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
2230                 return -EINVAL;
2231
2232         /* If ITR is disabled, disable DMAC */
2233         if (ec->rx_coalesce_usecs == 0) {
2234                 if (adapter->flags & IGB_FLAG_DMAC)
2235                         adapter->flags &= ~IGB_FLAG_DMAC;
2236         }
2237
2238         /* convert to rate of irq's per second */
2239         if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
2240                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2241         else
2242                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2243
2244         /* convert to rate of irq's per second */
2245         if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
2246                 adapter->tx_itr_setting = adapter->rx_itr_setting;
2247         else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
2248                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2249         else
2250                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2251
2252         for (i = 0; i < adapter->num_q_vectors; i++) {
2253                 struct igb_q_vector *q_vector = adapter->q_vector[i];
2254                 q_vector->tx.work_limit = adapter->tx_work_limit;
2255                 if (q_vector->rx.ring)
2256                         q_vector->itr_val = adapter->rx_itr_setting;
2257                 else
2258                         q_vector->itr_val = adapter->tx_itr_setting;
2259                 if (q_vector->itr_val && q_vector->itr_val <= 3)
2260                         q_vector->itr_val = IGB_START_ITR;
2261                 q_vector->set_itr = 1;
2262         }
2263
2264         return 0;
2265 }
2266
2267 static int igb_get_coalesce(struct net_device *netdev,
2268                             struct ethtool_coalesce *ec)
2269 {
2270         struct igb_adapter *adapter = netdev_priv(netdev);
2271
2272         if (adapter->rx_itr_setting <= 3)
2273                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2274         else
2275                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2276
2277         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
2278                 if (adapter->tx_itr_setting <= 3)
2279                         ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2280                 else
2281                         ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2282         }
2283
2284         return 0;
2285 }
2286
2287 static int igb_nway_reset(struct net_device *netdev)
2288 {
2289         struct igb_adapter *adapter = netdev_priv(netdev);
2290         if (netif_running(netdev))
2291                 igb_reinit_locked(adapter);
2292         return 0;
2293 }
2294
2295 static int igb_get_sset_count(struct net_device *netdev, int sset)
2296 {
2297         switch (sset) {
2298         case ETH_SS_STATS:
2299                 return IGB_STATS_LEN;
2300         case ETH_SS_TEST:
2301                 return IGB_TEST_LEN;
2302         case ETH_SS_PRIV_FLAGS:
2303                 return IGB_PRIV_FLAGS_STR_LEN;
2304         default:
2305                 return -ENOTSUPP;
2306         }
2307 }
2308
2309 static void igb_get_ethtool_stats(struct net_device *netdev,
2310                                   struct ethtool_stats *stats, u64 *data)
2311 {
2312         struct igb_adapter *adapter = netdev_priv(netdev);
2313         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
2314         unsigned int start;
2315         struct igb_ring *ring;
2316         int i, j;
2317         char *p;
2318
2319         spin_lock(&adapter->stats64_lock);
2320         igb_update_stats(adapter);
2321
2322         for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2323                 p = (char *)adapter + igb_gstrings_stats[i].stat_offset;
2324                 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
2325                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2326         }
2327         for (j = 0; j < IGB_NETDEV_STATS_LEN; j++, i++) {
2328                 p = (char *)net_stats + igb_gstrings_net_stats[j].stat_offset;
2329                 data[i] = (igb_gstrings_net_stats[j].sizeof_stat ==
2330                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2331         }
2332         for (j = 0; j < adapter->num_tx_queues; j++) {
2333                 u64     restart2;
2334
2335                 ring = adapter->tx_ring[j];
2336                 do {
2337                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
2338                         data[i]   = ring->tx_stats.packets;
2339                         data[i+1] = ring->tx_stats.bytes;
2340                         data[i+2] = ring->tx_stats.restart_queue;
2341                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
2342                 do {
2343                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp2);
2344                         restart2  = ring->tx_stats.restart_queue2;
2345                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp2, start));
2346                 data[i+2] += restart2;
2347
2348                 i += IGB_TX_QUEUE_STATS_LEN;
2349         }
2350         for (j = 0; j < adapter->num_rx_queues; j++) {
2351                 ring = adapter->rx_ring[j];
2352                 do {
2353                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
2354                         data[i]   = ring->rx_stats.packets;
2355                         data[i+1] = ring->rx_stats.bytes;
2356                         data[i+2] = ring->rx_stats.drops;
2357                         data[i+3] = ring->rx_stats.csum_err;
2358                         data[i+4] = ring->rx_stats.alloc_failed;
2359                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
2360                 i += IGB_RX_QUEUE_STATS_LEN;
2361         }
2362         spin_unlock(&adapter->stats64_lock);
2363 }
2364
2365 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2366 {
2367         struct igb_adapter *adapter = netdev_priv(netdev);
2368         u8 *p = data;
2369         int i;
2370
2371         switch (stringset) {
2372         case ETH_SS_TEST:
2373                 memcpy(data, *igb_gstrings_test,
2374                         IGB_TEST_LEN*ETH_GSTRING_LEN);
2375                 break;
2376         case ETH_SS_STATS:
2377                 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2378                         memcpy(p, igb_gstrings_stats[i].stat_string,
2379                                ETH_GSTRING_LEN);
2380                         p += ETH_GSTRING_LEN;
2381                 }
2382                 for (i = 0; i < IGB_NETDEV_STATS_LEN; i++) {
2383                         memcpy(p, igb_gstrings_net_stats[i].stat_string,
2384                                ETH_GSTRING_LEN);
2385                         p += ETH_GSTRING_LEN;
2386                 }
2387                 for (i = 0; i < adapter->num_tx_queues; i++) {
2388                         sprintf(p, "tx_queue_%u_packets", i);
2389                         p += ETH_GSTRING_LEN;
2390                         sprintf(p, "tx_queue_%u_bytes", i);
2391                         p += ETH_GSTRING_LEN;
2392                         sprintf(p, "tx_queue_%u_restart", i);
2393                         p += ETH_GSTRING_LEN;
2394                 }
2395                 for (i = 0; i < adapter->num_rx_queues; i++) {
2396                         sprintf(p, "rx_queue_%u_packets", i);
2397                         p += ETH_GSTRING_LEN;
2398                         sprintf(p, "rx_queue_%u_bytes", i);
2399                         p += ETH_GSTRING_LEN;
2400                         sprintf(p, "rx_queue_%u_drops", i);
2401                         p += ETH_GSTRING_LEN;
2402                         sprintf(p, "rx_queue_%u_csum_err", i);
2403                         p += ETH_GSTRING_LEN;
2404                         sprintf(p, "rx_queue_%u_alloc_failed", i);
2405                         p += ETH_GSTRING_LEN;
2406                 }
2407                 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2408                 break;
2409         case ETH_SS_PRIV_FLAGS:
2410                 memcpy(data, igb_priv_flags_strings,
2411                        IGB_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN);
2412                 break;
2413         }
2414 }
2415
2416 static int igb_get_ts_info(struct net_device *dev,
2417                            struct ethtool_ts_info *info)
2418 {
2419         struct igb_adapter *adapter = netdev_priv(dev);
2420
2421         if (adapter->ptp_clock)
2422                 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2423         else
2424                 info->phc_index = -1;
2425
2426         switch (adapter->hw.mac.type) {
2427         case e1000_82575:
2428                 info->so_timestamping =
2429                         SOF_TIMESTAMPING_TX_SOFTWARE |
2430                         SOF_TIMESTAMPING_RX_SOFTWARE |
2431                         SOF_TIMESTAMPING_SOFTWARE;
2432                 return 0;
2433         case e1000_82576:
2434         case e1000_82580:
2435         case e1000_i350:
2436         case e1000_i354:
2437         case e1000_i210:
2438         case e1000_i211:
2439                 info->so_timestamping =
2440                         SOF_TIMESTAMPING_TX_SOFTWARE |
2441                         SOF_TIMESTAMPING_RX_SOFTWARE |
2442                         SOF_TIMESTAMPING_SOFTWARE |
2443                         SOF_TIMESTAMPING_TX_HARDWARE |
2444                         SOF_TIMESTAMPING_RX_HARDWARE |
2445                         SOF_TIMESTAMPING_RAW_HARDWARE;
2446
2447                 info->tx_types =
2448                         BIT(HWTSTAMP_TX_OFF) |
2449                         BIT(HWTSTAMP_TX_ON);
2450
2451                 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE);
2452
2453                 /* 82576 does not support timestamping all packets. */
2454                 if (adapter->hw.mac.type >= e1000_82580)
2455                         info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL);
2456                 else
2457                         info->rx_filters |=
2458                                 BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2459                                 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2460                                 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
2461
2462                 return 0;
2463         default:
2464                 return -EOPNOTSUPP;
2465         }
2466 }
2467
2468 #define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
2469 static int igb_get_ethtool_nfc_entry(struct igb_adapter *adapter,
2470                                      struct ethtool_rxnfc *cmd)
2471 {
2472         struct ethtool_rx_flow_spec *fsp = &cmd->fs;
2473         struct igb_nfc_filter *rule = NULL;
2474
2475         /* report total rule count */
2476         cmd->data = IGB_MAX_RXNFC_FILTERS;
2477
2478         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2479                 if (fsp->location <= rule->sw_idx)
2480                         break;
2481         }
2482
2483         if (!rule || fsp->location != rule->sw_idx)
2484                 return -EINVAL;
2485
2486         if (rule->filter.match_flags) {
2487                 fsp->flow_type = ETHER_FLOW;
2488                 fsp->ring_cookie = rule->action;
2489                 if (rule->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE) {
2490                         fsp->h_u.ether_spec.h_proto = rule->filter.etype;
2491                         fsp->m_u.ether_spec.h_proto = ETHER_TYPE_FULL_MASK;
2492                 }
2493                 if (rule->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI) {
2494                         fsp->flow_type |= FLOW_EXT;
2495                         fsp->h_ext.vlan_tci = rule->filter.vlan_tci;
2496                         fsp->m_ext.vlan_tci = htons(VLAN_PRIO_MASK);
2497                 }
2498                 return 0;
2499         }
2500         return -EINVAL;
2501 }
2502
2503 static int igb_get_ethtool_nfc_all(struct igb_adapter *adapter,
2504                                    struct ethtool_rxnfc *cmd,
2505                                    u32 *rule_locs)
2506 {
2507         struct igb_nfc_filter *rule;
2508         int cnt = 0;
2509
2510         /* report total rule count */
2511         cmd->data = IGB_MAX_RXNFC_FILTERS;
2512
2513         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2514                 if (cnt == cmd->rule_cnt)
2515                         return -EMSGSIZE;
2516                 rule_locs[cnt] = rule->sw_idx;
2517                 cnt++;
2518         }
2519
2520         cmd->rule_cnt = cnt;
2521
2522         return 0;
2523 }
2524
2525 static int igb_get_rss_hash_opts(struct igb_adapter *adapter,
2526                                  struct ethtool_rxnfc *cmd)
2527 {
2528         cmd->data = 0;
2529
2530         /* Report default options for RSS on igb */
2531         switch (cmd->flow_type) {
2532         case TCP_V4_FLOW:
2533                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2534                 /* Fall through */
2535         case UDP_V4_FLOW:
2536                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2537                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2538                 /* Fall through */
2539         case SCTP_V4_FLOW:
2540         case AH_ESP_V4_FLOW:
2541         case AH_V4_FLOW:
2542         case ESP_V4_FLOW:
2543         case IPV4_FLOW:
2544                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2545                 break;
2546         case TCP_V6_FLOW:
2547                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2548                 /* Fall through */
2549         case UDP_V6_FLOW:
2550                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2551                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2552                 /* Fall through */
2553         case SCTP_V6_FLOW:
2554         case AH_ESP_V6_FLOW:
2555         case AH_V6_FLOW:
2556         case ESP_V6_FLOW:
2557         case IPV6_FLOW:
2558                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2559                 break;
2560         default:
2561                 return -EINVAL;
2562         }
2563
2564         return 0;
2565 }
2566
2567 static int igb_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2568                          u32 *rule_locs)
2569 {
2570         struct igb_adapter *adapter = netdev_priv(dev);
2571         int ret = -EOPNOTSUPP;
2572
2573         switch (cmd->cmd) {
2574         case ETHTOOL_GRXRINGS:
2575                 cmd->data = adapter->num_rx_queues;
2576                 ret = 0;
2577                 break;
2578         case ETHTOOL_GRXCLSRLCNT:
2579                 cmd->rule_cnt = adapter->nfc_filter_count;
2580                 ret = 0;
2581                 break;
2582         case ETHTOOL_GRXCLSRULE:
2583                 ret = igb_get_ethtool_nfc_entry(adapter, cmd);
2584                 break;
2585         case ETHTOOL_GRXCLSRLALL:
2586                 ret = igb_get_ethtool_nfc_all(adapter, cmd, rule_locs);
2587                 break;
2588         case ETHTOOL_GRXFH:
2589                 ret = igb_get_rss_hash_opts(adapter, cmd);
2590                 break;
2591         default:
2592                 break;
2593         }
2594
2595         return ret;
2596 }
2597
2598 #define UDP_RSS_FLAGS (IGB_FLAG_RSS_FIELD_IPV4_UDP | \
2599                        IGB_FLAG_RSS_FIELD_IPV6_UDP)
2600 static int igb_set_rss_hash_opt(struct igb_adapter *adapter,
2601                                 struct ethtool_rxnfc *nfc)
2602 {
2603         u32 flags = adapter->flags;
2604
2605         /* RSS does not support anything other than hashing
2606          * to queues on src and dst IPs and ports
2607          */
2608         if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2609                           RXH_L4_B_0_1 | RXH_L4_B_2_3))
2610                 return -EINVAL;
2611
2612         switch (nfc->flow_type) {
2613         case TCP_V4_FLOW:
2614         case TCP_V6_FLOW:
2615                 if (!(nfc->data & RXH_IP_SRC) ||
2616                     !(nfc->data & RXH_IP_DST) ||
2617                     !(nfc->data & RXH_L4_B_0_1) ||
2618                     !(nfc->data & RXH_L4_B_2_3))
2619                         return -EINVAL;
2620                 break;
2621         case UDP_V4_FLOW:
2622                 if (!(nfc->data & RXH_IP_SRC) ||
2623                     !(nfc->data & RXH_IP_DST))
2624                         return -EINVAL;
2625                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2626                 case 0:
2627                         flags &= ~IGB_FLAG_RSS_FIELD_IPV4_UDP;
2628                         break;
2629                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2630                         flags |= IGB_FLAG_RSS_FIELD_IPV4_UDP;
2631                         break;
2632                 default:
2633                         return -EINVAL;
2634                 }
2635                 break;
2636         case UDP_V6_FLOW:
2637                 if (!(nfc->data & RXH_IP_SRC) ||
2638                     !(nfc->data & RXH_IP_DST))
2639                         return -EINVAL;
2640                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2641                 case 0:
2642                         flags &= ~IGB_FLAG_RSS_FIELD_IPV6_UDP;
2643                         break;
2644                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2645                         flags |= IGB_FLAG_RSS_FIELD_IPV6_UDP;
2646                         break;
2647                 default:
2648                         return -EINVAL;
2649                 }
2650                 break;
2651         case AH_ESP_V4_FLOW:
2652         case AH_V4_FLOW:
2653         case ESP_V4_FLOW:
2654         case SCTP_V4_FLOW:
2655         case AH_ESP_V6_FLOW:
2656         case AH_V6_FLOW:
2657         case ESP_V6_FLOW:
2658         case SCTP_V6_FLOW:
2659                 if (!(nfc->data & RXH_IP_SRC) ||
2660                     !(nfc->data & RXH_IP_DST) ||
2661                     (nfc->data & RXH_L4_B_0_1) ||
2662                     (nfc->data & RXH_L4_B_2_3))
2663                         return -EINVAL;
2664                 break;
2665         default:
2666                 return -EINVAL;
2667         }
2668
2669         /* if we changed something we need to update flags */
2670         if (flags != adapter->flags) {
2671                 struct e1000_hw *hw = &adapter->hw;
2672                 u32 mrqc = rd32(E1000_MRQC);
2673
2674                 if ((flags & UDP_RSS_FLAGS) &&
2675                     !(adapter->flags & UDP_RSS_FLAGS))
2676                         dev_err(&adapter->pdev->dev,
2677                                 "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2678
2679                 adapter->flags = flags;
2680
2681                 /* Perform hash on these packet types */
2682                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4 |
2683                         E1000_MRQC_RSS_FIELD_IPV4_TCP |
2684                         E1000_MRQC_RSS_FIELD_IPV6 |
2685                         E1000_MRQC_RSS_FIELD_IPV6_TCP;
2686
2687                 mrqc &= ~(E1000_MRQC_RSS_FIELD_IPV4_UDP |
2688                           E1000_MRQC_RSS_FIELD_IPV6_UDP);
2689
2690                 if (flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2691                         mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
2692
2693                 if (flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2694                         mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
2695
2696                 wr32(E1000_MRQC, mrqc);
2697         }
2698
2699         return 0;
2700 }
2701
2702 static int igb_rxnfc_write_etype_filter(struct igb_adapter *adapter,
2703                                         struct igb_nfc_filter *input)
2704 {
2705         struct e1000_hw *hw = &adapter->hw;
2706         u8 i;
2707         u32 etqf;
2708         u16 etype;
2709
2710         /* find an empty etype filter register */
2711         for (i = 0; i < MAX_ETYPE_FILTER; ++i) {
2712                 if (!adapter->etype_bitmap[i])
2713                         break;
2714         }
2715         if (i == MAX_ETYPE_FILTER) {
2716                 dev_err(&adapter->pdev->dev, "ethtool -N: etype filters are all used.\n");
2717                 return -EINVAL;
2718         }
2719
2720         adapter->etype_bitmap[i] = true;
2721
2722         etqf = rd32(E1000_ETQF(i));
2723         etype = ntohs(input->filter.etype & ETHER_TYPE_FULL_MASK);
2724
2725         etqf |= E1000_ETQF_FILTER_ENABLE;
2726         etqf &= ~E1000_ETQF_ETYPE_MASK;
2727         etqf |= (etype & E1000_ETQF_ETYPE_MASK);
2728
2729         etqf &= ~E1000_ETQF_QUEUE_MASK;
2730         etqf |= ((input->action << E1000_ETQF_QUEUE_SHIFT)
2731                 & E1000_ETQF_QUEUE_MASK);
2732         etqf |= E1000_ETQF_QUEUE_ENABLE;
2733
2734         wr32(E1000_ETQF(i), etqf);
2735
2736         input->etype_reg_index = i;
2737
2738         return 0;
2739 }
2740
2741 static int igb_rxnfc_write_vlan_prio_filter(struct igb_adapter *adapter,
2742                                             struct igb_nfc_filter *input)
2743 {
2744         struct e1000_hw *hw = &adapter->hw;
2745         u8 vlan_priority;
2746         u16 queue_index;
2747         u32 vlapqf;
2748
2749         vlapqf = rd32(E1000_VLAPQF);
2750         vlan_priority = (ntohs(input->filter.vlan_tci) & VLAN_PRIO_MASK)
2751                                 >> VLAN_PRIO_SHIFT;
2752         queue_index = (vlapqf >> (vlan_priority * 4)) & E1000_VLAPQF_QUEUE_MASK;
2753
2754         /* check whether this vlan prio is already set */
2755         if ((vlapqf & E1000_VLAPQF_P_VALID(vlan_priority)) &&
2756             (queue_index != input->action)) {
2757                 dev_err(&adapter->pdev->dev, "ethtool rxnfc set vlan prio filter failed.\n");
2758                 return -EEXIST;
2759         }
2760
2761         vlapqf |= E1000_VLAPQF_P_VALID(vlan_priority);
2762         vlapqf |= E1000_VLAPQF_QUEUE_SEL(vlan_priority, input->action);
2763
2764         wr32(E1000_VLAPQF, vlapqf);
2765
2766         return 0;
2767 }
2768
2769 int igb_add_filter(struct igb_adapter *adapter, struct igb_nfc_filter *input)
2770 {
2771         int err = -EINVAL;
2772
2773         if (input->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE) {
2774                 err = igb_rxnfc_write_etype_filter(adapter, input);
2775                 if (err)
2776                         return err;
2777         }
2778
2779         if (input->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI)
2780                 err = igb_rxnfc_write_vlan_prio_filter(adapter, input);
2781
2782         return err;
2783 }
2784
2785 static void igb_clear_etype_filter_regs(struct igb_adapter *adapter,
2786                                         u16 reg_index)
2787 {
2788         struct e1000_hw *hw = &adapter->hw;
2789         u32 etqf = rd32(E1000_ETQF(reg_index));
2790
2791         etqf &= ~E1000_ETQF_QUEUE_ENABLE;
2792         etqf &= ~E1000_ETQF_QUEUE_MASK;
2793         etqf &= ~E1000_ETQF_FILTER_ENABLE;
2794
2795         wr32(E1000_ETQF(reg_index), etqf);
2796
2797         adapter->etype_bitmap[reg_index] = false;
2798 }
2799
2800 static void igb_clear_vlan_prio_filter(struct igb_adapter *adapter,
2801                                        u16 vlan_tci)
2802 {
2803         struct e1000_hw *hw = &adapter->hw;
2804         u8 vlan_priority;
2805         u32 vlapqf;
2806
2807         vlan_priority = (vlan_tci & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
2808
2809         vlapqf = rd32(E1000_VLAPQF);
2810         vlapqf &= ~E1000_VLAPQF_P_VALID(vlan_priority);
2811         vlapqf &= ~E1000_VLAPQF_QUEUE_SEL(vlan_priority,
2812                                                 E1000_VLAPQF_QUEUE_MASK);
2813
2814         wr32(E1000_VLAPQF, vlapqf);
2815 }
2816
2817 int igb_erase_filter(struct igb_adapter *adapter, struct igb_nfc_filter *input)
2818 {
2819         if (input->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE)
2820                 igb_clear_etype_filter_regs(adapter,
2821                                             input->etype_reg_index);
2822
2823         if (input->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI)
2824                 igb_clear_vlan_prio_filter(adapter,
2825                                            ntohs(input->filter.vlan_tci));
2826
2827         return 0;
2828 }
2829
2830 static int igb_update_ethtool_nfc_entry(struct igb_adapter *adapter,
2831                                         struct igb_nfc_filter *input,
2832                                         u16 sw_idx)
2833 {
2834         struct igb_nfc_filter *rule, *parent;
2835         int err = -EINVAL;
2836
2837         parent = NULL;
2838         rule = NULL;
2839
2840         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2841                 /* hash found, or no matching entry */
2842                 if (rule->sw_idx >= sw_idx)
2843                         break;
2844                 parent = rule;
2845         }
2846
2847         /* if there is an old rule occupying our place remove it */
2848         if (rule && (rule->sw_idx == sw_idx)) {
2849                 if (!input)
2850                         err = igb_erase_filter(adapter, rule);
2851
2852                 hlist_del(&rule->nfc_node);
2853                 kfree(rule);
2854                 adapter->nfc_filter_count--;
2855         }
2856
2857         /* If no input this was a delete, err should be 0 if a rule was
2858          * successfully found and removed from the list else -EINVAL
2859          */
2860         if (!input)
2861                 return err;
2862
2863         /* initialize node */
2864         INIT_HLIST_NODE(&input->nfc_node);
2865
2866         /* add filter to the list */
2867         if (parent)
2868                 hlist_add_behind(&parent->nfc_node, &input->nfc_node);
2869         else
2870                 hlist_add_head(&input->nfc_node, &adapter->nfc_filter_list);
2871
2872         /* update counts */
2873         adapter->nfc_filter_count++;
2874
2875         return 0;
2876 }
2877
2878 static int igb_add_ethtool_nfc_entry(struct igb_adapter *adapter,
2879                                      struct ethtool_rxnfc *cmd)
2880 {
2881         struct net_device *netdev = adapter->netdev;
2882         struct ethtool_rx_flow_spec *fsp =
2883                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2884         struct igb_nfc_filter *input, *rule;
2885         int err = 0;
2886
2887         if (!(netdev->hw_features & NETIF_F_NTUPLE))
2888                 return -EOPNOTSUPP;
2889
2890         /* Don't allow programming if the action is a queue greater than
2891          * the number of online Rx queues.
2892          */
2893         if ((fsp->ring_cookie == RX_CLS_FLOW_DISC) ||
2894             (fsp->ring_cookie >= adapter->num_rx_queues)) {
2895                 dev_err(&adapter->pdev->dev, "ethtool -N: The specified action is invalid\n");
2896                 return -EINVAL;
2897         }
2898
2899         /* Don't allow indexes to exist outside of available space */
2900         if (fsp->location >= IGB_MAX_RXNFC_FILTERS) {
2901                 dev_err(&adapter->pdev->dev, "Location out of range\n");
2902                 return -EINVAL;
2903         }
2904
2905         if ((fsp->flow_type & ~FLOW_EXT) != ETHER_FLOW)
2906                 return -EINVAL;
2907
2908         if (fsp->m_u.ether_spec.h_proto != ETHER_TYPE_FULL_MASK &&
2909             fsp->m_ext.vlan_tci != htons(VLAN_PRIO_MASK))
2910                 return -EINVAL;
2911
2912         input = kzalloc(sizeof(*input), GFP_KERNEL);
2913         if (!input)
2914                 return -ENOMEM;
2915
2916         if (fsp->m_u.ether_spec.h_proto == ETHER_TYPE_FULL_MASK) {
2917                 input->filter.etype = fsp->h_u.ether_spec.h_proto;
2918                 input->filter.match_flags = IGB_FILTER_FLAG_ETHER_TYPE;
2919         }
2920
2921         if ((fsp->flow_type & FLOW_EXT) && fsp->m_ext.vlan_tci) {
2922                 if (fsp->m_ext.vlan_tci != htons(VLAN_PRIO_MASK)) {
2923                         err = -EINVAL;
2924                         goto err_out;
2925                 }
2926                 input->filter.vlan_tci = fsp->h_ext.vlan_tci;
2927                 input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI;
2928         }
2929
2930         input->action = fsp->ring_cookie;
2931         input->sw_idx = fsp->location;
2932
2933         spin_lock(&adapter->nfc_lock);
2934
2935         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2936                 if (!memcmp(&input->filter, &rule->filter,
2937                             sizeof(input->filter))) {
2938                         err = -EEXIST;
2939                         dev_err(&adapter->pdev->dev,
2940                                 "ethtool: this filter is already set\n");
2941                         goto err_out_w_lock;
2942                 }
2943         }
2944
2945         err = igb_add_filter(adapter, input);
2946         if (err)
2947                 goto err_out_w_lock;
2948
2949         igb_update_ethtool_nfc_entry(adapter, input, input->sw_idx);
2950
2951         spin_unlock(&adapter->nfc_lock);
2952         return 0;
2953
2954 err_out_w_lock:
2955         spin_unlock(&adapter->nfc_lock);
2956 err_out:
2957         kfree(input);
2958         return err;
2959 }
2960
2961 static int igb_del_ethtool_nfc_entry(struct igb_adapter *adapter,
2962                                      struct ethtool_rxnfc *cmd)
2963 {
2964         struct ethtool_rx_flow_spec *fsp =
2965                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2966         int err;
2967
2968         spin_lock(&adapter->nfc_lock);
2969         err = igb_update_ethtool_nfc_entry(adapter, NULL, fsp->location);
2970         spin_unlock(&adapter->nfc_lock);
2971
2972         return err;
2973 }
2974
2975 static int igb_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2976 {
2977         struct igb_adapter *adapter = netdev_priv(dev);
2978         int ret = -EOPNOTSUPP;
2979
2980         switch (cmd->cmd) {
2981         case ETHTOOL_SRXFH:
2982                 ret = igb_set_rss_hash_opt(adapter, cmd);
2983                 break;
2984         case ETHTOOL_SRXCLSRLINS:
2985                 ret = igb_add_ethtool_nfc_entry(adapter, cmd);
2986                 break;
2987         case ETHTOOL_SRXCLSRLDEL:
2988                 ret = igb_del_ethtool_nfc_entry(adapter, cmd);
2989         default:
2990                 break;
2991         }
2992
2993         return ret;
2994 }
2995
2996 static int igb_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
2997 {
2998         struct igb_adapter *adapter = netdev_priv(netdev);
2999         struct e1000_hw *hw = &adapter->hw;
3000         u32 ret_val;
3001         u16 phy_data;
3002
3003         if ((hw->mac.type < e1000_i350) ||
3004             (hw->phy.media_type != e1000_media_type_copper))
3005                 return -EOPNOTSUPP;
3006
3007         edata->supported = (SUPPORTED_1000baseT_Full |
3008                             SUPPORTED_100baseT_Full);
3009         if (!hw->dev_spec._82575.eee_disable)
3010                 edata->advertised =
3011                         mmd_eee_adv_to_ethtool_adv_t(adapter->eee_advert);
3012
3013         /* The IPCNFG and EEER registers are not supported on I354. */
3014         if (hw->mac.type == e1000_i354) {
3015                 igb_get_eee_status_i354(hw, (bool *)&edata->eee_active);
3016         } else {
3017                 u32 eeer;
3018
3019                 eeer = rd32(E1000_EEER);
3020
3021                 /* EEE status on negotiated link */
3022                 if (eeer & E1000_EEER_EEE_NEG)
3023                         edata->eee_active = true;
3024
3025                 if (eeer & E1000_EEER_TX_LPI_EN)
3026                         edata->tx_lpi_enabled = true;
3027         }
3028
3029         /* EEE Link Partner Advertised */
3030         switch (hw->mac.type) {
3031         case e1000_i350:
3032                 ret_val = igb_read_emi_reg(hw, E1000_EEE_LP_ADV_ADDR_I350,
3033                                            &phy_data);
3034                 if (ret_val)
3035                         return -ENODATA;
3036
3037                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
3038                 break;
3039         case e1000_i354:
3040         case e1000_i210:
3041         case e1000_i211:
3042                 ret_val = igb_read_xmdio_reg(hw, E1000_EEE_LP_ADV_ADDR_I210,
3043                                              E1000_EEE_LP_ADV_DEV_I210,
3044                                              &phy_data);
3045                 if (ret_val)
3046                         return -ENODATA;
3047
3048                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
3049
3050                 break;
3051         default:
3052                 break;
3053         }
3054
3055         edata->eee_enabled = !hw->dev_spec._82575.eee_disable;
3056
3057         if ((hw->mac.type == e1000_i354) &&
3058             (edata->eee_enabled))
3059                 edata->tx_lpi_enabled = true;
3060
3061         /* Report correct negotiated EEE status for devices that
3062          * wrongly report EEE at half-duplex
3063          */
3064         if (adapter->link_duplex == HALF_DUPLEX) {
3065                 edata->eee_enabled = false;
3066                 edata->eee_active = false;
3067                 edata->tx_lpi_enabled = false;
3068                 edata->advertised &= ~edata->advertised;
3069         }
3070
3071         return 0;
3072 }
3073
3074 static int igb_set_eee(struct net_device *netdev,
3075                        struct ethtool_eee *edata)
3076 {
3077         struct igb_adapter *adapter = netdev_priv(netdev);
3078         struct e1000_hw *hw = &adapter->hw;
3079         struct ethtool_eee eee_curr;
3080         bool adv1g_eee = true, adv100m_eee = true;
3081         s32 ret_val;
3082
3083         if ((hw->mac.type < e1000_i350) ||
3084             (hw->phy.media_type != e1000_media_type_copper))
3085                 return -EOPNOTSUPP;
3086
3087         memset(&eee_curr, 0, sizeof(struct ethtool_eee));
3088
3089         ret_val = igb_get_eee(netdev, &eee_curr);
3090         if (ret_val)
3091                 return ret_val;
3092
3093         if (eee_curr.eee_enabled) {
3094                 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
3095                         dev_err(&adapter->pdev->dev,
3096                                 "Setting EEE tx-lpi is not supported\n");
3097                         return -EINVAL;
3098                 }
3099
3100                 /* Tx LPI timer is not implemented currently */
3101                 if (edata->tx_lpi_timer) {
3102                         dev_err(&adapter->pdev->dev,
3103                                 "Setting EEE Tx LPI timer is not supported\n");
3104                         return -EINVAL;
3105                 }
3106
3107                 if (!edata->advertised || (edata->advertised &
3108                     ~(ADVERTISE_100_FULL | ADVERTISE_1000_FULL))) {
3109                         dev_err(&adapter->pdev->dev,
3110                                 "EEE Advertisement supports only 100Tx and/or 100T full duplex\n");
3111                         return -EINVAL;
3112                 }
3113                 adv100m_eee = !!(edata->advertised & ADVERTISE_100_FULL);
3114                 adv1g_eee = !!(edata->advertised & ADVERTISE_1000_FULL);
3115
3116         } else if (!edata->eee_enabled) {
3117                 dev_err(&adapter->pdev->dev,
3118                         "Setting EEE options are not supported with EEE disabled\n");
3119                         return -EINVAL;
3120                 }
3121
3122         adapter->eee_advert = ethtool_adv_to_mmd_eee_adv_t(edata->advertised);
3123         if (hw->dev_spec._82575.eee_disable != !edata->eee_enabled) {
3124                 hw->dev_spec._82575.eee_disable = !edata->eee_enabled;
3125                 adapter->flags |= IGB_FLAG_EEE;
3126
3127                 /* reset link */
3128                 if (netif_running(netdev))
3129                         igb_reinit_locked(adapter);
3130                 else
3131                         igb_reset(adapter);
3132         }
3133
3134         if (hw->mac.type == e1000_i354)
3135                 ret_val = igb_set_eee_i354(hw, adv1g_eee, adv100m_eee);
3136         else
3137                 ret_val = igb_set_eee_i350(hw, adv1g_eee, adv100m_eee);
3138
3139         if (ret_val) {
3140                 dev_err(&adapter->pdev->dev,
3141                         "Problem setting EEE advertisement options\n");
3142                 return -EINVAL;
3143         }
3144
3145         return 0;
3146 }
3147
3148 static int igb_get_module_info(struct net_device *netdev,
3149                                struct ethtool_modinfo *modinfo)
3150 {
3151         struct igb_adapter *adapter = netdev_priv(netdev);
3152         struct e1000_hw *hw = &adapter->hw;
3153         u32 status = 0;
3154         u16 sff8472_rev, addr_mode;
3155         bool page_swap = false;
3156
3157         if ((hw->phy.media_type == e1000_media_type_copper) ||
3158             (hw->phy.media_type == e1000_media_type_unknown))
3159                 return -EOPNOTSUPP;
3160
3161         /* Check whether we support SFF-8472 or not */
3162         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_COMP, &sff8472_rev);
3163         if (status)
3164                 return -EIO;
3165
3166         /* addressing mode is not supported */
3167         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_SWAP, &addr_mode);
3168         if (status)
3169                 return -EIO;
3170
3171         /* addressing mode is not supported */
3172         if ((addr_mode & 0xFF) & IGB_SFF_ADDRESSING_MODE) {
3173                 hw_dbg("Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
3174                 page_swap = true;
3175         }
3176
3177         if ((sff8472_rev & 0xFF) == IGB_SFF_8472_UNSUP || page_swap) {
3178                 /* We have an SFP, but it does not support SFF-8472 */
3179                 modinfo->type = ETH_MODULE_SFF_8079;
3180                 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
3181         } else {
3182                 /* We have an SFP which supports a revision of SFF-8472 */
3183                 modinfo->type = ETH_MODULE_SFF_8472;
3184                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
3185         }
3186
3187         return 0;
3188 }
3189
3190 static int igb_get_module_eeprom(struct net_device *netdev,
3191                                  struct ethtool_eeprom *ee, u8 *data)
3192 {
3193         struct igb_adapter *adapter = netdev_priv(netdev);
3194         struct e1000_hw *hw = &adapter->hw;
3195         u32 status = 0;
3196         u16 *dataword;
3197         u16 first_word, last_word;
3198         int i = 0;
3199
3200         if (ee->len == 0)
3201                 return -EINVAL;
3202
3203         first_word = ee->offset >> 1;
3204         last_word = (ee->offset + ee->len - 1) >> 1;
3205
3206         dataword = kmalloc(sizeof(u16) * (last_word - first_word + 1),
3207                            GFP_KERNEL);
3208         if (!dataword)
3209                 return -ENOMEM;
3210
3211         /* Read EEPROM block, SFF-8079/SFF-8472, word at a time */
3212         for (i = 0; i < last_word - first_word + 1; i++) {
3213                 status = igb_read_phy_reg_i2c(hw, (first_word + i) * 2,
3214                                               &dataword[i]);
3215                 if (status) {
3216                         /* Error occurred while reading module */
3217                         kfree(dataword);
3218                         return -EIO;
3219                 }
3220
3221                 be16_to_cpus(&dataword[i]);
3222         }
3223
3224         memcpy(data, (u8 *)dataword + (ee->offset & 1), ee->len);
3225         kfree(dataword);
3226
3227         return 0;
3228 }
3229
3230 static int igb_ethtool_begin(struct net_device *netdev)
3231 {
3232         struct igb_adapter *adapter = netdev_priv(netdev);
3233         pm_runtime_get_sync(&adapter->pdev->dev);
3234         return 0;
3235 }
3236
3237 static void igb_ethtool_complete(struct net_device *netdev)
3238 {
3239         struct igb_adapter *adapter = netdev_priv(netdev);
3240         pm_runtime_put(&adapter->pdev->dev);
3241 }
3242
3243 static u32 igb_get_rxfh_indir_size(struct net_device *netdev)
3244 {
3245         return IGB_RETA_SIZE;
3246 }
3247
3248 static int igb_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
3249                         u8 *hfunc)
3250 {
3251         struct igb_adapter *adapter = netdev_priv(netdev);
3252         int i;
3253
3254         if (hfunc)
3255                 *hfunc = ETH_RSS_HASH_TOP;
3256         if (!indir)
3257                 return 0;
3258         for (i = 0; i < IGB_RETA_SIZE; i++)
3259                 indir[i] = adapter->rss_indir_tbl[i];
3260
3261         return 0;
3262 }
3263
3264 void igb_write_rss_indir_tbl(struct igb_adapter *adapter)
3265 {
3266         struct e1000_hw *hw = &adapter->hw;
3267         u32 reg = E1000_RETA(0);
3268         u32 shift = 0;
3269         int i = 0;
3270
3271         switch (hw->mac.type) {
3272         case e1000_82575:
3273                 shift = 6;
3274                 break;
3275         case e1000_82576:
3276                 /* 82576 supports 2 RSS queues for SR-IOV */
3277                 if (adapter->vfs_allocated_count)
3278                         shift = 3;
3279                 break;
3280         default:
3281                 break;
3282         }
3283
3284         while (i < IGB_RETA_SIZE) {
3285                 u32 val = 0;
3286                 int j;
3287
3288                 for (j = 3; j >= 0; j--) {
3289                         val <<= 8;
3290                         val |= adapter->rss_indir_tbl[i + j];
3291                 }
3292
3293                 wr32(reg, val << shift);
3294                 reg += 4;
3295                 i += 4;
3296         }
3297 }
3298
3299 static int igb_set_rxfh(struct net_device *netdev, const u32 *indir,
3300                         const u8 *key, const u8 hfunc)
3301 {
3302         struct igb_adapter *adapter = netdev_priv(netdev);
3303         struct e1000_hw *hw = &adapter->hw;
3304         int i;
3305         u32 num_queues;
3306
3307         /* We do not allow change in unsupported parameters */
3308         if (key ||
3309             (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP))
3310                 return -EOPNOTSUPP;
3311         if (!indir)
3312                 return 0;
3313
3314         num_queues = adapter->rss_queues;
3315
3316         switch (hw->mac.type) {
3317         case e1000_82576:
3318                 /* 82576 supports 2 RSS queues for SR-IOV */
3319                 if (adapter->vfs_allocated_count)
3320                         num_queues = 2;
3321                 break;
3322         default:
3323                 break;
3324         }
3325
3326         /* Verify user input. */
3327         for (i = 0; i < IGB_RETA_SIZE; i++)
3328                 if (indir[i] >= num_queues)
3329                         return -EINVAL;
3330
3331
3332         for (i = 0; i < IGB_RETA_SIZE; i++)
3333                 adapter->rss_indir_tbl[i] = indir[i];
3334
3335         igb_write_rss_indir_tbl(adapter);
3336
3337         return 0;
3338 }
3339
3340 static unsigned int igb_max_channels(struct igb_adapter *adapter)
3341 {
3342         struct e1000_hw *hw = &adapter->hw;
3343         unsigned int max_combined = 0;
3344
3345         switch (hw->mac.type) {
3346         case e1000_i211:
3347                 max_combined = IGB_MAX_RX_QUEUES_I211;
3348                 break;
3349         case e1000_82575:
3350         case e1000_i210:
3351                 max_combined = IGB_MAX_RX_QUEUES_82575;
3352                 break;
3353         case e1000_i350:
3354                 if (!!adapter->vfs_allocated_count) {
3355                         max_combined = 1;
3356                         break;
3357                 }
3358                 /* fall through */
3359         case e1000_82576:
3360                 if (!!adapter->vfs_allocated_count) {
3361                         max_combined = 2;
3362                         break;
3363                 }
3364                 /* fall through */
3365         case e1000_82580:
3366         case e1000_i354:
3367         default:
3368                 max_combined = IGB_MAX_RX_QUEUES;
3369                 break;
3370         }
3371
3372         return max_combined;
3373 }
3374
3375 static void igb_get_channels(struct net_device *netdev,
3376                              struct ethtool_channels *ch)
3377 {
3378         struct igb_adapter *adapter = netdev_priv(netdev);
3379
3380         /* Report maximum channels */
3381         ch->max_combined = igb_max_channels(adapter);
3382
3383         /* Report info for other vector */
3384         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
3385                 ch->max_other = NON_Q_VECTORS;
3386                 ch->other_count = NON_Q_VECTORS;
3387         }
3388
3389         ch->combined_count = adapter->rss_queues;
3390 }
3391
3392 static int igb_set_channels(struct net_device *netdev,
3393                             struct ethtool_channels *ch)
3394 {
3395         struct igb_adapter *adapter = netdev_priv(netdev);
3396         unsigned int count = ch->combined_count;
3397         unsigned int max_combined = 0;
3398
3399         /* Verify they are not requesting separate vectors */
3400         if (!count || ch->rx_count || ch->tx_count)
3401                 return -EINVAL;
3402
3403         /* Verify other_count is valid and has not been changed */
3404         if (ch->other_count != NON_Q_VECTORS)
3405                 return -EINVAL;
3406
3407         /* Verify the number of channels doesn't exceed hw limits */
3408         max_combined = igb_max_channels(adapter);
3409         if (count > max_combined)
3410                 return -EINVAL;
3411
3412         if (count != adapter->rss_queues) {
3413                 adapter->rss_queues = count;
3414                 igb_set_flag_queue_pairs(adapter, max_combined);
3415
3416                 /* Hardware has to reinitialize queues and interrupts to
3417                  * match the new configuration.
3418                  */
3419                 return igb_reinit_queues(adapter);
3420         }
3421
3422         return 0;
3423 }
3424
3425 static u32 igb_get_priv_flags(struct net_device *netdev)
3426 {
3427         struct igb_adapter *adapter = netdev_priv(netdev);
3428         u32 priv_flags = 0;
3429
3430         if (adapter->flags & IGB_FLAG_RX_LEGACY)
3431                 priv_flags |= IGB_PRIV_FLAGS_LEGACY_RX;
3432
3433         return priv_flags;
3434 }
3435
3436 static int igb_set_priv_flags(struct net_device *netdev, u32 priv_flags)
3437 {
3438         struct igb_adapter *adapter = netdev_priv(netdev);
3439         unsigned int flags = adapter->flags;
3440
3441         flags &= ~IGB_FLAG_RX_LEGACY;
3442         if (priv_flags & IGB_PRIV_FLAGS_LEGACY_RX)
3443                 flags |= IGB_FLAG_RX_LEGACY;
3444
3445         if (flags != adapter->flags) {
3446                 adapter->flags = flags;
3447
3448                 /* reset interface to repopulate queues */
3449                 if (netif_running(netdev))
3450                         igb_reinit_locked(adapter);
3451         }
3452
3453         return 0;
3454 }
3455
3456 static const struct ethtool_ops igb_ethtool_ops = {
3457         .get_drvinfo            = igb_get_drvinfo,
3458         .get_regs_len           = igb_get_regs_len,
3459         .get_regs               = igb_get_regs,
3460         .get_wol                = igb_get_wol,
3461         .set_wol                = igb_set_wol,
3462         .get_msglevel           = igb_get_msglevel,
3463         .set_msglevel           = igb_set_msglevel,
3464         .nway_reset             = igb_nway_reset,
3465         .get_link               = igb_get_link,
3466         .get_eeprom_len         = igb_get_eeprom_len,
3467         .get_eeprom             = igb_get_eeprom,
3468         .set_eeprom             = igb_set_eeprom,
3469         .get_ringparam          = igb_get_ringparam,
3470         .set_ringparam          = igb_set_ringparam,
3471         .get_pauseparam         = igb_get_pauseparam,
3472         .set_pauseparam         = igb_set_pauseparam,
3473         .self_test              = igb_diag_test,
3474         .get_strings            = igb_get_strings,
3475         .set_phys_id            = igb_set_phys_id,
3476         .get_sset_count         = igb_get_sset_count,
3477         .get_ethtool_stats      = igb_get_ethtool_stats,
3478         .get_coalesce           = igb_get_coalesce,
3479         .set_coalesce           = igb_set_coalesce,
3480         .get_ts_info            = igb_get_ts_info,
3481         .get_rxnfc              = igb_get_rxnfc,
3482         .set_rxnfc              = igb_set_rxnfc,
3483         .get_eee                = igb_get_eee,
3484         .set_eee                = igb_set_eee,
3485         .get_module_info        = igb_get_module_info,
3486         .get_module_eeprom      = igb_get_module_eeprom,
3487         .get_rxfh_indir_size    = igb_get_rxfh_indir_size,
3488         .get_rxfh               = igb_get_rxfh,
3489         .set_rxfh               = igb_set_rxfh,
3490         .get_channels           = igb_get_channels,
3491         .set_channels           = igb_set_channels,
3492         .get_priv_flags         = igb_get_priv_flags,
3493         .set_priv_flags         = igb_set_priv_flags,
3494         .begin                  = igb_ethtool_begin,
3495         .complete               = igb_ethtool_complete,
3496         .get_link_ksettings     = igb_get_link_ksettings,
3497         .set_link_ksettings     = igb_set_link_ksettings,
3498 };
3499
3500 void igb_set_ethtool_ops(struct net_device *netdev)
3501 {
3502         netdev->ethtool_ops = &igb_ethtool_ops;
3503 }