drivers/net/ethernet/intel/igb/igb_main.c

   1 /* Intel(R) Gigabit Ethernet Linux driver
   2  * Copyright(c) 2007-2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program; if not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * The full GNU General Public License is included in this distribution in
  17  * the file called "COPYING".
  18  *
  19  * Contact Information:
  20  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  21  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  22  */
  23
  24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  25
  26 #include <linux/module.h>
  27 #include <linux/types.h>
  28 #include <linux/init.h>
  29 #include <linux/bitops.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/pagemap.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/ipv6.h>
  34 #include <linux/slab.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/net_tstamp.h>
  38 #include <linux/mii.h>
  39 #include <linux/ethtool.h>
  40 #include <linux/if.h>
  41 #include <linux/if_vlan.h>
  42 #include <linux/pci.h>
  43 #include <linux/pci-aspm.h>
  44 #include <linux/delay.h>
  45 #include <linux/interrupt.h>
  46 #include <linux/ip.h>
  47 #include <linux/tcp.h>
  48 #include <linux/sctp.h>
  49 #include <linux/if_ether.h>
  50 #include <linux/aer.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/pm_runtime.h>
  53 #include <linux/etherdevice.h>
  54 #ifdef CONFIG_IGB_DCA
  55 #include <linux/dca.h>
  56 #endif
  57 #include <linux/i2c.h>
  58 #include "igb.h"
  59
  60 #define MAJ 5
  61 #define MIN 4
  62 #define BUILD 0
  63 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  64 __stringify(BUILD) "-k"
  65 char igb_driver_name[] = "igb";
  66 char igb_driver_version[] = DRV_VERSION;
  67 static const char igb_driver_string[] =
  68                                 "Intel(R) Gigabit Ethernet Network Driver";
  69 static const char igb_copyright[] =
  70                                 "Copyright (c) 2007-2014 Intel Corporation.";
  71
  72 static const struct e1000_info *igb_info_tbl[] = {
  73         [board_82575] = &e1000_82575_info,
  74 };
  75
  76 static const struct pci_device_id igb_pci_tbl[] = {
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 112         /* required last entry */
 113         {0, }
 114 };
 115
 116 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 117
 118 static int igb_setup_all_tx_resources(struct igb_adapter *);
 119 static int igb_setup_all_rx_resources(struct igb_adapter *);
 120 static void igb_free_all_tx_resources(struct igb_adapter *);
 121 static void igb_free_all_rx_resources(struct igb_adapter *);
 122 static void igb_setup_mrqc(struct igb_adapter *);
 123 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 124 static void igb_remove(struct pci_dev *pdev);
 125 static int igb_sw_init(struct igb_adapter *);
 126 int igb_open(struct net_device *);
 127 int igb_close(struct net_device *);
 128 static void igb_configure(struct igb_adapter *);
 129 static void igb_configure_tx(struct igb_adapter *);
 130 static void igb_configure_rx(struct igb_adapter *);
 131 static void igb_clean_all_tx_rings(struct igb_adapter *);
 132 static void igb_clean_all_rx_rings(struct igb_adapter *);
 133 static void igb_clean_tx_ring(struct igb_ring *);
 134 static void igb_clean_rx_ring(struct igb_ring *);
 135 static void igb_set_rx_mode(struct net_device *);
 136 static void igb_update_phy_info(unsigned long);
 137 static void igb_watchdog(unsigned long);
 138 static void igb_watchdog_task(struct work_struct *);
 139 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 140 static void igb_get_stats64(struct net_device *dev,
 141                             struct rtnl_link_stats64 *stats);
 142 static int igb_change_mtu(struct net_device *, int);
 143 static int igb_set_mac(struct net_device *, void *);
 144 static void igb_set_uta(struct igb_adapter *adapter, bool set);
 145 static irqreturn_t igb_intr(int irq, void *);
 146 static irqreturn_t igb_intr_msi(int irq, void *);
 147 static irqreturn_t igb_msix_other(int irq, void *);
 148 static irqreturn_t igb_msix_ring(int irq, void *);
 149 #ifdef CONFIG_IGB_DCA
 150 static void igb_update_dca(struct igb_q_vector *);
 151 static void igb_setup_dca(struct igb_adapter *);
 152 #endif /* CONFIG_IGB_DCA */
 153 static int igb_poll(struct napi_struct *, int);
 154 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
 155 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 156 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 157 static void igb_tx_timeout(struct net_device *);
 158 static void igb_reset_task(struct work_struct *);
 159 static void igb_vlan_mode(struct net_device *netdev,
 160                           netdev_features_t features);
 161 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 162 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 163 static void igb_restore_vlan(struct igb_adapter *);
 164 static void igb_rar_set_index(struct igb_adapter *, u32);
 165 static void igb_ping_all_vfs(struct igb_adapter *);
 166 static void igb_msg_task(struct igb_adapter *);
 167 static void igb_vmm_control(struct igb_adapter *);
 168 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 169 static void igb_flush_mac_table(struct igb_adapter *);
 170 static int igb_available_rars(struct igb_adapter *, u8);
 171 static void igb_set_default_mac_filter(struct igb_adapter *);
 172 static int igb_uc_sync(struct net_device *, const unsigned char *);
 173 static int igb_uc_unsync(struct net_device *, const unsigned char *);
 174 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 175 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 176 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 177                                int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 178 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 179 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 180                                    bool setting);
 181 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 182                                  struct ifla_vf_info *ivi);
 183 static void igb_check_vf_rate_limit(struct igb_adapter *);
 184 static void igb_nfc_filter_exit(struct igb_adapter *adapter);
 185 static void igb_nfc_filter_restore(struct igb_adapter *adapter);
 186
 187 #ifdef CONFIG_PCI_IOV
 188 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 189 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 190 static int igb_disable_sriov(struct pci_dev *dev);
 191 static int igb_pci_disable_sriov(struct pci_dev *dev);
 192 #endif
 193
 194 static int igb_suspend(struct device *);
 195 static int igb_resume(struct device *);
 196 static int igb_runtime_suspend(struct device *dev);
 197 static int igb_runtime_resume(struct device *dev);
 198 static int igb_runtime_idle(struct device *dev);
 199 static const struct dev_pm_ops igb_pm_ops = {
 200         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 201         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 202                         igb_runtime_idle)
 203 };
 204 static void igb_shutdown(struct pci_dev *);
 205 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 206 #ifdef CONFIG_IGB_DCA
 207 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 208 static struct notifier_block dca_notifier = {
 209         .notifier_call  = igb_notify_dca,
 210         .next           = NULL,
 211         .priority       = 0
 212 };
 213 #endif
 214 #ifdef CONFIG_NET_POLL_CONTROLLER
 215 /* for netdump / net console */
 216 static void igb_netpoll(struct net_device *);
 217 #endif
 218 #ifdef CONFIG_PCI_IOV
 219 static unsigned int max_vfs;
 220 module_param(max_vfs, uint, 0);
 221 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 222 #endif /* CONFIG_PCI_IOV */
 223
 224 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 225                      pci_channel_state_t);
 226 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 227 static void igb_io_resume(struct pci_dev *);
 228
 229 static const struct pci_error_handlers igb_err_handler = {
 230         .error_detected = igb_io_error_detected,
 231         .slot_reset = igb_io_slot_reset,
 232         .resume = igb_io_resume,
 233 };
 234
 235 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 236
 237 static struct pci_driver igb_driver = {
 238         .name     = igb_driver_name,
 239         .id_table = igb_pci_tbl,
 240         .probe    = igb_probe,
 241         .remove   = igb_remove,
 242 #ifdef CONFIG_PM
 243         .driver.pm = &igb_pm_ops,
 244 #endif
 245         .shutdown = igb_shutdown,
 246         .sriov_configure = igb_pci_sriov_configure,
 247         .err_handler = &igb_err_handler
 248 };
 249
 250 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 251 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 252 MODULE_LICENSE("GPL");
 253 MODULE_VERSION(DRV_VERSION);
 254
 255 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 256 static int debug = -1;
 257 module_param(debug, int, 0);
 258 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 259
 260 struct igb_reg_info {
 261         u32 ofs;
 262         char *name;
 263 };
 264
 265 static const struct igb_reg_info igb_reg_info_tbl[] = {
 266
 267         /* General Registers */
 268         {E1000_CTRL, "CTRL"},
 269         {E1000_STATUS, "STATUS"},
 270         {E1000_CTRL_EXT, "CTRL_EXT"},
 271
 272         /* Interrupt Registers */
 273         {E1000_ICR, "ICR"},
 274
 275         /* RX Registers */
 276         {E1000_RCTL, "RCTL"},
 277         {E1000_RDLEN(0), "RDLEN"},
 278         {E1000_RDH(0), "RDH"},
 279         {E1000_RDT(0), "RDT"},
 280         {E1000_RXDCTL(0), "RXDCTL"},
 281         {E1000_RDBAL(0), "RDBAL"},
 282         {E1000_RDBAH(0), "RDBAH"},
 283
 284         /* TX Registers */
 285         {E1000_TCTL, "TCTL"},
 286         {E1000_TDBAL(0), "TDBAL"},
 287         {E1000_TDBAH(0), "TDBAH"},
 288         {E1000_TDLEN(0), "TDLEN"},
 289         {E1000_TDH(0), "TDH"},
 290         {E1000_TDT(0), "TDT"},
 291         {E1000_TXDCTL(0), "TXDCTL"},
 292         {E1000_TDFH, "TDFH"},
 293         {E1000_TDFT, "TDFT"},
 294         {E1000_TDFHS, "TDFHS"},
 295         {E1000_TDFPC, "TDFPC"},
 296
 297         /* List Terminator */
 298         {}
 299 };
 300
 301 /* igb_regdump - register printout routine */
 302 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 303 {
 304         int n = 0;
 305         char rname[16];
 306         u32 regs[8];
 307
 308         switch (reginfo->ofs) {
 309         case E1000_RDLEN(0):
 310                 for (n = 0; n < 4; n++)
 311                         regs[n] = rd32(E1000_RDLEN(n));
 312                 break;
 313         case E1000_RDH(0):
 314                 for (n = 0; n < 4; n++)
 315                         regs[n] = rd32(E1000_RDH(n));
 316                 break;
 317         case E1000_RDT(0):
 318                 for (n = 0; n < 4; n++)
 319                         regs[n] = rd32(E1000_RDT(n));
 320                 break;
 321         case E1000_RXDCTL(0):
 322                 for (n = 0; n < 4; n++)
 323                         regs[n] = rd32(E1000_RXDCTL(n));
 324                 break;
 325         case E1000_RDBAL(0):
 326                 for (n = 0; n < 4; n++)
 327                         regs[n] = rd32(E1000_RDBAL(n));
 328                 break;
 329         case E1000_RDBAH(0):
 330                 for (n = 0; n < 4; n++)
 331                         regs[n] = rd32(E1000_RDBAH(n));
 332                 break;
 333         case E1000_TDBAL(0):
 334                 for (n = 0; n < 4; n++)
 335                         regs[n] = rd32(E1000_RDBAL(n));
 336                 break;
 337         case E1000_TDBAH(0):
 338                 for (n = 0; n < 4; n++)
 339                         regs[n] = rd32(E1000_TDBAH(n));
 340                 break;
 341         case E1000_TDLEN(0):
 342                 for (n = 0; n < 4; n++)
 343                         regs[n] = rd32(E1000_TDLEN(n));
 344                 break;
 345         case E1000_TDH(0):
 346                 for (n = 0; n < 4; n++)
 347                         regs[n] = rd32(E1000_TDH(n));
 348                 break;
 349         case E1000_TDT(0):
 350                 for (n = 0; n < 4; n++)
 351                         regs[n] = rd32(E1000_TDT(n));
 352                 break;
 353         case E1000_TXDCTL(0):
 354                 for (n = 0; n < 4; n++)
 355                         regs[n] = rd32(E1000_TXDCTL(n));
 356                 break;
 357         default:
 358                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 359                 return;
 360         }
 361
 362         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 363         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 364                 regs[2], regs[3]);
 365 }
 366
 367 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 368 static void igb_dump(struct igb_adapter *adapter)
 369 {
 370         struct net_device *netdev = adapter->netdev;
 371         struct e1000_hw *hw = &adapter->hw;
 372         struct igb_reg_info *reginfo;
 373         struct igb_ring *tx_ring;
 374         union e1000_adv_tx_desc *tx_desc;
 375         struct my_u0 { u64 a; u64 b; } *u0;
 376         struct igb_ring *rx_ring;
 377         union e1000_adv_rx_desc *rx_desc;
 378         u32 staterr;
 379         u16 i, n;
 380
 381         if (!netif_msg_hw(adapter))
 382                 return;
 383
 384         /* Print netdevice Info */
 385         if (netdev) {
 386                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 387                 pr_info("Device Name     state            trans_start\n");
 388                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 389                         netdev->state, dev_trans_start(netdev));
 390         }
 391
 392         /* Print Registers */
 393         dev_info(&adapter->pdev->dev, "Register Dump\n");
 394         pr_info(" Register Name   Value\n");
 395         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 396              reginfo->name; reginfo++) {
 397                 igb_regdump(hw, reginfo);
 398         }
 399
 400         /* Print TX Ring Summary */
 401         if (!netdev || !netif_running(netdev))
 402                 goto exit;
 403
 404         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 405         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 406         for (n = 0; n < adapter->num_tx_queues; n++) {
 407                 struct igb_tx_buffer *buffer_info;
 408                 tx_ring = adapter->tx_ring[n];
 409                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 410                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 411                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 412                         (u64)dma_unmap_addr(buffer_info, dma),
 413                         dma_unmap_len(buffer_info, len),
 414                         buffer_info->next_to_watch,
 415                         (u64)buffer_info->time_stamp);
 416         }
 417
 418         /* Print TX Rings */
 419         if (!netif_msg_tx_done(adapter))
 420                 goto rx_ring_summary;
 421
 422         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 423
 424         /* Transmit Descriptor Formats
 425          *
 426          * Advanced Transmit Descriptor
 427          *   +--------------------------------------------------------------+
 428          * 0 |         Buffer Address [63:0]                                |
 429          *   +--------------------------------------------------------------+
 430          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 431          *   +--------------------------------------------------------------+
 432          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 433          */
 434
 435         for (n = 0; n < adapter->num_tx_queues; n++) {
 436                 tx_ring = adapter->tx_ring[n];
 437                 pr_info("------------------------------------\n");
 438                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 439                 pr_info("------------------------------------\n");
 440                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 441
 442                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 443                         const char *next_desc;
 444                         struct igb_tx_buffer *buffer_info;
 445                         tx_desc = IGB_TX_DESC(tx_ring, i);
 446                         buffer_info = &tx_ring->tx_buffer_info[i];
 447                         u0 = (struct my_u0 *)tx_desc;
 448                         if (i == tx_ring->next_to_use &&
 449                             i == tx_ring->next_to_clean)
 450                                 next_desc = " NTC/U";
 451                         else if (i == tx_ring->next_to_use)
 452                                 next_desc = " NTU";
 453                         else if (i == tx_ring->next_to_clean)
 454                                 next_desc = " NTC";
 455                         else
 456                                 next_desc = "";
 457
 458                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 459                                 i, le64_to_cpu(u0->a),
 460                                 le64_to_cpu(u0->b),
 461                                 (u64)dma_unmap_addr(buffer_info, dma),
 462                                 dma_unmap_len(buffer_info, len),
 463                                 buffer_info->next_to_watch,
 464                                 (u64)buffer_info->time_stamp,
 465                                 buffer_info->skb, next_desc);
 466
 467                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 468                                 print_hex_dump(KERN_INFO, "",
 469                                         DUMP_PREFIX_ADDRESS,
 470                                         16, 1, buffer_info->skb->data,
 471                                         dma_unmap_len(buffer_info, len),
 472                                         true);
 473                 }
 474         }
 475
 476         /* Print RX Rings Summary */
 477 rx_ring_summary:
 478         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 479         pr_info("Queue [NTU] [NTC]\n");
 480         for (n = 0; n < adapter->num_rx_queues; n++) {
 481                 rx_ring = adapter->rx_ring[n];
 482                 pr_info(" %5d %5X %5X\n",
 483                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 484         }
 485
 486         /* Print RX Rings */
 487         if (!netif_msg_rx_status(adapter))
 488                 goto exit;
 489
 490         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 491
 492         /* Advanced Receive Descriptor (Read) Format
 493          *    63                                           1        0
 494          *    +-----------------------------------------------------+
 495          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 496          *    +----------------------------------------------+------+
 497          *  8 |       Header Buffer Address [63:1]           |  DD  |
 498          *    +-----------------------------------------------------+
 499          *
 500          *
 501          * Advanced Receive Descriptor (Write-Back) Format
 502          *
 503          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 504          *   +------------------------------------------------------+
 505          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 506          *   | Checksum   Ident  |   |           |    | Type | Type |
 507          *   +------------------------------------------------------+
 508          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 509          *   +------------------------------------------------------+
 510          *   63       48 47    32 31            20 19               0
 511          */
 512
 513         for (n = 0; n < adapter->num_rx_queues; n++) {
 514                 rx_ring = adapter->rx_ring[n];
 515                 pr_info("------------------------------------\n");
 516                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 517                 pr_info("------------------------------------\n");
 518                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 519                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 520
 521                 for (i = 0; i < rx_ring->count; i++) {
 522                         const char *next_desc;
 523                         struct igb_rx_buffer *buffer_info;
 524                         buffer_info = &rx_ring->rx_buffer_info[i];
 525                         rx_desc = IGB_RX_DESC(rx_ring, i);
 526                         u0 = (struct my_u0 *)rx_desc;
 527                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 528
 529                         if (i == rx_ring->next_to_use)
 530                                 next_desc = " NTU";
 531                         else if (i == rx_ring->next_to_clean)
 532                                 next_desc = " NTC";
 533                         else
 534                                 next_desc = "";
 535
 536                         if (staterr & E1000_RXD_STAT_DD) {
 537                                 /* Descriptor Done */
 538                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 539                                         "RWB", i,
 540                                         le64_to_cpu(u0->a),
 541                                         le64_to_cpu(u0->b),
 542                                         next_desc);
 543                         } else {
 544                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 545                                         "R  ", i,
 546                                         le64_to_cpu(u0->a),
 547                                         le64_to_cpu(u0->b),
 548                                         (u64)buffer_info->dma,
 549                                         next_desc);
 550
 551                                 if (netif_msg_pktdata(adapter) &&
 552                                     buffer_info->dma && buffer_info->page) {
 553                                         print_hex_dump(KERN_INFO, "",
 554                                           DUMP_PREFIX_ADDRESS,
 555                                           16, 1,
 556                                           page_address(buffer_info->page) +
 557                                                       buffer_info->page_offset,
 558                                           igb_rx_bufsz(rx_ring), true);
 559                                 }
 560                         }
 561                 }
 562         }
 563
 564 exit:
 565         return;
 566 }
 567
 568 /**
 569  *  igb_get_i2c_data - Reads the I2C SDA data bit
 570  *  @hw: pointer to hardware structure
 571  *  @i2cctl: Current value of I2CCTL register
 572  *
 573  *  Returns the I2C data bit value
 574  **/
 575 static int igb_get_i2c_data(void *data)
 576 {
 577         struct igb_adapter *adapter = (struct igb_adapter *)data;
 578         struct e1000_hw *hw = &adapter->hw;
 579         s32 i2cctl = rd32(E1000_I2CPARAMS);
 580
 581         return !!(i2cctl & E1000_I2C_DATA_IN);
 582 }
 583
 584 /**
 585  *  igb_set_i2c_data - Sets the I2C data bit
 586  *  @data: pointer to hardware structure
 587  *  @state: I2C data value (0 or 1) to set
 588  *
 589  *  Sets the I2C data bit
 590  **/
 591 static void igb_set_i2c_data(void *data, int state)
 592 {
 593         struct igb_adapter *adapter = (struct igb_adapter *)data;
 594         struct e1000_hw *hw = &adapter->hw;
 595         s32 i2cctl = rd32(E1000_I2CPARAMS);
 596
 597         if (state)
 598                 i2cctl |= E1000_I2C_DATA_OUT;
 599         else
 600                 i2cctl &= ~E1000_I2C_DATA_OUT;
 601
 602         i2cctl &= ~E1000_I2C_DATA_OE_N;
 603         i2cctl |= E1000_I2C_CLK_OE_N;
 604         wr32(E1000_I2CPARAMS, i2cctl);
 605         wrfl();
 606
 607 }
 608
 609 /**
 610  *  igb_set_i2c_clk - Sets the I2C SCL clock
 611  *  @data: pointer to hardware structure
 612  *  @state: state to set clock
 613  *
 614  *  Sets the I2C clock line to state
 615  **/
 616 static void igb_set_i2c_clk(void *data, int state)
 617 {
 618         struct igb_adapter *adapter = (struct igb_adapter *)data;
 619         struct e1000_hw *hw = &adapter->hw;
 620         s32 i2cctl = rd32(E1000_I2CPARAMS);
 621
 622         if (state) {
 623                 i2cctl |= E1000_I2C_CLK_OUT;
 624                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 625         } else {
 626                 i2cctl &= ~E1000_I2C_CLK_OUT;
 627                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 628         }
 629         wr32(E1000_I2CPARAMS, i2cctl);
 630         wrfl();
 631 }
 632
 633 /**
 634  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 635  *  @data: pointer to hardware structure
 636  *
 637  *  Gets the I2C clock state
 638  **/
 639 static int igb_get_i2c_clk(void *data)
 640 {
 641         struct igb_adapter *adapter = (struct igb_adapter *)data;
 642         struct e1000_hw *hw = &adapter->hw;
 643         s32 i2cctl = rd32(E1000_I2CPARAMS);
 644
 645         return !!(i2cctl & E1000_I2C_CLK_IN);
 646 }
 647
 648 static const struct i2c_algo_bit_data igb_i2c_algo = {
 649         .setsda         = igb_set_i2c_data,
 650         .setscl         = igb_set_i2c_clk,
 651         .getsda         = igb_get_i2c_data,
 652         .getscl         = igb_get_i2c_clk,
 653         .udelay         = 5,
 654         .timeout        = 20,
 655 };
 656
 657 /**
 658  *  igb_get_hw_dev - return device
 659  *  @hw: pointer to hardware structure
 660  *
 661  *  used by hardware layer to print debugging information
 662  **/
 663 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 664 {
 665         struct igb_adapter *adapter = hw->back;
 666         return adapter->netdev;
 667 }
 668
 669 /**
 670  *  igb_init_module - Driver Registration Routine
 671  *
 672  *  igb_init_module is the first routine called when the driver is
 673  *  loaded. All it does is register with the PCI subsystem.
 674  **/
 675 static int __init igb_init_module(void)
 676 {
 677         int ret;
 678
 679         pr_info("%s - version %s\n",
 680                igb_driver_string, igb_driver_version);
 681         pr_info("%s\n", igb_copyright);
 682
 683 #ifdef CONFIG_IGB_DCA
 684         dca_register_notify(&dca_notifier);
 685 #endif
 686         ret = pci_register_driver(&igb_driver);
 687         return ret;
 688 }
 689
 690 module_init(igb_init_module);
 691
 692 /**
 693  *  igb_exit_module - Driver Exit Cleanup Routine
 694  *
 695  *  igb_exit_module is called just before the driver is removed
 696  *  from memory.
 697  **/
 698 static void __exit igb_exit_module(void)
 699 {
 700 #ifdef CONFIG_IGB_DCA
 701         dca_unregister_notify(&dca_notifier);
 702 #endif
 703         pci_unregister_driver(&igb_driver);
 704 }
 705
 706 module_exit(igb_exit_module);
 707
 708 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 709 /**
 710  *  igb_cache_ring_register - Descriptor ring to register mapping
 711  *  @adapter: board private structure to initialize
 712  *
 713  *  Once we know the feature-set enabled for the device, we'll cache
 714  *  the register offset the descriptor ring is assigned to.
 715  **/
 716 static void igb_cache_ring_register(struct igb_adapter *adapter)
 717 {
 718         int i = 0, j = 0;
 719         u32 rbase_offset = adapter->vfs_allocated_count;
 720
 721         switch (adapter->hw.mac.type) {
 722         case e1000_82576:
 723                 /* The queues are allocated for virtualization such that VF 0
 724                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 725                  * In order to avoid collision we start at the first free queue
 726                  * and continue consuming queues in the same sequence
 727                  */
 728                 if (adapter->vfs_allocated_count) {
 729                         for (; i < adapter->rss_queues; i++)
 730                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 731                                                                Q_IDX_82576(i);
 732                 }
 733                 /* Fall through */
 734         case e1000_82575:
 735         case e1000_82580:
 736         case e1000_i350:
 737         case e1000_i354:
 738         case e1000_i210:
 739         case e1000_i211:
 740                 /* Fall through */
 741         default:
 742                 for (; i < adapter->num_rx_queues; i++)
 743                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 744                 for (; j < adapter->num_tx_queues; j++)
 745                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 746                 break;
 747         }
 748 }
 749
 750 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 751 {
 752         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 753         u8 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
 754         u32 value = 0;
 755
 756         if (E1000_REMOVED(hw_addr))
 757                 return ~value;
 758
 759         value = readl(&hw_addr[reg]);
 760
 761         /* reads should not return all F's */
 762         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 763                 struct net_device *netdev = igb->netdev;
 764                 hw->hw_addr = NULL;
 765                 netif_device_detach(netdev);
 766                 netdev_err(netdev, "PCIe link lost, device now detached\n");
 767         }
 768
 769         return value;
 770 }
 771
 772 /**
 773  *  igb_write_ivar - configure ivar for given MSI-X vector
 774  *  @hw: pointer to the HW structure
 775  *  @msix_vector: vector number we are allocating to a given ring
 776  *  @index: row index of IVAR register to write within IVAR table
 777  *  @offset: column offset of in IVAR, should be multiple of 8
 778  *
 779  *  This function is intended to handle the writing of the IVAR register
 780  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 781  *  each containing an cause allocation for an Rx and Tx ring, and a
 782  *  variable number of rows depending on the number of queues supported.
 783  **/
 784 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 785                            int index, int offset)
 786 {
 787         u32 ivar = array_rd32(E1000_IVAR0, index);
 788
 789         /* clear any bits that are currently set */
 790         ivar &= ~((u32)0xFF << offset);
 791
 792         /* write vector and valid bit */
 793         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 794
 795         array_wr32(E1000_IVAR0, index, ivar);
 796 }
 797
 798 #define IGB_N0_QUEUE -1
 799 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 800 {
 801         struct igb_adapter *adapter = q_vector->adapter;
 802         struct e1000_hw *hw = &adapter->hw;
 803         int rx_queue = IGB_N0_QUEUE;
 804         int tx_queue = IGB_N0_QUEUE;
 805         u32 msixbm = 0;
 806
 807         if (q_vector->rx.ring)
 808                 rx_queue = q_vector->rx.ring->reg_idx;
 809         if (q_vector->tx.ring)
 810                 tx_queue = q_vector->tx.ring->reg_idx;
 811
 812         switch (hw->mac.type) {
 813         case e1000_82575:
 814                 /* The 82575 assigns vectors using a bitmask, which matches the
 815                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 816                  * or more queues to a vector, we write the appropriate bits
 817                  * into the MSIXBM register for that vector.
 818                  */
 819                 if (rx_queue > IGB_N0_QUEUE)
 820                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 821                 if (tx_queue > IGB_N0_QUEUE)
 822                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 823                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 824                         msixbm |= E1000_EIMS_OTHER;
 825                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 826                 q_vector->eims_value = msixbm;
 827                 break;
 828         case e1000_82576:
 829                 /* 82576 uses a table that essentially consists of 2 columns
 830                  * with 8 rows.  The ordering is column-major so we use the
 831                  * lower 3 bits as the row index, and the 4th bit as the
 832                  * column offset.
 833                  */
 834                 if (rx_queue > IGB_N0_QUEUE)
 835                         igb_write_ivar(hw, msix_vector,
 836                                        rx_queue & 0x7,
 837                                        (rx_queue & 0x8) << 1);
 838                 if (tx_queue > IGB_N0_QUEUE)
 839                         igb_write_ivar(hw, msix_vector,
 840                                        tx_queue & 0x7,
 841                                        ((tx_queue & 0x8) << 1) + 8);
 842                 q_vector->eims_value = BIT(msix_vector);
 843                 break;
 844         case e1000_82580:
 845         case e1000_i350:
 846         case e1000_i354:
 847         case e1000_i210:
 848         case e1000_i211:
 849                 /* On 82580 and newer adapters the scheme is similar to 82576
 850                  * however instead of ordering column-major we have things
 851                  * ordered row-major.  So we traverse the table by using
 852                  * bit 0 as the column offset, and the remaining bits as the
 853                  * row index.
 854                  */
 855                 if (rx_queue > IGB_N0_QUEUE)
 856                         igb_write_ivar(hw, msix_vector,
 857                                        rx_queue >> 1,
 858                                        (rx_queue & 0x1) << 4);
 859                 if (tx_queue > IGB_N0_QUEUE)
 860                         igb_write_ivar(hw, msix_vector,
 861                                        tx_queue >> 1,
 862                                        ((tx_queue & 0x1) << 4) + 8);
 863                 q_vector->eims_value = BIT(msix_vector);
 864                 break;
 865         default:
 866                 BUG();
 867                 break;
 868         }
 869
 870         /* add q_vector eims value to global eims_enable_mask */
 871         adapter->eims_enable_mask |= q_vector->eims_value;
 872
 873         /* configure q_vector to set itr on first interrupt */
 874         q_vector->set_itr = 1;
 875 }
 876
 877 /**
 878  *  igb_configure_msix - Configure MSI-X hardware
 879  *  @adapter: board private structure to initialize
 880  *
 881  *  igb_configure_msix sets up the hardware to properly
 882  *  generate MSI-X interrupts.
 883  **/
 884 static void igb_configure_msix(struct igb_adapter *adapter)
 885 {
 886         u32 tmp;
 887         int i, vector = 0;
 888         struct e1000_hw *hw = &adapter->hw;
 889
 890         adapter->eims_enable_mask = 0;
 891
 892         /* set vector for other causes, i.e. link changes */
 893         switch (hw->mac.type) {
 894         case e1000_82575:
 895                 tmp = rd32(E1000_CTRL_EXT);
 896                 /* enable MSI-X PBA support*/
 897                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 898
 899                 /* Auto-Mask interrupts upon ICR read. */
 900                 tmp |= E1000_CTRL_EXT_EIAME;
 901                 tmp |= E1000_CTRL_EXT_IRCA;
 902
 903                 wr32(E1000_CTRL_EXT, tmp);
 904
 905                 /* enable msix_other interrupt */
 906                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 907                 adapter->eims_other = E1000_EIMS_OTHER;
 908
 909                 break;
 910
 911         case e1000_82576:
 912         case e1000_82580:
 913         case e1000_i350:
 914         case e1000_i354:
 915         case e1000_i210:
 916         case e1000_i211:
 917                 /* Turn on MSI-X capability first, or our settings
 918                  * won't stick.  And it will take days to debug.
 919                  */
 920                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 921                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 922                      E1000_GPIE_NSICR);
 923
 924                 /* enable msix_other interrupt */
 925                 adapter->eims_other = BIT(vector);
 926                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 927
 928                 wr32(E1000_IVAR_MISC, tmp);
 929                 break;
 930         default:
 931                 /* do nothing, since nothing else supports MSI-X */
 932                 break;
 933         } /* switch (hw->mac.type) */
 934
 935         adapter->eims_enable_mask |= adapter->eims_other;
 936
 937         for (i = 0; i < adapter->num_q_vectors; i++)
 938                 igb_assign_vector(adapter->q_vector[i], vector++);
 939
 940         wrfl();
 941 }
 942
 943 /**
 944  *  igb_request_msix - Initialize MSI-X interrupts
 945  *  @adapter: board private structure to initialize
 946  *
 947  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 948  *  kernel.
 949  **/
 950 static int igb_request_msix(struct igb_adapter *adapter)
 951 {
 952         unsigned int num_q_vectors = adapter->num_q_vectors;
 953         struct net_device *netdev = adapter->netdev;
 954         int i, err = 0, vector = 0, free_vector = 0;
 955
 956         err = request_irq(adapter->msix_entries[vector].vector,
 957                           igb_msix_other, 0, netdev->name, adapter);
 958         if (err)
 959                 goto err_out;
 960
 961         if (num_q_vectors > MAX_Q_VECTORS) {
 962                 num_q_vectors = MAX_Q_VECTORS;
 963                 dev_warn(&adapter->pdev->dev,
 964                          "The number of queue vectors (%d) is higher than max allowed (%d)\n",
 965                          adapter->num_q_vectors, MAX_Q_VECTORS);
 966         }
 967         for (i = 0; i < num_q_vectors; i++) {
 968                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 969
 970                 vector++;
 971
 972                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 973
 974                 if (q_vector->rx.ring && q_vector->tx.ring)
 975                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 976                                 q_vector->rx.ring->queue_index);
 977                 else if (q_vector->tx.ring)
 978                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 979                                 q_vector->tx.ring->queue_index);
 980                 else if (q_vector->rx.ring)
 981                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 982                                 q_vector->rx.ring->queue_index);
 983                 else
 984                         sprintf(q_vector->name, "%s-unused", netdev->name);
 985
 986                 err = request_irq(adapter->msix_entries[vector].vector,
 987                                   igb_msix_ring, 0, q_vector->name,
 988                                   q_vector);
 989                 if (err)
 990                         goto err_free;
 991         }
 992
 993         igb_configure_msix(adapter);
 994         return 0;
 995
 996 err_free:
 997         /* free already assigned IRQs */
 998         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 999
1000         vector--;
1001         for (i = 0; i < vector; i++) {
1002                 free_irq(adapter->msix_entries[free_vector++].vector,
1003                          adapter->q_vector[i]);
1004         }
1005 err_out:
1006         return err;
1007 }
1008
1009 /**
1010  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
1011  *  @adapter: board private structure to initialize
1012  *  @v_idx: Index of vector to be freed
1013  *
1014  *  This function frees the memory allocated to the q_vector.
1015  **/
1016 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1017 {
1018         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1019
1020         adapter->q_vector[v_idx] = NULL;
1021
1022         /* igb_get_stats64() might access the rings on this vector,
1023          * we must wait a grace period before freeing it.
1024          */
1025         if (q_vector)
1026                 kfree_rcu(q_vector, rcu);
1027 }
1028
1029 /**
1030  *  igb_reset_q_vector - Reset config for interrupt vector
1031  *  @adapter: board private structure to initialize
1032  *  @v_idx: Index of vector to be reset
1033  *
1034  *  If NAPI is enabled it will delete any references to the
1035  *  NAPI struct. This is preparation for igb_free_q_vector.
1036  **/
1037 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1038 {
1039         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1040
1041         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1042          * allocated. So, q_vector is NULL so we should stop here.
1043          */
1044         if (!q_vector)
1045                 return;
1046
1047         if (q_vector->tx.ring)
1048                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1049
1050         if (q_vector->rx.ring)
1051                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1052
1053         netif_napi_del(&q_vector->napi);
1054
1055 }
1056
1057 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1058 {
1059         int v_idx = adapter->num_q_vectors;
1060
1061         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1062                 pci_disable_msix(adapter->pdev);
1063         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1064                 pci_disable_msi(adapter->pdev);
1065
1066         while (v_idx--)
1067                 igb_reset_q_vector(adapter, v_idx);
1068 }
1069
1070 /**
1071  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1072  *  @adapter: board private structure to initialize
1073  *
1074  *  This function frees the memory allocated to the q_vectors.  In addition if
1075  *  NAPI is enabled it will delete any references to the NAPI struct prior
1076  *  to freeing the q_vector.
1077  **/
1078 static void igb_free_q_vectors(struct igb_adapter *adapter)
1079 {
1080         int v_idx = adapter->num_q_vectors;
1081
1082         adapter->num_tx_queues = 0;
1083         adapter->num_rx_queues = 0;
1084         adapter->num_q_vectors = 0;
1085
1086         while (v_idx--) {
1087                 igb_reset_q_vector(adapter, v_idx);
1088                 igb_free_q_vector(adapter, v_idx);
1089         }
1090 }
1091
1092 /**
1093  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1094  *  @adapter: board private structure to initialize
1095  *
1096  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1097  *  MSI-X interrupts allocated.
1098  */
1099 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1100 {
1101         igb_free_q_vectors(adapter);
1102         igb_reset_interrupt_capability(adapter);
1103 }
1104
1105 /**
1106  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1107  *  @adapter: board private structure to initialize
1108  *  @msix: boolean value of MSIX capability
1109  *
1110  *  Attempt to configure interrupts using the best available
1111  *  capabilities of the hardware and kernel.
1112  **/
1113 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1114 {
1115         int err;
1116         int numvecs, i;
1117
1118         if (!msix)
1119                 goto msi_only;
1120         adapter->flags |= IGB_FLAG_HAS_MSIX;
1121
1122         /* Number of supported queues. */
1123         adapter->num_rx_queues = adapter->rss_queues;
1124         if (adapter->vfs_allocated_count)
1125                 adapter->num_tx_queues = 1;
1126         else
1127                 adapter->num_tx_queues = adapter->rss_queues;
1128
1129         /* start with one vector for every Rx queue */
1130         numvecs = adapter->num_rx_queues;
1131
1132         /* if Tx handler is separate add 1 for every Tx queue */
1133         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1134                 numvecs += adapter->num_tx_queues;
1135
1136         /* store the number of vectors reserved for queues */
1137         adapter->num_q_vectors = numvecs;
1138
1139         /* add 1 vector for link status interrupts */
1140         numvecs++;
1141         for (i = 0; i < numvecs; i++)
1142                 adapter->msix_entries[i].entry = i;
1143
1144         err = pci_enable_msix_range(adapter->pdev,
1145                                     adapter->msix_entries,
1146                                     numvecs,
1147                                     numvecs);
1148         if (err > 0)
1149                 return;
1150
1151         igb_reset_interrupt_capability(adapter);
1152
1153         /* If we can't do MSI-X, try MSI */
1154 msi_only:
1155         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1156 #ifdef CONFIG_PCI_IOV
1157         /* disable SR-IOV for non MSI-X configurations */
1158         if (adapter->vf_data) {
1159                 struct e1000_hw *hw = &adapter->hw;
1160                 /* disable iov and allow time for transactions to clear */
1161                 pci_disable_sriov(adapter->pdev);
1162                 msleep(500);
1163
1164                 kfree(adapter->vf_mac_list);
1165                 adapter->vf_mac_list = NULL;
1166                 kfree(adapter->vf_data);
1167                 adapter->vf_data = NULL;
1168                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1169                 wrfl();
1170                 msleep(100);
1171                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1172         }
1173 #endif
1174         adapter->vfs_allocated_count = 0;
1175         adapter->rss_queues = 1;
1176         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1177         adapter->num_rx_queues = 1;
1178         adapter->num_tx_queues = 1;
1179         adapter->num_q_vectors = 1;
1180         if (!pci_enable_msi(adapter->pdev))
1181                 adapter->flags |= IGB_FLAG_HAS_MSI;
1182 }
1183
1184 static void igb_add_ring(struct igb_ring *ring,
1185                          struct igb_ring_container *head)
1186 {
1187         head->ring = ring;
1188         head->count++;
1189 }
1190
1191 /**
1192  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1193  *  @adapter: board private structure to initialize
1194  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1195  *  @v_idx: index of vector in adapter struct
1196  *  @txr_count: total number of Tx rings to allocate
1197  *  @txr_idx: index of first Tx ring to allocate
1198  *  @rxr_count: total number of Rx rings to allocate
1199  *  @rxr_idx: index of first Rx ring to allocate
1200  *
1201  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1202  **/
1203 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1204                               int v_count, int v_idx,
1205                               int txr_count, int txr_idx,
1206                               int rxr_count, int rxr_idx)
1207 {
1208         struct igb_q_vector *q_vector;
1209         struct igb_ring *ring;
1210         int ring_count, size;
1211
1212         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1213         if (txr_count > 1 || rxr_count > 1)
1214                 return -ENOMEM;
1215
1216         ring_count = txr_count + rxr_count;
1217         size = sizeof(struct igb_q_vector) +
1218                (sizeof(struct igb_ring) * ring_count);
1219
1220         /* allocate q_vector and rings */
1221         q_vector = adapter->q_vector[v_idx];
1222         if (!q_vector) {
1223                 q_vector = kzalloc(size, GFP_KERNEL);
1224         } else if (size > ksize(q_vector)) {
1225                 kfree_rcu(q_vector, rcu);
1226                 q_vector = kzalloc(size, GFP_KERNEL);
1227         } else {
1228                 memset(q_vector, 0, size);
1229         }
1230         if (!q_vector)
1231                 return -ENOMEM;
1232
1233         /* initialize NAPI */
1234         netif_napi_add(adapter->netdev, &q_vector->napi,
1235                        igb_poll, 64);
1236
1237         /* tie q_vector and adapter together */
1238         adapter->q_vector[v_idx] = q_vector;
1239         q_vector->adapter = adapter;
1240
1241         /* initialize work limits */
1242         q_vector->tx.work_limit = adapter->tx_work_limit;
1243
1244         /* initialize ITR configuration */
1245         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1246         q_vector->itr_val = IGB_START_ITR;
1247
1248         /* initialize pointer to rings */
1249         ring = q_vector->ring;
1250
1251         /* intialize ITR */
1252         if (rxr_count) {
1253                 /* rx or rx/tx vector */
1254                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1255                         q_vector->itr_val = adapter->rx_itr_setting;
1256         } else {
1257                 /* tx only vector */
1258                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1259                         q_vector->itr_val = adapter->tx_itr_setting;
1260         }
1261
1262         if (txr_count) {
1263                 /* assign generic ring traits */
1264                 ring->dev = &adapter->pdev->dev;
1265                 ring->netdev = adapter->netdev;
1266
1267                 /* configure backlink on ring */
1268                 ring->q_vector = q_vector;
1269
1270                 /* update q_vector Tx values */
1271                 igb_add_ring(ring, &q_vector->tx);
1272
1273                 /* For 82575, context index must be unique per ring. */
1274                 if (adapter->hw.mac.type == e1000_82575)
1275                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1276
1277                 /* apply Tx specific ring traits */
1278                 ring->count = adapter->tx_ring_count;
1279                 ring->queue_index = txr_idx;
1280
1281                 u64_stats_init(&ring->tx_syncp);
1282                 u64_stats_init(&ring->tx_syncp2);
1283
1284                 /* assign ring to adapter */
1285                 adapter->tx_ring[txr_idx] = ring;
1286
1287                 /* push pointer to next ring */
1288                 ring++;
1289         }
1290
1291         if (rxr_count) {
1292                 /* assign generic ring traits */
1293                 ring->dev = &adapter->pdev->dev;
1294                 ring->netdev = adapter->netdev;
1295
1296                 /* configure backlink on ring */
1297                 ring->q_vector = q_vector;
1298
1299                 /* update q_vector Rx values */
1300                 igb_add_ring(ring, &q_vector->rx);
1301
1302                 /* set flag indicating ring supports SCTP checksum offload */
1303                 if (adapter->hw.mac.type >= e1000_82576)
1304                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1305
1306                 /* On i350, i354, i210, and i211, loopback VLAN packets
1307                  * have the tag byte-swapped.
1308                  */
1309                 if (adapter->hw.mac.type >= e1000_i350)
1310                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1311
1312                 /* apply Rx specific ring traits */
1313                 ring->count = adapter->rx_ring_count;
1314                 ring->queue_index = rxr_idx;
1315
1316                 u64_stats_init(&ring->rx_syncp);
1317
1318                 /* assign ring to adapter */
1319                 adapter->rx_ring[rxr_idx] = ring;
1320         }
1321
1322         return 0;
1323 }
1324
1325
1326 /**
1327  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1328  *  @adapter: board private structure to initialize
1329  *
1330  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1331  *  return -ENOMEM.
1332  **/
1333 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1334 {
1335         int q_vectors = adapter->num_q_vectors;
1336         int rxr_remaining = adapter->num_rx_queues;
1337         int txr_remaining = adapter->num_tx_queues;
1338         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1339         int err;
1340
1341         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1342                 for (; rxr_remaining; v_idx++) {
1343                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1344                                                  0, 0, 1, rxr_idx);
1345
1346                         if (err)
1347                                 goto err_out;
1348
1349                         /* update counts and index */
1350                         rxr_remaining--;
1351                         rxr_idx++;
1352                 }
1353         }
1354
1355         for (; v_idx < q_vectors; v_idx++) {
1356                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1357                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1358
1359                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1360                                          tqpv, txr_idx, rqpv, rxr_idx);
1361
1362                 if (err)
1363                         goto err_out;
1364
1365                 /* update counts and index */
1366                 rxr_remaining -= rqpv;
1367                 txr_remaining -= tqpv;
1368                 rxr_idx++;
1369                 txr_idx++;
1370         }
1371
1372         return 0;
1373
1374 err_out:
1375         adapter->num_tx_queues = 0;
1376         adapter->num_rx_queues = 0;
1377         adapter->num_q_vectors = 0;
1378
1379         while (v_idx--)
1380                 igb_free_q_vector(adapter, v_idx);
1381
1382         return -ENOMEM;
1383 }
1384
1385 /**
1386  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1387  *  @adapter: board private structure to initialize
1388  *  @msix: boolean value of MSIX capability
1389  *
1390  *  This function initializes the interrupts and allocates all of the queues.
1391  **/
1392 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1393 {
1394         struct pci_dev *pdev = adapter->pdev;
1395         int err;
1396
1397         igb_set_interrupt_capability(adapter, msix);
1398
1399         err = igb_alloc_q_vectors(adapter);
1400         if (err) {
1401                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1402                 goto err_alloc_q_vectors;
1403         }
1404
1405         igb_cache_ring_register(adapter);
1406
1407         return 0;
1408
1409 err_alloc_q_vectors:
1410         igb_reset_interrupt_capability(adapter);
1411         return err;
1412 }
1413
1414 /**
1415  *  igb_request_irq - initialize interrupts
1416  *  @adapter: board private structure to initialize
1417  *
1418  *  Attempts to configure interrupts using the best available
1419  *  capabilities of the hardware and kernel.
1420  **/
1421 static int igb_request_irq(struct igb_adapter *adapter)
1422 {
1423         struct net_device *netdev = adapter->netdev;
1424         struct pci_dev *pdev = adapter->pdev;
1425         int err = 0;
1426
1427         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1428                 err = igb_request_msix(adapter);
1429                 if (!err)
1430                         goto request_done;
1431                 /* fall back to MSI */
1432                 igb_free_all_tx_resources(adapter);
1433                 igb_free_all_rx_resources(adapter);
1434
1435                 igb_clear_interrupt_scheme(adapter);
1436                 err = igb_init_interrupt_scheme(adapter, false);
1437                 if (err)
1438                         goto request_done;
1439
1440                 igb_setup_all_tx_resources(adapter);
1441                 igb_setup_all_rx_resources(adapter);
1442                 igb_configure(adapter);
1443         }
1444
1445         igb_assign_vector(adapter->q_vector[0], 0);
1446
1447         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1448                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1449                                   netdev->name, adapter);
1450                 if (!err)
1451                         goto request_done;
1452
1453                 /* fall back to legacy interrupts */
1454                 igb_reset_interrupt_capability(adapter);
1455                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1456         }
1457
1458         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1459                           netdev->name, adapter);
1460
1461         if (err)
1462                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1463                         err);
1464
1465 request_done:
1466         return err;
1467 }
1468
1469 static void igb_free_irq(struct igb_adapter *adapter)
1470 {
1471         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1472                 int vector = 0, i;
1473
1474                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1475
1476                 for (i = 0; i < adapter->num_q_vectors; i++)
1477                         free_irq(adapter->msix_entries[vector++].vector,
1478                                  adapter->q_vector[i]);
1479         } else {
1480                 free_irq(adapter->pdev->irq, adapter);
1481         }
1482 }
1483
1484 /**
1485  *  igb_irq_disable - Mask off interrupt generation on the NIC
1486  *  @adapter: board private structure
1487  **/
1488 static void igb_irq_disable(struct igb_adapter *adapter)
1489 {
1490         struct e1000_hw *hw = &adapter->hw;
1491
1492         /* we need to be careful when disabling interrupts.  The VFs are also
1493          * mapped into these registers and so clearing the bits can cause
1494          * issues on the VF drivers so we only need to clear what we set
1495          */
1496         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1497                 u32 regval = rd32(E1000_EIAM);
1498
1499                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1500                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1501                 regval = rd32(E1000_EIAC);
1502                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1503         }
1504
1505         wr32(E1000_IAM, 0);
1506         wr32(E1000_IMC, ~0);
1507         wrfl();
1508         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1509                 int i;
1510
1511                 for (i = 0; i < adapter->num_q_vectors; i++)
1512                         synchronize_irq(adapter->msix_entries[i].vector);
1513         } else {
1514                 synchronize_irq(adapter->pdev->irq);
1515         }
1516 }
1517
1518 /**
1519  *  igb_irq_enable - Enable default interrupt generation settings
1520  *  @adapter: board private structure
1521  **/
1522 static void igb_irq_enable(struct igb_adapter *adapter)
1523 {
1524         struct e1000_hw *hw = &adapter->hw;
1525
1526         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1527                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1528                 u32 regval = rd32(E1000_EIAC);
1529
1530                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1531                 regval = rd32(E1000_EIAM);
1532                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1533                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1534                 if (adapter->vfs_allocated_count) {
1535                         wr32(E1000_MBVFIMR, 0xFF);
1536                         ims |= E1000_IMS_VMMB;
1537                 }
1538                 wr32(E1000_IMS, ims);
1539         } else {
1540                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1541                                 E1000_IMS_DRSTA);
1542                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1543                                 E1000_IMS_DRSTA);
1544         }
1545 }
1546
1547 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1548 {
1549         struct e1000_hw *hw = &adapter->hw;
1550         u16 pf_id = adapter->vfs_allocated_count;
1551         u16 vid = adapter->hw.mng_cookie.vlan_id;
1552         u16 old_vid = adapter->mng_vlan_id;
1553
1554         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1555                 /* add VID to filter table */
1556                 igb_vfta_set(hw, vid, pf_id, true, true);
1557                 adapter->mng_vlan_id = vid;
1558         } else {
1559                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1560         }
1561
1562         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1563             (vid != old_vid) &&
1564             !test_bit(old_vid, adapter->active_vlans)) {
1565                 /* remove VID from filter table */
1566                 igb_vfta_set(hw, vid, pf_id, false, true);
1567         }
1568 }
1569
1570 /**
1571  *  igb_release_hw_control - release control of the h/w to f/w
1572  *  @adapter: address of board private structure
1573  *
1574  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1575  *  For ASF and Pass Through versions of f/w this means that the
1576  *  driver is no longer loaded.
1577  **/
1578 static void igb_release_hw_control(struct igb_adapter *adapter)
1579 {
1580         struct e1000_hw *hw = &adapter->hw;
1581         u32 ctrl_ext;
1582
1583         /* Let firmware take over control of h/w */
1584         ctrl_ext = rd32(E1000_CTRL_EXT);
1585         wr32(E1000_CTRL_EXT,
1586                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1587 }
1588
1589 /**
1590  *  igb_get_hw_control - get control of the h/w from f/w
1591  *  @adapter: address of board private structure
1592  *
1593  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1594  *  For ASF and Pass Through versions of f/w this means that
1595  *  the driver is loaded.
1596  **/
1597 static void igb_get_hw_control(struct igb_adapter *adapter)
1598 {
1599         struct e1000_hw *hw = &adapter->hw;
1600         u32 ctrl_ext;
1601
1602         /* Let firmware know the driver has taken over */
1603         ctrl_ext = rd32(E1000_CTRL_EXT);
1604         wr32(E1000_CTRL_EXT,
1605                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1606 }
1607
1608 /**
1609  *  igb_configure - configure the hardware for RX and TX
1610  *  @adapter: private board structure
1611  **/
1612 static void igb_configure(struct igb_adapter *adapter)
1613 {
1614         struct net_device *netdev = adapter->netdev;
1615         int i;
1616
1617         igb_get_hw_control(adapter);
1618         igb_set_rx_mode(netdev);
1619
1620         igb_restore_vlan(adapter);
1621
1622         igb_setup_tctl(adapter);
1623         igb_setup_mrqc(adapter);
1624         igb_setup_rctl(adapter);
1625
1626         igb_nfc_filter_restore(adapter);
1627         igb_configure_tx(adapter);
1628         igb_configure_rx(adapter);
1629
1630         igb_rx_fifo_flush_82575(&adapter->hw);
1631
1632         /* call igb_desc_unused which always leaves
1633          * at least 1 descriptor unused to make sure
1634          * next_to_use != next_to_clean
1635          */
1636         for (i = 0; i < adapter->num_rx_queues; i++) {
1637                 struct igb_ring *ring = adapter->rx_ring[i];
1638                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1639         }
1640 }
1641
1642 /**
1643  *  igb_power_up_link - Power up the phy/serdes link
1644  *  @adapter: address of board private structure
1645  **/
1646 void igb_power_up_link(struct igb_adapter *adapter)
1647 {
1648         igb_reset_phy(&adapter->hw);
1649
1650         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1651                 igb_power_up_phy_copper(&adapter->hw);
1652         else
1653                 igb_power_up_serdes_link_82575(&adapter->hw);
1654
1655         igb_setup_link(&adapter->hw);
1656 }
1657
1658 /**
1659  *  igb_power_down_link - Power down the phy/serdes link
1660  *  @adapter: address of board private structure
1661  */
1662 static void igb_power_down_link(struct igb_adapter *adapter)
1663 {
1664         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1665                 igb_power_down_phy_copper_82575(&adapter->hw);
1666         else
1667                 igb_shutdown_serdes_link_82575(&adapter->hw);
1668 }
1669
1670 /**
1671  * Detect and switch function for Media Auto Sense
1672  * @adapter: address of the board private structure
1673  **/
1674 static void igb_check_swap_media(struct igb_adapter *adapter)
1675 {
1676         struct e1000_hw *hw = &adapter->hw;
1677         u32 ctrl_ext, connsw;
1678         bool swap_now = false;
1679
1680         ctrl_ext = rd32(E1000_CTRL_EXT);
1681         connsw = rd32(E1000_CONNSW);
1682
1683         /* need to live swap if current media is copper and we have fiber/serdes
1684          * to go to.
1685          */
1686
1687         if ((hw->phy.media_type == e1000_media_type_copper) &&
1688             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1689                 swap_now = true;
1690         } else if ((hw->phy.media_type != e1000_media_type_copper) &&
1691                    !(connsw & E1000_CONNSW_SERDESD)) {
1692                 /* copper signal takes time to appear */
1693                 if (adapter->copper_tries < 4) {
1694                         adapter->copper_tries++;
1695                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1696                         wr32(E1000_CONNSW, connsw);
1697                         return;
1698                 } else {
1699                         adapter->copper_tries = 0;
1700                         if ((connsw & E1000_CONNSW_PHYSD) &&
1701                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1702                                 swap_now = true;
1703                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1704                                 wr32(E1000_CONNSW, connsw);
1705                         }
1706                 }
1707         }
1708
1709         if (!swap_now)
1710                 return;
1711
1712         switch (hw->phy.media_type) {
1713         case e1000_media_type_copper:
1714                 netdev_info(adapter->netdev,
1715                         "MAS: changing media to fiber/serdes\n");
1716                 ctrl_ext |=
1717                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1718                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1719                 adapter->copper_tries = 0;
1720                 break;
1721         case e1000_media_type_internal_serdes:
1722         case e1000_media_type_fiber:
1723                 netdev_info(adapter->netdev,
1724                         "MAS: changing media to copper\n");
1725                 ctrl_ext &=
1726                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1727                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1728                 break;
1729         default:
1730                 /* shouldn't get here during regular operation */
1731                 netdev_err(adapter->netdev,
1732                         "AMS: Invalid media type found, returning\n");
1733                 break;
1734         }
1735         wr32(E1000_CTRL_EXT, ctrl_ext);
1736 }
1737
1738 /**
1739  *  igb_up - Open the interface and prepare it to handle traffic
1740  *  @adapter: board private structure
1741  **/
1742 int igb_up(struct igb_adapter *adapter)
1743 {
1744         struct e1000_hw *hw = &adapter->hw;
1745         int i;
1746
1747         /* hardware has been reset, we need to reload some things */
1748         igb_configure(adapter);
1749
1750         clear_bit(__IGB_DOWN, &adapter->state);
1751
1752         for (i = 0; i < adapter->num_q_vectors; i++)
1753                 napi_enable(&(adapter->q_vector[i]->napi));
1754
1755         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1756                 igb_configure_msix(adapter);
1757         else
1758                 igb_assign_vector(adapter->q_vector[0], 0);
1759
1760         /* Clear any pending interrupts. */
1761         rd32(E1000_ICR);
1762         igb_irq_enable(adapter);
1763
1764         /* notify VFs that reset has been completed */
1765         if (adapter->vfs_allocated_count) {
1766                 u32 reg_data = rd32(E1000_CTRL_EXT);
1767
1768                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1769                 wr32(E1000_CTRL_EXT, reg_data);
1770         }
1771
1772         netif_tx_start_all_queues(adapter->netdev);
1773
1774         /* start the watchdog. */
1775         hw->mac.get_link_status = 1;
1776         schedule_work(&adapter->watchdog_task);
1777
1778         if ((adapter->flags & IGB_FLAG_EEE) &&
1779             (!hw->dev_spec._82575.eee_disable))
1780                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1781
1782         return 0;
1783 }
1784
1785 void igb_down(struct igb_adapter *adapter)
1786 {
1787         struct net_device *netdev = adapter->netdev;
1788         struct e1000_hw *hw = &adapter->hw;
1789         u32 tctl, rctl;
1790         int i;
1791
1792         /* signal that we're down so the interrupt handler does not
1793          * reschedule our watchdog timer
1794          */
1795         set_bit(__IGB_DOWN, &adapter->state);
1796
1797         /* disable receives in the hardware */
1798         rctl = rd32(E1000_RCTL);
1799         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1800         /* flush and sleep below */
1801
1802         igb_nfc_filter_exit(adapter);
1803
1804         netif_carrier_off(netdev);
1805         netif_tx_stop_all_queues(netdev);
1806
1807         /* disable transmits in the hardware */
1808         tctl = rd32(E1000_TCTL);
1809         tctl &= ~E1000_TCTL_EN;
1810         wr32(E1000_TCTL, tctl);
1811         /* flush both disables and wait for them to finish */
1812         wrfl();
1813         usleep_range(10000, 11000);
1814
1815         igb_irq_disable(adapter);
1816
1817         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1818
1819         for (i = 0; i < adapter->num_q_vectors; i++) {
1820                 if (adapter->q_vector[i]) {
1821                         napi_synchronize(&adapter->q_vector[i]->napi);
1822                         napi_disable(&adapter->q_vector[i]->napi);
1823                 }
1824         }
1825
1826         del_timer_sync(&adapter->watchdog_timer);
1827         del_timer_sync(&adapter->phy_info_timer);
1828
1829         /* record the stats before reset*/
1830         spin_lock(&adapter->stats64_lock);
1831         igb_update_stats(adapter);
1832         spin_unlock(&adapter->stats64_lock);
1833
1834         adapter->link_speed = 0;
1835         adapter->link_duplex = 0;
1836
1837         if (!pci_channel_offline(adapter->pdev))
1838                 igb_reset(adapter);
1839
1840         /* clear VLAN promisc flag so VFTA will be updated if necessary */
1841         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
1842
1843         igb_clean_all_tx_rings(adapter);
1844         igb_clean_all_rx_rings(adapter);
1845 #ifdef CONFIG_IGB_DCA
1846
1847         /* since we reset the hardware DCA settings were cleared */
1848         igb_setup_dca(adapter);
1849 #endif
1850 }
1851
1852 void igb_reinit_locked(struct igb_adapter *adapter)
1853 {
1854         WARN_ON(in_interrupt());
1855         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1856                 usleep_range(1000, 2000);
1857         igb_down(adapter);
1858         igb_up(adapter);
1859         clear_bit(__IGB_RESETTING, &adapter->state);
1860 }
1861
1862 /** igb_enable_mas - Media Autosense re-enable after swap
1863  *
1864  * @adapter: adapter struct
1865  **/
1866 static void igb_enable_mas(struct igb_adapter *adapter)
1867 {
1868         struct e1000_hw *hw = &adapter->hw;
1869         u32 connsw = rd32(E1000_CONNSW);
1870
1871         /* configure for SerDes media detect */
1872         if ((hw->phy.media_type == e1000_media_type_copper) &&
1873             (!(connsw & E1000_CONNSW_SERDESD))) {
1874                 connsw |= E1000_CONNSW_ENRGSRC;
1875                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1876                 wr32(E1000_CONNSW, connsw);
1877                 wrfl();
1878         }
1879 }
1880
1881 void igb_reset(struct igb_adapter *adapter)
1882 {
1883         struct pci_dev *pdev = adapter->pdev;
1884         struct e1000_hw *hw = &adapter->hw;
1885         struct e1000_mac_info *mac = &hw->mac;
1886         struct e1000_fc_info *fc = &hw->fc;
1887         u32 pba, hwm;
1888
1889         /* Repartition Pba for greater than 9k mtu
1890          * To take effect CTRL.RST is required.
1891          */
1892         switch (mac->type) {
1893         case e1000_i350:
1894         case e1000_i354:
1895         case e1000_82580:
1896                 pba = rd32(E1000_RXPBS);
1897                 pba = igb_rxpbs_adjust_82580(pba);
1898                 break;
1899         case e1000_82576:
1900                 pba = rd32(E1000_RXPBS);
1901                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1902                 break;
1903         case e1000_82575:
1904         case e1000_i210:
1905         case e1000_i211:
1906         default:
1907                 pba = E1000_PBA_34K;
1908                 break;
1909         }
1910
1911         if (mac->type == e1000_82575) {
1912                 u32 min_rx_space, min_tx_space, needed_tx_space;
1913
1914                 /* write Rx PBA so that hardware can report correct Tx PBA */
1915                 wr32(E1000_PBA, pba);
1916
1917                 /* To maintain wire speed transmits, the Tx FIFO should be
1918                  * large enough to accommodate two full transmit packets,
1919                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1920                  * the Rx FIFO should be large enough to accommodate at least
1921                  * one full receive packet and is similarly rounded up and
1922                  * expressed in KB.
1923                  */
1924                 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
1925
1926                 /* The Tx FIFO also stores 16 bytes of information about the Tx
1927                  * but don't include Ethernet FCS because hardware appends it.
1928                  * We only need to round down to the nearest 512 byte block
1929                  * count since the value we care about is 2 frames, not 1.
1930                  */
1931                 min_tx_space = adapter->max_frame_size;
1932                 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
1933                 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
1934
1935                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1936                 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
1937
1938                 /* If current Tx allocation is less than the min Tx FIFO size,
1939                  * and the min Tx FIFO size is less than the current Rx FIFO
1940                  * allocation, take space away from current Rx allocation.
1941                  */
1942                 if (needed_tx_space < pba) {
1943                         pba -= needed_tx_space;
1944
1945                         /* if short on Rx space, Rx wins and must trump Tx
1946                          * adjustment
1947                          */
1948                         if (pba < min_rx_space)
1949                                 pba = min_rx_space;
1950                 }
1951
1952                 /* adjust PBA for jumbo frames */
1953                 wr32(E1000_PBA, pba);
1954         }
1955
1956         /* flow control settings
1957          * The high water mark must be low enough to fit one full frame
1958          * after transmitting the pause frame.  As such we must have enough
1959          * space to allow for us to complete our current transmit and then
1960          * receive the frame that is in progress from the link partner.
1961          * Set it to:
1962          * - the full Rx FIFO size minus one full Tx plus one full Rx frame
1963          */
1964         hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
1965
1966         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1967         fc->low_water = fc->high_water - 16;
1968         fc->pause_time = 0xFFFF;
1969         fc->send_xon = 1;
1970         fc->current_mode = fc->requested_mode;
1971
1972         /* disable receive for all VFs and wait one second */
1973         if (adapter->vfs_allocated_count) {
1974                 int i;
1975
1976                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1977                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1978
1979                 /* ping all the active vfs to let them know we are going down */
1980                 igb_ping_all_vfs(adapter);
1981
1982                 /* disable transmits and receives */
1983                 wr32(E1000_VFRE, 0);
1984                 wr32(E1000_VFTE, 0);
1985         }
1986
1987         /* Allow time for pending master requests to run */
1988         hw->mac.ops.reset_hw(hw);
1989         wr32(E1000_WUC, 0);
1990
1991         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1992                 /* need to resetup here after media swap */
1993                 adapter->ei.get_invariants(hw);
1994                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
1995         }
1996         if ((mac->type == e1000_82575) &&
1997             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
1998                 igb_enable_mas(adapter);
1999         }
2000         if (hw->mac.ops.init_hw(hw))
2001                 dev_err(&pdev->dev, "Hardware Error\n");
2002
2003         /* RAR registers were cleared during init_hw, clear mac table */
2004         igb_flush_mac_table(adapter);
2005         __dev_uc_unsync(adapter->netdev, NULL);
2006
2007         /* Recover default RAR entry */
2008         igb_set_default_mac_filter(adapter);
2009
2010         /* Flow control settings reset on hardware reset, so guarantee flow
2011          * control is off when forcing speed.
2012          */
2013         if (!hw->mac.autoneg)
2014                 igb_force_mac_fc(hw);
2015
2016         igb_init_dmac(adapter, pba);
2017 #ifdef CONFIG_IGB_HWMON
2018         /* Re-initialize the thermal sensor on i350 devices. */
2019         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2020                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2021                         /* If present, re-initialize the external thermal sensor
2022                          * interface.
2023                          */
2024                         if (adapter->ets)
2025                                 mac->ops.init_thermal_sensor_thresh(hw);
2026                 }
2027         }
2028 #endif
2029         /* Re-establish EEE setting */
2030         if (hw->phy.media_type == e1000_media_type_copper) {
2031                 switch (mac->type) {
2032                 case e1000_i350:
2033                 case e1000_i210:
2034                 case e1000_i211:
2035                         igb_set_eee_i350(hw, true, true);
2036                         break;
2037                 case e1000_i354:
2038                         igb_set_eee_i354(hw, true, true);
2039                         break;
2040                 default:
2041                         break;
2042                 }
2043         }
2044         if (!netif_running(adapter->netdev))
2045                 igb_power_down_link(adapter);
2046
2047         igb_update_mng_vlan(adapter);
2048
2049         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2050         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2051
2052         /* Re-enable PTP, where applicable. */
2053         if (adapter->ptp_flags & IGB_PTP_ENABLED)
2054                 igb_ptp_reset(adapter);
2055
2056         igb_get_phy_info(hw);
2057 }
2058
2059 static netdev_features_t igb_fix_features(struct net_device *netdev,
2060         netdev_features_t features)
2061 {
2062         /* Since there is no support for separate Rx/Tx vlan accel
2063          * enable/disable make sure Tx flag is always in same state as Rx.
2064          */
2065         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2066                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2067         else
2068                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2069
2070         return features;
2071 }
2072
2073 static int igb_set_features(struct net_device *netdev,
2074         netdev_features_t features)
2075 {
2076         netdev_features_t changed = netdev->features ^ features;
2077         struct igb_adapter *adapter = netdev_priv(netdev);
2078
2079         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2080                 igb_vlan_mode(netdev, features);
2081
2082         if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2083                 return 0;
2084
2085         if (!(features & NETIF_F_NTUPLE)) {
2086                 struct hlist_node *node2;
2087                 struct igb_nfc_filter *rule;
2088
2089                 spin_lock(&adapter->nfc_lock);
2090                 hlist_for_each_entry_safe(rule, node2,
2091                                           &adapter->nfc_filter_list, nfc_node) {
2092                         igb_erase_filter(adapter, rule);
2093                         hlist_del(&rule->nfc_node);
2094                         kfree(rule);
2095                 }
2096                 spin_unlock(&adapter->nfc_lock);
2097                 adapter->nfc_filter_count = 0;
2098         }
2099
2100         netdev->features = features;
2101
2102         if (netif_running(netdev))
2103                 igb_reinit_locked(adapter);
2104         else
2105                 igb_reset(adapter);
2106
2107         return 0;
2108 }
2109
2110 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2111                            struct net_device *dev,
2112                            const unsigned char *addr, u16 vid,
2113                            u16 flags)
2114 {
2115         /* guarantee we can provide a unique filter for the unicast address */
2116         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2117                 struct igb_adapter *adapter = netdev_priv(dev);
2118                 int vfn = adapter->vfs_allocated_count;
2119
2120                 if (netdev_uc_count(dev) >= igb_available_rars(adapter, vfn))
2121                         return -ENOMEM;
2122         }
2123
2124         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2125 }
2126
2127 #define IGB_MAX_MAC_HDR_LEN     127
2128 #define IGB_MAX_NETWORK_HDR_LEN 511
2129
2130 static netdev_features_t
2131 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2132                    netdev_features_t features)
2133 {
2134         unsigned int network_hdr_len, mac_hdr_len;
2135
2136         /* Make certain the headers can be described by a context descriptor */
2137         mac_hdr_len = skb_network_header(skb) - skb->data;
2138         if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2139                 return features & ~(NETIF_F_HW_CSUM |
2140                                     NETIF_F_SCTP_CRC |
2141                                     NETIF_F_HW_VLAN_CTAG_TX |
2142                                     NETIF_F_TSO |
2143                                     NETIF_F_TSO6);
2144
2145         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2146         if (unlikely(network_hdr_len >  IGB_MAX_NETWORK_HDR_LEN))
2147                 return features & ~(NETIF_F_HW_CSUM |
2148                                     NETIF_F_SCTP_CRC |
2149                                     NETIF_F_TSO |
2150                                     NETIF_F_TSO6);
2151
2152         /* We can only support IPV4 TSO in tunnels if we can mangle the
2153          * inner IP ID field, so strip TSO if MANGLEID is not supported.
2154          */
2155         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2156                 features &= ~NETIF_F_TSO;
2157
2158         return features;
2159 }
2160
2161 static const struct net_device_ops igb_netdev_ops = {
2162         .ndo_open               = igb_open,
2163         .ndo_stop               = igb_close,
2164         .ndo_start_xmit         = igb_xmit_frame,
2165         .ndo_get_stats64        = igb_get_stats64,
2166         .ndo_set_rx_mode        = igb_set_rx_mode,
2167         .ndo_set_mac_address    = igb_set_mac,
2168         .ndo_change_mtu         = igb_change_mtu,
2169         .ndo_do_ioctl           = igb_ioctl,
2170         .ndo_tx_timeout         = igb_tx_timeout,
2171         .ndo_validate_addr      = eth_validate_addr,
2172         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2173         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2174         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2175         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2176         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2177         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2178         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2179 #ifdef CONFIG_NET_POLL_CONTROLLER
2180         .ndo_poll_controller    = igb_netpoll,
2181 #endif
2182         .ndo_fix_features       = igb_fix_features,
2183         .ndo_set_features       = igb_set_features,
2184         .ndo_fdb_add            = igb_ndo_fdb_add,
2185         .ndo_features_check     = igb_features_check,
2186 };
2187
2188 /**
2189  * igb_set_fw_version - Configure version string for ethtool
2190  * @adapter: adapter struct
2191  **/
2192 void igb_set_fw_version(struct igb_adapter *adapter)
2193 {
2194         struct e1000_hw *hw = &adapter->hw;
2195         struct e1000_fw_version fw;
2196
2197         igb_get_fw_version(hw, &fw);
2198
2199         switch (hw->mac.type) {
2200         case e1000_i210:
2201         case e1000_i211:
2202                 if (!(igb_get_flash_presence_i210(hw))) {
2203                         snprintf(adapter->fw_version,
2204                                  sizeof(adapter->fw_version),
2205                                  "%2d.%2d-%d",
2206                                  fw.invm_major, fw.invm_minor,
2207                                  fw.invm_img_type);
2208                         break;
2209                 }
2210                 /* fall through */
2211         default:
2212                 /* if option is rom valid, display its version too */
2213                 if (fw.or_valid) {
2214                         snprintf(adapter->fw_version,
2215                                  sizeof(adapter->fw_version),
2216                                  "%d.%d, 0x%08x, %d.%d.%d",
2217                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2218                                  fw.or_major, fw.or_build, fw.or_patch);
2219                 /* no option rom */
2220                 } else if (fw.etrack_id != 0X0000) {
2221                         snprintf(adapter->fw_version,
2222                             sizeof(adapter->fw_version),
2223                             "%d.%d, 0x%08x",
2224                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2225                 } else {
2226                 snprintf(adapter->fw_version,
2227                     sizeof(adapter->fw_version),
2228                     "%d.%d.%d",
2229                     fw.eep_major, fw.eep_minor, fw.eep_build);
2230                 }
2231                 break;
2232         }
2233 }
2234
2235 /**
2236  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2237  *
2238  * @adapter: adapter struct
2239  **/
2240 static void igb_init_mas(struct igb_adapter *adapter)
2241 {
2242         struct e1000_hw *hw = &adapter->hw;
2243         u16 eeprom_data;
2244
2245         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2246         switch (hw->bus.func) {
2247         case E1000_FUNC_0:
2248                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2249                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2250                         netdev_info(adapter->netdev,
2251                                 "MAS: Enabling Media Autosense for port %d\n",
2252                                 hw->bus.func);
2253                 }
2254                 break;
2255         case E1000_FUNC_1:
2256                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2257                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2258                         netdev_info(adapter->netdev,
2259                                 "MAS: Enabling Media Autosense for port %d\n",
2260                                 hw->bus.func);
2261                 }
2262                 break;
2263         case E1000_FUNC_2:
2264                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2265                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2266                         netdev_info(adapter->netdev,
2267                                 "MAS: Enabling Media Autosense for port %d\n",
2268                                 hw->bus.func);
2269                 }
2270                 break;
2271         case E1000_FUNC_3:
2272                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2273                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2274                         netdev_info(adapter->netdev,
2275                                 "MAS: Enabling Media Autosense for port %d\n",
2276                                 hw->bus.func);
2277                 }
2278                 break;
2279         default:
2280                 /* Shouldn't get here */
2281                 netdev_err(adapter->netdev,
2282                         "MAS: Invalid port configuration, returning\n");
2283                 break;
2284         }
2285 }
2286
2287 /**
2288  *  igb_init_i2c - Init I2C interface
2289  *  @adapter: pointer to adapter structure
2290  **/
2291 static s32 igb_init_i2c(struct igb_adapter *adapter)
2292 {
2293         s32 status = 0;
2294
2295         /* I2C interface supported on i350 devices */
2296         if (adapter->hw.mac.type != e1000_i350)
2297                 return 0;
2298
2299         /* Initialize the i2c bus which is controlled by the registers.
2300          * This bus will use the i2c_algo_bit structue that implements
2301          * the protocol through toggling of the 4 bits in the register.
2302          */
2303         adapter->i2c_adap.owner = THIS_MODULE;
2304         adapter->i2c_algo = igb_i2c_algo;
2305         adapter->i2c_algo.data = adapter;
2306         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
2307         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
2308         strlcpy(adapter->i2c_adap.name, "igb BB",
2309                 sizeof(adapter->i2c_adap.name));
2310         status = i2c_bit_add_bus(&adapter->i2c_adap);
2311         return status;
2312 }
2313
2314 /**
2315  *  igb_probe - Device Initialization Routine
2316  *  @pdev: PCI device information struct
2317  *  @ent: entry in igb_pci_tbl
2318  *
2319  *  Returns 0 on success, negative on failure
2320  *
2321  *  igb_probe initializes an adapter identified by a pci_dev structure.
2322  *  The OS initialization, configuring of the adapter private structure,
2323  *  and a hardware reset occur.
2324  **/
2325 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2326 {
2327         struct net_device *netdev;
2328         struct igb_adapter *adapter;
2329         struct e1000_hw *hw;
2330         u16 eeprom_data = 0;
2331         s32 ret_val;
2332         static int global_quad_port_a; /* global quad port a indication */
2333         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2334         int err, pci_using_dac;
2335         u8 part_str[E1000_PBANUM_LENGTH];
2336
2337         /* Catch broken hardware that put the wrong VF device ID in
2338          * the PCIe SR-IOV capability.
2339          */
2340         if (pdev->is_virtfn) {
2341                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2342                         pci_name(pdev), pdev->vendor, pdev->device);
2343                 return -EINVAL;
2344         }
2345
2346         err = pci_enable_device_mem(pdev);
2347         if (err)
2348                 return err;
2349
2350         pci_using_dac = 0;
2351         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2352         if (!err) {
2353                 pci_using_dac = 1;
2354         } else {
2355                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2356                 if (err) {
2357                         dev_err(&pdev->dev,
2358                                 "No usable DMA configuration, aborting\n");
2359                         goto err_dma;
2360                 }
2361         }
2362
2363         err = pci_request_mem_regions(pdev, igb_driver_name);
2364         if (err)
2365                 goto err_pci_reg;
2366
2367         pci_enable_pcie_error_reporting(pdev);
2368
2369         pci_set_master(pdev);
2370         pci_save_state(pdev);
2371
2372         err = -ENOMEM;
2373         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2374                                    IGB_MAX_TX_QUEUES);
2375         if (!netdev)
2376                 goto err_alloc_etherdev;
2377
2378         SET_NETDEV_DEV(netdev, &pdev->dev);
2379
2380         pci_set_drvdata(pdev, netdev);
2381         adapter = netdev_priv(netdev);
2382         adapter->netdev = netdev;
2383         adapter->pdev = pdev;
2384         hw = &adapter->hw;
2385         hw->back = adapter;
2386         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2387
2388         err = -EIO;
2389         adapter->io_addr = pci_iomap(pdev, 0, 0);
2390         if (!adapter->io_addr)
2391                 goto err_ioremap;
2392         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
2393         hw->hw_addr = adapter->io_addr;
2394
2395         netdev->netdev_ops = &igb_netdev_ops;
2396         igb_set_ethtool_ops(netdev);
2397         netdev->watchdog_timeo = 5 * HZ;
2398
2399         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2400
2401         netdev->mem_start = pci_resource_start(pdev, 0);
2402         netdev->mem_end = pci_resource_end(pdev, 0);
2403
2404         /* PCI config space info */
2405         hw->vendor_id = pdev->vendor;
2406         hw->device_id = pdev->device;
2407         hw->revision_id = pdev->revision;
2408         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2409         hw->subsystem_device_id = pdev->subsystem_device;
2410
2411         /* Copy the default MAC, PHY and NVM function pointers */
2412         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2413         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2414         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2415         /* Initialize skew-specific constants */
2416         err = ei->get_invariants(hw);
2417         if (err)
2418                 goto err_sw_init;
2419
2420         /* setup the private structure */
2421         err = igb_sw_init(adapter);
2422         if (err)
2423                 goto err_sw_init;
2424
2425         igb_get_bus_info_pcie(hw);
2426
2427         hw->phy.autoneg_wait_to_complete = false;
2428
2429         /* Copper options */
2430         if (hw->phy.media_type == e1000_media_type_copper) {
2431                 hw->phy.mdix = AUTO_ALL_MODES;
2432                 hw->phy.disable_polarity_correction = false;
2433                 hw->phy.ms_type = e1000_ms_hw_default;
2434         }
2435
2436         if (igb_check_reset_block(hw))
2437                 dev_info(&pdev->dev,
2438                         "PHY reset is blocked due to SOL/IDER session.\n");
2439
2440         /* features is initialized to 0 in allocation, it might have bits
2441          * set by igb_sw_init so we should use an or instead of an
2442          * assignment.
2443          */
2444         netdev->features |= NETIF_F_SG |
2445                             NETIF_F_TSO |
2446                             NETIF_F_TSO6 |
2447                             NETIF_F_RXHASH |
2448                             NETIF_F_RXCSUM |
2449                             NETIF_F_HW_CSUM;
2450
2451         if (hw->mac.type >= e1000_82576)
2452                 netdev->features |= NETIF_F_SCTP_CRC;
2453
2454 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
2455                                   NETIF_F_GSO_GRE_CSUM | \
2456                                   NETIF_F_GSO_IPXIP4 | \
2457                                   NETIF_F_GSO_IPXIP6 | \
2458                                   NETIF_F_GSO_UDP_TUNNEL | \
2459                                   NETIF_F_GSO_UDP_TUNNEL_CSUM)
2460
2461         netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
2462         netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
2463
2464         /* copy netdev features into list of user selectable features */
2465         netdev->hw_features |= netdev->features |
2466                                NETIF_F_HW_VLAN_CTAG_RX |
2467                                NETIF_F_HW_VLAN_CTAG_TX |
2468                                NETIF_F_RXALL;
2469
2470         if (hw->mac.type >= e1000_i350)
2471                 netdev->hw_features |= NETIF_F_NTUPLE;
2472
2473         if (pci_using_dac)
2474                 netdev->features |= NETIF_F_HIGHDMA;
2475
2476         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
2477         netdev->mpls_features |= NETIF_F_HW_CSUM;
2478         netdev->hw_enc_features |= netdev->vlan_features;
2479
2480         /* set this bit last since it cannot be part of vlan_features */
2481         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
2482                             NETIF_F_HW_VLAN_CTAG_RX |
2483                             NETIF_F_HW_VLAN_CTAG_TX;
2484
2485         netdev->priv_flags |= IFF_SUPP_NOFCS;
2486
2487         netdev->priv_flags |= IFF_UNICAST_FLT;
2488
2489         /* MTU range: 68 - 9216 */
2490         netdev->min_mtu = ETH_MIN_MTU;
2491         netdev->max_mtu = MAX_STD_JUMBO_FRAME_SIZE;
2492
2493         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2494
2495         /* before reading the NVM, reset the controller to put the device in a
2496          * known good starting state
2497          */
2498         hw->mac.ops.reset_hw(hw);
2499
2500         /* make sure the NVM is good , i211/i210 parts can have special NVM
2501          * that doesn't contain a checksum
2502          */
2503         switch (hw->mac.type) {
2504         case e1000_i210:
2505         case e1000_i211:
2506                 if (igb_get_flash_presence_i210(hw)) {
2507                         if (hw->nvm.ops.validate(hw) < 0) {
2508                                 dev_err(&pdev->dev,
2509                                         "The NVM Checksum Is Not Valid\n");
2510                                 err = -EIO;
2511                                 goto err_eeprom;
2512                         }
2513                 }
2514                 break;
2515         default:
2516                 if (hw->nvm.ops.validate(hw) < 0) {
2517                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2518                         err = -EIO;
2519                         goto err_eeprom;
2520                 }
2521                 break;
2522         }
2523
2524         if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
2525                 /* copy the MAC address out of the NVM */
2526                 if (hw->mac.ops.read_mac_addr(hw))
2527                         dev_err(&pdev->dev, "NVM Read Error\n");
2528         }
2529
2530         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2531
2532         if (!is_valid_ether_addr(netdev->dev_addr)) {
2533                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2534                 err = -EIO;
2535                 goto err_eeprom;
2536         }
2537
2538         igb_set_default_mac_filter(adapter);
2539
2540         /* get firmware version for ethtool -i */
2541         igb_set_fw_version(adapter);
2542
2543         /* configure RXPBSIZE and TXPBSIZE */
2544         if (hw->mac.type == e1000_i210) {
2545                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
2546                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
2547         }
2548
2549         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2550                     (unsigned long) adapter);
2551         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2552                     (unsigned long) adapter);
2553
2554         INIT_WORK(&adapter->reset_task, igb_reset_task);
2555         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2556
2557         /* Initialize link properties that are user-changeable */
2558         adapter->fc_autoneg = true;
2559         hw->mac.autoneg = true;
2560         hw->phy.autoneg_advertised = 0x2f;
2561
2562         hw->fc.requested_mode = e1000_fc_default;
2563         hw->fc.current_mode = e1000_fc_default;
2564
2565         igb_validate_mdi_setting(hw);
2566
2567         /* By default, support wake on port A */
2568         if (hw->bus.func == 0)
2569                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2570
2571         /* Check the NVM for wake support on non-port A ports */
2572         if (hw->mac.type >= e1000_82580)
2573                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2574                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2575                                  &eeprom_data);
2576         else if (hw->bus.func == 1)
2577                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2578
2579         if (eeprom_data & IGB_EEPROM_APME)
2580                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2581
2582         /* now that we have the eeprom settings, apply the special cases where
2583          * the eeprom may be wrong or the board simply won't support wake on
2584          * lan on a particular port
2585          */
2586         switch (pdev->device) {
2587         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2588                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2589                 break;
2590         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2591         case E1000_DEV_ID_82576_FIBER:
2592         case E1000_DEV_ID_82576_SERDES:
2593                 /* Wake events only supported on port A for dual fiber
2594                  * regardless of eeprom setting
2595                  */
2596                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2597                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2598                 break;
2599         case E1000_DEV_ID_82576_QUAD_COPPER:
2600         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2601                 /* if quad port adapter, disable WoL on all but port A */
2602                 if (global_quad_port_a != 0)
2603                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2604                 else
2605                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2606                 /* Reset for multiple quad port adapters */
2607                 if (++global_quad_port_a == 4)
2608                         global_quad_port_a = 0;
2609                 break;
2610         default:
2611                 /* If the device can't wake, don't set software support */
2612                 if (!device_can_wakeup(&adapter->pdev->dev))
2613                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2614         }
2615
2616         /* initialize the wol settings based on the eeprom settings */
2617         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2618                 adapter->wol |= E1000_WUFC_MAG;
2619
2620         /* Some vendors want WoL disabled by default, but still supported */
2621         if ((hw->mac.type == e1000_i350) &&
2622             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2623                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2624                 adapter->wol = 0;
2625         }
2626
2627         /* Some vendors want the ability to Use the EEPROM setting as
2628          * enable/disable only, and not for capability
2629          */
2630         if (((hw->mac.type == e1000_i350) ||
2631              (hw->mac.type == e1000_i354)) &&
2632             (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
2633                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2634                 adapter->wol = 0;
2635         }
2636         if (hw->mac.type == e1000_i350) {
2637                 if (((pdev->subsystem_device == 0x5001) ||
2638                      (pdev->subsystem_device == 0x5002)) &&
2639                                 (hw->bus.func == 0)) {
2640                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2641                         adapter->wol = 0;
2642                 }
2643                 if (pdev->subsystem_device == 0x1F52)
2644                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2645         }
2646
2647         device_set_wakeup_enable(&adapter->pdev->dev,
2648                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2649
2650         /* reset the hardware with the new settings */
2651         igb_reset(adapter);
2652
2653         /* Init the I2C interface */
2654         err = igb_init_i2c(adapter);
2655         if (err) {
2656                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2657                 goto err_eeprom;
2658         }
2659
2660         /* let the f/w know that the h/w is now under the control of the
2661          * driver.
2662          */
2663         igb_get_hw_control(adapter);
2664
2665         strcpy(netdev->name, "eth%d");
2666         err = register_netdev(netdev);
2667         if (err)
2668                 goto err_register;
2669
2670         /* carrier off reporting is important to ethtool even BEFORE open */
2671         netif_carrier_off(netdev);
2672
2673 #ifdef CONFIG_IGB_DCA
2674         if (dca_add_requester(&pdev->dev) == 0) {
2675                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2676                 dev_info(&pdev->dev, "DCA enabled\n");
2677                 igb_setup_dca(adapter);
2678         }
2679
2680 #endif
2681 #ifdef CONFIG_IGB_HWMON
2682         /* Initialize the thermal sensor on i350 devices. */
2683         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2684                 u16 ets_word;
2685
2686                 /* Read the NVM to determine if this i350 device supports an
2687                  * external thermal sensor.
2688                  */
2689                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2690                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2691                         adapter->ets = true;
2692                 else
2693                         adapter->ets = false;
2694                 if (igb_sysfs_init(adapter))
2695                         dev_err(&pdev->dev,
2696                                 "failed to allocate sysfs resources\n");
2697         } else {
2698                 adapter->ets = false;
2699         }
2700 #endif
2701         /* Check if Media Autosense is enabled */
2702         adapter->ei = *ei;
2703         if (hw->dev_spec._82575.mas_capable)
2704                 igb_init_mas(adapter);
2705
2706         /* do hw tstamp init after resetting */
2707         igb_ptp_init(adapter);
2708
2709         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2710         /* print bus type/speed/width info, not applicable to i354 */
2711         if (hw->mac.type != e1000_i354) {
2712                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2713                          netdev->name,
2714                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2715                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2716                            "unknown"),
2717                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2718                           "Width x4" :
2719                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
2720                           "Width x2" :
2721                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
2722                           "Width x1" : "unknown"), netdev->dev_addr);
2723         }
2724
2725         if ((hw->mac.type >= e1000_i210 ||
2726              igb_get_flash_presence_i210(hw))) {
2727                 ret_val = igb_read_part_string(hw, part_str,
2728                                                E1000_PBANUM_LENGTH);
2729         } else {
2730                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
2731         }
2732
2733         if (ret_val)
2734                 strcpy(part_str, "Unknown");
2735         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2736         dev_info(&pdev->dev,
2737                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2738                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
2739                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2740                 adapter->num_rx_queues, adapter->num_tx_queues);
2741         if (hw->phy.media_type == e1000_media_type_copper) {
2742                 switch (hw->mac.type) {
2743                 case e1000_i350:
2744                 case e1000_i210:
2745                 case e1000_i211:
2746                         /* Enable EEE for internal copper PHY devices */
2747                         err = igb_set_eee_i350(hw, true, true);
2748                         if ((!err) &&
2749                             (!hw->dev_spec._82575.eee_disable)) {
2750                                 adapter->eee_advert =
2751                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2752                                 adapter->flags |= IGB_FLAG_EEE;
2753                         }
2754                         break;
2755                 case e1000_i354:
2756                         if ((rd32(E1000_CTRL_EXT) &
2757                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2758                                 err = igb_set_eee_i354(hw, true, true);
2759                                 if ((!err) &&
2760                                         (!hw->dev_spec._82575.eee_disable)) {
2761                                         adapter->eee_advert =
2762                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2763                                         adapter->flags |= IGB_FLAG_EEE;
2764                                 }
2765                         }
2766                         break;
2767                 default:
2768                         break;
2769                 }
2770         }
2771         pm_runtime_put_noidle(&pdev->dev);
2772         return 0;
2773
2774 err_register:
2775         igb_release_hw_control(adapter);
2776         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2777 err_eeprom:
2778         if (!igb_check_reset_block(hw))
2779                 igb_reset_phy(hw);
2780
2781         if (hw->flash_address)
2782                 iounmap(hw->flash_address);
2783 err_sw_init:
2784         kfree(adapter->mac_table);
2785         kfree(adapter->shadow_vfta);
2786         igb_clear_interrupt_scheme(adapter);
2787 #ifdef CONFIG_PCI_IOV
2788         igb_disable_sriov(pdev);
2789 #endif
2790         pci_iounmap(pdev, adapter->io_addr);
2791 err_ioremap:
2792         free_netdev(netdev);
2793 err_alloc_etherdev:
2794         pci_disable_pcie_error_reporting(pdev);
2795         pci_release_mem_regions(pdev);
2796 err_pci_reg:
2797 err_dma:
2798         pci_disable_device(pdev);
2799         return err;
2800 }
2801
2802 #ifdef CONFIG_PCI_IOV
2803 static int igb_disable_sriov(struct pci_dev *pdev)
2804 {
2805         struct net_device *netdev = pci_get_drvdata(pdev);
2806         struct igb_adapter *adapter = netdev_priv(netdev);
2807         struct e1000_hw *hw = &adapter->hw;
2808
2809         /* reclaim resources allocated to VFs */
2810         if (adapter->vf_data) {
2811                 /* disable iov and allow time for transactions to clear */
2812                 if (pci_vfs_assigned(pdev)) {
2813                         dev_warn(&pdev->dev,
2814                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2815                         return -EPERM;
2816                 } else {
2817                         pci_disable_sriov(pdev);
2818                         msleep(500);
2819                 }
2820
2821                 kfree(adapter->vf_mac_list);
2822                 adapter->vf_mac_list = NULL;
2823                 kfree(adapter->vf_data);
2824                 adapter->vf_data = NULL;
2825                 adapter->vfs_allocated_count = 0;
2826                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2827                 wrfl();
2828                 msleep(100);
2829                 dev_info(&pdev->dev, "IOV Disabled\n");
2830
2831                 /* Re-enable DMA Coalescing flag since IOV is turned off */
2832                 adapter->flags |= IGB_FLAG_DMAC;
2833         }
2834
2835         return 0;
2836 }
2837
2838 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2839 {
2840         struct net_device *netdev = pci_get_drvdata(pdev);
2841         struct igb_adapter *adapter = netdev_priv(netdev);
2842         int old_vfs = pci_num_vf(pdev);
2843         struct vf_mac_filter *mac_list;
2844         int err = 0;
2845         int num_vf_mac_filters, i;
2846
2847         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
2848                 err = -EPERM;
2849                 goto out;
2850         }
2851         if (!num_vfs)
2852                 goto out;
2853
2854         if (old_vfs) {
2855                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2856                          old_vfs, max_vfs);
2857                 adapter->vfs_allocated_count = old_vfs;
2858         } else
2859                 adapter->vfs_allocated_count = num_vfs;
2860
2861         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2862                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2863
2864         /* if allocation failed then we do not support SR-IOV */
2865         if (!adapter->vf_data) {
2866                 adapter->vfs_allocated_count = 0;
2867                 dev_err(&pdev->dev,
2868                         "Unable to allocate memory for VF Data Storage\n");
2869                 err = -ENOMEM;
2870                 goto out;
2871         }
2872
2873         /* Due to the limited number of RAR entries calculate potential
2874          * number of MAC filters available for the VFs. Reserve entries
2875          * for PF default MAC, PF MAC filters and at least one RAR entry
2876          * for each VF for VF MAC.
2877          */
2878         num_vf_mac_filters = adapter->hw.mac.rar_entry_count -
2879                              (1 + IGB_PF_MAC_FILTERS_RESERVED +
2880                               adapter->vfs_allocated_count);
2881
2882         adapter->vf_mac_list = kcalloc(num_vf_mac_filters,
2883                                        sizeof(struct vf_mac_filter),
2884                                        GFP_KERNEL);
2885
2886         mac_list = adapter->vf_mac_list;
2887         INIT_LIST_HEAD(&adapter->vf_macs.l);
2888
2889         if (adapter->vf_mac_list) {
2890                 /* Initialize list of VF MAC filters */
2891                 for (i = 0; i < num_vf_mac_filters; i++) {
2892                         mac_list->vf = -1;
2893                         mac_list->free = true;
2894                         list_add(&mac_list->l, &adapter->vf_macs.l);
2895                         mac_list++;
2896                 }
2897         } else {
2898                 /* If we could not allocate memory for the VF MAC filters
2899                  * we can continue without this feature but warn user.
2900                  */
2901                 dev_err(&pdev->dev,
2902                         "Unable to allocate memory for VF MAC filter list\n");
2903         }
2904
2905         /* only call pci_enable_sriov() if no VFs are allocated already */
2906         if (!old_vfs) {
2907                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2908                 if (err)
2909                         goto err_out;
2910         }
2911         dev_info(&pdev->dev, "%d VFs allocated\n",
2912                  adapter->vfs_allocated_count);
2913         for (i = 0; i < adapter->vfs_allocated_count; i++)
2914                 igb_vf_configure(adapter, i);
2915
2916         /* DMA Coalescing is not supported in IOV mode. */
2917         adapter->flags &= ~IGB_FLAG_DMAC;
2918         goto out;
2919
2920 err_out:
2921         kfree(adapter->vf_mac_list);
2922         adapter->vf_mac_list = NULL;
2923         kfree(adapter->vf_data);
2924         adapter->vf_data = NULL;
2925         adapter->vfs_allocated_count = 0;
2926 out:
2927         return err;
2928 }
2929
2930 #endif
2931 /**
2932  *  igb_remove_i2c - Cleanup  I2C interface
2933  *  @adapter: pointer to adapter structure
2934  **/
2935 static void igb_remove_i2c(struct igb_adapter *adapter)
2936 {
2937         /* free the adapter bus structure */
2938         i2c_del_adapter(&adapter->i2c_adap);
2939 }
2940
2941 /**
2942  *  igb_remove - Device Removal Routine
2943  *  @pdev: PCI device information struct
2944  *
2945  *  igb_remove is called by the PCI subsystem to alert the driver
2946  *  that it should release a PCI device.  The could be caused by a
2947  *  Hot-Plug event, or because the driver is going to be removed from
2948  *  memory.
2949  **/
2950 static void igb_remove(struct pci_dev *pdev)
2951 {
2952         struct net_device *netdev = pci_get_drvdata(pdev);
2953         struct igb_adapter *adapter = netdev_priv(netdev);
2954         struct e1000_hw *hw = &adapter->hw;
2955
2956         pm_runtime_get_noresume(&pdev->dev);
2957 #ifdef CONFIG_IGB_HWMON
2958         igb_sysfs_exit(adapter);
2959 #endif
2960         igb_remove_i2c(adapter);
2961         igb_ptp_stop(adapter);
2962         /* The watchdog timer may be rescheduled, so explicitly
2963          * disable watchdog from being rescheduled.
2964          */
2965         set_bit(__IGB_DOWN, &adapter->state);
2966         del_timer_sync(&adapter->watchdog_timer);
2967         del_timer_sync(&adapter->phy_info_timer);
2968
2969         cancel_work_sync(&adapter->reset_task);
2970         cancel_work_sync(&adapter->watchdog_task);
2971
2972 #ifdef CONFIG_IGB_DCA
2973         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2974                 dev_info(&pdev->dev, "DCA disabled\n");
2975                 dca_remove_requester(&pdev->dev);
2976                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2977                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2978         }
2979 #endif
2980
2981         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2982          * would have already happened in close and is redundant.
2983          */
2984         igb_release_hw_control(adapter);
2985
2986 #ifdef CONFIG_PCI_IOV
2987         igb_disable_sriov(pdev);
2988 #endif
2989
2990         unregister_netdev(netdev);
2991
2992         igb_clear_interrupt_scheme(adapter);
2993
2994         pci_iounmap(pdev, adapter->io_addr);
2995         if (hw->flash_address)
2996                 iounmap(hw->flash_address);
2997         pci_release_mem_regions(pdev);
2998
2999         kfree(adapter->mac_table);
3000         kfree(adapter->shadow_vfta);
3001         free_netdev(netdev);
3002
3003         pci_disable_pcie_error_reporting(pdev);
3004
3005         pci_disable_device(pdev);
3006 }
3007
3008 /**
3009  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
3010  *  @adapter: board private structure to initialize
3011  *
3012  *  This function initializes the vf specific data storage and then attempts to
3013  *  allocate the VFs.  The reason for ordering it this way is because it is much
3014  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
3015  *  the memory for the VFs.
3016  **/
3017 static void igb_probe_vfs(struct igb_adapter *adapter)
3018 {
3019 #ifdef CONFIG_PCI_IOV
3020         struct pci_dev *pdev = adapter->pdev;
3021         struct e1000_hw *hw = &adapter->hw;
3022
3023         /* Virtualization features not supported on i210 family. */
3024         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
3025                 return;
3026
3027         /* Of the below we really only want the effect of getting
3028          * IGB_FLAG_HAS_MSIX set (if available), without which
3029          * igb_enable_sriov() has no effect.
3030          */
3031         igb_set_interrupt_capability(adapter, true);
3032         igb_reset_interrupt_capability(adapter);
3033
3034         pci_sriov_set_totalvfs(pdev, 7);
3035         igb_enable_sriov(pdev, max_vfs);
3036
3037 #endif /* CONFIG_PCI_IOV */
3038 }
3039
3040 static void igb_init_queue_configuration(struct igb_adapter *adapter)
3041 {
3042         struct e1000_hw *hw = &adapter->hw;
3043         u32 max_rss_queues;
3044
3045         /* Determine the maximum number of RSS queues supported. */
3046         switch (hw->mac.type) {
3047         case e1000_i211:
3048                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
3049                 break;
3050         case e1000_82575:
3051         case e1000_i210:
3052                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
3053                 break;
3054         case e1000_i350:
3055                 /* I350 cannot do RSS and SR-IOV at the same time */
3056                 if (!!adapter->vfs_allocated_count) {
3057                         max_rss_queues = 1;
3058                         break;
3059                 }
3060                 /* fall through */
3061         case e1000_82576:
3062                 if (!!adapter->vfs_allocated_count) {
3063                         max_rss_queues = 2;
3064                         break;
3065                 }
3066                 /* fall through */
3067         case e1000_82580:
3068         case e1000_i354:
3069         default:
3070                 max_rss_queues = IGB_MAX_RX_QUEUES;
3071                 break;
3072         }
3073
3074         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
3075
3076         igb_set_flag_queue_pairs(adapter, max_rss_queues);
3077 }
3078
3079 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
3080                               const u32 max_rss_queues)
3081 {
3082         struct e1000_hw *hw = &adapter->hw;
3083
3084         /* Determine if we need to pair queues. */
3085         switch (hw->mac.type) {
3086         case e1000_82575:
3087         case e1000_i211:
3088                 /* Device supports enough interrupts without queue pairing. */
3089                 break;
3090         case e1000_82576:
3091         case e1000_82580:
3092         case e1000_i350:
3093         case e1000_i354:
3094         case e1000_i210:
3095         default:
3096                 /* If rss_queues > half of max_rss_queues, pair the queues in
3097                  * order to conserve interrupts due to limited supply.
3098                  */
3099                 if (adapter->rss_queues > (max_rss_queues / 2))
3100                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
3101                 else
3102                         adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
3103                 break;
3104         }
3105 }
3106
3107 /**
3108  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
3109  *  @adapter: board private structure to initialize
3110  *
3111  *  igb_sw_init initializes the Adapter private data structure.
3112  *  Fields are initialized based on PCI device information and
3113  *  OS network device settings (MTU size).
3114  **/
3115 static int igb_sw_init(struct igb_adapter *adapter)
3116 {
3117         struct e1000_hw *hw = &adapter->hw;
3118         struct net_device *netdev = adapter->netdev;
3119         struct pci_dev *pdev = adapter->pdev;
3120
3121         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3122
3123         /* set default ring sizes */
3124         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3125         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3126
3127         /* set default ITR values */
3128         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
3129         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
3130
3131         /* set default work limits */
3132         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3133
3134         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3135                                   VLAN_HLEN;
3136         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3137
3138         spin_lock_init(&adapter->nfc_lock);
3139         spin_lock_init(&adapter->stats64_lock);
3140 #ifdef CONFIG_PCI_IOV
3141         switch (hw->mac.type) {
3142         case e1000_82576:
3143         case e1000_i350:
3144                 if (max_vfs > 7) {
3145                         dev_warn(&pdev->dev,
3146                                  "Maximum of 7 VFs per PF, using max\n");
3147                         max_vfs = adapter->vfs_allocated_count = 7;
3148                 } else
3149                         adapter->vfs_allocated_count = max_vfs;
3150                 if (adapter->vfs_allocated_count)
3151                         dev_warn(&pdev->dev,
3152                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
3153                 break;
3154         default:
3155                 break;
3156         }
3157 #endif /* CONFIG_PCI_IOV */
3158
3159         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3160         adapter->flags |= IGB_FLAG_HAS_MSIX;
3161
3162         adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3163                                      hw->mac.rar_entry_count, GFP_ATOMIC);
3164         if (!adapter->mac_table)
3165                 return -ENOMEM;
3166
3167         igb_probe_vfs(adapter);
3168
3169         igb_init_queue_configuration(adapter);
3170
3171         /* Setup and initialize a copy of the hw vlan table array */
3172         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
3173                                        GFP_ATOMIC);
3174         if (!adapter->shadow_vfta)
3175                 return -ENOMEM;
3176
3177         /* This call may decrease the number of queues */
3178         if (igb_init_interrupt_scheme(adapter, true)) {
3179                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
3180                 return -ENOMEM;
3181         }
3182
3183         /* Explicitly disable IRQ since the NIC can be in any state. */
3184         igb_irq_disable(adapter);
3185
3186         if (hw->mac.type >= e1000_i350)
3187                 adapter->flags &= ~IGB_FLAG_DMAC;
3188
3189         set_bit(__IGB_DOWN, &adapter->state);
3190         return 0;
3191 }
3192
3193 /**
3194  *  igb_open - Called when a network interface is made active
3195  *  @netdev: network interface device structure
3196  *
3197  *  Returns 0 on success, negative value on failure
3198  *
3199  *  The open entry point is called when a network interface is made
3200  *  active by the system (IFF_UP).  At this point all resources needed
3201  *  for transmit and receive operations are allocated, the interrupt
3202  *  handler is registered with the OS, the watchdog timer is started,
3203  *  and the stack is notified that the interface is ready.
3204  **/
3205 static int __igb_open(struct net_device *netdev, bool resuming)
3206 {
3207         struct igb_adapter *adapter = netdev_priv(netdev);
3208         struct e1000_hw *hw = &adapter->hw;
3209         struct pci_dev *pdev = adapter->pdev;
3210         int err;
3211         int i;
3212
3213         /* disallow open during test */
3214         if (test_bit(__IGB_TESTING, &adapter->state)) {
3215                 WARN_ON(resuming);
3216                 return -EBUSY;
3217         }
3218
3219         if (!resuming)
3220                 pm_runtime_get_sync(&pdev->dev);
3221
3222         netif_carrier_off(netdev);
3223
3224         /* allocate transmit descriptors */
3225         err = igb_setup_all_tx_resources(adapter);
3226         if (err)
3227                 goto err_setup_tx;
3228
3229         /* allocate receive descriptors */
3230         err = igb_setup_all_rx_resources(adapter);
3231         if (err)
3232                 goto err_setup_rx;
3233
3234         igb_power_up_link(adapter);
3235
3236         /* before we allocate an interrupt, we must be ready to handle it.
3237          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3238          * as soon as we call pci_request_irq, so we have to setup our
3239          * clean_rx handler before we do so.
3240          */
3241         igb_configure(adapter);
3242
3243         err = igb_request_irq(adapter);
3244         if (err)
3245                 goto err_req_irq;
3246
3247         /* Notify the stack of the actual queue counts. */
3248         err = netif_set_real_num_tx_queues(adapter->netdev,
3249                                            adapter->num_tx_queues);
3250         if (err)
3251                 goto err_set_queues;
3252
3253         err = netif_set_real_num_rx_queues(adapter->netdev,
3254                                            adapter->num_rx_queues);
3255         if (err)
3256                 goto err_set_queues;
3257
3258         /* From here on the code is the same as igb_up() */
3259         clear_bit(__IGB_DOWN, &adapter->state);
3260
3261         for (i = 0; i < adapter->num_q_vectors; i++)
3262                 napi_enable(&(adapter->q_vector[i]->napi));
3263
3264         /* Clear any pending interrupts. */
3265         rd32(E1000_ICR);
3266
3267         igb_irq_enable(adapter);
3268
3269         /* notify VFs that reset has been completed */
3270         if (adapter->vfs_allocated_count) {
3271                 u32 reg_data = rd32(E1000_CTRL_EXT);
3272
3273                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3274                 wr32(E1000_CTRL_EXT, reg_data);
3275         }
3276
3277         netif_tx_start_all_queues(netdev);
3278
3279         if (!resuming)
3280                 pm_runtime_put(&pdev->dev);
3281
3282         /* start the watchdog. */
3283         hw->mac.get_link_status = 1;
3284         schedule_work(&adapter->watchdog_task);
3285
3286         return 0;
3287
3288 err_set_queues:
3289         igb_free_irq(adapter);
3290 err_req_irq:
3291         igb_release_hw_control(adapter);
3292         igb_power_down_link(adapter);
3293         igb_free_all_rx_resources(adapter);
3294 err_setup_rx:
3295         igb_free_all_tx_resources(adapter);
3296 err_setup_tx:
3297         igb_reset(adapter);
3298         if (!resuming)
3299                 pm_runtime_put(&pdev->dev);
3300
3301         return err;
3302 }
3303
3304 int igb_open(struct net_device *netdev)
3305 {
3306         return __igb_open(netdev, false);
3307 }
3308
3309 /**
3310  *  igb_close - Disables a network interface
3311  *  @netdev: network interface device structure
3312  *
3313  *  Returns 0, this is not allowed to fail
3314  *
3315  *  The close entry point is called when an interface is de-activated
3316  *  by the OS.  The hardware is still under the driver's control, but
3317  *  needs to be disabled.  A global MAC reset is issued to stop the
3318  *  hardware, and all transmit and receive resources are freed.
3319  **/
3320 static int __igb_close(struct net_device *netdev, bool suspending)
3321 {
3322         struct igb_adapter *adapter = netdev_priv(netdev);
3323         struct pci_dev *pdev = adapter->pdev;
3324
3325         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3326
3327         if (!suspending)
3328                 pm_runtime_get_sync(&pdev->dev);
3329
3330         igb_down(adapter);
3331         igb_free_irq(adapter);
3332
3333         igb_free_all_tx_resources(adapter);
3334         igb_free_all_rx_resources(adapter);
3335
3336         if (!suspending)
3337                 pm_runtime_put_sync(&pdev->dev);
3338         return 0;
3339 }
3340
3341 int igb_close(struct net_device *netdev)
3342 {
3343         if (netif_device_present(netdev) || netdev->dismantle)
3344                 return __igb_close(netdev, false);
3345         return 0;
3346 }
3347
3348 /**
3349  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
3350  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
3351  *
3352  *  Return 0 on success, negative on failure
3353  **/
3354 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3355 {
3356         struct device *dev = tx_ring->dev;
3357         int size;
3358
3359         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3360
3361         tx_ring->tx_buffer_info = vmalloc(size);
3362         if (!tx_ring->tx_buffer_info)
3363                 goto err;
3364
3365         /* round up to nearest 4K */
3366         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3367         tx_ring->size = ALIGN(tx_ring->size, 4096);
3368
3369         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3370                                            &tx_ring->dma, GFP_KERNEL);
3371         if (!tx_ring->desc)
3372                 goto err;
3373
3374         tx_ring->next_to_use = 0;
3375         tx_ring->next_to_clean = 0;
3376
3377         return 0;
3378
3379 err:
3380         vfree(tx_ring->tx_buffer_info);
3381         tx_ring->tx_buffer_info = NULL;
3382         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
3383         return -ENOMEM;
3384 }
3385
3386 /**
3387  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
3388  *                               (Descriptors) for all queues
3389  *  @adapter: board private structure
3390  *
3391  *  Return 0 on success, negative on failure
3392  **/
3393 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3394 {
3395         struct pci_dev *pdev = adapter->pdev;
3396         int i, err = 0;
3397
3398         for (i = 0; i < adapter->num_tx_queues; i++) {
3399                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3400                 if (err) {
3401                         dev_err(&pdev->dev,
3402                                 "Allocation for Tx Queue %u failed\n", i);
3403                         for (i--; i >= 0; i--)
3404                                 igb_free_tx_resources(adapter->tx_ring[i]);
3405                         break;
3406                 }
3407         }
3408
3409         return err;
3410 }
3411
3412 /**
3413  *  igb_setup_tctl - configure the transmit control registers
3414  *  @adapter: Board private structure
3415  **/
3416 void igb_setup_tctl(struct igb_adapter *adapter)
3417 {
3418         struct e1000_hw *hw = &adapter->hw;
3419         u32 tctl;
3420
3421         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3422         wr32(E1000_TXDCTL(0), 0);
3423
3424         /* Program the Transmit Control Register */
3425         tctl = rd32(E1000_TCTL);
3426         tctl &= ~E1000_TCTL_CT;
3427         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3428                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3429
3430         igb_config_collision_dist(hw);
3431
3432         /* Enable transmits */
3433         tctl |= E1000_TCTL_EN;
3434
3435         wr32(E1000_TCTL, tctl);
3436 }
3437
3438 /**
3439  *  igb_configure_tx_ring - Configure transmit ring after Reset
3440  *  @adapter: board private structure
3441  *  @ring: tx ring to configure
3442  *
3443  *  Configure a transmit ring after a reset.
3444  **/
3445 void igb_configure_tx_ring(struct igb_adapter *adapter,
3446                            struct igb_ring *ring)
3447 {
3448         struct e1000_hw *hw = &adapter->hw;
3449         u32 txdctl = 0;
3450         u64 tdba = ring->dma;
3451         int reg_idx = ring->reg_idx;
3452
3453         /* disable the queue */
3454         wr32(E1000_TXDCTL(reg_idx), 0);
3455         wrfl();
3456         mdelay(10);
3457
3458         wr32(E1000_TDLEN(reg_idx),
3459              ring->count * sizeof(union e1000_adv_tx_desc));
3460         wr32(E1000_TDBAL(reg_idx),
3461              tdba & 0x00000000ffffffffULL);
3462         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3463
3464         ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
3465         wr32(E1000_TDH(reg_idx), 0);
3466         writel(0, ring->tail);
3467
3468         txdctl |= IGB_TX_PTHRESH;
3469         txdctl |= IGB_TX_HTHRESH << 8;
3470         txdctl |= IGB_TX_WTHRESH << 16;
3471
3472         /* reinitialize tx_buffer_info */
3473         memset(ring->tx_buffer_info, 0,
3474                sizeof(struct igb_tx_buffer) * ring->count);
3475
3476         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3477         wr32(E1000_TXDCTL(reg_idx), txdctl);
3478 }
3479
3480 /**
3481  *  igb_configure_tx - Configure transmit Unit after Reset
3482  *  @adapter: board private structure
3483  *
3484  *  Configure the Tx unit of the MAC after a reset.
3485  **/
3486 static void igb_configure_tx(struct igb_adapter *adapter)
3487 {
3488         int i;
3489
3490         for (i = 0; i < adapter->num_tx_queues; i++)
3491                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3492 }
3493
3494 /**
3495  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
3496  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
3497  *
3498  *  Returns 0 on success, negative on failure
3499  **/
3500 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3501 {
3502         struct device *dev = rx_ring->dev;
3503         int size;
3504
3505         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3506
3507         rx_ring->rx_buffer_info = vmalloc(size);
3508         if (!rx_ring->rx_buffer_info)
3509                 goto err;
3510
3511         /* Round up to nearest 4K */
3512         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3513         rx_ring->size = ALIGN(rx_ring->size, 4096);
3514
3515         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3516                                            &rx_ring->dma, GFP_KERNEL);
3517         if (!rx_ring->desc)
3518                 goto err;
3519
3520         rx_ring->next_to_alloc = 0;
3521         rx_ring->next_to_clean = 0;
3522         rx_ring->next_to_use = 0;
3523
3524         return 0;
3525
3526 err:
3527         vfree(rx_ring->rx_buffer_info);
3528         rx_ring->rx_buffer_info = NULL;
3529         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3530         return -ENOMEM;
3531 }
3532
3533 /**
3534  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
3535  *                               (Descriptors) for all queues
3536  *  @adapter: board private structure
3537  *
3538  *  Return 0 on success, negative on failure
3539  **/
3540 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3541 {
3542         struct pci_dev *pdev = adapter->pdev;
3543         int i, err = 0;
3544
3545         for (i = 0; i < adapter->num_rx_queues; i++) {
3546                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3547                 if (err) {
3548                         dev_err(&pdev->dev,
3549                                 "Allocation for Rx Queue %u failed\n", i);
3550                         for (i--; i >= 0; i--)
3551                                 igb_free_rx_resources(adapter->rx_ring[i]);
3552                         break;
3553                 }
3554         }
3555
3556         return err;
3557 }
3558
3559 /**
3560  *  igb_setup_mrqc - configure the multiple receive queue control registers
3561  *  @adapter: Board private structure
3562  **/
3563 static void igb_setup_mrqc(struct igb_adapter *adapter)
3564 {
3565         struct e1000_hw *hw = &adapter->hw;
3566         u32 mrqc, rxcsum;
3567         u32 j, num_rx_queues;
3568         u32 rss_key[10];
3569
3570         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3571         for (j = 0; j < 10; j++)
3572                 wr32(E1000_RSSRK(j), rss_key[j]);
3573
3574         num_rx_queues = adapter->rss_queues;
3575
3576         switch (hw->mac.type) {
3577         case e1000_82576:
3578                 /* 82576 supports 2 RSS queues for SR-IOV */
3579                 if (adapter->vfs_allocated_count)
3580                         num_rx_queues = 2;
3581                 break;
3582         default:
3583                 break;
3584         }
3585
3586         if (adapter->rss_indir_tbl_init != num_rx_queues) {
3587                 for (j = 0; j < IGB_RETA_SIZE; j++)
3588                         adapter->rss_indir_tbl[j] =
3589                         (j * num_rx_queues) / IGB_RETA_SIZE;
3590                 adapter->rss_indir_tbl_init = num_rx_queues;
3591         }
3592         igb_write_rss_indir_tbl(adapter);
3593
3594         /* Disable raw packet checksumming so that RSS hash is placed in
3595          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3596          * offloads as they are enabled by default
3597          */
3598         rxcsum = rd32(E1000_RXCSUM);
3599         rxcsum |= E1000_RXCSUM_PCSD;
3600
3601         if (adapter->hw.mac.type >= e1000_82576)
3602                 /* Enable Receive Checksum Offload for SCTP */
3603                 rxcsum |= E1000_RXCSUM_CRCOFL;
3604
3605         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3606         wr32(E1000_RXCSUM, rxcsum);
3607
3608         /* Generate RSS hash based on packet types, TCP/UDP
3609          * port numbers and/or IPv4/v6 src and dst addresses
3610          */
3611         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3612                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3613                E1000_MRQC_RSS_FIELD_IPV6 |
3614                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3615                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3616
3617         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3618                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3619         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3620                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3621
3622         /* If VMDq is enabled then we set the appropriate mode for that, else
3623          * we default to RSS so that an RSS hash is calculated per packet even
3624          * if we are only using one queue
3625          */
3626         if (adapter->vfs_allocated_count) {
3627                 if (hw->mac.type > e1000_82575) {
3628                         /* Set the default pool for the PF's first queue */
3629                         u32 vtctl = rd32(E1000_VT_CTL);
3630
3631                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3632                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3633                         vtctl |= adapter->vfs_allocated_count <<
3634                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3635                         wr32(E1000_VT_CTL, vtctl);
3636                 }
3637                 if (adapter->rss_queues > 1)
3638                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
3639                 else
3640                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3641         } else {
3642                 if (hw->mac.type != e1000_i211)
3643                         mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
3644         }
3645         igb_vmm_control(adapter);
3646
3647         wr32(E1000_MRQC, mrqc);
3648 }
3649
3650 /**
3651  *  igb_setup_rctl - configure the receive control registers
3652  *  @adapter: Board private structure
3653  **/
3654 void igb_setup_rctl(struct igb_adapter *adapter)
3655 {
3656         struct e1000_hw *hw = &adapter->hw;
3657         u32 rctl;
3658
3659         rctl = rd32(E1000_RCTL);
3660
3661         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3662         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3663
3664         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3665                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3666
3667         /* enable stripping of CRC. It's unlikely this will break BMC
3668          * redirection as it did with e1000. Newer features require
3669          * that the HW strips the CRC.
3670          */
3671         rctl |= E1000_RCTL_SECRC;
3672
3673         /* disable store bad packets and clear size bits. */
3674         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3675
3676         /* enable LPE to allow for reception of jumbo frames */
3677         rctl |= E1000_RCTL_LPE;
3678
3679         /* disable queue 0 to prevent tail write w/o re-config */
3680         wr32(E1000_RXDCTL(0), 0);
3681
3682         /* Attention!!!  For SR-IOV PF driver operations you must enable
3683          * queue drop for all VF and PF queues to prevent head of line blocking
3684          * if an un-trusted VF does not provide descriptors to hardware.
3685          */
3686         if (adapter->vfs_allocated_count) {
3687                 /* set all queue drop enable bits */
3688                 wr32(E1000_QDE, ALL_QUEUES);
3689         }
3690
3691         /* This is useful for sniffing bad packets. */
3692         if (adapter->netdev->features & NETIF_F_RXALL) {
3693                 /* UPE and MPE will be handled by normal PROMISC logic
3694                  * in e1000e_set_rx_mode
3695                  */
3696                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3697                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
3698                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3699
3700                 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
3701                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3702                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3703                  * and that breaks VLANs.
3704                  */
3705         }
3706
3707         wr32(E1000_RCTL, rctl);
3708 }
3709
3710 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3711                                    int vfn)
3712 {
3713         struct e1000_hw *hw = &adapter->hw;
3714         u32 vmolr;
3715
3716         if (size > MAX_JUMBO_FRAME_SIZE)
3717                 size = MAX_JUMBO_FRAME_SIZE;
3718
3719         vmolr = rd32(E1000_VMOLR(vfn));
3720         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3721         vmolr |= size | E1000_VMOLR_LPE;
3722         wr32(E1000_VMOLR(vfn), vmolr);
3723
3724         return 0;
3725 }
3726
3727 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3728                                          int vfn, bool enable)
3729 {
3730         struct e1000_hw *hw = &adapter->hw;
3731         u32 val, reg;
3732
3733         if (hw->mac.type < e1000_82576)
3734                 return;
3735
3736         if (hw->mac.type == e1000_i350)
3737                 reg = E1000_DVMOLR(vfn);
3738         else
3739                 reg = E1000_VMOLR(vfn);
3740
3741         val = rd32(reg);
3742         if (enable)
3743                 val |= E1000_VMOLR_STRVLAN;
3744         else
3745                 val &= ~(E1000_VMOLR_STRVLAN);
3746         wr32(reg, val);
3747 }
3748
3749 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3750                                  int vfn, bool aupe)
3751 {
3752         struct e1000_hw *hw = &adapter->hw;
3753         u32 vmolr;
3754
3755         /* This register exists only on 82576 and newer so if we are older then
3756          * we should exit and do nothing
3757          */
3758         if (hw->mac.type < e1000_82576)
3759                 return;
3760
3761         vmolr = rd32(E1000_VMOLR(vfn));
3762         if (aupe)
3763                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3764         else
3765                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3766
3767         /* clear all bits that might not be set */
3768         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3769
3770         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3771                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3772         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3773          * multicast packets
3774          */
3775         if (vfn <= adapter->vfs_allocated_count)
3776                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3777
3778         wr32(E1000_VMOLR(vfn), vmolr);
3779 }
3780
3781 /**
3782  *  igb_configure_rx_ring - Configure a receive ring after Reset
3783  *  @adapter: board private structure
3784  *  @ring: receive ring to be configured
3785  *
3786  *  Configure the Rx unit of the MAC after a reset.
3787  **/
3788 void igb_configure_rx_ring(struct igb_adapter *adapter,
3789                            struct igb_ring *ring)
3790 {
3791         struct e1000_hw *hw = &adapter->hw;
3792         union e1000_adv_rx_desc *rx_desc;
3793         u64 rdba = ring->dma;
3794         int reg_idx = ring->reg_idx;
3795         u32 srrctl = 0, rxdctl = 0;
3796
3797         /* disable the queue */
3798         wr32(E1000_RXDCTL(reg_idx), 0);
3799
3800         /* Set DMA base address registers */
3801         wr32(E1000_RDBAL(reg_idx),
3802              rdba & 0x00000000ffffffffULL);
3803         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3804         wr32(E1000_RDLEN(reg_idx),
3805              ring->count * sizeof(union e1000_adv_rx_desc));
3806
3807         /* initialize head and tail */
3808         ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
3809         wr32(E1000_RDH(reg_idx), 0);
3810         writel(0, ring->tail);
3811
3812         /* set descriptor configuration */
3813         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3814         if (ring_uses_large_buffer(ring))
3815                 srrctl |= IGB_RXBUFFER_3072 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3816         else
3817                 srrctl |= IGB_RXBUFFER_2048 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3818         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3819         if (hw->mac.type >= e1000_82580)
3820                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3821         /* Only set Drop Enable if we are supporting multiple queues */
3822         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3823                 srrctl |= E1000_SRRCTL_DROP_EN;
3824
3825         wr32(E1000_SRRCTL(reg_idx), srrctl);
3826
3827         /* set filtering for VMDQ pools */
3828         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3829
3830         rxdctl |= IGB_RX_PTHRESH;
3831         rxdctl |= IGB_RX_HTHRESH << 8;
3832         rxdctl |= IGB_RX_WTHRESH << 16;
3833
3834         /* initialize rx_buffer_info */
3835         memset(ring->rx_buffer_info, 0,
3836                sizeof(struct igb_rx_buffer) * ring->count);
3837
3838         /* initialize Rx descriptor 0 */
3839         rx_desc = IGB_RX_DESC(ring, 0);
3840         rx_desc->wb.upper.length = 0;
3841
3842         /* enable receive descriptor fetching */
3843         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3844         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3845 }
3846
3847 static void igb_set_rx_buffer_len(struct igb_adapter *adapter,
3848                                   struct igb_ring *rx_ring)
3849 {
3850         /* set build_skb and buffer size flags */
3851         clear_ring_build_skb_enabled(rx_ring);
3852         clear_ring_uses_large_buffer(rx_ring);
3853
3854         if (adapter->flags & IGB_FLAG_RX_LEGACY)
3855                 return;
3856
3857         set_ring_build_skb_enabled(rx_ring);
3858
3859 #if (PAGE_SIZE < 8192)
3860         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
3861                 return;
3862
3863         set_ring_uses_large_buffer(rx_ring);
3864 #endif
3865 }
3866
3867 /**
3868  *  igb_configure_rx - Configure receive Unit after Reset
3869  *  @adapter: board private structure
3870  *
3871  *  Configure the Rx unit of the MAC after a reset.
3872  **/
3873 static void igb_configure_rx(struct igb_adapter *adapter)
3874 {
3875         int i;
3876
3877         /* set the correct pool for the PF default MAC address in entry 0 */
3878         igb_set_default_mac_filter(adapter);
3879
3880         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3881          * the Base and Length of the Rx Descriptor Ring
3882          */
3883         for (i = 0; i < adapter->num_rx_queues; i++) {
3884                 struct igb_ring *rx_ring = adapter->rx_ring[i];
3885
3886                 igb_set_rx_buffer_len(adapter, rx_ring);
3887                 igb_configure_rx_ring(adapter, rx_ring);
3888         }
3889 }
3890
3891 /**
3892  *  igb_free_tx_resources - Free Tx Resources per Queue
3893  *  @tx_ring: Tx descriptor ring for a specific queue
3894  *
3895  *  Free all transmit software resources
3896  **/
3897 void igb_free_tx_resources(struct igb_ring *tx_ring)
3898 {
3899         igb_clean_tx_ring(tx_ring);
3900
3901         vfree(tx_ring->tx_buffer_info);
3902         tx_ring->tx_buffer_info = NULL;
3903
3904         /* if not set, then don't free */
3905         if (!tx_ring->desc)
3906                 return;
3907
3908         dma_free_coherent(tx_ring->dev, tx_ring->size,
3909                           tx_ring->desc, tx_ring->dma);
3910
3911         tx_ring->desc = NULL;
3912 }
3913
3914 /**
3915  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
3916  *  @adapter: board private structure
3917  *
3918  *  Free all transmit software resources
3919  **/
3920 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3921 {
3922         int i;
3923
3924         for (i = 0; i < adapter->num_tx_queues; i++)
3925                 if (adapter->tx_ring[i])
3926                         igb_free_tx_resources(adapter->tx_ring[i]);
3927 }
3928
3929 /**
3930  *  igb_clean_tx_ring - Free Tx Buffers
3931  *  @tx_ring: ring to be cleaned
3932  **/
3933 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3934 {
3935         u16 i = tx_ring->next_to_clean;
3936         struct igb_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
3937
3938         while (i != tx_ring->next_to_use) {
3939                 union e1000_adv_tx_desc *eop_desc, *tx_desc;
3940
3941                 /* Free all the Tx ring sk_buffs */
3942                 dev_kfree_skb_any(tx_buffer->skb);
3943
3944                 /* unmap skb header data */
3945                 dma_unmap_single(tx_ring->dev,
3946                                  dma_unmap_addr(tx_buffer, dma),
3947                                  dma_unmap_len(tx_buffer, len),
3948                                  DMA_TO_DEVICE);
3949
3950                 /* check for eop_desc to determine the end of the packet */
3951                 eop_desc = tx_buffer->next_to_watch;
3952                 tx_desc = IGB_TX_DESC(tx_ring, i);
3953
3954                 /* unmap remaining buffers */
3955                 while (tx_desc != eop_desc) {
3956                         tx_buffer++;
3957                         tx_desc++;
3958                         i++;
3959                         if (unlikely(i == tx_ring->count)) {
3960                                 i = 0;
3961                                 tx_buffer = tx_ring->tx_buffer_info;
3962                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
3963                         }
3964
3965                         /* unmap any remaining paged data */
3966                         if (dma_unmap_len(tx_buffer, len))
3967                                 dma_unmap_page(tx_ring->dev,
3968                                                dma_unmap_addr(tx_buffer, dma),
3969                                                dma_unmap_len(tx_buffer, len),
3970                                                DMA_TO_DEVICE);
3971                 }
3972
3973                 tx_buffer->next_to_watch = NULL;
3974
3975                 /* move us one more past the eop_desc for start of next pkt */
3976                 tx_buffer++;
3977                 i++;
3978                 if (unlikely(i == tx_ring->count)) {
3979                         i = 0;
3980                         tx_buffer = tx_ring->tx_buffer_info;
3981                 }
3982         }
3983
3984         /* reset BQL for queue */
3985         netdev_tx_reset_queue(txring_txq(tx_ring));
3986
3987         /* reset next_to_use and next_to_clean */
3988         tx_ring->next_to_use = 0;
3989         tx_ring->next_to_clean = 0;
3990 }
3991
3992 /**
3993  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
3994  *  @adapter: board private structure
3995  **/
3996 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3997 {
3998         int i;
3999
4000         for (i = 0; i < adapter->num_tx_queues; i++)
4001                 if (adapter->tx_ring[i])
4002                         igb_clean_tx_ring(adapter->tx_ring[i]);
4003 }
4004
4005 /**
4006  *  igb_free_rx_resources - Free Rx Resources
4007  *  @rx_ring: ring to clean the resources from
4008  *
4009  *  Free all receive software resources
4010  **/
4011 void igb_free_rx_resources(struct igb_ring *rx_ring)
4012 {
4013         igb_clean_rx_ring(rx_ring);
4014
4015         vfree(rx_ring->rx_buffer_info);
4016         rx_ring->rx_buffer_info = NULL;
4017
4018         /* if not set, then don't free */
4019         if (!rx_ring->desc)
4020                 return;
4021
4022         dma_free_coherent(rx_ring->dev, rx_ring->size,
4023                           rx_ring->desc, rx_ring->dma);
4024
4025         rx_ring->desc = NULL;
4026 }
4027
4028 /**
4029  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
4030  *  @adapter: board private structure
4031  *
4032  *  Free all receive software resources
4033  **/
4034 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4035 {
4036         int i;
4037
4038         for (i = 0; i < adapter->num_rx_queues; i++)
4039                 if (adapter->rx_ring[i])
4040                         igb_free_rx_resources(adapter->rx_ring[i]);
4041 }
4042
4043 /**
4044  *  igb_clean_rx_ring - Free Rx Buffers per Queue
4045  *  @rx_ring: ring to free buffers from
4046  **/
4047 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
4048 {
4049         u16 i = rx_ring->next_to_clean;
4050
4051         if (rx_ring->skb)
4052                 dev_kfree_skb(rx_ring->skb);
4053         rx_ring->skb = NULL;
4054
4055         /* Free all the Rx ring sk_buffs */
4056         while (i != rx_ring->next_to_alloc) {
4057                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4058
4059                 /* Invalidate cache lines that may have been written to by
4060                  * device so that we avoid corrupting memory.
4061                  */
4062                 dma_sync_single_range_for_cpu(rx_ring->dev,
4063                                               buffer_info->dma,
4064                                               buffer_info->page_offset,
4065                                               igb_rx_bufsz(rx_ring),
4066                                               DMA_FROM_DEVICE);
4067
4068                 /* free resources associated with mapping */
4069                 dma_unmap_page_attrs(rx_ring->dev,
4070                                      buffer_info->dma,
4071                                      igb_rx_pg_size(rx_ring),
4072                                      DMA_FROM_DEVICE,
4073                                      IGB_RX_DMA_ATTR);
4074                 __page_frag_cache_drain(buffer_info->page,
4075                                         buffer_info->pagecnt_bias);
4076
4077                 i++;
4078                 if (i == rx_ring->count)
4079                         i = 0;
4080         }
4081
4082         rx_ring->next_to_alloc = 0;
4083         rx_ring->next_to_clean = 0;
4084         rx_ring->next_to_use = 0;
4085 }
4086
4087 /**
4088  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
4089  *  @adapter: board private structure
4090  **/
4091 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4092 {
4093         int i;
4094
4095         for (i = 0; i < adapter->num_rx_queues; i++)
4096                 if (adapter->rx_ring[i])
4097                         igb_clean_rx_ring(adapter->rx_ring[i]);
4098 }
4099
4100 /**
4101  *  igb_set_mac - Change the Ethernet Address of the NIC
4102  *  @netdev: network interface device structure
4103  *  @p: pointer to an address structure
4104  *
4105  *  Returns 0 on success, negative on failure
4106  **/
4107 static int igb_set_mac(struct net_device *netdev, void *p)
4108 {
4109         struct igb_adapter *adapter = netdev_priv(netdev);
4110         struct e1000_hw *hw = &adapter->hw;
4111         struct sockaddr *addr = p;
4112
4113         if (!is_valid_ether_addr(addr->sa_data))
4114                 return -EADDRNOTAVAIL;
4115
4116         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4117         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4118
4119         /* set the correct pool for the new PF MAC address in entry 0 */
4120         igb_set_default_mac_filter(adapter);
4121
4122         return 0;
4123 }
4124
4125 /**
4126  *  igb_write_mc_addr_list - write multicast addresses to MTA
4127  *  @netdev: network interface device structure
4128  *
4129  *  Writes multicast address list to the MTA hash table.
4130  *  Returns: -ENOMEM on failure
4131  *           0 on no addresses written
4132  *           X on writing X addresses to MTA
4133  **/
4134 static int igb_write_mc_addr_list(struct net_device *netdev)
4135 {
4136         struct igb_adapter *adapter = netdev_priv(netdev);
4137         struct e1000_hw *hw = &adapter->hw;
4138         struct netdev_hw_addr *ha;
4139         u8  *mta_list;
4140         int i;
4141
4142         if (netdev_mc_empty(netdev)) {
4143                 /* nothing to program, so clear mc list */
4144                 igb_update_mc_addr_list(hw, NULL, 0);
4145                 igb_restore_vf_multicasts(adapter);
4146                 return 0;
4147         }
4148
4149         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
4150         if (!mta_list)
4151                 return -ENOMEM;
4152
4153         /* The shared function expects a packed array of only addresses. */
4154         i = 0;
4155         netdev_for_each_mc_addr(ha, netdev)
4156                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4157
4158         igb_update_mc_addr_list(hw, mta_list, i);
4159         kfree(mta_list);
4160
4161         return netdev_mc_count(netdev);
4162 }
4163
4164 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
4165 {
4166         struct e1000_hw *hw = &adapter->hw;
4167         u32 i, pf_id;
4168
4169         switch (hw->mac.type) {
4170         case e1000_i210:
4171         case e1000_i211:
4172         case e1000_i350:
4173                 /* VLAN filtering needed for VLAN prio filter */
4174                 if (adapter->netdev->features & NETIF_F_NTUPLE)
4175                         break;
4176                 /* fall through */
4177         case e1000_82576:
4178         case e1000_82580:
4179         case e1000_i354:
4180                 /* VLAN filtering needed for pool filtering */
4181                 if (adapter->vfs_allocated_count)
4182                         break;
4183                 /* fall through */
4184         default:
4185                 return 1;
4186         }
4187
4188         /* We are already in VLAN promisc, nothing to do */
4189         if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
4190                 return 0;
4191
4192         if (!adapter->vfs_allocated_count)
4193                 goto set_vfta;
4194
4195         /* Add PF to all active pools */
4196         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4197
4198         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4199                 u32 vlvf = rd32(E1000_VLVF(i));
4200
4201                 vlvf |= BIT(pf_id);
4202                 wr32(E1000_VLVF(i), vlvf);
4203         }
4204
4205 set_vfta:
4206         /* Set all bits in the VLAN filter table array */
4207         for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
4208                 hw->mac.ops.write_vfta(hw, i, ~0U);
4209
4210         /* Set flag so we don't redo unnecessary work */
4211         adapter->flags |= IGB_FLAG_VLAN_PROMISC;
4212
4213         return 0;
4214 }
4215
4216 #define VFTA_BLOCK_SIZE 8
4217 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
4218 {
4219         struct e1000_hw *hw = &adapter->hw;
4220         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4221         u32 vid_start = vfta_offset * 32;
4222         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4223         u32 i, vid, word, bits, pf_id;
4224
4225         /* guarantee that we don't scrub out management VLAN */
4226         vid = adapter->mng_vlan_id;
4227         if (vid >= vid_start && vid < vid_end)
4228                 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4229
4230         if (!adapter->vfs_allocated_count)
4231                 goto set_vfta;
4232
4233         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4234
4235         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4236                 u32 vlvf = rd32(E1000_VLVF(i));
4237
4238                 /* pull VLAN ID from VLVF */
4239                 vid = vlvf & VLAN_VID_MASK;
4240
4241                 /* only concern ourselves with a certain range */
4242                 if (vid < vid_start || vid >= vid_end)
4243                         continue;
4244
4245                 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
4246                         /* record VLAN ID in VFTA */
4247                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4248
4249                         /* if PF is part of this then continue */
4250                         if (test_bit(vid, adapter->active_vlans))
4251                                 continue;
4252                 }
4253
4254                 /* remove PF from the pool */
4255                 bits = ~BIT(pf_id);
4256                 bits &= rd32(E1000_VLVF(i));
4257                 wr32(E1000_VLVF(i), bits);
4258         }
4259
4260 set_vfta:
4261         /* extract values from active_vlans and write back to VFTA */
4262         for (i = VFTA_BLOCK_SIZE; i--;) {
4263                 vid = (vfta_offset + i) * 32;
4264                 word = vid / BITS_PER_LONG;
4265                 bits = vid % BITS_PER_LONG;
4266
4267                 vfta[i] |= adapter->active_vlans[word] >> bits;
4268
4269                 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
4270         }
4271 }
4272
4273 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
4274 {
4275         u32 i;
4276
4277         /* We are not in VLAN promisc, nothing to do */
4278         if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
4279                 return;
4280
4281         /* Set flag so we don't redo unnecessary work */
4282         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
4283
4284         for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
4285                 igb_scrub_vfta(adapter, i);
4286 }
4287
4288 /**
4289  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4290  *  @netdev: network interface device structure
4291  *
4292  *  The set_rx_mode entry point is called whenever the unicast or multicast
4293  *  address lists or the network interface flags are updated.  This routine is
4294  *  responsible for configuring the hardware for proper unicast, multicast,
4295  *  promiscuous mode, and all-multi behavior.
4296  **/
4297 static void igb_set_rx_mode(struct net_device *netdev)
4298 {
4299         struct igb_adapter *adapter = netdev_priv(netdev);
4300         struct e1000_hw *hw = &adapter->hw;
4301         unsigned int vfn = adapter->vfs_allocated_count;
4302         u32 rctl = 0, vmolr = 0, rlpml = MAX_JUMBO_FRAME_SIZE;
4303         int count;
4304
4305         /* Check for Promiscuous and All Multicast modes */
4306         if (netdev->flags & IFF_PROMISC) {
4307                 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
4308                 vmolr |= E1000_VMOLR_MPME;
4309
4310                 /* enable use of UTA filter to force packets to default pool */
4311                 if (hw->mac.type == e1000_82576)
4312                         vmolr |= E1000_VMOLR_ROPE;
4313         } else {
4314                 if (netdev->flags & IFF_ALLMULTI) {
4315                         rctl |= E1000_RCTL_MPE;
4316                         vmolr |= E1000_VMOLR_MPME;
4317                 } else {
4318                         /* Write addresses to the MTA, if the attempt fails
4319                          * then we should just turn on promiscuous mode so
4320                          * that we can at least receive multicast traffic
4321                          */
4322                         count = igb_write_mc_addr_list(netdev);
4323                         if (count < 0) {
4324                                 rctl |= E1000_RCTL_MPE;
4325                                 vmolr |= E1000_VMOLR_MPME;
4326                         } else if (count) {
4327                                 vmolr |= E1000_VMOLR_ROMPE;
4328                         }
4329                 }
4330         }
4331
4332         /* Write addresses to available RAR registers, if there is not
4333          * sufficient space to store all the addresses then enable
4334          * unicast promiscuous mode
4335          */
4336         if (__dev_uc_sync(netdev, igb_uc_sync, igb_uc_unsync)) {
4337                 rctl |= E1000_RCTL_UPE;
4338                 vmolr |= E1000_VMOLR_ROPE;
4339         }
4340
4341         /* enable VLAN filtering by default */
4342         rctl |= E1000_RCTL_VFE;
4343
4344         /* disable VLAN filtering for modes that require it */
4345         if ((netdev->flags & IFF_PROMISC) ||
4346             (netdev->features & NETIF_F_RXALL)) {
4347                 /* if we fail to set all rules then just clear VFE */
4348                 if (igb_vlan_promisc_enable(adapter))
4349                         rctl &= ~E1000_RCTL_VFE;
4350         } else {
4351                 igb_vlan_promisc_disable(adapter);
4352         }
4353
4354         /* update state of unicast, multicast, and VLAN filtering modes */
4355         rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
4356                                      E1000_RCTL_VFE);
4357         wr32(E1000_RCTL, rctl);
4358
4359 #if (PAGE_SIZE < 8192)
4360         if (!adapter->vfs_allocated_count) {
4361                 if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
4362                         rlpml = IGB_MAX_FRAME_BUILD_SKB;
4363         }
4364 #endif
4365         wr32(E1000_RLPML, rlpml);
4366
4367         /* In order to support SR-IOV and eventually VMDq it is necessary to set
4368          * the VMOLR to enable the appropriate modes.  Without this workaround
4369          * we will have issues with VLAN tag stripping not being done for frames
4370          * that are only arriving because we are the default pool
4371          */
4372         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
4373                 return;
4374
4375         /* set UTA to appropriate mode */
4376         igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
4377
4378         vmolr |= rd32(E1000_VMOLR(vfn)) &
4379                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4380
4381         /* enable Rx jumbo frames, restrict as needed to support build_skb */
4382         vmolr &= ~E1000_VMOLR_RLPML_MASK;
4383 #if (PAGE_SIZE < 8192)
4384         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
4385                 vmolr |= IGB_MAX_FRAME_BUILD_SKB;
4386         else
4387 #endif
4388                 vmolr |= MAX_JUMBO_FRAME_SIZE;
4389         vmolr |= E1000_VMOLR_LPE;
4390
4391         wr32(E1000_VMOLR(vfn), vmolr);
4392
4393         igb_restore_vf_multicasts(adapter);
4394 }
4395
4396 static void igb_check_wvbr(struct igb_adapter *adapter)
4397 {
4398         struct e1000_hw *hw = &adapter->hw;
4399         u32 wvbr = 0;
4400
4401         switch (hw->mac.type) {
4402         case e1000_82576:
4403         case e1000_i350:
4404                 wvbr = rd32(E1000_WVBR);
4405                 if (!wvbr)
4406                         return;
4407                 break;
4408         default:
4409                 break;
4410         }
4411
4412         adapter->wvbr |= wvbr;
4413 }
4414
4415 #define IGB_STAGGERED_QUEUE_OFFSET 8
4416
4417 static void igb_spoof_check(struct igb_adapter *adapter)
4418 {
4419         int j;
4420
4421         if (!adapter->wvbr)
4422                 return;
4423
4424         for (j = 0; j < adapter->vfs_allocated_count; j++) {
4425                 if (adapter->wvbr & BIT(j) ||
4426                     adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
4427                         dev_warn(&adapter->pdev->dev,
4428                                 "Spoof event(s) detected on VF %d\n", j);
4429                         adapter->wvbr &=
4430                                 ~(BIT(j) |
4431                                   BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
4432                 }
4433         }
4434 }
4435
4436 /* Need to wait a few seconds after link up to get diagnostic information from
4437  * the phy
4438  */
4439 static void igb_update_phy_info(unsigned long data)
4440 {
4441         struct igb_adapter *adapter = (struct igb_adapter *) data;
4442         igb_get_phy_info(&adapter->hw);
4443 }
4444
4445 /**
4446  *  igb_has_link - check shared code for link and determine up/down
4447  *  @adapter: pointer to driver private info
4448  **/
4449 bool igb_has_link(struct igb_adapter *adapter)
4450 {
4451         struct e1000_hw *hw = &adapter->hw;
4452         bool link_active = false;
4453
4454         /* get_link_status is set on LSC (link status) interrupt or
4455          * rx sequence error interrupt.  get_link_status will stay
4456          * false until the e1000_check_for_link establishes link
4457          * for copper adapters ONLY
4458          */
4459         switch (hw->phy.media_type) {
4460         case e1000_media_type_copper:
4461                 if (!hw->mac.get_link_status)
4462                         return true;
4463         case e1000_media_type_internal_serdes:
4464                 hw->mac.ops.check_for_link(hw);
4465                 link_active = !hw->mac.get_link_status;
4466                 break;
4467         default:
4468         case e1000_media_type_unknown:
4469                 break;
4470         }
4471
4472         if (((hw->mac.type == e1000_i210) ||
4473              (hw->mac.type == e1000_i211)) &&
4474              (hw->phy.id == I210_I_PHY_ID)) {
4475                 if (!netif_carrier_ok(adapter->netdev)) {
4476                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4477                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4478                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4479                         adapter->link_check_timeout = jiffies;
4480                 }
4481         }
4482
4483         return link_active;
4484 }
4485
4486 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
4487 {
4488         bool ret = false;
4489         u32 ctrl_ext, thstat;
4490
4491         /* check for thermal sensor event on i350 copper only */
4492         if (hw->mac.type == e1000_i350) {
4493                 thstat = rd32(E1000_THSTAT);
4494                 ctrl_ext = rd32(E1000_CTRL_EXT);
4495
4496                 if ((hw->phy.media_type == e1000_media_type_copper) &&
4497                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
4498                         ret = !!(thstat & event);
4499         }
4500
4501         return ret;
4502 }
4503
4504 /**
4505  *  igb_check_lvmmc - check for malformed packets received
4506  *  and indicated in LVMMC register
4507  *  @adapter: pointer to adapter
4508  **/
4509 static void igb_check_lvmmc(struct igb_adapter *adapter)
4510 {
4511         struct e1000_hw *hw = &adapter->hw;
4512         u32 lvmmc;
4513
4514         lvmmc = rd32(E1000_LVMMC);
4515         if (lvmmc) {
4516                 if (unlikely(net_ratelimit())) {
4517                         netdev_warn(adapter->netdev,
4518                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
4519                                     lvmmc);
4520                 }
4521         }
4522 }
4523
4524 /**
4525  *  igb_watchdog - Timer Call-back
4526  *  @data: pointer to adapter cast into an unsigned long
4527  **/
4528 static void igb_watchdog(unsigned long data)
4529 {
4530         struct igb_adapter *adapter = (struct igb_adapter *)data;
4531         /* Do the rest outside of interrupt context */
4532         schedule_work(&adapter->watchdog_task);
4533 }
4534
4535 static void igb_watchdog_task(struct work_struct *work)
4536 {
4537         struct igb_adapter *adapter = container_of(work,
4538                                                    struct igb_adapter,
4539                                                    watchdog_task);
4540         struct e1000_hw *hw = &adapter->hw;
4541         struct e1000_phy_info *phy = &hw->phy;
4542         struct net_device *netdev = adapter->netdev;
4543         u32 link;
4544         int i;
4545         u32 connsw;
4546         u16 phy_data, retry_count = 20;
4547
4548         link = igb_has_link(adapter);
4549
4550         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4551                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4552                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4553                 else
4554                         link = false;
4555         }
4556
4557         /* Force link down if we have fiber to swap to */
4558         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4559                 if (hw->phy.media_type == e1000_media_type_copper) {
4560                         connsw = rd32(E1000_CONNSW);
4561                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4562                                 link = 0;
4563                 }
4564         }
4565         if (link) {
4566                 /* Perform a reset if the media type changed. */
4567                 if (hw->dev_spec._82575.media_changed) {
4568                         hw->dev_spec._82575.media_changed = false;
4569                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4570                         igb_reset(adapter);
4571                 }
4572                 /* Cancel scheduled suspend requests. */
4573                 pm_runtime_resume(netdev->dev.parent);
4574
4575                 if (!netif_carrier_ok(netdev)) {
4576                         u32 ctrl;
4577
4578                         hw->mac.ops.get_speed_and_duplex(hw,
4579                                                          &adapter->link_speed,
4580                                                          &adapter->link_duplex);
4581
4582                         ctrl = rd32(E1000_CTRL);
4583                         /* Links status message must follow this format */
4584                         netdev_info(netdev,
4585                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4586                                netdev->name,
4587                                adapter->link_speed,
4588                                adapter->link_duplex == FULL_DUPLEX ?
4589                                "Full" : "Half",
4590                                (ctrl & E1000_CTRL_TFCE) &&
4591                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
4592                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
4593                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
4594
4595                         /* disable EEE if enabled */
4596                         if ((adapter->flags & IGB_FLAG_EEE) &&
4597                                 (adapter->link_duplex == HALF_DUPLEX)) {
4598                                 dev_info(&adapter->pdev->dev,
4599                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4600                                 adapter->hw.dev_spec._82575.eee_disable = true;
4601                                 adapter->flags &= ~IGB_FLAG_EEE;
4602                         }
4603
4604                         /* check if SmartSpeed worked */
4605                         igb_check_downshift(hw);
4606                         if (phy->speed_downgraded)
4607                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
4608
4609                         /* check for thermal sensor event */
4610                         if (igb_thermal_sensor_event(hw,
4611                             E1000_THSTAT_LINK_THROTTLE))
4612                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
4613
4614                         /* adjust timeout factor according to speed/duplex */
4615                         adapter->tx_timeout_factor = 1;
4616                         switch (adapter->link_speed) {
4617                         case SPEED_10:
4618                                 adapter->tx_timeout_factor = 14;
4619                                 break;
4620                         case SPEED_100:
4621                                 /* maybe add some timeout factor ? */
4622                                 break;
4623                         }
4624
4625                         if (adapter->link_speed != SPEED_1000)
4626                                 goto no_wait;
4627
4628                         /* wait for Remote receiver status OK */
4629 retry_read_status:
4630                         if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
4631                                               &phy_data)) {
4632                                 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
4633                                     retry_count) {
4634                                         msleep(100);
4635                                         retry_count--;
4636                                         goto retry_read_status;
4637                                 } else if (!retry_count) {
4638                                         dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
4639                                 }
4640                         } else {
4641                                 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
4642                         }
4643 no_wait:
4644                         netif_carrier_on(netdev);
4645
4646                         igb_ping_all_vfs(adapter);
4647                         igb_check_vf_rate_limit(adapter);
4648
4649                         /* link state has changed, schedule phy info update */
4650                         if (!test_bit(__IGB_DOWN, &adapter->state))
4651                                 mod_timer(&adapter->phy_info_timer,
4652                                           round_jiffies(jiffies + 2 * HZ));
4653                 }
4654         } else {
4655                 if (netif_carrier_ok(netdev)) {
4656                         adapter->link_speed = 0;
4657                         adapter->link_duplex = 0;
4658
4659                         /* check for thermal sensor event */
4660                         if (igb_thermal_sensor_event(hw,
4661                             E1000_THSTAT_PWR_DOWN)) {
4662                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
4663                         }
4664
4665                         /* Links status message must follow this format */
4666                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
4667                                netdev->name);
4668                         netif_carrier_off(netdev);
4669
4670                         igb_ping_all_vfs(adapter);
4671
4672                         /* link state has changed, schedule phy info update */
4673                         if (!test_bit(__IGB_DOWN, &adapter->state))
4674                                 mod_timer(&adapter->phy_info_timer,
4675                                           round_jiffies(jiffies + 2 * HZ));
4676
4677                         /* link is down, time to check for alternate media */
4678                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4679                                 igb_check_swap_media(adapter);
4680                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4681                                         schedule_work(&adapter->reset_task);
4682                                         /* return immediately */
4683                                         return;
4684                                 }
4685                         }
4686                         pm_schedule_suspend(netdev->dev.parent,
4687                                             MSEC_PER_SEC * 5);
4688
4689                 /* also check for alternate media here */
4690                 } else if (!netif_carrier_ok(netdev) &&
4691                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4692                         igb_check_swap_media(adapter);
4693                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4694                                 schedule_work(&adapter->reset_task);
4695                                 /* return immediately */
4696                                 return;
4697                         }
4698                 }
4699         }
4700
4701         spin_lock(&adapter->stats64_lock);
4702         igb_update_stats(adapter);
4703         spin_unlock(&adapter->stats64_lock);
4704
4705         for (i = 0; i < adapter->num_tx_queues; i++) {
4706                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4707                 if (!netif_carrier_ok(netdev)) {
4708                         /* We've lost link, so the controller stops DMA,
4709                          * but we've got queued Tx work that's never going
4710                          * to get done, so reset controller to flush Tx.
4711                          * (Do the reset outside of interrupt context).
4712                          */
4713                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4714                                 adapter->tx_timeout_count++;
4715                                 schedule_work(&adapter->reset_task);
4716                                 /* return immediately since reset is imminent */
4717                                 return;
4718                         }
4719                 }
4720
4721                 /* Force detection of hung controller every watchdog period */
4722                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4723         }
4724
4725         /* Cause software interrupt to ensure Rx ring is cleaned */
4726         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
4727                 u32 eics = 0;
4728
4729                 for (i = 0; i < adapter->num_q_vectors; i++)
4730                         eics |= adapter->q_vector[i]->eims_value;
4731                 wr32(E1000_EICS, eics);
4732         } else {
4733                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4734         }
4735
4736         igb_spoof_check(adapter);
4737         igb_ptp_rx_hang(adapter);
4738         igb_ptp_tx_hang(adapter);
4739
4740         /* Check LVMMC register on i350/i354 only */
4741         if ((adapter->hw.mac.type == e1000_i350) ||
4742             (adapter->hw.mac.type == e1000_i354))
4743                 igb_check_lvmmc(adapter);
4744
4745         /* Reset the timer */
4746         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4747                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4748                         mod_timer(&adapter->watchdog_timer,
4749                                   round_jiffies(jiffies +  HZ));
4750                 else
4751                         mod_timer(&adapter->watchdog_timer,
4752                                   round_jiffies(jiffies + 2 * HZ));
4753         }
4754 }
4755
4756 enum latency_range {
4757         lowest_latency = 0,
4758         low_latency = 1,
4759         bulk_latency = 2,
4760         latency_invalid = 255
4761 };
4762
4763 /**
4764  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
4765  *  @q_vector: pointer to q_vector
4766  *
4767  *  Stores a new ITR value based on strictly on packet size.  This
4768  *  algorithm is less sophisticated than that used in igb_update_itr,
4769  *  due to the difficulty of synchronizing statistics across multiple
4770  *  receive rings.  The divisors and thresholds used by this function
4771  *  were determined based on theoretical maximum wire speed and testing
4772  *  data, in order to minimize response time while increasing bulk
4773  *  throughput.
4774  *  This functionality is controlled by ethtool's coalescing settings.
4775  *  NOTE:  This function is called only when operating in a multiqueue
4776  *         receive environment.
4777  **/
4778 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4779 {
4780         int new_val = q_vector->itr_val;
4781         int avg_wire_size = 0;
4782         struct igb_adapter *adapter = q_vector->adapter;
4783         unsigned int packets;
4784
4785         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4786          * ints/sec - ITR timer value of 120 ticks.
4787          */
4788         if (adapter->link_speed != SPEED_1000) {
4789                 new_val = IGB_4K_ITR;
4790                 goto set_itr_val;
4791         }
4792
4793         packets = q_vector->rx.total_packets;
4794         if (packets)
4795                 avg_wire_size = q_vector->rx.total_bytes / packets;
4796
4797         packets = q_vector->tx.total_packets;
4798         if (packets)
4799                 avg_wire_size = max_t(u32, avg_wire_size,
4800                                       q_vector->tx.total_bytes / packets);
4801
4802         /* if avg_wire_size isn't set no work was done */
4803         if (!avg_wire_size)
4804                 goto clear_counts;
4805
4806         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4807         avg_wire_size += 24;
4808
4809         /* Don't starve jumbo frames */
4810         avg_wire_size = min(avg_wire_size, 3000);
4811
4812         /* Give a little boost to mid-size frames */
4813         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4814                 new_val = avg_wire_size / 3;
4815         else
4816                 new_val = avg_wire_size / 2;
4817
4818         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4819         if (new_val < IGB_20K_ITR &&
4820             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4821              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4822                 new_val = IGB_20K_ITR;
4823
4824 set_itr_val:
4825         if (new_val != q_vector->itr_val) {
4826                 q_vector->itr_val = new_val;
4827                 q_vector->set_itr = 1;
4828         }
4829 clear_counts:
4830         q_vector->rx.total_bytes = 0;
4831         q_vector->rx.total_packets = 0;
4832         q_vector->tx.total_bytes = 0;
4833         q_vector->tx.total_packets = 0;
4834 }
4835
4836 /**
4837  *  igb_update_itr - update the dynamic ITR value based on statistics
4838  *  @q_vector: pointer to q_vector
4839  *  @ring_container: ring info to update the itr for
4840  *
4841  *  Stores a new ITR value based on packets and byte
4842  *  counts during the last interrupt.  The advantage of per interrupt
4843  *  computation is faster updates and more accurate ITR for the current
4844  *  traffic pattern.  Constants in this function were computed
4845  *  based on theoretical maximum wire speed and thresholds were set based
4846  *  on testing data as well as attempting to minimize response time
4847  *  while increasing bulk throughput.
4848  *  This functionality is controlled by ethtool's coalescing settings.
4849  *  NOTE:  These calculations are only valid when operating in a single-
4850  *         queue environment.
4851  **/
4852 static void igb_update_itr(struct igb_q_vector *q_vector,
4853                            struct igb_ring_container *ring_container)
4854 {
4855         unsigned int packets = ring_container->total_packets;
4856         unsigned int bytes = ring_container->total_bytes;
4857         u8 itrval = ring_container->itr;
4858
4859         /* no packets, exit with status unchanged */
4860         if (packets == 0)
4861                 return;
4862
4863         switch (itrval) {
4864         case lowest_latency:
4865                 /* handle TSO and jumbo frames */
4866                 if (bytes/packets > 8000)
4867                         itrval = bulk_latency;
4868                 else if ((packets < 5) && (bytes > 512))
4869                         itrval = low_latency;
4870                 break;
4871         case low_latency:  /* 50 usec aka 20000 ints/s */
4872                 if (bytes > 10000) {
4873                         /* this if handles the TSO accounting */
4874                         if (bytes/packets > 8000)
4875                                 itrval = bulk_latency;
4876                         else if ((packets < 10) || ((bytes/packets) > 1200))
4877                                 itrval = bulk_latency;
4878                         else if ((packets > 35))
4879                                 itrval = lowest_latency;
4880                 } else if (bytes/packets > 2000) {
4881                         itrval = bulk_latency;
4882                 } else if (packets <= 2 && bytes < 512) {
4883                         itrval = lowest_latency;
4884                 }
4885                 break;
4886         case bulk_latency: /* 250 usec aka 4000 ints/s */
4887                 if (bytes > 25000) {
4888                         if (packets > 35)
4889                                 itrval = low_latency;
4890                 } else if (bytes < 1500) {
4891                         itrval = low_latency;
4892                 }
4893                 break;
4894         }
4895
4896         /* clear work counters since we have the values we need */
4897         ring_container->total_bytes = 0;
4898         ring_container->total_packets = 0;
4899
4900         /* write updated itr to ring container */
4901         ring_container->itr = itrval;
4902 }
4903
4904 static void igb_set_itr(struct igb_q_vector *q_vector)
4905 {
4906         struct igb_adapter *adapter = q_vector->adapter;
4907         u32 new_itr = q_vector->itr_val;
4908         u8 current_itr = 0;
4909
4910         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4911         if (adapter->link_speed != SPEED_1000) {
4912                 current_itr = 0;
4913                 new_itr = IGB_4K_ITR;
4914                 goto set_itr_now;
4915         }
4916
4917         igb_update_itr(q_vector, &q_vector->tx);
4918         igb_update_itr(q_vector, &q_vector->rx);
4919
4920         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4921
4922         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4923         if (current_itr == lowest_latency &&
4924             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4925              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4926                 current_itr = low_latency;
4927
4928         switch (current_itr) {
4929         /* counts and packets in update_itr are dependent on these numbers */
4930         case lowest_latency:
4931                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4932                 break;
4933         case low_latency:
4934                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4935                 break;
4936         case bulk_latency:
4937                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
4938                 break;
4939         default:
4940                 break;
4941         }
4942
4943 set_itr_now:
4944         if (new_itr != q_vector->itr_val) {
4945                 /* this attempts to bias the interrupt rate towards Bulk
4946                  * by adding intermediate steps when interrupt rate is
4947                  * increasing
4948                  */
4949                 new_itr = new_itr > q_vector->itr_val ?
4950                           max((new_itr * q_vector->itr_val) /
4951                           (new_itr + (q_vector->itr_val >> 2)),
4952                           new_itr) : new_itr;
4953                 /* Don't write the value here; it resets the adapter's
4954                  * internal timer, and causes us to delay far longer than
4955                  * we should between interrupts.  Instead, we write the ITR
4956                  * value at the beginning of the next interrupt so the timing
4957                  * ends up being correct.
4958                  */
4959                 q_vector->itr_val = new_itr;
4960                 q_vector->set_itr = 1;
4961         }
4962 }
4963
4964 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4965                             u32 type_tucmd, u32 mss_l4len_idx)
4966 {
4967         struct e1000_adv_tx_context_desc *context_desc;
4968         u16 i = tx_ring->next_to_use;
4969
4970         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4971
4972         i++;
4973         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4974
4975         /* set bits to identify this as an advanced context descriptor */
4976         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4977
4978         /* For 82575, context index must be unique per ring. */
4979         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4980                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4981
4982         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4983         context_desc->seqnum_seed       = 0;
4984         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4985         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4986 }
4987
4988 static int igb_tso(struct igb_ring *tx_ring,
4989                    struct igb_tx_buffer *first,
4990                    u8 *hdr_len)
4991 {
4992         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
4993         struct sk_buff *skb = first->skb;
4994         union {
4995                 struct iphdr *v4;
4996                 struct ipv6hdr *v6;
4997                 unsigned char *hdr;
4998         } ip;
4999         union {
5000                 struct tcphdr *tcp;
5001                 unsigned char *hdr;
5002         } l4;
5003         u32 paylen, l4_offset;
5004         int err;
5005
5006         if (skb->ip_summed != CHECKSUM_PARTIAL)
5007                 return 0;
5008
5009         if (!skb_is_gso(skb))
5010                 return 0;
5011
5012         err = skb_cow_head(skb, 0);
5013         if (err < 0)
5014                 return err;
5015
5016         ip.hdr = skb_network_header(skb);
5017         l4.hdr = skb_checksum_start(skb);
5018
5019         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5020         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5021
5022         /* initialize outer IP header fields */
5023         if (ip.v4->version == 4) {
5024                 unsigned char *csum_start = skb_checksum_start(skb);
5025                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
5026
5027                 /* IP header will have to cancel out any data that
5028                  * is not a part of the outer IP header
5029                  */
5030                 ip.v4->check = csum_fold(csum_partial(trans_start,
5031                                                       csum_start - trans_start,
5032                                                       0));
5033                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5034
5035                 ip.v4->tot_len = 0;
5036                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5037                                    IGB_TX_FLAGS_CSUM |
5038                                    IGB_TX_FLAGS_IPV4;
5039         } else {
5040                 ip.v6->payload_len = 0;
5041                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5042                                    IGB_TX_FLAGS_CSUM;
5043         }
5044
5045         /* determine offset of inner transport header */
5046         l4_offset = l4.hdr - skb->data;
5047
5048         /* compute length of segmentation header */
5049         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
5050
5051         /* remove payload length from inner checksum */
5052         paylen = skb->len - l4_offset;
5053         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
5054
5055         /* update gso size and bytecount with header size */
5056         first->gso_segs = skb_shinfo(skb)->gso_segs;
5057         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5058
5059         /* MSS L4LEN IDX */
5060         mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
5061         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5062
5063         /* VLAN MACLEN IPLEN */
5064         vlan_macip_lens = l4.hdr - ip.hdr;
5065         vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
5066         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5067
5068         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5069
5070         return 1;
5071 }
5072
5073 static inline bool igb_ipv6_csum_is_sctp(struct sk_buff *skb)
5074 {
5075         unsigned int offset = 0;
5076
5077         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
5078
5079         return offset == skb_checksum_start_offset(skb);
5080 }
5081
5082 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5083 {
5084         struct sk_buff *skb = first->skb;
5085         u32 vlan_macip_lens = 0;
5086         u32 type_tucmd = 0;
5087
5088         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5089 csum_failed:
5090                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5091                         return;
5092                 goto no_csum;
5093         }
5094
5095         switch (skb->csum_offset) {
5096         case offsetof(struct tcphdr, check):
5097                 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5098                 /* fall through */
5099         case offsetof(struct udphdr, check):
5100                 break;
5101         case offsetof(struct sctphdr, checksum):
5102                 /* validate that this is actually an SCTP request */
5103                 if (((first->protocol == htons(ETH_P_IP)) &&
5104                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
5105                     ((first->protocol == htons(ETH_P_IPV6)) &&
5106                      igb_ipv6_csum_is_sctp(skb))) {
5107                         type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
5108                         break;
5109                 }
5110         default:
5111                 skb_checksum_help(skb);
5112                 goto csum_failed;
5113         }
5114
5115         /* update TX checksum flag */
5116         first->tx_flags |= IGB_TX_FLAGS_CSUM;
5117         vlan_macip_lens = skb_checksum_start_offset(skb) -
5118                           skb_network_offset(skb);
5119 no_csum:
5120         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5121         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5122
5123         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, 0);
5124 }
5125
5126 #define IGB_SET_FLAG(_input, _flag, _result) \
5127         ((_flag <= _result) ? \
5128          ((u32)(_input & _flag) * (_result / _flag)) : \
5129          ((u32)(_input & _flag) / (_flag / _result)))
5130
5131 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5132 {
5133         /* set type for advanced descriptor with frame checksum insertion */
5134         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5135                        E1000_ADVTXD_DCMD_DEXT |
5136                        E1000_ADVTXD_DCMD_IFCS;
5137
5138         /* set HW vlan bit if vlan is present */
5139         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5140                                  (E1000_ADVTXD_DCMD_VLE));
5141
5142         /* set segmentation bits for TSO */
5143         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5144                                  (E1000_ADVTXD_DCMD_TSE));
5145
5146         /* set timestamp bit if present */
5147         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5148                                  (E1000_ADVTXD_MAC_TSTAMP));
5149
5150         /* insert frame checksum */
5151         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
5152
5153         return cmd_type;
5154 }
5155
5156 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5157                                  union e1000_adv_tx_desc *tx_desc,
5158                                  u32 tx_flags, unsigned int paylen)
5159 {
5160         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5161
5162         /* 82575 requires a unique index per ring */
5163         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5164                 olinfo_status |= tx_ring->reg_idx << 4;
5165
5166         /* insert L4 checksum */
5167         olinfo_status |= IGB_SET_FLAG(tx_flags,
5168                                       IGB_TX_FLAGS_CSUM,
5169                                       (E1000_TXD_POPTS_TXSM << 8));
5170
5171         /* insert IPv4 checksum */
5172         olinfo_status |= IGB_SET_FLAG(tx_flags,
5173                                       IGB_TX_FLAGS_IPV4,
5174                                       (E1000_TXD_POPTS_IXSM << 8));
5175
5176         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5177 }
5178
5179 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5180 {
5181         struct net_device *netdev = tx_ring->netdev;
5182
5183         netif_stop_subqueue(netdev, tx_ring->queue_index);
5184
5185         /* Herbert's original patch had:
5186          *  smp_mb__after_netif_stop_queue();
5187          * but since that doesn't exist yet, just open code it.
5188          */
5189         smp_mb();
5190
5191         /* We need to check again in a case another CPU has just
5192          * made room available.
5193          */
5194         if (igb_desc_unused(tx_ring) < size)
5195                 return -EBUSY;
5196
5197         /* A reprieve! */
5198         netif_wake_subqueue(netdev, tx_ring->queue_index);
5199
5200         u64_stats_update_begin(&tx_ring->tx_syncp2);
5201         tx_ring->tx_stats.restart_queue2++;
5202         u64_stats_update_end(&tx_ring->tx_syncp2);
5203
5204         return 0;
5205 }
5206
5207 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5208 {
5209         if (igb_desc_unused(tx_ring) >= size)
5210                 return 0;
5211         return __igb_maybe_stop_tx(tx_ring, size);
5212 }
5213
5214 static int igb_tx_map(struct igb_ring *tx_ring,
5215                       struct igb_tx_buffer *first,
5216                       const u8 hdr_len)
5217 {
5218         struct sk_buff *skb = first->skb;
5219         struct igb_tx_buffer *tx_buffer;
5220         union e1000_adv_tx_desc *tx_desc;
5221         struct skb_frag_struct *frag;
5222         dma_addr_t dma;
5223         unsigned int data_len, size;
5224         u32 tx_flags = first->tx_flags;
5225         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5226         u16 i = tx_ring->next_to_use;
5227
5228         tx_desc = IGB_TX_DESC(tx_ring, i);
5229
5230         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5231
5232         size = skb_headlen(skb);
5233         data_len = skb->data_len;
5234
5235         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5236
5237         tx_buffer = first;
5238
5239         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5240                 if (dma_mapping_error(tx_ring->dev, dma))
5241                         goto dma_error;
5242
5243                 /* record length, and DMA address */
5244                 dma_unmap_len_set(tx_buffer, len, size);
5245                 dma_unmap_addr_set(tx_buffer, dma, dma);
5246
5247                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5248
5249                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5250                         tx_desc->read.cmd_type_len =
5251                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5252
5253                         i++;
5254                         tx_desc++;
5255                         if (i == tx_ring->count) {
5256                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5257                                 i = 0;
5258                         }
5259                         tx_desc->read.olinfo_status = 0;
5260
5261                         dma += IGB_MAX_DATA_PER_TXD;
5262                         size -= IGB_MAX_DATA_PER_TXD;
5263
5264                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5265                 }
5266
5267                 if (likely(!data_len))
5268                         break;
5269
5270                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5271
5272                 i++;
5273                 tx_desc++;
5274                 if (i == tx_ring->count) {
5275                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5276                         i = 0;
5277                 }
5278                 tx_desc->read.olinfo_status = 0;
5279
5280                 size = skb_frag_size(frag);
5281                 data_len -= size;
5282
5283                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5284                                        size, DMA_TO_DEVICE);
5285
5286                 tx_buffer = &tx_ring->tx_buffer_info[i];
5287         }
5288
5289         /* write last descriptor with RS and EOP bits */
5290         cmd_type |= size | IGB_TXD_DCMD;
5291         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5292
5293         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5294
5295         /* set the timestamp */
5296         first->time_stamp = jiffies;
5297
5298         /* Force memory writes to complete before letting h/w know there
5299          * are new descriptors to fetch.  (Only applicable for weak-ordered
5300          * memory model archs, such as IA-64).
5301          *
5302          * We also need this memory barrier to make certain all of the
5303          * status bits have been updated before next_to_watch is written.
5304          */
5305         wmb();
5306
5307         /* set next_to_watch value indicating a packet is present */
5308         first->next_to_watch = tx_desc;
5309
5310         i++;
5311         if (i == tx_ring->count)
5312                 i = 0;
5313
5314         tx_ring->next_to_use = i;
5315
5316         /* Make sure there is space in the ring for the next send. */
5317         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5318
5319         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
5320                 writel(i, tx_ring->tail);
5321
5322                 /* we need this if more than one processor can write to our tail
5323                  * at a time, it synchronizes IO on IA64/Altix systems
5324                  */
5325                 mmiowb();
5326         }
5327         return 0;
5328
5329 dma_error:
5330         dev_err(tx_ring->dev, "TX DMA map failed\n");
5331         tx_buffer = &tx_ring->tx_buffer_info[i];
5332
5333         /* clear dma mappings for failed tx_buffer_info map */
5334         while (tx_buffer != first) {
5335                 if (dma_unmap_len(tx_buffer, len))
5336                         dma_unmap_page(tx_ring->dev,
5337                                        dma_unmap_addr(tx_buffer, dma),
5338                                        dma_unmap_len(tx_buffer, len),
5339                                        DMA_TO_DEVICE);
5340                 dma_unmap_len_set(tx_buffer, len, 0);
5341
5342                 if (i-- == 0)
5343                         i += tx_ring->count;
5344                 tx_buffer = &tx_ring->tx_buffer_info[i];
5345         }
5346
5347         if (dma_unmap_len(tx_buffer, len))
5348                 dma_unmap_single(tx_ring->dev,
5349                                  dma_unmap_addr(tx_buffer, dma),
5350                                  dma_unmap_len(tx_buffer, len),
5351                                  DMA_TO_DEVICE);
5352         dma_unmap_len_set(tx_buffer, len, 0);
5353
5354         dev_kfree_skb_any(tx_buffer->skb);
5355         tx_buffer->skb = NULL;
5356
5357         tx_ring->next_to_use = i;
5358
5359         return -1;
5360 }
5361
5362 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5363                                 struct igb_ring *tx_ring)
5364 {
5365         struct igb_tx_buffer *first;
5366         int tso;
5367         u32 tx_flags = 0;
5368         unsigned short f;
5369         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5370         __be16 protocol = vlan_get_protocol(skb);
5371         u8 hdr_len = 0;
5372
5373         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5374          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5375          *       + 2 desc gap to keep tail from touching head,
5376          *       + 1 desc for context descriptor,
5377          * otherwise try next time
5378          */
5379         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5380                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5381
5382         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5383                 /* this is a hard error */
5384                 return NETDEV_TX_BUSY;
5385         }
5386
5387         /* record the location of the first descriptor for this packet */
5388         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5389         first->skb = skb;
5390         first->bytecount = skb->len;
5391         first->gso_segs = 1;
5392
5393         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5394                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5395
5396                 if (adapter->tstamp_config.tx_type & HWTSTAMP_TX_ON &&
5397                     !test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
5398                                            &adapter->state)) {
5399                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5400                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5401
5402                         adapter->ptp_tx_skb = skb_get(skb);
5403                         adapter->ptp_tx_start = jiffies;
5404                         if (adapter->hw.mac.type == e1000_82576)
5405                                 schedule_work(&adapter->ptp_tx_work);
5406                 } else {
5407                         adapter->tx_hwtstamp_skipped++;
5408                 }
5409         }
5410
5411         skb_tx_timestamp(skb);
5412
5413         if (skb_vlan_tag_present(skb)) {
5414                 tx_flags |= IGB_TX_FLAGS_VLAN;
5415                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5416         }
5417
5418         /* record initial flags and protocol */
5419         first->tx_flags = tx_flags;
5420         first->protocol = protocol;
5421
5422         tso = igb_tso(tx_ring, first, &hdr_len);
5423         if (tso < 0)
5424                 goto out_drop;
5425         else if (!tso)
5426                 igb_tx_csum(tx_ring, first);
5427
5428         if (igb_tx_map(tx_ring, first, hdr_len))
5429                 goto cleanup_tx_tstamp;
5430
5431         return NETDEV_TX_OK;
5432
5433 out_drop:
5434         dev_kfree_skb_any(first->skb);
5435         first->skb = NULL;
5436 cleanup_tx_tstamp:
5437         if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP)) {
5438                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5439
5440                 dev_kfree_skb_any(adapter->ptp_tx_skb);
5441                 adapter->ptp_tx_skb = NULL;
5442                 if (adapter->hw.mac.type == e1000_82576)
5443                         cancel_work_sync(&adapter->ptp_tx_work);
5444                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
5445         }
5446
5447         return NETDEV_TX_OK;
5448 }
5449
5450 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5451                                                     struct sk_buff *skb)
5452 {
5453         unsigned int r_idx = skb->queue_mapping;
5454
5455         if (r_idx >= adapter->num_tx_queues)
5456                 r_idx = r_idx % adapter->num_tx_queues;
5457
5458         return adapter->tx_ring[r_idx];
5459 }
5460
5461 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5462                                   struct net_device *netdev)
5463 {
5464         struct igb_adapter *adapter = netdev_priv(netdev);
5465
5466         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5467          * in order to meet this minimum size requirement.
5468          */
5469         if (skb_put_padto(skb, 17))
5470                 return NETDEV_TX_OK;
5471
5472         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5473 }
5474
5475 /**
5476  *  igb_tx_timeout - Respond to a Tx Hang
5477  *  @netdev: network interface device structure
5478  **/
5479 static void igb_tx_timeout(struct net_device *netdev)
5480 {
5481         struct igb_adapter *adapter = netdev_priv(netdev);
5482         struct e1000_hw *hw = &adapter->hw;
5483
5484         /* Do the reset outside of interrupt context */
5485         adapter->tx_timeout_count++;
5486
5487         if (hw->mac.type >= e1000_82580)
5488                 hw->dev_spec._82575.global_device_reset = true;
5489
5490         schedule_work(&adapter->reset_task);
5491         wr32(E1000_EICS,
5492              (adapter->eims_enable_mask & ~adapter->eims_other));
5493 }
5494
5495 static void igb_reset_task(struct work_struct *work)
5496 {
5497         struct igb_adapter *adapter;
5498         adapter = container_of(work, struct igb_adapter, reset_task);
5499
5500         rtnl_lock();
5501         /* If we're already down or resetting, just bail */
5502         if (test_bit(__IGB_DOWN, &adapter->state) ||
5503             test_bit(__IGB_RESETTING, &adapter->state)) {
5504                 rtnl_unlock();
5505                 return;
5506         }
5507
5508         igb_dump(adapter);
5509         netdev_err(adapter->netdev, "Reset adapter\n");
5510         igb_reinit_locked(adapter);
5511         rtnl_unlock();
5512 }
5513
5514 /**
5515  *  igb_get_stats64 - Get System Network Statistics
5516  *  @netdev: network interface device structure
5517  *  @stats: rtnl_link_stats64 pointer
5518  **/
5519 static void igb_get_stats64(struct net_device *netdev,
5520                             struct rtnl_link_stats64 *stats)
5521 {
5522         struct igb_adapter *adapter = netdev_priv(netdev);
5523
5524         spin_lock(&adapter->stats64_lock);
5525         igb_update_stats(adapter);
5526         memcpy(stats, &adapter->stats64, sizeof(*stats));
5527         spin_unlock(&adapter->stats64_lock);
5528 }
5529
5530 /**
5531  *  igb_change_mtu - Change the Maximum Transfer Unit
5532  *  @netdev: network interface device structure
5533  *  @new_mtu: new value for maximum frame size
5534  *
5535  *  Returns 0 on success, negative on failure
5536  **/
5537 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5538 {
5539         struct igb_adapter *adapter = netdev_priv(netdev);
5540         struct pci_dev *pdev = adapter->pdev;
5541         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5542
5543         /* adjust max frame to be at least the size of a standard frame */
5544         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5545                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5546
5547         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5548                 usleep_range(1000, 2000);
5549
5550         /* igb_down has a dependency on max_frame_size */
5551         adapter->max_frame_size = max_frame;
5552
5553         if (netif_running(netdev))
5554                 igb_down(adapter);
5555
5556         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
5557                  netdev->mtu, new_mtu);
5558         netdev->mtu = new_mtu;
5559
5560         if (netif_running(netdev))
5561                 igb_up(adapter);
5562         else
5563                 igb_reset(adapter);
5564
5565         clear_bit(__IGB_RESETTING, &adapter->state);
5566
5567         return 0;
5568 }
5569
5570 /**
5571  *  igb_update_stats - Update the board statistics counters
5572  *  @adapter: board private structure
5573  **/
5574 void igb_update_stats(struct igb_adapter *adapter)
5575 {
5576         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
5577         struct e1000_hw *hw = &adapter->hw;
5578         struct pci_dev *pdev = adapter->pdev;
5579         u32 reg, mpc;
5580         int i;
5581         u64 bytes, packets;
5582         unsigned int start;
5583         u64 _bytes, _packets;
5584
5585         /* Prevent stats update while adapter is being reset, or if the pci
5586          * connection is down.
5587          */
5588         if (adapter->link_speed == 0)
5589                 return;
5590         if (pci_channel_offline(pdev))
5591                 return;
5592
5593         bytes = 0;
5594         packets = 0;
5595
5596         rcu_read_lock();
5597         for (i = 0; i < adapter->num_rx_queues; i++) {
5598                 struct igb_ring *ring = adapter->rx_ring[i];
5599                 u32 rqdpc = rd32(E1000_RQDPC(i));
5600                 if (hw->mac.type >= e1000_i210)
5601                         wr32(E1000_RQDPC(i), 0);
5602
5603                 if (rqdpc) {
5604                         ring->rx_stats.drops += rqdpc;
5605                         net_stats->rx_fifo_errors += rqdpc;
5606                 }
5607
5608                 do {
5609                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
5610                         _bytes = ring->rx_stats.bytes;
5611                         _packets = ring->rx_stats.packets;
5612                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
5613                 bytes += _bytes;
5614                 packets += _packets;
5615         }
5616
5617         net_stats->rx_bytes = bytes;
5618         net_stats->rx_packets = packets;
5619
5620         bytes = 0;
5621         packets = 0;
5622         for (i = 0; i < adapter->num_tx_queues; i++) {
5623                 struct igb_ring *ring = adapter->tx_ring[i];
5624                 do {
5625                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
5626                         _bytes = ring->tx_stats.bytes;
5627                         _packets = ring->tx_stats.packets;
5628                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
5629                 bytes += _bytes;
5630                 packets += _packets;
5631         }
5632         net_stats->tx_bytes = bytes;
5633         net_stats->tx_packets = packets;
5634         rcu_read_unlock();
5635
5636         /* read stats registers */
5637         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
5638         adapter->stats.gprc += rd32(E1000_GPRC);
5639         adapter->stats.gorc += rd32(E1000_GORCL);
5640         rd32(E1000_GORCH); /* clear GORCL */
5641         adapter->stats.bprc += rd32(E1000_BPRC);
5642         adapter->stats.mprc += rd32(E1000_MPRC);
5643         adapter->stats.roc += rd32(E1000_ROC);
5644
5645         adapter->stats.prc64 += rd32(E1000_PRC64);
5646         adapter->stats.prc127 += rd32(E1000_PRC127);
5647         adapter->stats.prc255 += rd32(E1000_PRC255);
5648         adapter->stats.prc511 += rd32(E1000_PRC511);
5649         adapter->stats.prc1023 += rd32(E1000_PRC1023);
5650         adapter->stats.prc1522 += rd32(E1000_PRC1522);
5651         adapter->stats.symerrs += rd32(E1000_SYMERRS);
5652         adapter->stats.sec += rd32(E1000_SEC);
5653
5654         mpc = rd32(E1000_MPC);
5655         adapter->stats.mpc += mpc;
5656         net_stats->rx_fifo_errors += mpc;
5657         adapter->stats.scc += rd32(E1000_SCC);
5658         adapter->stats.ecol += rd32(E1000_ECOL);
5659         adapter->stats.mcc += rd32(E1000_MCC);
5660         adapter->stats.latecol += rd32(E1000_LATECOL);
5661         adapter->stats.dc += rd32(E1000_DC);
5662         adapter->stats.rlec += rd32(E1000_RLEC);
5663         adapter->stats.xonrxc += rd32(E1000_XONRXC);
5664         adapter->stats.xontxc += rd32(E1000_XONTXC);
5665         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
5666         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
5667         adapter->stats.fcruc += rd32(E1000_FCRUC);
5668         adapter->stats.gptc += rd32(E1000_GPTC);
5669         adapter->stats.gotc += rd32(E1000_GOTCL);
5670         rd32(E1000_GOTCH); /* clear GOTCL */
5671         adapter->stats.rnbc += rd32(E1000_RNBC);
5672         adapter->stats.ruc += rd32(E1000_RUC);
5673         adapter->stats.rfc += rd32(E1000_RFC);
5674         adapter->stats.rjc += rd32(E1000_RJC);
5675         adapter->stats.tor += rd32(E1000_TORH);
5676         adapter->stats.tot += rd32(E1000_TOTH);
5677         adapter->stats.tpr += rd32(E1000_TPR);
5678
5679         adapter->stats.ptc64 += rd32(E1000_PTC64);
5680         adapter->stats.ptc127 += rd32(E1000_PTC127);
5681         adapter->stats.ptc255 += rd32(E1000_PTC255);
5682         adapter->stats.ptc511 += rd32(E1000_PTC511);
5683         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
5684         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
5685
5686         adapter->stats.mptc += rd32(E1000_MPTC);
5687         adapter->stats.bptc += rd32(E1000_BPTC);
5688
5689         adapter->stats.tpt += rd32(E1000_TPT);
5690         adapter->stats.colc += rd32(E1000_COLC);
5691
5692         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
5693         /* read internal phy specific stats */
5694         reg = rd32(E1000_CTRL_EXT);
5695         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5696                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
5697
5698                 /* this stat has invalid values on i210/i211 */
5699                 if ((hw->mac.type != e1000_i210) &&
5700                     (hw->mac.type != e1000_i211))
5701                         adapter->stats.tncrs += rd32(E1000_TNCRS);
5702         }
5703
5704         adapter->stats.tsctc += rd32(E1000_TSCTC);
5705         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
5706
5707         adapter->stats.iac += rd32(E1000_IAC);
5708         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
5709         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
5710         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
5711         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
5712         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
5713         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
5714         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
5715         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
5716
5717         /* Fill out the OS statistics structure */
5718         net_stats->multicast = adapter->stats.mprc;
5719         net_stats->collisions = adapter->stats.colc;
5720
5721         /* Rx Errors */
5722
5723         /* RLEC on some newer hardware can be incorrect so build
5724          * our own version based on RUC and ROC
5725          */
5726         net_stats->rx_errors = adapter->stats.rxerrc +
5727                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5728                 adapter->stats.ruc + adapter->stats.roc +
5729                 adapter->stats.cexterr;
5730         net_stats->rx_length_errors = adapter->stats.ruc +
5731                                       adapter->stats.roc;
5732         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5733         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5734         net_stats->rx_missed_errors = adapter->stats.mpc;
5735
5736         /* Tx Errors */
5737         net_stats->tx_errors = adapter->stats.ecol +
5738                                adapter->stats.latecol;
5739         net_stats->tx_aborted_errors = adapter->stats.ecol;
5740         net_stats->tx_window_errors = adapter->stats.latecol;
5741         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5742
5743         /* Tx Dropped needs to be maintained elsewhere */
5744
5745         /* Management Stats */
5746         adapter->stats.mgptc += rd32(E1000_MGTPTC);
5747         adapter->stats.mgprc += rd32(E1000_MGTPRC);
5748         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5749
5750         /* OS2BMC Stats */
5751         reg = rd32(E1000_MANC);
5752         if (reg & E1000_MANC_EN_BMC2OS) {
5753                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5754                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5755                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5756                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5757         }
5758 }
5759
5760 static void igb_tsync_interrupt(struct igb_adapter *adapter)
5761 {
5762         struct e1000_hw *hw = &adapter->hw;
5763         struct ptp_clock_event event;
5764         struct timespec64 ts;
5765         u32 ack = 0, tsauxc, sec, nsec, tsicr = rd32(E1000_TSICR);
5766
5767         if (tsicr & TSINTR_SYS_WRAP) {
5768                 event.type = PTP_CLOCK_PPS;
5769                 if (adapter->ptp_caps.pps)
5770                         ptp_clock_event(adapter->ptp_clock, &event);
5771                 ack |= TSINTR_SYS_WRAP;
5772         }
5773
5774         if (tsicr & E1000_TSICR_TXTS) {
5775                 /* retrieve hardware timestamp */
5776                 schedule_work(&adapter->ptp_tx_work);
5777                 ack |= E1000_TSICR_TXTS;
5778         }
5779
5780         if (tsicr & TSINTR_TT0) {
5781                 spin_lock(&adapter->tmreg_lock);
5782                 ts = timespec64_add(adapter->perout[0].start,
5783                                     adapter->perout[0].period);
5784                 /* u32 conversion of tv_sec is safe until y2106 */
5785                 wr32(E1000_TRGTTIML0, ts.tv_nsec);
5786                 wr32(E1000_TRGTTIMH0, (u32)ts.tv_sec);
5787                 tsauxc = rd32(E1000_TSAUXC);
5788                 tsauxc |= TSAUXC_EN_TT0;
5789                 wr32(E1000_TSAUXC, tsauxc);
5790                 adapter->perout[0].start = ts;
5791                 spin_unlock(&adapter->tmreg_lock);
5792                 ack |= TSINTR_TT0;
5793         }
5794
5795         if (tsicr & TSINTR_TT1) {
5796                 spin_lock(&adapter->tmreg_lock);
5797                 ts = timespec64_add(adapter->perout[1].start,
5798                                     adapter->perout[1].period);
5799                 wr32(E1000_TRGTTIML1, ts.tv_nsec);
5800                 wr32(E1000_TRGTTIMH1, (u32)ts.tv_sec);
5801                 tsauxc = rd32(E1000_TSAUXC);
5802                 tsauxc |= TSAUXC_EN_TT1;
5803                 wr32(E1000_TSAUXC, tsauxc);
5804                 adapter->perout[1].start = ts;
5805                 spin_unlock(&adapter->tmreg_lock);
5806                 ack |= TSINTR_TT1;
5807         }
5808
5809         if (tsicr & TSINTR_AUTT0) {
5810                 nsec = rd32(E1000_AUXSTMPL0);
5811                 sec  = rd32(E1000_AUXSTMPH0);
5812                 event.type = PTP_CLOCK_EXTTS;
5813                 event.index = 0;
5814                 event.timestamp = sec * 1000000000ULL + nsec;
5815                 ptp_clock_event(adapter->ptp_clock, &event);
5816                 ack |= TSINTR_AUTT0;
5817         }
5818
5819         if (tsicr & TSINTR_AUTT1) {
5820                 nsec = rd32(E1000_AUXSTMPL1);
5821                 sec  = rd32(E1000_AUXSTMPH1);
5822                 event.type = PTP_CLOCK_EXTTS;
5823                 event.index = 1;
5824                 event.timestamp = sec * 1000000000ULL + nsec;
5825                 ptp_clock_event(adapter->ptp_clock, &event);
5826                 ack |= TSINTR_AUTT1;
5827         }
5828
5829         /* acknowledge the interrupts */
5830         wr32(E1000_TSICR, ack);
5831 }
5832
5833 static irqreturn_t igb_msix_other(int irq, void *data)
5834 {
5835         struct igb_adapter *adapter = data;
5836         struct e1000_hw *hw = &adapter->hw;
5837         u32 icr = rd32(E1000_ICR);
5838         /* reading ICR causes bit 31 of EICR to be cleared */
5839
5840         if (icr & E1000_ICR_DRSTA)
5841                 schedule_work(&adapter->reset_task);
5842
5843         if (icr & E1000_ICR_DOUTSYNC) {
5844                 /* HW is reporting DMA is out of sync */
5845                 adapter->stats.doosync++;
5846                 /* The DMA Out of Sync is also indication of a spoof event
5847                  * in IOV mode. Check the Wrong VM Behavior register to
5848                  * see if it is really a spoof event.
5849                  */
5850                 igb_check_wvbr(adapter);
5851         }
5852
5853         /* Check for a mailbox event */
5854         if (icr & E1000_ICR_VMMB)
5855                 igb_msg_task(adapter);
5856
5857         if (icr & E1000_ICR_LSC) {
5858                 hw->mac.get_link_status = 1;
5859                 /* guard against interrupt when we're going down */
5860                 if (!test_bit(__IGB_DOWN, &adapter->state))
5861                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5862         }
5863
5864         if (icr & E1000_ICR_TS)
5865                 igb_tsync_interrupt(adapter);
5866
5867         wr32(E1000_EIMS, adapter->eims_other);
5868
5869         return IRQ_HANDLED;
5870 }
5871
5872 static void igb_write_itr(struct igb_q_vector *q_vector)
5873 {
5874         struct igb_adapter *adapter = q_vector->adapter;
5875         u32 itr_val = q_vector->itr_val & 0x7FFC;
5876
5877         if (!q_vector->set_itr)
5878                 return;
5879
5880         if (!itr_val)
5881                 itr_val = 0x4;
5882
5883         if (adapter->hw.mac.type == e1000_82575)
5884                 itr_val |= itr_val << 16;
5885         else
5886                 itr_val |= E1000_EITR_CNT_IGNR;
5887
5888         writel(itr_val, q_vector->itr_register);
5889         q_vector->set_itr = 0;
5890 }
5891
5892 static irqreturn_t igb_msix_ring(int irq, void *data)
5893 {
5894         struct igb_q_vector *q_vector = data;
5895
5896         /* Write the ITR value calculated from the previous interrupt. */
5897         igb_write_itr(q_vector);
5898
5899         napi_schedule(&q_vector->napi);
5900
5901         return IRQ_HANDLED;
5902 }
5903
5904 #ifdef CONFIG_IGB_DCA
5905 static void igb_update_tx_dca(struct igb_adapter *adapter,
5906                               struct igb_ring *tx_ring,
5907                               int cpu)
5908 {
5909         struct e1000_hw *hw = &adapter->hw;
5910         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5911
5912         if (hw->mac.type != e1000_82575)
5913                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5914
5915         /* We can enable relaxed ordering for reads, but not writes when
5916          * DCA is enabled.  This is due to a known issue in some chipsets
5917          * which will cause the DCA tag to be cleared.
5918          */
5919         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5920                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5921                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5922
5923         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5924 }
5925
5926 static void igb_update_rx_dca(struct igb_adapter *adapter,
5927                               struct igb_ring *rx_ring,
5928                               int cpu)
5929 {
5930         struct e1000_hw *hw = &adapter->hw;
5931         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5932
5933         if (hw->mac.type != e1000_82575)
5934                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5935
5936         /* We can enable relaxed ordering for reads, but not writes when
5937          * DCA is enabled.  This is due to a known issue in some chipsets
5938          * which will cause the DCA tag to be cleared.
5939          */
5940         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5941                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5942
5943         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5944 }
5945
5946 static void igb_update_dca(struct igb_q_vector *q_vector)
5947 {
5948         struct igb_adapter *adapter = q_vector->adapter;
5949         int cpu = get_cpu();
5950
5951         if (q_vector->cpu == cpu)
5952                 goto out_no_update;
5953
5954         if (q_vector->tx.ring)
5955                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5956
5957         if (q_vector->rx.ring)
5958                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5959
5960         q_vector->cpu = cpu;
5961 out_no_update:
5962         put_cpu();
5963 }
5964
5965 static void igb_setup_dca(struct igb_adapter *adapter)
5966 {
5967         struct e1000_hw *hw = &adapter->hw;
5968         int i;
5969
5970         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5971                 return;
5972
5973         /* Always use CB2 mode, difference is masked in the CB driver. */
5974         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5975
5976         for (i = 0; i < adapter->num_q_vectors; i++) {
5977                 adapter->q_vector[i]->cpu = -1;
5978                 igb_update_dca(adapter->q_vector[i]);
5979         }
5980 }
5981
5982 static int __igb_notify_dca(struct device *dev, void *data)
5983 {
5984         struct net_device *netdev = dev_get_drvdata(dev);
5985         struct igb_adapter *adapter = netdev_priv(netdev);
5986         struct pci_dev *pdev = adapter->pdev;
5987         struct e1000_hw *hw = &adapter->hw;
5988         unsigned long event = *(unsigned long *)data;
5989
5990         switch (event) {
5991         case DCA_PROVIDER_ADD:
5992                 /* if already enabled, don't do it again */
5993                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5994                         break;
5995                 if (dca_add_requester(dev) == 0) {
5996                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
5997                         dev_info(&pdev->dev, "DCA enabled\n");
5998                         igb_setup_dca(adapter);
5999                         break;
6000                 }
6001                 /* Fall Through since DCA is disabled. */
6002         case DCA_PROVIDER_REMOVE:
6003                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6004                         /* without this a class_device is left
6005                          * hanging around in the sysfs model
6006                          */
6007                         dca_remove_requester(dev);
6008                         dev_info(&pdev->dev, "DCA disabled\n");
6009                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6010                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
6011                 }
6012                 break;
6013         }
6014
6015         return 0;
6016 }
6017
6018 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6019                           void *p)
6020 {
6021         int ret_val;
6022
6023         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6024                                          __igb_notify_dca);
6025
6026         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6027 }
6028 #endif /* CONFIG_IGB_DCA */
6029
6030 #ifdef CONFIG_PCI_IOV
6031 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6032 {
6033         unsigned char mac_addr[ETH_ALEN];
6034
6035         eth_zero_addr(mac_addr);
6036         igb_set_vf_mac(adapter, vf, mac_addr);
6037
6038         /* By default spoof check is enabled for all VFs */
6039         adapter->vf_data[vf].spoofchk_enabled = true;
6040
6041         return 0;
6042 }
6043
6044 #endif
6045 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6046 {
6047         struct e1000_hw *hw = &adapter->hw;
6048         u32 ping;
6049         int i;
6050
6051         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6052                 ping = E1000_PF_CONTROL_MSG;
6053                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6054                         ping |= E1000_VT_MSGTYPE_CTS;
6055                 igb_write_mbx(hw, &ping, 1, i);
6056         }
6057 }
6058
6059 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6060 {
6061         struct e1000_hw *hw = &adapter->hw;
6062         u32 vmolr = rd32(E1000_VMOLR(vf));
6063         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6064
6065         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6066                             IGB_VF_FLAG_MULTI_PROMISC);
6067         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6068
6069         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6070                 vmolr |= E1000_VMOLR_MPME;
6071                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6072                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6073         } else {
6074                 /* if we have hashes and we are clearing a multicast promisc
6075                  * flag we need to write the hashes to the MTA as this step
6076                  * was previously skipped
6077                  */
6078                 if (vf_data->num_vf_mc_hashes > 30) {
6079                         vmolr |= E1000_VMOLR_MPME;
6080                 } else if (vf_data->num_vf_mc_hashes) {
6081                         int j;
6082
6083                         vmolr |= E1000_VMOLR_ROMPE;
6084                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6085                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
6086                 }
6087         }
6088
6089         wr32(E1000_VMOLR(vf), vmolr);
6090
6091         /* there are flags left unprocessed, likely not supported */
6092         if (*msgbuf & E1000_VT_MSGINFO_MASK)
6093                 return -EINVAL;
6094
6095         return 0;
6096 }
6097
6098 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6099                                   u32 *msgbuf, u32 vf)
6100 {
6101         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6102         u16 *hash_list = (u16 *)&msgbuf[1];
6103         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6104         int i;
6105
6106         /* salt away the number of multicast addresses assigned
6107          * to this VF for later use to restore when the PF multi cast
6108          * list changes
6109          */
6110         vf_data->num_vf_mc_hashes = n;
6111
6112         /* only up to 30 hash values supported */
6113         if (n > 30)
6114                 n = 30;
6115
6116         /* store the hashes for later use */
6117         for (i = 0; i < n; i++)
6118                 vf_data->vf_mc_hashes[i] = hash_list[i];
6119
6120         /* Flush and reset the mta with the new values */
6121         igb_set_rx_mode(adapter->netdev);
6122
6123         return 0;
6124 }
6125
6126 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6127 {
6128         struct e1000_hw *hw = &adapter->hw;
6129         struct vf_data_storage *vf_data;
6130         int i, j;
6131
6132         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6133                 u32 vmolr = rd32(E1000_VMOLR(i));
6134
6135                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6136
6137                 vf_data = &adapter->vf_data[i];
6138
6139                 if ((vf_data->num_vf_mc_hashes > 30) ||
6140                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6141                         vmolr |= E1000_VMOLR_MPME;
6142                 } else if (vf_data->num_vf_mc_hashes) {
6143                         vmolr |= E1000_VMOLR_ROMPE;
6144                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6145                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
6146                 }
6147                 wr32(E1000_VMOLR(i), vmolr);
6148         }
6149 }
6150
6151 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6152 {
6153         struct e1000_hw *hw = &adapter->hw;
6154         u32 pool_mask, vlvf_mask, i;
6155
6156         /* create mask for VF and other pools */
6157         pool_mask = E1000_VLVF_POOLSEL_MASK;
6158         vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
6159
6160         /* drop PF from pool bits */
6161         pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
6162                              adapter->vfs_allocated_count);
6163
6164         /* Find the vlan filter for this id */
6165         for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
6166                 u32 vlvf = rd32(E1000_VLVF(i));
6167                 u32 vfta_mask, vid, vfta;
6168
6169                 /* remove the vf from the pool */
6170                 if (!(vlvf & vlvf_mask))
6171                         continue;
6172
6173                 /* clear out bit from VLVF */
6174                 vlvf ^= vlvf_mask;
6175
6176                 /* if other pools are present, just remove ourselves */
6177                 if (vlvf & pool_mask)
6178                         goto update_vlvfb;
6179
6180                 /* if PF is present, leave VFTA */
6181                 if (vlvf & E1000_VLVF_POOLSEL_MASK)
6182                         goto update_vlvf;
6183
6184                 vid = vlvf & E1000_VLVF_VLANID_MASK;
6185                 vfta_mask = BIT(vid % 32);
6186
6187                 /* clear bit from VFTA */
6188                 vfta = adapter->shadow_vfta[vid / 32];
6189                 if (vfta & vfta_mask)
6190                         hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
6191 update_vlvf:
6192                 /* clear pool selection enable */
6193                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6194                         vlvf &= E1000_VLVF_POOLSEL_MASK;
6195                 else
6196                         vlvf = 0;
6197 update_vlvfb:
6198                 /* clear pool bits */
6199                 wr32(E1000_VLVF(i), vlvf);
6200         }
6201 }
6202
6203 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
6204 {
6205         u32 vlvf;
6206         int idx;
6207
6208         /* short cut the special case */
6209         if (vlan == 0)
6210                 return 0;
6211
6212         /* Search for the VLAN id in the VLVF entries */
6213         for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
6214                 vlvf = rd32(E1000_VLVF(idx));
6215                 if ((vlvf & VLAN_VID_MASK) == vlan)
6216                         break;
6217         }
6218
6219         return idx;
6220 }
6221
6222 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
6223 {
6224         struct e1000_hw *hw = &adapter->hw;
6225         u32 bits, pf_id;
6226         int idx;
6227
6228         idx = igb_find_vlvf_entry(hw, vid);
6229         if (!idx)
6230                 return;
6231
6232         /* See if any other pools are set for this VLAN filter
6233          * entry other than the PF.
6234          */
6235         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
6236         bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
6237         bits &= rd32(E1000_VLVF(idx));
6238
6239         /* Disable the filter so this falls into the default pool. */
6240         if (!bits) {
6241                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6242                         wr32(E1000_VLVF(idx), BIT(pf_id));
6243                 else
6244                         wr32(E1000_VLVF(idx), 0);
6245         }
6246 }
6247
6248 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
6249                            bool add, u32 vf)
6250 {
6251         int pf_id = adapter->vfs_allocated_count;
6252         struct e1000_hw *hw = &adapter->hw;
6253         int err;
6254
6255         /* If VLAN overlaps with one the PF is currently monitoring make
6256          * sure that we are able to allocate a VLVF entry.  This may be
6257          * redundant but it guarantees PF will maintain visibility to
6258          * the VLAN.
6259          */
6260         if (add && test_bit(vid, adapter->active_vlans)) {
6261                 err = igb_vfta_set(hw, vid, pf_id, true, false);
6262                 if (err)
6263                         return err;
6264         }
6265
6266         err = igb_vfta_set(hw, vid, vf, add, false);
6267
6268         if (add && !err)
6269                 return err;
6270
6271         /* If we failed to add the VF VLAN or we are removing the VF VLAN
6272          * we may need to drop the PF pool bit in order to allow us to free
6273          * up the VLVF resources.
6274          */
6275         if (test_bit(vid, adapter->active_vlans) ||
6276             (adapter->flags & IGB_FLAG_VLAN_PROMISC))
6277                 igb_update_pf_vlvf(adapter, vid);
6278
6279         return err;
6280 }
6281
6282 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6283 {
6284         struct e1000_hw *hw = &adapter->hw;
6285
6286         if (vid)
6287                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6288         else
6289                 wr32(E1000_VMVIR(vf), 0);
6290 }
6291
6292 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
6293                                 u16 vlan, u8 qos)
6294 {
6295         int err;
6296
6297         err = igb_set_vf_vlan(adapter, vlan, true, vf);
6298         if (err)
6299                 return err;
6300
6301         igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6302         igb_set_vmolr(adapter, vf, !vlan);
6303
6304         /* revoke access to previous VLAN */
6305         if (vlan != adapter->vf_data[vf].pf_vlan)
6306                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6307                                 false, vf);
6308
6309         adapter->vf_data[vf].pf_vlan = vlan;
6310         adapter->vf_data[vf].pf_qos = qos;
6311         igb_set_vf_vlan_strip(adapter, vf, true);
6312         dev_info(&adapter->pdev->dev,
6313                  "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6314         if (test_bit(__IGB_DOWN, &adapter->state)) {
6315                 dev_warn(&adapter->pdev->dev,
6316                          "The VF VLAN has been set, but the PF device is not up.\n");
6317                 dev_warn(&adapter->pdev->dev,
6318                          "Bring the PF device up before attempting to use the VF device.\n");
6319         }
6320
6321         return err;
6322 }
6323
6324 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
6325 {
6326         /* Restore tagless access via VLAN 0 */
6327         igb_set_vf_vlan(adapter, 0, true, vf);
6328
6329         igb_set_vmvir(adapter, 0, vf);
6330         igb_set_vmolr(adapter, vf, true);
6331
6332         /* Remove any PF assigned VLAN */
6333         if (adapter->vf_data[vf].pf_vlan)
6334                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6335                                 false, vf);
6336
6337         adapter->vf_data[vf].pf_vlan = 0;
6338         adapter->vf_data[vf].pf_qos = 0;
6339         igb_set_vf_vlan_strip(adapter, vf, false);
6340
6341         return 0;
6342 }
6343
6344 static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
6345                                u16 vlan, u8 qos, __be16 vlan_proto)
6346 {
6347         struct igb_adapter *adapter = netdev_priv(netdev);
6348
6349         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
6350                 return -EINVAL;
6351
6352         if (vlan_proto != htons(ETH_P_8021Q))
6353                 return -EPROTONOSUPPORT;
6354
6355         return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
6356                                igb_disable_port_vlan(adapter, vf);
6357 }
6358
6359 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6360 {
6361         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6362         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6363         int ret;
6364
6365         if (adapter->vf_data[vf].pf_vlan)
6366                 return -1;
6367
6368         /* VLAN 0 is a special case, don't allow it to be removed */
6369         if (!vid && !add)
6370                 return 0;
6371
6372         ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
6373         if (!ret)
6374                 igb_set_vf_vlan_strip(adapter, vf, !!vid);
6375         return ret;
6376 }
6377
6378 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6379 {
6380         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6381
6382         /* clear flags - except flag that indicates PF has set the MAC */
6383         vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
6384         vf_data->last_nack = jiffies;
6385
6386         /* reset vlans for device */
6387         igb_clear_vf_vfta(adapter, vf);
6388         igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
6389         igb_set_vmvir(adapter, vf_data->pf_vlan |
6390                                (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
6391         igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
6392         igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
6393
6394         /* reset multicast table array for vf */
6395         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6396
6397         /* Flush and reset the mta with the new values */
6398         igb_set_rx_mode(adapter->netdev);
6399 }
6400
6401 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6402 {
6403         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6404
6405         /* clear mac address as we were hotplug removed/added */
6406         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6407                 eth_zero_addr(vf_mac);
6408
6409         /* process remaining reset events */
6410         igb_vf_reset(adapter, vf);
6411 }
6412
6413 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6414 {
6415         struct e1000_hw *hw = &adapter->hw;
6416         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6417         u32 reg, msgbuf[3];
6418         u8 *addr = (u8 *)(&msgbuf[1]);
6419
6420         /* process all the same items cleared in a function level reset */
6421         igb_vf_reset(adapter, vf);
6422
6423         /* set vf mac address */
6424         igb_set_vf_mac(adapter, vf, vf_mac);
6425
6426         /* enable transmit and receive for vf */
6427         reg = rd32(E1000_VFTE);
6428         wr32(E1000_VFTE, reg | BIT(vf));
6429         reg = rd32(E1000_VFRE);
6430         wr32(E1000_VFRE, reg | BIT(vf));
6431
6432         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6433
6434         /* reply to reset with ack and vf mac address */
6435         if (!is_zero_ether_addr(vf_mac)) {
6436                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6437                 memcpy(addr, vf_mac, ETH_ALEN);
6438         } else {
6439                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
6440         }
6441         igb_write_mbx(hw, msgbuf, 3, vf);
6442 }
6443
6444 static void igb_flush_mac_table(struct igb_adapter *adapter)
6445 {
6446         struct e1000_hw *hw = &adapter->hw;
6447         int i;
6448
6449         for (i = 0; i < hw->mac.rar_entry_count; i++) {
6450                 adapter->mac_table[i].state &= ~IGB_MAC_STATE_IN_USE;
6451                 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
6452                 adapter->mac_table[i].queue = 0;
6453                 igb_rar_set_index(adapter, i);
6454         }
6455 }
6456
6457 static int igb_available_rars(struct igb_adapter *adapter, u8 queue)
6458 {
6459         struct e1000_hw *hw = &adapter->hw;
6460         /* do not count rar entries reserved for VFs MAC addresses */
6461         int rar_entries = hw->mac.rar_entry_count -
6462                           adapter->vfs_allocated_count;
6463         int i, count = 0;
6464
6465         for (i = 0; i < rar_entries; i++) {
6466                 /* do not count default entries */
6467                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT)
6468                         continue;
6469
6470                 /* do not count "in use" entries for different queues */
6471                 if ((adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE) &&
6472                     (adapter->mac_table[i].queue != queue))
6473                         continue;
6474
6475                 count++;
6476         }
6477
6478         return count;
6479 }
6480
6481 /* Set default MAC address for the PF in the first RAR entry */
6482 static void igb_set_default_mac_filter(struct igb_adapter *adapter)
6483 {
6484         struct igb_mac_addr *mac_table = &adapter->mac_table[0];
6485
6486         ether_addr_copy(mac_table->addr, adapter->hw.mac.addr);
6487         mac_table->queue = adapter->vfs_allocated_count;
6488         mac_table->state = IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
6489
6490         igb_rar_set_index(adapter, 0);
6491 }
6492
6493 static int igb_add_mac_filter(struct igb_adapter *adapter, const u8 *addr,
6494                               const u8 queue)
6495 {
6496         struct e1000_hw *hw = &adapter->hw;
6497         int rar_entries = hw->mac.rar_entry_count -
6498                           adapter->vfs_allocated_count;
6499         int i;
6500
6501         if (is_zero_ether_addr(addr))
6502                 return -EINVAL;
6503
6504         /* Search for the first empty entry in the MAC table.
6505          * Do not touch entries at the end of the table reserved for the VF MAC
6506          * addresses.
6507          */
6508         for (i = 0; i < rar_entries; i++) {
6509                 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
6510                         continue;
6511
6512                 ether_addr_copy(adapter->mac_table[i].addr, addr);
6513                 adapter->mac_table[i].queue = queue;
6514                 adapter->mac_table[i].state |= IGB_MAC_STATE_IN_USE;
6515
6516                 igb_rar_set_index(adapter, i);
6517                 return i;
6518         }
6519
6520         return -ENOSPC;
6521 }
6522
6523 static int igb_del_mac_filter(struct igb_adapter *adapter, const u8 *addr,
6524                               const u8 queue)
6525 {
6526         struct e1000_hw *hw = &adapter->hw;
6527         int rar_entries = hw->mac.rar_entry_count -
6528                           adapter->vfs_allocated_count;
6529         int i;
6530
6531         if (is_zero_ether_addr(addr))
6532                 return -EINVAL;
6533
6534         /* Search for matching entry in the MAC table based on given address
6535          * and queue. Do not touch entries at the end of the table reserved
6536          * for the VF MAC addresses.
6537          */
6538         for (i = 0; i < rar_entries; i++) {
6539                 if (!(adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE))
6540                         continue;
6541                 if (adapter->mac_table[i].queue != queue)
6542                         continue;
6543                 if (!ether_addr_equal(adapter->mac_table[i].addr, addr))
6544                         continue;
6545
6546                 adapter->mac_table[i].state &= ~IGB_MAC_STATE_IN_USE;
6547                 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
6548                 adapter->mac_table[i].queue = 0;
6549
6550                 igb_rar_set_index(adapter, i);
6551                 return 0;
6552         }
6553
6554         return -ENOENT;
6555 }
6556
6557 static int igb_uc_sync(struct net_device *netdev, const unsigned char *addr)
6558 {
6559         struct igb_adapter *adapter = netdev_priv(netdev);
6560         int ret;
6561
6562         ret = igb_add_mac_filter(adapter, addr, adapter->vfs_allocated_count);
6563
6564         return min_t(int, ret, 0);
6565 }
6566
6567 static int igb_uc_unsync(struct net_device *netdev, const unsigned char *addr)
6568 {
6569         struct igb_adapter *adapter = netdev_priv(netdev);
6570
6571         igb_del_mac_filter(adapter, addr, adapter->vfs_allocated_count);
6572
6573         return 0;
6574 }
6575
6576 static int igb_set_vf_mac_filter(struct igb_adapter *adapter, const int vf,
6577                                  const u32 info, const u8 *addr)
6578 {
6579         struct pci_dev *pdev = adapter->pdev;
6580         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6581         struct list_head *pos;
6582         struct vf_mac_filter *entry = NULL;
6583         int ret = 0;
6584
6585         switch (info) {
6586         case E1000_VF_MAC_FILTER_CLR:
6587                 /* remove all unicast MAC filters related to the current VF */
6588                 list_for_each(pos, &adapter->vf_macs.l) {
6589                         entry = list_entry(pos, struct vf_mac_filter, l);
6590                         if (entry->vf == vf) {
6591                                 entry->vf = -1;
6592                                 entry->free = true;
6593                                 igb_del_mac_filter(adapter, entry->vf_mac, vf);
6594                         }
6595                 }
6596                 break;
6597         case E1000_VF_MAC_FILTER_ADD:
6598                 if (vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) {
6599                         dev_warn(&pdev->dev,
6600                                  "VF %d requested MAC filter but is administratively denied\n",
6601                                  vf);
6602                         return -EINVAL;
6603                 }
6604
6605                 if (!is_valid_ether_addr(addr)) {
6606                         dev_warn(&pdev->dev,
6607                                  "VF %d attempted to set invalid MAC filter\n",
6608                                  vf);
6609                         return -EINVAL;
6610                 }
6611
6612                 /* try to find empty slot in the list */
6613                 list_for_each(pos, &adapter->vf_macs.l) {
6614                         entry = list_entry(pos, struct vf_mac_filter, l);
6615                         if (entry->free)
6616                                 break;
6617                 }
6618
6619                 if (entry && entry->free) {
6620                         entry->free = false;
6621                         entry->vf = vf;
6622                         ether_addr_copy(entry->vf_mac, addr);
6623
6624                         ret = igb_add_mac_filter(adapter, addr, vf);
6625                         ret = min_t(int, ret, 0);
6626                 } else {
6627                         ret = -ENOSPC;
6628                 }
6629
6630                 if (ret == -ENOSPC)
6631                         dev_warn(&pdev->dev,
6632                                  "VF %d has requested MAC filter but there is no space for it\n",
6633                                  vf);
6634                 break;
6635         default:
6636                 ret = -EINVAL;
6637                 break;
6638         }
6639
6640         return ret;
6641 }
6642
6643 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6644 {
6645         struct pci_dev *pdev = adapter->pdev;
6646         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6647         u32 info = msg[0] & E1000_VT_MSGINFO_MASK;
6648
6649         /* The VF MAC Address is stored in a packed array of bytes
6650          * starting at the second 32 bit word of the msg array
6651          */
6652         unsigned char *addr = (unsigned char *)&msg[1];
6653         int ret = 0;
6654
6655         if (!info) {
6656                 if (vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) {
6657                         dev_warn(&pdev->dev,
6658                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6659                                  vf);
6660                         return -EINVAL;
6661                 }
6662
6663                 if (!is_valid_ether_addr(addr)) {
6664                         dev_warn(&pdev->dev,
6665                                  "VF %d attempted to set invalid MAC\n",
6666                                  vf);
6667                         return -EINVAL;
6668                 }
6669
6670                 ret = igb_set_vf_mac(adapter, vf, addr);
6671         } else {
6672                 ret = igb_set_vf_mac_filter(adapter, vf, info, addr);
6673         }
6674
6675         return ret;
6676 }
6677
6678 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6679 {
6680         struct e1000_hw *hw = &adapter->hw;
6681         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6682         u32 msg = E1000_VT_MSGTYPE_NACK;
6683
6684         /* if device isn't clear to send it shouldn't be reading either */
6685         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6686             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6687                 igb_write_mbx(hw, &msg, 1, vf);
6688                 vf_data->last_nack = jiffies;
6689         }
6690 }
6691
6692 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6693 {
6694         struct pci_dev *pdev = adapter->pdev;
6695         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6696         struct e1000_hw *hw = &adapter->hw;
6697         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6698         s32 retval;
6699
6700         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf, false);
6701
6702         if (retval) {
6703                 /* if receive failed revoke VF CTS stats and restart init */
6704                 dev_err(&pdev->dev, "Error receiving message from VF\n");
6705                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
6706                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6707                         goto unlock;
6708                 goto out;
6709         }
6710
6711         /* this is a message we already processed, do nothing */
6712         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6713                 goto unlock;
6714
6715         /* until the vf completes a reset it should not be
6716          * allowed to start any configuration.
6717          */
6718         if (msgbuf[0] == E1000_VF_RESET) {
6719                 /* unlocks mailbox */
6720                 igb_vf_reset_msg(adapter, vf);
6721                 return;
6722         }
6723
6724         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6725                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6726                         goto unlock;
6727                 retval = -1;
6728                 goto out;
6729         }
6730
6731         switch ((msgbuf[0] & 0xFFFF)) {
6732         case E1000_VF_SET_MAC_ADDR:
6733                 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6734                 break;
6735         case E1000_VF_SET_PROMISC:
6736                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6737                 break;
6738         case E1000_VF_SET_MULTICAST:
6739                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6740                 break;
6741         case E1000_VF_SET_LPE:
6742                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6743                 break;
6744         case E1000_VF_SET_VLAN:
6745                 retval = -1;
6746                 if (vf_data->pf_vlan)
6747                         dev_warn(&pdev->dev,
6748                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6749                                  vf);
6750                 else
6751                         retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
6752                 break;
6753         default:
6754                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
6755                 retval = -1;
6756                 break;
6757         }
6758
6759         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6760 out:
6761         /* notify the VF of the results of what it sent us */
6762         if (retval)
6763                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6764         else
6765                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6766
6767         /* unlocks mailbox */
6768         igb_write_mbx(hw, msgbuf, 1, vf);
6769         return;
6770
6771 unlock:
6772         igb_unlock_mbx(hw, vf);
6773 }
6774
6775 static void igb_msg_task(struct igb_adapter *adapter)
6776 {
6777         struct e1000_hw *hw = &adapter->hw;
6778         u32 vf;
6779
6780         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6781                 /* process any reset requests */
6782                 if (!igb_check_for_rst(hw, vf))
6783                         igb_vf_reset_event(adapter, vf);
6784
6785                 /* process any messages pending */
6786                 if (!igb_check_for_msg(hw, vf))
6787                         igb_rcv_msg_from_vf(adapter, vf);
6788
6789                 /* process any acks */
6790                 if (!igb_check_for_ack(hw, vf))
6791                         igb_rcv_ack_from_vf(adapter, vf);
6792         }
6793 }
6794
6795 /**
6796  *  igb_set_uta - Set unicast filter table address
6797  *  @adapter: board private structure
6798  *  @set: boolean indicating if we are setting or clearing bits
6799  *
6800  *  The unicast table address is a register array of 32-bit registers.
6801  *  The table is meant to be used in a way similar to how the MTA is used
6802  *  however due to certain limitations in the hardware it is necessary to
6803  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6804  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6805  **/
6806 static void igb_set_uta(struct igb_adapter *adapter, bool set)
6807 {
6808         struct e1000_hw *hw = &adapter->hw;
6809         u32 uta = set ? ~0 : 0;
6810         int i;
6811
6812         /* we only need to do this if VMDq is enabled */
6813         if (!adapter->vfs_allocated_count)
6814                 return;
6815
6816         for (i = hw->mac.uta_reg_count; i--;)
6817                 array_wr32(E1000_UTA, i, uta);
6818 }
6819
6820 /**
6821  *  igb_intr_msi - Interrupt Handler
6822  *  @irq: interrupt number
6823  *  @data: pointer to a network interface device structure
6824  **/
6825 static irqreturn_t igb_intr_msi(int irq, void *data)
6826 {
6827         struct igb_adapter *adapter = data;
6828         struct igb_q_vector *q_vector = adapter->q_vector[0];
6829         struct e1000_hw *hw = &adapter->hw;
6830         /* read ICR disables interrupts using IAM */
6831         u32 icr = rd32(E1000_ICR);
6832
6833         igb_write_itr(q_vector);
6834
6835         if (icr & E1000_ICR_DRSTA)
6836                 schedule_work(&adapter->reset_task);
6837
6838         if (icr & E1000_ICR_DOUTSYNC) {
6839                 /* HW is reporting DMA is out of sync */
6840                 adapter->stats.doosync++;
6841         }
6842
6843         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6844                 hw->mac.get_link_status = 1;
6845                 if (!test_bit(__IGB_DOWN, &adapter->state))
6846                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6847         }
6848
6849         if (icr & E1000_ICR_TS)
6850                 igb_tsync_interrupt(adapter);
6851
6852         napi_schedule(&q_vector->napi);
6853
6854         return IRQ_HANDLED;
6855 }
6856
6857 /**
6858  *  igb_intr - Legacy Interrupt Handler
6859  *  @irq: interrupt number
6860  *  @data: pointer to a network interface device structure
6861  **/
6862 static irqreturn_t igb_intr(int irq, void *data)
6863 {
6864         struct igb_adapter *adapter = data;
6865         struct igb_q_vector *q_vector = adapter->q_vector[0];
6866         struct e1000_hw *hw = &adapter->hw;
6867         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6868          * need for the IMC write
6869          */
6870         u32 icr = rd32(E1000_ICR);
6871
6872         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6873          * not set, then the adapter didn't send an interrupt
6874          */
6875         if (!(icr & E1000_ICR_INT_ASSERTED))
6876                 return IRQ_NONE;
6877
6878         igb_write_itr(q_vector);
6879
6880         if (icr & E1000_ICR_DRSTA)
6881                 schedule_work(&adapter->reset_task);
6882
6883         if (icr & E1000_ICR_DOUTSYNC) {
6884                 /* HW is reporting DMA is out of sync */
6885                 adapter->stats.doosync++;
6886         }
6887
6888         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6889                 hw->mac.get_link_status = 1;
6890                 /* guard against interrupt when we're going down */
6891                 if (!test_bit(__IGB_DOWN, &adapter->state))
6892                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6893         }
6894
6895         if (icr & E1000_ICR_TS)
6896                 igb_tsync_interrupt(adapter);
6897
6898         napi_schedule(&q_vector->napi);
6899
6900         return IRQ_HANDLED;
6901 }
6902
6903 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6904 {
6905         struct igb_adapter *adapter = q_vector->adapter;
6906         struct e1000_hw *hw = &adapter->hw;
6907
6908         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6909             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6910                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6911                         igb_set_itr(q_vector);
6912                 else
6913                         igb_update_ring_itr(q_vector);
6914         }
6915
6916         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6917                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
6918                         wr32(E1000_EIMS, q_vector->eims_value);
6919                 else
6920                         igb_irq_enable(adapter);
6921         }
6922 }
6923
6924 /**
6925  *  igb_poll - NAPI Rx polling callback
6926  *  @napi: napi polling structure
6927  *  @budget: count of how many packets we should handle
6928  **/
6929 static int igb_poll(struct napi_struct *napi, int budget)
6930 {
6931         struct igb_q_vector *q_vector = container_of(napi,
6932                                                      struct igb_q_vector,
6933                                                      napi);
6934         bool clean_complete = true;
6935         int work_done = 0;
6936
6937 #ifdef CONFIG_IGB_DCA
6938         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6939                 igb_update_dca(q_vector);
6940 #endif
6941         if (q_vector->tx.ring)
6942                 clean_complete = igb_clean_tx_irq(q_vector, budget);
6943
6944         if (q_vector->rx.ring) {
6945                 int cleaned = igb_clean_rx_irq(q_vector, budget);
6946
6947                 work_done += cleaned;
6948                 if (cleaned >= budget)
6949                         clean_complete = false;
6950         }
6951
6952         /* If all work not completed, return budget and keep polling */
6953         if (!clean_complete)
6954                 return budget;
6955
6956         /* If not enough Rx work done, exit the polling mode */
6957         napi_complete_done(napi, work_done);
6958         igb_ring_irq_enable(q_vector);
6959
6960         return 0;
6961 }
6962
6963 /**
6964  *  igb_clean_tx_irq - Reclaim resources after transmit completes
6965  *  @q_vector: pointer to q_vector containing needed info
6966  *  @napi_budget: Used to determine if we are in netpoll
6967  *
6968  *  returns true if ring is completely cleaned
6969  **/
6970 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
6971 {
6972         struct igb_adapter *adapter = q_vector->adapter;
6973         struct igb_ring *tx_ring = q_vector->tx.ring;
6974         struct igb_tx_buffer *tx_buffer;
6975         union e1000_adv_tx_desc *tx_desc;
6976         unsigned int total_bytes = 0, total_packets = 0;
6977         unsigned int budget = q_vector->tx.work_limit;
6978         unsigned int i = tx_ring->next_to_clean;
6979
6980         if (test_bit(__IGB_DOWN, &adapter->state))
6981                 return true;
6982
6983         tx_buffer = &tx_ring->tx_buffer_info[i];
6984         tx_desc = IGB_TX_DESC(tx_ring, i);
6985         i -= tx_ring->count;
6986
6987         do {
6988                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6989
6990                 /* if next_to_watch is not set then there is no work pending */
6991                 if (!eop_desc)
6992                         break;
6993
6994                 /* prevent any other reads prior to eop_desc */
6995                 smp_rmb();
6996
6997                 /* if DD is not set pending work has not been completed */
6998                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6999                         break;
7000
7001                 /* clear next_to_watch to prevent false hangs */
7002                 tx_buffer->next_to_watch = NULL;
7003
7004                 /* update the statistics for this packet */
7005                 total_bytes += tx_buffer->bytecount;
7006                 total_packets += tx_buffer->gso_segs;
7007
7008                 /* free the skb */
7009                 napi_consume_skb(tx_buffer->skb, napi_budget);
7010
7011                 /* unmap skb header data */
7012                 dma_unmap_single(tx_ring->dev,
7013                                  dma_unmap_addr(tx_buffer, dma),
7014                                  dma_unmap_len(tx_buffer, len),
7015                                  DMA_TO_DEVICE);
7016
7017                 /* clear tx_buffer data */
7018                 dma_unmap_len_set(tx_buffer, len, 0);
7019
7020                 /* clear last DMA location and unmap remaining buffers */
7021                 while (tx_desc != eop_desc) {
7022                         tx_buffer++;
7023                         tx_desc++;
7024                         i++;
7025                         if (unlikely(!i)) {
7026                                 i -= tx_ring->count;
7027                                 tx_buffer = tx_ring->tx_buffer_info;
7028                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
7029                         }
7030
7031                         /* unmap any remaining paged data */
7032                         if (dma_unmap_len(tx_buffer, len)) {
7033                                 dma_unmap_page(tx_ring->dev,
7034                                                dma_unmap_addr(tx_buffer, dma),
7035                                                dma_unmap_len(tx_buffer, len),
7036                                                DMA_TO_DEVICE);
7037                                 dma_unmap_len_set(tx_buffer, len, 0);
7038                         }
7039                 }
7040
7041                 /* move us one more past the eop_desc for start of next pkt */
7042                 tx_buffer++;
7043                 tx_desc++;
7044                 i++;
7045                 if (unlikely(!i)) {
7046                         i -= tx_ring->count;
7047                         tx_buffer = tx_ring->tx_buffer_info;
7048                         tx_desc = IGB_TX_DESC(tx_ring, 0);
7049                 }
7050
7051                 /* issue prefetch for next Tx descriptor */
7052                 prefetch(tx_desc);
7053
7054                 /* update budget accounting */
7055                 budget--;
7056         } while (likely(budget));
7057
7058         netdev_tx_completed_queue(txring_txq(tx_ring),
7059                                   total_packets, total_bytes);
7060         i += tx_ring->count;
7061         tx_ring->next_to_clean = i;
7062         u64_stats_update_begin(&tx_ring->tx_syncp);
7063         tx_ring->tx_stats.bytes += total_bytes;
7064         tx_ring->tx_stats.packets += total_packets;
7065         u64_stats_update_end(&tx_ring->tx_syncp);
7066         q_vector->tx.total_bytes += total_bytes;
7067         q_vector->tx.total_packets += total_packets;
7068
7069         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7070                 struct e1000_hw *hw = &adapter->hw;
7071
7072                 /* Detect a transmit hang in hardware, this serializes the
7073                  * check with the clearing of time_stamp and movement of i
7074                  */
7075                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7076                 if (tx_buffer->next_to_watch &&
7077                     time_after(jiffies, tx_buffer->time_stamp +
7078                                (adapter->tx_timeout_factor * HZ)) &&
7079                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
7080
7081                         /* detected Tx unit hang */
7082                         dev_err(tx_ring->dev,
7083                                 "Detected Tx Unit Hang\n"
7084                                 "  Tx Queue             <%d>\n"
7085                                 "  TDH                  <%x>\n"
7086                                 "  TDT                  <%x>\n"
7087                                 "  next_to_use          <%x>\n"
7088                                 "  next_to_clean        <%x>\n"
7089                                 "buffer_info[next_to_clean]\n"
7090                                 "  time_stamp           <%lx>\n"
7091                                 "  next_to_watch        <%p>\n"
7092                                 "  jiffies              <%lx>\n"
7093                                 "  desc.status          <%x>\n",
7094                                 tx_ring->queue_index,
7095                                 rd32(E1000_TDH(tx_ring->reg_idx)),
7096                                 readl(tx_ring->tail),
7097                                 tx_ring->next_to_use,
7098                                 tx_ring->next_to_clean,
7099                                 tx_buffer->time_stamp,
7100                                 tx_buffer->next_to_watch,
7101                                 jiffies,
7102                                 tx_buffer->next_to_watch->wb.status);
7103                         netif_stop_subqueue(tx_ring->netdev,
7104                                             tx_ring->queue_index);
7105
7106                         /* we are about to reset, no point in enabling stuff */
7107                         return true;
7108                 }
7109         }
7110
7111 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7112         if (unlikely(total_packets &&
7113             netif_carrier_ok(tx_ring->netdev) &&
7114             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7115                 /* Make sure that anybody stopping the queue after this
7116                  * sees the new next_to_clean.
7117                  */
7118                 smp_mb();
7119                 if (__netif_subqueue_stopped(tx_ring->netdev,
7120                                              tx_ring->queue_index) &&
7121                     !(test_bit(__IGB_DOWN, &adapter->state))) {
7122                         netif_wake_subqueue(tx_ring->netdev,
7123                                             tx_ring->queue_index);
7124
7125                         u64_stats_update_begin(&tx_ring->tx_syncp);
7126                         tx_ring->tx_stats.restart_queue++;
7127                         u64_stats_update_end(&tx_ring->tx_syncp);
7128                 }
7129         }
7130
7131         return !!budget;
7132 }
7133
7134 /**
7135  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
7136  *  @rx_ring: rx descriptor ring to store buffers on
7137  *  @old_buff: donor buffer to have page reused
7138  *
7139  *  Synchronizes page for reuse by the adapter
7140  **/
7141 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7142                               struct igb_rx_buffer *old_buff)
7143 {
7144         struct igb_rx_buffer *new_buff;
7145         u16 nta = rx_ring->next_to_alloc;
7146
7147         new_buff = &rx_ring->rx_buffer_info[nta];
7148
7149         /* update, and store next to alloc */
7150         nta++;
7151         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7152
7153         /* Transfer page from old buffer to new buffer.
7154          * Move each member individually to avoid possible store
7155          * forwarding stalls.
7156          */
7157         new_buff->dma           = old_buff->dma;
7158         new_buff->page          = old_buff->page;
7159         new_buff->page_offset   = old_buff->page_offset;
7160         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
7161 }
7162
7163 static inline bool igb_page_is_reserved(struct page *page)
7164 {
7165         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
7166 }
7167
7168 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer)
7169 {
7170         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
7171         struct page *page = rx_buffer->page;
7172
7173         /* avoid re-using remote pages */
7174         if (unlikely(igb_page_is_reserved(page)))
7175                 return false;
7176
7177 #if (PAGE_SIZE < 8192)
7178         /* if we are only owner of page we can reuse it */
7179         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
7180                 return false;
7181 #else
7182 #define IGB_LAST_OFFSET \
7183         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IGB_RXBUFFER_2048)
7184
7185         if (rx_buffer->page_offset > IGB_LAST_OFFSET)
7186                 return false;
7187 #endif
7188
7189         /* If we have drained the page fragment pool we need to update
7190          * the pagecnt_bias and page count so that we fully restock the
7191          * number of references the driver holds.
7192          */
7193         if (unlikely(!pagecnt_bias)) {
7194                 page_ref_add(page, USHRT_MAX);
7195                 rx_buffer->pagecnt_bias = USHRT_MAX;
7196         }
7197
7198         return true;
7199 }
7200
7201 /**
7202  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7203  *  @rx_ring: rx descriptor ring to transact packets on
7204  *  @rx_buffer: buffer containing page to add
7205  *  @skb: sk_buff to place the data into
7206  *  @size: size of buffer to be added
7207  *
7208  *  This function will add the data contained in rx_buffer->page to the skb.
7209  **/
7210 static void igb_add_rx_frag(struct igb_ring *rx_ring,
7211                             struct igb_rx_buffer *rx_buffer,
7212                             struct sk_buff *skb,
7213                             unsigned int size)
7214 {
7215 #if (PAGE_SIZE < 8192)
7216         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
7217 #else
7218         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
7219                                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) :
7220                                 SKB_DATA_ALIGN(size);
7221 #endif
7222         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
7223                         rx_buffer->page_offset, size, truesize);
7224 #if (PAGE_SIZE < 8192)
7225         rx_buffer->page_offset ^= truesize;
7226 #else
7227         rx_buffer->page_offset += truesize;
7228 #endif
7229 }
7230
7231 static struct sk_buff *igb_construct_skb(struct igb_ring *rx_ring,
7232                                          struct igb_rx_buffer *rx_buffer,
7233                                          union e1000_adv_rx_desc *rx_desc,
7234                                          unsigned int size)
7235 {
7236         void *va = page_address(rx_buffer->page) + rx_buffer->page_offset;
7237 #if (PAGE_SIZE < 8192)
7238         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
7239 #else
7240         unsigned int truesize = SKB_DATA_ALIGN(size);
7241 #endif
7242         unsigned int headlen;
7243         struct sk_buff *skb;
7244
7245         /* prefetch first cache line of first page */
7246         prefetch(va);
7247 #if L1_CACHE_BYTES < 128
7248         prefetch(va + L1_CACHE_BYTES);
7249 #endif
7250
7251         /* allocate a skb to store the frags */
7252         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
7253         if (unlikely(!skb))
7254                 return NULL;
7255
7256         if (unlikely(igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))) {
7257                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7258                 va += IGB_TS_HDR_LEN;
7259                 size -= IGB_TS_HDR_LEN;
7260         }
7261
7262         /* Determine available headroom for copy */
7263         headlen = size;
7264         if (headlen > IGB_RX_HDR_LEN)
7265                 headlen = eth_get_headlen(va, IGB_RX_HDR_LEN);
7266
7267         /* align pull length to size of long to optimize memcpy performance */
7268         memcpy(__skb_put(skb, headlen), va, ALIGN(headlen, sizeof(long)));
7269
7270         /* update all of the pointers */
7271         size -= headlen;
7272         if (size) {
7273                 skb_add_rx_frag(skb, 0, rx_buffer->page,
7274                                 (va + headlen) - page_address(rx_buffer->page),
7275                                 size, truesize);
7276 #if (PAGE_SIZE < 8192)
7277                 rx_buffer->page_offset ^= truesize;
7278 #else
7279                 rx_buffer->page_offset += truesize;
7280 #endif
7281         } else {
7282                 rx_buffer->pagecnt_bias++;
7283         }
7284
7285         return skb;
7286 }
7287
7288 static struct sk_buff *igb_build_skb(struct igb_ring *rx_ring,
7289                                      struct igb_rx_buffer *rx_buffer,
7290                                      union e1000_adv_rx_desc *rx_desc,
7291                                      unsigned int size)
7292 {
7293         void *va = page_address(rx_buffer->page) + rx_buffer->page_offset;
7294 #if (PAGE_SIZE < 8192)
7295         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
7296 #else
7297         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
7298                                 SKB_DATA_ALIGN(IGB_SKB_PAD + size);
7299 #endif
7300         struct sk_buff *skb;
7301
7302         /* prefetch first cache line of first page */
7303         prefetch(va);
7304 #if L1_CACHE_BYTES < 128
7305         prefetch(va + L1_CACHE_BYTES);
7306 #endif
7307
7308         /* build an skb around the page buffer */
7309         skb = build_skb(va - IGB_SKB_PAD, truesize);
7310         if (unlikely(!skb))
7311                 return NULL;
7312
7313         /* update pointers within the skb to store the data */
7314         skb_reserve(skb, IGB_SKB_PAD);
7315         __skb_put(skb, size);
7316
7317         /* pull timestamp out of packet data */
7318         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7319                 igb_ptp_rx_pktstamp(rx_ring->q_vector, skb->data, skb);
7320                 __skb_pull(skb, IGB_TS_HDR_LEN);
7321         }
7322
7323         /* update buffer offset */
7324 #if (PAGE_SIZE < 8192)
7325         rx_buffer->page_offset ^= truesize;
7326 #else
7327         rx_buffer->page_offset += truesize;
7328 #endif
7329
7330         return skb;
7331 }
7332
7333 static inline void igb_rx_checksum(struct igb_ring *ring,
7334                                    union e1000_adv_rx_desc *rx_desc,
7335                                    struct sk_buff *skb)
7336 {
7337         skb_checksum_none_assert(skb);
7338
7339         /* Ignore Checksum bit is set */
7340         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7341                 return;
7342
7343         /* Rx checksum disabled via ethtool */
7344         if (!(ring->netdev->features & NETIF_F_RXCSUM))
7345                 return;
7346
7347         /* TCP/UDP checksum error bit is set */
7348         if (igb_test_staterr(rx_desc,
7349                              E1000_RXDEXT_STATERR_TCPE |
7350                              E1000_RXDEXT_STATERR_IPE)) {
7351                 /* work around errata with sctp packets where the TCPE aka
7352                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7353                  * packets, (aka let the stack check the crc32c)
7354                  */
7355                 if (!((skb->len == 60) &&
7356                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
7357                         u64_stats_update_begin(&ring->rx_syncp);
7358                         ring->rx_stats.csum_err++;
7359                         u64_stats_update_end(&ring->rx_syncp);
7360                 }
7361                 /* let the stack verify checksum errors */
7362                 return;
7363         }
7364         /* It must be a TCP or UDP packet with a valid checksum */
7365         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7366                                       E1000_RXD_STAT_UDPCS))
7367                 skb->ip_summed = CHECKSUM_UNNECESSARY;
7368
7369         dev_dbg(ring->dev, "cksum success: bits %08X\n",
7370                 le32_to_cpu(rx_desc->wb.upper.status_error));
7371 }
7372
7373 static inline void igb_rx_hash(struct igb_ring *ring,
7374                                union e1000_adv_rx_desc *rx_desc,
7375                                struct sk_buff *skb)
7376 {
7377         if (ring->netdev->features & NETIF_F_RXHASH)
7378                 skb_set_hash(skb,
7379                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7380                              PKT_HASH_TYPE_L3);
7381 }
7382
7383 /**
7384  *  igb_is_non_eop - process handling of non-EOP buffers
7385  *  @rx_ring: Rx ring being processed
7386  *  @rx_desc: Rx descriptor for current buffer
7387  *  @skb: current socket buffer containing buffer in progress
7388  *
7389  *  This function updates next to clean.  If the buffer is an EOP buffer
7390  *  this function exits returning false, otherwise it will place the
7391  *  sk_buff in the next buffer to be chained and return true indicating
7392  *  that this is in fact a non-EOP buffer.
7393  **/
7394 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7395                            union e1000_adv_rx_desc *rx_desc)
7396 {
7397         u32 ntc = rx_ring->next_to_clean + 1;
7398
7399         /* fetch, update, and store next to clean */
7400         ntc = (ntc < rx_ring->count) ? ntc : 0;
7401         rx_ring->next_to_clean = ntc;
7402
7403         prefetch(IGB_RX_DESC(rx_ring, ntc));
7404
7405         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7406                 return false;
7407
7408         return true;
7409 }
7410
7411 /**
7412  *  igb_cleanup_headers - Correct corrupted or empty headers
7413  *  @rx_ring: rx descriptor ring packet is being transacted on
7414  *  @rx_desc: pointer to the EOP Rx descriptor
7415  *  @skb: pointer to current skb being fixed
7416  *
7417  *  Address the case where we are pulling data in on pages only
7418  *  and as such no data is present in the skb header.
7419  *
7420  *  In addition if skb is not at least 60 bytes we need to pad it so that
7421  *  it is large enough to qualify as a valid Ethernet frame.
7422  *
7423  *  Returns true if an error was encountered and skb was freed.
7424  **/
7425 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
7426                                 union e1000_adv_rx_desc *rx_desc,
7427                                 struct sk_buff *skb)
7428 {
7429         if (unlikely((igb_test_staterr(rx_desc,
7430                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
7431                 struct net_device *netdev = rx_ring->netdev;
7432                 if (!(netdev->features & NETIF_F_RXALL)) {
7433                         dev_kfree_skb_any(skb);
7434                         return true;
7435                 }
7436         }
7437
7438         /* if eth_skb_pad returns an error the skb was freed */
7439         if (eth_skb_pad(skb))
7440                 return true;
7441
7442         return false;
7443 }
7444
7445 /**
7446  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
7447  *  @rx_ring: rx descriptor ring packet is being transacted on
7448  *  @rx_desc: pointer to the EOP Rx descriptor
7449  *  @skb: pointer to current skb being populated
7450  *
7451  *  This function checks the ring, descriptor, and packet information in
7452  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
7453  *  other fields within the skb.
7454  **/
7455 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7456                                    union e1000_adv_rx_desc *rx_desc,
7457                                    struct sk_buff *skb)
7458 {
7459         struct net_device *dev = rx_ring->netdev;
7460
7461         igb_rx_hash(rx_ring, rx_desc, skb);
7462
7463         igb_rx_checksum(rx_ring, rx_desc, skb);
7464
7465         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
7466             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
7467                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
7468
7469         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7470             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7471                 u16 vid;
7472
7473                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7474                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7475                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7476                 else
7477                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7478
7479                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7480         }
7481
7482         skb_record_rx_queue(skb, rx_ring->queue_index);
7483
7484         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
7485 }
7486
7487 static struct igb_rx_buffer *igb_get_rx_buffer(struct igb_ring *rx_ring,
7488                                                const unsigned int size)
7489 {
7490         struct igb_rx_buffer *rx_buffer;
7491
7492         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7493         prefetchw(rx_buffer->page);
7494
7495         /* we are reusing so sync this buffer for CPU use */
7496         dma_sync_single_range_for_cpu(rx_ring->dev,
7497                                       rx_buffer->dma,
7498                                       rx_buffer->page_offset,
7499                                       size,
7500                                       DMA_FROM_DEVICE);
7501
7502         rx_buffer->pagecnt_bias--;
7503
7504         return rx_buffer;
7505 }
7506
7507 static void igb_put_rx_buffer(struct igb_ring *rx_ring,
7508                               struct igb_rx_buffer *rx_buffer)
7509 {
7510         if (igb_can_reuse_rx_page(rx_buffer)) {
7511                 /* hand second half of page back to the ring */
7512                 igb_reuse_rx_page(rx_ring, rx_buffer);
7513         } else {
7514                 /* We are not reusing the buffer so unmap it and free
7515                  * any references we are holding to it
7516                  */
7517                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
7518                                      igb_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
7519                                      IGB_RX_DMA_ATTR);
7520                 __page_frag_cache_drain(rx_buffer->page,
7521                                         rx_buffer->pagecnt_bias);
7522         }
7523
7524         /* clear contents of rx_buffer */
7525         rx_buffer->page = NULL;
7526 }
7527
7528 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
7529 {
7530         struct igb_ring *rx_ring = q_vector->rx.ring;
7531         struct sk_buff *skb = rx_ring->skb;
7532         unsigned int total_bytes = 0, total_packets = 0;
7533         u16 cleaned_count = igb_desc_unused(rx_ring);
7534
7535         while (likely(total_packets < budget)) {
7536                 union e1000_adv_rx_desc *rx_desc;
7537                 struct igb_rx_buffer *rx_buffer;
7538                 unsigned int size;
7539
7540                 /* return some buffers to hardware, one at a time is too slow */
7541                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7542                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
7543                         cleaned_count = 0;
7544                 }
7545
7546                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
7547                 size = le16_to_cpu(rx_desc->wb.upper.length);
7548                 if (!size)
7549                         break;
7550
7551                 /* This memory barrier is needed to keep us from reading
7552                  * any other fields out of the rx_desc until we know the
7553                  * descriptor has been written back
7554                  */
7555                 dma_rmb();
7556
7557                 rx_buffer = igb_get_rx_buffer(rx_ring, size);
7558
7559                 /* retrieve a buffer from the ring */
7560                 if (skb)
7561                         igb_add_rx_frag(rx_ring, rx_buffer, skb, size);
7562                 else if (ring_uses_build_skb(rx_ring))
7563                         skb = igb_build_skb(rx_ring, rx_buffer, rx_desc, size);
7564                 else
7565                         skb = igb_construct_skb(rx_ring, rx_buffer,
7566                                                 rx_desc, size);
7567
7568                 /* exit if we failed to retrieve a buffer */
7569                 if (!skb) {
7570                         rx_ring->rx_stats.alloc_failed++;
7571                         rx_buffer->pagecnt_bias++;
7572                         break;
7573                 }
7574
7575                 igb_put_rx_buffer(rx_ring, rx_buffer);
7576                 cleaned_count++;
7577
7578                 /* fetch next buffer in frame if non-eop */
7579                 if (igb_is_non_eop(rx_ring, rx_desc))
7580                         continue;
7581
7582                 /* verify the packet layout is correct */
7583                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
7584                         skb = NULL;
7585                         continue;
7586                 }
7587
7588                 /* probably a little skewed due to removing CRC */
7589                 total_bytes += skb->len;
7590
7591                 /* populate checksum, timestamp, VLAN, and protocol */
7592                 igb_process_skb_fields(rx_ring, rx_desc, skb);
7593
7594                 napi_gro_receive(&q_vector->napi, skb);
7595
7596                 /* reset skb pointer */
7597                 skb = NULL;
7598
7599                 /* update budget accounting */
7600                 total_packets++;
7601         }
7602
7603         /* place incomplete frames back on ring for completion */
7604         rx_ring->skb = skb;
7605
7606         u64_stats_update_begin(&rx_ring->rx_syncp);
7607         rx_ring->rx_stats.packets += total_packets;
7608         rx_ring->rx_stats.bytes += total_bytes;
7609         u64_stats_update_end(&rx_ring->rx_syncp);
7610         q_vector->rx.total_packets += total_packets;
7611         q_vector->rx.total_bytes += total_bytes;
7612
7613         if (cleaned_count)
7614                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
7615
7616         return total_packets;
7617 }
7618
7619 static inline unsigned int igb_rx_offset(struct igb_ring *rx_ring)
7620 {
7621         return ring_uses_build_skb(rx_ring) ? IGB_SKB_PAD : 0;
7622 }
7623
7624 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
7625                                   struct igb_rx_buffer *bi)
7626 {
7627         struct page *page = bi->page;
7628         dma_addr_t dma;
7629
7630         /* since we are recycling buffers we should seldom need to alloc */
7631         if (likely(page))
7632                 return true;
7633
7634         /* alloc new page for storage */
7635         page = dev_alloc_pages(igb_rx_pg_order(rx_ring));
7636         if (unlikely(!page)) {
7637                 rx_ring->rx_stats.alloc_failed++;
7638                 return false;
7639         }
7640
7641         /* map page for use */
7642         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
7643                                  igb_rx_pg_size(rx_ring),
7644                                  DMA_FROM_DEVICE,
7645                                  IGB_RX_DMA_ATTR);
7646
7647         /* if mapping failed free memory back to system since
7648          * there isn't much point in holding memory we can't use
7649          */
7650         if (dma_mapping_error(rx_ring->dev, dma)) {
7651                 __free_pages(page, igb_rx_pg_order(rx_ring));
7652
7653                 rx_ring->rx_stats.alloc_failed++;
7654                 return false;
7655         }
7656
7657         bi->dma = dma;
7658         bi->page = page;
7659         bi->page_offset = igb_rx_offset(rx_ring);
7660         bi->pagecnt_bias = 1;
7661
7662         return true;
7663 }
7664
7665 /**
7666  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
7667  *  @adapter: address of board private structure
7668  **/
7669 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
7670 {
7671         union e1000_adv_rx_desc *rx_desc;
7672         struct igb_rx_buffer *bi;
7673         u16 i = rx_ring->next_to_use;
7674         u16 bufsz;
7675
7676         /* nothing to do */
7677         if (!cleaned_count)
7678                 return;
7679
7680         rx_desc = IGB_RX_DESC(rx_ring, i);
7681         bi = &rx_ring->rx_buffer_info[i];
7682         i -= rx_ring->count;
7683
7684         bufsz = igb_rx_bufsz(rx_ring);
7685
7686         do {
7687                 if (!igb_alloc_mapped_page(rx_ring, bi))
7688                         break;
7689
7690                 /* sync the buffer for use by the device */
7691                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
7692                                                  bi->page_offset, bufsz,
7693                                                  DMA_FROM_DEVICE);
7694
7695                 /* Refresh the desc even if buffer_addrs didn't change
7696                  * because each write-back erases this info.
7697                  */
7698                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
7699
7700                 rx_desc++;
7701                 bi++;
7702                 i++;
7703                 if (unlikely(!i)) {
7704                         rx_desc = IGB_RX_DESC(rx_ring, 0);
7705                         bi = rx_ring->rx_buffer_info;
7706                         i -= rx_ring->count;
7707                 }
7708
7709                 /* clear the length for the next_to_use descriptor */
7710                 rx_desc->wb.upper.length = 0;
7711
7712                 cleaned_count--;
7713         } while (cleaned_count);
7714
7715         i += rx_ring->count;
7716
7717         if (rx_ring->next_to_use != i) {
7718                 /* record the next descriptor to use */
7719                 rx_ring->next_to_use = i;
7720
7721                 /* update next to alloc since we have filled the ring */
7722                 rx_ring->next_to_alloc = i;
7723
7724                 /* Force memory writes to complete before letting h/w
7725                  * know there are new descriptors to fetch.  (Only
7726                  * applicable for weak-ordered memory model archs,
7727                  * such as IA-64).
7728                  */
7729                 wmb();
7730                 writel(i, rx_ring->tail);
7731         }
7732 }
7733
7734 /**
7735  * igb_mii_ioctl -
7736  * @netdev:
7737  * @ifreq:
7738  * @cmd:
7739  **/
7740 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7741 {
7742         struct igb_adapter *adapter = netdev_priv(netdev);
7743         struct mii_ioctl_data *data = if_mii(ifr);
7744
7745         if (adapter->hw.phy.media_type != e1000_media_type_copper)
7746                 return -EOPNOTSUPP;
7747
7748         switch (cmd) {
7749         case SIOCGMIIPHY:
7750                 data->phy_id = adapter->hw.phy.addr;
7751                 break;
7752         case SIOCGMIIREG:
7753                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
7754                                      &data->val_out))
7755                         return -EIO;
7756                 break;
7757         case SIOCSMIIREG:
7758         default:
7759                 return -EOPNOTSUPP;
7760         }
7761         return 0;
7762 }
7763
7764 /**
7765  * igb_ioctl -
7766  * @netdev:
7767  * @ifreq:
7768  * @cmd:
7769  **/
7770 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7771 {
7772         switch (cmd) {
7773         case SIOCGMIIPHY:
7774         case SIOCGMIIREG:
7775         case SIOCSMIIREG:
7776                 return igb_mii_ioctl(netdev, ifr, cmd);
7777         case SIOCGHWTSTAMP:
7778                 return igb_ptp_get_ts_config(netdev, ifr);
7779         case SIOCSHWTSTAMP:
7780                 return igb_ptp_set_ts_config(netdev, ifr);
7781         default:
7782                 return -EOPNOTSUPP;
7783         }
7784 }
7785
7786 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7787 {
7788         struct igb_adapter *adapter = hw->back;
7789
7790         pci_read_config_word(adapter->pdev, reg, value);
7791 }
7792
7793 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7794 {
7795         struct igb_adapter *adapter = hw->back;
7796
7797         pci_write_config_word(adapter->pdev, reg, *value);
7798 }
7799
7800 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7801 {
7802         struct igb_adapter *adapter = hw->back;
7803
7804         if (pcie_capability_read_word(adapter->pdev, reg, value))
7805                 return -E1000_ERR_CONFIG;
7806
7807         return 0;
7808 }
7809
7810 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7811 {
7812         struct igb_adapter *adapter = hw->back;
7813
7814         if (pcie_capability_write_word(adapter->pdev, reg, *value))
7815                 return -E1000_ERR_CONFIG;
7816
7817         return 0;
7818 }
7819
7820 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
7821 {
7822         struct igb_adapter *adapter = netdev_priv(netdev);
7823         struct e1000_hw *hw = &adapter->hw;
7824         u32 ctrl, rctl;
7825         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
7826
7827         if (enable) {
7828                 /* enable VLAN tag insert/strip */
7829                 ctrl = rd32(E1000_CTRL);
7830                 ctrl |= E1000_CTRL_VME;
7831                 wr32(E1000_CTRL, ctrl);
7832
7833                 /* Disable CFI check */
7834                 rctl = rd32(E1000_RCTL);
7835                 rctl &= ~E1000_RCTL_CFIEN;
7836                 wr32(E1000_RCTL, rctl);
7837         } else {
7838                 /* disable VLAN tag insert/strip */
7839                 ctrl = rd32(E1000_CTRL);
7840                 ctrl &= ~E1000_CTRL_VME;
7841                 wr32(E1000_CTRL, ctrl);
7842         }
7843
7844         igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
7845 }
7846
7847 static int igb_vlan_rx_add_vid(struct net_device *netdev,
7848                                __be16 proto, u16 vid)
7849 {
7850         struct igb_adapter *adapter = netdev_priv(netdev);
7851         struct e1000_hw *hw = &adapter->hw;
7852         int pf_id = adapter->vfs_allocated_count;
7853
7854         /* add the filter since PF can receive vlans w/o entry in vlvf */
7855         if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
7856                 igb_vfta_set(hw, vid, pf_id, true, !!vid);
7857
7858         set_bit(vid, adapter->active_vlans);
7859
7860         return 0;
7861 }
7862
7863 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
7864                                 __be16 proto, u16 vid)
7865 {
7866         struct igb_adapter *adapter = netdev_priv(netdev);
7867         int pf_id = adapter->vfs_allocated_count;
7868         struct e1000_hw *hw = &adapter->hw;
7869
7870         /* remove VID from filter table */
7871         if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
7872                 igb_vfta_set(hw, vid, pf_id, false, true);
7873
7874         clear_bit(vid, adapter->active_vlans);
7875
7876         return 0;
7877 }
7878
7879 static void igb_restore_vlan(struct igb_adapter *adapter)
7880 {
7881         u16 vid = 1;
7882
7883         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7884         igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
7885
7886         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
7887                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
7888 }
7889
7890 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7891 {
7892         struct pci_dev *pdev = adapter->pdev;
7893         struct e1000_mac_info *mac = &adapter->hw.mac;
7894
7895         mac->autoneg = 0;
7896
7897         /* Make sure dplx is at most 1 bit and lsb of speed is not set
7898          * for the switch() below to work
7899          */
7900         if ((spd & 1) || (dplx & ~1))
7901                 goto err_inval;
7902
7903         /* Fiber NIC's only allow 1000 gbps Full duplex
7904          * and 100Mbps Full duplex for 100baseFx sfp
7905          */
7906         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7907                 switch (spd + dplx) {
7908                 case SPEED_10 + DUPLEX_HALF:
7909                 case SPEED_10 + DUPLEX_FULL:
7910                 case SPEED_100 + DUPLEX_HALF:
7911                         goto err_inval;
7912                 default:
7913                         break;
7914                 }
7915         }
7916
7917         switch (spd + dplx) {
7918         case SPEED_10 + DUPLEX_HALF:
7919                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7920                 break;
7921         case SPEED_10 + DUPLEX_FULL:
7922                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7923                 break;
7924         case SPEED_100 + DUPLEX_HALF:
7925                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7926                 break;
7927         case SPEED_100 + DUPLEX_FULL:
7928                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7929                 break;
7930         case SPEED_1000 + DUPLEX_FULL:
7931                 mac->autoneg = 1;
7932                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7933                 break;
7934         case SPEED_1000 + DUPLEX_HALF: /* not supported */
7935         default:
7936                 goto err_inval;
7937         }
7938
7939         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7940         adapter->hw.phy.mdix = AUTO_ALL_MODES;
7941
7942         return 0;
7943
7944 err_inval:
7945         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7946         return -EINVAL;
7947 }
7948
7949 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7950                           bool runtime)
7951 {
7952         struct net_device *netdev = pci_get_drvdata(pdev);
7953         struct igb_adapter *adapter = netdev_priv(netdev);
7954         struct e1000_hw *hw = &adapter->hw;
7955         u32 ctrl, rctl, status;
7956         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7957         bool wake;
7958
7959         rtnl_lock();
7960         netif_device_detach(netdev);
7961
7962         if (netif_running(netdev))
7963                 __igb_close(netdev, true);
7964
7965         igb_ptp_suspend(adapter);
7966
7967         igb_clear_interrupt_scheme(adapter);
7968         rtnl_unlock();
7969
7970         status = rd32(E1000_STATUS);
7971         if (status & E1000_STATUS_LU)
7972                 wufc &= ~E1000_WUFC_LNKC;
7973
7974         if (wufc) {
7975                 igb_setup_rctl(adapter);
7976                 igb_set_rx_mode(netdev);
7977
7978                 /* turn on all-multi mode if wake on multicast is enabled */
7979                 if (wufc & E1000_WUFC_MC) {
7980                         rctl = rd32(E1000_RCTL);
7981                         rctl |= E1000_RCTL_MPE;
7982                         wr32(E1000_RCTL, rctl);
7983                 }
7984
7985                 ctrl = rd32(E1000_CTRL);
7986                 ctrl |= E1000_CTRL_ADVD3WUC;
7987                 wr32(E1000_CTRL, ctrl);
7988
7989                 /* Allow time for pending master requests to run */
7990                 igb_disable_pcie_master(hw);
7991
7992                 wr32(E1000_WUC, E1000_WUC_PME_EN);
7993                 wr32(E1000_WUFC, wufc);
7994         } else {
7995                 wr32(E1000_WUC, 0);
7996                 wr32(E1000_WUFC, 0);
7997         }
7998
7999         wake = wufc || adapter->en_mng_pt;
8000         if (!wake)
8001                 igb_power_down_link(adapter);
8002         else
8003                 igb_power_up_link(adapter);
8004
8005         if (enable_wake)
8006                 *enable_wake = wake;
8007
8008         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
8009          * would have already happened in close and is redundant.
8010          */
8011         igb_release_hw_control(adapter);
8012
8013         pci_disable_device(pdev);
8014
8015         return 0;
8016 }
8017
8018 static void igb_deliver_wake_packet(struct net_device *netdev)
8019 {
8020         struct igb_adapter *adapter = netdev_priv(netdev);
8021         struct e1000_hw *hw = &adapter->hw;
8022         struct sk_buff *skb;
8023         u32 wupl;
8024
8025         wupl = rd32(E1000_WUPL) & E1000_WUPL_MASK;
8026
8027         /* WUPM stores only the first 128 bytes of the wake packet.
8028          * Read the packet only if we have the whole thing.
8029          */
8030         if ((wupl == 0) || (wupl > E1000_WUPM_BYTES))
8031                 return;
8032
8033         skb = netdev_alloc_skb_ip_align(netdev, E1000_WUPM_BYTES);
8034         if (!skb)
8035                 return;
8036
8037         skb_put(skb, wupl);
8038
8039         /* Ensure reads are 32-bit aligned */
8040         wupl = roundup(wupl, 4);
8041
8042         memcpy_fromio(skb->data, hw->hw_addr + E1000_WUPM_REG(0), wupl);
8043
8044         skb->protocol = eth_type_trans(skb, netdev);
8045         netif_rx(skb);
8046 }
8047
8048 static int __maybe_unused igb_suspend(struct device *dev)
8049 {
8050         return __igb_shutdown(to_pci_dev(dev), NULL, 0);
8051 }
8052
8053 static int __maybe_unused igb_resume(struct device *dev)
8054 {
8055         struct pci_dev *pdev = to_pci_dev(dev);
8056         struct net_device *netdev = pci_get_drvdata(pdev);
8057         struct igb_adapter *adapter = netdev_priv(netdev);
8058         struct e1000_hw *hw = &adapter->hw;
8059         u32 err, val;
8060
8061         pci_set_power_state(pdev, PCI_D0);
8062         pci_restore_state(pdev);
8063         pci_save_state(pdev);
8064
8065         if (!pci_device_is_present(pdev))
8066                 return -ENODEV;
8067         err = pci_enable_device_mem(pdev);
8068         if (err) {
8069                 dev_err(&pdev->dev,
8070                         "igb: Cannot enable PCI device from suspend\n");
8071                 return err;
8072         }
8073         pci_set_master(pdev);
8074
8075         pci_enable_wake(pdev, PCI_D3hot, 0);
8076         pci_enable_wake(pdev, PCI_D3cold, 0);
8077
8078         if (igb_init_interrupt_scheme(adapter, true)) {
8079                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8080                 return -ENOMEM;
8081         }
8082
8083         igb_reset(adapter);
8084
8085         /* let the f/w know that the h/w is now under the control of the
8086          * driver.
8087          */
8088         igb_get_hw_control(adapter);
8089
8090         val = rd32(E1000_WUS);
8091         if (val & WAKE_PKT_WUS)
8092                 igb_deliver_wake_packet(netdev);
8093
8094         wr32(E1000_WUS, ~0);
8095
8096         rtnl_lock();
8097         if (!err && netif_running(netdev))
8098                 err = __igb_open(netdev, true);
8099
8100         if (!err)
8101                 netif_device_attach(netdev);
8102         rtnl_unlock();
8103
8104         return err;
8105 }
8106
8107 static int __maybe_unused igb_runtime_idle(struct device *dev)
8108 {
8109         struct pci_dev *pdev = to_pci_dev(dev);
8110         struct net_device *netdev = pci_get_drvdata(pdev);
8111         struct igb_adapter *adapter = netdev_priv(netdev);
8112
8113         if (!igb_has_link(adapter))
8114                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
8115
8116         return -EBUSY;
8117 }
8118
8119 static int __maybe_unused igb_runtime_suspend(struct device *dev)
8120 {
8121         return __igb_shutdown(to_pci_dev(dev), NULL, 1);
8122 }
8123
8124 static int __maybe_unused igb_runtime_resume(struct device *dev)
8125 {
8126         return igb_resume(dev);
8127 }
8128
8129 static void igb_shutdown(struct pci_dev *pdev)
8130 {
8131         bool wake;
8132
8133         __igb_shutdown(pdev, &wake, 0);
8134
8135         if (system_state == SYSTEM_POWER_OFF) {
8136                 pci_wake_from_d3(pdev, wake);
8137                 pci_set_power_state(pdev, PCI_D3hot);
8138         }
8139 }
8140
8141 #ifdef CONFIG_PCI_IOV
8142 static int igb_sriov_reinit(struct pci_dev *dev)
8143 {
8144         struct net_device *netdev = pci_get_drvdata(dev);
8145         struct igb_adapter *adapter = netdev_priv(netdev);
8146         struct pci_dev *pdev = adapter->pdev;
8147
8148         rtnl_lock();
8149
8150         if (netif_running(netdev))
8151                 igb_close(netdev);
8152         else
8153                 igb_reset(adapter);
8154
8155         igb_clear_interrupt_scheme(adapter);
8156
8157         igb_init_queue_configuration(adapter);
8158
8159         if (igb_init_interrupt_scheme(adapter, true)) {
8160                 rtnl_unlock();
8161                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8162                 return -ENOMEM;
8163         }
8164
8165         if (netif_running(netdev))
8166                 igb_open(netdev);
8167
8168         rtnl_unlock();
8169
8170         return 0;
8171 }
8172
8173 static int igb_pci_disable_sriov(struct pci_dev *dev)
8174 {
8175         int err = igb_disable_sriov(dev);
8176
8177         if (!err)
8178                 err = igb_sriov_reinit(dev);
8179
8180         return err;
8181 }
8182
8183 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
8184 {
8185         int err = igb_enable_sriov(dev, num_vfs);
8186
8187         if (err)
8188                 goto out;
8189
8190         err = igb_sriov_reinit(dev);
8191         if (!err)
8192                 return num_vfs;
8193
8194 out:
8195         return err;
8196 }
8197
8198 #endif
8199 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
8200 {
8201 #ifdef CONFIG_PCI_IOV
8202         if (num_vfs == 0)
8203                 return igb_pci_disable_sriov(dev);
8204         else
8205                 return igb_pci_enable_sriov(dev, num_vfs);
8206 #endif
8207         return 0;
8208 }
8209
8210 #ifdef CONFIG_NET_POLL_CONTROLLER
8211 /* Polling 'interrupt' - used by things like netconsole to send skbs
8212  * without having to re-enable interrupts. It's not called while
8213  * the interrupt routine is executing.
8214  */
8215 static void igb_netpoll(struct net_device *netdev)
8216 {
8217         struct igb_adapter *adapter = netdev_priv(netdev);
8218         struct e1000_hw *hw = &adapter->hw;
8219         struct igb_q_vector *q_vector;
8220         int i;
8221
8222         for (i = 0; i < adapter->num_q_vectors; i++) {
8223                 q_vector = adapter->q_vector[i];
8224                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
8225                         wr32(E1000_EIMC, q_vector->eims_value);
8226                 else
8227                         igb_irq_disable(adapter);
8228                 napi_schedule(&q_vector->napi);
8229         }
8230 }
8231 #endif /* CONFIG_NET_POLL_CONTROLLER */
8232
8233 /**
8234  *  igb_io_error_detected - called when PCI error is detected
8235  *  @pdev: Pointer to PCI device
8236  *  @state: The current pci connection state
8237  *
8238  *  This function is called after a PCI bus error affecting
8239  *  this device has been detected.
8240  **/
8241 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
8242                                               pci_channel_state_t state)
8243 {
8244         struct net_device *netdev = pci_get_drvdata(pdev);
8245         struct igb_adapter *adapter = netdev_priv(netdev);
8246
8247         netif_device_detach(netdev);
8248
8249         if (state == pci_channel_io_perm_failure)
8250                 return PCI_ERS_RESULT_DISCONNECT;
8251
8252         if (netif_running(netdev))
8253                 igb_down(adapter);
8254         pci_disable_device(pdev);
8255
8256         /* Request a slot slot reset. */
8257         return PCI_ERS_RESULT_NEED_RESET;
8258 }
8259
8260 /**
8261  *  igb_io_slot_reset - called after the pci bus has been reset.
8262  *  @pdev: Pointer to PCI device
8263  *
8264  *  Restart the card from scratch, as if from a cold-boot. Implementation
8265  *  resembles the first-half of the igb_resume routine.
8266  **/
8267 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
8268 {
8269         struct net_device *netdev = pci_get_drvdata(pdev);
8270         struct igb_adapter *adapter = netdev_priv(netdev);
8271         struct e1000_hw *hw = &adapter->hw;
8272         pci_ers_result_t result;
8273         int err;
8274
8275         if (pci_enable_device_mem(pdev)) {
8276                 dev_err(&pdev->dev,
8277                         "Cannot re-enable PCI device after reset.\n");
8278                 result = PCI_ERS_RESULT_DISCONNECT;
8279         } else {
8280                 pci_set_master(pdev);
8281                 pci_restore_state(pdev);
8282                 pci_save_state(pdev);
8283
8284                 pci_enable_wake(pdev, PCI_D3hot, 0);
8285                 pci_enable_wake(pdev, PCI_D3cold, 0);
8286
8287                 /* In case of PCI error, adapter lose its HW address
8288                  * so we should re-assign it here.
8289                  */
8290                 hw->hw_addr = adapter->io_addr;
8291
8292                 igb_reset(adapter);
8293                 wr32(E1000_WUS, ~0);
8294                 result = PCI_ERS_RESULT_RECOVERED;
8295         }
8296
8297         err = pci_cleanup_aer_uncorrect_error_status(pdev);
8298         if (err) {
8299                 dev_err(&pdev->dev,
8300                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
8301                         err);
8302                 /* non-fatal, continue */
8303         }
8304
8305         return result;
8306 }
8307
8308 /**
8309  *  igb_io_resume - called when traffic can start flowing again.
8310  *  @pdev: Pointer to PCI device
8311  *
8312  *  This callback is called when the error recovery driver tells us that
8313  *  its OK to resume normal operation. Implementation resembles the
8314  *  second-half of the igb_resume routine.
8315  */
8316 static void igb_io_resume(struct pci_dev *pdev)
8317 {
8318         struct net_device *netdev = pci_get_drvdata(pdev);
8319         struct igb_adapter *adapter = netdev_priv(netdev);
8320
8321         if (netif_running(netdev)) {
8322                 if (igb_up(adapter)) {
8323                         dev_err(&pdev->dev, "igb_up failed after reset\n");
8324                         return;
8325                 }
8326         }
8327
8328         netif_device_attach(netdev);
8329
8330         /* let the f/w know that the h/w is now under the control of the
8331          * driver.
8332          */
8333         igb_get_hw_control(adapter);
8334 }
8335
8336 /**
8337  *  igb_rar_set_index - Sync RAL[index] and RAH[index] registers with MAC table
8338  *  @adapter: Pointer to adapter structure
8339  *  @index: Index of the RAR entry which need to be synced with MAC table
8340  **/
8341 static void igb_rar_set_index(struct igb_adapter *adapter, u32 index)
8342 {
8343         struct e1000_hw *hw = &adapter->hw;
8344         u32 rar_low, rar_high;
8345         u8 *addr = adapter->mac_table[index].addr;
8346
8347         /* HW expects these to be in network order when they are plugged
8348          * into the registers which are little endian.  In order to guarantee
8349          * that ordering we need to do an leXX_to_cpup here in order to be
8350          * ready for the byteswap that occurs with writel
8351          */
8352         rar_low = le32_to_cpup((__le32 *)(addr));
8353         rar_high = le16_to_cpup((__le16 *)(addr + 4));
8354
8355         /* Indicate to hardware the Address is Valid. */
8356         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE) {
8357                 if (is_valid_ether_addr(addr))
8358                         rar_high |= E1000_RAH_AV;
8359
8360                 switch (hw->mac.type) {
8361                 case e1000_82575:
8362                 case e1000_i210:
8363                         rar_high |= E1000_RAH_POOL_1 *
8364                                     adapter->mac_table[index].queue;
8365                         break;
8366                 default:
8367                         rar_high |= E1000_RAH_POOL_1 <<
8368                                     adapter->mac_table[index].queue;
8369                         break;
8370                 }
8371         }
8372
8373         wr32(E1000_RAL(index), rar_low);
8374         wrfl();
8375         wr32(E1000_RAH(index), rar_high);
8376         wrfl();
8377 }
8378
8379 static int igb_set_vf_mac(struct igb_adapter *adapter,
8380                           int vf, unsigned char *mac_addr)
8381 {
8382         struct e1000_hw *hw = &adapter->hw;
8383         /* VF MAC addresses start at end of receive addresses and moves
8384          * towards the first, as a result a collision should not be possible
8385          */
8386         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
8387         unsigned char *vf_mac_addr = adapter->vf_data[vf].vf_mac_addresses;
8388
8389         ether_addr_copy(vf_mac_addr, mac_addr);
8390         ether_addr_copy(adapter->mac_table[rar_entry].addr, mac_addr);
8391         adapter->mac_table[rar_entry].queue = vf;
8392         adapter->mac_table[rar_entry].state |= IGB_MAC_STATE_IN_USE;
8393         igb_rar_set_index(adapter, rar_entry);
8394
8395         return 0;
8396 }
8397
8398 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
8399 {
8400         struct igb_adapter *adapter = netdev_priv(netdev);
8401
8402         if (vf >= adapter->vfs_allocated_count)
8403                 return -EINVAL;
8404
8405         /* Setting the VF MAC to 0 reverts the IGB_VF_FLAG_PF_SET_MAC
8406          * flag and allows to overwrite the MAC via VF netdev.  This
8407          * is necessary to allow libvirt a way to restore the original
8408          * MAC after unbinding vfio-pci and reloading igbvf after shutting
8409          * down a VM.
8410          */
8411         if (is_zero_ether_addr(mac)) {
8412                 adapter->vf_data[vf].flags &= ~IGB_VF_FLAG_PF_SET_MAC;
8413                 dev_info(&adapter->pdev->dev,
8414                          "remove administratively set MAC on VF %d\n",
8415                          vf);
8416         } else if (is_valid_ether_addr(mac)) {
8417                 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
8418                 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n",
8419                          mac, vf);
8420                 dev_info(&adapter->pdev->dev,
8421                          "Reload the VF driver to make this change effective.");
8422                 /* Generate additional warning if PF is down */
8423                 if (test_bit(__IGB_DOWN, &adapter->state)) {
8424                         dev_warn(&adapter->pdev->dev,
8425                                  "The VF MAC address has been set, but the PF device is not up.\n");
8426                         dev_warn(&adapter->pdev->dev,
8427                                  "Bring the PF device up before attempting to use the VF device.\n");
8428                 }
8429         } else {
8430                 return -EINVAL;
8431         }
8432         return igb_set_vf_mac(adapter, vf, mac);
8433 }
8434
8435 static int igb_link_mbps(int internal_link_speed)
8436 {
8437         switch (internal_link_speed) {
8438         case SPEED_100:
8439                 return 100;
8440         case SPEED_1000:
8441                 return 1000;
8442         default:
8443                 return 0;
8444         }
8445 }
8446
8447 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
8448                                   int link_speed)
8449 {
8450         int rf_dec, rf_int;
8451         u32 bcnrc_val;
8452
8453         if (tx_rate != 0) {
8454                 /* Calculate the rate factor values to set */
8455                 rf_int = link_speed / tx_rate;
8456                 rf_dec = (link_speed - (rf_int * tx_rate));
8457                 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
8458                          tx_rate;
8459
8460                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
8461                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
8462                               E1000_RTTBCNRC_RF_INT_MASK);
8463                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
8464         } else {
8465                 bcnrc_val = 0;
8466         }
8467
8468         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
8469         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
8470          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
8471          */
8472         wr32(E1000_RTTBCNRM, 0x14);
8473         wr32(E1000_RTTBCNRC, bcnrc_val);
8474 }
8475
8476 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
8477 {
8478         int actual_link_speed, i;
8479         bool reset_rate = false;
8480
8481         /* VF TX rate limit was not set or not supported */
8482         if ((adapter->vf_rate_link_speed == 0) ||
8483             (adapter->hw.mac.type != e1000_82576))
8484                 return;
8485
8486         actual_link_speed = igb_link_mbps(adapter->link_speed);
8487         if (actual_link_speed != adapter->vf_rate_link_speed) {
8488                 reset_rate = true;
8489                 adapter->vf_rate_link_speed = 0;
8490                 dev_info(&adapter->pdev->dev,
8491                          "Link speed has been changed. VF Transmit rate is disabled\n");
8492         }
8493
8494         for (i = 0; i < adapter->vfs_allocated_count; i++) {
8495                 if (reset_rate)
8496                         adapter->vf_data[i].tx_rate = 0;
8497
8498                 igb_set_vf_rate_limit(&adapter->hw, i,
8499                                       adapter->vf_data[i].tx_rate,
8500                                       actual_link_speed);
8501         }
8502 }
8503
8504 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
8505                              int min_tx_rate, int max_tx_rate)
8506 {
8507         struct igb_adapter *adapter = netdev_priv(netdev);
8508         struct e1000_hw *hw = &adapter->hw;
8509         int actual_link_speed;
8510
8511         if (hw->mac.type != e1000_82576)
8512                 return -EOPNOTSUPP;
8513
8514         if (min_tx_rate)
8515                 return -EINVAL;
8516
8517         actual_link_speed = igb_link_mbps(adapter->link_speed);
8518         if ((vf >= adapter->vfs_allocated_count) ||
8519             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
8520             (max_tx_rate < 0) ||
8521             (max_tx_rate > actual_link_speed))
8522                 return -EINVAL;
8523
8524         adapter->vf_rate_link_speed = actual_link_speed;
8525         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
8526         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
8527
8528         return 0;
8529 }
8530
8531 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
8532                                    bool setting)
8533 {
8534         struct igb_adapter *adapter = netdev_priv(netdev);
8535         struct e1000_hw *hw = &adapter->hw;
8536         u32 reg_val, reg_offset;
8537
8538         if (!adapter->vfs_allocated_count)
8539                 return -EOPNOTSUPP;
8540
8541         if (vf >= adapter->vfs_allocated_count)
8542                 return -EINVAL;
8543
8544         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
8545         reg_val = rd32(reg_offset);
8546         if (setting)
8547                 reg_val |= (BIT(vf) |
8548                             BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
8549         else
8550                 reg_val &= ~(BIT(vf) |
8551                              BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
8552         wr32(reg_offset, reg_val);
8553
8554         adapter->vf_data[vf].spoofchk_enabled = setting;
8555         return 0;
8556 }
8557
8558 static int igb_ndo_get_vf_config(struct net_device *netdev,
8559                                  int vf, struct ifla_vf_info *ivi)
8560 {
8561         struct igb_adapter *adapter = netdev_priv(netdev);
8562         if (vf >= adapter->vfs_allocated_count)
8563                 return -EINVAL;
8564         ivi->vf = vf;
8565         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
8566         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
8567         ivi->min_tx_rate = 0;
8568         ivi->vlan = adapter->vf_data[vf].pf_vlan;
8569         ivi->qos = adapter->vf_data[vf].pf_qos;
8570         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
8571         return 0;
8572 }
8573
8574 static void igb_vmm_control(struct igb_adapter *adapter)
8575 {
8576         struct e1000_hw *hw = &adapter->hw;
8577         u32 reg;
8578
8579         switch (hw->mac.type) {
8580         case e1000_82575:
8581         case e1000_i210:
8582         case e1000_i211:
8583         case e1000_i354:
8584         default:
8585                 /* replication is not supported for 82575 */
8586                 return;
8587         case e1000_82576:
8588                 /* notify HW that the MAC is adding vlan tags */
8589                 reg = rd32(E1000_DTXCTL);
8590                 reg |= E1000_DTXCTL_VLAN_ADDED;
8591                 wr32(E1000_DTXCTL, reg);
8592                 /* Fall through */
8593         case e1000_82580:
8594                 /* enable replication vlan tag stripping */
8595                 reg = rd32(E1000_RPLOLR);
8596                 reg |= E1000_RPLOLR_STRVLAN;
8597                 wr32(E1000_RPLOLR, reg);
8598                 /* Fall through */
8599         case e1000_i350:
8600                 /* none of the above registers are supported by i350 */
8601                 break;
8602         }
8603
8604         if (adapter->vfs_allocated_count) {
8605                 igb_vmdq_set_loopback_pf(hw, true);
8606                 igb_vmdq_set_replication_pf(hw, true);
8607                 igb_vmdq_set_anti_spoofing_pf(hw, true,
8608                                               adapter->vfs_allocated_count);
8609         } else {
8610                 igb_vmdq_set_loopback_pf(hw, false);
8611                 igb_vmdq_set_replication_pf(hw, false);
8612         }
8613 }
8614
8615 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
8616 {
8617         struct e1000_hw *hw = &adapter->hw;
8618         u32 dmac_thr;
8619         u16 hwm;
8620
8621         if (hw->mac.type > e1000_82580) {
8622                 if (adapter->flags & IGB_FLAG_DMAC) {
8623                         u32 reg;
8624
8625                         /* force threshold to 0. */
8626                         wr32(E1000_DMCTXTH, 0);
8627
8628                         /* DMA Coalescing high water mark needs to be greater
8629                          * than the Rx threshold. Set hwm to PBA - max frame
8630                          * size in 16B units, capping it at PBA - 6KB.
8631                          */
8632                         hwm = 64 * (pba - 6);
8633                         reg = rd32(E1000_FCRTC);
8634                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
8635                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
8636                                 & E1000_FCRTC_RTH_COAL_MASK);
8637                         wr32(E1000_FCRTC, reg);
8638
8639                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
8640                          * frame size, capping it at PBA - 10KB.
8641                          */
8642                         dmac_thr = pba - 10;
8643                         reg = rd32(E1000_DMACR);
8644                         reg &= ~E1000_DMACR_DMACTHR_MASK;
8645                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
8646                                 & E1000_DMACR_DMACTHR_MASK);
8647
8648                         /* transition to L0x or L1 if available..*/
8649                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
8650
8651                         /* watchdog timer= +-1000 usec in 32usec intervals */
8652                         reg |= (1000 >> 5);
8653
8654                         /* Disable BMC-to-OS Watchdog Enable */
8655                         if (hw->mac.type != e1000_i354)
8656                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
8657
8658                         wr32(E1000_DMACR, reg);
8659
8660                         /* no lower threshold to disable
8661                          * coalescing(smart fifb)-UTRESH=0
8662                          */
8663                         wr32(E1000_DMCRTRH, 0);
8664
8665                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
8666
8667                         wr32(E1000_DMCTLX, reg);
8668
8669                         /* free space in tx packet buffer to wake from
8670                          * DMA coal
8671                          */
8672                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
8673                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
8674
8675                         /* make low power state decision controlled
8676                          * by DMA coal
8677                          */
8678                         reg = rd32(E1000_PCIEMISC);
8679                         reg &= ~E1000_PCIEMISC_LX_DECISION;
8680                         wr32(E1000_PCIEMISC, reg);
8681                 } /* endif adapter->dmac is not disabled */
8682         } else if (hw->mac.type == e1000_82580) {
8683                 u32 reg = rd32(E1000_PCIEMISC);
8684
8685                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
8686                 wr32(E1000_DMACR, 0);
8687         }
8688 }
8689
8690 /**
8691  *  igb_read_i2c_byte - Reads 8 bit word over I2C
8692  *  @hw: pointer to hardware structure
8693  *  @byte_offset: byte offset to read
8694  *  @dev_addr: device address
8695  *  @data: value read
8696  *
8697  *  Performs byte read operation over I2C interface at
8698  *  a specified device address.
8699  **/
8700 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8701                       u8 dev_addr, u8 *data)
8702 {
8703         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8704         struct i2c_client *this_client = adapter->i2c_client;
8705         s32 status;
8706         u16 swfw_mask = 0;
8707
8708         if (!this_client)
8709                 return E1000_ERR_I2C;
8710
8711         swfw_mask = E1000_SWFW_PHY0_SM;
8712
8713         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8714                 return E1000_ERR_SWFW_SYNC;
8715
8716         status = i2c_smbus_read_byte_data(this_client, byte_offset);
8717         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8718
8719         if (status < 0)
8720                 return E1000_ERR_I2C;
8721         else {
8722                 *data = status;
8723                 return 0;
8724         }
8725 }
8726
8727 /**
8728  *  igb_write_i2c_byte - Writes 8 bit word over I2C
8729  *  @hw: pointer to hardware structure
8730  *  @byte_offset: byte offset to write
8731  *  @dev_addr: device address
8732  *  @data: value to write
8733  *
8734  *  Performs byte write operation over I2C interface at
8735  *  a specified device address.
8736  **/
8737 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8738                        u8 dev_addr, u8 data)
8739 {
8740         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8741         struct i2c_client *this_client = adapter->i2c_client;
8742         s32 status;
8743         u16 swfw_mask = E1000_SWFW_PHY0_SM;
8744
8745         if (!this_client)
8746                 return E1000_ERR_I2C;
8747
8748         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8749                 return E1000_ERR_SWFW_SYNC;
8750         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
8751         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8752
8753         if (status)
8754                 return E1000_ERR_I2C;
8755         else
8756                 return 0;
8757
8758 }
8759
8760 int igb_reinit_queues(struct igb_adapter *adapter)
8761 {
8762         struct net_device *netdev = adapter->netdev;
8763         struct pci_dev *pdev = adapter->pdev;
8764         int err = 0;
8765
8766         if (netif_running(netdev))
8767                 igb_close(netdev);
8768
8769         igb_reset_interrupt_capability(adapter);
8770
8771         if (igb_init_interrupt_scheme(adapter, true)) {
8772                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8773                 return -ENOMEM;
8774         }
8775
8776         if (netif_running(netdev))
8777                 err = igb_open(netdev);
8778
8779         return err;
8780 }
8781
8782 static void igb_nfc_filter_exit(struct igb_adapter *adapter)
8783 {
8784         struct igb_nfc_filter *rule;
8785
8786         spin_lock(&adapter->nfc_lock);
8787
8788         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
8789                 igb_erase_filter(adapter, rule);
8790
8791         spin_unlock(&adapter->nfc_lock);
8792 }
8793
8794 static void igb_nfc_filter_restore(struct igb_adapter *adapter)
8795 {
8796         struct igb_nfc_filter *rule;
8797
8798         spin_lock(&adapter->nfc_lock);
8799
8800         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
8801                 igb_add_filter(adapter, rule);
8802
8803         spin_unlock(&adapter->nfc_lock);
8804 }
8805 /* igb_main.c */