drivers/net/ethernet/intel/igb/igb_main.c

   1 /* Intel(R) Gigabit Ethernet Linux driver
   2  * Copyright(c) 2007-2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program; if not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * The full GNU General Public License is included in this distribution in
  17  * the file called "COPYING".
  18  *
  19  * Contact Information:
  20  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  21  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  22  */
  23
  24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  25
  26 #include <linux/module.h>
  27 #include <linux/types.h>
  28 #include <linux/init.h>
  29 #include <linux/bitops.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/pagemap.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/ipv6.h>
  34 #include <linux/slab.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/net_tstamp.h>
  38 #include <linux/mii.h>
  39 #include <linux/ethtool.h>
  40 #include <linux/if.h>
  41 #include <linux/if_vlan.h>
  42 #include <linux/pci.h>
  43 #include <linux/pci-aspm.h>
  44 #include <linux/delay.h>
  45 #include <linux/interrupt.h>
  46 #include <linux/ip.h>
  47 #include <linux/tcp.h>
  48 #include <linux/sctp.h>
  49 #include <linux/if_ether.h>
  50 #include <linux/aer.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/pm_runtime.h>
  53 #include <linux/etherdevice.h>
  54 #ifdef CONFIG_IGB_DCA
  55 #include <linux/dca.h>
  56 #endif
  57 #include <linux/i2c.h>
  58 #include "igb.h"
  59
  60 #define MAJ 5
  61 #define MIN 4
  62 #define BUILD 0
  63 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  64 __stringify(BUILD) "-k"
  65 char igb_driver_name[] = "igb";
  66 char igb_driver_version[] = DRV_VERSION;
  67 static const char igb_driver_string[] =
  68                                 "Intel(R) Gigabit Ethernet Network Driver";
  69 static const char igb_copyright[] =
  70                                 "Copyright (c) 2007-2014 Intel Corporation.";
  71
  72 static const struct e1000_info *igb_info_tbl[] = {
  73         [board_82575] = &e1000_82575_info,
  74 };
  75
  76 static const struct pci_device_id igb_pci_tbl[] = {
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 112         /* required last entry */
 113         {0, }
 114 };
 115
 116 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 117
 118 static int igb_setup_all_tx_resources(struct igb_adapter *);
 119 static int igb_setup_all_rx_resources(struct igb_adapter *);
 120 static void igb_free_all_tx_resources(struct igb_adapter *);
 121 static void igb_free_all_rx_resources(struct igb_adapter *);
 122 static void igb_setup_mrqc(struct igb_adapter *);
 123 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 124 static void igb_remove(struct pci_dev *pdev);
 125 static int igb_sw_init(struct igb_adapter *);
 126 int igb_open(struct net_device *);
 127 int igb_close(struct net_device *);
 128 static void igb_configure(struct igb_adapter *);
 129 static void igb_configure_tx(struct igb_adapter *);
 130 static void igb_configure_rx(struct igb_adapter *);
 131 static void igb_clean_all_tx_rings(struct igb_adapter *);
 132 static void igb_clean_all_rx_rings(struct igb_adapter *);
 133 static void igb_clean_tx_ring(struct igb_ring *);
 134 static void igb_clean_rx_ring(struct igb_ring *);
 135 static void igb_set_rx_mode(struct net_device *);
 136 static void igb_update_phy_info(unsigned long);
 137 static void igb_watchdog(unsigned long);
 138 static void igb_watchdog_task(struct work_struct *);
 139 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 140 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
 141                                           struct rtnl_link_stats64 *stats);
 142 static int igb_change_mtu(struct net_device *, int);
 143 static int igb_set_mac(struct net_device *, void *);
 144 static void igb_set_uta(struct igb_adapter *adapter, bool set);
 145 static irqreturn_t igb_intr(int irq, void *);
 146 static irqreturn_t igb_intr_msi(int irq, void *);
 147 static irqreturn_t igb_msix_other(int irq, void *);
 148 static irqreturn_t igb_msix_ring(int irq, void *);
 149 #ifdef CONFIG_IGB_DCA
 150 static void igb_update_dca(struct igb_q_vector *);
 151 static void igb_setup_dca(struct igb_adapter *);
 152 #endif /* CONFIG_IGB_DCA */
 153 static int igb_poll(struct napi_struct *, int);
 154 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
 155 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 156 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 157 static void igb_tx_timeout(struct net_device *);
 158 static void igb_reset_task(struct work_struct *);
 159 static void igb_vlan_mode(struct net_device *netdev,
 160                           netdev_features_t features);
 161 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 162 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 163 static void igb_restore_vlan(struct igb_adapter *);
 164 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 165 static void igb_ping_all_vfs(struct igb_adapter *);
 166 static void igb_msg_task(struct igb_adapter *);
 167 static void igb_vmm_control(struct igb_adapter *);
 168 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 169 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 170 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 171 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 172                                int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 173 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 174 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 175                                    bool setting);
 176 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 177                                  struct ifla_vf_info *ivi);
 178 static void igb_check_vf_rate_limit(struct igb_adapter *);
 179 static void igb_nfc_filter_exit(struct igb_adapter *adapter);
 180 static void igb_nfc_filter_restore(struct igb_adapter *adapter);
 181
 182 #ifdef CONFIG_PCI_IOV
 183 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 184 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 185 static int igb_disable_sriov(struct pci_dev *dev);
 186 static int igb_pci_disable_sriov(struct pci_dev *dev);
 187 #endif
 188
 189 #ifdef CONFIG_PM
 190 #ifdef CONFIG_PM_SLEEP
 191 static int igb_suspend(struct device *);
 192 #endif
 193 static int igb_resume(struct device *);
 194 static int igb_runtime_suspend(struct device *dev);
 195 static int igb_runtime_resume(struct device *dev);
 196 static int igb_runtime_idle(struct device *dev);
 197 static const struct dev_pm_ops igb_pm_ops = {
 198         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 199         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 200                         igb_runtime_idle)
 201 };
 202 #endif
 203 static void igb_shutdown(struct pci_dev *);
 204 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 205 #ifdef CONFIG_IGB_DCA
 206 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 207 static struct notifier_block dca_notifier = {
 208         .notifier_call  = igb_notify_dca,
 209         .next           = NULL,
 210         .priority       = 0
 211 };
 212 #endif
 213 #ifdef CONFIG_NET_POLL_CONTROLLER
 214 /* for netdump / net console */
 215 static void igb_netpoll(struct net_device *);
 216 #endif
 217 #ifdef CONFIG_PCI_IOV
 218 static unsigned int max_vfs;
 219 module_param(max_vfs, uint, 0);
 220 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 221 #endif /* CONFIG_PCI_IOV */
 222
 223 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 224                      pci_channel_state_t);
 225 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 226 static void igb_io_resume(struct pci_dev *);
 227
 228 static const struct pci_error_handlers igb_err_handler = {
 229         .error_detected = igb_io_error_detected,
 230         .slot_reset = igb_io_slot_reset,
 231         .resume = igb_io_resume,
 232 };
 233
 234 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 235
 236 static struct pci_driver igb_driver = {
 237         .name     = igb_driver_name,
 238         .id_table = igb_pci_tbl,
 239         .probe    = igb_probe,
 240         .remove   = igb_remove,
 241 #ifdef CONFIG_PM
 242         .driver.pm = &igb_pm_ops,
 243 #endif
 244         .shutdown = igb_shutdown,
 245         .sriov_configure = igb_pci_sriov_configure,
 246         .err_handler = &igb_err_handler
 247 };
 248
 249 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 250 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 251 MODULE_LICENSE("GPL");
 252 MODULE_VERSION(DRV_VERSION);
 253
 254 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 255 static int debug = -1;
 256 module_param(debug, int, 0);
 257 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 258
 259 struct igb_reg_info {
 260         u32 ofs;
 261         char *name;
 262 };
 263
 264 static const struct igb_reg_info igb_reg_info_tbl[] = {
 265
 266         /* General Registers */
 267         {E1000_CTRL, "CTRL"},
 268         {E1000_STATUS, "STATUS"},
 269         {E1000_CTRL_EXT, "CTRL_EXT"},
 270
 271         /* Interrupt Registers */
 272         {E1000_ICR, "ICR"},
 273
 274         /* RX Registers */
 275         {E1000_RCTL, "RCTL"},
 276         {E1000_RDLEN(0), "RDLEN"},
 277         {E1000_RDH(0), "RDH"},
 278         {E1000_RDT(0), "RDT"},
 279         {E1000_RXDCTL(0), "RXDCTL"},
 280         {E1000_RDBAL(0), "RDBAL"},
 281         {E1000_RDBAH(0), "RDBAH"},
 282
 283         /* TX Registers */
 284         {E1000_TCTL, "TCTL"},
 285         {E1000_TDBAL(0), "TDBAL"},
 286         {E1000_TDBAH(0), "TDBAH"},
 287         {E1000_TDLEN(0), "TDLEN"},
 288         {E1000_TDH(0), "TDH"},
 289         {E1000_TDT(0), "TDT"},
 290         {E1000_TXDCTL(0), "TXDCTL"},
 291         {E1000_TDFH, "TDFH"},
 292         {E1000_TDFT, "TDFT"},
 293         {E1000_TDFHS, "TDFHS"},
 294         {E1000_TDFPC, "TDFPC"},
 295
 296         /* List Terminator */
 297         {}
 298 };
 299
 300 /* igb_regdump - register printout routine */
 301 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 302 {
 303         int n = 0;
 304         char rname[16];
 305         u32 regs[8];
 306
 307         switch (reginfo->ofs) {
 308         case E1000_RDLEN(0):
 309                 for (n = 0; n < 4; n++)
 310                         regs[n] = rd32(E1000_RDLEN(n));
 311                 break;
 312         case E1000_RDH(0):
 313                 for (n = 0; n < 4; n++)
 314                         regs[n] = rd32(E1000_RDH(n));
 315                 break;
 316         case E1000_RDT(0):
 317                 for (n = 0; n < 4; n++)
 318                         regs[n] = rd32(E1000_RDT(n));
 319                 break;
 320         case E1000_RXDCTL(0):
 321                 for (n = 0; n < 4; n++)
 322                         regs[n] = rd32(E1000_RXDCTL(n));
 323                 break;
 324         case E1000_RDBAL(0):
 325                 for (n = 0; n < 4; n++)
 326                         regs[n] = rd32(E1000_RDBAL(n));
 327                 break;
 328         case E1000_RDBAH(0):
 329                 for (n = 0; n < 4; n++)
 330                         regs[n] = rd32(E1000_RDBAH(n));
 331                 break;
 332         case E1000_TDBAL(0):
 333                 for (n = 0; n < 4; n++)
 334                         regs[n] = rd32(E1000_RDBAL(n));
 335                 break;
 336         case E1000_TDBAH(0):
 337                 for (n = 0; n < 4; n++)
 338                         regs[n] = rd32(E1000_TDBAH(n));
 339                 break;
 340         case E1000_TDLEN(0):
 341                 for (n = 0; n < 4; n++)
 342                         regs[n] = rd32(E1000_TDLEN(n));
 343                 break;
 344         case E1000_TDH(0):
 345                 for (n = 0; n < 4; n++)
 346                         regs[n] = rd32(E1000_TDH(n));
 347                 break;
 348         case E1000_TDT(0):
 349                 for (n = 0; n < 4; n++)
 350                         regs[n] = rd32(E1000_TDT(n));
 351                 break;
 352         case E1000_TXDCTL(0):
 353                 for (n = 0; n < 4; n++)
 354                         regs[n] = rd32(E1000_TXDCTL(n));
 355                 break;
 356         default:
 357                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 358                 return;
 359         }
 360
 361         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 362         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 363                 regs[2], regs[3]);
 364 }
 365
 366 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 367 static void igb_dump(struct igb_adapter *adapter)
 368 {
 369         struct net_device *netdev = adapter->netdev;
 370         struct e1000_hw *hw = &adapter->hw;
 371         struct igb_reg_info *reginfo;
 372         struct igb_ring *tx_ring;
 373         union e1000_adv_tx_desc *tx_desc;
 374         struct my_u0 { u64 a; u64 b; } *u0;
 375         struct igb_ring *rx_ring;
 376         union e1000_adv_rx_desc *rx_desc;
 377         u32 staterr;
 378         u16 i, n;
 379
 380         if (!netif_msg_hw(adapter))
 381                 return;
 382
 383         /* Print netdevice Info */
 384         if (netdev) {
 385                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 386                 pr_info("Device Name     state            trans_start      last_rx\n");
 387                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 388                         netdev->state, dev_trans_start(netdev), netdev->last_rx);
 389         }
 390
 391         /* Print Registers */
 392         dev_info(&adapter->pdev->dev, "Register Dump\n");
 393         pr_info(" Register Name   Value\n");
 394         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 395              reginfo->name; reginfo++) {
 396                 igb_regdump(hw, reginfo);
 397         }
 398
 399         /* Print TX Ring Summary */
 400         if (!netdev || !netif_running(netdev))
 401                 goto exit;
 402
 403         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 404         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 405         for (n = 0; n < adapter->num_tx_queues; n++) {
 406                 struct igb_tx_buffer *buffer_info;
 407                 tx_ring = adapter->tx_ring[n];
 408                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 409                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 410                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 411                         (u64)dma_unmap_addr(buffer_info, dma),
 412                         dma_unmap_len(buffer_info, len),
 413                         buffer_info->next_to_watch,
 414                         (u64)buffer_info->time_stamp);
 415         }
 416
 417         /* Print TX Rings */
 418         if (!netif_msg_tx_done(adapter))
 419                 goto rx_ring_summary;
 420
 421         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 422
 423         /* Transmit Descriptor Formats
 424          *
 425          * Advanced Transmit Descriptor
 426          *   +--------------------------------------------------------------+
 427          * 0 |         Buffer Address [63:0]                                |
 428          *   +--------------------------------------------------------------+
 429          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 430          *   +--------------------------------------------------------------+
 431          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 432          */
 433
 434         for (n = 0; n < adapter->num_tx_queues; n++) {
 435                 tx_ring = adapter->tx_ring[n];
 436                 pr_info("------------------------------------\n");
 437                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 438                 pr_info("------------------------------------\n");
 439                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 440
 441                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 442                         const char *next_desc;
 443                         struct igb_tx_buffer *buffer_info;
 444                         tx_desc = IGB_TX_DESC(tx_ring, i);
 445                         buffer_info = &tx_ring->tx_buffer_info[i];
 446                         u0 = (struct my_u0 *)tx_desc;
 447                         if (i == tx_ring->next_to_use &&
 448                             i == tx_ring->next_to_clean)
 449                                 next_desc = " NTC/U";
 450                         else if (i == tx_ring->next_to_use)
 451                                 next_desc = " NTU";
 452                         else if (i == tx_ring->next_to_clean)
 453                                 next_desc = " NTC";
 454                         else
 455                                 next_desc = "";
 456
 457                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 458                                 i, le64_to_cpu(u0->a),
 459                                 le64_to_cpu(u0->b),
 460                                 (u64)dma_unmap_addr(buffer_info, dma),
 461                                 dma_unmap_len(buffer_info, len),
 462                                 buffer_info->next_to_watch,
 463                                 (u64)buffer_info->time_stamp,
 464                                 buffer_info->skb, next_desc);
 465
 466                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 467                                 print_hex_dump(KERN_INFO, "",
 468                                         DUMP_PREFIX_ADDRESS,
 469                                         16, 1, buffer_info->skb->data,
 470                                         dma_unmap_len(buffer_info, len),
 471                                         true);
 472                 }
 473         }
 474
 475         /* Print RX Rings Summary */
 476 rx_ring_summary:
 477         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 478         pr_info("Queue [NTU] [NTC]\n");
 479         for (n = 0; n < adapter->num_rx_queues; n++) {
 480                 rx_ring = adapter->rx_ring[n];
 481                 pr_info(" %5d %5X %5X\n",
 482                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 483         }
 484
 485         /* Print RX Rings */
 486         if (!netif_msg_rx_status(adapter))
 487                 goto exit;
 488
 489         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 490
 491         /* Advanced Receive Descriptor (Read) Format
 492          *    63                                           1        0
 493          *    +-----------------------------------------------------+
 494          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 495          *    +----------------------------------------------+------+
 496          *  8 |       Header Buffer Address [63:1]           |  DD  |
 497          *    +-----------------------------------------------------+
 498          *
 499          *
 500          * Advanced Receive Descriptor (Write-Back) Format
 501          *
 502          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 503          *   +------------------------------------------------------+
 504          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 505          *   | Checksum   Ident  |   |           |    | Type | Type |
 506          *   +------------------------------------------------------+
 507          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 508          *   +------------------------------------------------------+
 509          *   63       48 47    32 31            20 19               0
 510          */
 511
 512         for (n = 0; n < adapter->num_rx_queues; n++) {
 513                 rx_ring = adapter->rx_ring[n];
 514                 pr_info("------------------------------------\n");
 515                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 516                 pr_info("------------------------------------\n");
 517                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 518                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 519
 520                 for (i = 0; i < rx_ring->count; i++) {
 521                         const char *next_desc;
 522                         struct igb_rx_buffer *buffer_info;
 523                         buffer_info = &rx_ring->rx_buffer_info[i];
 524                         rx_desc = IGB_RX_DESC(rx_ring, i);
 525                         u0 = (struct my_u0 *)rx_desc;
 526                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 527
 528                         if (i == rx_ring->next_to_use)
 529                                 next_desc = " NTU";
 530                         else if (i == rx_ring->next_to_clean)
 531                                 next_desc = " NTC";
 532                         else
 533                                 next_desc = "";
 534
 535                         if (staterr & E1000_RXD_STAT_DD) {
 536                                 /* Descriptor Done */
 537                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 538                                         "RWB", i,
 539                                         le64_to_cpu(u0->a),
 540                                         le64_to_cpu(u0->b),
 541                                         next_desc);
 542                         } else {
 543                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 544                                         "R  ", i,
 545                                         le64_to_cpu(u0->a),
 546                                         le64_to_cpu(u0->b),
 547                                         (u64)buffer_info->dma,
 548                                         next_desc);
 549
 550                                 if (netif_msg_pktdata(adapter) &&
 551                                     buffer_info->dma && buffer_info->page) {
 552                                         print_hex_dump(KERN_INFO, "",
 553                                           DUMP_PREFIX_ADDRESS,
 554                                           16, 1,
 555                                           page_address(buffer_info->page) +
 556                                                       buffer_info->page_offset,
 557                                           IGB_RX_BUFSZ, true);
 558                                 }
 559                         }
 560                 }
 561         }
 562
 563 exit:
 564         return;
 565 }
 566
 567 /**
 568  *  igb_get_i2c_data - Reads the I2C SDA data bit
 569  *  @hw: pointer to hardware structure
 570  *  @i2cctl: Current value of I2CCTL register
 571  *
 572  *  Returns the I2C data bit value
 573  **/
 574 static int igb_get_i2c_data(void *data)
 575 {
 576         struct igb_adapter *adapter = (struct igb_adapter *)data;
 577         struct e1000_hw *hw = &adapter->hw;
 578         s32 i2cctl = rd32(E1000_I2CPARAMS);
 579
 580         return !!(i2cctl & E1000_I2C_DATA_IN);
 581 }
 582
 583 /**
 584  *  igb_set_i2c_data - Sets the I2C data bit
 585  *  @data: pointer to hardware structure
 586  *  @state: I2C data value (0 or 1) to set
 587  *
 588  *  Sets the I2C data bit
 589  **/
 590 static void igb_set_i2c_data(void *data, int state)
 591 {
 592         struct igb_adapter *adapter = (struct igb_adapter *)data;
 593         struct e1000_hw *hw = &adapter->hw;
 594         s32 i2cctl = rd32(E1000_I2CPARAMS);
 595
 596         if (state)
 597                 i2cctl |= E1000_I2C_DATA_OUT;
 598         else
 599                 i2cctl &= ~E1000_I2C_DATA_OUT;
 600
 601         i2cctl &= ~E1000_I2C_DATA_OE_N;
 602         i2cctl |= E1000_I2C_CLK_OE_N;
 603         wr32(E1000_I2CPARAMS, i2cctl);
 604         wrfl();
 605
 606 }
 607
 608 /**
 609  *  igb_set_i2c_clk - Sets the I2C SCL clock
 610  *  @data: pointer to hardware structure
 611  *  @state: state to set clock
 612  *
 613  *  Sets the I2C clock line to state
 614  **/
 615 static void igb_set_i2c_clk(void *data, int state)
 616 {
 617         struct igb_adapter *adapter = (struct igb_adapter *)data;
 618         struct e1000_hw *hw = &adapter->hw;
 619         s32 i2cctl = rd32(E1000_I2CPARAMS);
 620
 621         if (state) {
 622                 i2cctl |= E1000_I2C_CLK_OUT;
 623                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 624         } else {
 625                 i2cctl &= ~E1000_I2C_CLK_OUT;
 626                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 627         }
 628         wr32(E1000_I2CPARAMS, i2cctl);
 629         wrfl();
 630 }
 631
 632 /**
 633  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 634  *  @data: pointer to hardware structure
 635  *
 636  *  Gets the I2C clock state
 637  **/
 638 static int igb_get_i2c_clk(void *data)
 639 {
 640         struct igb_adapter *adapter = (struct igb_adapter *)data;
 641         struct e1000_hw *hw = &adapter->hw;
 642         s32 i2cctl = rd32(E1000_I2CPARAMS);
 643
 644         return !!(i2cctl & E1000_I2C_CLK_IN);
 645 }
 646
 647 static const struct i2c_algo_bit_data igb_i2c_algo = {
 648         .setsda         = igb_set_i2c_data,
 649         .setscl         = igb_set_i2c_clk,
 650         .getsda         = igb_get_i2c_data,
 651         .getscl         = igb_get_i2c_clk,
 652         .udelay         = 5,
 653         .timeout        = 20,
 654 };
 655
 656 /**
 657  *  igb_get_hw_dev - return device
 658  *  @hw: pointer to hardware structure
 659  *
 660  *  used by hardware layer to print debugging information
 661  **/
 662 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 663 {
 664         struct igb_adapter *adapter = hw->back;
 665         return adapter->netdev;
 666 }
 667
 668 /**
 669  *  igb_init_module - Driver Registration Routine
 670  *
 671  *  igb_init_module is the first routine called when the driver is
 672  *  loaded. All it does is register with the PCI subsystem.
 673  **/
 674 static int __init igb_init_module(void)
 675 {
 676         int ret;
 677
 678         pr_info("%s - version %s\n",
 679                igb_driver_string, igb_driver_version);
 680         pr_info("%s\n", igb_copyright);
 681
 682 #ifdef CONFIG_IGB_DCA
 683         dca_register_notify(&dca_notifier);
 684 #endif
 685         ret = pci_register_driver(&igb_driver);
 686         return ret;
 687 }
 688
 689 module_init(igb_init_module);
 690
 691 /**
 692  *  igb_exit_module - Driver Exit Cleanup Routine
 693  *
 694  *  igb_exit_module is called just before the driver is removed
 695  *  from memory.
 696  **/
 697 static void __exit igb_exit_module(void)
 698 {
 699 #ifdef CONFIG_IGB_DCA
 700         dca_unregister_notify(&dca_notifier);
 701 #endif
 702         pci_unregister_driver(&igb_driver);
 703 }
 704
 705 module_exit(igb_exit_module);
 706
 707 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 708 /**
 709  *  igb_cache_ring_register - Descriptor ring to register mapping
 710  *  @adapter: board private structure to initialize
 711  *
 712  *  Once we know the feature-set enabled for the device, we'll cache
 713  *  the register offset the descriptor ring is assigned to.
 714  **/
 715 static void igb_cache_ring_register(struct igb_adapter *adapter)
 716 {
 717         int i = 0, j = 0;
 718         u32 rbase_offset = adapter->vfs_allocated_count;
 719
 720         switch (adapter->hw.mac.type) {
 721         case e1000_82576:
 722                 /* The queues are allocated for virtualization such that VF 0
 723                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 724                  * In order to avoid collision we start at the first free queue
 725                  * and continue consuming queues in the same sequence
 726                  */
 727                 if (adapter->vfs_allocated_count) {
 728                         for (; i < adapter->rss_queues; i++)
 729                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 730                                                                Q_IDX_82576(i);
 731                 }
 732                 /* Fall through */
 733         case e1000_82575:
 734         case e1000_82580:
 735         case e1000_i350:
 736         case e1000_i354:
 737         case e1000_i210:
 738         case e1000_i211:
 739                 /* Fall through */
 740         default:
 741                 for (; i < adapter->num_rx_queues; i++)
 742                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 743                 for (; j < adapter->num_tx_queues; j++)
 744                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 745                 break;
 746         }
 747 }
 748
 749 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 750 {
 751         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 752         u8 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
 753         u32 value = 0;
 754
 755         if (E1000_REMOVED(hw_addr))
 756                 return ~value;
 757
 758         value = readl(&hw_addr[reg]);
 759
 760         /* reads should not return all F's */
 761         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 762                 struct net_device *netdev = igb->netdev;
 763                 hw->hw_addr = NULL;
 764                 netif_device_detach(netdev);
 765                 netdev_err(netdev, "PCIe link lost, device now detached\n");
 766         }
 767
 768         return value;
 769 }
 770
 771 /**
 772  *  igb_write_ivar - configure ivar for given MSI-X vector
 773  *  @hw: pointer to the HW structure
 774  *  @msix_vector: vector number we are allocating to a given ring
 775  *  @index: row index of IVAR register to write within IVAR table
 776  *  @offset: column offset of in IVAR, should be multiple of 8
 777  *
 778  *  This function is intended to handle the writing of the IVAR register
 779  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 780  *  each containing an cause allocation for an Rx and Tx ring, and a
 781  *  variable number of rows depending on the number of queues supported.
 782  **/
 783 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 784                            int index, int offset)
 785 {
 786         u32 ivar = array_rd32(E1000_IVAR0, index);
 787
 788         /* clear any bits that are currently set */
 789         ivar &= ~((u32)0xFF << offset);
 790
 791         /* write vector and valid bit */
 792         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 793
 794         array_wr32(E1000_IVAR0, index, ivar);
 795 }
 796
 797 #define IGB_N0_QUEUE -1
 798 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 799 {
 800         struct igb_adapter *adapter = q_vector->adapter;
 801         struct e1000_hw *hw = &adapter->hw;
 802         int rx_queue = IGB_N0_QUEUE;
 803         int tx_queue = IGB_N0_QUEUE;
 804         u32 msixbm = 0;
 805
 806         if (q_vector->rx.ring)
 807                 rx_queue = q_vector->rx.ring->reg_idx;
 808         if (q_vector->tx.ring)
 809                 tx_queue = q_vector->tx.ring->reg_idx;
 810
 811         switch (hw->mac.type) {
 812         case e1000_82575:
 813                 /* The 82575 assigns vectors using a bitmask, which matches the
 814                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 815                  * or more queues to a vector, we write the appropriate bits
 816                  * into the MSIXBM register for that vector.
 817                  */
 818                 if (rx_queue > IGB_N0_QUEUE)
 819                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 820                 if (tx_queue > IGB_N0_QUEUE)
 821                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 822                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 823                         msixbm |= E1000_EIMS_OTHER;
 824                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 825                 q_vector->eims_value = msixbm;
 826                 break;
 827         case e1000_82576:
 828                 /* 82576 uses a table that essentially consists of 2 columns
 829                  * with 8 rows.  The ordering is column-major so we use the
 830                  * lower 3 bits as the row index, and the 4th bit as the
 831                  * column offset.
 832                  */
 833                 if (rx_queue > IGB_N0_QUEUE)
 834                         igb_write_ivar(hw, msix_vector,
 835                                        rx_queue & 0x7,
 836                                        (rx_queue & 0x8) << 1);
 837                 if (tx_queue > IGB_N0_QUEUE)
 838                         igb_write_ivar(hw, msix_vector,
 839                                        tx_queue & 0x7,
 840                                        ((tx_queue & 0x8) << 1) + 8);
 841                 q_vector->eims_value = BIT(msix_vector);
 842                 break;
 843         case e1000_82580:
 844         case e1000_i350:
 845         case e1000_i354:
 846         case e1000_i210:
 847         case e1000_i211:
 848                 /* On 82580 and newer adapters the scheme is similar to 82576
 849                  * however instead of ordering column-major we have things
 850                  * ordered row-major.  So we traverse the table by using
 851                  * bit 0 as the column offset, and the remaining bits as the
 852                  * row index.
 853                  */
 854                 if (rx_queue > IGB_N0_QUEUE)
 855                         igb_write_ivar(hw, msix_vector,
 856                                        rx_queue >> 1,
 857                                        (rx_queue & 0x1) << 4);
 858                 if (tx_queue > IGB_N0_QUEUE)
 859                         igb_write_ivar(hw, msix_vector,
 860                                        tx_queue >> 1,
 861                                        ((tx_queue & 0x1) << 4) + 8);
 862                 q_vector->eims_value = BIT(msix_vector);
 863                 break;
 864         default:
 865                 BUG();
 866                 break;
 867         }
 868
 869         /* add q_vector eims value to global eims_enable_mask */
 870         adapter->eims_enable_mask |= q_vector->eims_value;
 871
 872         /* configure q_vector to set itr on first interrupt */
 873         q_vector->set_itr = 1;
 874 }
 875
 876 /**
 877  *  igb_configure_msix - Configure MSI-X hardware
 878  *  @adapter: board private structure to initialize
 879  *
 880  *  igb_configure_msix sets up the hardware to properly
 881  *  generate MSI-X interrupts.
 882  **/
 883 static void igb_configure_msix(struct igb_adapter *adapter)
 884 {
 885         u32 tmp;
 886         int i, vector = 0;
 887         struct e1000_hw *hw = &adapter->hw;
 888
 889         adapter->eims_enable_mask = 0;
 890
 891         /* set vector for other causes, i.e. link changes */
 892         switch (hw->mac.type) {
 893         case e1000_82575:
 894                 tmp = rd32(E1000_CTRL_EXT);
 895                 /* enable MSI-X PBA support*/
 896                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 897
 898                 /* Auto-Mask interrupts upon ICR read. */
 899                 tmp |= E1000_CTRL_EXT_EIAME;
 900                 tmp |= E1000_CTRL_EXT_IRCA;
 901
 902                 wr32(E1000_CTRL_EXT, tmp);
 903
 904                 /* enable msix_other interrupt */
 905                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 906                 adapter->eims_other = E1000_EIMS_OTHER;
 907
 908                 break;
 909
 910         case e1000_82576:
 911         case e1000_82580:
 912         case e1000_i350:
 913         case e1000_i354:
 914         case e1000_i210:
 915         case e1000_i211:
 916                 /* Turn on MSI-X capability first, or our settings
 917                  * won't stick.  And it will take days to debug.
 918                  */
 919                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 920                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 921                      E1000_GPIE_NSICR);
 922
 923                 /* enable msix_other interrupt */
 924                 adapter->eims_other = BIT(vector);
 925                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 926
 927                 wr32(E1000_IVAR_MISC, tmp);
 928                 break;
 929         default:
 930                 /* do nothing, since nothing else supports MSI-X */
 931                 break;
 932         } /* switch (hw->mac.type) */
 933
 934         adapter->eims_enable_mask |= adapter->eims_other;
 935
 936         for (i = 0; i < adapter->num_q_vectors; i++)
 937                 igb_assign_vector(adapter->q_vector[i], vector++);
 938
 939         wrfl();
 940 }
 941
 942 /**
 943  *  igb_request_msix - Initialize MSI-X interrupts
 944  *  @adapter: board private structure to initialize
 945  *
 946  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 947  *  kernel.
 948  **/
 949 static int igb_request_msix(struct igb_adapter *adapter)
 950 {
 951         unsigned int num_q_vectors = adapter->num_q_vectors;
 952         struct net_device *netdev = adapter->netdev;
 953         int i, err = 0, vector = 0, free_vector = 0;
 954
 955         err = request_irq(adapter->msix_entries[vector].vector,
 956                           igb_msix_other, 0, netdev->name, adapter);
 957         if (err)
 958                 goto err_out;
 959
 960         if (num_q_vectors > MAX_Q_VECTORS) {
 961                 num_q_vectors = MAX_Q_VECTORS;
 962                 dev_warn(&adapter->pdev->dev,
 963                          "The number of queue vectors (%d) is higher than max allowed (%d)\n",
 964                          adapter->num_q_vectors, MAX_Q_VECTORS);
 965         }
 966         for (i = 0; i < num_q_vectors; i++) {
 967                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 968
 969                 vector++;
 970
 971                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 972
 973                 if (q_vector->rx.ring && q_vector->tx.ring)
 974                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 975                                 q_vector->rx.ring->queue_index);
 976                 else if (q_vector->tx.ring)
 977                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 978                                 q_vector->tx.ring->queue_index);
 979                 else if (q_vector->rx.ring)
 980                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 981                                 q_vector->rx.ring->queue_index);
 982                 else
 983                         sprintf(q_vector->name, "%s-unused", netdev->name);
 984
 985                 err = request_irq(adapter->msix_entries[vector].vector,
 986                                   igb_msix_ring, 0, q_vector->name,
 987                                   q_vector);
 988                 if (err)
 989                         goto err_free;
 990         }
 991
 992         igb_configure_msix(adapter);
 993         return 0;
 994
 995 err_free:
 996         /* free already assigned IRQs */
 997         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 998
 999         vector--;
1000         for (i = 0; i < vector; i++) {
1001                 free_irq(adapter->msix_entries[free_vector++].vector,
1002                          adapter->q_vector[i]);
1003         }
1004 err_out:
1005         return err;
1006 }
1007
1008 /**
1009  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
1010  *  @adapter: board private structure to initialize
1011  *  @v_idx: Index of vector to be freed
1012  *
1013  *  This function frees the memory allocated to the q_vector.
1014  **/
1015 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1016 {
1017         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1018
1019         adapter->q_vector[v_idx] = NULL;
1020
1021         /* igb_get_stats64() might access the rings on this vector,
1022          * we must wait a grace period before freeing it.
1023          */
1024         if (q_vector)
1025                 kfree_rcu(q_vector, rcu);
1026 }
1027
1028 /**
1029  *  igb_reset_q_vector - Reset config for interrupt vector
1030  *  @adapter: board private structure to initialize
1031  *  @v_idx: Index of vector to be reset
1032  *
1033  *  If NAPI is enabled it will delete any references to the
1034  *  NAPI struct. This is preparation for igb_free_q_vector.
1035  **/
1036 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1037 {
1038         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1039
1040         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1041          * allocated. So, q_vector is NULL so we should stop here.
1042          */
1043         if (!q_vector)
1044                 return;
1045
1046         if (q_vector->tx.ring)
1047                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1048
1049         if (q_vector->rx.ring)
1050                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1051
1052         netif_napi_del(&q_vector->napi);
1053
1054 }
1055
1056 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1057 {
1058         int v_idx = adapter->num_q_vectors;
1059
1060         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1061                 pci_disable_msix(adapter->pdev);
1062         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1063                 pci_disable_msi(adapter->pdev);
1064
1065         while (v_idx--)
1066                 igb_reset_q_vector(adapter, v_idx);
1067 }
1068
1069 /**
1070  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1071  *  @adapter: board private structure to initialize
1072  *
1073  *  This function frees the memory allocated to the q_vectors.  In addition if
1074  *  NAPI is enabled it will delete any references to the NAPI struct prior
1075  *  to freeing the q_vector.
1076  **/
1077 static void igb_free_q_vectors(struct igb_adapter *adapter)
1078 {
1079         int v_idx = adapter->num_q_vectors;
1080
1081         adapter->num_tx_queues = 0;
1082         adapter->num_rx_queues = 0;
1083         adapter->num_q_vectors = 0;
1084
1085         while (v_idx--) {
1086                 igb_reset_q_vector(adapter, v_idx);
1087                 igb_free_q_vector(adapter, v_idx);
1088         }
1089 }
1090
1091 /**
1092  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1093  *  @adapter: board private structure to initialize
1094  *
1095  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1096  *  MSI-X interrupts allocated.
1097  */
1098 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1099 {
1100         igb_free_q_vectors(adapter);
1101         igb_reset_interrupt_capability(adapter);
1102 }
1103
1104 /**
1105  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1106  *  @adapter: board private structure to initialize
1107  *  @msix: boolean value of MSIX capability
1108  *
1109  *  Attempt to configure interrupts using the best available
1110  *  capabilities of the hardware and kernel.
1111  **/
1112 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1113 {
1114         int err;
1115         int numvecs, i;
1116
1117         if (!msix)
1118                 goto msi_only;
1119         adapter->flags |= IGB_FLAG_HAS_MSIX;
1120
1121         /* Number of supported queues. */
1122         adapter->num_rx_queues = adapter->rss_queues;
1123         if (adapter->vfs_allocated_count)
1124                 adapter->num_tx_queues = 1;
1125         else
1126                 adapter->num_tx_queues = adapter->rss_queues;
1127
1128         /* start with one vector for every Rx queue */
1129         numvecs = adapter->num_rx_queues;
1130
1131         /* if Tx handler is separate add 1 for every Tx queue */
1132         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1133                 numvecs += adapter->num_tx_queues;
1134
1135         /* store the number of vectors reserved for queues */
1136         adapter->num_q_vectors = numvecs;
1137
1138         /* add 1 vector for link status interrupts */
1139         numvecs++;
1140         for (i = 0; i < numvecs; i++)
1141                 adapter->msix_entries[i].entry = i;
1142
1143         err = pci_enable_msix_range(adapter->pdev,
1144                                     adapter->msix_entries,
1145                                     numvecs,
1146                                     numvecs);
1147         if (err > 0)
1148                 return;
1149
1150         igb_reset_interrupt_capability(adapter);
1151
1152         /* If we can't do MSI-X, try MSI */
1153 msi_only:
1154         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1155 #ifdef CONFIG_PCI_IOV
1156         /* disable SR-IOV for non MSI-X configurations */
1157         if (adapter->vf_data) {
1158                 struct e1000_hw *hw = &adapter->hw;
1159                 /* disable iov and allow time for transactions to clear */
1160                 pci_disable_sriov(adapter->pdev);
1161                 msleep(500);
1162
1163                 kfree(adapter->vf_data);
1164                 adapter->vf_data = NULL;
1165                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1166                 wrfl();
1167                 msleep(100);
1168                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1169         }
1170 #endif
1171         adapter->vfs_allocated_count = 0;
1172         adapter->rss_queues = 1;
1173         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1174         adapter->num_rx_queues = 1;
1175         adapter->num_tx_queues = 1;
1176         adapter->num_q_vectors = 1;
1177         if (!pci_enable_msi(adapter->pdev))
1178                 adapter->flags |= IGB_FLAG_HAS_MSI;
1179 }
1180
1181 static void igb_add_ring(struct igb_ring *ring,
1182                          struct igb_ring_container *head)
1183 {
1184         head->ring = ring;
1185         head->count++;
1186 }
1187
1188 /**
1189  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1190  *  @adapter: board private structure to initialize
1191  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1192  *  @v_idx: index of vector in adapter struct
1193  *  @txr_count: total number of Tx rings to allocate
1194  *  @txr_idx: index of first Tx ring to allocate
1195  *  @rxr_count: total number of Rx rings to allocate
1196  *  @rxr_idx: index of first Rx ring to allocate
1197  *
1198  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1199  **/
1200 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1201                               int v_count, int v_idx,
1202                               int txr_count, int txr_idx,
1203                               int rxr_count, int rxr_idx)
1204 {
1205         struct igb_q_vector *q_vector;
1206         struct igb_ring *ring;
1207         int ring_count, size;
1208
1209         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1210         if (txr_count > 1 || rxr_count > 1)
1211                 return -ENOMEM;
1212
1213         ring_count = txr_count + rxr_count;
1214         size = sizeof(struct igb_q_vector) +
1215                (sizeof(struct igb_ring) * ring_count);
1216
1217         /* allocate q_vector and rings */
1218         q_vector = adapter->q_vector[v_idx];
1219         if (!q_vector) {
1220                 q_vector = kzalloc(size, GFP_KERNEL);
1221         } else if (size > ksize(q_vector)) {
1222                 kfree_rcu(q_vector, rcu);
1223                 q_vector = kzalloc(size, GFP_KERNEL);
1224         } else {
1225                 memset(q_vector, 0, size);
1226         }
1227         if (!q_vector)
1228                 return -ENOMEM;
1229
1230         /* initialize NAPI */
1231         netif_napi_add(adapter->netdev, &q_vector->napi,
1232                        igb_poll, 64);
1233
1234         /* tie q_vector and adapter together */
1235         adapter->q_vector[v_idx] = q_vector;
1236         q_vector->adapter = adapter;
1237
1238         /* initialize work limits */
1239         q_vector->tx.work_limit = adapter->tx_work_limit;
1240
1241         /* initialize ITR configuration */
1242         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1243         q_vector->itr_val = IGB_START_ITR;
1244
1245         /* initialize pointer to rings */
1246         ring = q_vector->ring;
1247
1248         /* intialize ITR */
1249         if (rxr_count) {
1250                 /* rx or rx/tx vector */
1251                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1252                         q_vector->itr_val = adapter->rx_itr_setting;
1253         } else {
1254                 /* tx only vector */
1255                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1256                         q_vector->itr_val = adapter->tx_itr_setting;
1257         }
1258
1259         if (txr_count) {
1260                 /* assign generic ring traits */
1261                 ring->dev = &adapter->pdev->dev;
1262                 ring->netdev = adapter->netdev;
1263
1264                 /* configure backlink on ring */
1265                 ring->q_vector = q_vector;
1266
1267                 /* update q_vector Tx values */
1268                 igb_add_ring(ring, &q_vector->tx);
1269
1270                 /* For 82575, context index must be unique per ring. */
1271                 if (adapter->hw.mac.type == e1000_82575)
1272                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1273
1274                 /* apply Tx specific ring traits */
1275                 ring->count = adapter->tx_ring_count;
1276                 ring->queue_index = txr_idx;
1277
1278                 u64_stats_init(&ring->tx_syncp);
1279                 u64_stats_init(&ring->tx_syncp2);
1280
1281                 /* assign ring to adapter */
1282                 adapter->tx_ring[txr_idx] = ring;
1283
1284                 /* push pointer to next ring */
1285                 ring++;
1286         }
1287
1288         if (rxr_count) {
1289                 /* assign generic ring traits */
1290                 ring->dev = &adapter->pdev->dev;
1291                 ring->netdev = adapter->netdev;
1292
1293                 /* configure backlink on ring */
1294                 ring->q_vector = q_vector;
1295
1296                 /* update q_vector Rx values */
1297                 igb_add_ring(ring, &q_vector->rx);
1298
1299                 /* set flag indicating ring supports SCTP checksum offload */
1300                 if (adapter->hw.mac.type >= e1000_82576)
1301                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1302
1303                 /* On i350, i354, i210, and i211, loopback VLAN packets
1304                  * have the tag byte-swapped.
1305                  */
1306                 if (adapter->hw.mac.type >= e1000_i350)
1307                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1308
1309                 /* apply Rx specific ring traits */
1310                 ring->count = adapter->rx_ring_count;
1311                 ring->queue_index = rxr_idx;
1312
1313                 u64_stats_init(&ring->rx_syncp);
1314
1315                 /* assign ring to adapter */
1316                 adapter->rx_ring[rxr_idx] = ring;
1317         }
1318
1319         return 0;
1320 }
1321
1322
1323 /**
1324  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1325  *  @adapter: board private structure to initialize
1326  *
1327  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1328  *  return -ENOMEM.
1329  **/
1330 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1331 {
1332         int q_vectors = adapter->num_q_vectors;
1333         int rxr_remaining = adapter->num_rx_queues;
1334         int txr_remaining = adapter->num_tx_queues;
1335         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1336         int err;
1337
1338         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1339                 for (; rxr_remaining; v_idx++) {
1340                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1341                                                  0, 0, 1, rxr_idx);
1342
1343                         if (err)
1344                                 goto err_out;
1345
1346                         /* update counts and index */
1347                         rxr_remaining--;
1348                         rxr_idx++;
1349                 }
1350         }
1351
1352         for (; v_idx < q_vectors; v_idx++) {
1353                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1354                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1355
1356                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1357                                          tqpv, txr_idx, rqpv, rxr_idx);
1358
1359                 if (err)
1360                         goto err_out;
1361
1362                 /* update counts and index */
1363                 rxr_remaining -= rqpv;
1364                 txr_remaining -= tqpv;
1365                 rxr_idx++;
1366                 txr_idx++;
1367         }
1368
1369         return 0;
1370
1371 err_out:
1372         adapter->num_tx_queues = 0;
1373         adapter->num_rx_queues = 0;
1374         adapter->num_q_vectors = 0;
1375
1376         while (v_idx--)
1377                 igb_free_q_vector(adapter, v_idx);
1378
1379         return -ENOMEM;
1380 }
1381
1382 /**
1383  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1384  *  @adapter: board private structure to initialize
1385  *  @msix: boolean value of MSIX capability
1386  *
1387  *  This function initializes the interrupts and allocates all of the queues.
1388  **/
1389 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1390 {
1391         struct pci_dev *pdev = adapter->pdev;
1392         int err;
1393
1394         igb_set_interrupt_capability(adapter, msix);
1395
1396         err = igb_alloc_q_vectors(adapter);
1397         if (err) {
1398                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1399                 goto err_alloc_q_vectors;
1400         }
1401
1402         igb_cache_ring_register(adapter);
1403
1404         return 0;
1405
1406 err_alloc_q_vectors:
1407         igb_reset_interrupt_capability(adapter);
1408         return err;
1409 }
1410
1411 /**
1412  *  igb_request_irq - initialize interrupts
1413  *  @adapter: board private structure to initialize
1414  *
1415  *  Attempts to configure interrupts using the best available
1416  *  capabilities of the hardware and kernel.
1417  **/
1418 static int igb_request_irq(struct igb_adapter *adapter)
1419 {
1420         struct net_device *netdev = adapter->netdev;
1421         struct pci_dev *pdev = adapter->pdev;
1422         int err = 0;
1423
1424         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1425                 err = igb_request_msix(adapter);
1426                 if (!err)
1427                         goto request_done;
1428                 /* fall back to MSI */
1429                 igb_free_all_tx_resources(adapter);
1430                 igb_free_all_rx_resources(adapter);
1431
1432                 igb_clear_interrupt_scheme(adapter);
1433                 err = igb_init_interrupt_scheme(adapter, false);
1434                 if (err)
1435                         goto request_done;
1436
1437                 igb_setup_all_tx_resources(adapter);
1438                 igb_setup_all_rx_resources(adapter);
1439                 igb_configure(adapter);
1440         }
1441
1442         igb_assign_vector(adapter->q_vector[0], 0);
1443
1444         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1445                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1446                                   netdev->name, adapter);
1447                 if (!err)
1448                         goto request_done;
1449
1450                 /* fall back to legacy interrupts */
1451                 igb_reset_interrupt_capability(adapter);
1452                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1453         }
1454
1455         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1456                           netdev->name, adapter);
1457
1458         if (err)
1459                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1460                         err);
1461
1462 request_done:
1463         return err;
1464 }
1465
1466 static void igb_free_irq(struct igb_adapter *adapter)
1467 {
1468         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1469                 int vector = 0, i;
1470
1471                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1472
1473                 for (i = 0; i < adapter->num_q_vectors; i++)
1474                         free_irq(adapter->msix_entries[vector++].vector,
1475                                  adapter->q_vector[i]);
1476         } else {
1477                 free_irq(adapter->pdev->irq, adapter);
1478         }
1479 }
1480
1481 /**
1482  *  igb_irq_disable - Mask off interrupt generation on the NIC
1483  *  @adapter: board private structure
1484  **/
1485 static void igb_irq_disable(struct igb_adapter *adapter)
1486 {
1487         struct e1000_hw *hw = &adapter->hw;
1488
1489         /* we need to be careful when disabling interrupts.  The VFs are also
1490          * mapped into these registers and so clearing the bits can cause
1491          * issues on the VF drivers so we only need to clear what we set
1492          */
1493         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1494                 u32 regval = rd32(E1000_EIAM);
1495
1496                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1497                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1498                 regval = rd32(E1000_EIAC);
1499                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1500         }
1501
1502         wr32(E1000_IAM, 0);
1503         wr32(E1000_IMC, ~0);
1504         wrfl();
1505         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1506                 int i;
1507
1508                 for (i = 0; i < adapter->num_q_vectors; i++)
1509                         synchronize_irq(adapter->msix_entries[i].vector);
1510         } else {
1511                 synchronize_irq(adapter->pdev->irq);
1512         }
1513 }
1514
1515 /**
1516  *  igb_irq_enable - Enable default interrupt generation settings
1517  *  @adapter: board private structure
1518  **/
1519 static void igb_irq_enable(struct igb_adapter *adapter)
1520 {
1521         struct e1000_hw *hw = &adapter->hw;
1522
1523         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1524                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1525                 u32 regval = rd32(E1000_EIAC);
1526
1527                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1528                 regval = rd32(E1000_EIAM);
1529                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1530                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1531                 if (adapter->vfs_allocated_count) {
1532                         wr32(E1000_MBVFIMR, 0xFF);
1533                         ims |= E1000_IMS_VMMB;
1534                 }
1535                 wr32(E1000_IMS, ims);
1536         } else {
1537                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1538                                 E1000_IMS_DRSTA);
1539                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1540                                 E1000_IMS_DRSTA);
1541         }
1542 }
1543
1544 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1545 {
1546         struct e1000_hw *hw = &adapter->hw;
1547         u16 pf_id = adapter->vfs_allocated_count;
1548         u16 vid = adapter->hw.mng_cookie.vlan_id;
1549         u16 old_vid = adapter->mng_vlan_id;
1550
1551         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1552                 /* add VID to filter table */
1553                 igb_vfta_set(hw, vid, pf_id, true, true);
1554                 adapter->mng_vlan_id = vid;
1555         } else {
1556                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1557         }
1558
1559         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1560             (vid != old_vid) &&
1561             !test_bit(old_vid, adapter->active_vlans)) {
1562                 /* remove VID from filter table */
1563                 igb_vfta_set(hw, vid, pf_id, false, true);
1564         }
1565 }
1566
1567 /**
1568  *  igb_release_hw_control - release control of the h/w to f/w
1569  *  @adapter: address of board private structure
1570  *
1571  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1572  *  For ASF and Pass Through versions of f/w this means that the
1573  *  driver is no longer loaded.
1574  **/
1575 static void igb_release_hw_control(struct igb_adapter *adapter)
1576 {
1577         struct e1000_hw *hw = &adapter->hw;
1578         u32 ctrl_ext;
1579
1580         /* Let firmware take over control of h/w */
1581         ctrl_ext = rd32(E1000_CTRL_EXT);
1582         wr32(E1000_CTRL_EXT,
1583                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1584 }
1585
1586 /**
1587  *  igb_get_hw_control - get control of the h/w from f/w
1588  *  @adapter: address of board private structure
1589  *
1590  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1591  *  For ASF and Pass Through versions of f/w this means that
1592  *  the driver is loaded.
1593  **/
1594 static void igb_get_hw_control(struct igb_adapter *adapter)
1595 {
1596         struct e1000_hw *hw = &adapter->hw;
1597         u32 ctrl_ext;
1598
1599         /* Let firmware know the driver has taken over */
1600         ctrl_ext = rd32(E1000_CTRL_EXT);
1601         wr32(E1000_CTRL_EXT,
1602                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1603 }
1604
1605 /**
1606  *  igb_configure - configure the hardware for RX and TX
1607  *  @adapter: private board structure
1608  **/
1609 static void igb_configure(struct igb_adapter *adapter)
1610 {
1611         struct net_device *netdev = adapter->netdev;
1612         int i;
1613
1614         igb_get_hw_control(adapter);
1615         igb_set_rx_mode(netdev);
1616
1617         igb_restore_vlan(adapter);
1618
1619         igb_setup_tctl(adapter);
1620         igb_setup_mrqc(adapter);
1621         igb_setup_rctl(adapter);
1622
1623         igb_nfc_filter_restore(adapter);
1624         igb_configure_tx(adapter);
1625         igb_configure_rx(adapter);
1626
1627         igb_rx_fifo_flush_82575(&adapter->hw);
1628
1629         /* call igb_desc_unused which always leaves
1630          * at least 1 descriptor unused to make sure
1631          * next_to_use != next_to_clean
1632          */
1633         for (i = 0; i < adapter->num_rx_queues; i++) {
1634                 struct igb_ring *ring = adapter->rx_ring[i];
1635                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1636         }
1637 }
1638
1639 /**
1640  *  igb_power_up_link - Power up the phy/serdes link
1641  *  @adapter: address of board private structure
1642  **/
1643 void igb_power_up_link(struct igb_adapter *adapter)
1644 {
1645         igb_reset_phy(&adapter->hw);
1646
1647         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1648                 igb_power_up_phy_copper(&adapter->hw);
1649         else
1650                 igb_power_up_serdes_link_82575(&adapter->hw);
1651
1652         igb_setup_link(&adapter->hw);
1653 }
1654
1655 /**
1656  *  igb_power_down_link - Power down the phy/serdes link
1657  *  @adapter: address of board private structure
1658  */
1659 static void igb_power_down_link(struct igb_adapter *adapter)
1660 {
1661         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1662                 igb_power_down_phy_copper_82575(&adapter->hw);
1663         else
1664                 igb_shutdown_serdes_link_82575(&adapter->hw);
1665 }
1666
1667 /**
1668  * Detect and switch function for Media Auto Sense
1669  * @adapter: address of the board private structure
1670  **/
1671 static void igb_check_swap_media(struct igb_adapter *adapter)
1672 {
1673         struct e1000_hw *hw = &adapter->hw;
1674         u32 ctrl_ext, connsw;
1675         bool swap_now = false;
1676
1677         ctrl_ext = rd32(E1000_CTRL_EXT);
1678         connsw = rd32(E1000_CONNSW);
1679
1680         /* need to live swap if current media is copper and we have fiber/serdes
1681          * to go to.
1682          */
1683
1684         if ((hw->phy.media_type == e1000_media_type_copper) &&
1685             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1686                 swap_now = true;
1687         } else if ((hw->phy.media_type != e1000_media_type_copper) &&
1688                    !(connsw & E1000_CONNSW_SERDESD)) {
1689                 /* copper signal takes time to appear */
1690                 if (adapter->copper_tries < 4) {
1691                         adapter->copper_tries++;
1692                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1693                         wr32(E1000_CONNSW, connsw);
1694                         return;
1695                 } else {
1696                         adapter->copper_tries = 0;
1697                         if ((connsw & E1000_CONNSW_PHYSD) &&
1698                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1699                                 swap_now = true;
1700                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1701                                 wr32(E1000_CONNSW, connsw);
1702                         }
1703                 }
1704         }
1705
1706         if (!swap_now)
1707                 return;
1708
1709         switch (hw->phy.media_type) {
1710         case e1000_media_type_copper:
1711                 netdev_info(adapter->netdev,
1712                         "MAS: changing media to fiber/serdes\n");
1713                 ctrl_ext |=
1714                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1715                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1716                 adapter->copper_tries = 0;
1717                 break;
1718         case e1000_media_type_internal_serdes:
1719         case e1000_media_type_fiber:
1720                 netdev_info(adapter->netdev,
1721                         "MAS: changing media to copper\n");
1722                 ctrl_ext &=
1723                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1724                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1725                 break;
1726         default:
1727                 /* shouldn't get here during regular operation */
1728                 netdev_err(adapter->netdev,
1729                         "AMS: Invalid media type found, returning\n");
1730                 break;
1731         }
1732         wr32(E1000_CTRL_EXT, ctrl_ext);
1733 }
1734
1735 /**
1736  *  igb_up - Open the interface and prepare it to handle traffic
1737  *  @adapter: board private structure
1738  **/
1739 int igb_up(struct igb_adapter *adapter)
1740 {
1741         struct e1000_hw *hw = &adapter->hw;
1742         int i;
1743
1744         /* hardware has been reset, we need to reload some things */
1745         igb_configure(adapter);
1746
1747         clear_bit(__IGB_DOWN, &adapter->state);
1748
1749         for (i = 0; i < adapter->num_q_vectors; i++)
1750                 napi_enable(&(adapter->q_vector[i]->napi));
1751
1752         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1753                 igb_configure_msix(adapter);
1754         else
1755                 igb_assign_vector(adapter->q_vector[0], 0);
1756
1757         /* Clear any pending interrupts. */
1758         rd32(E1000_ICR);
1759         igb_irq_enable(adapter);
1760
1761         /* notify VFs that reset has been completed */
1762         if (adapter->vfs_allocated_count) {
1763                 u32 reg_data = rd32(E1000_CTRL_EXT);
1764
1765                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1766                 wr32(E1000_CTRL_EXT, reg_data);
1767         }
1768
1769         netif_tx_start_all_queues(adapter->netdev);
1770
1771         /* start the watchdog. */
1772         hw->mac.get_link_status = 1;
1773         schedule_work(&adapter->watchdog_task);
1774
1775         if ((adapter->flags & IGB_FLAG_EEE) &&
1776             (!hw->dev_spec._82575.eee_disable))
1777                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1778
1779         return 0;
1780 }
1781
1782 void igb_down(struct igb_adapter *adapter)
1783 {
1784         struct net_device *netdev = adapter->netdev;
1785         struct e1000_hw *hw = &adapter->hw;
1786         u32 tctl, rctl;
1787         int i;
1788
1789         /* signal that we're down so the interrupt handler does not
1790          * reschedule our watchdog timer
1791          */
1792         set_bit(__IGB_DOWN, &adapter->state);
1793
1794         /* disable receives in the hardware */
1795         rctl = rd32(E1000_RCTL);
1796         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1797         /* flush and sleep below */
1798
1799         netif_carrier_off(netdev);
1800         netif_tx_stop_all_queues(netdev);
1801
1802         /* disable transmits in the hardware */
1803         tctl = rd32(E1000_TCTL);
1804         tctl &= ~E1000_TCTL_EN;
1805         wr32(E1000_TCTL, tctl);
1806         /* flush both disables and wait for them to finish */
1807         wrfl();
1808         usleep_range(10000, 11000);
1809
1810         igb_irq_disable(adapter);
1811
1812         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1813
1814         for (i = 0; i < adapter->num_q_vectors; i++) {
1815                 if (adapter->q_vector[i]) {
1816                         napi_synchronize(&adapter->q_vector[i]->napi);
1817                         napi_disable(&adapter->q_vector[i]->napi);
1818                 }
1819         }
1820
1821         del_timer_sync(&adapter->watchdog_timer);
1822         del_timer_sync(&adapter->phy_info_timer);
1823
1824         /* record the stats before reset*/
1825         spin_lock(&adapter->stats64_lock);
1826         igb_update_stats(adapter, &adapter->stats64);
1827         spin_unlock(&adapter->stats64_lock);
1828
1829         adapter->link_speed = 0;
1830         adapter->link_duplex = 0;
1831
1832         if (!pci_channel_offline(adapter->pdev))
1833                 igb_reset(adapter);
1834
1835         /* clear VLAN promisc flag so VFTA will be updated if necessary */
1836         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
1837
1838         igb_clean_all_tx_rings(adapter);
1839         igb_clean_all_rx_rings(adapter);
1840 #ifdef CONFIG_IGB_DCA
1841
1842         /* since we reset the hardware DCA settings were cleared */
1843         igb_setup_dca(adapter);
1844 #endif
1845 }
1846
1847 void igb_reinit_locked(struct igb_adapter *adapter)
1848 {
1849         WARN_ON(in_interrupt());
1850         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1851                 usleep_range(1000, 2000);
1852         igb_down(adapter);
1853         igb_up(adapter);
1854         clear_bit(__IGB_RESETTING, &adapter->state);
1855 }
1856
1857 /** igb_enable_mas - Media Autosense re-enable after swap
1858  *
1859  * @adapter: adapter struct
1860  **/
1861 static void igb_enable_mas(struct igb_adapter *adapter)
1862 {
1863         struct e1000_hw *hw = &adapter->hw;
1864         u32 connsw = rd32(E1000_CONNSW);
1865
1866         /* configure for SerDes media detect */
1867         if ((hw->phy.media_type == e1000_media_type_copper) &&
1868             (!(connsw & E1000_CONNSW_SERDESD))) {
1869                 connsw |= E1000_CONNSW_ENRGSRC;
1870                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1871                 wr32(E1000_CONNSW, connsw);
1872                 wrfl();
1873         }
1874 }
1875
1876 void igb_reset(struct igb_adapter *adapter)
1877 {
1878         struct pci_dev *pdev = adapter->pdev;
1879         struct e1000_hw *hw = &adapter->hw;
1880         struct e1000_mac_info *mac = &hw->mac;
1881         struct e1000_fc_info *fc = &hw->fc;
1882         u32 pba, hwm;
1883
1884         /* Repartition Pba for greater than 9k mtu
1885          * To take effect CTRL.RST is required.
1886          */
1887         switch (mac->type) {
1888         case e1000_i350:
1889         case e1000_i354:
1890         case e1000_82580:
1891                 pba = rd32(E1000_RXPBS);
1892                 pba = igb_rxpbs_adjust_82580(pba);
1893                 break;
1894         case e1000_82576:
1895                 pba = rd32(E1000_RXPBS);
1896                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1897                 break;
1898         case e1000_82575:
1899         case e1000_i210:
1900         case e1000_i211:
1901         default:
1902                 pba = E1000_PBA_34K;
1903                 break;
1904         }
1905
1906         if (mac->type == e1000_82575) {
1907                 u32 min_rx_space, min_tx_space, needed_tx_space;
1908
1909                 /* write Rx PBA so that hardware can report correct Tx PBA */
1910                 wr32(E1000_PBA, pba);
1911
1912                 /* To maintain wire speed transmits, the Tx FIFO should be
1913                  * large enough to accommodate two full transmit packets,
1914                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1915                  * the Rx FIFO should be large enough to accommodate at least
1916                  * one full receive packet and is similarly rounded up and
1917                  * expressed in KB.
1918                  */
1919                 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
1920
1921                 /* The Tx FIFO also stores 16 bytes of information about the Tx
1922                  * but don't include Ethernet FCS because hardware appends it.
1923                  * We only need to round down to the nearest 512 byte block
1924                  * count since the value we care about is 2 frames, not 1.
1925                  */
1926                 min_tx_space = adapter->max_frame_size;
1927                 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
1928                 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
1929
1930                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1931                 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
1932
1933                 /* If current Tx allocation is less than the min Tx FIFO size,
1934                  * and the min Tx FIFO size is less than the current Rx FIFO
1935                  * allocation, take space away from current Rx allocation.
1936                  */
1937                 if (needed_tx_space < pba) {
1938                         pba -= needed_tx_space;
1939
1940                         /* if short on Rx space, Rx wins and must trump Tx
1941                          * adjustment
1942                          */
1943                         if (pba < min_rx_space)
1944                                 pba = min_rx_space;
1945                 }
1946
1947                 /* adjust PBA for jumbo frames */
1948                 wr32(E1000_PBA, pba);
1949         }
1950
1951         /* flow control settings
1952          * The high water mark must be low enough to fit one full frame
1953          * after transmitting the pause frame.  As such we must have enough
1954          * space to allow for us to complete our current transmit and then
1955          * receive the frame that is in progress from the link partner.
1956          * Set it to:
1957          * - the full Rx FIFO size minus one full Tx plus one full Rx frame
1958          */
1959         hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
1960
1961         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1962         fc->low_water = fc->high_water - 16;
1963         fc->pause_time = 0xFFFF;
1964         fc->send_xon = 1;
1965         fc->current_mode = fc->requested_mode;
1966
1967         /* disable receive for all VFs and wait one second */
1968         if (adapter->vfs_allocated_count) {
1969                 int i;
1970
1971                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1972                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1973
1974                 /* ping all the active vfs to let them know we are going down */
1975                 igb_ping_all_vfs(adapter);
1976
1977                 /* disable transmits and receives */
1978                 wr32(E1000_VFRE, 0);
1979                 wr32(E1000_VFTE, 0);
1980         }
1981
1982         /* Allow time for pending master requests to run */
1983         hw->mac.ops.reset_hw(hw);
1984         wr32(E1000_WUC, 0);
1985
1986         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1987                 /* need to resetup here after media swap */
1988                 adapter->ei.get_invariants(hw);
1989                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
1990         }
1991         if ((mac->type == e1000_82575) &&
1992             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
1993                 igb_enable_mas(adapter);
1994         }
1995         if (hw->mac.ops.init_hw(hw))
1996                 dev_err(&pdev->dev, "Hardware Error\n");
1997
1998         /* Flow control settings reset on hardware reset, so guarantee flow
1999          * control is off when forcing speed.
2000          */
2001         if (!hw->mac.autoneg)
2002                 igb_force_mac_fc(hw);
2003
2004         igb_init_dmac(adapter, pba);
2005 #ifdef CONFIG_IGB_HWMON
2006         /* Re-initialize the thermal sensor on i350 devices. */
2007         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2008                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2009                         /* If present, re-initialize the external thermal sensor
2010                          * interface.
2011                          */
2012                         if (adapter->ets)
2013                                 mac->ops.init_thermal_sensor_thresh(hw);
2014                 }
2015         }
2016 #endif
2017         /* Re-establish EEE setting */
2018         if (hw->phy.media_type == e1000_media_type_copper) {
2019                 switch (mac->type) {
2020                 case e1000_i350:
2021                 case e1000_i210:
2022                 case e1000_i211:
2023                         igb_set_eee_i350(hw, true, true);
2024                         break;
2025                 case e1000_i354:
2026                         igb_set_eee_i354(hw, true, true);
2027                         break;
2028                 default:
2029                         break;
2030                 }
2031         }
2032         if (!netif_running(adapter->netdev))
2033                 igb_power_down_link(adapter);
2034
2035         igb_update_mng_vlan(adapter);
2036
2037         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2038         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2039
2040         /* Re-enable PTP, where applicable. */
2041         if (adapter->ptp_flags & IGB_PTP_ENABLED)
2042                 igb_ptp_reset(adapter);
2043
2044         igb_get_phy_info(hw);
2045 }
2046
2047 static netdev_features_t igb_fix_features(struct net_device *netdev,
2048         netdev_features_t features)
2049 {
2050         /* Since there is no support for separate Rx/Tx vlan accel
2051          * enable/disable make sure Tx flag is always in same state as Rx.
2052          */
2053         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2054                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2055         else
2056                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2057
2058         return features;
2059 }
2060
2061 static int igb_set_features(struct net_device *netdev,
2062         netdev_features_t features)
2063 {
2064         netdev_features_t changed = netdev->features ^ features;
2065         struct igb_adapter *adapter = netdev_priv(netdev);
2066
2067         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2068                 igb_vlan_mode(netdev, features);
2069
2070         if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2071                 return 0;
2072
2073         if (!(features & NETIF_F_NTUPLE)) {
2074                 struct hlist_node *node2;
2075                 struct igb_nfc_filter *rule;
2076
2077                 spin_lock(&adapter->nfc_lock);
2078                 hlist_for_each_entry_safe(rule, node2,
2079                                           &adapter->nfc_filter_list, nfc_node) {
2080                         igb_erase_filter(adapter, rule);
2081                         hlist_del(&rule->nfc_node);
2082                         kfree(rule);
2083                 }
2084                 spin_unlock(&adapter->nfc_lock);
2085                 adapter->nfc_filter_count = 0;
2086         }
2087
2088         netdev->features = features;
2089
2090         if (netif_running(netdev))
2091                 igb_reinit_locked(adapter);
2092         else
2093                 igb_reset(adapter);
2094
2095         return 0;
2096 }
2097
2098 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2099                            struct net_device *dev,
2100                            const unsigned char *addr, u16 vid,
2101                            u16 flags)
2102 {
2103         /* guarantee we can provide a unique filter for the unicast address */
2104         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2105                 struct igb_adapter *adapter = netdev_priv(dev);
2106                 struct e1000_hw *hw = &adapter->hw;
2107                 int vfn = adapter->vfs_allocated_count;
2108                 int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
2109
2110                 if (netdev_uc_count(dev) >= rar_entries)
2111                         return -ENOMEM;
2112         }
2113
2114         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2115 }
2116
2117 #define IGB_MAX_MAC_HDR_LEN     127
2118 #define IGB_MAX_NETWORK_HDR_LEN 511
2119
2120 static netdev_features_t
2121 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2122                    netdev_features_t features)
2123 {
2124         unsigned int network_hdr_len, mac_hdr_len;
2125
2126         /* Make certain the headers can be described by a context descriptor */
2127         mac_hdr_len = skb_network_header(skb) - skb->data;
2128         if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2129                 return features & ~(NETIF_F_HW_CSUM |
2130                                     NETIF_F_SCTP_CRC |
2131                                     NETIF_F_HW_VLAN_CTAG_TX |
2132                                     NETIF_F_TSO |
2133                                     NETIF_F_TSO6);
2134
2135         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2136         if (unlikely(network_hdr_len >  IGB_MAX_NETWORK_HDR_LEN))
2137                 return features & ~(NETIF_F_HW_CSUM |
2138                                     NETIF_F_SCTP_CRC |
2139                                     NETIF_F_TSO |
2140                                     NETIF_F_TSO6);
2141
2142         /* We can only support IPV4 TSO in tunnels if we can mangle the
2143          * inner IP ID field, so strip TSO if MANGLEID is not supported.
2144          */
2145         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2146                 features &= ~NETIF_F_TSO;
2147
2148         return features;
2149 }
2150
2151 static const struct net_device_ops igb_netdev_ops = {
2152         .ndo_open               = igb_open,
2153         .ndo_stop               = igb_close,
2154         .ndo_start_xmit         = igb_xmit_frame,
2155         .ndo_get_stats64        = igb_get_stats64,
2156         .ndo_set_rx_mode        = igb_set_rx_mode,
2157         .ndo_set_mac_address    = igb_set_mac,
2158         .ndo_change_mtu         = igb_change_mtu,
2159         .ndo_do_ioctl           = igb_ioctl,
2160         .ndo_tx_timeout         = igb_tx_timeout,
2161         .ndo_validate_addr      = eth_validate_addr,
2162         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2163         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2164         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2165         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2166         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2167         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2168         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2169 #ifdef CONFIG_NET_POLL_CONTROLLER
2170         .ndo_poll_controller    = igb_netpoll,
2171 #endif
2172         .ndo_fix_features       = igb_fix_features,
2173         .ndo_set_features       = igb_set_features,
2174         .ndo_fdb_add            = igb_ndo_fdb_add,
2175         .ndo_features_check     = igb_features_check,
2176 };
2177
2178 /**
2179  * igb_set_fw_version - Configure version string for ethtool
2180  * @adapter: adapter struct
2181  **/
2182 void igb_set_fw_version(struct igb_adapter *adapter)
2183 {
2184         struct e1000_hw *hw = &adapter->hw;
2185         struct e1000_fw_version fw;
2186
2187         igb_get_fw_version(hw, &fw);
2188
2189         switch (hw->mac.type) {
2190         case e1000_i210:
2191         case e1000_i211:
2192                 if (!(igb_get_flash_presence_i210(hw))) {
2193                         snprintf(adapter->fw_version,
2194                                  sizeof(adapter->fw_version),
2195                                  "%2d.%2d-%d",
2196                                  fw.invm_major, fw.invm_minor,
2197                                  fw.invm_img_type);
2198                         break;
2199                 }
2200                 /* fall through */
2201         default:
2202                 /* if option is rom valid, display its version too */
2203                 if (fw.or_valid) {
2204                         snprintf(adapter->fw_version,
2205                                  sizeof(adapter->fw_version),
2206                                  "%d.%d, 0x%08x, %d.%d.%d",
2207                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2208                                  fw.or_major, fw.or_build, fw.or_patch);
2209                 /* no option rom */
2210                 } else if (fw.etrack_id != 0X0000) {
2211                         snprintf(adapter->fw_version,
2212                             sizeof(adapter->fw_version),
2213                             "%d.%d, 0x%08x",
2214                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2215                 } else {
2216                 snprintf(adapter->fw_version,
2217                     sizeof(adapter->fw_version),
2218                     "%d.%d.%d",
2219                     fw.eep_major, fw.eep_minor, fw.eep_build);
2220                 }
2221                 break;
2222         }
2223 }
2224
2225 /**
2226  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2227  *
2228  * @adapter: adapter struct
2229  **/
2230 static void igb_init_mas(struct igb_adapter *adapter)
2231 {
2232         struct e1000_hw *hw = &adapter->hw;
2233         u16 eeprom_data;
2234
2235         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2236         switch (hw->bus.func) {
2237         case E1000_FUNC_0:
2238                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2239                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2240                         netdev_info(adapter->netdev,
2241                                 "MAS: Enabling Media Autosense for port %d\n",
2242                                 hw->bus.func);
2243                 }
2244                 break;
2245         case E1000_FUNC_1:
2246                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2247                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2248                         netdev_info(adapter->netdev,
2249                                 "MAS: Enabling Media Autosense for port %d\n",
2250                                 hw->bus.func);
2251                 }
2252                 break;
2253         case E1000_FUNC_2:
2254                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2255                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2256                         netdev_info(adapter->netdev,
2257                                 "MAS: Enabling Media Autosense for port %d\n",
2258                                 hw->bus.func);
2259                 }
2260                 break;
2261         case E1000_FUNC_3:
2262                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2263                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2264                         netdev_info(adapter->netdev,
2265                                 "MAS: Enabling Media Autosense for port %d\n",
2266                                 hw->bus.func);
2267                 }
2268                 break;
2269         default:
2270                 /* Shouldn't get here */
2271                 netdev_err(adapter->netdev,
2272                         "MAS: Invalid port configuration, returning\n");
2273                 break;
2274         }
2275 }
2276
2277 /**
2278  *  igb_init_i2c - Init I2C interface
2279  *  @adapter: pointer to adapter structure
2280  **/
2281 static s32 igb_init_i2c(struct igb_adapter *adapter)
2282 {
2283         s32 status = 0;
2284
2285         /* I2C interface supported on i350 devices */
2286         if (adapter->hw.mac.type != e1000_i350)
2287                 return 0;
2288
2289         /* Initialize the i2c bus which is controlled by the registers.
2290          * This bus will use the i2c_algo_bit structue that implements
2291          * the protocol through toggling of the 4 bits in the register.
2292          */
2293         adapter->i2c_adap.owner = THIS_MODULE;
2294         adapter->i2c_algo = igb_i2c_algo;
2295         adapter->i2c_algo.data = adapter;
2296         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
2297         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
2298         strlcpy(adapter->i2c_adap.name, "igb BB",
2299                 sizeof(adapter->i2c_adap.name));
2300         status = i2c_bit_add_bus(&adapter->i2c_adap);
2301         return status;
2302 }
2303
2304 /**
2305  *  igb_probe - Device Initialization Routine
2306  *  @pdev: PCI device information struct
2307  *  @ent: entry in igb_pci_tbl
2308  *
2309  *  Returns 0 on success, negative on failure
2310  *
2311  *  igb_probe initializes an adapter identified by a pci_dev structure.
2312  *  The OS initialization, configuring of the adapter private structure,
2313  *  and a hardware reset occur.
2314  **/
2315 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2316 {
2317         struct net_device *netdev;
2318         struct igb_adapter *adapter;
2319         struct e1000_hw *hw;
2320         u16 eeprom_data = 0;
2321         s32 ret_val;
2322         static int global_quad_port_a; /* global quad port a indication */
2323         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2324         int err, pci_using_dac;
2325         u8 part_str[E1000_PBANUM_LENGTH];
2326
2327         /* Catch broken hardware that put the wrong VF device ID in
2328          * the PCIe SR-IOV capability.
2329          */
2330         if (pdev->is_virtfn) {
2331                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2332                         pci_name(pdev), pdev->vendor, pdev->device);
2333                 return -EINVAL;
2334         }
2335
2336         err = pci_enable_device_mem(pdev);
2337         if (err)
2338                 return err;
2339
2340         pci_using_dac = 0;
2341         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2342         if (!err) {
2343                 pci_using_dac = 1;
2344         } else {
2345                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2346                 if (err) {
2347                         dev_err(&pdev->dev,
2348                                 "No usable DMA configuration, aborting\n");
2349                         goto err_dma;
2350                 }
2351         }
2352
2353         err = pci_request_mem_regions(pdev, igb_driver_name);
2354         if (err)
2355                 goto err_pci_reg;
2356
2357         pci_enable_pcie_error_reporting(pdev);
2358
2359         pci_set_master(pdev);
2360         pci_save_state(pdev);
2361
2362         err = -ENOMEM;
2363         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2364                                    IGB_MAX_TX_QUEUES);
2365         if (!netdev)
2366                 goto err_alloc_etherdev;
2367
2368         SET_NETDEV_DEV(netdev, &pdev->dev);
2369
2370         pci_set_drvdata(pdev, netdev);
2371         adapter = netdev_priv(netdev);
2372         adapter->netdev = netdev;
2373         adapter->pdev = pdev;
2374         hw = &adapter->hw;
2375         hw->back = adapter;
2376         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2377
2378         err = -EIO;
2379         adapter->io_addr = pci_iomap(pdev, 0, 0);
2380         if (!adapter->io_addr)
2381                 goto err_ioremap;
2382         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
2383         hw->hw_addr = adapter->io_addr;
2384
2385         netdev->netdev_ops = &igb_netdev_ops;
2386         igb_set_ethtool_ops(netdev);
2387         netdev->watchdog_timeo = 5 * HZ;
2388
2389         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2390
2391         netdev->mem_start = pci_resource_start(pdev, 0);
2392         netdev->mem_end = pci_resource_end(pdev, 0);
2393
2394         /* PCI config space info */
2395         hw->vendor_id = pdev->vendor;
2396         hw->device_id = pdev->device;
2397         hw->revision_id = pdev->revision;
2398         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2399         hw->subsystem_device_id = pdev->subsystem_device;
2400
2401         /* Copy the default MAC, PHY and NVM function pointers */
2402         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2403         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2404         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2405         /* Initialize skew-specific constants */
2406         err = ei->get_invariants(hw);
2407         if (err)
2408                 goto err_sw_init;
2409
2410         /* setup the private structure */
2411         err = igb_sw_init(adapter);
2412         if (err)
2413                 goto err_sw_init;
2414
2415         igb_get_bus_info_pcie(hw);
2416
2417         hw->phy.autoneg_wait_to_complete = false;
2418
2419         /* Copper options */
2420         if (hw->phy.media_type == e1000_media_type_copper) {
2421                 hw->phy.mdix = AUTO_ALL_MODES;
2422                 hw->phy.disable_polarity_correction = false;
2423                 hw->phy.ms_type = e1000_ms_hw_default;
2424         }
2425
2426         if (igb_check_reset_block(hw))
2427                 dev_info(&pdev->dev,
2428                         "PHY reset is blocked due to SOL/IDER session.\n");
2429
2430         /* features is initialized to 0 in allocation, it might have bits
2431          * set by igb_sw_init so we should use an or instead of an
2432          * assignment.
2433          */
2434         netdev->features |= NETIF_F_SG |
2435                             NETIF_F_TSO |
2436                             NETIF_F_TSO6 |
2437                             NETIF_F_RXHASH |
2438                             NETIF_F_RXCSUM |
2439                             NETIF_F_HW_CSUM;
2440
2441         if (hw->mac.type >= e1000_82576)
2442                 netdev->features |= NETIF_F_SCTP_CRC;
2443
2444 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
2445                                   NETIF_F_GSO_GRE_CSUM | \
2446                                   NETIF_F_GSO_IPXIP4 | \
2447                                   NETIF_F_GSO_IPXIP6 | \
2448                                   NETIF_F_GSO_UDP_TUNNEL | \
2449                                   NETIF_F_GSO_UDP_TUNNEL_CSUM)
2450
2451         netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
2452         netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
2453
2454         /* copy netdev features into list of user selectable features */
2455         netdev->hw_features |= netdev->features |
2456                                NETIF_F_HW_VLAN_CTAG_RX |
2457                                NETIF_F_HW_VLAN_CTAG_TX |
2458                                NETIF_F_RXALL;
2459
2460         if (hw->mac.type >= e1000_i350)
2461                 netdev->hw_features |= NETIF_F_NTUPLE;
2462
2463         if (pci_using_dac)
2464                 netdev->features |= NETIF_F_HIGHDMA;
2465
2466         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
2467         netdev->mpls_features |= NETIF_F_HW_CSUM;
2468         netdev->hw_enc_features |= netdev->vlan_features;
2469
2470         /* set this bit last since it cannot be part of vlan_features */
2471         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
2472                             NETIF_F_HW_VLAN_CTAG_RX |
2473                             NETIF_F_HW_VLAN_CTAG_TX;
2474
2475         netdev->priv_flags |= IFF_SUPP_NOFCS;
2476
2477         netdev->priv_flags |= IFF_UNICAST_FLT;
2478
2479         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2480
2481         /* before reading the NVM, reset the controller to put the device in a
2482          * known good starting state
2483          */
2484         hw->mac.ops.reset_hw(hw);
2485
2486         /* make sure the NVM is good , i211/i210 parts can have special NVM
2487          * that doesn't contain a checksum
2488          */
2489         switch (hw->mac.type) {
2490         case e1000_i210:
2491         case e1000_i211:
2492                 if (igb_get_flash_presence_i210(hw)) {
2493                         if (hw->nvm.ops.validate(hw) < 0) {
2494                                 dev_err(&pdev->dev,
2495                                         "The NVM Checksum Is Not Valid\n");
2496                                 err = -EIO;
2497                                 goto err_eeprom;
2498                         }
2499                 }
2500                 break;
2501         default:
2502                 if (hw->nvm.ops.validate(hw) < 0) {
2503                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2504                         err = -EIO;
2505                         goto err_eeprom;
2506                 }
2507                 break;
2508         }
2509
2510         if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
2511                 /* copy the MAC address out of the NVM */
2512                 if (hw->mac.ops.read_mac_addr(hw))
2513                         dev_err(&pdev->dev, "NVM Read Error\n");
2514         }
2515
2516         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2517
2518         if (!is_valid_ether_addr(netdev->dev_addr)) {
2519                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2520                 err = -EIO;
2521                 goto err_eeprom;
2522         }
2523
2524         /* get firmware version for ethtool -i */
2525         igb_set_fw_version(adapter);
2526
2527         /* configure RXPBSIZE and TXPBSIZE */
2528         if (hw->mac.type == e1000_i210) {
2529                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
2530                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
2531         }
2532
2533         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2534                     (unsigned long) adapter);
2535         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2536                     (unsigned long) adapter);
2537
2538         INIT_WORK(&adapter->reset_task, igb_reset_task);
2539         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2540
2541         /* Initialize link properties that are user-changeable */
2542         adapter->fc_autoneg = true;
2543         hw->mac.autoneg = true;
2544         hw->phy.autoneg_advertised = 0x2f;
2545
2546         hw->fc.requested_mode = e1000_fc_default;
2547         hw->fc.current_mode = e1000_fc_default;
2548
2549         igb_validate_mdi_setting(hw);
2550
2551         /* By default, support wake on port A */
2552         if (hw->bus.func == 0)
2553                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2554
2555         /* Check the NVM for wake support on non-port A ports */
2556         if (hw->mac.type >= e1000_82580)
2557                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2558                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2559                                  &eeprom_data);
2560         else if (hw->bus.func == 1)
2561                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2562
2563         if (eeprom_data & IGB_EEPROM_APME)
2564                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2565
2566         /* now that we have the eeprom settings, apply the special cases where
2567          * the eeprom may be wrong or the board simply won't support wake on
2568          * lan on a particular port
2569          */
2570         switch (pdev->device) {
2571         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2572                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2573                 break;
2574         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2575         case E1000_DEV_ID_82576_FIBER:
2576         case E1000_DEV_ID_82576_SERDES:
2577                 /* Wake events only supported on port A for dual fiber
2578                  * regardless of eeprom setting
2579                  */
2580                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2581                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2582                 break;
2583         case E1000_DEV_ID_82576_QUAD_COPPER:
2584         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2585                 /* if quad port adapter, disable WoL on all but port A */
2586                 if (global_quad_port_a != 0)
2587                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2588                 else
2589                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2590                 /* Reset for multiple quad port adapters */
2591                 if (++global_quad_port_a == 4)
2592                         global_quad_port_a = 0;
2593                 break;
2594         default:
2595                 /* If the device can't wake, don't set software support */
2596                 if (!device_can_wakeup(&adapter->pdev->dev))
2597                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2598         }
2599
2600         /* initialize the wol settings based on the eeprom settings */
2601         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2602                 adapter->wol |= E1000_WUFC_MAG;
2603
2604         /* Some vendors want WoL disabled by default, but still supported */
2605         if ((hw->mac.type == e1000_i350) &&
2606             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2607                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2608                 adapter->wol = 0;
2609         }
2610
2611         /* Some vendors want the ability to Use the EEPROM setting as
2612          * enable/disable only, and not for capability
2613          */
2614         if (((hw->mac.type == e1000_i350) ||
2615              (hw->mac.type == e1000_i354)) &&
2616             (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
2617                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2618                 adapter->wol = 0;
2619         }
2620         if (hw->mac.type == e1000_i350) {
2621                 if (((pdev->subsystem_device == 0x5001) ||
2622                      (pdev->subsystem_device == 0x5002)) &&
2623                                 (hw->bus.func == 0)) {
2624                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2625                         adapter->wol = 0;
2626                 }
2627                 if (pdev->subsystem_device == 0x1F52)
2628                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2629         }
2630
2631         device_set_wakeup_enable(&adapter->pdev->dev,
2632                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2633
2634         /* reset the hardware with the new settings */
2635         igb_reset(adapter);
2636
2637         /* Init the I2C interface */
2638         err = igb_init_i2c(adapter);
2639         if (err) {
2640                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2641                 goto err_eeprom;
2642         }
2643
2644         /* let the f/w know that the h/w is now under the control of the
2645          * driver.
2646          */
2647         igb_get_hw_control(adapter);
2648
2649         strcpy(netdev->name, "eth%d");
2650         err = register_netdev(netdev);
2651         if (err)
2652                 goto err_register;
2653
2654         /* carrier off reporting is important to ethtool even BEFORE open */
2655         netif_carrier_off(netdev);
2656
2657 #ifdef CONFIG_IGB_DCA
2658         if (dca_add_requester(&pdev->dev) == 0) {
2659                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2660                 dev_info(&pdev->dev, "DCA enabled\n");
2661                 igb_setup_dca(adapter);
2662         }
2663
2664 #endif
2665 #ifdef CONFIG_IGB_HWMON
2666         /* Initialize the thermal sensor on i350 devices. */
2667         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2668                 u16 ets_word;
2669
2670                 /* Read the NVM to determine if this i350 device supports an
2671                  * external thermal sensor.
2672                  */
2673                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2674                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2675                         adapter->ets = true;
2676                 else
2677                         adapter->ets = false;
2678                 if (igb_sysfs_init(adapter))
2679                         dev_err(&pdev->dev,
2680                                 "failed to allocate sysfs resources\n");
2681         } else {
2682                 adapter->ets = false;
2683         }
2684 #endif
2685         /* Check if Media Autosense is enabled */
2686         adapter->ei = *ei;
2687         if (hw->dev_spec._82575.mas_capable)
2688                 igb_init_mas(adapter);
2689
2690         /* do hw tstamp init after resetting */
2691         igb_ptp_init(adapter);
2692
2693         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2694         /* print bus type/speed/width info, not applicable to i354 */
2695         if (hw->mac.type != e1000_i354) {
2696                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2697                          netdev->name,
2698                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2699                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2700                            "unknown"),
2701                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2702                           "Width x4" :
2703                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
2704                           "Width x2" :
2705                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
2706                           "Width x1" : "unknown"), netdev->dev_addr);
2707         }
2708
2709         if ((hw->mac.type >= e1000_i210 ||
2710              igb_get_flash_presence_i210(hw))) {
2711                 ret_val = igb_read_part_string(hw, part_str,
2712                                                E1000_PBANUM_LENGTH);
2713         } else {
2714                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
2715         }
2716
2717         if (ret_val)
2718                 strcpy(part_str, "Unknown");
2719         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2720         dev_info(&pdev->dev,
2721                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2722                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
2723                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2724                 adapter->num_rx_queues, adapter->num_tx_queues);
2725         if (hw->phy.media_type == e1000_media_type_copper) {
2726                 switch (hw->mac.type) {
2727                 case e1000_i350:
2728                 case e1000_i210:
2729                 case e1000_i211:
2730                         /* Enable EEE for internal copper PHY devices */
2731                         err = igb_set_eee_i350(hw, true, true);
2732                         if ((!err) &&
2733                             (!hw->dev_spec._82575.eee_disable)) {
2734                                 adapter->eee_advert =
2735                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2736                                 adapter->flags |= IGB_FLAG_EEE;
2737                         }
2738                         break;
2739                 case e1000_i354:
2740                         if ((rd32(E1000_CTRL_EXT) &
2741                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2742                                 err = igb_set_eee_i354(hw, true, true);
2743                                 if ((!err) &&
2744                                         (!hw->dev_spec._82575.eee_disable)) {
2745                                         adapter->eee_advert =
2746                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2747                                         adapter->flags |= IGB_FLAG_EEE;
2748                                 }
2749                         }
2750                         break;
2751                 default:
2752                         break;
2753                 }
2754         }
2755         pm_runtime_put_noidle(&pdev->dev);
2756         return 0;
2757
2758 err_register:
2759         igb_release_hw_control(adapter);
2760         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2761 err_eeprom:
2762         if (!igb_check_reset_block(hw))
2763                 igb_reset_phy(hw);
2764
2765         if (hw->flash_address)
2766                 iounmap(hw->flash_address);
2767 err_sw_init:
2768         kfree(adapter->shadow_vfta);
2769         igb_clear_interrupt_scheme(adapter);
2770 #ifdef CONFIG_PCI_IOV
2771         igb_disable_sriov(pdev);
2772 #endif
2773         pci_iounmap(pdev, adapter->io_addr);
2774 err_ioremap:
2775         free_netdev(netdev);
2776 err_alloc_etherdev:
2777         pci_disable_pcie_error_reporting(pdev);
2778         pci_release_mem_regions(pdev);
2779 err_pci_reg:
2780 err_dma:
2781         pci_disable_device(pdev);
2782         return err;
2783 }
2784
2785 #ifdef CONFIG_PCI_IOV
2786 static int igb_disable_sriov(struct pci_dev *pdev)
2787 {
2788         struct net_device *netdev = pci_get_drvdata(pdev);
2789         struct igb_adapter *adapter = netdev_priv(netdev);
2790         struct e1000_hw *hw = &adapter->hw;
2791
2792         /* reclaim resources allocated to VFs */
2793         if (adapter->vf_data) {
2794                 /* disable iov and allow time for transactions to clear */
2795                 if (pci_vfs_assigned(pdev)) {
2796                         dev_warn(&pdev->dev,
2797                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2798                         return -EPERM;
2799                 } else {
2800                         pci_disable_sriov(pdev);
2801                         msleep(500);
2802                 }
2803
2804                 kfree(adapter->vf_data);
2805                 adapter->vf_data = NULL;
2806                 adapter->vfs_allocated_count = 0;
2807                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2808                 wrfl();
2809                 msleep(100);
2810                 dev_info(&pdev->dev, "IOV Disabled\n");
2811
2812                 /* Re-enable DMA Coalescing flag since IOV is turned off */
2813                 adapter->flags |= IGB_FLAG_DMAC;
2814         }
2815
2816         return 0;
2817 }
2818
2819 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2820 {
2821         struct net_device *netdev = pci_get_drvdata(pdev);
2822         struct igb_adapter *adapter = netdev_priv(netdev);
2823         int old_vfs = pci_num_vf(pdev);
2824         int err = 0;
2825         int i;
2826
2827         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
2828                 err = -EPERM;
2829                 goto out;
2830         }
2831         if (!num_vfs)
2832                 goto out;
2833
2834         if (old_vfs) {
2835                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2836                          old_vfs, max_vfs);
2837                 adapter->vfs_allocated_count = old_vfs;
2838         } else
2839                 adapter->vfs_allocated_count = num_vfs;
2840
2841         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2842                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2843
2844         /* if allocation failed then we do not support SR-IOV */
2845         if (!adapter->vf_data) {
2846                 adapter->vfs_allocated_count = 0;
2847                 dev_err(&pdev->dev,
2848                         "Unable to allocate memory for VF Data Storage\n");
2849                 err = -ENOMEM;
2850                 goto out;
2851         }
2852
2853         /* only call pci_enable_sriov() if no VFs are allocated already */
2854         if (!old_vfs) {
2855                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2856                 if (err)
2857                         goto err_out;
2858         }
2859         dev_info(&pdev->dev, "%d VFs allocated\n",
2860                  adapter->vfs_allocated_count);
2861         for (i = 0; i < adapter->vfs_allocated_count; i++)
2862                 igb_vf_configure(adapter, i);
2863
2864         /* DMA Coalescing is not supported in IOV mode. */
2865         adapter->flags &= ~IGB_FLAG_DMAC;
2866         goto out;
2867
2868 err_out:
2869         kfree(adapter->vf_data);
2870         adapter->vf_data = NULL;
2871         adapter->vfs_allocated_count = 0;
2872 out:
2873         return err;
2874 }
2875
2876 #endif
2877 /**
2878  *  igb_remove_i2c - Cleanup  I2C interface
2879  *  @adapter: pointer to adapter structure
2880  **/
2881 static void igb_remove_i2c(struct igb_adapter *adapter)
2882 {
2883         /* free the adapter bus structure */
2884         i2c_del_adapter(&adapter->i2c_adap);
2885 }
2886
2887 /**
2888  *  igb_remove - Device Removal Routine
2889  *  @pdev: PCI device information struct
2890  *
2891  *  igb_remove is called by the PCI subsystem to alert the driver
2892  *  that it should release a PCI device.  The could be caused by a
2893  *  Hot-Plug event, or because the driver is going to be removed from
2894  *  memory.
2895  **/
2896 static void igb_remove(struct pci_dev *pdev)
2897 {
2898         struct net_device *netdev = pci_get_drvdata(pdev);
2899         struct igb_adapter *adapter = netdev_priv(netdev);
2900         struct e1000_hw *hw = &adapter->hw;
2901
2902         pm_runtime_get_noresume(&pdev->dev);
2903 #ifdef CONFIG_IGB_HWMON
2904         igb_sysfs_exit(adapter);
2905 #endif
2906         igb_remove_i2c(adapter);
2907         igb_ptp_stop(adapter);
2908         /* The watchdog timer may be rescheduled, so explicitly
2909          * disable watchdog from being rescheduled.
2910          */
2911         set_bit(__IGB_DOWN, &adapter->state);
2912         del_timer_sync(&adapter->watchdog_timer);
2913         del_timer_sync(&adapter->phy_info_timer);
2914
2915         cancel_work_sync(&adapter->reset_task);
2916         cancel_work_sync(&adapter->watchdog_task);
2917
2918 #ifdef CONFIG_IGB_DCA
2919         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2920                 dev_info(&pdev->dev, "DCA disabled\n");
2921                 dca_remove_requester(&pdev->dev);
2922                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2923                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2924         }
2925 #endif
2926
2927         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2928          * would have already happened in close and is redundant.
2929          */
2930         igb_release_hw_control(adapter);
2931
2932 #ifdef CONFIG_PCI_IOV
2933         igb_disable_sriov(pdev);
2934 #endif
2935
2936         unregister_netdev(netdev);
2937
2938         igb_clear_interrupt_scheme(adapter);
2939
2940         pci_iounmap(pdev, adapter->io_addr);
2941         if (hw->flash_address)
2942                 iounmap(hw->flash_address);
2943         pci_release_mem_regions(pdev);
2944
2945         kfree(adapter->shadow_vfta);
2946         free_netdev(netdev);
2947
2948         pci_disable_pcie_error_reporting(pdev);
2949
2950         pci_disable_device(pdev);
2951 }
2952
2953 /**
2954  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2955  *  @adapter: board private structure to initialize
2956  *
2957  *  This function initializes the vf specific data storage and then attempts to
2958  *  allocate the VFs.  The reason for ordering it this way is because it is much
2959  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
2960  *  the memory for the VFs.
2961  **/
2962 static void igb_probe_vfs(struct igb_adapter *adapter)
2963 {
2964 #ifdef CONFIG_PCI_IOV
2965         struct pci_dev *pdev = adapter->pdev;
2966         struct e1000_hw *hw = &adapter->hw;
2967
2968         /* Virtualization features not supported on i210 family. */
2969         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2970                 return;
2971
2972         /* Of the below we really only want the effect of getting
2973          * IGB_FLAG_HAS_MSIX set (if available), without which
2974          * igb_enable_sriov() has no effect.
2975          */
2976         igb_set_interrupt_capability(adapter, true);
2977         igb_reset_interrupt_capability(adapter);
2978
2979         pci_sriov_set_totalvfs(pdev, 7);
2980         igb_enable_sriov(pdev, max_vfs);
2981
2982 #endif /* CONFIG_PCI_IOV */
2983 }
2984
2985 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2986 {
2987         struct e1000_hw *hw = &adapter->hw;
2988         u32 max_rss_queues;
2989
2990         /* Determine the maximum number of RSS queues supported. */
2991         switch (hw->mac.type) {
2992         case e1000_i211:
2993                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2994                 break;
2995         case e1000_82575:
2996         case e1000_i210:
2997                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2998                 break;
2999         case e1000_i350:
3000                 /* I350 cannot do RSS and SR-IOV at the same time */
3001                 if (!!adapter->vfs_allocated_count) {
3002                         max_rss_queues = 1;
3003                         break;
3004                 }
3005                 /* fall through */
3006         case e1000_82576:
3007                 if (!!adapter->vfs_allocated_count) {
3008                         max_rss_queues = 2;
3009                         break;
3010                 }
3011                 /* fall through */
3012         case e1000_82580:
3013         case e1000_i354:
3014         default:
3015                 max_rss_queues = IGB_MAX_RX_QUEUES;
3016                 break;
3017         }
3018
3019         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
3020
3021         igb_set_flag_queue_pairs(adapter, max_rss_queues);
3022 }
3023
3024 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
3025                               const u32 max_rss_queues)
3026 {
3027         struct e1000_hw *hw = &adapter->hw;
3028
3029         /* Determine if we need to pair queues. */
3030         switch (hw->mac.type) {
3031         case e1000_82575:
3032         case e1000_i211:
3033                 /* Device supports enough interrupts without queue pairing. */
3034                 break;
3035         case e1000_82576:
3036         case e1000_82580:
3037         case e1000_i350:
3038         case e1000_i354:
3039         case e1000_i210:
3040         default:
3041                 /* If rss_queues > half of max_rss_queues, pair the queues in
3042                  * order to conserve interrupts due to limited supply.
3043                  */
3044                 if (adapter->rss_queues > (max_rss_queues / 2))
3045                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
3046                 else
3047                         adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
3048                 break;
3049         }
3050 }
3051
3052 /**
3053  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
3054  *  @adapter: board private structure to initialize
3055  *
3056  *  igb_sw_init initializes the Adapter private data structure.
3057  *  Fields are initialized based on PCI device information and
3058  *  OS network device settings (MTU size).
3059  **/
3060 static int igb_sw_init(struct igb_adapter *adapter)
3061 {
3062         struct e1000_hw *hw = &adapter->hw;
3063         struct net_device *netdev = adapter->netdev;
3064         struct pci_dev *pdev = adapter->pdev;
3065
3066         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3067
3068         /* set default ring sizes */
3069         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3070         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3071
3072         /* set default ITR values */
3073         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
3074         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
3075
3076         /* set default work limits */
3077         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3078
3079         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3080                                   VLAN_HLEN;
3081         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3082
3083         spin_lock_init(&adapter->nfc_lock);
3084         spin_lock_init(&adapter->stats64_lock);
3085 #ifdef CONFIG_PCI_IOV
3086         switch (hw->mac.type) {
3087         case e1000_82576:
3088         case e1000_i350:
3089                 if (max_vfs > 7) {
3090                         dev_warn(&pdev->dev,
3091                                  "Maximum of 7 VFs per PF, using max\n");
3092                         max_vfs = adapter->vfs_allocated_count = 7;
3093                 } else
3094                         adapter->vfs_allocated_count = max_vfs;
3095                 if (adapter->vfs_allocated_count)
3096                         dev_warn(&pdev->dev,
3097                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
3098                 break;
3099         default:
3100                 break;
3101         }
3102 #endif /* CONFIG_PCI_IOV */
3103
3104         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3105         adapter->flags |= IGB_FLAG_HAS_MSIX;
3106
3107         igb_probe_vfs(adapter);
3108
3109         igb_init_queue_configuration(adapter);
3110
3111         /* Setup and initialize a copy of the hw vlan table array */
3112         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
3113                                        GFP_ATOMIC);
3114         if (!adapter->shadow_vfta)
3115                 return -ENOMEM;
3116
3117         /* This call may decrease the number of queues */
3118         if (igb_init_interrupt_scheme(adapter, true)) {
3119                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
3120                 return -ENOMEM;
3121         }
3122
3123         /* Explicitly disable IRQ since the NIC can be in any state. */
3124         igb_irq_disable(adapter);
3125
3126         if (hw->mac.type >= e1000_i350)
3127                 adapter->flags &= ~IGB_FLAG_DMAC;
3128
3129         set_bit(__IGB_DOWN, &adapter->state);
3130         return 0;
3131 }
3132
3133 /**
3134  *  igb_open - Called when a network interface is made active
3135  *  @netdev: network interface device structure
3136  *
3137  *  Returns 0 on success, negative value on failure
3138  *
3139  *  The open entry point is called when a network interface is made
3140  *  active by the system (IFF_UP).  At this point all resources needed
3141  *  for transmit and receive operations are allocated, the interrupt
3142  *  handler is registered with the OS, the watchdog timer is started,
3143  *  and the stack is notified that the interface is ready.
3144  **/
3145 static int __igb_open(struct net_device *netdev, bool resuming)
3146 {
3147         struct igb_adapter *adapter = netdev_priv(netdev);
3148         struct e1000_hw *hw = &adapter->hw;
3149         struct pci_dev *pdev = adapter->pdev;
3150         int err;
3151         int i;
3152
3153         /* disallow open during test */
3154         if (test_bit(__IGB_TESTING, &adapter->state)) {
3155                 WARN_ON(resuming);
3156                 return -EBUSY;
3157         }
3158
3159         if (!resuming)
3160                 pm_runtime_get_sync(&pdev->dev);
3161
3162         netif_carrier_off(netdev);
3163
3164         /* allocate transmit descriptors */
3165         err = igb_setup_all_tx_resources(adapter);
3166         if (err)
3167                 goto err_setup_tx;
3168
3169         /* allocate receive descriptors */
3170         err = igb_setup_all_rx_resources(adapter);
3171         if (err)
3172                 goto err_setup_rx;
3173
3174         igb_power_up_link(adapter);
3175
3176         /* before we allocate an interrupt, we must be ready to handle it.
3177          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3178          * as soon as we call pci_request_irq, so we have to setup our
3179          * clean_rx handler before we do so.
3180          */
3181         igb_configure(adapter);
3182
3183         err = igb_request_irq(adapter);
3184         if (err)
3185                 goto err_req_irq;
3186
3187         /* Notify the stack of the actual queue counts. */
3188         err = netif_set_real_num_tx_queues(adapter->netdev,
3189                                            adapter->num_tx_queues);
3190         if (err)
3191                 goto err_set_queues;
3192
3193         err = netif_set_real_num_rx_queues(adapter->netdev,
3194                                            adapter->num_rx_queues);
3195         if (err)
3196                 goto err_set_queues;
3197
3198         /* From here on the code is the same as igb_up() */
3199         clear_bit(__IGB_DOWN, &adapter->state);
3200
3201         for (i = 0; i < adapter->num_q_vectors; i++)
3202                 napi_enable(&(adapter->q_vector[i]->napi));
3203
3204         /* Clear any pending interrupts. */
3205         rd32(E1000_ICR);
3206
3207         igb_irq_enable(adapter);
3208
3209         /* notify VFs that reset has been completed */
3210         if (adapter->vfs_allocated_count) {
3211                 u32 reg_data = rd32(E1000_CTRL_EXT);
3212
3213                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3214                 wr32(E1000_CTRL_EXT, reg_data);
3215         }
3216
3217         netif_tx_start_all_queues(netdev);
3218
3219         if (!resuming)
3220                 pm_runtime_put(&pdev->dev);
3221
3222         /* start the watchdog. */
3223         hw->mac.get_link_status = 1;
3224         schedule_work(&adapter->watchdog_task);
3225
3226         return 0;
3227
3228 err_set_queues:
3229         igb_free_irq(adapter);
3230 err_req_irq:
3231         igb_release_hw_control(adapter);
3232         igb_power_down_link(adapter);
3233         igb_free_all_rx_resources(adapter);
3234 err_setup_rx:
3235         igb_free_all_tx_resources(adapter);
3236 err_setup_tx:
3237         igb_reset(adapter);
3238         if (!resuming)
3239                 pm_runtime_put(&pdev->dev);
3240
3241         return err;
3242 }
3243
3244 int igb_open(struct net_device *netdev)
3245 {
3246         return __igb_open(netdev, false);
3247 }
3248
3249 /**
3250  *  igb_close - Disables a network interface
3251  *  @netdev: network interface device structure
3252  *
3253  *  Returns 0, this is not allowed to fail
3254  *
3255  *  The close entry point is called when an interface is de-activated
3256  *  by the OS.  The hardware is still under the driver's control, but
3257  *  needs to be disabled.  A global MAC reset is issued to stop the
3258  *  hardware, and all transmit and receive resources are freed.
3259  **/
3260 static int __igb_close(struct net_device *netdev, bool suspending)
3261 {
3262         struct igb_adapter *adapter = netdev_priv(netdev);
3263         struct pci_dev *pdev = adapter->pdev;
3264
3265         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3266
3267         if (!suspending)
3268                 pm_runtime_get_sync(&pdev->dev);
3269
3270         igb_down(adapter);
3271         igb_free_irq(adapter);
3272
3273         igb_nfc_filter_exit(adapter);
3274
3275         igb_free_all_tx_resources(adapter);
3276         igb_free_all_rx_resources(adapter);
3277
3278         if (!suspending)
3279                 pm_runtime_put_sync(&pdev->dev);
3280         return 0;
3281 }
3282
3283 int igb_close(struct net_device *netdev)
3284 {
3285         if (netif_device_present(netdev) || netdev->dismantle)
3286                 return __igb_close(netdev, false);
3287         return 0;
3288 }
3289
3290 /**
3291  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
3292  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
3293  *
3294  *  Return 0 on success, negative on failure
3295  **/
3296 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3297 {
3298         struct device *dev = tx_ring->dev;
3299         int size;
3300
3301         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3302
3303         tx_ring->tx_buffer_info = vzalloc(size);
3304         if (!tx_ring->tx_buffer_info)
3305                 goto err;
3306
3307         /* round up to nearest 4K */
3308         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3309         tx_ring->size = ALIGN(tx_ring->size, 4096);
3310
3311         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3312                                            &tx_ring->dma, GFP_KERNEL);
3313         if (!tx_ring->desc)
3314                 goto err;
3315
3316         tx_ring->next_to_use = 0;
3317         tx_ring->next_to_clean = 0;
3318
3319         return 0;
3320
3321 err:
3322         vfree(tx_ring->tx_buffer_info);
3323         tx_ring->tx_buffer_info = NULL;
3324         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
3325         return -ENOMEM;
3326 }
3327
3328 /**
3329  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
3330  *                               (Descriptors) for all queues
3331  *  @adapter: board private structure
3332  *
3333  *  Return 0 on success, negative on failure
3334  **/
3335 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3336 {
3337         struct pci_dev *pdev = adapter->pdev;
3338         int i, err = 0;
3339
3340         for (i = 0; i < adapter->num_tx_queues; i++) {
3341                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3342                 if (err) {
3343                         dev_err(&pdev->dev,
3344                                 "Allocation for Tx Queue %u failed\n", i);
3345                         for (i--; i >= 0; i--)
3346                                 igb_free_tx_resources(adapter->tx_ring[i]);
3347                         break;
3348                 }
3349         }
3350
3351         return err;
3352 }
3353
3354 /**
3355  *  igb_setup_tctl - configure the transmit control registers
3356  *  @adapter: Board private structure
3357  **/
3358 void igb_setup_tctl(struct igb_adapter *adapter)
3359 {
3360         struct e1000_hw *hw = &adapter->hw;
3361         u32 tctl;
3362
3363         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3364         wr32(E1000_TXDCTL(0), 0);
3365
3366         /* Program the Transmit Control Register */
3367         tctl = rd32(E1000_TCTL);
3368         tctl &= ~E1000_TCTL_CT;
3369         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3370                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3371
3372         igb_config_collision_dist(hw);
3373
3374         /* Enable transmits */
3375         tctl |= E1000_TCTL_EN;
3376
3377         wr32(E1000_TCTL, tctl);
3378 }
3379
3380 /**
3381  *  igb_configure_tx_ring - Configure transmit ring after Reset
3382  *  @adapter: board private structure
3383  *  @ring: tx ring to configure
3384  *
3385  *  Configure a transmit ring after a reset.
3386  **/
3387 void igb_configure_tx_ring(struct igb_adapter *adapter,
3388                            struct igb_ring *ring)
3389 {
3390         struct e1000_hw *hw = &adapter->hw;
3391         u32 txdctl = 0;
3392         u64 tdba = ring->dma;
3393         int reg_idx = ring->reg_idx;
3394
3395         /* disable the queue */
3396         wr32(E1000_TXDCTL(reg_idx), 0);
3397         wrfl();
3398         mdelay(10);
3399
3400         wr32(E1000_TDLEN(reg_idx),
3401              ring->count * sizeof(union e1000_adv_tx_desc));
3402         wr32(E1000_TDBAL(reg_idx),
3403              tdba & 0x00000000ffffffffULL);
3404         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3405
3406         ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
3407         wr32(E1000_TDH(reg_idx), 0);
3408         writel(0, ring->tail);
3409
3410         txdctl |= IGB_TX_PTHRESH;
3411         txdctl |= IGB_TX_HTHRESH << 8;
3412         txdctl |= IGB_TX_WTHRESH << 16;
3413
3414         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3415         wr32(E1000_TXDCTL(reg_idx), txdctl);
3416 }
3417
3418 /**
3419  *  igb_configure_tx - Configure transmit Unit after Reset
3420  *  @adapter: board private structure
3421  *
3422  *  Configure the Tx unit of the MAC after a reset.
3423  **/
3424 static void igb_configure_tx(struct igb_adapter *adapter)
3425 {
3426         int i;
3427
3428         for (i = 0; i < adapter->num_tx_queues; i++)
3429                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3430 }
3431
3432 /**
3433  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
3434  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
3435  *
3436  *  Returns 0 on success, negative on failure
3437  **/
3438 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3439 {
3440         struct device *dev = rx_ring->dev;
3441         int size;
3442
3443         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3444
3445         rx_ring->rx_buffer_info = vzalloc(size);
3446         if (!rx_ring->rx_buffer_info)
3447                 goto err;
3448
3449         /* Round up to nearest 4K */
3450         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3451         rx_ring->size = ALIGN(rx_ring->size, 4096);
3452
3453         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3454                                            &rx_ring->dma, GFP_KERNEL);
3455         if (!rx_ring->desc)
3456                 goto err;
3457
3458         rx_ring->next_to_alloc = 0;
3459         rx_ring->next_to_clean = 0;
3460         rx_ring->next_to_use = 0;
3461
3462         return 0;
3463
3464 err:
3465         vfree(rx_ring->rx_buffer_info);
3466         rx_ring->rx_buffer_info = NULL;
3467         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3468         return -ENOMEM;
3469 }
3470
3471 /**
3472  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
3473  *                               (Descriptors) for all queues
3474  *  @adapter: board private structure
3475  *
3476  *  Return 0 on success, negative on failure
3477  **/
3478 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3479 {
3480         struct pci_dev *pdev = adapter->pdev;
3481         int i, err = 0;
3482
3483         for (i = 0; i < adapter->num_rx_queues; i++) {
3484                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3485                 if (err) {
3486                         dev_err(&pdev->dev,
3487                                 "Allocation for Rx Queue %u failed\n", i);
3488                         for (i--; i >= 0; i--)
3489                                 igb_free_rx_resources(adapter->rx_ring[i]);
3490                         break;
3491                 }
3492         }
3493
3494         return err;
3495 }
3496
3497 /**
3498  *  igb_setup_mrqc - configure the multiple receive queue control registers
3499  *  @adapter: Board private structure
3500  **/
3501 static void igb_setup_mrqc(struct igb_adapter *adapter)
3502 {
3503         struct e1000_hw *hw = &adapter->hw;
3504         u32 mrqc, rxcsum;
3505         u32 j, num_rx_queues;
3506         u32 rss_key[10];
3507
3508         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3509         for (j = 0; j < 10; j++)
3510                 wr32(E1000_RSSRK(j), rss_key[j]);
3511
3512         num_rx_queues = adapter->rss_queues;
3513
3514         switch (hw->mac.type) {
3515         case e1000_82576:
3516                 /* 82576 supports 2 RSS queues for SR-IOV */
3517                 if (adapter->vfs_allocated_count)
3518                         num_rx_queues = 2;
3519                 break;
3520         default:
3521                 break;
3522         }
3523
3524         if (adapter->rss_indir_tbl_init != num_rx_queues) {
3525                 for (j = 0; j < IGB_RETA_SIZE; j++)
3526                         adapter->rss_indir_tbl[j] =
3527                         (j * num_rx_queues) / IGB_RETA_SIZE;
3528                 adapter->rss_indir_tbl_init = num_rx_queues;
3529         }
3530         igb_write_rss_indir_tbl(adapter);
3531
3532         /* Disable raw packet checksumming so that RSS hash is placed in
3533          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3534          * offloads as they are enabled by default
3535          */
3536         rxcsum = rd32(E1000_RXCSUM);
3537         rxcsum |= E1000_RXCSUM_PCSD;
3538
3539         if (adapter->hw.mac.type >= e1000_82576)
3540                 /* Enable Receive Checksum Offload for SCTP */
3541                 rxcsum |= E1000_RXCSUM_CRCOFL;
3542
3543         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3544         wr32(E1000_RXCSUM, rxcsum);
3545
3546         /* Generate RSS hash based on packet types, TCP/UDP
3547          * port numbers and/or IPv4/v6 src and dst addresses
3548          */
3549         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3550                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3551                E1000_MRQC_RSS_FIELD_IPV6 |
3552                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3553                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3554
3555         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3556                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3557         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3558                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3559
3560         /* If VMDq is enabled then we set the appropriate mode for that, else
3561          * we default to RSS so that an RSS hash is calculated per packet even
3562          * if we are only using one queue
3563          */
3564         if (adapter->vfs_allocated_count) {
3565                 if (hw->mac.type > e1000_82575) {
3566                         /* Set the default pool for the PF's first queue */
3567                         u32 vtctl = rd32(E1000_VT_CTL);
3568
3569                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3570                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3571                         vtctl |= adapter->vfs_allocated_count <<
3572                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3573                         wr32(E1000_VT_CTL, vtctl);
3574                 }
3575                 if (adapter->rss_queues > 1)
3576                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
3577                 else
3578                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3579         } else {
3580                 if (hw->mac.type != e1000_i211)
3581                         mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
3582         }
3583         igb_vmm_control(adapter);
3584
3585         wr32(E1000_MRQC, mrqc);
3586 }
3587
3588 /**
3589  *  igb_setup_rctl - configure the receive control registers
3590  *  @adapter: Board private structure
3591  **/
3592 void igb_setup_rctl(struct igb_adapter *adapter)
3593 {
3594         struct e1000_hw *hw = &adapter->hw;
3595         u32 rctl;
3596
3597         rctl = rd32(E1000_RCTL);
3598
3599         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3600         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3601
3602         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3603                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3604
3605         /* enable stripping of CRC. It's unlikely this will break BMC
3606          * redirection as it did with e1000. Newer features require
3607          * that the HW strips the CRC.
3608          */
3609         rctl |= E1000_RCTL_SECRC;
3610
3611         /* disable store bad packets and clear size bits. */
3612         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3613
3614         /* enable LPE to allow for reception of jumbo frames */
3615         rctl |= E1000_RCTL_LPE;
3616
3617         /* disable queue 0 to prevent tail write w/o re-config */
3618         wr32(E1000_RXDCTL(0), 0);
3619
3620         /* Attention!!!  For SR-IOV PF driver operations you must enable
3621          * queue drop for all VF and PF queues to prevent head of line blocking
3622          * if an un-trusted VF does not provide descriptors to hardware.
3623          */
3624         if (adapter->vfs_allocated_count) {
3625                 /* set all queue drop enable bits */
3626                 wr32(E1000_QDE, ALL_QUEUES);
3627         }
3628
3629         /* This is useful for sniffing bad packets. */
3630         if (adapter->netdev->features & NETIF_F_RXALL) {
3631                 /* UPE and MPE will be handled by normal PROMISC logic
3632                  * in e1000e_set_rx_mode
3633                  */
3634                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3635                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
3636                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3637
3638                 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
3639                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3640                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3641                  * and that breaks VLANs.
3642                  */
3643         }
3644
3645         wr32(E1000_RCTL, rctl);
3646 }
3647
3648 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3649                                    int vfn)
3650 {
3651         struct e1000_hw *hw = &adapter->hw;
3652         u32 vmolr;
3653
3654         if (size > MAX_JUMBO_FRAME_SIZE)
3655                 size = MAX_JUMBO_FRAME_SIZE;
3656
3657         vmolr = rd32(E1000_VMOLR(vfn));
3658         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3659         vmolr |= size | E1000_VMOLR_LPE;
3660         wr32(E1000_VMOLR(vfn), vmolr);
3661
3662         return 0;
3663 }
3664
3665 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3666                                          int vfn, bool enable)
3667 {
3668         struct e1000_hw *hw = &adapter->hw;
3669         u32 val, reg;
3670
3671         if (hw->mac.type < e1000_82576)
3672                 return;
3673
3674         if (hw->mac.type == e1000_i350)
3675                 reg = E1000_DVMOLR(vfn);
3676         else
3677                 reg = E1000_VMOLR(vfn);
3678
3679         val = rd32(reg);
3680         if (enable)
3681                 val |= E1000_VMOLR_STRVLAN;
3682         else
3683                 val &= ~(E1000_VMOLR_STRVLAN);
3684         wr32(reg, val);
3685 }
3686
3687 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3688                                  int vfn, bool aupe)
3689 {
3690         struct e1000_hw *hw = &adapter->hw;
3691         u32 vmolr;
3692
3693         /* This register exists only on 82576 and newer so if we are older then
3694          * we should exit and do nothing
3695          */
3696         if (hw->mac.type < e1000_82576)
3697                 return;
3698
3699         vmolr = rd32(E1000_VMOLR(vfn));
3700         if (aupe)
3701                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3702         else
3703                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3704
3705         /* clear all bits that might not be set */
3706         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3707
3708         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3709                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3710         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3711          * multicast packets
3712          */
3713         if (vfn <= adapter->vfs_allocated_count)
3714                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3715
3716         wr32(E1000_VMOLR(vfn), vmolr);
3717 }
3718
3719 /**
3720  *  igb_configure_rx_ring - Configure a receive ring after Reset
3721  *  @adapter: board private structure
3722  *  @ring: receive ring to be configured
3723  *
3724  *  Configure the Rx unit of the MAC after a reset.
3725  **/
3726 void igb_configure_rx_ring(struct igb_adapter *adapter,
3727                            struct igb_ring *ring)
3728 {
3729         struct e1000_hw *hw = &adapter->hw;
3730         u64 rdba = ring->dma;
3731         int reg_idx = ring->reg_idx;
3732         u32 srrctl = 0, rxdctl = 0;
3733
3734         /* disable the queue */
3735         wr32(E1000_RXDCTL(reg_idx), 0);
3736
3737         /* Set DMA base address registers */
3738         wr32(E1000_RDBAL(reg_idx),
3739              rdba & 0x00000000ffffffffULL);
3740         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3741         wr32(E1000_RDLEN(reg_idx),
3742              ring->count * sizeof(union e1000_adv_rx_desc));
3743
3744         /* initialize head and tail */
3745         ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
3746         wr32(E1000_RDH(reg_idx), 0);
3747         writel(0, ring->tail);
3748
3749         /* set descriptor configuration */
3750         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3751         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3752         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3753         if (hw->mac.type >= e1000_82580)
3754                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3755         /* Only set Drop Enable if we are supporting multiple queues */
3756         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3757                 srrctl |= E1000_SRRCTL_DROP_EN;
3758
3759         wr32(E1000_SRRCTL(reg_idx), srrctl);
3760
3761         /* set filtering for VMDQ pools */
3762         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3763
3764         rxdctl |= IGB_RX_PTHRESH;
3765         rxdctl |= IGB_RX_HTHRESH << 8;
3766         rxdctl |= IGB_RX_WTHRESH << 16;
3767
3768         /* enable receive descriptor fetching */
3769         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3770         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3771 }
3772
3773 /**
3774  *  igb_configure_rx - Configure receive Unit after Reset
3775  *  @adapter: board private structure
3776  *
3777  *  Configure the Rx unit of the MAC after a reset.
3778  **/
3779 static void igb_configure_rx(struct igb_adapter *adapter)
3780 {
3781         int i;
3782
3783         /* set the correct pool for the PF default MAC address in entry 0 */
3784         igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3785                          adapter->vfs_allocated_count);
3786
3787         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3788          * the Base and Length of the Rx Descriptor Ring
3789          */
3790         for (i = 0; i < adapter->num_rx_queues; i++)
3791                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3792 }
3793
3794 /**
3795  *  igb_free_tx_resources - Free Tx Resources per Queue
3796  *  @tx_ring: Tx descriptor ring for a specific queue
3797  *
3798  *  Free all transmit software resources
3799  **/
3800 void igb_free_tx_resources(struct igb_ring *tx_ring)
3801 {
3802         igb_clean_tx_ring(tx_ring);
3803
3804         vfree(tx_ring->tx_buffer_info);
3805         tx_ring->tx_buffer_info = NULL;
3806
3807         /* if not set, then don't free */
3808         if (!tx_ring->desc)
3809                 return;
3810
3811         dma_free_coherent(tx_ring->dev, tx_ring->size,
3812                           tx_ring->desc, tx_ring->dma);
3813
3814         tx_ring->desc = NULL;
3815 }
3816
3817 /**
3818  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
3819  *  @adapter: board private structure
3820  *
3821  *  Free all transmit software resources
3822  **/
3823 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3824 {
3825         int i;
3826
3827         for (i = 0; i < adapter->num_tx_queues; i++)
3828                 if (adapter->tx_ring[i])
3829                         igb_free_tx_resources(adapter->tx_ring[i]);
3830 }
3831
3832 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3833                                     struct igb_tx_buffer *tx_buffer)
3834 {
3835         if (tx_buffer->skb) {
3836                 dev_kfree_skb_any(tx_buffer->skb);
3837                 if (dma_unmap_len(tx_buffer, len))
3838                         dma_unmap_single(ring->dev,
3839                                          dma_unmap_addr(tx_buffer, dma),
3840                                          dma_unmap_len(tx_buffer, len),
3841                                          DMA_TO_DEVICE);
3842         } else if (dma_unmap_len(tx_buffer, len)) {
3843                 dma_unmap_page(ring->dev,
3844                                dma_unmap_addr(tx_buffer, dma),
3845                                dma_unmap_len(tx_buffer, len),
3846                                DMA_TO_DEVICE);
3847         }
3848         tx_buffer->next_to_watch = NULL;
3849         tx_buffer->skb = NULL;
3850         dma_unmap_len_set(tx_buffer, len, 0);
3851         /* buffer_info must be completely set up in the transmit path */
3852 }
3853
3854 /**
3855  *  igb_clean_tx_ring - Free Tx Buffers
3856  *  @tx_ring: ring to be cleaned
3857  **/
3858 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3859 {
3860         struct igb_tx_buffer *buffer_info;
3861         unsigned long size;
3862         u16 i;
3863
3864         if (!tx_ring->tx_buffer_info)
3865                 return;
3866         /* Free all the Tx ring sk_buffs */
3867
3868         for (i = 0; i < tx_ring->count; i++) {
3869                 buffer_info = &tx_ring->tx_buffer_info[i];
3870                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3871         }
3872
3873         netdev_tx_reset_queue(txring_txq(tx_ring));
3874
3875         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3876         memset(tx_ring->tx_buffer_info, 0, size);
3877
3878         /* Zero out the descriptor ring */
3879         memset(tx_ring->desc, 0, tx_ring->size);
3880
3881         tx_ring->next_to_use = 0;
3882         tx_ring->next_to_clean = 0;
3883 }
3884
3885 /**
3886  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
3887  *  @adapter: board private structure
3888  **/
3889 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3890 {
3891         int i;
3892
3893         for (i = 0; i < adapter->num_tx_queues; i++)
3894                 if (adapter->tx_ring[i])
3895                         igb_clean_tx_ring(adapter->tx_ring[i]);
3896 }
3897
3898 /**
3899  *  igb_free_rx_resources - Free Rx Resources
3900  *  @rx_ring: ring to clean the resources from
3901  *
3902  *  Free all receive software resources
3903  **/
3904 void igb_free_rx_resources(struct igb_ring *rx_ring)
3905 {
3906         igb_clean_rx_ring(rx_ring);
3907
3908         vfree(rx_ring->rx_buffer_info);
3909         rx_ring->rx_buffer_info = NULL;
3910
3911         /* if not set, then don't free */
3912         if (!rx_ring->desc)
3913                 return;
3914
3915         dma_free_coherent(rx_ring->dev, rx_ring->size,
3916                           rx_ring->desc, rx_ring->dma);
3917
3918         rx_ring->desc = NULL;
3919 }
3920
3921 /**
3922  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
3923  *  @adapter: board private structure
3924  *
3925  *  Free all receive software resources
3926  **/
3927 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3928 {
3929         int i;
3930
3931         for (i = 0; i < adapter->num_rx_queues; i++)
3932                 if (adapter->rx_ring[i])
3933                         igb_free_rx_resources(adapter->rx_ring[i]);
3934 }
3935
3936 /**
3937  *  igb_clean_rx_ring - Free Rx Buffers per Queue
3938  *  @rx_ring: ring to free buffers from
3939  **/
3940 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3941 {
3942         unsigned long size;
3943         u16 i;
3944
3945         if (rx_ring->skb)
3946                 dev_kfree_skb(rx_ring->skb);
3947         rx_ring->skb = NULL;
3948
3949         if (!rx_ring->rx_buffer_info)
3950                 return;
3951
3952         /* Free all the Rx ring sk_buffs */
3953         for (i = 0; i < rx_ring->count; i++) {
3954                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3955
3956                 if (!buffer_info->page)
3957                         continue;
3958
3959                 dma_unmap_page(rx_ring->dev,
3960                                buffer_info->dma,
3961                                PAGE_SIZE,
3962                                DMA_FROM_DEVICE);
3963                 __free_page(buffer_info->page);
3964
3965                 buffer_info->page = NULL;
3966         }
3967
3968         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3969         memset(rx_ring->rx_buffer_info, 0, size);
3970
3971         /* Zero out the descriptor ring */
3972         memset(rx_ring->desc, 0, rx_ring->size);
3973
3974         rx_ring->next_to_alloc = 0;
3975         rx_ring->next_to_clean = 0;
3976         rx_ring->next_to_use = 0;
3977 }
3978
3979 /**
3980  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
3981  *  @adapter: board private structure
3982  **/
3983 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3984 {
3985         int i;
3986
3987         for (i = 0; i < adapter->num_rx_queues; i++)
3988                 if (adapter->rx_ring[i])
3989                         igb_clean_rx_ring(adapter->rx_ring[i]);
3990 }
3991
3992 /**
3993  *  igb_set_mac - Change the Ethernet Address of the NIC
3994  *  @netdev: network interface device structure
3995  *  @p: pointer to an address structure
3996  *
3997  *  Returns 0 on success, negative on failure
3998  **/
3999 static int igb_set_mac(struct net_device *netdev, void *p)
4000 {
4001         struct igb_adapter *adapter = netdev_priv(netdev);
4002         struct e1000_hw *hw = &adapter->hw;
4003         struct sockaddr *addr = p;
4004
4005         if (!is_valid_ether_addr(addr->sa_data))
4006                 return -EADDRNOTAVAIL;
4007
4008         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4009         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4010
4011         /* set the correct pool for the new PF MAC address in entry 0 */
4012         igb_rar_set_qsel(adapter, hw->mac.addr, 0,
4013                          adapter->vfs_allocated_count);
4014
4015         return 0;
4016 }
4017
4018 /**
4019  *  igb_write_mc_addr_list - write multicast addresses to MTA
4020  *  @netdev: network interface device structure
4021  *
4022  *  Writes multicast address list to the MTA hash table.
4023  *  Returns: -ENOMEM on failure
4024  *           0 on no addresses written
4025  *           X on writing X addresses to MTA
4026  **/
4027 static int igb_write_mc_addr_list(struct net_device *netdev)
4028 {
4029         struct igb_adapter *adapter = netdev_priv(netdev);
4030         struct e1000_hw *hw = &adapter->hw;
4031         struct netdev_hw_addr *ha;
4032         u8  *mta_list;
4033         int i;
4034
4035         if (netdev_mc_empty(netdev)) {
4036                 /* nothing to program, so clear mc list */
4037                 igb_update_mc_addr_list(hw, NULL, 0);
4038                 igb_restore_vf_multicasts(adapter);
4039                 return 0;
4040         }
4041
4042         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
4043         if (!mta_list)
4044                 return -ENOMEM;
4045
4046         /* The shared function expects a packed array of only addresses. */
4047         i = 0;
4048         netdev_for_each_mc_addr(ha, netdev)
4049                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4050
4051         igb_update_mc_addr_list(hw, mta_list, i);
4052         kfree(mta_list);
4053
4054         return netdev_mc_count(netdev);
4055 }
4056
4057 /**
4058  *  igb_write_uc_addr_list - write unicast addresses to RAR table
4059  *  @netdev: network interface device structure
4060  *
4061  *  Writes unicast address list to the RAR table.
4062  *  Returns: -ENOMEM on failure/insufficient address space
4063  *           0 on no addresses written
4064  *           X on writing X addresses to the RAR table
4065  **/
4066 static int igb_write_uc_addr_list(struct net_device *netdev)
4067 {
4068         struct igb_adapter *adapter = netdev_priv(netdev);
4069         struct e1000_hw *hw = &adapter->hw;
4070         unsigned int vfn = adapter->vfs_allocated_count;
4071         unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
4072         int count = 0;
4073
4074         /* return ENOMEM indicating insufficient memory for addresses */
4075         if (netdev_uc_count(netdev) > rar_entries)
4076                 return -ENOMEM;
4077
4078         if (!netdev_uc_empty(netdev) && rar_entries) {
4079                 struct netdev_hw_addr *ha;
4080
4081                 netdev_for_each_uc_addr(ha, netdev) {
4082                         if (!rar_entries)
4083                                 break;
4084                         igb_rar_set_qsel(adapter, ha->addr,
4085                                          rar_entries--,
4086                                          vfn);
4087                         count++;
4088                 }
4089         }
4090         /* write the addresses in reverse order to avoid write combining */
4091         for (; rar_entries > 0 ; rar_entries--) {
4092                 wr32(E1000_RAH(rar_entries), 0);
4093                 wr32(E1000_RAL(rar_entries), 0);
4094         }
4095         wrfl();
4096
4097         return count;
4098 }
4099
4100 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
4101 {
4102         struct e1000_hw *hw = &adapter->hw;
4103         u32 i, pf_id;
4104
4105         switch (hw->mac.type) {
4106         case e1000_i210:
4107         case e1000_i211:
4108         case e1000_i350:
4109                 /* VLAN filtering needed for VLAN prio filter */
4110                 if (adapter->netdev->features & NETIF_F_NTUPLE)
4111                         break;
4112                 /* fall through */
4113         case e1000_82576:
4114         case e1000_82580:
4115         case e1000_i354:
4116                 /* VLAN filtering needed for pool filtering */
4117                 if (adapter->vfs_allocated_count)
4118                         break;
4119                 /* fall through */
4120         default:
4121                 return 1;
4122         }
4123
4124         /* We are already in VLAN promisc, nothing to do */
4125         if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
4126                 return 0;
4127
4128         if (!adapter->vfs_allocated_count)
4129                 goto set_vfta;
4130
4131         /* Add PF to all active pools */
4132         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4133
4134         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4135                 u32 vlvf = rd32(E1000_VLVF(i));
4136
4137                 vlvf |= BIT(pf_id);
4138                 wr32(E1000_VLVF(i), vlvf);
4139         }
4140
4141 set_vfta:
4142         /* Set all bits in the VLAN filter table array */
4143         for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
4144                 hw->mac.ops.write_vfta(hw, i, ~0U);
4145
4146         /* Set flag so we don't redo unnecessary work */
4147         adapter->flags |= IGB_FLAG_VLAN_PROMISC;
4148
4149         return 0;
4150 }
4151
4152 #define VFTA_BLOCK_SIZE 8
4153 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
4154 {
4155         struct e1000_hw *hw = &adapter->hw;
4156         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4157         u32 vid_start = vfta_offset * 32;
4158         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4159         u32 i, vid, word, bits, pf_id;
4160
4161         /* guarantee that we don't scrub out management VLAN */
4162         vid = adapter->mng_vlan_id;
4163         if (vid >= vid_start && vid < vid_end)
4164                 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4165
4166         if (!adapter->vfs_allocated_count)
4167                 goto set_vfta;
4168
4169         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4170
4171         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4172                 u32 vlvf = rd32(E1000_VLVF(i));
4173
4174                 /* pull VLAN ID from VLVF */
4175                 vid = vlvf & VLAN_VID_MASK;
4176
4177                 /* only concern ourselves with a certain range */
4178                 if (vid < vid_start || vid >= vid_end)
4179                         continue;
4180
4181                 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
4182                         /* record VLAN ID in VFTA */
4183                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4184
4185                         /* if PF is part of this then continue */
4186                         if (test_bit(vid, adapter->active_vlans))
4187                                 continue;
4188                 }
4189
4190                 /* remove PF from the pool */
4191                 bits = ~BIT(pf_id);
4192                 bits &= rd32(E1000_VLVF(i));
4193                 wr32(E1000_VLVF(i), bits);
4194         }
4195
4196 set_vfta:
4197         /* extract values from active_vlans and write back to VFTA */
4198         for (i = VFTA_BLOCK_SIZE; i--;) {
4199                 vid = (vfta_offset + i) * 32;
4200                 word = vid / BITS_PER_LONG;
4201                 bits = vid % BITS_PER_LONG;
4202
4203                 vfta[i] |= adapter->active_vlans[word] >> bits;
4204
4205                 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
4206         }
4207 }
4208
4209 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
4210 {
4211         u32 i;
4212
4213         /* We are not in VLAN promisc, nothing to do */
4214         if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
4215                 return;
4216
4217         /* Set flag so we don't redo unnecessary work */
4218         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
4219
4220         for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
4221                 igb_scrub_vfta(adapter, i);
4222 }
4223
4224 /**
4225  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4226  *  @netdev: network interface device structure
4227  *
4228  *  The set_rx_mode entry point is called whenever the unicast or multicast
4229  *  address lists or the network interface flags are updated.  This routine is
4230  *  responsible for configuring the hardware for proper unicast, multicast,
4231  *  promiscuous mode, and all-multi behavior.
4232  **/
4233 static void igb_set_rx_mode(struct net_device *netdev)
4234 {
4235         struct igb_adapter *adapter = netdev_priv(netdev);
4236         struct e1000_hw *hw = &adapter->hw;
4237         unsigned int vfn = adapter->vfs_allocated_count;
4238         u32 rctl = 0, vmolr = 0;
4239         int count;
4240
4241         /* Check for Promiscuous and All Multicast modes */
4242         if (netdev->flags & IFF_PROMISC) {
4243                 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
4244                 vmolr |= E1000_VMOLR_MPME;
4245
4246                 /* enable use of UTA filter to force packets to default pool */
4247                 if (hw->mac.type == e1000_82576)
4248                         vmolr |= E1000_VMOLR_ROPE;
4249         } else {
4250                 if (netdev->flags & IFF_ALLMULTI) {
4251                         rctl |= E1000_RCTL_MPE;
4252                         vmolr |= E1000_VMOLR_MPME;
4253                 } else {
4254                         /* Write addresses to the MTA, if the attempt fails
4255                          * then we should just turn on promiscuous mode so
4256                          * that we can at least receive multicast traffic
4257                          */
4258                         count = igb_write_mc_addr_list(netdev);
4259                         if (count < 0) {
4260                                 rctl |= E1000_RCTL_MPE;
4261                                 vmolr |= E1000_VMOLR_MPME;
4262                         } else if (count) {
4263                                 vmolr |= E1000_VMOLR_ROMPE;
4264                         }
4265                 }
4266         }
4267
4268         /* Write addresses to available RAR registers, if there is not
4269          * sufficient space to store all the addresses then enable
4270          * unicast promiscuous mode
4271          */
4272         count = igb_write_uc_addr_list(netdev);
4273         if (count < 0) {
4274                 rctl |= E1000_RCTL_UPE;
4275                 vmolr |= E1000_VMOLR_ROPE;
4276         }
4277
4278         /* enable VLAN filtering by default */
4279         rctl |= E1000_RCTL_VFE;
4280
4281         /* disable VLAN filtering for modes that require it */
4282         if ((netdev->flags & IFF_PROMISC) ||
4283             (netdev->features & NETIF_F_RXALL)) {
4284                 /* if we fail to set all rules then just clear VFE */
4285                 if (igb_vlan_promisc_enable(adapter))
4286                         rctl &= ~E1000_RCTL_VFE;
4287         } else {
4288                 igb_vlan_promisc_disable(adapter);
4289         }
4290
4291         /* update state of unicast, multicast, and VLAN filtering modes */
4292         rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
4293                                      E1000_RCTL_VFE);
4294         wr32(E1000_RCTL, rctl);
4295
4296         /* In order to support SR-IOV and eventually VMDq it is necessary to set
4297          * the VMOLR to enable the appropriate modes.  Without this workaround
4298          * we will have issues with VLAN tag stripping not being done for frames
4299          * that are only arriving because we are the default pool
4300          */
4301         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
4302                 return;
4303
4304         /* set UTA to appropriate mode */
4305         igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
4306
4307         vmolr |= rd32(E1000_VMOLR(vfn)) &
4308                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4309
4310         /* enable Rx jumbo frames, no need for restriction */
4311         vmolr &= ~E1000_VMOLR_RLPML_MASK;
4312         vmolr |= MAX_JUMBO_FRAME_SIZE | E1000_VMOLR_LPE;
4313
4314         wr32(E1000_VMOLR(vfn), vmolr);
4315         wr32(E1000_RLPML, MAX_JUMBO_FRAME_SIZE);
4316
4317         igb_restore_vf_multicasts(adapter);
4318 }
4319
4320 static void igb_check_wvbr(struct igb_adapter *adapter)
4321 {
4322         struct e1000_hw *hw = &adapter->hw;
4323         u32 wvbr = 0;
4324
4325         switch (hw->mac.type) {
4326         case e1000_82576:
4327         case e1000_i350:
4328                 wvbr = rd32(E1000_WVBR);
4329                 if (!wvbr)
4330                         return;
4331                 break;
4332         default:
4333                 break;
4334         }
4335
4336         adapter->wvbr |= wvbr;
4337 }
4338
4339 #define IGB_STAGGERED_QUEUE_OFFSET 8
4340
4341 static void igb_spoof_check(struct igb_adapter *adapter)
4342 {
4343         int j;
4344
4345         if (!adapter->wvbr)
4346                 return;
4347
4348         for (j = 0; j < adapter->vfs_allocated_count; j++) {
4349                 if (adapter->wvbr & BIT(j) ||
4350                     adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
4351                         dev_warn(&adapter->pdev->dev,
4352                                 "Spoof event(s) detected on VF %d\n", j);
4353                         adapter->wvbr &=
4354                                 ~(BIT(j) |
4355                                   BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
4356                 }
4357         }
4358 }
4359
4360 /* Need to wait a few seconds after link up to get diagnostic information from
4361  * the phy
4362  */
4363 static void igb_update_phy_info(unsigned long data)
4364 {
4365         struct igb_adapter *adapter = (struct igb_adapter *) data;
4366         igb_get_phy_info(&adapter->hw);
4367 }
4368
4369 /**
4370  *  igb_has_link - check shared code for link and determine up/down
4371  *  @adapter: pointer to driver private info
4372  **/
4373 bool igb_has_link(struct igb_adapter *adapter)
4374 {
4375         struct e1000_hw *hw = &adapter->hw;
4376         bool link_active = false;
4377
4378         /* get_link_status is set on LSC (link status) interrupt or
4379          * rx sequence error interrupt.  get_link_status will stay
4380          * false until the e1000_check_for_link establishes link
4381          * for copper adapters ONLY
4382          */
4383         switch (hw->phy.media_type) {
4384         case e1000_media_type_copper:
4385                 if (!hw->mac.get_link_status)
4386                         return true;
4387         case e1000_media_type_internal_serdes:
4388                 hw->mac.ops.check_for_link(hw);
4389                 link_active = !hw->mac.get_link_status;
4390                 break;
4391         default:
4392         case e1000_media_type_unknown:
4393                 break;
4394         }
4395
4396         if (((hw->mac.type == e1000_i210) ||
4397              (hw->mac.type == e1000_i211)) &&
4398              (hw->phy.id == I210_I_PHY_ID)) {
4399                 if (!netif_carrier_ok(adapter->netdev)) {
4400                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4401                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4402                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4403                         adapter->link_check_timeout = jiffies;
4404                 }
4405         }
4406
4407         return link_active;
4408 }
4409
4410 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
4411 {
4412         bool ret = false;
4413         u32 ctrl_ext, thstat;
4414
4415         /* check for thermal sensor event on i350 copper only */
4416         if (hw->mac.type == e1000_i350) {
4417                 thstat = rd32(E1000_THSTAT);
4418                 ctrl_ext = rd32(E1000_CTRL_EXT);
4419
4420                 if ((hw->phy.media_type == e1000_media_type_copper) &&
4421                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
4422                         ret = !!(thstat & event);
4423         }
4424
4425         return ret;
4426 }
4427
4428 /**
4429  *  igb_check_lvmmc - check for malformed packets received
4430  *  and indicated in LVMMC register
4431  *  @adapter: pointer to adapter
4432  **/
4433 static void igb_check_lvmmc(struct igb_adapter *adapter)
4434 {
4435         struct e1000_hw *hw = &adapter->hw;
4436         u32 lvmmc;
4437
4438         lvmmc = rd32(E1000_LVMMC);
4439         if (lvmmc) {
4440                 if (unlikely(net_ratelimit())) {
4441                         netdev_warn(adapter->netdev,
4442                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
4443                                     lvmmc);
4444                 }
4445         }
4446 }
4447
4448 /**
4449  *  igb_watchdog - Timer Call-back
4450  *  @data: pointer to adapter cast into an unsigned long
4451  **/
4452 static void igb_watchdog(unsigned long data)
4453 {
4454         struct igb_adapter *adapter = (struct igb_adapter *)data;
4455         /* Do the rest outside of interrupt context */
4456         schedule_work(&adapter->watchdog_task);
4457 }
4458
4459 static void igb_watchdog_task(struct work_struct *work)
4460 {
4461         struct igb_adapter *adapter = container_of(work,
4462                                                    struct igb_adapter,
4463                                                    watchdog_task);
4464         struct e1000_hw *hw = &adapter->hw;
4465         struct e1000_phy_info *phy = &hw->phy;
4466         struct net_device *netdev = adapter->netdev;
4467         u32 link;
4468         int i;
4469         u32 connsw;
4470         u16 phy_data, retry_count = 20;
4471
4472         link = igb_has_link(adapter);
4473
4474         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4475                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4476                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4477                 else
4478                         link = false;
4479         }
4480
4481         /* Force link down if we have fiber to swap to */
4482         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4483                 if (hw->phy.media_type == e1000_media_type_copper) {
4484                         connsw = rd32(E1000_CONNSW);
4485                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4486                                 link = 0;
4487                 }
4488         }
4489         if (link) {
4490                 /* Perform a reset if the media type changed. */
4491                 if (hw->dev_spec._82575.media_changed) {
4492                         hw->dev_spec._82575.media_changed = false;
4493                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4494                         igb_reset(adapter);
4495                 }
4496                 /* Cancel scheduled suspend requests. */
4497                 pm_runtime_resume(netdev->dev.parent);
4498
4499                 if (!netif_carrier_ok(netdev)) {
4500                         u32 ctrl;
4501
4502                         hw->mac.ops.get_speed_and_duplex(hw,
4503                                                          &adapter->link_speed,
4504                                                          &adapter->link_duplex);
4505
4506                         ctrl = rd32(E1000_CTRL);
4507                         /* Links status message must follow this format */
4508                         netdev_info(netdev,
4509                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4510                                netdev->name,
4511                                adapter->link_speed,
4512                                adapter->link_duplex == FULL_DUPLEX ?
4513                                "Full" : "Half",
4514                                (ctrl & E1000_CTRL_TFCE) &&
4515                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
4516                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
4517                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
4518
4519                         /* disable EEE if enabled */
4520                         if ((adapter->flags & IGB_FLAG_EEE) &&
4521                                 (adapter->link_duplex == HALF_DUPLEX)) {
4522                                 dev_info(&adapter->pdev->dev,
4523                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4524                                 adapter->hw.dev_spec._82575.eee_disable = true;
4525                                 adapter->flags &= ~IGB_FLAG_EEE;
4526                         }
4527
4528                         /* check if SmartSpeed worked */
4529                         igb_check_downshift(hw);
4530                         if (phy->speed_downgraded)
4531                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
4532
4533                         /* check for thermal sensor event */
4534                         if (igb_thermal_sensor_event(hw,
4535                             E1000_THSTAT_LINK_THROTTLE))
4536                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
4537
4538                         /* adjust timeout factor according to speed/duplex */
4539                         adapter->tx_timeout_factor = 1;
4540                         switch (adapter->link_speed) {
4541                         case SPEED_10:
4542                                 adapter->tx_timeout_factor = 14;
4543                                 break;
4544                         case SPEED_100:
4545                                 /* maybe add some timeout factor ? */
4546                                 break;
4547                         }
4548
4549                         if (adapter->link_speed != SPEED_1000)
4550                                 goto no_wait;
4551
4552                         /* wait for Remote receiver status OK */
4553 retry_read_status:
4554                         if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
4555                                               &phy_data)) {
4556                                 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
4557                                     retry_count) {
4558                                         msleep(100);
4559                                         retry_count--;
4560                                         goto retry_read_status;
4561                                 } else if (!retry_count) {
4562                                         dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
4563                                 }
4564                         } else {
4565                                 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
4566                         }
4567 no_wait:
4568                         netif_carrier_on(netdev);
4569
4570                         igb_ping_all_vfs(adapter);
4571                         igb_check_vf_rate_limit(adapter);
4572
4573                         /* link state has changed, schedule phy info update */
4574                         if (!test_bit(__IGB_DOWN, &adapter->state))
4575                                 mod_timer(&adapter->phy_info_timer,
4576                                           round_jiffies(jiffies + 2 * HZ));
4577                 }
4578         } else {
4579                 if (netif_carrier_ok(netdev)) {
4580                         adapter->link_speed = 0;
4581                         adapter->link_duplex = 0;
4582
4583                         /* check for thermal sensor event */
4584                         if (igb_thermal_sensor_event(hw,
4585                             E1000_THSTAT_PWR_DOWN)) {
4586                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
4587                         }
4588
4589                         /* Links status message must follow this format */
4590                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
4591                                netdev->name);
4592                         netif_carrier_off(netdev);
4593
4594                         igb_ping_all_vfs(adapter);
4595
4596                         /* link state has changed, schedule phy info update */
4597                         if (!test_bit(__IGB_DOWN, &adapter->state))
4598                                 mod_timer(&adapter->phy_info_timer,
4599                                           round_jiffies(jiffies + 2 * HZ));
4600
4601                         /* link is down, time to check for alternate media */
4602                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4603                                 igb_check_swap_media(adapter);
4604                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4605                                         schedule_work(&adapter->reset_task);
4606                                         /* return immediately */
4607                                         return;
4608                                 }
4609                         }
4610                         pm_schedule_suspend(netdev->dev.parent,
4611                                             MSEC_PER_SEC * 5);
4612
4613                 /* also check for alternate media here */
4614                 } else if (!netif_carrier_ok(netdev) &&
4615                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4616                         igb_check_swap_media(adapter);
4617                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4618                                 schedule_work(&adapter->reset_task);
4619                                 /* return immediately */
4620                                 return;
4621                         }
4622                 }
4623         }
4624
4625         spin_lock(&adapter->stats64_lock);
4626         igb_update_stats(adapter, &adapter->stats64);
4627         spin_unlock(&adapter->stats64_lock);
4628
4629         for (i = 0; i < adapter->num_tx_queues; i++) {
4630                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4631                 if (!netif_carrier_ok(netdev)) {
4632                         /* We've lost link, so the controller stops DMA,
4633                          * but we've got queued Tx work that's never going
4634                          * to get done, so reset controller to flush Tx.
4635                          * (Do the reset outside of interrupt context).
4636                          */
4637                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4638                                 adapter->tx_timeout_count++;
4639                                 schedule_work(&adapter->reset_task);
4640                                 /* return immediately since reset is imminent */
4641                                 return;
4642                         }
4643                 }
4644
4645                 /* Force detection of hung controller every watchdog period */
4646                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4647         }
4648
4649         /* Cause software interrupt to ensure Rx ring is cleaned */
4650         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
4651                 u32 eics = 0;
4652
4653                 for (i = 0; i < adapter->num_q_vectors; i++)
4654                         eics |= adapter->q_vector[i]->eims_value;
4655                 wr32(E1000_EICS, eics);
4656         } else {
4657                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4658         }
4659
4660         igb_spoof_check(adapter);
4661         igb_ptp_rx_hang(adapter);
4662
4663         /* Check LVMMC register on i350/i354 only */
4664         if ((adapter->hw.mac.type == e1000_i350) ||
4665             (adapter->hw.mac.type == e1000_i354))
4666                 igb_check_lvmmc(adapter);
4667
4668         /* Reset the timer */
4669         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4670                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4671                         mod_timer(&adapter->watchdog_timer,
4672                                   round_jiffies(jiffies +  HZ));
4673                 else
4674                         mod_timer(&adapter->watchdog_timer,
4675                                   round_jiffies(jiffies + 2 * HZ));
4676         }
4677 }
4678
4679 enum latency_range {
4680         lowest_latency = 0,
4681         low_latency = 1,
4682         bulk_latency = 2,
4683         latency_invalid = 255
4684 };
4685
4686 /**
4687  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
4688  *  @q_vector: pointer to q_vector
4689  *
4690  *  Stores a new ITR value based on strictly on packet size.  This
4691  *  algorithm is less sophisticated than that used in igb_update_itr,
4692  *  due to the difficulty of synchronizing statistics across multiple
4693  *  receive rings.  The divisors and thresholds used by this function
4694  *  were determined based on theoretical maximum wire speed and testing
4695  *  data, in order to minimize response time while increasing bulk
4696  *  throughput.
4697  *  This functionality is controlled by ethtool's coalescing settings.
4698  *  NOTE:  This function is called only when operating in a multiqueue
4699  *         receive environment.
4700  **/
4701 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4702 {
4703         int new_val = q_vector->itr_val;
4704         int avg_wire_size = 0;
4705         struct igb_adapter *adapter = q_vector->adapter;
4706         unsigned int packets;
4707
4708         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4709          * ints/sec - ITR timer value of 120 ticks.
4710          */
4711         if (adapter->link_speed != SPEED_1000) {
4712                 new_val = IGB_4K_ITR;
4713                 goto set_itr_val;
4714         }
4715
4716         packets = q_vector->rx.total_packets;
4717         if (packets)
4718                 avg_wire_size = q_vector->rx.total_bytes / packets;
4719
4720         packets = q_vector->tx.total_packets;
4721         if (packets)
4722                 avg_wire_size = max_t(u32, avg_wire_size,
4723                                       q_vector->tx.total_bytes / packets);
4724
4725         /* if avg_wire_size isn't set no work was done */
4726         if (!avg_wire_size)
4727                 goto clear_counts;
4728
4729         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4730         avg_wire_size += 24;
4731
4732         /* Don't starve jumbo frames */
4733         avg_wire_size = min(avg_wire_size, 3000);
4734
4735         /* Give a little boost to mid-size frames */
4736         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4737                 new_val = avg_wire_size / 3;
4738         else
4739                 new_val = avg_wire_size / 2;
4740
4741         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4742         if (new_val < IGB_20K_ITR &&
4743             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4744              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4745                 new_val = IGB_20K_ITR;
4746
4747 set_itr_val:
4748         if (new_val != q_vector->itr_val) {
4749                 q_vector->itr_val = new_val;
4750                 q_vector->set_itr = 1;
4751         }
4752 clear_counts:
4753         q_vector->rx.total_bytes = 0;
4754         q_vector->rx.total_packets = 0;
4755         q_vector->tx.total_bytes = 0;
4756         q_vector->tx.total_packets = 0;
4757 }
4758
4759 /**
4760  *  igb_update_itr - update the dynamic ITR value based on statistics
4761  *  @q_vector: pointer to q_vector
4762  *  @ring_container: ring info to update the itr for
4763  *
4764  *  Stores a new ITR value based on packets and byte
4765  *  counts during the last interrupt.  The advantage of per interrupt
4766  *  computation is faster updates and more accurate ITR for the current
4767  *  traffic pattern.  Constants in this function were computed
4768  *  based on theoretical maximum wire speed and thresholds were set based
4769  *  on testing data as well as attempting to minimize response time
4770  *  while increasing bulk throughput.
4771  *  This functionality is controlled by ethtool's coalescing settings.
4772  *  NOTE:  These calculations are only valid when operating in a single-
4773  *         queue environment.
4774  **/
4775 static void igb_update_itr(struct igb_q_vector *q_vector,
4776                            struct igb_ring_container *ring_container)
4777 {
4778         unsigned int packets = ring_container->total_packets;
4779         unsigned int bytes = ring_container->total_bytes;
4780         u8 itrval = ring_container->itr;
4781
4782         /* no packets, exit with status unchanged */
4783         if (packets == 0)
4784                 return;
4785
4786         switch (itrval) {
4787         case lowest_latency:
4788                 /* handle TSO and jumbo frames */
4789                 if (bytes/packets > 8000)
4790                         itrval = bulk_latency;
4791                 else if ((packets < 5) && (bytes > 512))
4792                         itrval = low_latency;
4793                 break;
4794         case low_latency:  /* 50 usec aka 20000 ints/s */
4795                 if (bytes > 10000) {
4796                         /* this if handles the TSO accounting */
4797                         if (bytes/packets > 8000)
4798                                 itrval = bulk_latency;
4799                         else if ((packets < 10) || ((bytes/packets) > 1200))
4800                                 itrval = bulk_latency;
4801                         else if ((packets > 35))
4802                                 itrval = lowest_latency;
4803                 } else if (bytes/packets > 2000) {
4804                         itrval = bulk_latency;
4805                 } else if (packets <= 2 && bytes < 512) {
4806                         itrval = lowest_latency;
4807                 }
4808                 break;
4809         case bulk_latency: /* 250 usec aka 4000 ints/s */
4810                 if (bytes > 25000) {
4811                         if (packets > 35)
4812                                 itrval = low_latency;
4813                 } else if (bytes < 1500) {
4814                         itrval = low_latency;
4815                 }
4816                 break;
4817         }
4818
4819         /* clear work counters since we have the values we need */
4820         ring_container->total_bytes = 0;
4821         ring_container->total_packets = 0;
4822
4823         /* write updated itr to ring container */
4824         ring_container->itr = itrval;
4825 }
4826
4827 static void igb_set_itr(struct igb_q_vector *q_vector)
4828 {
4829         struct igb_adapter *adapter = q_vector->adapter;
4830         u32 new_itr = q_vector->itr_val;
4831         u8 current_itr = 0;
4832
4833         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4834         if (adapter->link_speed != SPEED_1000) {
4835                 current_itr = 0;
4836                 new_itr = IGB_4K_ITR;
4837                 goto set_itr_now;
4838         }
4839
4840         igb_update_itr(q_vector, &q_vector->tx);
4841         igb_update_itr(q_vector, &q_vector->rx);
4842
4843         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4844
4845         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4846         if (current_itr == lowest_latency &&
4847             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4848              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4849                 current_itr = low_latency;
4850
4851         switch (current_itr) {
4852         /* counts and packets in update_itr are dependent on these numbers */
4853         case lowest_latency:
4854                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4855                 break;
4856         case low_latency:
4857                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4858                 break;
4859         case bulk_latency:
4860                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
4861                 break;
4862         default:
4863                 break;
4864         }
4865
4866 set_itr_now:
4867         if (new_itr != q_vector->itr_val) {
4868                 /* this attempts to bias the interrupt rate towards Bulk
4869                  * by adding intermediate steps when interrupt rate is
4870                  * increasing
4871                  */
4872                 new_itr = new_itr > q_vector->itr_val ?
4873                           max((new_itr * q_vector->itr_val) /
4874                           (new_itr + (q_vector->itr_val >> 2)),
4875                           new_itr) : new_itr;
4876                 /* Don't write the value here; it resets the adapter's
4877                  * internal timer, and causes us to delay far longer than
4878                  * we should between interrupts.  Instead, we write the ITR
4879                  * value at the beginning of the next interrupt so the timing
4880                  * ends up being correct.
4881                  */
4882                 q_vector->itr_val = new_itr;
4883                 q_vector->set_itr = 1;
4884         }
4885 }
4886
4887 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4888                             u32 type_tucmd, u32 mss_l4len_idx)
4889 {
4890         struct e1000_adv_tx_context_desc *context_desc;
4891         u16 i = tx_ring->next_to_use;
4892
4893         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4894
4895         i++;
4896         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4897
4898         /* set bits to identify this as an advanced context descriptor */
4899         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4900
4901         /* For 82575, context index must be unique per ring. */
4902         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4903                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4904
4905         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4906         context_desc->seqnum_seed       = 0;
4907         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4908         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4909 }
4910
4911 static int igb_tso(struct igb_ring *tx_ring,
4912                    struct igb_tx_buffer *first,
4913                    u8 *hdr_len)
4914 {
4915         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
4916         struct sk_buff *skb = first->skb;
4917         union {
4918                 struct iphdr *v4;
4919                 struct ipv6hdr *v6;
4920                 unsigned char *hdr;
4921         } ip;
4922         union {
4923                 struct tcphdr *tcp;
4924                 unsigned char *hdr;
4925         } l4;
4926         u32 paylen, l4_offset;
4927         int err;
4928
4929         if (skb->ip_summed != CHECKSUM_PARTIAL)
4930                 return 0;
4931
4932         if (!skb_is_gso(skb))
4933                 return 0;
4934
4935         err = skb_cow_head(skb, 0);
4936         if (err < 0)
4937                 return err;
4938
4939         ip.hdr = skb_network_header(skb);
4940         l4.hdr = skb_checksum_start(skb);
4941
4942         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4943         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4944
4945         /* initialize outer IP header fields */
4946         if (ip.v4->version == 4) {
4947                 unsigned char *csum_start = skb_checksum_start(skb);
4948                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
4949
4950                 /* IP header will have to cancel out any data that
4951                  * is not a part of the outer IP header
4952                  */
4953                 ip.v4->check = csum_fold(csum_partial(trans_start,
4954                                                       csum_start - trans_start,
4955                                                       0));
4956                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4957
4958                 ip.v4->tot_len = 0;
4959                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4960                                    IGB_TX_FLAGS_CSUM |
4961                                    IGB_TX_FLAGS_IPV4;
4962         } else {
4963                 ip.v6->payload_len = 0;
4964                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4965                                    IGB_TX_FLAGS_CSUM;
4966         }
4967
4968         /* determine offset of inner transport header */
4969         l4_offset = l4.hdr - skb->data;
4970
4971         /* compute length of segmentation header */
4972         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
4973
4974         /* remove payload length from inner checksum */
4975         paylen = skb->len - l4_offset;
4976         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
4977
4978         /* update gso size and bytecount with header size */
4979         first->gso_segs = skb_shinfo(skb)->gso_segs;
4980         first->bytecount += (first->gso_segs - 1) * *hdr_len;
4981
4982         /* MSS L4LEN IDX */
4983         mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
4984         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4985
4986         /* VLAN MACLEN IPLEN */
4987         vlan_macip_lens = l4.hdr - ip.hdr;
4988         vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
4989         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4990
4991         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4992
4993         return 1;
4994 }
4995
4996 static inline bool igb_ipv6_csum_is_sctp(struct sk_buff *skb)
4997 {
4998         unsigned int offset = 0;
4999
5000         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
5001
5002         return offset == skb_checksum_start_offset(skb);
5003 }
5004
5005 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5006 {
5007         struct sk_buff *skb = first->skb;
5008         u32 vlan_macip_lens = 0;
5009         u32 type_tucmd = 0;
5010
5011         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5012 csum_failed:
5013                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5014                         return;
5015                 goto no_csum;
5016         }
5017
5018         switch (skb->csum_offset) {
5019         case offsetof(struct tcphdr, check):
5020                 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5021                 /* fall through */
5022         case offsetof(struct udphdr, check):
5023                 break;
5024         case offsetof(struct sctphdr, checksum):
5025                 /* validate that this is actually an SCTP request */
5026                 if (((first->protocol == htons(ETH_P_IP)) &&
5027                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
5028                     ((first->protocol == htons(ETH_P_IPV6)) &&
5029                      igb_ipv6_csum_is_sctp(skb))) {
5030                         type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
5031                         break;
5032                 }
5033         default:
5034                 skb_checksum_help(skb);
5035                 goto csum_failed;
5036         }
5037
5038         /* update TX checksum flag */
5039         first->tx_flags |= IGB_TX_FLAGS_CSUM;
5040         vlan_macip_lens = skb_checksum_start_offset(skb) -
5041                           skb_network_offset(skb);
5042 no_csum:
5043         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5044         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5045
5046         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, 0);
5047 }
5048
5049 #define IGB_SET_FLAG(_input, _flag, _result) \
5050         ((_flag <= _result) ? \
5051          ((u32)(_input & _flag) * (_result / _flag)) : \
5052          ((u32)(_input & _flag) / (_flag / _result)))
5053
5054 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5055 {
5056         /* set type for advanced descriptor with frame checksum insertion */
5057         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5058                        E1000_ADVTXD_DCMD_DEXT |
5059                        E1000_ADVTXD_DCMD_IFCS;
5060
5061         /* set HW vlan bit if vlan is present */
5062         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5063                                  (E1000_ADVTXD_DCMD_VLE));
5064
5065         /* set segmentation bits for TSO */
5066         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5067                                  (E1000_ADVTXD_DCMD_TSE));
5068
5069         /* set timestamp bit if present */
5070         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5071                                  (E1000_ADVTXD_MAC_TSTAMP));
5072
5073         /* insert frame checksum */
5074         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
5075
5076         return cmd_type;
5077 }
5078
5079 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5080                                  union e1000_adv_tx_desc *tx_desc,
5081                                  u32 tx_flags, unsigned int paylen)
5082 {
5083         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5084
5085         /* 82575 requires a unique index per ring */
5086         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5087                 olinfo_status |= tx_ring->reg_idx << 4;
5088
5089         /* insert L4 checksum */
5090         olinfo_status |= IGB_SET_FLAG(tx_flags,
5091                                       IGB_TX_FLAGS_CSUM,
5092                                       (E1000_TXD_POPTS_TXSM << 8));
5093
5094         /* insert IPv4 checksum */
5095         olinfo_status |= IGB_SET_FLAG(tx_flags,
5096                                       IGB_TX_FLAGS_IPV4,
5097                                       (E1000_TXD_POPTS_IXSM << 8));
5098
5099         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5100 }
5101
5102 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5103 {
5104         struct net_device *netdev = tx_ring->netdev;
5105
5106         netif_stop_subqueue(netdev, tx_ring->queue_index);
5107
5108         /* Herbert's original patch had:
5109          *  smp_mb__after_netif_stop_queue();
5110          * but since that doesn't exist yet, just open code it.
5111          */
5112         smp_mb();
5113
5114         /* We need to check again in a case another CPU has just
5115          * made room available.
5116          */
5117         if (igb_desc_unused(tx_ring) < size)
5118                 return -EBUSY;
5119
5120         /* A reprieve! */
5121         netif_wake_subqueue(netdev, tx_ring->queue_index);
5122
5123         u64_stats_update_begin(&tx_ring->tx_syncp2);
5124         tx_ring->tx_stats.restart_queue2++;
5125         u64_stats_update_end(&tx_ring->tx_syncp2);
5126
5127         return 0;
5128 }
5129
5130 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5131 {
5132         if (igb_desc_unused(tx_ring) >= size)
5133                 return 0;
5134         return __igb_maybe_stop_tx(tx_ring, size);
5135 }
5136
5137 static void igb_tx_map(struct igb_ring *tx_ring,
5138                        struct igb_tx_buffer *first,
5139                        const u8 hdr_len)
5140 {
5141         struct sk_buff *skb = first->skb;
5142         struct igb_tx_buffer *tx_buffer;
5143         union e1000_adv_tx_desc *tx_desc;
5144         struct skb_frag_struct *frag;
5145         dma_addr_t dma;
5146         unsigned int data_len, size;
5147         u32 tx_flags = first->tx_flags;
5148         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5149         u16 i = tx_ring->next_to_use;
5150
5151         tx_desc = IGB_TX_DESC(tx_ring, i);
5152
5153         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5154
5155         size = skb_headlen(skb);
5156         data_len = skb->data_len;
5157
5158         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5159
5160         tx_buffer = first;
5161
5162         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5163                 if (dma_mapping_error(tx_ring->dev, dma))
5164                         goto dma_error;
5165
5166                 /* record length, and DMA address */
5167                 dma_unmap_len_set(tx_buffer, len, size);
5168                 dma_unmap_addr_set(tx_buffer, dma, dma);
5169
5170                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5171
5172                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5173                         tx_desc->read.cmd_type_len =
5174                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5175
5176                         i++;
5177                         tx_desc++;
5178                         if (i == tx_ring->count) {
5179                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5180                                 i = 0;
5181                         }
5182                         tx_desc->read.olinfo_status = 0;
5183
5184                         dma += IGB_MAX_DATA_PER_TXD;
5185                         size -= IGB_MAX_DATA_PER_TXD;
5186
5187                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5188                 }
5189
5190                 if (likely(!data_len))
5191                         break;
5192
5193                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5194
5195                 i++;
5196                 tx_desc++;
5197                 if (i == tx_ring->count) {
5198                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5199                         i = 0;
5200                 }
5201                 tx_desc->read.olinfo_status = 0;
5202
5203                 size = skb_frag_size(frag);
5204                 data_len -= size;
5205
5206                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5207                                        size, DMA_TO_DEVICE);
5208
5209                 tx_buffer = &tx_ring->tx_buffer_info[i];
5210         }
5211
5212         /* write last descriptor with RS and EOP bits */
5213         cmd_type |= size | IGB_TXD_DCMD;
5214         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5215
5216         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5217
5218         /* set the timestamp */
5219         first->time_stamp = jiffies;
5220
5221         /* Force memory writes to complete before letting h/w know there
5222          * are new descriptors to fetch.  (Only applicable for weak-ordered
5223          * memory model archs, such as IA-64).
5224          *
5225          * We also need this memory barrier to make certain all of the
5226          * status bits have been updated before next_to_watch is written.
5227          */
5228         wmb();
5229
5230         /* set next_to_watch value indicating a packet is present */
5231         first->next_to_watch = tx_desc;
5232
5233         i++;
5234         if (i == tx_ring->count)
5235                 i = 0;
5236
5237         tx_ring->next_to_use = i;
5238
5239         /* Make sure there is space in the ring for the next send. */
5240         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5241
5242         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
5243                 writel(i, tx_ring->tail);
5244
5245                 /* we need this if more than one processor can write to our tail
5246                  * at a time, it synchronizes IO on IA64/Altix systems
5247                  */
5248                 mmiowb();
5249         }
5250         return;
5251
5252 dma_error:
5253         dev_err(tx_ring->dev, "TX DMA map failed\n");
5254
5255         /* clear dma mappings for failed tx_buffer_info map */
5256         for (;;) {
5257                 tx_buffer = &tx_ring->tx_buffer_info[i];
5258                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5259                 if (tx_buffer == first)
5260                         break;
5261                 if (i == 0)
5262                         i = tx_ring->count;
5263                 i--;
5264         }
5265
5266         tx_ring->next_to_use = i;
5267 }
5268
5269 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5270                                 struct igb_ring *tx_ring)
5271 {
5272         struct igb_tx_buffer *first;
5273         int tso;
5274         u32 tx_flags = 0;
5275         unsigned short f;
5276         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5277         __be16 protocol = vlan_get_protocol(skb);
5278         u8 hdr_len = 0;
5279
5280         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5281          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5282          *       + 2 desc gap to keep tail from touching head,
5283          *       + 1 desc for context descriptor,
5284          * otherwise try next time
5285          */
5286         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5287                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5288
5289         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5290                 /* this is a hard error */
5291                 return NETDEV_TX_BUSY;
5292         }
5293
5294         /* record the location of the first descriptor for this packet */
5295         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5296         first->skb = skb;
5297         first->bytecount = skb->len;
5298         first->gso_segs = 1;
5299
5300         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5301                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5302
5303                 if (!test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
5304                                            &adapter->state)) {
5305                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5306                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5307
5308                         adapter->ptp_tx_skb = skb_get(skb);
5309                         adapter->ptp_tx_start = jiffies;
5310                         if (adapter->hw.mac.type == e1000_82576)
5311                                 schedule_work(&adapter->ptp_tx_work);
5312                 }
5313         }
5314
5315         skb_tx_timestamp(skb);
5316
5317         if (skb_vlan_tag_present(skb)) {
5318                 tx_flags |= IGB_TX_FLAGS_VLAN;
5319                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5320         }
5321
5322         /* record initial flags and protocol */
5323         first->tx_flags = tx_flags;
5324         first->protocol = protocol;
5325
5326         tso = igb_tso(tx_ring, first, &hdr_len);
5327         if (tso < 0)
5328                 goto out_drop;
5329         else if (!tso)
5330                 igb_tx_csum(tx_ring, first);
5331
5332         igb_tx_map(tx_ring, first, hdr_len);
5333
5334         return NETDEV_TX_OK;
5335
5336 out_drop:
5337         igb_unmap_and_free_tx_resource(tx_ring, first);
5338
5339         return NETDEV_TX_OK;
5340 }
5341
5342 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5343                                                     struct sk_buff *skb)
5344 {
5345         unsigned int r_idx = skb->queue_mapping;
5346
5347         if (r_idx >= adapter->num_tx_queues)
5348                 r_idx = r_idx % adapter->num_tx_queues;
5349
5350         return adapter->tx_ring[r_idx];
5351 }
5352
5353 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5354                                   struct net_device *netdev)
5355 {
5356         struct igb_adapter *adapter = netdev_priv(netdev);
5357
5358         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5359          * in order to meet this minimum size requirement.
5360          */
5361         if (skb_put_padto(skb, 17))
5362                 return NETDEV_TX_OK;
5363
5364         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5365 }
5366
5367 /**
5368  *  igb_tx_timeout - Respond to a Tx Hang
5369  *  @netdev: network interface device structure
5370  **/
5371 static void igb_tx_timeout(struct net_device *netdev)
5372 {
5373         struct igb_adapter *adapter = netdev_priv(netdev);
5374         struct e1000_hw *hw = &adapter->hw;
5375
5376         /* Do the reset outside of interrupt context */
5377         adapter->tx_timeout_count++;
5378
5379         if (hw->mac.type >= e1000_82580)
5380                 hw->dev_spec._82575.global_device_reset = true;
5381
5382         schedule_work(&adapter->reset_task);
5383         wr32(E1000_EICS,
5384              (adapter->eims_enable_mask & ~adapter->eims_other));
5385 }
5386
5387 static void igb_reset_task(struct work_struct *work)
5388 {
5389         struct igb_adapter *adapter;
5390         adapter = container_of(work, struct igb_adapter, reset_task);
5391
5392         rtnl_lock();
5393         /* If we're already down or resetting, just bail */
5394         if (test_bit(__IGB_DOWN, &adapter->state) ||
5395             test_bit(__IGB_RESETTING, &adapter->state)) {
5396                 rtnl_unlock();
5397                 return;
5398         }
5399
5400         igb_dump(adapter);
5401         netdev_err(adapter->netdev, "Reset adapter\n");
5402         igb_reinit_locked(adapter);
5403         rtnl_unlock();
5404 }
5405
5406 /**
5407  *  igb_get_stats64 - Get System Network Statistics
5408  *  @netdev: network interface device structure
5409  *  @stats: rtnl_link_stats64 pointer
5410  **/
5411 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
5412                                                 struct rtnl_link_stats64 *stats)
5413 {
5414         struct igb_adapter *adapter = netdev_priv(netdev);
5415
5416         spin_lock(&adapter->stats64_lock);
5417         igb_update_stats(adapter, &adapter->stats64);
5418         memcpy(stats, &adapter->stats64, sizeof(*stats));
5419         spin_unlock(&adapter->stats64_lock);
5420
5421         return stats;
5422 }
5423
5424 /**
5425  *  igb_change_mtu - Change the Maximum Transfer Unit
5426  *  @netdev: network interface device structure
5427  *  @new_mtu: new value for maximum frame size
5428  *
5429  *  Returns 0 on success, negative on failure
5430  **/
5431 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5432 {
5433         struct igb_adapter *adapter = netdev_priv(netdev);
5434         struct pci_dev *pdev = adapter->pdev;
5435         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5436
5437         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5438                 dev_err(&pdev->dev, "Invalid MTU setting\n");
5439                 return -EINVAL;
5440         }
5441
5442 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5443         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5444                 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
5445                 return -EINVAL;
5446         }
5447
5448         /* adjust max frame to be at least the size of a standard frame */
5449         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5450                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5451
5452         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5453                 usleep_range(1000, 2000);
5454
5455         /* igb_down has a dependency on max_frame_size */
5456         adapter->max_frame_size = max_frame;
5457
5458         if (netif_running(netdev))
5459                 igb_down(adapter);
5460
5461         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
5462                  netdev->mtu, new_mtu);
5463         netdev->mtu = new_mtu;
5464
5465         if (netif_running(netdev))
5466                 igb_up(adapter);
5467         else
5468                 igb_reset(adapter);
5469
5470         clear_bit(__IGB_RESETTING, &adapter->state);
5471
5472         return 0;
5473 }
5474
5475 /**
5476  *  igb_update_stats - Update the board statistics counters
5477  *  @adapter: board private structure
5478  **/
5479 void igb_update_stats(struct igb_adapter *adapter,
5480                       struct rtnl_link_stats64 *net_stats)
5481 {
5482         struct e1000_hw *hw = &adapter->hw;
5483         struct pci_dev *pdev = adapter->pdev;
5484         u32 reg, mpc;
5485         int i;
5486         u64 bytes, packets;
5487         unsigned int start;
5488         u64 _bytes, _packets;
5489
5490         /* Prevent stats update while adapter is being reset, or if the pci
5491          * connection is down.
5492          */
5493         if (adapter->link_speed == 0)
5494                 return;
5495         if (pci_channel_offline(pdev))
5496                 return;
5497
5498         bytes = 0;
5499         packets = 0;
5500
5501         rcu_read_lock();
5502         for (i = 0; i < adapter->num_rx_queues; i++) {
5503                 struct igb_ring *ring = adapter->rx_ring[i];
5504                 u32 rqdpc = rd32(E1000_RQDPC(i));
5505                 if (hw->mac.type >= e1000_i210)
5506                         wr32(E1000_RQDPC(i), 0);
5507
5508                 if (rqdpc) {
5509                         ring->rx_stats.drops += rqdpc;
5510                         net_stats->rx_fifo_errors += rqdpc;
5511                 }
5512
5513                 do {
5514                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
5515                         _bytes = ring->rx_stats.bytes;
5516                         _packets = ring->rx_stats.packets;
5517                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
5518                 bytes += _bytes;
5519                 packets += _packets;
5520         }
5521
5522         net_stats->rx_bytes = bytes;
5523         net_stats->rx_packets = packets;
5524
5525         bytes = 0;
5526         packets = 0;
5527         for (i = 0; i < adapter->num_tx_queues; i++) {
5528                 struct igb_ring *ring = adapter->tx_ring[i];
5529                 do {
5530                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
5531                         _bytes = ring->tx_stats.bytes;
5532                         _packets = ring->tx_stats.packets;
5533                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
5534                 bytes += _bytes;
5535                 packets += _packets;
5536         }
5537         net_stats->tx_bytes = bytes;
5538         net_stats->tx_packets = packets;
5539         rcu_read_unlock();
5540
5541         /* read stats registers */
5542         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
5543         adapter->stats.gprc += rd32(E1000_GPRC);
5544         adapter->stats.gorc += rd32(E1000_GORCL);
5545         rd32(E1000_GORCH); /* clear GORCL */
5546         adapter->stats.bprc += rd32(E1000_BPRC);
5547         adapter->stats.mprc += rd32(E1000_MPRC);
5548         adapter->stats.roc += rd32(E1000_ROC);
5549
5550         adapter->stats.prc64 += rd32(E1000_PRC64);
5551         adapter->stats.prc127 += rd32(E1000_PRC127);
5552         adapter->stats.prc255 += rd32(E1000_PRC255);
5553         adapter->stats.prc511 += rd32(E1000_PRC511);
5554         adapter->stats.prc1023 += rd32(E1000_PRC1023);
5555         adapter->stats.prc1522 += rd32(E1000_PRC1522);
5556         adapter->stats.symerrs += rd32(E1000_SYMERRS);
5557         adapter->stats.sec += rd32(E1000_SEC);
5558
5559         mpc = rd32(E1000_MPC);
5560         adapter->stats.mpc += mpc;
5561         net_stats->rx_fifo_errors += mpc;
5562         adapter->stats.scc += rd32(E1000_SCC);
5563         adapter->stats.ecol += rd32(E1000_ECOL);
5564         adapter->stats.mcc += rd32(E1000_MCC);
5565         adapter->stats.latecol += rd32(E1000_LATECOL);
5566         adapter->stats.dc += rd32(E1000_DC);
5567         adapter->stats.rlec += rd32(E1000_RLEC);
5568         adapter->stats.xonrxc += rd32(E1000_XONRXC);
5569         adapter->stats.xontxc += rd32(E1000_XONTXC);
5570         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
5571         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
5572         adapter->stats.fcruc += rd32(E1000_FCRUC);
5573         adapter->stats.gptc += rd32(E1000_GPTC);
5574         adapter->stats.gotc += rd32(E1000_GOTCL);
5575         rd32(E1000_GOTCH); /* clear GOTCL */
5576         adapter->stats.rnbc += rd32(E1000_RNBC);
5577         adapter->stats.ruc += rd32(E1000_RUC);
5578         adapter->stats.rfc += rd32(E1000_RFC);
5579         adapter->stats.rjc += rd32(E1000_RJC);
5580         adapter->stats.tor += rd32(E1000_TORH);
5581         adapter->stats.tot += rd32(E1000_TOTH);
5582         adapter->stats.tpr += rd32(E1000_TPR);
5583
5584         adapter->stats.ptc64 += rd32(E1000_PTC64);
5585         adapter->stats.ptc127 += rd32(E1000_PTC127);
5586         adapter->stats.ptc255 += rd32(E1000_PTC255);
5587         adapter->stats.ptc511 += rd32(E1000_PTC511);
5588         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
5589         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
5590
5591         adapter->stats.mptc += rd32(E1000_MPTC);
5592         adapter->stats.bptc += rd32(E1000_BPTC);
5593
5594         adapter->stats.tpt += rd32(E1000_TPT);
5595         adapter->stats.colc += rd32(E1000_COLC);
5596
5597         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
5598         /* read internal phy specific stats */
5599         reg = rd32(E1000_CTRL_EXT);
5600         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5601                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
5602
5603                 /* this stat has invalid values on i210/i211 */
5604                 if ((hw->mac.type != e1000_i210) &&
5605                     (hw->mac.type != e1000_i211))
5606                         adapter->stats.tncrs += rd32(E1000_TNCRS);
5607         }
5608
5609         adapter->stats.tsctc += rd32(E1000_TSCTC);
5610         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
5611
5612         adapter->stats.iac += rd32(E1000_IAC);
5613         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
5614         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
5615         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
5616         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
5617         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
5618         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
5619         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
5620         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
5621
5622         /* Fill out the OS statistics structure */
5623         net_stats->multicast = adapter->stats.mprc;
5624         net_stats->collisions = adapter->stats.colc;
5625
5626         /* Rx Errors */
5627
5628         /* RLEC on some newer hardware can be incorrect so build
5629          * our own version based on RUC and ROC
5630          */
5631         net_stats->rx_errors = adapter->stats.rxerrc +
5632                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5633                 adapter->stats.ruc + adapter->stats.roc +
5634                 adapter->stats.cexterr;
5635         net_stats->rx_length_errors = adapter->stats.ruc +
5636                                       adapter->stats.roc;
5637         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5638         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5639         net_stats->rx_missed_errors = adapter->stats.mpc;
5640
5641         /* Tx Errors */
5642         net_stats->tx_errors = adapter->stats.ecol +
5643                                adapter->stats.latecol;
5644         net_stats->tx_aborted_errors = adapter->stats.ecol;
5645         net_stats->tx_window_errors = adapter->stats.latecol;
5646         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5647
5648         /* Tx Dropped needs to be maintained elsewhere */
5649
5650         /* Management Stats */
5651         adapter->stats.mgptc += rd32(E1000_MGTPTC);
5652         adapter->stats.mgprc += rd32(E1000_MGTPRC);
5653         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5654
5655         /* OS2BMC Stats */
5656         reg = rd32(E1000_MANC);
5657         if (reg & E1000_MANC_EN_BMC2OS) {
5658                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5659                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5660                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5661                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5662         }
5663 }
5664
5665 static void igb_tsync_interrupt(struct igb_adapter *adapter)
5666 {
5667         struct e1000_hw *hw = &adapter->hw;
5668         struct ptp_clock_event event;
5669         struct timespec64 ts;
5670         u32 ack = 0, tsauxc, sec, nsec, tsicr = rd32(E1000_TSICR);
5671
5672         if (tsicr & TSINTR_SYS_WRAP) {
5673                 event.type = PTP_CLOCK_PPS;
5674                 if (adapter->ptp_caps.pps)
5675                         ptp_clock_event(adapter->ptp_clock, &event);
5676                 ack |= TSINTR_SYS_WRAP;
5677         }
5678
5679         if (tsicr & E1000_TSICR_TXTS) {
5680                 /* retrieve hardware timestamp */
5681                 schedule_work(&adapter->ptp_tx_work);
5682                 ack |= E1000_TSICR_TXTS;
5683         }
5684
5685         if (tsicr & TSINTR_TT0) {
5686                 spin_lock(&adapter->tmreg_lock);
5687                 ts = timespec64_add(adapter->perout[0].start,
5688                                     adapter->perout[0].period);
5689                 /* u32 conversion of tv_sec is safe until y2106 */
5690                 wr32(E1000_TRGTTIML0, ts.tv_nsec);
5691                 wr32(E1000_TRGTTIMH0, (u32)ts.tv_sec);
5692                 tsauxc = rd32(E1000_TSAUXC);
5693                 tsauxc |= TSAUXC_EN_TT0;
5694                 wr32(E1000_TSAUXC, tsauxc);
5695                 adapter->perout[0].start = ts;
5696                 spin_unlock(&adapter->tmreg_lock);
5697                 ack |= TSINTR_TT0;
5698         }
5699
5700         if (tsicr & TSINTR_TT1) {
5701                 spin_lock(&adapter->tmreg_lock);
5702                 ts = timespec64_add(adapter->perout[1].start,
5703                                     adapter->perout[1].period);
5704                 wr32(E1000_TRGTTIML1, ts.tv_nsec);
5705                 wr32(E1000_TRGTTIMH1, (u32)ts.tv_sec);
5706                 tsauxc = rd32(E1000_TSAUXC);
5707                 tsauxc |= TSAUXC_EN_TT1;
5708                 wr32(E1000_TSAUXC, tsauxc);
5709                 adapter->perout[1].start = ts;
5710                 spin_unlock(&adapter->tmreg_lock);
5711                 ack |= TSINTR_TT1;
5712         }
5713
5714         if (tsicr & TSINTR_AUTT0) {
5715                 nsec = rd32(E1000_AUXSTMPL0);
5716                 sec  = rd32(E1000_AUXSTMPH0);
5717                 event.type = PTP_CLOCK_EXTTS;
5718                 event.index = 0;
5719                 event.timestamp = sec * 1000000000ULL + nsec;
5720                 ptp_clock_event(adapter->ptp_clock, &event);
5721                 ack |= TSINTR_AUTT0;
5722         }
5723
5724         if (tsicr & TSINTR_AUTT1) {
5725                 nsec = rd32(E1000_AUXSTMPL1);
5726                 sec  = rd32(E1000_AUXSTMPH1);
5727                 event.type = PTP_CLOCK_EXTTS;
5728                 event.index = 1;
5729                 event.timestamp = sec * 1000000000ULL + nsec;
5730                 ptp_clock_event(adapter->ptp_clock, &event);
5731                 ack |= TSINTR_AUTT1;
5732         }
5733
5734         /* acknowledge the interrupts */
5735         wr32(E1000_TSICR, ack);
5736 }
5737
5738 static irqreturn_t igb_msix_other(int irq, void *data)
5739 {
5740         struct igb_adapter *adapter = data;
5741         struct e1000_hw *hw = &adapter->hw;
5742         u32 icr = rd32(E1000_ICR);
5743         /* reading ICR causes bit 31 of EICR to be cleared */
5744
5745         if (icr & E1000_ICR_DRSTA)
5746                 schedule_work(&adapter->reset_task);
5747
5748         if (icr & E1000_ICR_DOUTSYNC) {
5749                 /* HW is reporting DMA is out of sync */
5750                 adapter->stats.doosync++;
5751                 /* The DMA Out of Sync is also indication of a spoof event
5752                  * in IOV mode. Check the Wrong VM Behavior register to
5753                  * see if it is really a spoof event.
5754                  */
5755                 igb_check_wvbr(adapter);
5756         }
5757
5758         /* Check for a mailbox event */
5759         if (icr & E1000_ICR_VMMB)
5760                 igb_msg_task(adapter);
5761
5762         if (icr & E1000_ICR_LSC) {
5763                 hw->mac.get_link_status = 1;
5764                 /* guard against interrupt when we're going down */
5765                 if (!test_bit(__IGB_DOWN, &adapter->state))
5766                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5767         }
5768
5769         if (icr & E1000_ICR_TS)
5770                 igb_tsync_interrupt(adapter);
5771
5772         wr32(E1000_EIMS, adapter->eims_other);
5773
5774         return IRQ_HANDLED;
5775 }
5776
5777 static void igb_write_itr(struct igb_q_vector *q_vector)
5778 {
5779         struct igb_adapter *adapter = q_vector->adapter;
5780         u32 itr_val = q_vector->itr_val & 0x7FFC;
5781
5782         if (!q_vector->set_itr)
5783                 return;
5784
5785         if (!itr_val)
5786                 itr_val = 0x4;
5787
5788         if (adapter->hw.mac.type == e1000_82575)
5789                 itr_val |= itr_val << 16;
5790         else
5791                 itr_val |= E1000_EITR_CNT_IGNR;
5792
5793         writel(itr_val, q_vector->itr_register);
5794         q_vector->set_itr = 0;
5795 }
5796
5797 static irqreturn_t igb_msix_ring(int irq, void *data)
5798 {
5799         struct igb_q_vector *q_vector = data;
5800
5801         /* Write the ITR value calculated from the previous interrupt. */
5802         igb_write_itr(q_vector);
5803
5804         napi_schedule(&q_vector->napi);
5805
5806         return IRQ_HANDLED;
5807 }
5808
5809 #ifdef CONFIG_IGB_DCA
5810 static void igb_update_tx_dca(struct igb_adapter *adapter,
5811                               struct igb_ring *tx_ring,
5812                               int cpu)
5813 {
5814         struct e1000_hw *hw = &adapter->hw;
5815         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5816
5817         if (hw->mac.type != e1000_82575)
5818                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5819
5820         /* We can enable relaxed ordering for reads, but not writes when
5821          * DCA is enabled.  This is due to a known issue in some chipsets
5822          * which will cause the DCA tag to be cleared.
5823          */
5824         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5825                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5826                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5827
5828         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5829 }
5830
5831 static void igb_update_rx_dca(struct igb_adapter *adapter,
5832                               struct igb_ring *rx_ring,
5833                               int cpu)
5834 {
5835         struct e1000_hw *hw = &adapter->hw;
5836         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5837
5838         if (hw->mac.type != e1000_82575)
5839                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5840
5841         /* We can enable relaxed ordering for reads, but not writes when
5842          * DCA is enabled.  This is due to a known issue in some chipsets
5843          * which will cause the DCA tag to be cleared.
5844          */
5845         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5846                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5847
5848         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5849 }
5850
5851 static void igb_update_dca(struct igb_q_vector *q_vector)
5852 {
5853         struct igb_adapter *adapter = q_vector->adapter;
5854         int cpu = get_cpu();
5855
5856         if (q_vector->cpu == cpu)
5857                 goto out_no_update;
5858
5859         if (q_vector->tx.ring)
5860                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5861
5862         if (q_vector->rx.ring)
5863                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5864
5865         q_vector->cpu = cpu;
5866 out_no_update:
5867         put_cpu();
5868 }
5869
5870 static void igb_setup_dca(struct igb_adapter *adapter)
5871 {
5872         struct e1000_hw *hw = &adapter->hw;
5873         int i;
5874
5875         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5876                 return;
5877
5878         /* Always use CB2 mode, difference is masked in the CB driver. */
5879         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5880
5881         for (i = 0; i < adapter->num_q_vectors; i++) {
5882                 adapter->q_vector[i]->cpu = -1;
5883                 igb_update_dca(adapter->q_vector[i]);
5884         }
5885 }
5886
5887 static int __igb_notify_dca(struct device *dev, void *data)
5888 {
5889         struct net_device *netdev = dev_get_drvdata(dev);
5890         struct igb_adapter *adapter = netdev_priv(netdev);
5891         struct pci_dev *pdev = adapter->pdev;
5892         struct e1000_hw *hw = &adapter->hw;
5893         unsigned long event = *(unsigned long *)data;
5894
5895         switch (event) {
5896         case DCA_PROVIDER_ADD:
5897                 /* if already enabled, don't do it again */
5898                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5899                         break;
5900                 if (dca_add_requester(dev) == 0) {
5901                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
5902                         dev_info(&pdev->dev, "DCA enabled\n");
5903                         igb_setup_dca(adapter);
5904                         break;
5905                 }
5906                 /* Fall Through since DCA is disabled. */
5907         case DCA_PROVIDER_REMOVE:
5908                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5909                         /* without this a class_device is left
5910                          * hanging around in the sysfs model
5911                          */
5912                         dca_remove_requester(dev);
5913                         dev_info(&pdev->dev, "DCA disabled\n");
5914                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5915                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5916                 }
5917                 break;
5918         }
5919
5920         return 0;
5921 }
5922
5923 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5924                           void *p)
5925 {
5926         int ret_val;
5927
5928         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5929                                          __igb_notify_dca);
5930
5931         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5932 }
5933 #endif /* CONFIG_IGB_DCA */
5934
5935 #ifdef CONFIG_PCI_IOV
5936 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5937 {
5938         unsigned char mac_addr[ETH_ALEN];
5939
5940         eth_zero_addr(mac_addr);
5941         igb_set_vf_mac(adapter, vf, mac_addr);
5942
5943         /* By default spoof check is enabled for all VFs */
5944         adapter->vf_data[vf].spoofchk_enabled = true;
5945
5946         return 0;
5947 }
5948
5949 #endif
5950 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5951 {
5952         struct e1000_hw *hw = &adapter->hw;
5953         u32 ping;
5954         int i;
5955
5956         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5957                 ping = E1000_PF_CONTROL_MSG;
5958                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5959                         ping |= E1000_VT_MSGTYPE_CTS;
5960                 igb_write_mbx(hw, &ping, 1, i);
5961         }
5962 }
5963
5964 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5965 {
5966         struct e1000_hw *hw = &adapter->hw;
5967         u32 vmolr = rd32(E1000_VMOLR(vf));
5968         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5969
5970         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5971                             IGB_VF_FLAG_MULTI_PROMISC);
5972         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5973
5974         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5975                 vmolr |= E1000_VMOLR_MPME;
5976                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5977                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5978         } else {
5979                 /* if we have hashes and we are clearing a multicast promisc
5980                  * flag we need to write the hashes to the MTA as this step
5981                  * was previously skipped
5982                  */
5983                 if (vf_data->num_vf_mc_hashes > 30) {
5984                         vmolr |= E1000_VMOLR_MPME;
5985                 } else if (vf_data->num_vf_mc_hashes) {
5986                         int j;
5987
5988                         vmolr |= E1000_VMOLR_ROMPE;
5989                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5990                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5991                 }
5992         }
5993
5994         wr32(E1000_VMOLR(vf), vmolr);
5995
5996         /* there are flags left unprocessed, likely not supported */
5997         if (*msgbuf & E1000_VT_MSGINFO_MASK)
5998                 return -EINVAL;
5999
6000         return 0;
6001 }
6002
6003 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6004                                   u32 *msgbuf, u32 vf)
6005 {
6006         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6007         u16 *hash_list = (u16 *)&msgbuf[1];
6008         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6009         int i;
6010
6011         /* salt away the number of multicast addresses assigned
6012          * to this VF for later use to restore when the PF multi cast
6013          * list changes
6014          */
6015         vf_data->num_vf_mc_hashes = n;
6016
6017         /* only up to 30 hash values supported */
6018         if (n > 30)
6019                 n = 30;
6020
6021         /* store the hashes for later use */
6022         for (i = 0; i < n; i++)
6023                 vf_data->vf_mc_hashes[i] = hash_list[i];
6024
6025         /* Flush and reset the mta with the new values */
6026         igb_set_rx_mode(adapter->netdev);
6027
6028         return 0;
6029 }
6030
6031 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6032 {
6033         struct e1000_hw *hw = &adapter->hw;
6034         struct vf_data_storage *vf_data;
6035         int i, j;
6036
6037         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6038                 u32 vmolr = rd32(E1000_VMOLR(i));
6039
6040                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6041
6042                 vf_data = &adapter->vf_data[i];
6043
6044                 if ((vf_data->num_vf_mc_hashes > 30) ||
6045                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6046                         vmolr |= E1000_VMOLR_MPME;
6047                 } else if (vf_data->num_vf_mc_hashes) {
6048                         vmolr |= E1000_VMOLR_ROMPE;
6049                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6050                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
6051                 }
6052                 wr32(E1000_VMOLR(i), vmolr);
6053         }
6054 }
6055
6056 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6057 {
6058         struct e1000_hw *hw = &adapter->hw;
6059         u32 pool_mask, vlvf_mask, i;
6060
6061         /* create mask for VF and other pools */
6062         pool_mask = E1000_VLVF_POOLSEL_MASK;
6063         vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
6064
6065         /* drop PF from pool bits */
6066         pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
6067                              adapter->vfs_allocated_count);
6068
6069         /* Find the vlan filter for this id */
6070         for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
6071                 u32 vlvf = rd32(E1000_VLVF(i));
6072                 u32 vfta_mask, vid, vfta;
6073
6074                 /* remove the vf from the pool */
6075                 if (!(vlvf & vlvf_mask))
6076                         continue;
6077
6078                 /* clear out bit from VLVF */
6079                 vlvf ^= vlvf_mask;
6080
6081                 /* if other pools are present, just remove ourselves */
6082                 if (vlvf & pool_mask)
6083                         goto update_vlvfb;
6084
6085                 /* if PF is present, leave VFTA */
6086                 if (vlvf & E1000_VLVF_POOLSEL_MASK)
6087                         goto update_vlvf;
6088
6089                 vid = vlvf & E1000_VLVF_VLANID_MASK;
6090                 vfta_mask = BIT(vid % 32);
6091
6092                 /* clear bit from VFTA */
6093                 vfta = adapter->shadow_vfta[vid / 32];
6094                 if (vfta & vfta_mask)
6095                         hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
6096 update_vlvf:
6097                 /* clear pool selection enable */
6098                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6099                         vlvf &= E1000_VLVF_POOLSEL_MASK;
6100                 else
6101                         vlvf = 0;
6102 update_vlvfb:
6103                 /* clear pool bits */
6104                 wr32(E1000_VLVF(i), vlvf);
6105         }
6106 }
6107
6108 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
6109 {
6110         u32 vlvf;
6111         int idx;
6112
6113         /* short cut the special case */
6114         if (vlan == 0)
6115                 return 0;
6116
6117         /* Search for the VLAN id in the VLVF entries */
6118         for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
6119                 vlvf = rd32(E1000_VLVF(idx));
6120                 if ((vlvf & VLAN_VID_MASK) == vlan)
6121                         break;
6122         }
6123
6124         return idx;
6125 }
6126
6127 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
6128 {
6129         struct e1000_hw *hw = &adapter->hw;
6130         u32 bits, pf_id;
6131         int idx;
6132
6133         idx = igb_find_vlvf_entry(hw, vid);
6134         if (!idx)
6135                 return;
6136
6137         /* See if any other pools are set for this VLAN filter
6138          * entry other than the PF.
6139          */
6140         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
6141         bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
6142         bits &= rd32(E1000_VLVF(idx));
6143
6144         /* Disable the filter so this falls into the default pool. */
6145         if (!bits) {
6146                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6147                         wr32(E1000_VLVF(idx), BIT(pf_id));
6148                 else
6149                         wr32(E1000_VLVF(idx), 0);
6150         }
6151 }
6152
6153 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
6154                            bool add, u32 vf)
6155 {
6156         int pf_id = adapter->vfs_allocated_count;
6157         struct e1000_hw *hw = &adapter->hw;
6158         int err;
6159
6160         /* If VLAN overlaps with one the PF is currently monitoring make
6161          * sure that we are able to allocate a VLVF entry.  This may be
6162          * redundant but it guarantees PF will maintain visibility to
6163          * the VLAN.
6164          */
6165         if (add && test_bit(vid, adapter->active_vlans)) {
6166                 err = igb_vfta_set(hw, vid, pf_id, true, false);
6167                 if (err)
6168                         return err;
6169         }
6170
6171         err = igb_vfta_set(hw, vid, vf, add, false);
6172
6173         if (add && !err)
6174                 return err;
6175
6176         /* If we failed to add the VF VLAN or we are removing the VF VLAN
6177          * we may need to drop the PF pool bit in order to allow us to free
6178          * up the VLVF resources.
6179          */
6180         if (test_bit(vid, adapter->active_vlans) ||
6181             (adapter->flags & IGB_FLAG_VLAN_PROMISC))
6182                 igb_update_pf_vlvf(adapter, vid);
6183
6184         return err;
6185 }
6186
6187 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6188 {
6189         struct e1000_hw *hw = &adapter->hw;
6190
6191         if (vid)
6192                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6193         else
6194                 wr32(E1000_VMVIR(vf), 0);
6195 }
6196
6197 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
6198                                 u16 vlan, u8 qos)
6199 {
6200         int err;
6201
6202         err = igb_set_vf_vlan(adapter, vlan, true, vf);
6203         if (err)
6204                 return err;
6205
6206         igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6207         igb_set_vmolr(adapter, vf, !vlan);
6208
6209         /* revoke access to previous VLAN */
6210         if (vlan != adapter->vf_data[vf].pf_vlan)
6211                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6212                                 false, vf);
6213
6214         adapter->vf_data[vf].pf_vlan = vlan;
6215         adapter->vf_data[vf].pf_qos = qos;
6216         igb_set_vf_vlan_strip(adapter, vf, true);
6217         dev_info(&adapter->pdev->dev,
6218                  "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6219         if (test_bit(__IGB_DOWN, &adapter->state)) {
6220                 dev_warn(&adapter->pdev->dev,
6221                          "The VF VLAN has been set, but the PF device is not up.\n");
6222                 dev_warn(&adapter->pdev->dev,
6223                          "Bring the PF device up before attempting to use the VF device.\n");
6224         }
6225
6226         return err;
6227 }
6228
6229 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
6230 {
6231         /* Restore tagless access via VLAN 0 */
6232         igb_set_vf_vlan(adapter, 0, true, vf);
6233
6234         igb_set_vmvir(adapter, 0, vf);
6235         igb_set_vmolr(adapter, vf, true);
6236
6237         /* Remove any PF assigned VLAN */
6238         if (adapter->vf_data[vf].pf_vlan)
6239                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6240                                 false, vf);
6241
6242         adapter->vf_data[vf].pf_vlan = 0;
6243         adapter->vf_data[vf].pf_qos = 0;
6244         igb_set_vf_vlan_strip(adapter, vf, false);
6245
6246         return 0;
6247 }
6248
6249 static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
6250                                u16 vlan, u8 qos, __be16 vlan_proto)
6251 {
6252         struct igb_adapter *adapter = netdev_priv(netdev);
6253
6254         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
6255                 return -EINVAL;
6256
6257         if (vlan_proto != htons(ETH_P_8021Q))
6258                 return -EPROTONOSUPPORT;
6259
6260         return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
6261                                igb_disable_port_vlan(adapter, vf);
6262 }
6263
6264 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6265 {
6266         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6267         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6268         int ret;
6269
6270         if (adapter->vf_data[vf].pf_vlan)
6271                 return -1;
6272
6273         /* VLAN 0 is a special case, don't allow it to be removed */
6274         if (!vid && !add)
6275                 return 0;
6276
6277         ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
6278         if (!ret)
6279                 igb_set_vf_vlan_strip(adapter, vf, !!vid);
6280         return ret;
6281 }
6282
6283 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6284 {
6285         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6286
6287         /* clear flags - except flag that indicates PF has set the MAC */
6288         vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
6289         vf_data->last_nack = jiffies;
6290
6291         /* reset vlans for device */
6292         igb_clear_vf_vfta(adapter, vf);
6293         igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
6294         igb_set_vmvir(adapter, vf_data->pf_vlan |
6295                                (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
6296         igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
6297         igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
6298
6299         /* reset multicast table array for vf */
6300         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6301
6302         /* Flush and reset the mta with the new values */
6303         igb_set_rx_mode(adapter->netdev);
6304 }
6305
6306 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6307 {
6308         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6309
6310         /* clear mac address as we were hotplug removed/added */
6311         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6312                 eth_zero_addr(vf_mac);
6313
6314         /* process remaining reset events */
6315         igb_vf_reset(adapter, vf);
6316 }
6317
6318 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6319 {
6320         struct e1000_hw *hw = &adapter->hw;
6321         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6322         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
6323         u32 reg, msgbuf[3];
6324         u8 *addr = (u8 *)(&msgbuf[1]);
6325
6326         /* process all the same items cleared in a function level reset */
6327         igb_vf_reset(adapter, vf);
6328
6329         /* set vf mac address */
6330         igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
6331
6332         /* enable transmit and receive for vf */
6333         reg = rd32(E1000_VFTE);
6334         wr32(E1000_VFTE, reg | BIT(vf));
6335         reg = rd32(E1000_VFRE);
6336         wr32(E1000_VFRE, reg | BIT(vf));
6337
6338         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6339
6340         /* reply to reset with ack and vf mac address */
6341         if (!is_zero_ether_addr(vf_mac)) {
6342                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6343                 memcpy(addr, vf_mac, ETH_ALEN);
6344         } else {
6345                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
6346         }
6347         igb_write_mbx(hw, msgbuf, 3, vf);
6348 }
6349
6350 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6351 {
6352         /* The VF MAC Address is stored in a packed array of bytes
6353          * starting at the second 32 bit word of the msg array
6354          */
6355         unsigned char *addr = (char *)&msg[1];
6356         int err = -1;
6357
6358         if (is_valid_ether_addr(addr))
6359                 err = igb_set_vf_mac(adapter, vf, addr);
6360
6361         return err;
6362 }
6363
6364 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6365 {
6366         struct e1000_hw *hw = &adapter->hw;
6367         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6368         u32 msg = E1000_VT_MSGTYPE_NACK;
6369
6370         /* if device isn't clear to send it shouldn't be reading either */
6371         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6372             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6373                 igb_write_mbx(hw, &msg, 1, vf);
6374                 vf_data->last_nack = jiffies;
6375         }
6376 }
6377
6378 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6379 {
6380         struct pci_dev *pdev = adapter->pdev;
6381         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6382         struct e1000_hw *hw = &adapter->hw;
6383         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6384         s32 retval;
6385
6386         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6387
6388         if (retval) {
6389                 /* if receive failed revoke VF CTS stats and restart init */
6390                 dev_err(&pdev->dev, "Error receiving message from VF\n");
6391                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
6392                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6393                         return;
6394                 goto out;
6395         }
6396
6397         /* this is a message we already processed, do nothing */
6398         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6399                 return;
6400
6401         /* until the vf completes a reset it should not be
6402          * allowed to start any configuration.
6403          */
6404         if (msgbuf[0] == E1000_VF_RESET) {
6405                 igb_vf_reset_msg(adapter, vf);
6406                 return;
6407         }
6408
6409         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6410                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6411                         return;
6412                 retval = -1;
6413                 goto out;
6414         }
6415
6416         switch ((msgbuf[0] & 0xFFFF)) {
6417         case E1000_VF_SET_MAC_ADDR:
6418                 retval = -EINVAL;
6419                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6420                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6421                 else
6422                         dev_warn(&pdev->dev,
6423                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6424                                  vf);
6425                 break;
6426         case E1000_VF_SET_PROMISC:
6427                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6428                 break;
6429         case E1000_VF_SET_MULTICAST:
6430                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6431                 break;
6432         case E1000_VF_SET_LPE:
6433                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6434                 break;
6435         case E1000_VF_SET_VLAN:
6436                 retval = -1;
6437                 if (vf_data->pf_vlan)
6438                         dev_warn(&pdev->dev,
6439                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6440                                  vf);
6441                 else
6442                         retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
6443                 break;
6444         default:
6445                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
6446                 retval = -1;
6447                 break;
6448         }
6449
6450         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6451 out:
6452         /* notify the VF of the results of what it sent us */
6453         if (retval)
6454                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6455         else
6456                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6457
6458         igb_write_mbx(hw, msgbuf, 1, vf);
6459 }
6460
6461 static void igb_msg_task(struct igb_adapter *adapter)
6462 {
6463         struct e1000_hw *hw = &adapter->hw;
6464         u32 vf;
6465
6466         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6467                 /* process any reset requests */
6468                 if (!igb_check_for_rst(hw, vf))
6469                         igb_vf_reset_event(adapter, vf);
6470
6471                 /* process any messages pending */
6472                 if (!igb_check_for_msg(hw, vf))
6473                         igb_rcv_msg_from_vf(adapter, vf);
6474
6475                 /* process any acks */
6476                 if (!igb_check_for_ack(hw, vf))
6477                         igb_rcv_ack_from_vf(adapter, vf);
6478         }
6479 }
6480
6481 /**
6482  *  igb_set_uta - Set unicast filter table address
6483  *  @adapter: board private structure
6484  *  @set: boolean indicating if we are setting or clearing bits
6485  *
6486  *  The unicast table address is a register array of 32-bit registers.
6487  *  The table is meant to be used in a way similar to how the MTA is used
6488  *  however due to certain limitations in the hardware it is necessary to
6489  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6490  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6491  **/
6492 static void igb_set_uta(struct igb_adapter *adapter, bool set)
6493 {
6494         struct e1000_hw *hw = &adapter->hw;
6495         u32 uta = set ? ~0 : 0;
6496         int i;
6497
6498         /* we only need to do this if VMDq is enabled */
6499         if (!adapter->vfs_allocated_count)
6500                 return;
6501
6502         for (i = hw->mac.uta_reg_count; i--;)
6503                 array_wr32(E1000_UTA, i, uta);
6504 }
6505
6506 /**
6507  *  igb_intr_msi - Interrupt Handler
6508  *  @irq: interrupt number
6509  *  @data: pointer to a network interface device structure
6510  **/
6511 static irqreturn_t igb_intr_msi(int irq, void *data)
6512 {
6513         struct igb_adapter *adapter = data;
6514         struct igb_q_vector *q_vector = adapter->q_vector[0];
6515         struct e1000_hw *hw = &adapter->hw;
6516         /* read ICR disables interrupts using IAM */
6517         u32 icr = rd32(E1000_ICR);
6518
6519         igb_write_itr(q_vector);
6520
6521         if (icr & E1000_ICR_DRSTA)
6522                 schedule_work(&adapter->reset_task);
6523
6524         if (icr & E1000_ICR_DOUTSYNC) {
6525                 /* HW is reporting DMA is out of sync */
6526                 adapter->stats.doosync++;
6527         }
6528
6529         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6530                 hw->mac.get_link_status = 1;
6531                 if (!test_bit(__IGB_DOWN, &adapter->state))
6532                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6533         }
6534
6535         if (icr & E1000_ICR_TS)
6536                 igb_tsync_interrupt(adapter);
6537
6538         napi_schedule(&q_vector->napi);
6539
6540         return IRQ_HANDLED;
6541 }
6542
6543 /**
6544  *  igb_intr - Legacy Interrupt Handler
6545  *  @irq: interrupt number
6546  *  @data: pointer to a network interface device structure
6547  **/
6548 static irqreturn_t igb_intr(int irq, void *data)
6549 {
6550         struct igb_adapter *adapter = data;
6551         struct igb_q_vector *q_vector = adapter->q_vector[0];
6552         struct e1000_hw *hw = &adapter->hw;
6553         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6554          * need for the IMC write
6555          */
6556         u32 icr = rd32(E1000_ICR);
6557
6558         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6559          * not set, then the adapter didn't send an interrupt
6560          */
6561         if (!(icr & E1000_ICR_INT_ASSERTED))
6562                 return IRQ_NONE;
6563
6564         igb_write_itr(q_vector);
6565
6566         if (icr & E1000_ICR_DRSTA)
6567                 schedule_work(&adapter->reset_task);
6568
6569         if (icr & E1000_ICR_DOUTSYNC) {
6570                 /* HW is reporting DMA is out of sync */
6571                 adapter->stats.doosync++;
6572         }
6573
6574         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6575                 hw->mac.get_link_status = 1;
6576                 /* guard against interrupt when we're going down */
6577                 if (!test_bit(__IGB_DOWN, &adapter->state))
6578                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6579         }
6580
6581         if (icr & E1000_ICR_TS)
6582                 igb_tsync_interrupt(adapter);
6583
6584         napi_schedule(&q_vector->napi);
6585
6586         return IRQ_HANDLED;
6587 }
6588
6589 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6590 {
6591         struct igb_adapter *adapter = q_vector->adapter;
6592         struct e1000_hw *hw = &adapter->hw;
6593
6594         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6595             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6596                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6597                         igb_set_itr(q_vector);
6598                 else
6599                         igb_update_ring_itr(q_vector);
6600         }
6601
6602         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6603                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
6604                         wr32(E1000_EIMS, q_vector->eims_value);
6605                 else
6606                         igb_irq_enable(adapter);
6607         }
6608 }
6609
6610 /**
6611  *  igb_poll - NAPI Rx polling callback
6612  *  @napi: napi polling structure
6613  *  @budget: count of how many packets we should handle
6614  **/
6615 static int igb_poll(struct napi_struct *napi, int budget)
6616 {
6617         struct igb_q_vector *q_vector = container_of(napi,
6618                                                      struct igb_q_vector,
6619                                                      napi);
6620         bool clean_complete = true;
6621         int work_done = 0;
6622
6623 #ifdef CONFIG_IGB_DCA
6624         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6625                 igb_update_dca(q_vector);
6626 #endif
6627         if (q_vector->tx.ring)
6628                 clean_complete = igb_clean_tx_irq(q_vector, budget);
6629
6630         if (q_vector->rx.ring) {
6631                 int cleaned = igb_clean_rx_irq(q_vector, budget);
6632
6633                 work_done += cleaned;
6634                 if (cleaned >= budget)
6635                         clean_complete = false;
6636         }
6637
6638         /* If all work not completed, return budget and keep polling */
6639         if (!clean_complete)
6640                 return budget;
6641
6642         /* If not enough Rx work done, exit the polling mode */
6643         napi_complete_done(napi, work_done);
6644         igb_ring_irq_enable(q_vector);
6645
6646         return 0;
6647 }
6648
6649 /**
6650  *  igb_clean_tx_irq - Reclaim resources after transmit completes
6651  *  @q_vector: pointer to q_vector containing needed info
6652  *  @napi_budget: Used to determine if we are in netpoll
6653  *
6654  *  returns true if ring is completely cleaned
6655  **/
6656 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
6657 {
6658         struct igb_adapter *adapter = q_vector->adapter;
6659         struct igb_ring *tx_ring = q_vector->tx.ring;
6660         struct igb_tx_buffer *tx_buffer;
6661         union e1000_adv_tx_desc *tx_desc;
6662         unsigned int total_bytes = 0, total_packets = 0;
6663         unsigned int budget = q_vector->tx.work_limit;
6664         unsigned int i = tx_ring->next_to_clean;
6665
6666         if (test_bit(__IGB_DOWN, &adapter->state))
6667                 return true;
6668
6669         tx_buffer = &tx_ring->tx_buffer_info[i];
6670         tx_desc = IGB_TX_DESC(tx_ring, i);
6671         i -= tx_ring->count;
6672
6673         do {
6674                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6675
6676                 /* if next_to_watch is not set then there is no work pending */
6677                 if (!eop_desc)
6678                         break;
6679
6680                 /* prevent any other reads prior to eop_desc */
6681                 smp_rmb();
6682
6683                 /* if DD is not set pending work has not been completed */
6684                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6685                         break;
6686
6687                 /* clear next_to_watch to prevent false hangs */
6688                 tx_buffer->next_to_watch = NULL;
6689
6690                 /* update the statistics for this packet */
6691                 total_bytes += tx_buffer->bytecount;
6692                 total_packets += tx_buffer->gso_segs;
6693
6694                 /* free the skb */
6695                 napi_consume_skb(tx_buffer->skb, napi_budget);
6696
6697                 /* unmap skb header data */
6698                 dma_unmap_single(tx_ring->dev,
6699                                  dma_unmap_addr(tx_buffer, dma),
6700                                  dma_unmap_len(tx_buffer, len),
6701                                  DMA_TO_DEVICE);
6702
6703                 /* clear tx_buffer data */
6704                 tx_buffer->skb = NULL;
6705                 dma_unmap_len_set(tx_buffer, len, 0);
6706
6707                 /* clear last DMA location and unmap remaining buffers */
6708                 while (tx_desc != eop_desc) {
6709                         tx_buffer++;
6710                         tx_desc++;
6711                         i++;
6712                         if (unlikely(!i)) {
6713                                 i -= tx_ring->count;
6714                                 tx_buffer = tx_ring->tx_buffer_info;
6715                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6716                         }
6717
6718                         /* unmap any remaining paged data */
6719                         if (dma_unmap_len(tx_buffer, len)) {
6720                                 dma_unmap_page(tx_ring->dev,
6721                                                dma_unmap_addr(tx_buffer, dma),
6722                                                dma_unmap_len(tx_buffer, len),
6723                                                DMA_TO_DEVICE);
6724                                 dma_unmap_len_set(tx_buffer, len, 0);
6725                         }
6726                 }
6727
6728                 /* move us one more past the eop_desc for start of next pkt */
6729                 tx_buffer++;
6730                 tx_desc++;
6731                 i++;
6732                 if (unlikely(!i)) {
6733                         i -= tx_ring->count;
6734                         tx_buffer = tx_ring->tx_buffer_info;
6735                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6736                 }
6737
6738                 /* issue prefetch for next Tx descriptor */
6739                 prefetch(tx_desc);
6740
6741                 /* update budget accounting */
6742                 budget--;
6743         } while (likely(budget));
6744
6745         netdev_tx_completed_queue(txring_txq(tx_ring),
6746                                   total_packets, total_bytes);
6747         i += tx_ring->count;
6748         tx_ring->next_to_clean = i;
6749         u64_stats_update_begin(&tx_ring->tx_syncp);
6750         tx_ring->tx_stats.bytes += total_bytes;
6751         tx_ring->tx_stats.packets += total_packets;
6752         u64_stats_update_end(&tx_ring->tx_syncp);
6753         q_vector->tx.total_bytes += total_bytes;
6754         q_vector->tx.total_packets += total_packets;
6755
6756         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6757                 struct e1000_hw *hw = &adapter->hw;
6758
6759                 /* Detect a transmit hang in hardware, this serializes the
6760                  * check with the clearing of time_stamp and movement of i
6761                  */
6762                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6763                 if (tx_buffer->next_to_watch &&
6764                     time_after(jiffies, tx_buffer->time_stamp +
6765                                (adapter->tx_timeout_factor * HZ)) &&
6766                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6767
6768                         /* detected Tx unit hang */
6769                         dev_err(tx_ring->dev,
6770                                 "Detected Tx Unit Hang\n"
6771                                 "  Tx Queue             <%d>\n"
6772                                 "  TDH                  <%x>\n"
6773                                 "  TDT                  <%x>\n"
6774                                 "  next_to_use          <%x>\n"
6775                                 "  next_to_clean        <%x>\n"
6776                                 "buffer_info[next_to_clean]\n"
6777                                 "  time_stamp           <%lx>\n"
6778                                 "  next_to_watch        <%p>\n"
6779                                 "  jiffies              <%lx>\n"
6780                                 "  desc.status          <%x>\n",
6781                                 tx_ring->queue_index,
6782                                 rd32(E1000_TDH(tx_ring->reg_idx)),
6783                                 readl(tx_ring->tail),
6784                                 tx_ring->next_to_use,
6785                                 tx_ring->next_to_clean,
6786                                 tx_buffer->time_stamp,
6787                                 tx_buffer->next_to_watch,
6788                                 jiffies,
6789                                 tx_buffer->next_to_watch->wb.status);
6790                         netif_stop_subqueue(tx_ring->netdev,
6791                                             tx_ring->queue_index);
6792
6793                         /* we are about to reset, no point in enabling stuff */
6794                         return true;
6795                 }
6796         }
6797
6798 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6799         if (unlikely(total_packets &&
6800             netif_carrier_ok(tx_ring->netdev) &&
6801             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6802                 /* Make sure that anybody stopping the queue after this
6803                  * sees the new next_to_clean.
6804                  */
6805                 smp_mb();
6806                 if (__netif_subqueue_stopped(tx_ring->netdev,
6807                                              tx_ring->queue_index) &&
6808                     !(test_bit(__IGB_DOWN, &adapter->state))) {
6809                         netif_wake_subqueue(tx_ring->netdev,
6810                                             tx_ring->queue_index);
6811
6812                         u64_stats_update_begin(&tx_ring->tx_syncp);
6813                         tx_ring->tx_stats.restart_queue++;
6814                         u64_stats_update_end(&tx_ring->tx_syncp);
6815                 }
6816         }
6817
6818         return !!budget;
6819 }
6820
6821 /**
6822  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
6823  *  @rx_ring: rx descriptor ring to store buffers on
6824  *  @old_buff: donor buffer to have page reused
6825  *
6826  *  Synchronizes page for reuse by the adapter
6827  **/
6828 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6829                               struct igb_rx_buffer *old_buff)
6830 {
6831         struct igb_rx_buffer *new_buff;
6832         u16 nta = rx_ring->next_to_alloc;
6833
6834         new_buff = &rx_ring->rx_buffer_info[nta];
6835
6836         /* update, and store next to alloc */
6837         nta++;
6838         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6839
6840         /* transfer page from old buffer to new buffer */
6841         *new_buff = *old_buff;
6842
6843         /* sync the buffer for use by the device */
6844         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6845                                          old_buff->page_offset,
6846                                          IGB_RX_BUFSZ,
6847                                          DMA_FROM_DEVICE);
6848 }
6849
6850 static inline bool igb_page_is_reserved(struct page *page)
6851 {
6852         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
6853 }
6854
6855 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6856                                   struct page *page,
6857                                   unsigned int truesize)
6858 {
6859         /* avoid re-using remote pages */
6860         if (unlikely(igb_page_is_reserved(page)))
6861                 return false;
6862
6863 #if (PAGE_SIZE < 8192)
6864         /* if we are only owner of page we can reuse it */
6865         if (unlikely(page_count(page) != 1))
6866                 return false;
6867
6868         /* flip page offset to other buffer */
6869         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6870 #else
6871         /* move offset up to the next cache line */
6872         rx_buffer->page_offset += truesize;
6873
6874         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6875                 return false;
6876 #endif
6877
6878         /* Even if we own the page, we are not allowed to use atomic_set()
6879          * This would break get_page_unless_zero() users.
6880          */
6881         page_ref_inc(page);
6882
6883         return true;
6884 }
6885
6886 /**
6887  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6888  *  @rx_ring: rx descriptor ring to transact packets on
6889  *  @rx_buffer: buffer containing page to add
6890  *  @rx_desc: descriptor containing length of buffer written by hardware
6891  *  @skb: sk_buff to place the data into
6892  *
6893  *  This function will add the data contained in rx_buffer->page to the skb.
6894  *  This is done either through a direct copy if the data in the buffer is
6895  *  less than the skb header size, otherwise it will just attach the page as
6896  *  a frag to the skb.
6897  *
6898  *  The function will then update the page offset if necessary and return
6899  *  true if the buffer can be reused by the adapter.
6900  **/
6901 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6902                             struct igb_rx_buffer *rx_buffer,
6903                             unsigned int size,
6904                             union e1000_adv_rx_desc *rx_desc,
6905                             struct sk_buff *skb)
6906 {
6907         struct page *page = rx_buffer->page;
6908         unsigned char *va = page_address(page) + rx_buffer->page_offset;
6909 #if (PAGE_SIZE < 8192)
6910         unsigned int truesize = IGB_RX_BUFSZ;
6911 #else
6912         unsigned int truesize = SKB_DATA_ALIGN(size);
6913 #endif
6914         unsigned int pull_len;
6915
6916         if (unlikely(skb_is_nonlinear(skb)))
6917                 goto add_tail_frag;
6918
6919         if (unlikely(igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))) {
6920                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6921                 va += IGB_TS_HDR_LEN;
6922                 size -= IGB_TS_HDR_LEN;
6923         }
6924
6925         if (likely(size <= IGB_RX_HDR_LEN)) {
6926                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6927
6928                 /* page is not reserved, we can reuse buffer as-is */
6929                 if (likely(!igb_page_is_reserved(page)))
6930                         return true;
6931
6932                 /* this page cannot be reused so discard it */
6933                 __free_page(page);
6934                 return false;
6935         }
6936
6937         /* we need the header to contain the greater of either ETH_HLEN or
6938          * 60 bytes if the skb->len is less than 60 for skb_pad.
6939          */
6940         pull_len = eth_get_headlen(va, IGB_RX_HDR_LEN);
6941
6942         /* align pull length to size of long to optimize memcpy performance */
6943         memcpy(__skb_put(skb, pull_len), va, ALIGN(pull_len, sizeof(long)));
6944
6945         /* update all of the pointers */
6946         va += pull_len;
6947         size -= pull_len;
6948
6949 add_tail_frag:
6950         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6951                         (unsigned long)va & ~PAGE_MASK, size, truesize);
6952
6953         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6954 }
6955
6956 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6957                                            union e1000_adv_rx_desc *rx_desc,
6958                                            struct sk_buff *skb)
6959 {
6960         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6961         struct igb_rx_buffer *rx_buffer;
6962         struct page *page;
6963
6964         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6965         page = rx_buffer->page;
6966         prefetchw(page);
6967
6968         if (likely(!skb)) {
6969                 void *page_addr = page_address(page) +
6970                                   rx_buffer->page_offset;
6971
6972                 /* prefetch first cache line of first page */
6973                 prefetch(page_addr);
6974 #if L1_CACHE_BYTES < 128
6975                 prefetch(page_addr + L1_CACHE_BYTES);
6976 #endif
6977
6978                 /* allocate a skb to store the frags */
6979                 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
6980                 if (unlikely(!skb)) {
6981                         rx_ring->rx_stats.alloc_failed++;
6982                         return NULL;
6983                 }
6984
6985                 /* we will be copying header into skb->data in
6986                  * pskb_may_pull so it is in our interest to prefetch
6987                  * it now to avoid a possible cache miss
6988                  */
6989                 prefetchw(skb->data);
6990         }
6991
6992         /* we are reusing so sync this buffer for CPU use */
6993         dma_sync_single_range_for_cpu(rx_ring->dev,
6994                                       rx_buffer->dma,
6995                                       rx_buffer->page_offset,
6996                                       size,
6997                                       DMA_FROM_DEVICE);
6998
6999         /* pull page into skb */
7000         if (igb_add_rx_frag(rx_ring, rx_buffer, size, rx_desc, skb)) {
7001                 /* hand second half of page back to the ring */
7002                 igb_reuse_rx_page(rx_ring, rx_buffer);
7003         } else {
7004                 /* we are not reusing the buffer so unmap it */
7005                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7006                                PAGE_SIZE, DMA_FROM_DEVICE);
7007         }
7008
7009         /* clear contents of rx_buffer */
7010         rx_buffer->page = NULL;
7011
7012         return skb;
7013 }
7014
7015 static inline void igb_rx_checksum(struct igb_ring *ring,
7016                                    union e1000_adv_rx_desc *rx_desc,
7017                                    struct sk_buff *skb)
7018 {
7019         skb_checksum_none_assert(skb);
7020
7021         /* Ignore Checksum bit is set */
7022         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7023                 return;
7024
7025         /* Rx checksum disabled via ethtool */
7026         if (!(ring->netdev->features & NETIF_F_RXCSUM))
7027                 return;
7028
7029         /* TCP/UDP checksum error bit is set */
7030         if (igb_test_staterr(rx_desc,
7031                              E1000_RXDEXT_STATERR_TCPE |
7032                              E1000_RXDEXT_STATERR_IPE)) {
7033                 /* work around errata with sctp packets where the TCPE aka
7034                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7035                  * packets, (aka let the stack check the crc32c)
7036                  */
7037                 if (!((skb->len == 60) &&
7038                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
7039                         u64_stats_update_begin(&ring->rx_syncp);
7040                         ring->rx_stats.csum_err++;
7041                         u64_stats_update_end(&ring->rx_syncp);
7042                 }
7043                 /* let the stack verify checksum errors */
7044                 return;
7045         }
7046         /* It must be a TCP or UDP packet with a valid checksum */
7047         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7048                                       E1000_RXD_STAT_UDPCS))
7049                 skb->ip_summed = CHECKSUM_UNNECESSARY;
7050
7051         dev_dbg(ring->dev, "cksum success: bits %08X\n",
7052                 le32_to_cpu(rx_desc->wb.upper.status_error));
7053 }
7054
7055 static inline void igb_rx_hash(struct igb_ring *ring,
7056                                union e1000_adv_rx_desc *rx_desc,
7057                                struct sk_buff *skb)
7058 {
7059         if (ring->netdev->features & NETIF_F_RXHASH)
7060                 skb_set_hash(skb,
7061                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7062                              PKT_HASH_TYPE_L3);
7063 }
7064
7065 /**
7066  *  igb_is_non_eop - process handling of non-EOP buffers
7067  *  @rx_ring: Rx ring being processed
7068  *  @rx_desc: Rx descriptor for current buffer
7069  *  @skb: current socket buffer containing buffer in progress
7070  *
7071  *  This function updates next to clean.  If the buffer is an EOP buffer
7072  *  this function exits returning false, otherwise it will place the
7073  *  sk_buff in the next buffer to be chained and return true indicating
7074  *  that this is in fact a non-EOP buffer.
7075  **/
7076 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7077                            union e1000_adv_rx_desc *rx_desc)
7078 {
7079         u32 ntc = rx_ring->next_to_clean + 1;
7080
7081         /* fetch, update, and store next to clean */
7082         ntc = (ntc < rx_ring->count) ? ntc : 0;
7083         rx_ring->next_to_clean = ntc;
7084
7085         prefetch(IGB_RX_DESC(rx_ring, ntc));
7086
7087         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7088                 return false;
7089
7090         return true;
7091 }
7092
7093 /**
7094  *  igb_cleanup_headers - Correct corrupted or empty headers
7095  *  @rx_ring: rx descriptor ring packet is being transacted on
7096  *  @rx_desc: pointer to the EOP Rx descriptor
7097  *  @skb: pointer to current skb being fixed
7098  *
7099  *  Address the case where we are pulling data in on pages only
7100  *  and as such no data is present in the skb header.
7101  *
7102  *  In addition if skb is not at least 60 bytes we need to pad it so that
7103  *  it is large enough to qualify as a valid Ethernet frame.
7104  *
7105  *  Returns true if an error was encountered and skb was freed.
7106  **/
7107 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
7108                                 union e1000_adv_rx_desc *rx_desc,
7109                                 struct sk_buff *skb)
7110 {
7111         if (unlikely((igb_test_staterr(rx_desc,
7112                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
7113                 struct net_device *netdev = rx_ring->netdev;
7114                 if (!(netdev->features & NETIF_F_RXALL)) {
7115                         dev_kfree_skb_any(skb);
7116                         return true;
7117                 }
7118         }
7119
7120         /* if eth_skb_pad returns an error the skb was freed */
7121         if (eth_skb_pad(skb))
7122                 return true;
7123
7124         return false;
7125 }
7126
7127 /**
7128  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
7129  *  @rx_ring: rx descriptor ring packet is being transacted on
7130  *  @rx_desc: pointer to the EOP Rx descriptor
7131  *  @skb: pointer to current skb being populated
7132  *
7133  *  This function checks the ring, descriptor, and packet information in
7134  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
7135  *  other fields within the skb.
7136  **/
7137 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7138                                    union e1000_adv_rx_desc *rx_desc,
7139                                    struct sk_buff *skb)
7140 {
7141         struct net_device *dev = rx_ring->netdev;
7142
7143         igb_rx_hash(rx_ring, rx_desc, skb);
7144
7145         igb_rx_checksum(rx_ring, rx_desc, skb);
7146
7147         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
7148             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
7149                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
7150
7151         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7152             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7153                 u16 vid;
7154
7155                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7156                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7157                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7158                 else
7159                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7160
7161                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7162         }
7163
7164         skb_record_rx_queue(skb, rx_ring->queue_index);
7165
7166         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
7167 }
7168
7169 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
7170 {
7171         struct igb_ring *rx_ring = q_vector->rx.ring;
7172         struct sk_buff *skb = rx_ring->skb;
7173         unsigned int total_bytes = 0, total_packets = 0;
7174         u16 cleaned_count = igb_desc_unused(rx_ring);
7175
7176         while (likely(total_packets < budget)) {
7177                 union e1000_adv_rx_desc *rx_desc;
7178
7179                 /* return some buffers to hardware, one at a time is too slow */
7180                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7181                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
7182                         cleaned_count = 0;
7183                 }
7184
7185                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
7186
7187                 if (!rx_desc->wb.upper.status_error)
7188                         break;
7189
7190                 /* This memory barrier is needed to keep us from reading
7191                  * any other fields out of the rx_desc until we know the
7192                  * descriptor has been written back
7193                  */
7194                 dma_rmb();
7195
7196                 /* retrieve a buffer from the ring */
7197                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
7198
7199                 /* exit if we failed to retrieve a buffer */
7200                 if (!skb)
7201                         break;
7202
7203                 cleaned_count++;
7204
7205                 /* fetch next buffer in frame if non-eop */
7206                 if (igb_is_non_eop(rx_ring, rx_desc))
7207                         continue;
7208
7209                 /* verify the packet layout is correct */
7210                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
7211                         skb = NULL;
7212                         continue;
7213                 }
7214
7215                 /* probably a little skewed due to removing CRC */
7216                 total_bytes += skb->len;
7217
7218                 /* populate checksum, timestamp, VLAN, and protocol */
7219                 igb_process_skb_fields(rx_ring, rx_desc, skb);
7220
7221                 napi_gro_receive(&q_vector->napi, skb);
7222
7223                 /* reset skb pointer */
7224                 skb = NULL;
7225
7226                 /* update budget accounting */
7227                 total_packets++;
7228         }
7229
7230         /* place incomplete frames back on ring for completion */
7231         rx_ring->skb = skb;
7232
7233         u64_stats_update_begin(&rx_ring->rx_syncp);
7234         rx_ring->rx_stats.packets += total_packets;
7235         rx_ring->rx_stats.bytes += total_bytes;
7236         u64_stats_update_end(&rx_ring->rx_syncp);
7237         q_vector->rx.total_packets += total_packets;
7238         q_vector->rx.total_bytes += total_bytes;
7239
7240         if (cleaned_count)
7241                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
7242
7243         return total_packets;
7244 }
7245
7246 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
7247                                   struct igb_rx_buffer *bi)
7248 {
7249         struct page *page = bi->page;
7250         dma_addr_t dma;
7251
7252         /* since we are recycling buffers we should seldom need to alloc */
7253         if (likely(page))
7254                 return true;
7255
7256         /* alloc new page for storage */
7257         page = dev_alloc_page();
7258         if (unlikely(!page)) {
7259                 rx_ring->rx_stats.alloc_failed++;
7260                 return false;
7261         }
7262
7263         /* map page for use */
7264         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
7265
7266         /* if mapping failed free memory back to system since
7267          * there isn't much point in holding memory we can't use
7268          */
7269         if (dma_mapping_error(rx_ring->dev, dma)) {
7270                 __free_page(page);
7271
7272                 rx_ring->rx_stats.alloc_failed++;
7273                 return false;
7274         }
7275
7276         bi->dma = dma;
7277         bi->page = page;
7278         bi->page_offset = 0;
7279
7280         return true;
7281 }
7282
7283 /**
7284  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
7285  *  @adapter: address of board private structure
7286  **/
7287 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
7288 {
7289         union e1000_adv_rx_desc *rx_desc;
7290         struct igb_rx_buffer *bi;
7291         u16 i = rx_ring->next_to_use;
7292
7293         /* nothing to do */
7294         if (!cleaned_count)
7295                 return;
7296
7297         rx_desc = IGB_RX_DESC(rx_ring, i);
7298         bi = &rx_ring->rx_buffer_info[i];
7299         i -= rx_ring->count;
7300
7301         do {
7302                 if (!igb_alloc_mapped_page(rx_ring, bi))
7303                         break;
7304
7305                 /* Refresh the desc even if buffer_addrs didn't change
7306                  * because each write-back erases this info.
7307                  */
7308                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
7309
7310                 rx_desc++;
7311                 bi++;
7312                 i++;
7313                 if (unlikely(!i)) {
7314                         rx_desc = IGB_RX_DESC(rx_ring, 0);
7315                         bi = rx_ring->rx_buffer_info;
7316                         i -= rx_ring->count;
7317                 }
7318
7319                 /* clear the status bits for the next_to_use descriptor */
7320                 rx_desc->wb.upper.status_error = 0;
7321
7322                 cleaned_count--;
7323         } while (cleaned_count);
7324
7325         i += rx_ring->count;
7326
7327         if (rx_ring->next_to_use != i) {
7328                 /* record the next descriptor to use */
7329                 rx_ring->next_to_use = i;
7330
7331                 /* update next to alloc since we have filled the ring */
7332                 rx_ring->next_to_alloc = i;
7333
7334                 /* Force memory writes to complete before letting h/w
7335                  * know there are new descriptors to fetch.  (Only
7336                  * applicable for weak-ordered memory model archs,
7337                  * such as IA-64).
7338                  */
7339                 wmb();
7340                 writel(i, rx_ring->tail);
7341         }
7342 }
7343
7344 /**
7345  * igb_mii_ioctl -
7346  * @netdev:
7347  * @ifreq:
7348  * @cmd:
7349  **/
7350 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7351 {
7352         struct igb_adapter *adapter = netdev_priv(netdev);
7353         struct mii_ioctl_data *data = if_mii(ifr);
7354
7355         if (adapter->hw.phy.media_type != e1000_media_type_copper)
7356                 return -EOPNOTSUPP;
7357
7358         switch (cmd) {
7359         case SIOCGMIIPHY:
7360                 data->phy_id = adapter->hw.phy.addr;
7361                 break;
7362         case SIOCGMIIREG:
7363                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
7364                                      &data->val_out))
7365                         return -EIO;
7366                 break;
7367         case SIOCSMIIREG:
7368         default:
7369                 return -EOPNOTSUPP;
7370         }
7371         return 0;
7372 }
7373
7374 /**
7375  * igb_ioctl -
7376  * @netdev:
7377  * @ifreq:
7378  * @cmd:
7379  **/
7380 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7381 {
7382         switch (cmd) {
7383         case SIOCGMIIPHY:
7384         case SIOCGMIIREG:
7385         case SIOCSMIIREG:
7386                 return igb_mii_ioctl(netdev, ifr, cmd);
7387         case SIOCGHWTSTAMP:
7388                 return igb_ptp_get_ts_config(netdev, ifr);
7389         case SIOCSHWTSTAMP:
7390                 return igb_ptp_set_ts_config(netdev, ifr);
7391         default:
7392                 return -EOPNOTSUPP;
7393         }
7394 }
7395
7396 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7397 {
7398         struct igb_adapter *adapter = hw->back;
7399
7400         pci_read_config_word(adapter->pdev, reg, value);
7401 }
7402
7403 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7404 {
7405         struct igb_adapter *adapter = hw->back;
7406
7407         pci_write_config_word(adapter->pdev, reg, *value);
7408 }
7409
7410 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7411 {
7412         struct igb_adapter *adapter = hw->back;
7413
7414         if (pcie_capability_read_word(adapter->pdev, reg, value))
7415                 return -E1000_ERR_CONFIG;
7416
7417         return 0;
7418 }
7419
7420 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7421 {
7422         struct igb_adapter *adapter = hw->back;
7423
7424         if (pcie_capability_write_word(adapter->pdev, reg, *value))
7425                 return -E1000_ERR_CONFIG;
7426
7427         return 0;
7428 }
7429
7430 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
7431 {
7432         struct igb_adapter *adapter = netdev_priv(netdev);
7433         struct e1000_hw *hw = &adapter->hw;
7434         u32 ctrl, rctl;
7435         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
7436
7437         if (enable) {
7438                 /* enable VLAN tag insert/strip */
7439                 ctrl = rd32(E1000_CTRL);
7440                 ctrl |= E1000_CTRL_VME;
7441                 wr32(E1000_CTRL, ctrl);
7442
7443                 /* Disable CFI check */
7444                 rctl = rd32(E1000_RCTL);
7445                 rctl &= ~E1000_RCTL_CFIEN;
7446                 wr32(E1000_RCTL, rctl);
7447         } else {
7448                 /* disable VLAN tag insert/strip */
7449                 ctrl = rd32(E1000_CTRL);
7450                 ctrl &= ~E1000_CTRL_VME;
7451                 wr32(E1000_CTRL, ctrl);
7452         }
7453
7454         igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
7455 }
7456
7457 static int igb_vlan_rx_add_vid(struct net_device *netdev,
7458                                __be16 proto, u16 vid)
7459 {
7460         struct igb_adapter *adapter = netdev_priv(netdev);
7461         struct e1000_hw *hw = &adapter->hw;
7462         int pf_id = adapter->vfs_allocated_count;
7463
7464         /* add the filter since PF can receive vlans w/o entry in vlvf */
7465         if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
7466                 igb_vfta_set(hw, vid, pf_id, true, !!vid);
7467
7468         set_bit(vid, adapter->active_vlans);
7469
7470         return 0;
7471 }
7472
7473 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
7474                                 __be16 proto, u16 vid)
7475 {
7476         struct igb_adapter *adapter = netdev_priv(netdev);
7477         int pf_id = adapter->vfs_allocated_count;
7478         struct e1000_hw *hw = &adapter->hw;
7479
7480         /* remove VID from filter table */
7481         if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
7482                 igb_vfta_set(hw, vid, pf_id, false, true);
7483
7484         clear_bit(vid, adapter->active_vlans);
7485
7486         return 0;
7487 }
7488
7489 static void igb_restore_vlan(struct igb_adapter *adapter)
7490 {
7491         u16 vid = 1;
7492
7493         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7494         igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
7495
7496         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
7497                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
7498 }
7499
7500 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7501 {
7502         struct pci_dev *pdev = adapter->pdev;
7503         struct e1000_mac_info *mac = &adapter->hw.mac;
7504
7505         mac->autoneg = 0;
7506
7507         /* Make sure dplx is at most 1 bit and lsb of speed is not set
7508          * for the switch() below to work
7509          */
7510         if ((spd & 1) || (dplx & ~1))
7511                 goto err_inval;
7512
7513         /* Fiber NIC's only allow 1000 gbps Full duplex
7514          * and 100Mbps Full duplex for 100baseFx sfp
7515          */
7516         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7517                 switch (spd + dplx) {
7518                 case SPEED_10 + DUPLEX_HALF:
7519                 case SPEED_10 + DUPLEX_FULL:
7520                 case SPEED_100 + DUPLEX_HALF:
7521                         goto err_inval;
7522                 default:
7523                         break;
7524                 }
7525         }
7526
7527         switch (spd + dplx) {
7528         case SPEED_10 + DUPLEX_HALF:
7529                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7530                 break;
7531         case SPEED_10 + DUPLEX_FULL:
7532                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7533                 break;
7534         case SPEED_100 + DUPLEX_HALF:
7535                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7536                 break;
7537         case SPEED_100 + DUPLEX_FULL:
7538                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7539                 break;
7540         case SPEED_1000 + DUPLEX_FULL:
7541                 mac->autoneg = 1;
7542                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7543                 break;
7544         case SPEED_1000 + DUPLEX_HALF: /* not supported */
7545         default:
7546                 goto err_inval;
7547         }
7548
7549         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7550         adapter->hw.phy.mdix = AUTO_ALL_MODES;
7551
7552         return 0;
7553
7554 err_inval:
7555         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7556         return -EINVAL;
7557 }
7558
7559 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7560                           bool runtime)
7561 {
7562         struct net_device *netdev = pci_get_drvdata(pdev);
7563         struct igb_adapter *adapter = netdev_priv(netdev);
7564         struct e1000_hw *hw = &adapter->hw;
7565         u32 ctrl, rctl, status;
7566         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7567         bool wake;
7568
7569         rtnl_lock();
7570         netif_device_detach(netdev);
7571
7572         if (netif_running(netdev))
7573                 __igb_close(netdev, true);
7574
7575         igb_ptp_suspend(adapter);
7576
7577         igb_clear_interrupt_scheme(adapter);
7578         rtnl_unlock();
7579
7580         status = rd32(E1000_STATUS);
7581         if (status & E1000_STATUS_LU)
7582                 wufc &= ~E1000_WUFC_LNKC;
7583
7584         if (wufc) {
7585                 igb_setup_rctl(adapter);
7586                 igb_set_rx_mode(netdev);
7587
7588                 /* turn on all-multi mode if wake on multicast is enabled */
7589                 if (wufc & E1000_WUFC_MC) {
7590                         rctl = rd32(E1000_RCTL);
7591                         rctl |= E1000_RCTL_MPE;
7592                         wr32(E1000_RCTL, rctl);
7593                 }
7594
7595                 ctrl = rd32(E1000_CTRL);
7596                 ctrl |= E1000_CTRL_ADVD3WUC;
7597                 wr32(E1000_CTRL, ctrl);
7598
7599                 /* Allow time for pending master requests to run */
7600                 igb_disable_pcie_master(hw);
7601
7602                 wr32(E1000_WUC, E1000_WUC_PME_EN);
7603                 wr32(E1000_WUFC, wufc);
7604         } else {
7605                 wr32(E1000_WUC, 0);
7606                 wr32(E1000_WUFC, 0);
7607         }
7608
7609         wake = wufc || adapter->en_mng_pt;
7610         if (!wake)
7611                 igb_power_down_link(adapter);
7612         else
7613                 igb_power_up_link(adapter);
7614
7615         if (enable_wake)
7616                 *enable_wake = wake;
7617
7618         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7619          * would have already happened in close and is redundant.
7620          */
7621         igb_release_hw_control(adapter);
7622
7623         pci_disable_device(pdev);
7624
7625         return 0;
7626 }
7627
7628 #ifdef CONFIG_PM
7629 #ifdef CONFIG_PM_SLEEP
7630 static int igb_suspend(struct device *dev)
7631 {
7632         return __igb_shutdown(to_pci_dev(dev), NULL, 0);
7633 }
7634 #endif /* CONFIG_PM_SLEEP */
7635
7636 static int igb_resume(struct device *dev)
7637 {
7638         struct pci_dev *pdev = to_pci_dev(dev);
7639         struct net_device *netdev = pci_get_drvdata(pdev);
7640         struct igb_adapter *adapter = netdev_priv(netdev);
7641         struct e1000_hw *hw = &adapter->hw;
7642         u32 err;
7643
7644         pci_set_power_state(pdev, PCI_D0);
7645         pci_restore_state(pdev);
7646         pci_save_state(pdev);
7647
7648         if (!pci_device_is_present(pdev))
7649                 return -ENODEV;
7650         err = pci_enable_device_mem(pdev);
7651         if (err) {
7652                 dev_err(&pdev->dev,
7653                         "igb: Cannot enable PCI device from suspend\n");
7654                 return err;
7655         }
7656         pci_set_master(pdev);
7657
7658         pci_enable_wake(pdev, PCI_D3hot, 0);
7659         pci_enable_wake(pdev, PCI_D3cold, 0);
7660
7661         if (igb_init_interrupt_scheme(adapter, true)) {
7662                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7663                 return -ENOMEM;
7664         }
7665
7666         igb_reset(adapter);
7667
7668         /* let the f/w know that the h/w is now under the control of the
7669          * driver.
7670          */
7671         igb_get_hw_control(adapter);
7672
7673         wr32(E1000_WUS, ~0);
7674
7675         rtnl_lock();
7676         if (!err && netif_running(netdev))
7677                 err = __igb_open(netdev, true);
7678
7679         if (!err)
7680                 netif_device_attach(netdev);
7681         rtnl_unlock();
7682
7683         return err;
7684 }
7685
7686 static int igb_runtime_idle(struct device *dev)
7687 {
7688         struct pci_dev *pdev = to_pci_dev(dev);
7689         struct net_device *netdev = pci_get_drvdata(pdev);
7690         struct igb_adapter *adapter = netdev_priv(netdev);
7691
7692         if (!igb_has_link(adapter))
7693                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7694
7695         return -EBUSY;
7696 }
7697
7698 static int igb_runtime_suspend(struct device *dev)
7699 {
7700         return __igb_shutdown(to_pci_dev(dev), NULL, 1);
7701 }
7702
7703 static int igb_runtime_resume(struct device *dev)
7704 {
7705         return igb_resume(dev);
7706 }
7707 #endif /* CONFIG_PM */
7708
7709 static void igb_shutdown(struct pci_dev *pdev)
7710 {
7711         bool wake;
7712
7713         __igb_shutdown(pdev, &wake, 0);
7714
7715         if (system_state == SYSTEM_POWER_OFF) {
7716                 pci_wake_from_d3(pdev, wake);
7717                 pci_set_power_state(pdev, PCI_D3hot);
7718         }
7719 }
7720
7721 #ifdef CONFIG_PCI_IOV
7722 static int igb_sriov_reinit(struct pci_dev *dev)
7723 {
7724         struct net_device *netdev = pci_get_drvdata(dev);
7725         struct igb_adapter *adapter = netdev_priv(netdev);
7726         struct pci_dev *pdev = adapter->pdev;
7727
7728         rtnl_lock();
7729
7730         if (netif_running(netdev))
7731                 igb_close(netdev);
7732         else
7733                 igb_reset(adapter);
7734
7735         igb_clear_interrupt_scheme(adapter);
7736
7737         igb_init_queue_configuration(adapter);
7738
7739         if (igb_init_interrupt_scheme(adapter, true)) {
7740                 rtnl_unlock();
7741                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7742                 return -ENOMEM;
7743         }
7744
7745         if (netif_running(netdev))
7746                 igb_open(netdev);
7747
7748         rtnl_unlock();
7749
7750         return 0;
7751 }
7752
7753 static int igb_pci_disable_sriov(struct pci_dev *dev)
7754 {
7755         int err = igb_disable_sriov(dev);
7756
7757         if (!err)
7758                 err = igb_sriov_reinit(dev);
7759
7760         return err;
7761 }
7762
7763 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7764 {
7765         int err = igb_enable_sriov(dev, num_vfs);
7766
7767         if (err)
7768                 goto out;
7769
7770         err = igb_sriov_reinit(dev);
7771         if (!err)
7772                 return num_vfs;
7773
7774 out:
7775         return err;
7776 }
7777
7778 #endif
7779 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7780 {
7781 #ifdef CONFIG_PCI_IOV
7782         if (num_vfs == 0)
7783                 return igb_pci_disable_sriov(dev);
7784         else
7785                 return igb_pci_enable_sriov(dev, num_vfs);
7786 #endif
7787         return 0;
7788 }
7789
7790 #ifdef CONFIG_NET_POLL_CONTROLLER
7791 /* Polling 'interrupt' - used by things like netconsole to send skbs
7792  * without having to re-enable interrupts. It's not called while
7793  * the interrupt routine is executing.
7794  */
7795 static void igb_netpoll(struct net_device *netdev)
7796 {
7797         struct igb_adapter *adapter = netdev_priv(netdev);
7798         struct e1000_hw *hw = &adapter->hw;
7799         struct igb_q_vector *q_vector;
7800         int i;
7801
7802         for (i = 0; i < adapter->num_q_vectors; i++) {
7803                 q_vector = adapter->q_vector[i];
7804                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7805                         wr32(E1000_EIMC, q_vector->eims_value);
7806                 else
7807                         igb_irq_disable(adapter);
7808                 napi_schedule(&q_vector->napi);
7809         }
7810 }
7811 #endif /* CONFIG_NET_POLL_CONTROLLER */
7812
7813 /**
7814  *  igb_io_error_detected - called when PCI error is detected
7815  *  @pdev: Pointer to PCI device
7816  *  @state: The current pci connection state
7817  *
7818  *  This function is called after a PCI bus error affecting
7819  *  this device has been detected.
7820  **/
7821 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7822                                               pci_channel_state_t state)
7823 {
7824         struct net_device *netdev = pci_get_drvdata(pdev);
7825         struct igb_adapter *adapter = netdev_priv(netdev);
7826
7827         netif_device_detach(netdev);
7828
7829         if (state == pci_channel_io_perm_failure)
7830                 return PCI_ERS_RESULT_DISCONNECT;
7831
7832         if (netif_running(netdev))
7833                 igb_down(adapter);
7834         pci_disable_device(pdev);
7835
7836         /* Request a slot slot reset. */
7837         return PCI_ERS_RESULT_NEED_RESET;
7838 }
7839
7840 /**
7841  *  igb_io_slot_reset - called after the pci bus has been reset.
7842  *  @pdev: Pointer to PCI device
7843  *
7844  *  Restart the card from scratch, as if from a cold-boot. Implementation
7845  *  resembles the first-half of the igb_resume routine.
7846  **/
7847 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7848 {
7849         struct net_device *netdev = pci_get_drvdata(pdev);
7850         struct igb_adapter *adapter = netdev_priv(netdev);
7851         struct e1000_hw *hw = &adapter->hw;
7852         pci_ers_result_t result;
7853         int err;
7854
7855         if (pci_enable_device_mem(pdev)) {
7856                 dev_err(&pdev->dev,
7857                         "Cannot re-enable PCI device after reset.\n");
7858                 result = PCI_ERS_RESULT_DISCONNECT;
7859         } else {
7860                 pci_set_master(pdev);
7861                 pci_restore_state(pdev);
7862                 pci_save_state(pdev);
7863
7864                 pci_enable_wake(pdev, PCI_D3hot, 0);
7865                 pci_enable_wake(pdev, PCI_D3cold, 0);
7866
7867                 /* In case of PCI error, adapter lose its HW address
7868                  * so we should re-assign it here.
7869                  */
7870                 hw->hw_addr = adapter->io_addr;
7871
7872                 igb_reset(adapter);
7873                 wr32(E1000_WUS, ~0);
7874                 result = PCI_ERS_RESULT_RECOVERED;
7875         }
7876
7877         err = pci_cleanup_aer_uncorrect_error_status(pdev);
7878         if (err) {
7879                 dev_err(&pdev->dev,
7880                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7881                         err);
7882                 /* non-fatal, continue */
7883         }
7884
7885         return result;
7886 }
7887
7888 /**
7889  *  igb_io_resume - called when traffic can start flowing again.
7890  *  @pdev: Pointer to PCI device
7891  *
7892  *  This callback is called when the error recovery driver tells us that
7893  *  its OK to resume normal operation. Implementation resembles the
7894  *  second-half of the igb_resume routine.
7895  */
7896 static void igb_io_resume(struct pci_dev *pdev)
7897 {
7898         struct net_device *netdev = pci_get_drvdata(pdev);
7899         struct igb_adapter *adapter = netdev_priv(netdev);
7900
7901         if (netif_running(netdev)) {
7902                 if (igb_up(adapter)) {
7903                         dev_err(&pdev->dev, "igb_up failed after reset\n");
7904                         return;
7905                 }
7906         }
7907
7908         netif_device_attach(netdev);
7909
7910         /* let the f/w know that the h/w is now under the control of the
7911          * driver.
7912          */
7913         igb_get_hw_control(adapter);
7914 }
7915
7916 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7917                              u8 qsel)
7918 {
7919         struct e1000_hw *hw = &adapter->hw;
7920         u32 rar_low, rar_high;
7921
7922         /* HW expects these to be in network order when they are plugged
7923          * into the registers which are little endian.  In order to guarantee
7924          * that ordering we need to do an leXX_to_cpup here in order to be
7925          * ready for the byteswap that occurs with writel
7926          */
7927         rar_low = le32_to_cpup((__le32 *)(addr));
7928         rar_high = le16_to_cpup((__le16 *)(addr + 4));
7929
7930         /* Indicate to hardware the Address is Valid. */
7931         rar_high |= E1000_RAH_AV;
7932
7933         if (hw->mac.type == e1000_82575)
7934                 rar_high |= E1000_RAH_POOL_1 * qsel;
7935         else
7936                 rar_high |= E1000_RAH_POOL_1 << qsel;
7937
7938         wr32(E1000_RAL(index), rar_low);
7939         wrfl();
7940         wr32(E1000_RAH(index), rar_high);
7941         wrfl();
7942 }
7943
7944 static int igb_set_vf_mac(struct igb_adapter *adapter,
7945                           int vf, unsigned char *mac_addr)
7946 {
7947         struct e1000_hw *hw = &adapter->hw;
7948         /* VF MAC addresses start at end of receive addresses and moves
7949          * towards the first, as a result a collision should not be possible
7950          */
7951         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7952
7953         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7954
7955         igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7956
7957         return 0;
7958 }
7959
7960 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7961 {
7962         struct igb_adapter *adapter = netdev_priv(netdev);
7963         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7964                 return -EINVAL;
7965         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7966         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7967         dev_info(&adapter->pdev->dev,
7968                  "Reload the VF driver to make this change effective.");
7969         if (test_bit(__IGB_DOWN, &adapter->state)) {
7970                 dev_warn(&adapter->pdev->dev,
7971                          "The VF MAC address has been set, but the PF device is not up.\n");
7972                 dev_warn(&adapter->pdev->dev,
7973                          "Bring the PF device up before attempting to use the VF device.\n");
7974         }
7975         return igb_set_vf_mac(adapter, vf, mac);
7976 }
7977
7978 static int igb_link_mbps(int internal_link_speed)
7979 {
7980         switch (internal_link_speed) {
7981         case SPEED_100:
7982                 return 100;
7983         case SPEED_1000:
7984                 return 1000;
7985         default:
7986                 return 0;
7987         }
7988 }
7989
7990 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7991                                   int link_speed)
7992 {
7993         int rf_dec, rf_int;
7994         u32 bcnrc_val;
7995
7996         if (tx_rate != 0) {
7997                 /* Calculate the rate factor values to set */
7998                 rf_int = link_speed / tx_rate;
7999                 rf_dec = (link_speed - (rf_int * tx_rate));
8000                 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
8001                          tx_rate;
8002
8003                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
8004                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
8005                               E1000_RTTBCNRC_RF_INT_MASK);
8006                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
8007         } else {
8008                 bcnrc_val = 0;
8009         }
8010
8011         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
8012         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
8013          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
8014          */
8015         wr32(E1000_RTTBCNRM, 0x14);
8016         wr32(E1000_RTTBCNRC, bcnrc_val);
8017 }
8018
8019 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
8020 {
8021         int actual_link_speed, i;
8022         bool reset_rate = false;
8023
8024         /* VF TX rate limit was not set or not supported */
8025         if ((adapter->vf_rate_link_speed == 0) ||
8026             (adapter->hw.mac.type != e1000_82576))
8027                 return;
8028
8029         actual_link_speed = igb_link_mbps(adapter->link_speed);
8030         if (actual_link_speed != adapter->vf_rate_link_speed) {
8031                 reset_rate = true;
8032                 adapter->vf_rate_link_speed = 0;
8033                 dev_info(&adapter->pdev->dev,
8034                          "Link speed has been changed. VF Transmit rate is disabled\n");
8035         }
8036
8037         for (i = 0; i < adapter->vfs_allocated_count; i++) {
8038                 if (reset_rate)
8039                         adapter->vf_data[i].tx_rate = 0;
8040
8041                 igb_set_vf_rate_limit(&adapter->hw, i,
8042                                       adapter->vf_data[i].tx_rate,
8043                                       actual_link_speed);
8044         }
8045 }
8046
8047 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
8048                              int min_tx_rate, int max_tx_rate)
8049 {
8050         struct igb_adapter *adapter = netdev_priv(netdev);
8051         struct e1000_hw *hw = &adapter->hw;
8052         int actual_link_speed;
8053
8054         if (hw->mac.type != e1000_82576)
8055                 return -EOPNOTSUPP;
8056
8057         if (min_tx_rate)
8058                 return -EINVAL;
8059
8060         actual_link_speed = igb_link_mbps(adapter->link_speed);
8061         if ((vf >= adapter->vfs_allocated_count) ||
8062             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
8063             (max_tx_rate < 0) ||
8064             (max_tx_rate > actual_link_speed))
8065                 return -EINVAL;
8066
8067         adapter->vf_rate_link_speed = actual_link_speed;
8068         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
8069         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
8070
8071         return 0;
8072 }
8073
8074 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
8075                                    bool setting)
8076 {
8077         struct igb_adapter *adapter = netdev_priv(netdev);
8078         struct e1000_hw *hw = &adapter->hw;
8079         u32 reg_val, reg_offset;
8080
8081         if (!adapter->vfs_allocated_count)
8082                 return -EOPNOTSUPP;
8083
8084         if (vf >= adapter->vfs_allocated_count)
8085                 return -EINVAL;
8086
8087         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
8088         reg_val = rd32(reg_offset);
8089         if (setting)
8090                 reg_val |= (BIT(vf) |
8091                             BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
8092         else
8093                 reg_val &= ~(BIT(vf) |
8094                              BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
8095         wr32(reg_offset, reg_val);
8096
8097         adapter->vf_data[vf].spoofchk_enabled = setting;
8098         return 0;
8099 }
8100
8101 static int igb_ndo_get_vf_config(struct net_device *netdev,
8102                                  int vf, struct ifla_vf_info *ivi)
8103 {
8104         struct igb_adapter *adapter = netdev_priv(netdev);
8105         if (vf >= adapter->vfs_allocated_count)
8106                 return -EINVAL;
8107         ivi->vf = vf;
8108         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
8109         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
8110         ivi->min_tx_rate = 0;
8111         ivi->vlan = adapter->vf_data[vf].pf_vlan;
8112         ivi->qos = adapter->vf_data[vf].pf_qos;
8113         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
8114         return 0;
8115 }
8116
8117 static void igb_vmm_control(struct igb_adapter *adapter)
8118 {
8119         struct e1000_hw *hw = &adapter->hw;
8120         u32 reg;
8121
8122         switch (hw->mac.type) {
8123         case e1000_82575:
8124         case e1000_i210:
8125         case e1000_i211:
8126         case e1000_i354:
8127         default:
8128                 /* replication is not supported for 82575 */
8129                 return;
8130         case e1000_82576:
8131                 /* notify HW that the MAC is adding vlan tags */
8132                 reg = rd32(E1000_DTXCTL);
8133                 reg |= E1000_DTXCTL_VLAN_ADDED;
8134                 wr32(E1000_DTXCTL, reg);
8135                 /* Fall through */
8136         case e1000_82580:
8137                 /* enable replication vlan tag stripping */
8138                 reg = rd32(E1000_RPLOLR);
8139                 reg |= E1000_RPLOLR_STRVLAN;
8140                 wr32(E1000_RPLOLR, reg);
8141                 /* Fall through */
8142         case e1000_i350:
8143                 /* none of the above registers are supported by i350 */
8144                 break;
8145         }
8146
8147         if (adapter->vfs_allocated_count) {
8148                 igb_vmdq_set_loopback_pf(hw, true);
8149                 igb_vmdq_set_replication_pf(hw, true);
8150                 igb_vmdq_set_anti_spoofing_pf(hw, true,
8151                                               adapter->vfs_allocated_count);
8152         } else {
8153                 igb_vmdq_set_loopback_pf(hw, false);
8154                 igb_vmdq_set_replication_pf(hw, false);
8155         }
8156 }
8157
8158 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
8159 {
8160         struct e1000_hw *hw = &adapter->hw;
8161         u32 dmac_thr;
8162         u16 hwm;
8163
8164         if (hw->mac.type > e1000_82580) {
8165                 if (adapter->flags & IGB_FLAG_DMAC) {
8166                         u32 reg;
8167
8168                         /* force threshold to 0. */
8169                         wr32(E1000_DMCTXTH, 0);
8170
8171                         /* DMA Coalescing high water mark needs to be greater
8172                          * than the Rx threshold. Set hwm to PBA - max frame
8173                          * size in 16B units, capping it at PBA - 6KB.
8174                          */
8175                         hwm = 64 * (pba - 6);
8176                         reg = rd32(E1000_FCRTC);
8177                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
8178                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
8179                                 & E1000_FCRTC_RTH_COAL_MASK);
8180                         wr32(E1000_FCRTC, reg);
8181
8182                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
8183                          * frame size, capping it at PBA - 10KB.
8184                          */
8185                         dmac_thr = pba - 10;
8186                         reg = rd32(E1000_DMACR);
8187                         reg &= ~E1000_DMACR_DMACTHR_MASK;
8188                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
8189                                 & E1000_DMACR_DMACTHR_MASK);
8190
8191                         /* transition to L0x or L1 if available..*/
8192                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
8193
8194                         /* watchdog timer= +-1000 usec in 32usec intervals */
8195                         reg |= (1000 >> 5);
8196
8197                         /* Disable BMC-to-OS Watchdog Enable */
8198                         if (hw->mac.type != e1000_i354)
8199                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
8200
8201                         wr32(E1000_DMACR, reg);
8202
8203                         /* no lower threshold to disable
8204                          * coalescing(smart fifb)-UTRESH=0
8205                          */
8206                         wr32(E1000_DMCRTRH, 0);
8207
8208                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
8209
8210                         wr32(E1000_DMCTLX, reg);
8211
8212                         /* free space in tx packet buffer to wake from
8213                          * DMA coal
8214                          */
8215                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
8216                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
8217
8218                         /* make low power state decision controlled
8219                          * by DMA coal
8220                          */
8221                         reg = rd32(E1000_PCIEMISC);
8222                         reg &= ~E1000_PCIEMISC_LX_DECISION;
8223                         wr32(E1000_PCIEMISC, reg);
8224                 } /* endif adapter->dmac is not disabled */
8225         } else if (hw->mac.type == e1000_82580) {
8226                 u32 reg = rd32(E1000_PCIEMISC);
8227
8228                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
8229                 wr32(E1000_DMACR, 0);
8230         }
8231 }
8232
8233 /**
8234  *  igb_read_i2c_byte - Reads 8 bit word over I2C
8235  *  @hw: pointer to hardware structure
8236  *  @byte_offset: byte offset to read
8237  *  @dev_addr: device address
8238  *  @data: value read
8239  *
8240  *  Performs byte read operation over I2C interface at
8241  *  a specified device address.
8242  **/
8243 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8244                       u8 dev_addr, u8 *data)
8245 {
8246         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8247         struct i2c_client *this_client = adapter->i2c_client;
8248         s32 status;
8249         u16 swfw_mask = 0;
8250
8251         if (!this_client)
8252                 return E1000_ERR_I2C;
8253
8254         swfw_mask = E1000_SWFW_PHY0_SM;
8255
8256         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8257                 return E1000_ERR_SWFW_SYNC;
8258
8259         status = i2c_smbus_read_byte_data(this_client, byte_offset);
8260         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8261
8262         if (status < 0)
8263                 return E1000_ERR_I2C;
8264         else {
8265                 *data = status;
8266                 return 0;
8267         }
8268 }
8269
8270 /**
8271  *  igb_write_i2c_byte - Writes 8 bit word over I2C
8272  *  @hw: pointer to hardware structure
8273  *  @byte_offset: byte offset to write
8274  *  @dev_addr: device address
8275  *  @data: value to write
8276  *
8277  *  Performs byte write operation over I2C interface at
8278  *  a specified device address.
8279  **/
8280 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8281                        u8 dev_addr, u8 data)
8282 {
8283         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8284         struct i2c_client *this_client = adapter->i2c_client;
8285         s32 status;
8286         u16 swfw_mask = E1000_SWFW_PHY0_SM;
8287
8288         if (!this_client)
8289                 return E1000_ERR_I2C;
8290
8291         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8292                 return E1000_ERR_SWFW_SYNC;
8293         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
8294         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8295
8296         if (status)
8297                 return E1000_ERR_I2C;
8298         else
8299                 return 0;
8300
8301 }
8302
8303 int igb_reinit_queues(struct igb_adapter *adapter)
8304 {
8305         struct net_device *netdev = adapter->netdev;
8306         struct pci_dev *pdev = adapter->pdev;
8307         int err = 0;
8308
8309         if (netif_running(netdev))
8310                 igb_close(netdev);
8311
8312         igb_reset_interrupt_capability(adapter);
8313
8314         if (igb_init_interrupt_scheme(adapter, true)) {
8315                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8316                 return -ENOMEM;
8317         }
8318
8319         if (netif_running(netdev))
8320                 err = igb_open(netdev);
8321
8322         return err;
8323 }
8324
8325 static void igb_nfc_filter_exit(struct igb_adapter *adapter)
8326 {
8327         struct igb_nfc_filter *rule;
8328
8329         spin_lock(&adapter->nfc_lock);
8330
8331         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
8332                 igb_erase_filter(adapter, rule);
8333
8334         spin_unlock(&adapter->nfc_lock);
8335 }
8336
8337 static void igb_nfc_filter_restore(struct igb_adapter *adapter)
8338 {
8339         struct igb_nfc_filter *rule;
8340
8341         spin_lock(&adapter->nfc_lock);
8342
8343         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
8344                 igb_add_filter(adapter, rule);
8345
8346         spin_unlock(&adapter->nfc_lock);
8347 }
8348 /* igb_main.c */