drivers/net/ethernet/intel/igb/igb_main.c

   1 /* Intel(R) Gigabit Ethernet Linux driver
   2  * Copyright(c) 2007-2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program; if not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * The full GNU General Public License is included in this distribution in
  17  * the file called "COPYING".
  18  *
  19  * Contact Information:
  20  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  21  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  22  */
  23
  24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  25
  26 #include <linux/module.h>
  27 #include <linux/types.h>
  28 #include <linux/init.h>
  29 #include <linux/bitops.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/pagemap.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/ipv6.h>
  34 #include <linux/slab.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/net_tstamp.h>
  38 #include <linux/mii.h>
  39 #include <linux/ethtool.h>
  40 #include <linux/if.h>
  41 #include <linux/if_vlan.h>
  42 #include <linux/pci.h>
  43 #include <linux/pci-aspm.h>
  44 #include <linux/delay.h>
  45 #include <linux/interrupt.h>
  46 #include <linux/ip.h>
  47 #include <linux/tcp.h>
  48 #include <linux/sctp.h>
  49 #include <linux/if_ether.h>
  50 #include <linux/aer.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/pm_runtime.h>
  53 #include <linux/etherdevice.h>
  54 #ifdef CONFIG_IGB_DCA
  55 #include <linux/dca.h>
  56 #endif
  57 #include <linux/i2c.h>
  58 #include "igb.h"
  59
  60 #define MAJ 5
  61 #define MIN 4
  62 #define BUILD 0
  63 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  64 __stringify(BUILD) "-k"
  65 char igb_driver_name[] = "igb";
  66 char igb_driver_version[] = DRV_VERSION;
  67 static const char igb_driver_string[] =
  68                                 "Intel(R) Gigabit Ethernet Network Driver";
  69 static const char igb_copyright[] =
  70                                 "Copyright (c) 2007-2014 Intel Corporation.";
  71
  72 static const struct e1000_info *igb_info_tbl[] = {
  73         [board_82575] = &e1000_82575_info,
  74 };
  75
  76 static const struct pci_device_id igb_pci_tbl[] = {
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 112         /* required last entry */
 113         {0, }
 114 };
 115
 116 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 117
 118 static int igb_setup_all_tx_resources(struct igb_adapter *);
 119 static int igb_setup_all_rx_resources(struct igb_adapter *);
 120 static void igb_free_all_tx_resources(struct igb_adapter *);
 121 static void igb_free_all_rx_resources(struct igb_adapter *);
 122 static void igb_setup_mrqc(struct igb_adapter *);
 123 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 124 static void igb_remove(struct pci_dev *pdev);
 125 static int igb_sw_init(struct igb_adapter *);
 126 int igb_open(struct net_device *);
 127 int igb_close(struct net_device *);
 128 static void igb_configure(struct igb_adapter *);
 129 static void igb_configure_tx(struct igb_adapter *);
 130 static void igb_configure_rx(struct igb_adapter *);
 131 static void igb_clean_all_tx_rings(struct igb_adapter *);
 132 static void igb_clean_all_rx_rings(struct igb_adapter *);
 133 static void igb_clean_tx_ring(struct igb_ring *);
 134 static void igb_clean_rx_ring(struct igb_ring *);
 135 static void igb_set_rx_mode(struct net_device *);
 136 static void igb_update_phy_info(unsigned long);
 137 static void igb_watchdog(unsigned long);
 138 static void igb_watchdog_task(struct work_struct *);
 139 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 140 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
 141                                           struct rtnl_link_stats64 *stats);
 142 static int igb_change_mtu(struct net_device *, int);
 143 static int igb_set_mac(struct net_device *, void *);
 144 static void igb_set_uta(struct igb_adapter *adapter, bool set);
 145 static irqreturn_t igb_intr(int irq, void *);
 146 static irqreturn_t igb_intr_msi(int irq, void *);
 147 static irqreturn_t igb_msix_other(int irq, void *);
 148 static irqreturn_t igb_msix_ring(int irq, void *);
 149 #ifdef CONFIG_IGB_DCA
 150 static void igb_update_dca(struct igb_q_vector *);
 151 static void igb_setup_dca(struct igb_adapter *);
 152 #endif /* CONFIG_IGB_DCA */
 153 static int igb_poll(struct napi_struct *, int);
 154 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
 155 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 156 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 157 static void igb_tx_timeout(struct net_device *);
 158 static void igb_reset_task(struct work_struct *);
 159 static void igb_vlan_mode(struct net_device *netdev,
 160                           netdev_features_t features);
 161 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 162 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 163 static void igb_restore_vlan(struct igb_adapter *);
 164 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 165 static void igb_ping_all_vfs(struct igb_adapter *);
 166 static void igb_msg_task(struct igb_adapter *);
 167 static void igb_vmm_control(struct igb_adapter *);
 168 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 169 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 170 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 171 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 172                                int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 173 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 174 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 175                                    bool setting);
 176 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 177                                  struct ifla_vf_info *ivi);
 178 static void igb_check_vf_rate_limit(struct igb_adapter *);
 179 static void igb_nfc_filter_exit(struct igb_adapter *adapter);
 180 static void igb_nfc_filter_restore(struct igb_adapter *adapter);
 181
 182 #ifdef CONFIG_PCI_IOV
 183 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 184 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 185 static int igb_disable_sriov(struct pci_dev *dev);
 186 static int igb_pci_disable_sriov(struct pci_dev *dev);
 187 #endif
 188
 189 #ifdef CONFIG_PM
 190 #ifdef CONFIG_PM_SLEEP
 191 static int igb_suspend(struct device *);
 192 #endif
 193 static int igb_resume(struct device *);
 194 static int igb_runtime_suspend(struct device *dev);
 195 static int igb_runtime_resume(struct device *dev);
 196 static int igb_runtime_idle(struct device *dev);
 197 static const struct dev_pm_ops igb_pm_ops = {
 198         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 199         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 200                         igb_runtime_idle)
 201 };
 202 #endif
 203 static void igb_shutdown(struct pci_dev *);
 204 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 205 #ifdef CONFIG_IGB_DCA
 206 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 207 static struct notifier_block dca_notifier = {
 208         .notifier_call  = igb_notify_dca,
 209         .next           = NULL,
 210         .priority       = 0
 211 };
 212 #endif
 213 #ifdef CONFIG_NET_POLL_CONTROLLER
 214 /* for netdump / net console */
 215 static void igb_netpoll(struct net_device *);
 216 #endif
 217 #ifdef CONFIG_PCI_IOV
 218 static unsigned int max_vfs;
 219 module_param(max_vfs, uint, 0);
 220 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 221 #endif /* CONFIG_PCI_IOV */
 222
 223 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 224                      pci_channel_state_t);
 225 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 226 static void igb_io_resume(struct pci_dev *);
 227
 228 static const struct pci_error_handlers igb_err_handler = {
 229         .error_detected = igb_io_error_detected,
 230         .slot_reset = igb_io_slot_reset,
 231         .resume = igb_io_resume,
 232 };
 233
 234 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 235
 236 static struct pci_driver igb_driver = {
 237         .name     = igb_driver_name,
 238         .id_table = igb_pci_tbl,
 239         .probe    = igb_probe,
 240         .remove   = igb_remove,
 241 #ifdef CONFIG_PM
 242         .driver.pm = &igb_pm_ops,
 243 #endif
 244         .shutdown = igb_shutdown,
 245         .sriov_configure = igb_pci_sriov_configure,
 246         .err_handler = &igb_err_handler
 247 };
 248
 249 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 250 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 251 MODULE_LICENSE("GPL");
 252 MODULE_VERSION(DRV_VERSION);
 253
 254 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 255 static int debug = -1;
 256 module_param(debug, int, 0);
 257 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 258
 259 struct igb_reg_info {
 260         u32 ofs;
 261         char *name;
 262 };
 263
 264 static const struct igb_reg_info igb_reg_info_tbl[] = {
 265
 266         /* General Registers */
 267         {E1000_CTRL, "CTRL"},
 268         {E1000_STATUS, "STATUS"},
 269         {E1000_CTRL_EXT, "CTRL_EXT"},
 270
 271         /* Interrupt Registers */
 272         {E1000_ICR, "ICR"},
 273
 274         /* RX Registers */
 275         {E1000_RCTL, "RCTL"},
 276         {E1000_RDLEN(0), "RDLEN"},
 277         {E1000_RDH(0), "RDH"},
 278         {E1000_RDT(0), "RDT"},
 279         {E1000_RXDCTL(0), "RXDCTL"},
 280         {E1000_RDBAL(0), "RDBAL"},
 281         {E1000_RDBAH(0), "RDBAH"},
 282
 283         /* TX Registers */
 284         {E1000_TCTL, "TCTL"},
 285         {E1000_TDBAL(0), "TDBAL"},
 286         {E1000_TDBAH(0), "TDBAH"},
 287         {E1000_TDLEN(0), "TDLEN"},
 288         {E1000_TDH(0), "TDH"},
 289         {E1000_TDT(0), "TDT"},
 290         {E1000_TXDCTL(0), "TXDCTL"},
 291         {E1000_TDFH, "TDFH"},
 292         {E1000_TDFT, "TDFT"},
 293         {E1000_TDFHS, "TDFHS"},
 294         {E1000_TDFPC, "TDFPC"},
 295
 296         /* List Terminator */
 297         {}
 298 };
 299
 300 /* igb_regdump - register printout routine */
 301 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 302 {
 303         int n = 0;
 304         char rname[16];
 305         u32 regs[8];
 306
 307         switch (reginfo->ofs) {
 308         case E1000_RDLEN(0):
 309                 for (n = 0; n < 4; n++)
 310                         regs[n] = rd32(E1000_RDLEN(n));
 311                 break;
 312         case E1000_RDH(0):
 313                 for (n = 0; n < 4; n++)
 314                         regs[n] = rd32(E1000_RDH(n));
 315                 break;
 316         case E1000_RDT(0):
 317                 for (n = 0; n < 4; n++)
 318                         regs[n] = rd32(E1000_RDT(n));
 319                 break;
 320         case E1000_RXDCTL(0):
 321                 for (n = 0; n < 4; n++)
 322                         regs[n] = rd32(E1000_RXDCTL(n));
 323                 break;
 324         case E1000_RDBAL(0):
 325                 for (n = 0; n < 4; n++)
 326                         regs[n] = rd32(E1000_RDBAL(n));
 327                 break;
 328         case E1000_RDBAH(0):
 329                 for (n = 0; n < 4; n++)
 330                         regs[n] = rd32(E1000_RDBAH(n));
 331                 break;
 332         case E1000_TDBAL(0):
 333                 for (n = 0; n < 4; n++)
 334                         regs[n] = rd32(E1000_RDBAL(n));
 335                 break;
 336         case E1000_TDBAH(0):
 337                 for (n = 0; n < 4; n++)
 338                         regs[n] = rd32(E1000_TDBAH(n));
 339                 break;
 340         case E1000_TDLEN(0):
 341                 for (n = 0; n < 4; n++)
 342                         regs[n] = rd32(E1000_TDLEN(n));
 343                 break;
 344         case E1000_TDH(0):
 345                 for (n = 0; n < 4; n++)
 346                         regs[n] = rd32(E1000_TDH(n));
 347                 break;
 348         case E1000_TDT(0):
 349                 for (n = 0; n < 4; n++)
 350                         regs[n] = rd32(E1000_TDT(n));
 351                 break;
 352         case E1000_TXDCTL(0):
 353                 for (n = 0; n < 4; n++)
 354                         regs[n] = rd32(E1000_TXDCTL(n));
 355                 break;
 356         default:
 357                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 358                 return;
 359         }
 360
 361         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 362         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 363                 regs[2], regs[3]);
 364 }
 365
 366 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 367 static void igb_dump(struct igb_adapter *adapter)
 368 {
 369         struct net_device *netdev = adapter->netdev;
 370         struct e1000_hw *hw = &adapter->hw;
 371         struct igb_reg_info *reginfo;
 372         struct igb_ring *tx_ring;
 373         union e1000_adv_tx_desc *tx_desc;
 374         struct my_u0 { u64 a; u64 b; } *u0;
 375         struct igb_ring *rx_ring;
 376         union e1000_adv_rx_desc *rx_desc;
 377         u32 staterr;
 378         u16 i, n;
 379
 380         if (!netif_msg_hw(adapter))
 381                 return;
 382
 383         /* Print netdevice Info */
 384         if (netdev) {
 385                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 386                 pr_info("Device Name     state            trans_start      last_rx\n");
 387                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 388                         netdev->state, dev_trans_start(netdev), netdev->last_rx);
 389         }
 390
 391         /* Print Registers */
 392         dev_info(&adapter->pdev->dev, "Register Dump\n");
 393         pr_info(" Register Name   Value\n");
 394         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 395              reginfo->name; reginfo++) {
 396                 igb_regdump(hw, reginfo);
 397         }
 398
 399         /* Print TX Ring Summary */
 400         if (!netdev || !netif_running(netdev))
 401                 goto exit;
 402
 403         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 404         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 405         for (n = 0; n < adapter->num_tx_queues; n++) {
 406                 struct igb_tx_buffer *buffer_info;
 407                 tx_ring = adapter->tx_ring[n];
 408                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 409                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 410                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 411                         (u64)dma_unmap_addr(buffer_info, dma),
 412                         dma_unmap_len(buffer_info, len),
 413                         buffer_info->next_to_watch,
 414                         (u64)buffer_info->time_stamp);
 415         }
 416
 417         /* Print TX Rings */
 418         if (!netif_msg_tx_done(adapter))
 419                 goto rx_ring_summary;
 420
 421         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 422
 423         /* Transmit Descriptor Formats
 424          *
 425          * Advanced Transmit Descriptor
 426          *   +--------------------------------------------------------------+
 427          * 0 |         Buffer Address [63:0]                                |
 428          *   +--------------------------------------------------------------+
 429          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 430          *   +--------------------------------------------------------------+
 431          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 432          */
 433
 434         for (n = 0; n < adapter->num_tx_queues; n++) {
 435                 tx_ring = adapter->tx_ring[n];
 436                 pr_info("------------------------------------\n");
 437                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 438                 pr_info("------------------------------------\n");
 439                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 440
 441                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 442                         const char *next_desc;
 443                         struct igb_tx_buffer *buffer_info;
 444                         tx_desc = IGB_TX_DESC(tx_ring, i);
 445                         buffer_info = &tx_ring->tx_buffer_info[i];
 446                         u0 = (struct my_u0 *)tx_desc;
 447                         if (i == tx_ring->next_to_use &&
 448                             i == tx_ring->next_to_clean)
 449                                 next_desc = " NTC/U";
 450                         else if (i == tx_ring->next_to_use)
 451                                 next_desc = " NTU";
 452                         else if (i == tx_ring->next_to_clean)
 453                                 next_desc = " NTC";
 454                         else
 455                                 next_desc = "";
 456
 457                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 458                                 i, le64_to_cpu(u0->a),
 459                                 le64_to_cpu(u0->b),
 460                                 (u64)dma_unmap_addr(buffer_info, dma),
 461                                 dma_unmap_len(buffer_info, len),
 462                                 buffer_info->next_to_watch,
 463                                 (u64)buffer_info->time_stamp,
 464                                 buffer_info->skb, next_desc);
 465
 466                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 467                                 print_hex_dump(KERN_INFO, "",
 468                                         DUMP_PREFIX_ADDRESS,
 469                                         16, 1, buffer_info->skb->data,
 470                                         dma_unmap_len(buffer_info, len),
 471                                         true);
 472                 }
 473         }
 474
 475         /* Print RX Rings Summary */
 476 rx_ring_summary:
 477         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 478         pr_info("Queue [NTU] [NTC]\n");
 479         for (n = 0; n < adapter->num_rx_queues; n++) {
 480                 rx_ring = adapter->rx_ring[n];
 481                 pr_info(" %5d %5X %5X\n",
 482                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 483         }
 484
 485         /* Print RX Rings */
 486         if (!netif_msg_rx_status(adapter))
 487                 goto exit;
 488
 489         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 490
 491         /* Advanced Receive Descriptor (Read) Format
 492          *    63                                           1        0
 493          *    +-----------------------------------------------------+
 494          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 495          *    +----------------------------------------------+------+
 496          *  8 |       Header Buffer Address [63:1]           |  DD  |
 497          *    +-----------------------------------------------------+
 498          *
 499          *
 500          * Advanced Receive Descriptor (Write-Back) Format
 501          *
 502          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 503          *   +------------------------------------------------------+
 504          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 505          *   | Checksum   Ident  |   |           |    | Type | Type |
 506          *   +------------------------------------------------------+
 507          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 508          *   +------------------------------------------------------+
 509          *   63       48 47    32 31            20 19               0
 510          */
 511
 512         for (n = 0; n < adapter->num_rx_queues; n++) {
 513                 rx_ring = adapter->rx_ring[n];
 514                 pr_info("------------------------------------\n");
 515                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 516                 pr_info("------------------------------------\n");
 517                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 518                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 519
 520                 for (i = 0; i < rx_ring->count; i++) {
 521                         const char *next_desc;
 522                         struct igb_rx_buffer *buffer_info;
 523                         buffer_info = &rx_ring->rx_buffer_info[i];
 524                         rx_desc = IGB_RX_DESC(rx_ring, i);
 525                         u0 = (struct my_u0 *)rx_desc;
 526                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 527
 528                         if (i == rx_ring->next_to_use)
 529                                 next_desc = " NTU";
 530                         else if (i == rx_ring->next_to_clean)
 531                                 next_desc = " NTC";
 532                         else
 533                                 next_desc = "";
 534
 535                         if (staterr & E1000_RXD_STAT_DD) {
 536                                 /* Descriptor Done */
 537                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 538                                         "RWB", i,
 539                                         le64_to_cpu(u0->a),
 540                                         le64_to_cpu(u0->b),
 541                                         next_desc);
 542                         } else {
 543                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 544                                         "R  ", i,
 545                                         le64_to_cpu(u0->a),
 546                                         le64_to_cpu(u0->b),
 547                                         (u64)buffer_info->dma,
 548                                         next_desc);
 549
 550                                 if (netif_msg_pktdata(adapter) &&
 551                                     buffer_info->dma && buffer_info->page) {
 552                                         print_hex_dump(KERN_INFO, "",
 553                                           DUMP_PREFIX_ADDRESS,
 554                                           16, 1,
 555                                           page_address(buffer_info->page) +
 556                                                       buffer_info->page_offset,
 557                                           IGB_RX_BUFSZ, true);
 558                                 }
 559                         }
 560                 }
 561         }
 562
 563 exit:
 564         return;
 565 }
 566
 567 /**
 568  *  igb_get_i2c_data - Reads the I2C SDA data bit
 569  *  @hw: pointer to hardware structure
 570  *  @i2cctl: Current value of I2CCTL register
 571  *
 572  *  Returns the I2C data bit value
 573  **/
 574 static int igb_get_i2c_data(void *data)
 575 {
 576         struct igb_adapter *adapter = (struct igb_adapter *)data;
 577         struct e1000_hw *hw = &adapter->hw;
 578         s32 i2cctl = rd32(E1000_I2CPARAMS);
 579
 580         return !!(i2cctl & E1000_I2C_DATA_IN);
 581 }
 582
 583 /**
 584  *  igb_set_i2c_data - Sets the I2C data bit
 585  *  @data: pointer to hardware structure
 586  *  @state: I2C data value (0 or 1) to set
 587  *
 588  *  Sets the I2C data bit
 589  **/
 590 static void igb_set_i2c_data(void *data, int state)
 591 {
 592         struct igb_adapter *adapter = (struct igb_adapter *)data;
 593         struct e1000_hw *hw = &adapter->hw;
 594         s32 i2cctl = rd32(E1000_I2CPARAMS);
 595
 596         if (state)
 597                 i2cctl |= E1000_I2C_DATA_OUT;
 598         else
 599                 i2cctl &= ~E1000_I2C_DATA_OUT;
 600
 601         i2cctl &= ~E1000_I2C_DATA_OE_N;
 602         i2cctl |= E1000_I2C_CLK_OE_N;
 603         wr32(E1000_I2CPARAMS, i2cctl);
 604         wrfl();
 605
 606 }
 607
 608 /**
 609  *  igb_set_i2c_clk - Sets the I2C SCL clock
 610  *  @data: pointer to hardware structure
 611  *  @state: state to set clock
 612  *
 613  *  Sets the I2C clock line to state
 614  **/
 615 static void igb_set_i2c_clk(void *data, int state)
 616 {
 617         struct igb_adapter *adapter = (struct igb_adapter *)data;
 618         struct e1000_hw *hw = &adapter->hw;
 619         s32 i2cctl = rd32(E1000_I2CPARAMS);
 620
 621         if (state) {
 622                 i2cctl |= E1000_I2C_CLK_OUT;
 623                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 624         } else {
 625                 i2cctl &= ~E1000_I2C_CLK_OUT;
 626                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 627         }
 628         wr32(E1000_I2CPARAMS, i2cctl);
 629         wrfl();
 630 }
 631
 632 /**
 633  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 634  *  @data: pointer to hardware structure
 635  *
 636  *  Gets the I2C clock state
 637  **/
 638 static int igb_get_i2c_clk(void *data)
 639 {
 640         struct igb_adapter *adapter = (struct igb_adapter *)data;
 641         struct e1000_hw *hw = &adapter->hw;
 642         s32 i2cctl = rd32(E1000_I2CPARAMS);
 643
 644         return !!(i2cctl & E1000_I2C_CLK_IN);
 645 }
 646
 647 static const struct i2c_algo_bit_data igb_i2c_algo = {
 648         .setsda         = igb_set_i2c_data,
 649         .setscl         = igb_set_i2c_clk,
 650         .getsda         = igb_get_i2c_data,
 651         .getscl         = igb_get_i2c_clk,
 652         .udelay         = 5,
 653         .timeout        = 20,
 654 };
 655
 656 /**
 657  *  igb_get_hw_dev - return device
 658  *  @hw: pointer to hardware structure
 659  *
 660  *  used by hardware layer to print debugging information
 661  **/
 662 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 663 {
 664         struct igb_adapter *adapter = hw->back;
 665         return adapter->netdev;
 666 }
 667
 668 /**
 669  *  igb_init_module - Driver Registration Routine
 670  *
 671  *  igb_init_module is the first routine called when the driver is
 672  *  loaded. All it does is register with the PCI subsystem.
 673  **/
 674 static int __init igb_init_module(void)
 675 {
 676         int ret;
 677
 678         pr_info("%s - version %s\n",
 679                igb_driver_string, igb_driver_version);
 680         pr_info("%s\n", igb_copyright);
 681
 682 #ifdef CONFIG_IGB_DCA
 683         dca_register_notify(&dca_notifier);
 684 #endif
 685         ret = pci_register_driver(&igb_driver);
 686         return ret;
 687 }
 688
 689 module_init(igb_init_module);
 690
 691 /**
 692  *  igb_exit_module - Driver Exit Cleanup Routine
 693  *
 694  *  igb_exit_module is called just before the driver is removed
 695  *  from memory.
 696  **/
 697 static void __exit igb_exit_module(void)
 698 {
 699 #ifdef CONFIG_IGB_DCA
 700         dca_unregister_notify(&dca_notifier);
 701 #endif
 702         pci_unregister_driver(&igb_driver);
 703 }
 704
 705 module_exit(igb_exit_module);
 706
 707 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 708 /**
 709  *  igb_cache_ring_register - Descriptor ring to register mapping
 710  *  @adapter: board private structure to initialize
 711  *
 712  *  Once we know the feature-set enabled for the device, we'll cache
 713  *  the register offset the descriptor ring is assigned to.
 714  **/
 715 static void igb_cache_ring_register(struct igb_adapter *adapter)
 716 {
 717         int i = 0, j = 0;
 718         u32 rbase_offset = adapter->vfs_allocated_count;
 719
 720         switch (adapter->hw.mac.type) {
 721         case e1000_82576:
 722                 /* The queues are allocated for virtualization such that VF 0
 723                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 724                  * In order to avoid collision we start at the first free queue
 725                  * and continue consuming queues in the same sequence
 726                  */
 727                 if (adapter->vfs_allocated_count) {
 728                         for (; i < adapter->rss_queues; i++)
 729                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 730                                                                Q_IDX_82576(i);
 731                 }
 732                 /* Fall through */
 733         case e1000_82575:
 734         case e1000_82580:
 735         case e1000_i350:
 736         case e1000_i354:
 737         case e1000_i210:
 738         case e1000_i211:
 739                 /* Fall through */
 740         default:
 741                 for (; i < adapter->num_rx_queues; i++)
 742                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 743                 for (; j < adapter->num_tx_queues; j++)
 744                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 745                 break;
 746         }
 747 }
 748
 749 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 750 {
 751         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 752         u8 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
 753         u32 value = 0;
 754
 755         if (E1000_REMOVED(hw_addr))
 756                 return ~value;
 757
 758         value = readl(&hw_addr[reg]);
 759
 760         /* reads should not return all F's */
 761         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 762                 struct net_device *netdev = igb->netdev;
 763                 hw->hw_addr = NULL;
 764                 netif_device_detach(netdev);
 765                 netdev_err(netdev, "PCIe link lost, device now detached\n");
 766         }
 767
 768         return value;
 769 }
 770
 771 /**
 772  *  igb_write_ivar - configure ivar for given MSI-X vector
 773  *  @hw: pointer to the HW structure
 774  *  @msix_vector: vector number we are allocating to a given ring
 775  *  @index: row index of IVAR register to write within IVAR table
 776  *  @offset: column offset of in IVAR, should be multiple of 8
 777  *
 778  *  This function is intended to handle the writing of the IVAR register
 779  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 780  *  each containing an cause allocation for an Rx and Tx ring, and a
 781  *  variable number of rows depending on the number of queues supported.
 782  **/
 783 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 784                            int index, int offset)
 785 {
 786         u32 ivar = array_rd32(E1000_IVAR0, index);
 787
 788         /* clear any bits that are currently set */
 789         ivar &= ~((u32)0xFF << offset);
 790
 791         /* write vector and valid bit */
 792         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 793
 794         array_wr32(E1000_IVAR0, index, ivar);
 795 }
 796
 797 #define IGB_N0_QUEUE -1
 798 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 799 {
 800         struct igb_adapter *adapter = q_vector->adapter;
 801         struct e1000_hw *hw = &adapter->hw;
 802         int rx_queue = IGB_N0_QUEUE;
 803         int tx_queue = IGB_N0_QUEUE;
 804         u32 msixbm = 0;
 805
 806         if (q_vector->rx.ring)
 807                 rx_queue = q_vector->rx.ring->reg_idx;
 808         if (q_vector->tx.ring)
 809                 tx_queue = q_vector->tx.ring->reg_idx;
 810
 811         switch (hw->mac.type) {
 812         case e1000_82575:
 813                 /* The 82575 assigns vectors using a bitmask, which matches the
 814                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 815                  * or more queues to a vector, we write the appropriate bits
 816                  * into the MSIXBM register for that vector.
 817                  */
 818                 if (rx_queue > IGB_N0_QUEUE)
 819                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 820                 if (tx_queue > IGB_N0_QUEUE)
 821                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 822                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 823                         msixbm |= E1000_EIMS_OTHER;
 824                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 825                 q_vector->eims_value = msixbm;
 826                 break;
 827         case e1000_82576:
 828                 /* 82576 uses a table that essentially consists of 2 columns
 829                  * with 8 rows.  The ordering is column-major so we use the
 830                  * lower 3 bits as the row index, and the 4th bit as the
 831                  * column offset.
 832                  */
 833                 if (rx_queue > IGB_N0_QUEUE)
 834                         igb_write_ivar(hw, msix_vector,
 835                                        rx_queue & 0x7,
 836                                        (rx_queue & 0x8) << 1);
 837                 if (tx_queue > IGB_N0_QUEUE)
 838                         igb_write_ivar(hw, msix_vector,
 839                                        tx_queue & 0x7,
 840                                        ((tx_queue & 0x8) << 1) + 8);
 841                 q_vector->eims_value = BIT(msix_vector);
 842                 break;
 843         case e1000_82580:
 844         case e1000_i350:
 845         case e1000_i354:
 846         case e1000_i210:
 847         case e1000_i211:
 848                 /* On 82580 and newer adapters the scheme is similar to 82576
 849                  * however instead of ordering column-major we have things
 850                  * ordered row-major.  So we traverse the table by using
 851                  * bit 0 as the column offset, and the remaining bits as the
 852                  * row index.
 853                  */
 854                 if (rx_queue > IGB_N0_QUEUE)
 855                         igb_write_ivar(hw, msix_vector,
 856                                        rx_queue >> 1,
 857                                        (rx_queue & 0x1) << 4);
 858                 if (tx_queue > IGB_N0_QUEUE)
 859                         igb_write_ivar(hw, msix_vector,
 860                                        tx_queue >> 1,
 861                                        ((tx_queue & 0x1) << 4) + 8);
 862                 q_vector->eims_value = BIT(msix_vector);
 863                 break;
 864         default:
 865                 BUG();
 866                 break;
 867         }
 868
 869         /* add q_vector eims value to global eims_enable_mask */
 870         adapter->eims_enable_mask |= q_vector->eims_value;
 871
 872         /* configure q_vector to set itr on first interrupt */
 873         q_vector->set_itr = 1;
 874 }
 875
 876 /**
 877  *  igb_configure_msix - Configure MSI-X hardware
 878  *  @adapter: board private structure to initialize
 879  *
 880  *  igb_configure_msix sets up the hardware to properly
 881  *  generate MSI-X interrupts.
 882  **/
 883 static void igb_configure_msix(struct igb_adapter *adapter)
 884 {
 885         u32 tmp;
 886         int i, vector = 0;
 887         struct e1000_hw *hw = &adapter->hw;
 888
 889         adapter->eims_enable_mask = 0;
 890
 891         /* set vector for other causes, i.e. link changes */
 892         switch (hw->mac.type) {
 893         case e1000_82575:
 894                 tmp = rd32(E1000_CTRL_EXT);
 895                 /* enable MSI-X PBA support*/
 896                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 897
 898                 /* Auto-Mask interrupts upon ICR read. */
 899                 tmp |= E1000_CTRL_EXT_EIAME;
 900                 tmp |= E1000_CTRL_EXT_IRCA;
 901
 902                 wr32(E1000_CTRL_EXT, tmp);
 903
 904                 /* enable msix_other interrupt */
 905                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 906                 adapter->eims_other = E1000_EIMS_OTHER;
 907
 908                 break;
 909
 910         case e1000_82576:
 911         case e1000_82580:
 912         case e1000_i350:
 913         case e1000_i354:
 914         case e1000_i210:
 915         case e1000_i211:
 916                 /* Turn on MSI-X capability first, or our settings
 917                  * won't stick.  And it will take days to debug.
 918                  */
 919                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 920                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 921                      E1000_GPIE_NSICR);
 922
 923                 /* enable msix_other interrupt */
 924                 adapter->eims_other = BIT(vector);
 925                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 926
 927                 wr32(E1000_IVAR_MISC, tmp);
 928                 break;
 929         default:
 930                 /* do nothing, since nothing else supports MSI-X */
 931                 break;
 932         } /* switch (hw->mac.type) */
 933
 934         adapter->eims_enable_mask |= adapter->eims_other;
 935
 936         for (i = 0; i < adapter->num_q_vectors; i++)
 937                 igb_assign_vector(adapter->q_vector[i], vector++);
 938
 939         wrfl();
 940 }
 941
 942 /**
 943  *  igb_request_msix - Initialize MSI-X interrupts
 944  *  @adapter: board private structure to initialize
 945  *
 946  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 947  *  kernel.
 948  **/
 949 static int igb_request_msix(struct igb_adapter *adapter)
 950 {
 951         unsigned int num_q_vectors = adapter->num_q_vectors;
 952         struct net_device *netdev = adapter->netdev;
 953         int i, err = 0, vector = 0, free_vector = 0;
 954
 955         err = request_irq(adapter->msix_entries[vector].vector,
 956                           igb_msix_other, 0, netdev->name, adapter);
 957         if (err)
 958                 goto err_out;
 959
 960         if (num_q_vectors > MAX_Q_VECTORS) {
 961                 num_q_vectors = MAX_Q_VECTORS;
 962                 dev_warn(&adapter->pdev->dev,
 963                          "The number of queue vectors (%d) is higher than max allowed (%d)\n",
 964                          adapter->num_q_vectors, MAX_Q_VECTORS);
 965         }
 966         for (i = 0; i < num_q_vectors; i++) {
 967                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 968
 969                 vector++;
 970
 971                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 972
 973                 if (q_vector->rx.ring && q_vector->tx.ring)
 974                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 975                                 q_vector->rx.ring->queue_index);
 976                 else if (q_vector->tx.ring)
 977                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 978                                 q_vector->tx.ring->queue_index);
 979                 else if (q_vector->rx.ring)
 980                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 981                                 q_vector->rx.ring->queue_index);
 982                 else
 983                         sprintf(q_vector->name, "%s-unused", netdev->name);
 984
 985                 err = request_irq(adapter->msix_entries[vector].vector,
 986                                   igb_msix_ring, 0, q_vector->name,
 987                                   q_vector);
 988                 if (err)
 989                         goto err_free;
 990         }
 991
 992         igb_configure_msix(adapter);
 993         return 0;
 994
 995 err_free:
 996         /* free already assigned IRQs */
 997         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 998
 999         vector--;
1000         for (i = 0; i < vector; i++) {
1001                 free_irq(adapter->msix_entries[free_vector++].vector,
1002                          adapter->q_vector[i]);
1003         }
1004 err_out:
1005         return err;
1006 }
1007
1008 /**
1009  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
1010  *  @adapter: board private structure to initialize
1011  *  @v_idx: Index of vector to be freed
1012  *
1013  *  This function frees the memory allocated to the q_vector.
1014  **/
1015 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1016 {
1017         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1018
1019         adapter->q_vector[v_idx] = NULL;
1020
1021         /* igb_get_stats64() might access the rings on this vector,
1022          * we must wait a grace period before freeing it.
1023          */
1024         if (q_vector)
1025                 kfree_rcu(q_vector, rcu);
1026 }
1027
1028 /**
1029  *  igb_reset_q_vector - Reset config for interrupt vector
1030  *  @adapter: board private structure to initialize
1031  *  @v_idx: Index of vector to be reset
1032  *
1033  *  If NAPI is enabled it will delete any references to the
1034  *  NAPI struct. This is preparation for igb_free_q_vector.
1035  **/
1036 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1037 {
1038         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1039
1040         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1041          * allocated. So, q_vector is NULL so we should stop here.
1042          */
1043         if (!q_vector)
1044                 return;
1045
1046         if (q_vector->tx.ring)
1047                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1048
1049         if (q_vector->rx.ring)
1050                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1051
1052         netif_napi_del(&q_vector->napi);
1053
1054 }
1055
1056 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1057 {
1058         int v_idx = adapter->num_q_vectors;
1059
1060         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1061                 pci_disable_msix(adapter->pdev);
1062         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1063                 pci_disable_msi(adapter->pdev);
1064
1065         while (v_idx--)
1066                 igb_reset_q_vector(adapter, v_idx);
1067 }
1068
1069 /**
1070  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1071  *  @adapter: board private structure to initialize
1072  *
1073  *  This function frees the memory allocated to the q_vectors.  In addition if
1074  *  NAPI is enabled it will delete any references to the NAPI struct prior
1075  *  to freeing the q_vector.
1076  **/
1077 static void igb_free_q_vectors(struct igb_adapter *adapter)
1078 {
1079         int v_idx = adapter->num_q_vectors;
1080
1081         adapter->num_tx_queues = 0;
1082         adapter->num_rx_queues = 0;
1083         adapter->num_q_vectors = 0;
1084
1085         while (v_idx--) {
1086                 igb_reset_q_vector(adapter, v_idx);
1087                 igb_free_q_vector(adapter, v_idx);
1088         }
1089 }
1090
1091 /**
1092  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1093  *  @adapter: board private structure to initialize
1094  *
1095  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1096  *  MSI-X interrupts allocated.
1097  */
1098 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1099 {
1100         igb_free_q_vectors(adapter);
1101         igb_reset_interrupt_capability(adapter);
1102 }
1103
1104 /**
1105  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1106  *  @adapter: board private structure to initialize
1107  *  @msix: boolean value of MSIX capability
1108  *
1109  *  Attempt to configure interrupts using the best available
1110  *  capabilities of the hardware and kernel.
1111  **/
1112 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1113 {
1114         int err;
1115         int numvecs, i;
1116
1117         if (!msix)
1118                 goto msi_only;
1119         adapter->flags |= IGB_FLAG_HAS_MSIX;
1120
1121         /* Number of supported queues. */
1122         adapter->num_rx_queues = adapter->rss_queues;
1123         if (adapter->vfs_allocated_count)
1124                 adapter->num_tx_queues = 1;
1125         else
1126                 adapter->num_tx_queues = adapter->rss_queues;
1127
1128         /* start with one vector for every Rx queue */
1129         numvecs = adapter->num_rx_queues;
1130
1131         /* if Tx handler is separate add 1 for every Tx queue */
1132         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1133                 numvecs += adapter->num_tx_queues;
1134
1135         /* store the number of vectors reserved for queues */
1136         adapter->num_q_vectors = numvecs;
1137
1138         /* add 1 vector for link status interrupts */
1139         numvecs++;
1140         for (i = 0; i < numvecs; i++)
1141                 adapter->msix_entries[i].entry = i;
1142
1143         err = pci_enable_msix_range(adapter->pdev,
1144                                     adapter->msix_entries,
1145                                     numvecs,
1146                                     numvecs);
1147         if (err > 0)
1148                 return;
1149
1150         igb_reset_interrupt_capability(adapter);
1151
1152         /* If we can't do MSI-X, try MSI */
1153 msi_only:
1154         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1155 #ifdef CONFIG_PCI_IOV
1156         /* disable SR-IOV for non MSI-X configurations */
1157         if (adapter->vf_data) {
1158                 struct e1000_hw *hw = &adapter->hw;
1159                 /* disable iov and allow time for transactions to clear */
1160                 pci_disable_sriov(adapter->pdev);
1161                 msleep(500);
1162
1163                 kfree(adapter->vf_data);
1164                 adapter->vf_data = NULL;
1165                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1166                 wrfl();
1167                 msleep(100);
1168                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1169         }
1170 #endif
1171         adapter->vfs_allocated_count = 0;
1172         adapter->rss_queues = 1;
1173         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1174         adapter->num_rx_queues = 1;
1175         adapter->num_tx_queues = 1;
1176         adapter->num_q_vectors = 1;
1177         if (!pci_enable_msi(adapter->pdev))
1178                 adapter->flags |= IGB_FLAG_HAS_MSI;
1179 }
1180
1181 static void igb_add_ring(struct igb_ring *ring,
1182                          struct igb_ring_container *head)
1183 {
1184         head->ring = ring;
1185         head->count++;
1186 }
1187
1188 /**
1189  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1190  *  @adapter: board private structure to initialize
1191  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1192  *  @v_idx: index of vector in adapter struct
1193  *  @txr_count: total number of Tx rings to allocate
1194  *  @txr_idx: index of first Tx ring to allocate
1195  *  @rxr_count: total number of Rx rings to allocate
1196  *  @rxr_idx: index of first Rx ring to allocate
1197  *
1198  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1199  **/
1200 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1201                               int v_count, int v_idx,
1202                               int txr_count, int txr_idx,
1203                               int rxr_count, int rxr_idx)
1204 {
1205         struct igb_q_vector *q_vector;
1206         struct igb_ring *ring;
1207         int ring_count, size;
1208
1209         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1210         if (txr_count > 1 || rxr_count > 1)
1211                 return -ENOMEM;
1212
1213         ring_count = txr_count + rxr_count;
1214         size = sizeof(struct igb_q_vector) +
1215                (sizeof(struct igb_ring) * ring_count);
1216
1217         /* allocate q_vector and rings */
1218         q_vector = adapter->q_vector[v_idx];
1219         if (!q_vector) {
1220                 q_vector = kzalloc(size, GFP_KERNEL);
1221         } else if (size > ksize(q_vector)) {
1222                 struct igb_q_vector *new_q_vector;
1223
1224                 new_q_vector = kzalloc(size, GFP_KERNEL);
1225                 if (new_q_vector)
1226                         kfree_rcu(q_vector, rcu);
1227                 q_vector = new_q_vector;
1228         } else {
1229                 memset(q_vector, 0, size);
1230         }
1231         if (!q_vector)
1232                 return -ENOMEM;
1233
1234         /* initialize NAPI */
1235         netif_napi_add(adapter->netdev, &q_vector->napi,
1236                        igb_poll, 64);
1237
1238         /* tie q_vector and adapter together */
1239         adapter->q_vector[v_idx] = q_vector;
1240         q_vector->adapter = adapter;
1241
1242         /* initialize work limits */
1243         q_vector->tx.work_limit = adapter->tx_work_limit;
1244
1245         /* initialize ITR configuration */
1246         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1247         q_vector->itr_val = IGB_START_ITR;
1248
1249         /* initialize pointer to rings */
1250         ring = q_vector->ring;
1251
1252         /* intialize ITR */
1253         if (rxr_count) {
1254                 /* rx or rx/tx vector */
1255                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1256                         q_vector->itr_val = adapter->rx_itr_setting;
1257         } else {
1258                 /* tx only vector */
1259                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1260                         q_vector->itr_val = adapter->tx_itr_setting;
1261         }
1262
1263         if (txr_count) {
1264                 /* assign generic ring traits */
1265                 ring->dev = &adapter->pdev->dev;
1266                 ring->netdev = adapter->netdev;
1267
1268                 /* configure backlink on ring */
1269                 ring->q_vector = q_vector;
1270
1271                 /* update q_vector Tx values */
1272                 igb_add_ring(ring, &q_vector->tx);
1273
1274                 /* For 82575, context index must be unique per ring. */
1275                 if (adapter->hw.mac.type == e1000_82575)
1276                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1277
1278                 /* apply Tx specific ring traits */
1279                 ring->count = adapter->tx_ring_count;
1280                 ring->queue_index = txr_idx;
1281
1282                 u64_stats_init(&ring->tx_syncp);
1283                 u64_stats_init(&ring->tx_syncp2);
1284
1285                 /* assign ring to adapter */
1286                 adapter->tx_ring[txr_idx] = ring;
1287
1288                 /* push pointer to next ring */
1289                 ring++;
1290         }
1291
1292         if (rxr_count) {
1293                 /* assign generic ring traits */
1294                 ring->dev = &adapter->pdev->dev;
1295                 ring->netdev = adapter->netdev;
1296
1297                 /* configure backlink on ring */
1298                 ring->q_vector = q_vector;
1299
1300                 /* update q_vector Rx values */
1301                 igb_add_ring(ring, &q_vector->rx);
1302
1303                 /* set flag indicating ring supports SCTP checksum offload */
1304                 if (adapter->hw.mac.type >= e1000_82576)
1305                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1306
1307                 /* On i350, i354, i210, and i211, loopback VLAN packets
1308                  * have the tag byte-swapped.
1309                  */
1310                 if (adapter->hw.mac.type >= e1000_i350)
1311                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1312
1313                 /* apply Rx specific ring traits */
1314                 ring->count = adapter->rx_ring_count;
1315                 ring->queue_index = rxr_idx;
1316
1317                 u64_stats_init(&ring->rx_syncp);
1318
1319                 /* assign ring to adapter */
1320                 adapter->rx_ring[rxr_idx] = ring;
1321         }
1322
1323         return 0;
1324 }
1325
1326
1327 /**
1328  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1329  *  @adapter: board private structure to initialize
1330  *
1331  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1332  *  return -ENOMEM.
1333  **/
1334 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1335 {
1336         int q_vectors = adapter->num_q_vectors;
1337         int rxr_remaining = adapter->num_rx_queues;
1338         int txr_remaining = adapter->num_tx_queues;
1339         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1340         int err;
1341
1342         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1343                 for (; rxr_remaining; v_idx++) {
1344                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1345                                                  0, 0, 1, rxr_idx);
1346
1347                         if (err)
1348                                 goto err_out;
1349
1350                         /* update counts and index */
1351                         rxr_remaining--;
1352                         rxr_idx++;
1353                 }
1354         }
1355
1356         for (; v_idx < q_vectors; v_idx++) {
1357                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1358                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1359
1360                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1361                                          tqpv, txr_idx, rqpv, rxr_idx);
1362
1363                 if (err)
1364                         goto err_out;
1365
1366                 /* update counts and index */
1367                 rxr_remaining -= rqpv;
1368                 txr_remaining -= tqpv;
1369                 rxr_idx++;
1370                 txr_idx++;
1371         }
1372
1373         return 0;
1374
1375 err_out:
1376         adapter->num_tx_queues = 0;
1377         adapter->num_rx_queues = 0;
1378         adapter->num_q_vectors = 0;
1379
1380         while (v_idx--)
1381                 igb_free_q_vector(adapter, v_idx);
1382
1383         return -ENOMEM;
1384 }
1385
1386 /**
1387  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1388  *  @adapter: board private structure to initialize
1389  *  @msix: boolean value of MSIX capability
1390  *
1391  *  This function initializes the interrupts and allocates all of the queues.
1392  **/
1393 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1394 {
1395         struct pci_dev *pdev = adapter->pdev;
1396         int err;
1397
1398         igb_set_interrupt_capability(adapter, msix);
1399
1400         err = igb_alloc_q_vectors(adapter);
1401         if (err) {
1402                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1403                 goto err_alloc_q_vectors;
1404         }
1405
1406         igb_cache_ring_register(adapter);
1407
1408         return 0;
1409
1410 err_alloc_q_vectors:
1411         igb_reset_interrupt_capability(adapter);
1412         return err;
1413 }
1414
1415 /**
1416  *  igb_request_irq - initialize interrupts
1417  *  @adapter: board private structure to initialize
1418  *
1419  *  Attempts to configure interrupts using the best available
1420  *  capabilities of the hardware and kernel.
1421  **/
1422 static int igb_request_irq(struct igb_adapter *adapter)
1423 {
1424         struct net_device *netdev = adapter->netdev;
1425         struct pci_dev *pdev = adapter->pdev;
1426         int err = 0;
1427
1428         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1429                 err = igb_request_msix(adapter);
1430                 if (!err)
1431                         goto request_done;
1432                 /* fall back to MSI */
1433                 igb_free_all_tx_resources(adapter);
1434                 igb_free_all_rx_resources(adapter);
1435
1436                 igb_clear_interrupt_scheme(adapter);
1437                 err = igb_init_interrupt_scheme(adapter, false);
1438                 if (err)
1439                         goto request_done;
1440
1441                 igb_setup_all_tx_resources(adapter);
1442                 igb_setup_all_rx_resources(adapter);
1443                 igb_configure(adapter);
1444         }
1445
1446         igb_assign_vector(adapter->q_vector[0], 0);
1447
1448         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1449                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1450                                   netdev->name, adapter);
1451                 if (!err)
1452                         goto request_done;
1453
1454                 /* fall back to legacy interrupts */
1455                 igb_reset_interrupt_capability(adapter);
1456                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1457         }
1458
1459         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1460                           netdev->name, adapter);
1461
1462         if (err)
1463                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1464                         err);
1465
1466 request_done:
1467         return err;
1468 }
1469
1470 static void igb_free_irq(struct igb_adapter *adapter)
1471 {
1472         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1473                 int vector = 0, i;
1474
1475                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1476
1477                 for (i = 0; i < adapter->num_q_vectors; i++)
1478                         free_irq(adapter->msix_entries[vector++].vector,
1479                                  adapter->q_vector[i]);
1480         } else {
1481                 free_irq(adapter->pdev->irq, adapter);
1482         }
1483 }
1484
1485 /**
1486  *  igb_irq_disable - Mask off interrupt generation on the NIC
1487  *  @adapter: board private structure
1488  **/
1489 static void igb_irq_disable(struct igb_adapter *adapter)
1490 {
1491         struct e1000_hw *hw = &adapter->hw;
1492
1493         /* we need to be careful when disabling interrupts.  The VFs are also
1494          * mapped into these registers and so clearing the bits can cause
1495          * issues on the VF drivers so we only need to clear what we set
1496          */
1497         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1498                 u32 regval = rd32(E1000_EIAM);
1499
1500                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1501                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1502                 regval = rd32(E1000_EIAC);
1503                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1504         }
1505
1506         wr32(E1000_IAM, 0);
1507         wr32(E1000_IMC, ~0);
1508         wrfl();
1509         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1510                 int i;
1511
1512                 for (i = 0; i < adapter->num_q_vectors; i++)
1513                         synchronize_irq(adapter->msix_entries[i].vector);
1514         } else {
1515                 synchronize_irq(adapter->pdev->irq);
1516         }
1517 }
1518
1519 /**
1520  *  igb_irq_enable - Enable default interrupt generation settings
1521  *  @adapter: board private structure
1522  **/
1523 static void igb_irq_enable(struct igb_adapter *adapter)
1524 {
1525         struct e1000_hw *hw = &adapter->hw;
1526
1527         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1528                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1529                 u32 regval = rd32(E1000_EIAC);
1530
1531                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1532                 regval = rd32(E1000_EIAM);
1533                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1534                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1535                 if (adapter->vfs_allocated_count) {
1536                         wr32(E1000_MBVFIMR, 0xFF);
1537                         ims |= E1000_IMS_VMMB;
1538                 }
1539                 wr32(E1000_IMS, ims);
1540         } else {
1541                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1542                                 E1000_IMS_DRSTA);
1543                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1544                                 E1000_IMS_DRSTA);
1545         }
1546 }
1547
1548 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1549 {
1550         struct e1000_hw *hw = &adapter->hw;
1551         u16 pf_id = adapter->vfs_allocated_count;
1552         u16 vid = adapter->hw.mng_cookie.vlan_id;
1553         u16 old_vid = adapter->mng_vlan_id;
1554
1555         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1556                 /* add VID to filter table */
1557                 igb_vfta_set(hw, vid, pf_id, true, true);
1558                 adapter->mng_vlan_id = vid;
1559         } else {
1560                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1561         }
1562
1563         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1564             (vid != old_vid) &&
1565             !test_bit(old_vid, adapter->active_vlans)) {
1566                 /* remove VID from filter table */
1567                 igb_vfta_set(hw, vid, pf_id, false, true);
1568         }
1569 }
1570
1571 /**
1572  *  igb_release_hw_control - release control of the h/w to f/w
1573  *  @adapter: address of board private structure
1574  *
1575  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1576  *  For ASF and Pass Through versions of f/w this means that the
1577  *  driver is no longer loaded.
1578  **/
1579 static void igb_release_hw_control(struct igb_adapter *adapter)
1580 {
1581         struct e1000_hw *hw = &adapter->hw;
1582         u32 ctrl_ext;
1583
1584         /* Let firmware take over control of h/w */
1585         ctrl_ext = rd32(E1000_CTRL_EXT);
1586         wr32(E1000_CTRL_EXT,
1587                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1588 }
1589
1590 /**
1591  *  igb_get_hw_control - get control of the h/w from f/w
1592  *  @adapter: address of board private structure
1593  *
1594  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1595  *  For ASF and Pass Through versions of f/w this means that
1596  *  the driver is loaded.
1597  **/
1598 static void igb_get_hw_control(struct igb_adapter *adapter)
1599 {
1600         struct e1000_hw *hw = &adapter->hw;
1601         u32 ctrl_ext;
1602
1603         /* Let firmware know the driver has taken over */
1604         ctrl_ext = rd32(E1000_CTRL_EXT);
1605         wr32(E1000_CTRL_EXT,
1606                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1607 }
1608
1609 /**
1610  *  igb_configure - configure the hardware for RX and TX
1611  *  @adapter: private board structure
1612  **/
1613 static void igb_configure(struct igb_adapter *adapter)
1614 {
1615         struct net_device *netdev = adapter->netdev;
1616         int i;
1617
1618         igb_get_hw_control(adapter);
1619         igb_set_rx_mode(netdev);
1620
1621         igb_restore_vlan(adapter);
1622
1623         igb_setup_tctl(adapter);
1624         igb_setup_mrqc(adapter);
1625         igb_setup_rctl(adapter);
1626
1627         igb_nfc_filter_restore(adapter);
1628         igb_configure_tx(adapter);
1629         igb_configure_rx(adapter);
1630
1631         igb_rx_fifo_flush_82575(&adapter->hw);
1632
1633         /* call igb_desc_unused which always leaves
1634          * at least 1 descriptor unused to make sure
1635          * next_to_use != next_to_clean
1636          */
1637         for (i = 0; i < adapter->num_rx_queues; i++) {
1638                 struct igb_ring *ring = adapter->rx_ring[i];
1639                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1640         }
1641 }
1642
1643 /**
1644  *  igb_power_up_link - Power up the phy/serdes link
1645  *  @adapter: address of board private structure
1646  **/
1647 void igb_power_up_link(struct igb_adapter *adapter)
1648 {
1649         igb_reset_phy(&adapter->hw);
1650
1651         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1652                 igb_power_up_phy_copper(&adapter->hw);
1653         else
1654                 igb_power_up_serdes_link_82575(&adapter->hw);
1655
1656         igb_setup_link(&adapter->hw);
1657 }
1658
1659 /**
1660  *  igb_power_down_link - Power down the phy/serdes link
1661  *  @adapter: address of board private structure
1662  */
1663 static void igb_power_down_link(struct igb_adapter *adapter)
1664 {
1665         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1666                 igb_power_down_phy_copper_82575(&adapter->hw);
1667         else
1668                 igb_shutdown_serdes_link_82575(&adapter->hw);
1669 }
1670
1671 /**
1672  * Detect and switch function for Media Auto Sense
1673  * @adapter: address of the board private structure
1674  **/
1675 static void igb_check_swap_media(struct igb_adapter *adapter)
1676 {
1677         struct e1000_hw *hw = &adapter->hw;
1678         u32 ctrl_ext, connsw;
1679         bool swap_now = false;
1680
1681         ctrl_ext = rd32(E1000_CTRL_EXT);
1682         connsw = rd32(E1000_CONNSW);
1683
1684         /* need to live swap if current media is copper and we have fiber/serdes
1685          * to go to.
1686          */
1687
1688         if ((hw->phy.media_type == e1000_media_type_copper) &&
1689             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1690                 swap_now = true;
1691         } else if ((hw->phy.media_type != e1000_media_type_copper) &&
1692                    !(connsw & E1000_CONNSW_SERDESD)) {
1693                 /* copper signal takes time to appear */
1694                 if (adapter->copper_tries < 4) {
1695                         adapter->copper_tries++;
1696                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1697                         wr32(E1000_CONNSW, connsw);
1698                         return;
1699                 } else {
1700                         adapter->copper_tries = 0;
1701                         if ((connsw & E1000_CONNSW_PHYSD) &&
1702                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1703                                 swap_now = true;
1704                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1705                                 wr32(E1000_CONNSW, connsw);
1706                         }
1707                 }
1708         }
1709
1710         if (!swap_now)
1711                 return;
1712
1713         switch (hw->phy.media_type) {
1714         case e1000_media_type_copper:
1715                 netdev_info(adapter->netdev,
1716                         "MAS: changing media to fiber/serdes\n");
1717                 ctrl_ext |=
1718                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1719                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1720                 adapter->copper_tries = 0;
1721                 break;
1722         case e1000_media_type_internal_serdes:
1723         case e1000_media_type_fiber:
1724                 netdev_info(adapter->netdev,
1725                         "MAS: changing media to copper\n");
1726                 ctrl_ext &=
1727                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1728                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1729                 break;
1730         default:
1731                 /* shouldn't get here during regular operation */
1732                 netdev_err(adapter->netdev,
1733                         "AMS: Invalid media type found, returning\n");
1734                 break;
1735         }
1736         wr32(E1000_CTRL_EXT, ctrl_ext);
1737 }
1738
1739 /**
1740  *  igb_up - Open the interface and prepare it to handle traffic
1741  *  @adapter: board private structure
1742  **/
1743 int igb_up(struct igb_adapter *adapter)
1744 {
1745         struct e1000_hw *hw = &adapter->hw;
1746         int i;
1747
1748         /* hardware has been reset, we need to reload some things */
1749         igb_configure(adapter);
1750
1751         clear_bit(__IGB_DOWN, &adapter->state);
1752
1753         for (i = 0; i < adapter->num_q_vectors; i++)
1754                 napi_enable(&(adapter->q_vector[i]->napi));
1755
1756         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1757                 igb_configure_msix(adapter);
1758         else
1759                 igb_assign_vector(adapter->q_vector[0], 0);
1760
1761         /* Clear any pending interrupts. */
1762         rd32(E1000_ICR);
1763         igb_irq_enable(adapter);
1764
1765         /* notify VFs that reset has been completed */
1766         if (adapter->vfs_allocated_count) {
1767                 u32 reg_data = rd32(E1000_CTRL_EXT);
1768
1769                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1770                 wr32(E1000_CTRL_EXT, reg_data);
1771         }
1772
1773         netif_tx_start_all_queues(adapter->netdev);
1774
1775         /* start the watchdog. */
1776         hw->mac.get_link_status = 1;
1777         schedule_work(&adapter->watchdog_task);
1778
1779         if ((adapter->flags & IGB_FLAG_EEE) &&
1780             (!hw->dev_spec._82575.eee_disable))
1781                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1782
1783         return 0;
1784 }
1785
1786 void igb_down(struct igb_adapter *adapter)
1787 {
1788         struct net_device *netdev = adapter->netdev;
1789         struct e1000_hw *hw = &adapter->hw;
1790         u32 tctl, rctl;
1791         int i;
1792
1793         /* signal that we're down so the interrupt handler does not
1794          * reschedule our watchdog timer
1795          */
1796         set_bit(__IGB_DOWN, &adapter->state);
1797
1798         /* disable receives in the hardware */
1799         rctl = rd32(E1000_RCTL);
1800         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1801         /* flush and sleep below */
1802
1803         netif_carrier_off(netdev);
1804         netif_tx_stop_all_queues(netdev);
1805
1806         /* disable transmits in the hardware */
1807         tctl = rd32(E1000_TCTL);
1808         tctl &= ~E1000_TCTL_EN;
1809         wr32(E1000_TCTL, tctl);
1810         /* flush both disables and wait for them to finish */
1811         wrfl();
1812         usleep_range(10000, 11000);
1813
1814         igb_irq_disable(adapter);
1815
1816         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1817
1818         for (i = 0; i < adapter->num_q_vectors; i++) {
1819                 if (adapter->q_vector[i]) {
1820                         napi_synchronize(&adapter->q_vector[i]->napi);
1821                         napi_disable(&adapter->q_vector[i]->napi);
1822                 }
1823         }
1824
1825         del_timer_sync(&adapter->watchdog_timer);
1826         del_timer_sync(&adapter->phy_info_timer);
1827
1828         /* record the stats before reset*/
1829         spin_lock(&adapter->stats64_lock);
1830         igb_update_stats(adapter, &adapter->stats64);
1831         spin_unlock(&adapter->stats64_lock);
1832
1833         adapter->link_speed = 0;
1834         adapter->link_duplex = 0;
1835
1836         if (!pci_channel_offline(adapter->pdev))
1837                 igb_reset(adapter);
1838
1839         /* clear VLAN promisc flag so VFTA will be updated if necessary */
1840         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
1841
1842         igb_clean_all_tx_rings(adapter);
1843         igb_clean_all_rx_rings(adapter);
1844 #ifdef CONFIG_IGB_DCA
1845
1846         /* since we reset the hardware DCA settings were cleared */
1847         igb_setup_dca(adapter);
1848 #endif
1849 }
1850
1851 void igb_reinit_locked(struct igb_adapter *adapter)
1852 {
1853         WARN_ON(in_interrupt());
1854         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1855                 usleep_range(1000, 2000);
1856         igb_down(adapter);
1857         igb_up(adapter);
1858         clear_bit(__IGB_RESETTING, &adapter->state);
1859 }
1860
1861 /** igb_enable_mas - Media Autosense re-enable after swap
1862  *
1863  * @adapter: adapter struct
1864  **/
1865 static void igb_enable_mas(struct igb_adapter *adapter)
1866 {
1867         struct e1000_hw *hw = &adapter->hw;
1868         u32 connsw = rd32(E1000_CONNSW);
1869
1870         /* configure for SerDes media detect */
1871         if ((hw->phy.media_type == e1000_media_type_copper) &&
1872             (!(connsw & E1000_CONNSW_SERDESD))) {
1873                 connsw |= E1000_CONNSW_ENRGSRC;
1874                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1875                 wr32(E1000_CONNSW, connsw);
1876                 wrfl();
1877         }
1878 }
1879
1880 void igb_reset(struct igb_adapter *adapter)
1881 {
1882         struct pci_dev *pdev = adapter->pdev;
1883         struct e1000_hw *hw = &adapter->hw;
1884         struct e1000_mac_info *mac = &hw->mac;
1885         struct e1000_fc_info *fc = &hw->fc;
1886         u32 pba, hwm;
1887
1888         /* Repartition Pba for greater than 9k mtu
1889          * To take effect CTRL.RST is required.
1890          */
1891         switch (mac->type) {
1892         case e1000_i350:
1893         case e1000_i354:
1894         case e1000_82580:
1895                 pba = rd32(E1000_RXPBS);
1896                 pba = igb_rxpbs_adjust_82580(pba);
1897                 break;
1898         case e1000_82576:
1899                 pba = rd32(E1000_RXPBS);
1900                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1901                 break;
1902         case e1000_82575:
1903         case e1000_i210:
1904         case e1000_i211:
1905         default:
1906                 pba = E1000_PBA_34K;
1907                 break;
1908         }
1909
1910         if (mac->type == e1000_82575) {
1911                 u32 min_rx_space, min_tx_space, needed_tx_space;
1912
1913                 /* write Rx PBA so that hardware can report correct Tx PBA */
1914                 wr32(E1000_PBA, pba);
1915
1916                 /* To maintain wire speed transmits, the Tx FIFO should be
1917                  * large enough to accommodate two full transmit packets,
1918                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1919                  * the Rx FIFO should be large enough to accommodate at least
1920                  * one full receive packet and is similarly rounded up and
1921                  * expressed in KB.
1922                  */
1923                 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
1924
1925                 /* The Tx FIFO also stores 16 bytes of information about the Tx
1926                  * but don't include Ethernet FCS because hardware appends it.
1927                  * We only need to round down to the nearest 512 byte block
1928                  * count since the value we care about is 2 frames, not 1.
1929                  */
1930                 min_tx_space = adapter->max_frame_size;
1931                 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
1932                 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
1933
1934                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1935                 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
1936
1937                 /* If current Tx allocation is less than the min Tx FIFO size,
1938                  * and the min Tx FIFO size is less than the current Rx FIFO
1939                  * allocation, take space away from current Rx allocation.
1940                  */
1941                 if (needed_tx_space < pba) {
1942                         pba -= needed_tx_space;
1943
1944                         /* if short on Rx space, Rx wins and must trump Tx
1945                          * adjustment
1946                          */
1947                         if (pba < min_rx_space)
1948                                 pba = min_rx_space;
1949                 }
1950
1951                 /* adjust PBA for jumbo frames */
1952                 wr32(E1000_PBA, pba);
1953         }
1954
1955         /* flow control settings
1956          * The high water mark must be low enough to fit one full frame
1957          * after transmitting the pause frame.  As such we must have enough
1958          * space to allow for us to complete our current transmit and then
1959          * receive the frame that is in progress from the link partner.
1960          * Set it to:
1961          * - the full Rx FIFO size minus one full Tx plus one full Rx frame
1962          */
1963         hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
1964
1965         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1966         fc->low_water = fc->high_water - 16;
1967         fc->pause_time = 0xFFFF;
1968         fc->send_xon = 1;
1969         fc->current_mode = fc->requested_mode;
1970
1971         /* disable receive for all VFs and wait one second */
1972         if (adapter->vfs_allocated_count) {
1973                 int i;
1974
1975                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1976                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1977
1978                 /* ping all the active vfs to let them know we are going down */
1979                 igb_ping_all_vfs(adapter);
1980
1981                 /* disable transmits and receives */
1982                 wr32(E1000_VFRE, 0);
1983                 wr32(E1000_VFTE, 0);
1984         }
1985
1986         /* Allow time for pending master requests to run */
1987         hw->mac.ops.reset_hw(hw);
1988         wr32(E1000_WUC, 0);
1989
1990         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1991                 /* need to resetup here after media swap */
1992                 adapter->ei.get_invariants(hw);
1993                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
1994         }
1995         if ((mac->type == e1000_82575) &&
1996             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
1997                 igb_enable_mas(adapter);
1998         }
1999         if (hw->mac.ops.init_hw(hw))
2000                 dev_err(&pdev->dev, "Hardware Error\n");
2001
2002         /* Flow control settings reset on hardware reset, so guarantee flow
2003          * control is off when forcing speed.
2004          */
2005         if (!hw->mac.autoneg)
2006                 igb_force_mac_fc(hw);
2007
2008         igb_init_dmac(adapter, pba);
2009 #ifdef CONFIG_IGB_HWMON
2010         /* Re-initialize the thermal sensor on i350 devices. */
2011         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2012                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2013                         /* If present, re-initialize the external thermal sensor
2014                          * interface.
2015                          */
2016                         if (adapter->ets)
2017                                 mac->ops.init_thermal_sensor_thresh(hw);
2018                 }
2019         }
2020 #endif
2021         /* Re-establish EEE setting */
2022         if (hw->phy.media_type == e1000_media_type_copper) {
2023                 switch (mac->type) {
2024                 case e1000_i350:
2025                 case e1000_i210:
2026                 case e1000_i211:
2027                         igb_set_eee_i350(hw, true, true);
2028                         break;
2029                 case e1000_i354:
2030                         igb_set_eee_i354(hw, true, true);
2031                         break;
2032                 default:
2033                         break;
2034                 }
2035         }
2036         if (!netif_running(adapter->netdev))
2037                 igb_power_down_link(adapter);
2038
2039         igb_update_mng_vlan(adapter);
2040
2041         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2042         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2043
2044         /* Re-enable PTP, where applicable. */
2045         if (adapter->ptp_flags & IGB_PTP_ENABLED)
2046                 igb_ptp_reset(adapter);
2047
2048         igb_get_phy_info(hw);
2049 }
2050
2051 static netdev_features_t igb_fix_features(struct net_device *netdev,
2052         netdev_features_t features)
2053 {
2054         /* Since there is no support for separate Rx/Tx vlan accel
2055          * enable/disable make sure Tx flag is always in same state as Rx.
2056          */
2057         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2058                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2059         else
2060                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2061
2062         return features;
2063 }
2064
2065 static int igb_set_features(struct net_device *netdev,
2066         netdev_features_t features)
2067 {
2068         netdev_features_t changed = netdev->features ^ features;
2069         struct igb_adapter *adapter = netdev_priv(netdev);
2070
2071         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2072                 igb_vlan_mode(netdev, features);
2073
2074         if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2075                 return 0;
2076
2077         if (!(features & NETIF_F_NTUPLE)) {
2078                 struct hlist_node *node2;
2079                 struct igb_nfc_filter *rule;
2080
2081                 spin_lock(&adapter->nfc_lock);
2082                 hlist_for_each_entry_safe(rule, node2,
2083                                           &adapter->nfc_filter_list, nfc_node) {
2084                         igb_erase_filter(adapter, rule);
2085                         hlist_del(&rule->nfc_node);
2086                         kfree(rule);
2087                 }
2088                 spin_unlock(&adapter->nfc_lock);
2089                 adapter->nfc_filter_count = 0;
2090         }
2091
2092         netdev->features = features;
2093
2094         if (netif_running(netdev))
2095                 igb_reinit_locked(adapter);
2096         else
2097                 igb_reset(adapter);
2098
2099         return 0;
2100 }
2101
2102 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2103                            struct net_device *dev,
2104                            const unsigned char *addr, u16 vid,
2105                            u16 flags)
2106 {
2107         /* guarantee we can provide a unique filter for the unicast address */
2108         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2109                 struct igb_adapter *adapter = netdev_priv(dev);
2110                 struct e1000_hw *hw = &adapter->hw;
2111                 int vfn = adapter->vfs_allocated_count;
2112                 int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
2113
2114                 if (netdev_uc_count(dev) >= rar_entries)
2115                         return -ENOMEM;
2116         }
2117
2118         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2119 }
2120
2121 #define IGB_MAX_MAC_HDR_LEN     127
2122 #define IGB_MAX_NETWORK_HDR_LEN 511
2123
2124 static netdev_features_t
2125 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2126                    netdev_features_t features)
2127 {
2128         unsigned int network_hdr_len, mac_hdr_len;
2129
2130         /* Make certain the headers can be described by a context descriptor */
2131         mac_hdr_len = skb_network_header(skb) - skb->data;
2132         if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2133                 return features & ~(NETIF_F_HW_CSUM |
2134                                     NETIF_F_SCTP_CRC |
2135                                     NETIF_F_HW_VLAN_CTAG_TX |
2136                                     NETIF_F_TSO |
2137                                     NETIF_F_TSO6);
2138
2139         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2140         if (unlikely(network_hdr_len >  IGB_MAX_NETWORK_HDR_LEN))
2141                 return features & ~(NETIF_F_HW_CSUM |
2142                                     NETIF_F_SCTP_CRC |
2143                                     NETIF_F_TSO |
2144                                     NETIF_F_TSO6);
2145
2146         /* We can only support IPV4 TSO in tunnels if we can mangle the
2147          * inner IP ID field, so strip TSO if MANGLEID is not supported.
2148          */
2149         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2150                 features &= ~NETIF_F_TSO;
2151
2152         return features;
2153 }
2154
2155 static const struct net_device_ops igb_netdev_ops = {
2156         .ndo_open               = igb_open,
2157         .ndo_stop               = igb_close,
2158         .ndo_start_xmit         = igb_xmit_frame,
2159         .ndo_get_stats64        = igb_get_stats64,
2160         .ndo_set_rx_mode        = igb_set_rx_mode,
2161         .ndo_set_mac_address    = igb_set_mac,
2162         .ndo_change_mtu         = igb_change_mtu,
2163         .ndo_do_ioctl           = igb_ioctl,
2164         .ndo_tx_timeout         = igb_tx_timeout,
2165         .ndo_validate_addr      = eth_validate_addr,
2166         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2167         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2168         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2169         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2170         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2171         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2172         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2173 #ifdef CONFIG_NET_POLL_CONTROLLER
2174         .ndo_poll_controller    = igb_netpoll,
2175 #endif
2176         .ndo_fix_features       = igb_fix_features,
2177         .ndo_set_features       = igb_set_features,
2178         .ndo_fdb_add            = igb_ndo_fdb_add,
2179         .ndo_features_check     = igb_features_check,
2180 };
2181
2182 /**
2183  * igb_set_fw_version - Configure version string for ethtool
2184  * @adapter: adapter struct
2185  **/
2186 void igb_set_fw_version(struct igb_adapter *adapter)
2187 {
2188         struct e1000_hw *hw = &adapter->hw;
2189         struct e1000_fw_version fw;
2190
2191         igb_get_fw_version(hw, &fw);
2192
2193         switch (hw->mac.type) {
2194         case e1000_i210:
2195         case e1000_i211:
2196                 if (!(igb_get_flash_presence_i210(hw))) {
2197                         snprintf(adapter->fw_version,
2198                                  sizeof(adapter->fw_version),
2199                                  "%2d.%2d-%d",
2200                                  fw.invm_major, fw.invm_minor,
2201                                  fw.invm_img_type);
2202                         break;
2203                 }
2204                 /* fall through */
2205         default:
2206                 /* if option is rom valid, display its version too */
2207                 if (fw.or_valid) {
2208                         snprintf(adapter->fw_version,
2209                                  sizeof(adapter->fw_version),
2210                                  "%d.%d, 0x%08x, %d.%d.%d",
2211                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2212                                  fw.or_major, fw.or_build, fw.or_patch);
2213                 /* no option rom */
2214                 } else if (fw.etrack_id != 0X0000) {
2215                         snprintf(adapter->fw_version,
2216                             sizeof(adapter->fw_version),
2217                             "%d.%d, 0x%08x",
2218                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2219                 } else {
2220                 snprintf(adapter->fw_version,
2221                     sizeof(adapter->fw_version),
2222                     "%d.%d.%d",
2223                     fw.eep_major, fw.eep_minor, fw.eep_build);
2224                 }
2225                 break;
2226         }
2227 }
2228
2229 /**
2230  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2231  *
2232  * @adapter: adapter struct
2233  **/
2234 static void igb_init_mas(struct igb_adapter *adapter)
2235 {
2236         struct e1000_hw *hw = &adapter->hw;
2237         u16 eeprom_data;
2238
2239         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2240         switch (hw->bus.func) {
2241         case E1000_FUNC_0:
2242                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2243                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2244                         netdev_info(adapter->netdev,
2245                                 "MAS: Enabling Media Autosense for port %d\n",
2246                                 hw->bus.func);
2247                 }
2248                 break;
2249         case E1000_FUNC_1:
2250                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2251                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2252                         netdev_info(adapter->netdev,
2253                                 "MAS: Enabling Media Autosense for port %d\n",
2254                                 hw->bus.func);
2255                 }
2256                 break;
2257         case E1000_FUNC_2:
2258                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2259                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2260                         netdev_info(adapter->netdev,
2261                                 "MAS: Enabling Media Autosense for port %d\n",
2262                                 hw->bus.func);
2263                 }
2264                 break;
2265         case E1000_FUNC_3:
2266                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2267                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2268                         netdev_info(adapter->netdev,
2269                                 "MAS: Enabling Media Autosense for port %d\n",
2270                                 hw->bus.func);
2271                 }
2272                 break;
2273         default:
2274                 /* Shouldn't get here */
2275                 netdev_err(adapter->netdev,
2276                         "MAS: Invalid port configuration, returning\n");
2277                 break;
2278         }
2279 }
2280
2281 /**
2282  *  igb_init_i2c - Init I2C interface
2283  *  @adapter: pointer to adapter structure
2284  **/
2285 static s32 igb_init_i2c(struct igb_adapter *adapter)
2286 {
2287         s32 status = 0;
2288
2289         /* I2C interface supported on i350 devices */
2290         if (adapter->hw.mac.type != e1000_i350)
2291                 return 0;
2292
2293         /* Initialize the i2c bus which is controlled by the registers.
2294          * This bus will use the i2c_algo_bit structue that implements
2295          * the protocol through toggling of the 4 bits in the register.
2296          */
2297         adapter->i2c_adap.owner = THIS_MODULE;
2298         adapter->i2c_algo = igb_i2c_algo;
2299         adapter->i2c_algo.data = adapter;
2300         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
2301         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
2302         strlcpy(adapter->i2c_adap.name, "igb BB",
2303                 sizeof(adapter->i2c_adap.name));
2304         status = i2c_bit_add_bus(&adapter->i2c_adap);
2305         return status;
2306 }
2307
2308 /**
2309  *  igb_probe - Device Initialization Routine
2310  *  @pdev: PCI device information struct
2311  *  @ent: entry in igb_pci_tbl
2312  *
2313  *  Returns 0 on success, negative on failure
2314  *
2315  *  igb_probe initializes an adapter identified by a pci_dev structure.
2316  *  The OS initialization, configuring of the adapter private structure,
2317  *  and a hardware reset occur.
2318  **/
2319 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2320 {
2321         struct net_device *netdev;
2322         struct igb_adapter *adapter;
2323         struct e1000_hw *hw;
2324         u16 eeprom_data = 0;
2325         s32 ret_val;
2326         static int global_quad_port_a; /* global quad port a indication */
2327         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2328         int err, pci_using_dac;
2329         u8 part_str[E1000_PBANUM_LENGTH];
2330
2331         /* Catch broken hardware that put the wrong VF device ID in
2332          * the PCIe SR-IOV capability.
2333          */
2334         if (pdev->is_virtfn) {
2335                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2336                         pci_name(pdev), pdev->vendor, pdev->device);
2337                 return -EINVAL;
2338         }
2339
2340         err = pci_enable_device_mem(pdev);
2341         if (err)
2342                 return err;
2343
2344         pci_using_dac = 0;
2345         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2346         if (!err) {
2347                 pci_using_dac = 1;
2348         } else {
2349                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2350                 if (err) {
2351                         dev_err(&pdev->dev,
2352                                 "No usable DMA configuration, aborting\n");
2353                         goto err_dma;
2354                 }
2355         }
2356
2357         err = pci_request_mem_regions(pdev, igb_driver_name);
2358         if (err)
2359                 goto err_pci_reg;
2360
2361         pci_enable_pcie_error_reporting(pdev);
2362
2363         pci_set_master(pdev);
2364         pci_save_state(pdev);
2365
2366         err = -ENOMEM;
2367         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2368                                    IGB_MAX_TX_QUEUES);
2369         if (!netdev)
2370                 goto err_alloc_etherdev;
2371
2372         SET_NETDEV_DEV(netdev, &pdev->dev);
2373
2374         pci_set_drvdata(pdev, netdev);
2375         adapter = netdev_priv(netdev);
2376         adapter->netdev = netdev;
2377         adapter->pdev = pdev;
2378         hw = &adapter->hw;
2379         hw->back = adapter;
2380         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2381
2382         err = -EIO;
2383         adapter->io_addr = pci_iomap(pdev, 0, 0);
2384         if (!adapter->io_addr)
2385                 goto err_ioremap;
2386         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
2387         hw->hw_addr = adapter->io_addr;
2388
2389         netdev->netdev_ops = &igb_netdev_ops;
2390         igb_set_ethtool_ops(netdev);
2391         netdev->watchdog_timeo = 5 * HZ;
2392
2393         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2394
2395         netdev->mem_start = pci_resource_start(pdev, 0);
2396         netdev->mem_end = pci_resource_end(pdev, 0);
2397
2398         /* PCI config space info */
2399         hw->vendor_id = pdev->vendor;
2400         hw->device_id = pdev->device;
2401         hw->revision_id = pdev->revision;
2402         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2403         hw->subsystem_device_id = pdev->subsystem_device;
2404
2405         /* Copy the default MAC, PHY and NVM function pointers */
2406         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2407         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2408         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2409         /* Initialize skew-specific constants */
2410         err = ei->get_invariants(hw);
2411         if (err)
2412                 goto err_sw_init;
2413
2414         /* setup the private structure */
2415         err = igb_sw_init(adapter);
2416         if (err)
2417                 goto err_sw_init;
2418
2419         igb_get_bus_info_pcie(hw);
2420
2421         hw->phy.autoneg_wait_to_complete = false;
2422
2423         /* Copper options */
2424         if (hw->phy.media_type == e1000_media_type_copper) {
2425                 hw->phy.mdix = AUTO_ALL_MODES;
2426                 hw->phy.disable_polarity_correction = false;
2427                 hw->phy.ms_type = e1000_ms_hw_default;
2428         }
2429
2430         if (igb_check_reset_block(hw))
2431                 dev_info(&pdev->dev,
2432                         "PHY reset is blocked due to SOL/IDER session.\n");
2433
2434         /* features is initialized to 0 in allocation, it might have bits
2435          * set by igb_sw_init so we should use an or instead of an
2436          * assignment.
2437          */
2438         netdev->features |= NETIF_F_SG |
2439                             NETIF_F_TSO |
2440                             NETIF_F_TSO6 |
2441                             NETIF_F_RXHASH |
2442                             NETIF_F_RXCSUM |
2443                             NETIF_F_HW_CSUM;
2444
2445         if (hw->mac.type >= e1000_82576)
2446                 netdev->features |= NETIF_F_SCTP_CRC;
2447
2448 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
2449                                   NETIF_F_GSO_GRE_CSUM | \
2450                                   NETIF_F_GSO_IPXIP4 | \
2451                                   NETIF_F_GSO_IPXIP6 | \
2452                                   NETIF_F_GSO_UDP_TUNNEL | \
2453                                   NETIF_F_GSO_UDP_TUNNEL_CSUM)
2454
2455         netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
2456         netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
2457
2458         /* copy netdev features into list of user selectable features */
2459         netdev->hw_features |= netdev->features |
2460                                NETIF_F_HW_VLAN_CTAG_RX |
2461                                NETIF_F_HW_VLAN_CTAG_TX |
2462                                NETIF_F_RXALL;
2463
2464         if (hw->mac.type >= e1000_i350)
2465                 netdev->hw_features |= NETIF_F_NTUPLE;
2466
2467         if (pci_using_dac)
2468                 netdev->features |= NETIF_F_HIGHDMA;
2469
2470         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
2471         netdev->mpls_features |= NETIF_F_HW_CSUM;
2472         netdev->hw_enc_features |= netdev->vlan_features;
2473
2474         /* set this bit last since it cannot be part of vlan_features */
2475         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
2476                             NETIF_F_HW_VLAN_CTAG_RX |
2477                             NETIF_F_HW_VLAN_CTAG_TX;
2478
2479         netdev->priv_flags |= IFF_SUPP_NOFCS;
2480
2481         netdev->priv_flags |= IFF_UNICAST_FLT;
2482
2483         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2484
2485         /* before reading the NVM, reset the controller to put the device in a
2486          * known good starting state
2487          */
2488         hw->mac.ops.reset_hw(hw);
2489
2490         /* make sure the NVM is good , i211/i210 parts can have special NVM
2491          * that doesn't contain a checksum
2492          */
2493         switch (hw->mac.type) {
2494         case e1000_i210:
2495         case e1000_i211:
2496                 if (igb_get_flash_presence_i210(hw)) {
2497                         if (hw->nvm.ops.validate(hw) < 0) {
2498                                 dev_err(&pdev->dev,
2499                                         "The NVM Checksum Is Not Valid\n");
2500                                 err = -EIO;
2501                                 goto err_eeprom;
2502                         }
2503                 }
2504                 break;
2505         default:
2506                 if (hw->nvm.ops.validate(hw) < 0) {
2507                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2508                         err = -EIO;
2509                         goto err_eeprom;
2510                 }
2511                 break;
2512         }
2513
2514         if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
2515                 /* copy the MAC address out of the NVM */
2516                 if (hw->mac.ops.read_mac_addr(hw))
2517                         dev_err(&pdev->dev, "NVM Read Error\n");
2518         }
2519
2520         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2521
2522         if (!is_valid_ether_addr(netdev->dev_addr)) {
2523                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2524                 err = -EIO;
2525                 goto err_eeprom;
2526         }
2527
2528         /* get firmware version for ethtool -i */
2529         igb_set_fw_version(adapter);
2530
2531         /* configure RXPBSIZE and TXPBSIZE */
2532         if (hw->mac.type == e1000_i210) {
2533                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
2534                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
2535         }
2536
2537         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2538                     (unsigned long) adapter);
2539         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2540                     (unsigned long) adapter);
2541
2542         INIT_WORK(&adapter->reset_task, igb_reset_task);
2543         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2544
2545         /* Initialize link properties that are user-changeable */
2546         adapter->fc_autoneg = true;
2547         hw->mac.autoneg = true;
2548         hw->phy.autoneg_advertised = 0x2f;
2549
2550         hw->fc.requested_mode = e1000_fc_default;
2551         hw->fc.current_mode = e1000_fc_default;
2552
2553         igb_validate_mdi_setting(hw);
2554
2555         /* By default, support wake on port A */
2556         if (hw->bus.func == 0)
2557                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2558
2559         /* Check the NVM for wake support on non-port A ports */
2560         if (hw->mac.type >= e1000_82580)
2561                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2562                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2563                                  &eeprom_data);
2564         else if (hw->bus.func == 1)
2565                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2566
2567         if (eeprom_data & IGB_EEPROM_APME)
2568                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2569
2570         /* now that we have the eeprom settings, apply the special cases where
2571          * the eeprom may be wrong or the board simply won't support wake on
2572          * lan on a particular port
2573          */
2574         switch (pdev->device) {
2575         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2576                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2577                 break;
2578         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2579         case E1000_DEV_ID_82576_FIBER:
2580         case E1000_DEV_ID_82576_SERDES:
2581                 /* Wake events only supported on port A for dual fiber
2582                  * regardless of eeprom setting
2583                  */
2584                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2585                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2586                 break;
2587         case E1000_DEV_ID_82576_QUAD_COPPER:
2588         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2589                 /* if quad port adapter, disable WoL on all but port A */
2590                 if (global_quad_port_a != 0)
2591                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2592                 else
2593                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2594                 /* Reset for multiple quad port adapters */
2595                 if (++global_quad_port_a == 4)
2596                         global_quad_port_a = 0;
2597                 break;
2598         default:
2599                 /* If the device can't wake, don't set software support */
2600                 if (!device_can_wakeup(&adapter->pdev->dev))
2601                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2602         }
2603
2604         /* initialize the wol settings based on the eeprom settings */
2605         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2606                 adapter->wol |= E1000_WUFC_MAG;
2607
2608         /* Some vendors want WoL disabled by default, but still supported */
2609         if ((hw->mac.type == e1000_i350) &&
2610             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2611                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2612                 adapter->wol = 0;
2613         }
2614
2615         /* Some vendors want the ability to Use the EEPROM setting as
2616          * enable/disable only, and not for capability
2617          */
2618         if (((hw->mac.type == e1000_i350) ||
2619              (hw->mac.type == e1000_i354)) &&
2620             (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
2621                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2622                 adapter->wol = 0;
2623         }
2624         if (hw->mac.type == e1000_i350) {
2625                 if (((pdev->subsystem_device == 0x5001) ||
2626                      (pdev->subsystem_device == 0x5002)) &&
2627                                 (hw->bus.func == 0)) {
2628                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2629                         adapter->wol = 0;
2630                 }
2631                 if (pdev->subsystem_device == 0x1F52)
2632                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2633         }
2634
2635         device_set_wakeup_enable(&adapter->pdev->dev,
2636                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2637
2638         /* reset the hardware with the new settings */
2639         igb_reset(adapter);
2640
2641         /* Init the I2C interface */
2642         err = igb_init_i2c(adapter);
2643         if (err) {
2644                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2645                 goto err_eeprom;
2646         }
2647
2648         /* let the f/w know that the h/w is now under the control of the
2649          * driver.
2650          */
2651         igb_get_hw_control(adapter);
2652
2653         strcpy(netdev->name, "eth%d");
2654         err = register_netdev(netdev);
2655         if (err)
2656                 goto err_register;
2657
2658         /* carrier off reporting is important to ethtool even BEFORE open */
2659         netif_carrier_off(netdev);
2660
2661 #ifdef CONFIG_IGB_DCA
2662         if (dca_add_requester(&pdev->dev) == 0) {
2663                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2664                 dev_info(&pdev->dev, "DCA enabled\n");
2665                 igb_setup_dca(adapter);
2666         }
2667
2668 #endif
2669 #ifdef CONFIG_IGB_HWMON
2670         /* Initialize the thermal sensor on i350 devices. */
2671         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2672                 u16 ets_word;
2673
2674                 /* Read the NVM to determine if this i350 device supports an
2675                  * external thermal sensor.
2676                  */
2677                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2678                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2679                         adapter->ets = true;
2680                 else
2681                         adapter->ets = false;
2682                 if (igb_sysfs_init(adapter))
2683                         dev_err(&pdev->dev,
2684                                 "failed to allocate sysfs resources\n");
2685         } else {
2686                 adapter->ets = false;
2687         }
2688 #endif
2689         /* Check if Media Autosense is enabled */
2690         adapter->ei = *ei;
2691         if (hw->dev_spec._82575.mas_capable)
2692                 igb_init_mas(adapter);
2693
2694         /* do hw tstamp init after resetting */
2695         igb_ptp_init(adapter);
2696
2697         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2698         /* print bus type/speed/width info, not applicable to i354 */
2699         if (hw->mac.type != e1000_i354) {
2700                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2701                          netdev->name,
2702                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2703                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2704                            "unknown"),
2705                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2706                           "Width x4" :
2707                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
2708                           "Width x2" :
2709                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
2710                           "Width x1" : "unknown"), netdev->dev_addr);
2711         }
2712
2713         if ((hw->mac.type >= e1000_i210 ||
2714              igb_get_flash_presence_i210(hw))) {
2715                 ret_val = igb_read_part_string(hw, part_str,
2716                                                E1000_PBANUM_LENGTH);
2717         } else {
2718                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
2719         }
2720
2721         if (ret_val)
2722                 strcpy(part_str, "Unknown");
2723         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2724         dev_info(&pdev->dev,
2725                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2726                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
2727                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2728                 adapter->num_rx_queues, adapter->num_tx_queues);
2729         if (hw->phy.media_type == e1000_media_type_copper) {
2730                 switch (hw->mac.type) {
2731                 case e1000_i350:
2732                 case e1000_i210:
2733                 case e1000_i211:
2734                         /* Enable EEE for internal copper PHY devices */
2735                         err = igb_set_eee_i350(hw, true, true);
2736                         if ((!err) &&
2737                             (!hw->dev_spec._82575.eee_disable)) {
2738                                 adapter->eee_advert =
2739                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2740                                 adapter->flags |= IGB_FLAG_EEE;
2741                         }
2742                         break;
2743                 case e1000_i354:
2744                         if ((rd32(E1000_CTRL_EXT) &
2745                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2746                                 err = igb_set_eee_i354(hw, true, true);
2747                                 if ((!err) &&
2748                                         (!hw->dev_spec._82575.eee_disable)) {
2749                                         adapter->eee_advert =
2750                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2751                                         adapter->flags |= IGB_FLAG_EEE;
2752                                 }
2753                         }
2754                         break;
2755                 default:
2756                         break;
2757                 }
2758         }
2759         pm_runtime_put_noidle(&pdev->dev);
2760         return 0;
2761
2762 err_register:
2763         igb_release_hw_control(adapter);
2764         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2765 err_eeprom:
2766         if (!igb_check_reset_block(hw))
2767                 igb_reset_phy(hw);
2768
2769         if (hw->flash_address)
2770                 iounmap(hw->flash_address);
2771 err_sw_init:
2772         kfree(adapter->shadow_vfta);
2773         igb_clear_interrupt_scheme(adapter);
2774 #ifdef CONFIG_PCI_IOV
2775         igb_disable_sriov(pdev);
2776 #endif
2777         pci_iounmap(pdev, adapter->io_addr);
2778 err_ioremap:
2779         free_netdev(netdev);
2780 err_alloc_etherdev:
2781         pci_disable_pcie_error_reporting(pdev);
2782         pci_release_mem_regions(pdev);
2783 err_pci_reg:
2784 err_dma:
2785         pci_disable_device(pdev);
2786         return err;
2787 }
2788
2789 #ifdef CONFIG_PCI_IOV
2790 static int igb_disable_sriov(struct pci_dev *pdev)
2791 {
2792         struct net_device *netdev = pci_get_drvdata(pdev);
2793         struct igb_adapter *adapter = netdev_priv(netdev);
2794         struct e1000_hw *hw = &adapter->hw;
2795
2796         /* reclaim resources allocated to VFs */
2797         if (adapter->vf_data) {
2798                 /* disable iov and allow time for transactions to clear */
2799                 if (pci_vfs_assigned(pdev)) {
2800                         dev_warn(&pdev->dev,
2801                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2802                         return -EPERM;
2803                 } else {
2804                         pci_disable_sriov(pdev);
2805                         msleep(500);
2806                 }
2807
2808                 kfree(adapter->vf_data);
2809                 adapter->vf_data = NULL;
2810                 adapter->vfs_allocated_count = 0;
2811                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2812                 wrfl();
2813                 msleep(100);
2814                 dev_info(&pdev->dev, "IOV Disabled\n");
2815
2816                 /* Re-enable DMA Coalescing flag since IOV is turned off */
2817                 adapter->flags |= IGB_FLAG_DMAC;
2818         }
2819
2820         return 0;
2821 }
2822
2823 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2824 {
2825         struct net_device *netdev = pci_get_drvdata(pdev);
2826         struct igb_adapter *adapter = netdev_priv(netdev);
2827         int old_vfs = pci_num_vf(pdev);
2828         int err = 0;
2829         int i;
2830
2831         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
2832                 err = -EPERM;
2833                 goto out;
2834         }
2835         if (!num_vfs)
2836                 goto out;
2837
2838         if (old_vfs) {
2839                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2840                          old_vfs, max_vfs);
2841                 adapter->vfs_allocated_count = old_vfs;
2842         } else
2843                 adapter->vfs_allocated_count = num_vfs;
2844
2845         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2846                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2847
2848         /* if allocation failed then we do not support SR-IOV */
2849         if (!adapter->vf_data) {
2850                 adapter->vfs_allocated_count = 0;
2851                 dev_err(&pdev->dev,
2852                         "Unable to allocate memory for VF Data Storage\n");
2853                 err = -ENOMEM;
2854                 goto out;
2855         }
2856
2857         /* only call pci_enable_sriov() if no VFs are allocated already */
2858         if (!old_vfs) {
2859                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2860                 if (err)
2861                         goto err_out;
2862         }
2863         dev_info(&pdev->dev, "%d VFs allocated\n",
2864                  adapter->vfs_allocated_count);
2865         for (i = 0; i < adapter->vfs_allocated_count; i++)
2866                 igb_vf_configure(adapter, i);
2867
2868         /* DMA Coalescing is not supported in IOV mode. */
2869         adapter->flags &= ~IGB_FLAG_DMAC;
2870         goto out;
2871
2872 err_out:
2873         kfree(adapter->vf_data);
2874         adapter->vf_data = NULL;
2875         adapter->vfs_allocated_count = 0;
2876 out:
2877         return err;
2878 }
2879
2880 #endif
2881 /**
2882  *  igb_remove_i2c - Cleanup  I2C interface
2883  *  @adapter: pointer to adapter structure
2884  **/
2885 static void igb_remove_i2c(struct igb_adapter *adapter)
2886 {
2887         /* free the adapter bus structure */
2888         i2c_del_adapter(&adapter->i2c_adap);
2889 }
2890
2891 /**
2892  *  igb_remove - Device Removal Routine
2893  *  @pdev: PCI device information struct
2894  *
2895  *  igb_remove is called by the PCI subsystem to alert the driver
2896  *  that it should release a PCI device.  The could be caused by a
2897  *  Hot-Plug event, or because the driver is going to be removed from
2898  *  memory.
2899  **/
2900 static void igb_remove(struct pci_dev *pdev)
2901 {
2902         struct net_device *netdev = pci_get_drvdata(pdev);
2903         struct igb_adapter *adapter = netdev_priv(netdev);
2904         struct e1000_hw *hw = &adapter->hw;
2905
2906         pm_runtime_get_noresume(&pdev->dev);
2907 #ifdef CONFIG_IGB_HWMON
2908         igb_sysfs_exit(adapter);
2909 #endif
2910         igb_remove_i2c(adapter);
2911         igb_ptp_stop(adapter);
2912         /* The watchdog timer may be rescheduled, so explicitly
2913          * disable watchdog from being rescheduled.
2914          */
2915         set_bit(__IGB_DOWN, &adapter->state);
2916         del_timer_sync(&adapter->watchdog_timer);
2917         del_timer_sync(&adapter->phy_info_timer);
2918
2919         cancel_work_sync(&adapter->reset_task);
2920         cancel_work_sync(&adapter->watchdog_task);
2921
2922 #ifdef CONFIG_IGB_DCA
2923         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2924                 dev_info(&pdev->dev, "DCA disabled\n");
2925                 dca_remove_requester(&pdev->dev);
2926                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2927                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2928         }
2929 #endif
2930
2931         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2932          * would have already happened in close and is redundant.
2933          */
2934         igb_release_hw_control(adapter);
2935
2936 #ifdef CONFIG_PCI_IOV
2937         igb_disable_sriov(pdev);
2938 #endif
2939
2940         unregister_netdev(netdev);
2941
2942         igb_clear_interrupt_scheme(adapter);
2943
2944         pci_iounmap(pdev, adapter->io_addr);
2945         if (hw->flash_address)
2946                 iounmap(hw->flash_address);
2947         pci_release_mem_regions(pdev);
2948
2949         kfree(adapter->shadow_vfta);
2950         free_netdev(netdev);
2951
2952         pci_disable_pcie_error_reporting(pdev);
2953
2954         pci_disable_device(pdev);
2955 }
2956
2957 /**
2958  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2959  *  @adapter: board private structure to initialize
2960  *
2961  *  This function initializes the vf specific data storage and then attempts to
2962  *  allocate the VFs.  The reason for ordering it this way is because it is much
2963  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
2964  *  the memory for the VFs.
2965  **/
2966 static void igb_probe_vfs(struct igb_adapter *adapter)
2967 {
2968 #ifdef CONFIG_PCI_IOV
2969         struct pci_dev *pdev = adapter->pdev;
2970         struct e1000_hw *hw = &adapter->hw;
2971
2972         /* Virtualization features not supported on i210 family. */
2973         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2974                 return;
2975
2976         /* Of the below we really only want the effect of getting
2977          * IGB_FLAG_HAS_MSIX set (if available), without which
2978          * igb_enable_sriov() has no effect.
2979          */
2980         igb_set_interrupt_capability(adapter, true);
2981         igb_reset_interrupt_capability(adapter);
2982
2983         pci_sriov_set_totalvfs(pdev, 7);
2984         igb_enable_sriov(pdev, max_vfs);
2985
2986 #endif /* CONFIG_PCI_IOV */
2987 }
2988
2989 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2990 {
2991         struct e1000_hw *hw = &adapter->hw;
2992         u32 max_rss_queues;
2993
2994         /* Determine the maximum number of RSS queues supported. */
2995         switch (hw->mac.type) {
2996         case e1000_i211:
2997                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2998                 break;
2999         case e1000_82575:
3000         case e1000_i210:
3001                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
3002                 break;
3003         case e1000_i350:
3004                 /* I350 cannot do RSS and SR-IOV at the same time */
3005                 if (!!adapter->vfs_allocated_count) {
3006                         max_rss_queues = 1;
3007                         break;
3008                 }
3009                 /* fall through */
3010         case e1000_82576:
3011                 if (!!adapter->vfs_allocated_count) {
3012                         max_rss_queues = 2;
3013                         break;
3014                 }
3015                 /* fall through */
3016         case e1000_82580:
3017         case e1000_i354:
3018         default:
3019                 max_rss_queues = IGB_MAX_RX_QUEUES;
3020                 break;
3021         }
3022
3023         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
3024
3025         igb_set_flag_queue_pairs(adapter, max_rss_queues);
3026 }
3027
3028 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
3029                               const u32 max_rss_queues)
3030 {
3031         struct e1000_hw *hw = &adapter->hw;
3032
3033         /* Determine if we need to pair queues. */
3034         switch (hw->mac.type) {
3035         case e1000_82575:
3036         case e1000_i211:
3037                 /* Device supports enough interrupts without queue pairing. */
3038                 break;
3039         case e1000_82576:
3040         case e1000_82580:
3041         case e1000_i350:
3042         case e1000_i354:
3043         case e1000_i210:
3044         default:
3045                 /* If rss_queues > half of max_rss_queues, pair the queues in
3046                  * order to conserve interrupts due to limited supply.
3047                  */
3048                 if (adapter->rss_queues > (max_rss_queues / 2))
3049                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
3050                 else
3051                         adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
3052                 break;
3053         }
3054 }
3055
3056 /**
3057  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
3058  *  @adapter: board private structure to initialize
3059  *
3060  *  igb_sw_init initializes the Adapter private data structure.
3061  *  Fields are initialized based on PCI device information and
3062  *  OS network device settings (MTU size).
3063  **/
3064 static int igb_sw_init(struct igb_adapter *adapter)
3065 {
3066         struct e1000_hw *hw = &adapter->hw;
3067         struct net_device *netdev = adapter->netdev;
3068         struct pci_dev *pdev = adapter->pdev;
3069
3070         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3071
3072         /* set default ring sizes */
3073         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3074         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3075
3076         /* set default ITR values */
3077         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
3078         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
3079
3080         /* set default work limits */
3081         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3082
3083         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3084                                   VLAN_HLEN;
3085         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3086
3087         spin_lock_init(&adapter->nfc_lock);
3088         spin_lock_init(&adapter->stats64_lock);
3089 #ifdef CONFIG_PCI_IOV
3090         switch (hw->mac.type) {
3091         case e1000_82576:
3092         case e1000_i350:
3093                 if (max_vfs > 7) {
3094                         dev_warn(&pdev->dev,
3095                                  "Maximum of 7 VFs per PF, using max\n");
3096                         max_vfs = adapter->vfs_allocated_count = 7;
3097                 } else
3098                         adapter->vfs_allocated_count = max_vfs;
3099                 if (adapter->vfs_allocated_count)
3100                         dev_warn(&pdev->dev,
3101                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
3102                 break;
3103         default:
3104                 break;
3105         }
3106 #endif /* CONFIG_PCI_IOV */
3107
3108         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3109         adapter->flags |= IGB_FLAG_HAS_MSIX;
3110
3111         igb_probe_vfs(adapter);
3112
3113         igb_init_queue_configuration(adapter);
3114
3115         /* Setup and initialize a copy of the hw vlan table array */
3116         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
3117                                        GFP_ATOMIC);
3118         if (!adapter->shadow_vfta)
3119                 return -ENOMEM;
3120
3121         /* This call may decrease the number of queues */
3122         if (igb_init_interrupt_scheme(adapter, true)) {
3123                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
3124                 return -ENOMEM;
3125         }
3126
3127         /* Explicitly disable IRQ since the NIC can be in any state. */
3128         igb_irq_disable(adapter);
3129
3130         if (hw->mac.type >= e1000_i350)
3131                 adapter->flags &= ~IGB_FLAG_DMAC;
3132
3133         set_bit(__IGB_DOWN, &adapter->state);
3134         return 0;
3135 }
3136
3137 /**
3138  *  igb_open - Called when a network interface is made active
3139  *  @netdev: network interface device structure
3140  *
3141  *  Returns 0 on success, negative value on failure
3142  *
3143  *  The open entry point is called when a network interface is made
3144  *  active by the system (IFF_UP).  At this point all resources needed
3145  *  for transmit and receive operations are allocated, the interrupt
3146  *  handler is registered with the OS, the watchdog timer is started,
3147  *  and the stack is notified that the interface is ready.
3148  **/
3149 static int __igb_open(struct net_device *netdev, bool resuming)
3150 {
3151         struct igb_adapter *adapter = netdev_priv(netdev);
3152         struct e1000_hw *hw = &adapter->hw;
3153         struct pci_dev *pdev = adapter->pdev;
3154         int err;
3155         int i;
3156
3157         /* disallow open during test */
3158         if (test_bit(__IGB_TESTING, &adapter->state)) {
3159                 WARN_ON(resuming);
3160                 return -EBUSY;
3161         }
3162
3163         if (!resuming)
3164                 pm_runtime_get_sync(&pdev->dev);
3165
3166         netif_carrier_off(netdev);
3167
3168         /* allocate transmit descriptors */
3169         err = igb_setup_all_tx_resources(adapter);
3170         if (err)
3171                 goto err_setup_tx;
3172
3173         /* allocate receive descriptors */
3174         err = igb_setup_all_rx_resources(adapter);
3175         if (err)
3176                 goto err_setup_rx;
3177
3178         igb_power_up_link(adapter);
3179
3180         /* before we allocate an interrupt, we must be ready to handle it.
3181          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3182          * as soon as we call pci_request_irq, so we have to setup our
3183          * clean_rx handler before we do so.
3184          */
3185         igb_configure(adapter);
3186
3187         err = igb_request_irq(adapter);
3188         if (err)
3189                 goto err_req_irq;
3190
3191         /* Notify the stack of the actual queue counts. */
3192         err = netif_set_real_num_tx_queues(adapter->netdev,
3193                                            adapter->num_tx_queues);
3194         if (err)
3195                 goto err_set_queues;
3196
3197         err = netif_set_real_num_rx_queues(adapter->netdev,
3198                                            adapter->num_rx_queues);
3199         if (err)
3200                 goto err_set_queues;
3201
3202         /* From here on the code is the same as igb_up() */
3203         clear_bit(__IGB_DOWN, &adapter->state);
3204
3205         for (i = 0; i < adapter->num_q_vectors; i++)
3206                 napi_enable(&(adapter->q_vector[i]->napi));
3207
3208         /* Clear any pending interrupts. */
3209         rd32(E1000_ICR);
3210
3211         igb_irq_enable(adapter);
3212
3213         /* notify VFs that reset has been completed */
3214         if (adapter->vfs_allocated_count) {
3215                 u32 reg_data = rd32(E1000_CTRL_EXT);
3216
3217                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3218                 wr32(E1000_CTRL_EXT, reg_data);
3219         }
3220
3221         netif_tx_start_all_queues(netdev);
3222
3223         if (!resuming)
3224                 pm_runtime_put(&pdev->dev);
3225
3226         /* start the watchdog. */
3227         hw->mac.get_link_status = 1;
3228         schedule_work(&adapter->watchdog_task);
3229
3230         return 0;
3231
3232 err_set_queues:
3233         igb_free_irq(adapter);
3234 err_req_irq:
3235         igb_release_hw_control(adapter);
3236         igb_power_down_link(adapter);
3237         igb_free_all_rx_resources(adapter);
3238 err_setup_rx:
3239         igb_free_all_tx_resources(adapter);
3240 err_setup_tx:
3241         igb_reset(adapter);
3242         if (!resuming)
3243                 pm_runtime_put(&pdev->dev);
3244
3245         return err;
3246 }
3247
3248 int igb_open(struct net_device *netdev)
3249 {
3250         return __igb_open(netdev, false);
3251 }
3252
3253 /**
3254  *  igb_close - Disables a network interface
3255  *  @netdev: network interface device structure
3256  *
3257  *  Returns 0, this is not allowed to fail
3258  *
3259  *  The close entry point is called when an interface is de-activated
3260  *  by the OS.  The hardware is still under the driver's control, but
3261  *  needs to be disabled.  A global MAC reset is issued to stop the
3262  *  hardware, and all transmit and receive resources are freed.
3263  **/
3264 static int __igb_close(struct net_device *netdev, bool suspending)
3265 {
3266         struct igb_adapter *adapter = netdev_priv(netdev);
3267         struct pci_dev *pdev = adapter->pdev;
3268
3269         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3270
3271         if (!suspending)
3272                 pm_runtime_get_sync(&pdev->dev);
3273
3274         igb_down(adapter);
3275         igb_free_irq(adapter);
3276
3277         igb_nfc_filter_exit(adapter);
3278
3279         igb_free_all_tx_resources(adapter);
3280         igb_free_all_rx_resources(adapter);
3281
3282         if (!suspending)
3283                 pm_runtime_put_sync(&pdev->dev);
3284         return 0;
3285 }
3286
3287 int igb_close(struct net_device *netdev)
3288 {
3289         if (netif_device_present(netdev) || netdev->dismantle)
3290                 return __igb_close(netdev, false);
3291         return 0;
3292 }
3293
3294 /**
3295  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
3296  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
3297  *
3298  *  Return 0 on success, negative on failure
3299  **/
3300 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3301 {
3302         struct device *dev = tx_ring->dev;
3303         int size;
3304
3305         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3306
3307         tx_ring->tx_buffer_info = vzalloc(size);
3308         if (!tx_ring->tx_buffer_info)
3309                 goto err;
3310
3311         /* round up to nearest 4K */
3312         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3313         tx_ring->size = ALIGN(tx_ring->size, 4096);
3314
3315         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3316                                            &tx_ring->dma, GFP_KERNEL);
3317         if (!tx_ring->desc)
3318                 goto err;
3319
3320         tx_ring->next_to_use = 0;
3321         tx_ring->next_to_clean = 0;
3322
3323         return 0;
3324
3325 err:
3326         vfree(tx_ring->tx_buffer_info);
3327         tx_ring->tx_buffer_info = NULL;
3328         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
3329         return -ENOMEM;
3330 }
3331
3332 /**
3333  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
3334  *                               (Descriptors) for all queues
3335  *  @adapter: board private structure
3336  *
3337  *  Return 0 on success, negative on failure
3338  **/
3339 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3340 {
3341         struct pci_dev *pdev = adapter->pdev;
3342         int i, err = 0;
3343
3344         for (i = 0; i < adapter->num_tx_queues; i++) {
3345                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3346                 if (err) {
3347                         dev_err(&pdev->dev,
3348                                 "Allocation for Tx Queue %u failed\n", i);
3349                         for (i--; i >= 0; i--)
3350                                 igb_free_tx_resources(adapter->tx_ring[i]);
3351                         break;
3352                 }
3353         }
3354
3355         return err;
3356 }
3357
3358 /**
3359  *  igb_setup_tctl - configure the transmit control registers
3360  *  @adapter: Board private structure
3361  **/
3362 void igb_setup_tctl(struct igb_adapter *adapter)
3363 {
3364         struct e1000_hw *hw = &adapter->hw;
3365         u32 tctl;
3366
3367         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3368         wr32(E1000_TXDCTL(0), 0);
3369
3370         /* Program the Transmit Control Register */
3371         tctl = rd32(E1000_TCTL);
3372         tctl &= ~E1000_TCTL_CT;
3373         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3374                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3375
3376         igb_config_collision_dist(hw);
3377
3378         /* Enable transmits */
3379         tctl |= E1000_TCTL_EN;
3380
3381         wr32(E1000_TCTL, tctl);
3382 }
3383
3384 /**
3385  *  igb_configure_tx_ring - Configure transmit ring after Reset
3386  *  @adapter: board private structure
3387  *  @ring: tx ring to configure
3388  *
3389  *  Configure a transmit ring after a reset.
3390  **/
3391 void igb_configure_tx_ring(struct igb_adapter *adapter,
3392                            struct igb_ring *ring)
3393 {
3394         struct e1000_hw *hw = &adapter->hw;
3395         u32 txdctl = 0;
3396         u64 tdba = ring->dma;
3397         int reg_idx = ring->reg_idx;
3398
3399         /* disable the queue */
3400         wr32(E1000_TXDCTL(reg_idx), 0);
3401         wrfl();
3402         mdelay(10);
3403
3404         wr32(E1000_TDLEN(reg_idx),
3405              ring->count * sizeof(union e1000_adv_tx_desc));
3406         wr32(E1000_TDBAL(reg_idx),
3407              tdba & 0x00000000ffffffffULL);
3408         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3409
3410         ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
3411         wr32(E1000_TDH(reg_idx), 0);
3412         writel(0, ring->tail);
3413
3414         txdctl |= IGB_TX_PTHRESH;
3415         txdctl |= IGB_TX_HTHRESH << 8;
3416         txdctl |= IGB_TX_WTHRESH << 16;
3417
3418         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3419         wr32(E1000_TXDCTL(reg_idx), txdctl);
3420 }
3421
3422 /**
3423  *  igb_configure_tx - Configure transmit Unit after Reset
3424  *  @adapter: board private structure
3425  *
3426  *  Configure the Tx unit of the MAC after a reset.
3427  **/
3428 static void igb_configure_tx(struct igb_adapter *adapter)
3429 {
3430         int i;
3431
3432         for (i = 0; i < adapter->num_tx_queues; i++)
3433                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3434 }
3435
3436 /**
3437  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
3438  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
3439  *
3440  *  Returns 0 on success, negative on failure
3441  **/
3442 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3443 {
3444         struct device *dev = rx_ring->dev;
3445         int size;
3446
3447         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3448
3449         rx_ring->rx_buffer_info = vzalloc(size);
3450         if (!rx_ring->rx_buffer_info)
3451                 goto err;
3452
3453         /* Round up to nearest 4K */
3454         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3455         rx_ring->size = ALIGN(rx_ring->size, 4096);
3456
3457         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3458                                            &rx_ring->dma, GFP_KERNEL);
3459         if (!rx_ring->desc)
3460                 goto err;
3461
3462         rx_ring->next_to_alloc = 0;
3463         rx_ring->next_to_clean = 0;
3464         rx_ring->next_to_use = 0;
3465
3466         return 0;
3467
3468 err:
3469         vfree(rx_ring->rx_buffer_info);
3470         rx_ring->rx_buffer_info = NULL;
3471         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3472         return -ENOMEM;
3473 }
3474
3475 /**
3476  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
3477  *                               (Descriptors) for all queues
3478  *  @adapter: board private structure
3479  *
3480  *  Return 0 on success, negative on failure
3481  **/
3482 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3483 {
3484         struct pci_dev *pdev = adapter->pdev;
3485         int i, err = 0;
3486
3487         for (i = 0; i < adapter->num_rx_queues; i++) {
3488                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3489                 if (err) {
3490                         dev_err(&pdev->dev,
3491                                 "Allocation for Rx Queue %u failed\n", i);
3492                         for (i--; i >= 0; i--)
3493                                 igb_free_rx_resources(adapter->rx_ring[i]);
3494                         break;
3495                 }
3496         }
3497
3498         return err;
3499 }
3500
3501 /**
3502  *  igb_setup_mrqc - configure the multiple receive queue control registers
3503  *  @adapter: Board private structure
3504  **/
3505 static void igb_setup_mrqc(struct igb_adapter *adapter)
3506 {
3507         struct e1000_hw *hw = &adapter->hw;
3508         u32 mrqc, rxcsum;
3509         u32 j, num_rx_queues;
3510         u32 rss_key[10];
3511
3512         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3513         for (j = 0; j < 10; j++)
3514                 wr32(E1000_RSSRK(j), rss_key[j]);
3515
3516         num_rx_queues = adapter->rss_queues;
3517
3518         switch (hw->mac.type) {
3519         case e1000_82576:
3520                 /* 82576 supports 2 RSS queues for SR-IOV */
3521                 if (adapter->vfs_allocated_count)
3522                         num_rx_queues = 2;
3523                 break;
3524         default:
3525                 break;
3526         }
3527
3528         if (adapter->rss_indir_tbl_init != num_rx_queues) {
3529                 for (j = 0; j < IGB_RETA_SIZE; j++)
3530                         adapter->rss_indir_tbl[j] =
3531                         (j * num_rx_queues) / IGB_RETA_SIZE;
3532                 adapter->rss_indir_tbl_init = num_rx_queues;
3533         }
3534         igb_write_rss_indir_tbl(adapter);
3535
3536         /* Disable raw packet checksumming so that RSS hash is placed in
3537          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3538          * offloads as they are enabled by default
3539          */
3540         rxcsum = rd32(E1000_RXCSUM);
3541         rxcsum |= E1000_RXCSUM_PCSD;
3542
3543         if (adapter->hw.mac.type >= e1000_82576)
3544                 /* Enable Receive Checksum Offload for SCTP */
3545                 rxcsum |= E1000_RXCSUM_CRCOFL;
3546
3547         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3548         wr32(E1000_RXCSUM, rxcsum);
3549
3550         /* Generate RSS hash based on packet types, TCP/UDP
3551          * port numbers and/or IPv4/v6 src and dst addresses
3552          */
3553         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3554                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3555                E1000_MRQC_RSS_FIELD_IPV6 |
3556                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3557                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3558
3559         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3560                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3561         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3562                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3563
3564         /* If VMDq is enabled then we set the appropriate mode for that, else
3565          * we default to RSS so that an RSS hash is calculated per packet even
3566          * if we are only using one queue
3567          */
3568         if (adapter->vfs_allocated_count) {
3569                 if (hw->mac.type > e1000_82575) {
3570                         /* Set the default pool for the PF's first queue */
3571                         u32 vtctl = rd32(E1000_VT_CTL);
3572
3573                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3574                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3575                         vtctl |= adapter->vfs_allocated_count <<
3576                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3577                         wr32(E1000_VT_CTL, vtctl);
3578                 }
3579                 if (adapter->rss_queues > 1)
3580                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
3581                 else
3582                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3583         } else {
3584                 if (hw->mac.type != e1000_i211)
3585                         mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
3586         }
3587         igb_vmm_control(adapter);
3588
3589         wr32(E1000_MRQC, mrqc);
3590 }
3591
3592 /**
3593  *  igb_setup_rctl - configure the receive control registers
3594  *  @adapter: Board private structure
3595  **/
3596 void igb_setup_rctl(struct igb_adapter *adapter)
3597 {
3598         struct e1000_hw *hw = &adapter->hw;
3599         u32 rctl;
3600
3601         rctl = rd32(E1000_RCTL);
3602
3603         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3604         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3605
3606         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3607                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3608
3609         /* enable stripping of CRC. It's unlikely this will break BMC
3610          * redirection as it did with e1000. Newer features require
3611          * that the HW strips the CRC.
3612          */
3613         rctl |= E1000_RCTL_SECRC;
3614
3615         /* disable store bad packets and clear size bits. */
3616         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3617
3618         /* enable LPE to allow for reception of jumbo frames */
3619         rctl |= E1000_RCTL_LPE;
3620
3621         /* disable queue 0 to prevent tail write w/o re-config */
3622         wr32(E1000_RXDCTL(0), 0);
3623
3624         /* Attention!!!  For SR-IOV PF driver operations you must enable
3625          * queue drop for all VF and PF queues to prevent head of line blocking
3626          * if an un-trusted VF does not provide descriptors to hardware.
3627          */
3628         if (adapter->vfs_allocated_count) {
3629                 /* set all queue drop enable bits */
3630                 wr32(E1000_QDE, ALL_QUEUES);
3631         }
3632
3633         /* This is useful for sniffing bad packets. */
3634         if (adapter->netdev->features & NETIF_F_RXALL) {
3635                 /* UPE and MPE will be handled by normal PROMISC logic
3636                  * in e1000e_set_rx_mode
3637                  */
3638                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3639                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
3640                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3641
3642                 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
3643                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3644                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3645                  * and that breaks VLANs.
3646                  */
3647         }
3648
3649         wr32(E1000_RCTL, rctl);
3650 }
3651
3652 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3653                                    int vfn)
3654 {
3655         struct e1000_hw *hw = &adapter->hw;
3656         u32 vmolr;
3657
3658         if (size > MAX_JUMBO_FRAME_SIZE)
3659                 size = MAX_JUMBO_FRAME_SIZE;
3660
3661         vmolr = rd32(E1000_VMOLR(vfn));
3662         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3663         vmolr |= size | E1000_VMOLR_LPE;
3664         wr32(E1000_VMOLR(vfn), vmolr);
3665
3666         return 0;
3667 }
3668
3669 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3670                                          int vfn, bool enable)
3671 {
3672         struct e1000_hw *hw = &adapter->hw;
3673         u32 val, reg;
3674
3675         if (hw->mac.type < e1000_82576)
3676                 return;
3677
3678         if (hw->mac.type == e1000_i350)
3679                 reg = E1000_DVMOLR(vfn);
3680         else
3681                 reg = E1000_VMOLR(vfn);
3682
3683         val = rd32(reg);
3684         if (enable)
3685                 val |= E1000_VMOLR_STRVLAN;
3686         else
3687                 val &= ~(E1000_VMOLR_STRVLAN);
3688         wr32(reg, val);
3689 }
3690
3691 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3692                                  int vfn, bool aupe)
3693 {
3694         struct e1000_hw *hw = &adapter->hw;
3695         u32 vmolr;
3696
3697         /* This register exists only on 82576 and newer so if we are older then
3698          * we should exit and do nothing
3699          */
3700         if (hw->mac.type < e1000_82576)
3701                 return;
3702
3703         vmolr = rd32(E1000_VMOLR(vfn));
3704         if (aupe)
3705                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3706         else
3707                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3708
3709         /* clear all bits that might not be set */
3710         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3711
3712         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3713                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3714         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3715          * multicast packets
3716          */
3717         if (vfn <= adapter->vfs_allocated_count)
3718                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3719
3720         wr32(E1000_VMOLR(vfn), vmolr);
3721 }
3722
3723 /**
3724  *  igb_configure_rx_ring - Configure a receive ring after Reset
3725  *  @adapter: board private structure
3726  *  @ring: receive ring to be configured
3727  *
3728  *  Configure the Rx unit of the MAC after a reset.
3729  **/
3730 void igb_configure_rx_ring(struct igb_adapter *adapter,
3731                            struct igb_ring *ring)
3732 {
3733         struct e1000_hw *hw = &adapter->hw;
3734         u64 rdba = ring->dma;
3735         int reg_idx = ring->reg_idx;
3736         u32 srrctl = 0, rxdctl = 0;
3737
3738         /* disable the queue */
3739         wr32(E1000_RXDCTL(reg_idx), 0);
3740
3741         /* Set DMA base address registers */
3742         wr32(E1000_RDBAL(reg_idx),
3743              rdba & 0x00000000ffffffffULL);
3744         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3745         wr32(E1000_RDLEN(reg_idx),
3746              ring->count * sizeof(union e1000_adv_rx_desc));
3747
3748         /* initialize head and tail */
3749         ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
3750         wr32(E1000_RDH(reg_idx), 0);
3751         writel(0, ring->tail);
3752
3753         /* set descriptor configuration */
3754         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3755         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3756         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3757         if (hw->mac.type >= e1000_82580)
3758                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3759         /* Only set Drop Enable if we are supporting multiple queues */
3760         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3761                 srrctl |= E1000_SRRCTL_DROP_EN;
3762
3763         wr32(E1000_SRRCTL(reg_idx), srrctl);
3764
3765         /* set filtering for VMDQ pools */
3766         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3767
3768         rxdctl |= IGB_RX_PTHRESH;
3769         rxdctl |= IGB_RX_HTHRESH << 8;
3770         rxdctl |= IGB_RX_WTHRESH << 16;
3771
3772         /* enable receive descriptor fetching */
3773         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3774         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3775 }
3776
3777 /**
3778  *  igb_configure_rx - Configure receive Unit after Reset
3779  *  @adapter: board private structure
3780  *
3781  *  Configure the Rx unit of the MAC after a reset.
3782  **/
3783 static void igb_configure_rx(struct igb_adapter *adapter)
3784 {
3785         int i;
3786
3787         /* set the correct pool for the PF default MAC address in entry 0 */
3788         igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3789                          adapter->vfs_allocated_count);
3790
3791         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3792          * the Base and Length of the Rx Descriptor Ring
3793          */
3794         for (i = 0; i < adapter->num_rx_queues; i++)
3795                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3796 }
3797
3798 /**
3799  *  igb_free_tx_resources - Free Tx Resources per Queue
3800  *  @tx_ring: Tx descriptor ring for a specific queue
3801  *
3802  *  Free all transmit software resources
3803  **/
3804 void igb_free_tx_resources(struct igb_ring *tx_ring)
3805 {
3806         igb_clean_tx_ring(tx_ring);
3807
3808         vfree(tx_ring->tx_buffer_info);
3809         tx_ring->tx_buffer_info = NULL;
3810
3811         /* if not set, then don't free */
3812         if (!tx_ring->desc)
3813                 return;
3814
3815         dma_free_coherent(tx_ring->dev, tx_ring->size,
3816                           tx_ring->desc, tx_ring->dma);
3817
3818         tx_ring->desc = NULL;
3819 }
3820
3821 /**
3822  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
3823  *  @adapter: board private structure
3824  *
3825  *  Free all transmit software resources
3826  **/
3827 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3828 {
3829         int i;
3830
3831         for (i = 0; i < adapter->num_tx_queues; i++)
3832                 if (adapter->tx_ring[i])
3833                         igb_free_tx_resources(adapter->tx_ring[i]);
3834 }
3835
3836 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3837                                     struct igb_tx_buffer *tx_buffer)
3838 {
3839         if (tx_buffer->skb) {
3840                 dev_kfree_skb_any(tx_buffer->skb);
3841                 if (dma_unmap_len(tx_buffer, len))
3842                         dma_unmap_single(ring->dev,
3843                                          dma_unmap_addr(tx_buffer, dma),
3844                                          dma_unmap_len(tx_buffer, len),
3845                                          DMA_TO_DEVICE);
3846         } else if (dma_unmap_len(tx_buffer, len)) {
3847                 dma_unmap_page(ring->dev,
3848                                dma_unmap_addr(tx_buffer, dma),
3849                                dma_unmap_len(tx_buffer, len),
3850                                DMA_TO_DEVICE);
3851         }
3852         tx_buffer->next_to_watch = NULL;
3853         tx_buffer->skb = NULL;
3854         dma_unmap_len_set(tx_buffer, len, 0);
3855         /* buffer_info must be completely set up in the transmit path */
3856 }
3857
3858 /**
3859  *  igb_clean_tx_ring - Free Tx Buffers
3860  *  @tx_ring: ring to be cleaned
3861  **/
3862 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3863 {
3864         struct igb_tx_buffer *buffer_info;
3865         unsigned long size;
3866         u16 i;
3867
3868         if (!tx_ring->tx_buffer_info)
3869                 return;
3870         /* Free all the Tx ring sk_buffs */
3871
3872         for (i = 0; i < tx_ring->count; i++) {
3873                 buffer_info = &tx_ring->tx_buffer_info[i];
3874                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3875         }
3876
3877         netdev_tx_reset_queue(txring_txq(tx_ring));
3878
3879         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3880         memset(tx_ring->tx_buffer_info, 0, size);
3881
3882         /* Zero out the descriptor ring */
3883         memset(tx_ring->desc, 0, tx_ring->size);
3884
3885         tx_ring->next_to_use = 0;
3886         tx_ring->next_to_clean = 0;
3887 }
3888
3889 /**
3890  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
3891  *  @adapter: board private structure
3892  **/
3893 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3894 {
3895         int i;
3896
3897         for (i = 0; i < adapter->num_tx_queues; i++)
3898                 if (adapter->tx_ring[i])
3899                         igb_clean_tx_ring(adapter->tx_ring[i]);
3900 }
3901
3902 /**
3903  *  igb_free_rx_resources - Free Rx Resources
3904  *  @rx_ring: ring to clean the resources from
3905  *
3906  *  Free all receive software resources
3907  **/
3908 void igb_free_rx_resources(struct igb_ring *rx_ring)
3909 {
3910         igb_clean_rx_ring(rx_ring);
3911
3912         vfree(rx_ring->rx_buffer_info);
3913         rx_ring->rx_buffer_info = NULL;
3914
3915         /* if not set, then don't free */
3916         if (!rx_ring->desc)
3917                 return;
3918
3919         dma_free_coherent(rx_ring->dev, rx_ring->size,
3920                           rx_ring->desc, rx_ring->dma);
3921
3922         rx_ring->desc = NULL;
3923 }
3924
3925 /**
3926  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
3927  *  @adapter: board private structure
3928  *
3929  *  Free all receive software resources
3930  **/
3931 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3932 {
3933         int i;
3934
3935         for (i = 0; i < adapter->num_rx_queues; i++)
3936                 if (adapter->rx_ring[i])
3937                         igb_free_rx_resources(adapter->rx_ring[i]);
3938 }
3939
3940 /**
3941  *  igb_clean_rx_ring - Free Rx Buffers per Queue
3942  *  @rx_ring: ring to free buffers from
3943  **/
3944 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3945 {
3946         unsigned long size;
3947         u16 i;
3948
3949         if (rx_ring->skb)
3950                 dev_kfree_skb(rx_ring->skb);
3951         rx_ring->skb = NULL;
3952
3953         if (!rx_ring->rx_buffer_info)
3954                 return;
3955
3956         /* Free all the Rx ring sk_buffs */
3957         for (i = 0; i < rx_ring->count; i++) {
3958                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3959
3960                 if (!buffer_info->page)
3961                         continue;
3962
3963                 dma_unmap_page(rx_ring->dev,
3964                                buffer_info->dma,
3965                                PAGE_SIZE,
3966                                DMA_FROM_DEVICE);
3967                 __free_page(buffer_info->page);
3968
3969                 buffer_info->page = NULL;
3970         }
3971
3972         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3973         memset(rx_ring->rx_buffer_info, 0, size);
3974
3975         /* Zero out the descriptor ring */
3976         memset(rx_ring->desc, 0, rx_ring->size);
3977
3978         rx_ring->next_to_alloc = 0;
3979         rx_ring->next_to_clean = 0;
3980         rx_ring->next_to_use = 0;
3981 }
3982
3983 /**
3984  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
3985  *  @adapter: board private structure
3986  **/
3987 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3988 {
3989         int i;
3990
3991         for (i = 0; i < adapter->num_rx_queues; i++)
3992                 if (adapter->rx_ring[i])
3993                         igb_clean_rx_ring(adapter->rx_ring[i]);
3994 }
3995
3996 /**
3997  *  igb_set_mac - Change the Ethernet Address of the NIC
3998  *  @netdev: network interface device structure
3999  *  @p: pointer to an address structure
4000  *
4001  *  Returns 0 on success, negative on failure
4002  **/
4003 static int igb_set_mac(struct net_device *netdev, void *p)
4004 {
4005         struct igb_adapter *adapter = netdev_priv(netdev);
4006         struct e1000_hw *hw = &adapter->hw;
4007         struct sockaddr *addr = p;
4008
4009         if (!is_valid_ether_addr(addr->sa_data))
4010                 return -EADDRNOTAVAIL;
4011
4012         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4013         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4014
4015         /* set the correct pool for the new PF MAC address in entry 0 */
4016         igb_rar_set_qsel(adapter, hw->mac.addr, 0,
4017                          adapter->vfs_allocated_count);
4018
4019         return 0;
4020 }
4021
4022 /**
4023  *  igb_write_mc_addr_list - write multicast addresses to MTA
4024  *  @netdev: network interface device structure
4025  *
4026  *  Writes multicast address list to the MTA hash table.
4027  *  Returns: -ENOMEM on failure
4028  *           0 on no addresses written
4029  *           X on writing X addresses to MTA
4030  **/
4031 static int igb_write_mc_addr_list(struct net_device *netdev)
4032 {
4033         struct igb_adapter *adapter = netdev_priv(netdev);
4034         struct e1000_hw *hw = &adapter->hw;
4035         struct netdev_hw_addr *ha;
4036         u8  *mta_list;
4037         int i;
4038
4039         if (netdev_mc_empty(netdev)) {
4040                 /* nothing to program, so clear mc list */
4041                 igb_update_mc_addr_list(hw, NULL, 0);
4042                 igb_restore_vf_multicasts(adapter);
4043                 return 0;
4044         }
4045
4046         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
4047         if (!mta_list)
4048                 return -ENOMEM;
4049
4050         /* The shared function expects a packed array of only addresses. */
4051         i = 0;
4052         netdev_for_each_mc_addr(ha, netdev)
4053                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4054
4055         igb_update_mc_addr_list(hw, mta_list, i);
4056         kfree(mta_list);
4057
4058         return netdev_mc_count(netdev);
4059 }
4060
4061 /**
4062  *  igb_write_uc_addr_list - write unicast addresses to RAR table
4063  *  @netdev: network interface device structure
4064  *
4065  *  Writes unicast address list to the RAR table.
4066  *  Returns: -ENOMEM on failure/insufficient address space
4067  *           0 on no addresses written
4068  *           X on writing X addresses to the RAR table
4069  **/
4070 static int igb_write_uc_addr_list(struct net_device *netdev)
4071 {
4072         struct igb_adapter *adapter = netdev_priv(netdev);
4073         struct e1000_hw *hw = &adapter->hw;
4074         unsigned int vfn = adapter->vfs_allocated_count;
4075         unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
4076         int count = 0;
4077
4078         /* return ENOMEM indicating insufficient memory for addresses */
4079         if (netdev_uc_count(netdev) > rar_entries)
4080                 return -ENOMEM;
4081
4082         if (!netdev_uc_empty(netdev) && rar_entries) {
4083                 struct netdev_hw_addr *ha;
4084
4085                 netdev_for_each_uc_addr(ha, netdev) {
4086                         if (!rar_entries)
4087                                 break;
4088                         igb_rar_set_qsel(adapter, ha->addr,
4089                                          rar_entries--,
4090                                          vfn);
4091                         count++;
4092                 }
4093         }
4094         /* write the addresses in reverse order to avoid write combining */
4095         for (; rar_entries > 0 ; rar_entries--) {
4096                 wr32(E1000_RAH(rar_entries), 0);
4097                 wr32(E1000_RAL(rar_entries), 0);
4098         }
4099         wrfl();
4100
4101         return count;
4102 }
4103
4104 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
4105 {
4106         struct e1000_hw *hw = &adapter->hw;
4107         u32 i, pf_id;
4108
4109         switch (hw->mac.type) {
4110         case e1000_i210:
4111         case e1000_i211:
4112         case e1000_i350:
4113                 /* VLAN filtering needed for VLAN prio filter */
4114                 if (adapter->netdev->features & NETIF_F_NTUPLE)
4115                         break;
4116                 /* fall through */
4117         case e1000_82576:
4118         case e1000_82580:
4119         case e1000_i354:
4120                 /* VLAN filtering needed for pool filtering */
4121                 if (adapter->vfs_allocated_count)
4122                         break;
4123                 /* fall through */
4124         default:
4125                 return 1;
4126         }
4127
4128         /* We are already in VLAN promisc, nothing to do */
4129         if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
4130                 return 0;
4131
4132         if (!adapter->vfs_allocated_count)
4133                 goto set_vfta;
4134
4135         /* Add PF to all active pools */
4136         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4137
4138         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4139                 u32 vlvf = rd32(E1000_VLVF(i));
4140
4141                 vlvf |= BIT(pf_id);
4142                 wr32(E1000_VLVF(i), vlvf);
4143         }
4144
4145 set_vfta:
4146         /* Set all bits in the VLAN filter table array */
4147         for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
4148                 hw->mac.ops.write_vfta(hw, i, ~0U);
4149
4150         /* Set flag so we don't redo unnecessary work */
4151         adapter->flags |= IGB_FLAG_VLAN_PROMISC;
4152
4153         return 0;
4154 }
4155
4156 #define VFTA_BLOCK_SIZE 8
4157 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
4158 {
4159         struct e1000_hw *hw = &adapter->hw;
4160         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4161         u32 vid_start = vfta_offset * 32;
4162         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4163         u32 i, vid, word, bits, pf_id;
4164
4165         /* guarantee that we don't scrub out management VLAN */
4166         vid = adapter->mng_vlan_id;
4167         if (vid >= vid_start && vid < vid_end)
4168                 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4169
4170         if (!adapter->vfs_allocated_count)
4171                 goto set_vfta;
4172
4173         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4174
4175         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4176                 u32 vlvf = rd32(E1000_VLVF(i));
4177
4178                 /* pull VLAN ID from VLVF */
4179                 vid = vlvf & VLAN_VID_MASK;
4180
4181                 /* only concern ourselves with a certain range */
4182                 if (vid < vid_start || vid >= vid_end)
4183                         continue;
4184
4185                 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
4186                         /* record VLAN ID in VFTA */
4187                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4188
4189                         /* if PF is part of this then continue */
4190                         if (test_bit(vid, adapter->active_vlans))
4191                                 continue;
4192                 }
4193
4194                 /* remove PF from the pool */
4195                 bits = ~BIT(pf_id);
4196                 bits &= rd32(E1000_VLVF(i));
4197                 wr32(E1000_VLVF(i), bits);
4198         }
4199
4200 set_vfta:
4201         /* extract values from active_vlans and write back to VFTA */
4202         for (i = VFTA_BLOCK_SIZE; i--;) {
4203                 vid = (vfta_offset + i) * 32;
4204                 word = vid / BITS_PER_LONG;
4205                 bits = vid % BITS_PER_LONG;
4206
4207                 vfta[i] |= adapter->active_vlans[word] >> bits;
4208
4209                 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
4210         }
4211 }
4212
4213 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
4214 {
4215         u32 i;
4216
4217         /* We are not in VLAN promisc, nothing to do */
4218         if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
4219                 return;
4220
4221         /* Set flag so we don't redo unnecessary work */
4222         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
4223
4224         for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
4225                 igb_scrub_vfta(adapter, i);
4226 }
4227
4228 /**
4229  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4230  *  @netdev: network interface device structure
4231  *
4232  *  The set_rx_mode entry point is called whenever the unicast or multicast
4233  *  address lists or the network interface flags are updated.  This routine is
4234  *  responsible for configuring the hardware for proper unicast, multicast,
4235  *  promiscuous mode, and all-multi behavior.
4236  **/
4237 static void igb_set_rx_mode(struct net_device *netdev)
4238 {
4239         struct igb_adapter *adapter = netdev_priv(netdev);
4240         struct e1000_hw *hw = &adapter->hw;
4241         unsigned int vfn = adapter->vfs_allocated_count;
4242         u32 rctl = 0, vmolr = 0;
4243         int count;
4244
4245         /* Check for Promiscuous and All Multicast modes */
4246         if (netdev->flags & IFF_PROMISC) {
4247                 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
4248                 vmolr |= E1000_VMOLR_MPME;
4249
4250                 /* enable use of UTA filter to force packets to default pool */
4251                 if (hw->mac.type == e1000_82576)
4252                         vmolr |= E1000_VMOLR_ROPE;
4253         } else {
4254                 if (netdev->flags & IFF_ALLMULTI) {
4255                         rctl |= E1000_RCTL_MPE;
4256                         vmolr |= E1000_VMOLR_MPME;
4257                 } else {
4258                         /* Write addresses to the MTA, if the attempt fails
4259                          * then we should just turn on promiscuous mode so
4260                          * that we can at least receive multicast traffic
4261                          */
4262                         count = igb_write_mc_addr_list(netdev);
4263                         if (count < 0) {
4264                                 rctl |= E1000_RCTL_MPE;
4265                                 vmolr |= E1000_VMOLR_MPME;
4266                         } else if (count) {
4267                                 vmolr |= E1000_VMOLR_ROMPE;
4268                         }
4269                 }
4270         }
4271
4272         /* Write addresses to available RAR registers, if there is not
4273          * sufficient space to store all the addresses then enable
4274          * unicast promiscuous mode
4275          */
4276         count = igb_write_uc_addr_list(netdev);
4277         if (count < 0) {
4278                 rctl |= E1000_RCTL_UPE;
4279                 vmolr |= E1000_VMOLR_ROPE;
4280         }
4281
4282         /* enable VLAN filtering by default */
4283         rctl |= E1000_RCTL_VFE;
4284
4285         /* disable VLAN filtering for modes that require it */
4286         if ((netdev->flags & IFF_PROMISC) ||
4287             (netdev->features & NETIF_F_RXALL)) {
4288                 /* if we fail to set all rules then just clear VFE */
4289                 if (igb_vlan_promisc_enable(adapter))
4290                         rctl &= ~E1000_RCTL_VFE;
4291         } else {
4292                 igb_vlan_promisc_disable(adapter);
4293         }
4294
4295         /* update state of unicast, multicast, and VLAN filtering modes */
4296         rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
4297                                      E1000_RCTL_VFE);
4298         wr32(E1000_RCTL, rctl);
4299
4300         /* In order to support SR-IOV and eventually VMDq it is necessary to set
4301          * the VMOLR to enable the appropriate modes.  Without this workaround
4302          * we will have issues with VLAN tag stripping not being done for frames
4303          * that are only arriving because we are the default pool
4304          */
4305         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
4306                 return;
4307
4308         /* set UTA to appropriate mode */
4309         igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
4310
4311         vmolr |= rd32(E1000_VMOLR(vfn)) &
4312                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4313
4314         /* enable Rx jumbo frames, no need for restriction */
4315         vmolr &= ~E1000_VMOLR_RLPML_MASK;
4316         vmolr |= MAX_JUMBO_FRAME_SIZE | E1000_VMOLR_LPE;
4317
4318         wr32(E1000_VMOLR(vfn), vmolr);
4319         wr32(E1000_RLPML, MAX_JUMBO_FRAME_SIZE);
4320
4321         igb_restore_vf_multicasts(adapter);
4322 }
4323
4324 static void igb_check_wvbr(struct igb_adapter *adapter)
4325 {
4326         struct e1000_hw *hw = &adapter->hw;
4327         u32 wvbr = 0;
4328
4329         switch (hw->mac.type) {
4330         case e1000_82576:
4331         case e1000_i350:
4332                 wvbr = rd32(E1000_WVBR);
4333                 if (!wvbr)
4334                         return;
4335                 break;
4336         default:
4337                 break;
4338         }
4339
4340         adapter->wvbr |= wvbr;
4341 }
4342
4343 #define IGB_STAGGERED_QUEUE_OFFSET 8
4344
4345 static void igb_spoof_check(struct igb_adapter *adapter)
4346 {
4347         int j;
4348
4349         if (!adapter->wvbr)
4350                 return;
4351
4352         for (j = 0; j < adapter->vfs_allocated_count; j++) {
4353                 if (adapter->wvbr & BIT(j) ||
4354                     adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
4355                         dev_warn(&adapter->pdev->dev,
4356                                 "Spoof event(s) detected on VF %d\n", j);
4357                         adapter->wvbr &=
4358                                 ~(BIT(j) |
4359                                   BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
4360                 }
4361         }
4362 }
4363
4364 /* Need to wait a few seconds after link up to get diagnostic information from
4365  * the phy
4366  */
4367 static void igb_update_phy_info(unsigned long data)
4368 {
4369         struct igb_adapter *adapter = (struct igb_adapter *) data;
4370         igb_get_phy_info(&adapter->hw);
4371 }
4372
4373 /**
4374  *  igb_has_link - check shared code for link and determine up/down
4375  *  @adapter: pointer to driver private info
4376  **/
4377 bool igb_has_link(struct igb_adapter *adapter)
4378 {
4379         struct e1000_hw *hw = &adapter->hw;
4380         bool link_active = false;
4381
4382         /* get_link_status is set on LSC (link status) interrupt or
4383          * rx sequence error interrupt.  get_link_status will stay
4384          * false until the e1000_check_for_link establishes link
4385          * for copper adapters ONLY
4386          */
4387         switch (hw->phy.media_type) {
4388         case e1000_media_type_copper:
4389                 if (!hw->mac.get_link_status)
4390                         return true;
4391         case e1000_media_type_internal_serdes:
4392                 hw->mac.ops.check_for_link(hw);
4393                 link_active = !hw->mac.get_link_status;
4394                 break;
4395         default:
4396         case e1000_media_type_unknown:
4397                 break;
4398         }
4399
4400         if (((hw->mac.type == e1000_i210) ||
4401              (hw->mac.type == e1000_i211)) &&
4402              (hw->phy.id == I210_I_PHY_ID)) {
4403                 if (!netif_carrier_ok(adapter->netdev)) {
4404                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4405                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4406                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4407                         adapter->link_check_timeout = jiffies;
4408                 }
4409         }
4410
4411         return link_active;
4412 }
4413
4414 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
4415 {
4416         bool ret = false;
4417         u32 ctrl_ext, thstat;
4418
4419         /* check for thermal sensor event on i350 copper only */
4420         if (hw->mac.type == e1000_i350) {
4421                 thstat = rd32(E1000_THSTAT);
4422                 ctrl_ext = rd32(E1000_CTRL_EXT);
4423
4424                 if ((hw->phy.media_type == e1000_media_type_copper) &&
4425                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
4426                         ret = !!(thstat & event);
4427         }
4428
4429         return ret;
4430 }
4431
4432 /**
4433  *  igb_check_lvmmc - check for malformed packets received
4434  *  and indicated in LVMMC register
4435  *  @adapter: pointer to adapter
4436  **/
4437 static void igb_check_lvmmc(struct igb_adapter *adapter)
4438 {
4439         struct e1000_hw *hw = &adapter->hw;
4440         u32 lvmmc;
4441
4442         lvmmc = rd32(E1000_LVMMC);
4443         if (lvmmc) {
4444                 if (unlikely(net_ratelimit())) {
4445                         netdev_warn(adapter->netdev,
4446                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
4447                                     lvmmc);
4448                 }
4449         }
4450 }
4451
4452 /**
4453  *  igb_watchdog - Timer Call-back
4454  *  @data: pointer to adapter cast into an unsigned long
4455  **/
4456 static void igb_watchdog(unsigned long data)
4457 {
4458         struct igb_adapter *adapter = (struct igb_adapter *)data;
4459         /* Do the rest outside of interrupt context */
4460         schedule_work(&adapter->watchdog_task);
4461 }
4462
4463 static void igb_watchdog_task(struct work_struct *work)
4464 {
4465         struct igb_adapter *adapter = container_of(work,
4466                                                    struct igb_adapter,
4467                                                    watchdog_task);
4468         struct e1000_hw *hw = &adapter->hw;
4469         struct e1000_phy_info *phy = &hw->phy;
4470         struct net_device *netdev = adapter->netdev;
4471         u32 link;
4472         int i;
4473         u32 connsw;
4474         u16 phy_data, retry_count = 20;
4475
4476         link = igb_has_link(adapter);
4477
4478         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4479                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4480                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4481                 else
4482                         link = false;
4483         }
4484
4485         /* Force link down if we have fiber to swap to */
4486         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4487                 if (hw->phy.media_type == e1000_media_type_copper) {
4488                         connsw = rd32(E1000_CONNSW);
4489                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4490                                 link = 0;
4491                 }
4492         }
4493         if (link) {
4494                 /* Perform a reset if the media type changed. */
4495                 if (hw->dev_spec._82575.media_changed) {
4496                         hw->dev_spec._82575.media_changed = false;
4497                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4498                         igb_reset(adapter);
4499                 }
4500                 /* Cancel scheduled suspend requests. */
4501                 pm_runtime_resume(netdev->dev.parent);
4502
4503                 if (!netif_carrier_ok(netdev)) {
4504                         u32 ctrl;
4505
4506                         hw->mac.ops.get_speed_and_duplex(hw,
4507                                                          &adapter->link_speed,
4508                                                          &adapter->link_duplex);
4509
4510                         ctrl = rd32(E1000_CTRL);
4511                         /* Links status message must follow this format */
4512                         netdev_info(netdev,
4513                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4514                                netdev->name,
4515                                adapter->link_speed,
4516                                adapter->link_duplex == FULL_DUPLEX ?
4517                                "Full" : "Half",
4518                                (ctrl & E1000_CTRL_TFCE) &&
4519                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
4520                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
4521                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
4522
4523                         /* disable EEE if enabled */
4524                         if ((adapter->flags & IGB_FLAG_EEE) &&
4525                                 (adapter->link_duplex == HALF_DUPLEX)) {
4526                                 dev_info(&adapter->pdev->dev,
4527                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4528                                 adapter->hw.dev_spec._82575.eee_disable = true;
4529                                 adapter->flags &= ~IGB_FLAG_EEE;
4530                         }
4531
4532                         /* check if SmartSpeed worked */
4533                         igb_check_downshift(hw);
4534                         if (phy->speed_downgraded)
4535                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
4536
4537                         /* check for thermal sensor event */
4538                         if (igb_thermal_sensor_event(hw,
4539                             E1000_THSTAT_LINK_THROTTLE))
4540                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
4541
4542                         /* adjust timeout factor according to speed/duplex */
4543                         adapter->tx_timeout_factor = 1;
4544                         switch (adapter->link_speed) {
4545                         case SPEED_10:
4546                                 adapter->tx_timeout_factor = 14;
4547                                 break;
4548                         case SPEED_100:
4549                                 /* maybe add some timeout factor ? */
4550                                 break;
4551                         }
4552
4553                         if (adapter->link_speed != SPEED_1000 ||
4554                             !hw->phy.ops.read_reg)
4555                                 goto no_wait;
4556
4557                         /* wait for Remote receiver status OK */
4558 retry_read_status:
4559                         if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
4560                                               &phy_data)) {
4561                                 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
4562                                     retry_count) {
4563                                         msleep(100);
4564                                         retry_count--;
4565                                         goto retry_read_status;
4566                                 } else if (!retry_count) {
4567                                         dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
4568                                 }
4569                         } else {
4570                                 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
4571                         }
4572 no_wait:
4573                         netif_carrier_on(netdev);
4574
4575                         igb_ping_all_vfs(adapter);
4576                         igb_check_vf_rate_limit(adapter);
4577
4578                         /* link state has changed, schedule phy info update */
4579                         if (!test_bit(__IGB_DOWN, &adapter->state))
4580                                 mod_timer(&adapter->phy_info_timer,
4581                                           round_jiffies(jiffies + 2 * HZ));
4582                 }
4583         } else {
4584                 if (netif_carrier_ok(netdev)) {
4585                         adapter->link_speed = 0;
4586                         adapter->link_duplex = 0;
4587
4588                         /* check for thermal sensor event */
4589                         if (igb_thermal_sensor_event(hw,
4590                             E1000_THSTAT_PWR_DOWN)) {
4591                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
4592                         }
4593
4594                         /* Links status message must follow this format */
4595                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
4596                                netdev->name);
4597                         netif_carrier_off(netdev);
4598
4599                         igb_ping_all_vfs(adapter);
4600
4601                         /* link state has changed, schedule phy info update */
4602                         if (!test_bit(__IGB_DOWN, &adapter->state))
4603                                 mod_timer(&adapter->phy_info_timer,
4604                                           round_jiffies(jiffies + 2 * HZ));
4605
4606                         /* link is down, time to check for alternate media */
4607                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4608                                 igb_check_swap_media(adapter);
4609                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4610                                         schedule_work(&adapter->reset_task);
4611                                         /* return immediately */
4612                                         return;
4613                                 }
4614                         }
4615                         pm_schedule_suspend(netdev->dev.parent,
4616                                             MSEC_PER_SEC * 5);
4617
4618                 /* also check for alternate media here */
4619                 } else if (!netif_carrier_ok(netdev) &&
4620                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4621                         igb_check_swap_media(adapter);
4622                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4623                                 schedule_work(&adapter->reset_task);
4624                                 /* return immediately */
4625                                 return;
4626                         }
4627                 }
4628         }
4629
4630         spin_lock(&adapter->stats64_lock);
4631         igb_update_stats(adapter, &adapter->stats64);
4632         spin_unlock(&adapter->stats64_lock);
4633
4634         for (i = 0; i < adapter->num_tx_queues; i++) {
4635                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4636                 if (!netif_carrier_ok(netdev)) {
4637                         /* We've lost link, so the controller stops DMA,
4638                          * but we've got queued Tx work that's never going
4639                          * to get done, so reset controller to flush Tx.
4640                          * (Do the reset outside of interrupt context).
4641                          */
4642                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4643                                 adapter->tx_timeout_count++;
4644                                 schedule_work(&adapter->reset_task);
4645                                 /* return immediately since reset is imminent */
4646                                 return;
4647                         }
4648                 }
4649
4650                 /* Force detection of hung controller every watchdog period */
4651                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4652         }
4653
4654         /* Cause software interrupt to ensure Rx ring is cleaned */
4655         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
4656                 u32 eics = 0;
4657
4658                 for (i = 0; i < adapter->num_q_vectors; i++)
4659                         eics |= adapter->q_vector[i]->eims_value;
4660                 wr32(E1000_EICS, eics);
4661         } else {
4662                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4663         }
4664
4665         igb_spoof_check(adapter);
4666         igb_ptp_rx_hang(adapter);
4667
4668         /* Check LVMMC register on i350/i354 only */
4669         if ((adapter->hw.mac.type == e1000_i350) ||
4670             (adapter->hw.mac.type == e1000_i354))
4671                 igb_check_lvmmc(adapter);
4672
4673         /* Reset the timer */
4674         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4675                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4676                         mod_timer(&adapter->watchdog_timer,
4677                                   round_jiffies(jiffies +  HZ));
4678                 else
4679                         mod_timer(&adapter->watchdog_timer,
4680                                   round_jiffies(jiffies + 2 * HZ));
4681         }
4682 }
4683
4684 enum latency_range {
4685         lowest_latency = 0,
4686         low_latency = 1,
4687         bulk_latency = 2,
4688         latency_invalid = 255
4689 };
4690
4691 /**
4692  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
4693  *  @q_vector: pointer to q_vector
4694  *
4695  *  Stores a new ITR value based on strictly on packet size.  This
4696  *  algorithm is less sophisticated than that used in igb_update_itr,
4697  *  due to the difficulty of synchronizing statistics across multiple
4698  *  receive rings.  The divisors and thresholds used by this function
4699  *  were determined based on theoretical maximum wire speed and testing
4700  *  data, in order to minimize response time while increasing bulk
4701  *  throughput.
4702  *  This functionality is controlled by ethtool's coalescing settings.
4703  *  NOTE:  This function is called only when operating in a multiqueue
4704  *         receive environment.
4705  **/
4706 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4707 {
4708         int new_val = q_vector->itr_val;
4709         int avg_wire_size = 0;
4710         struct igb_adapter *adapter = q_vector->adapter;
4711         unsigned int packets;
4712
4713         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4714          * ints/sec - ITR timer value of 120 ticks.
4715          */
4716         if (adapter->link_speed != SPEED_1000) {
4717                 new_val = IGB_4K_ITR;
4718                 goto set_itr_val;
4719         }
4720
4721         packets = q_vector->rx.total_packets;
4722         if (packets)
4723                 avg_wire_size = q_vector->rx.total_bytes / packets;
4724
4725         packets = q_vector->tx.total_packets;
4726         if (packets)
4727                 avg_wire_size = max_t(u32, avg_wire_size,
4728                                       q_vector->tx.total_bytes / packets);
4729
4730         /* if avg_wire_size isn't set no work was done */
4731         if (!avg_wire_size)
4732                 goto clear_counts;
4733
4734         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4735         avg_wire_size += 24;
4736
4737         /* Don't starve jumbo frames */
4738         avg_wire_size = min(avg_wire_size, 3000);
4739
4740         /* Give a little boost to mid-size frames */
4741         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4742                 new_val = avg_wire_size / 3;
4743         else
4744                 new_val = avg_wire_size / 2;
4745
4746         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4747         if (new_val < IGB_20K_ITR &&
4748             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4749              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4750                 new_val = IGB_20K_ITR;
4751
4752 set_itr_val:
4753         if (new_val != q_vector->itr_val) {
4754                 q_vector->itr_val = new_val;
4755                 q_vector->set_itr = 1;
4756         }
4757 clear_counts:
4758         q_vector->rx.total_bytes = 0;
4759         q_vector->rx.total_packets = 0;
4760         q_vector->tx.total_bytes = 0;
4761         q_vector->tx.total_packets = 0;
4762 }
4763
4764 /**
4765  *  igb_update_itr - update the dynamic ITR value based on statistics
4766  *  @q_vector: pointer to q_vector
4767  *  @ring_container: ring info to update the itr for
4768  *
4769  *  Stores a new ITR value based on packets and byte
4770  *  counts during the last interrupt.  The advantage of per interrupt
4771  *  computation is faster updates and more accurate ITR for the current
4772  *  traffic pattern.  Constants in this function were computed
4773  *  based on theoretical maximum wire speed and thresholds were set based
4774  *  on testing data as well as attempting to minimize response time
4775  *  while increasing bulk throughput.
4776  *  This functionality is controlled by ethtool's coalescing settings.
4777  *  NOTE:  These calculations are only valid when operating in a single-
4778  *         queue environment.
4779  **/
4780 static void igb_update_itr(struct igb_q_vector *q_vector,
4781                            struct igb_ring_container *ring_container)
4782 {
4783         unsigned int packets = ring_container->total_packets;
4784         unsigned int bytes = ring_container->total_bytes;
4785         u8 itrval = ring_container->itr;
4786
4787         /* no packets, exit with status unchanged */
4788         if (packets == 0)
4789                 return;
4790
4791         switch (itrval) {
4792         case lowest_latency:
4793                 /* handle TSO and jumbo frames */
4794                 if (bytes/packets > 8000)
4795                         itrval = bulk_latency;
4796                 else if ((packets < 5) && (bytes > 512))
4797                         itrval = low_latency;
4798                 break;
4799         case low_latency:  /* 50 usec aka 20000 ints/s */
4800                 if (bytes > 10000) {
4801                         /* this if handles the TSO accounting */
4802                         if (bytes/packets > 8000)
4803                                 itrval = bulk_latency;
4804                         else if ((packets < 10) || ((bytes/packets) > 1200))
4805                                 itrval = bulk_latency;
4806                         else if ((packets > 35))
4807                                 itrval = lowest_latency;
4808                 } else if (bytes/packets > 2000) {
4809                         itrval = bulk_latency;
4810                 } else if (packets <= 2 && bytes < 512) {
4811                         itrval = lowest_latency;
4812                 }
4813                 break;
4814         case bulk_latency: /* 250 usec aka 4000 ints/s */
4815                 if (bytes > 25000) {
4816                         if (packets > 35)
4817                                 itrval = low_latency;
4818                 } else if (bytes < 1500) {
4819                         itrval = low_latency;
4820                 }
4821                 break;
4822         }
4823
4824         /* clear work counters since we have the values we need */
4825         ring_container->total_bytes = 0;
4826         ring_container->total_packets = 0;
4827
4828         /* write updated itr to ring container */
4829         ring_container->itr = itrval;
4830 }
4831
4832 static void igb_set_itr(struct igb_q_vector *q_vector)
4833 {
4834         struct igb_adapter *adapter = q_vector->adapter;
4835         u32 new_itr = q_vector->itr_val;
4836         u8 current_itr = 0;
4837
4838         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4839         if (adapter->link_speed != SPEED_1000) {
4840                 current_itr = 0;
4841                 new_itr = IGB_4K_ITR;
4842                 goto set_itr_now;
4843         }
4844
4845         igb_update_itr(q_vector, &q_vector->tx);
4846         igb_update_itr(q_vector, &q_vector->rx);
4847
4848         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4849
4850         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4851         if (current_itr == lowest_latency &&
4852             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4853              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4854                 current_itr = low_latency;
4855
4856         switch (current_itr) {
4857         /* counts and packets in update_itr are dependent on these numbers */
4858         case lowest_latency:
4859                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4860                 break;
4861         case low_latency:
4862                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4863                 break;
4864         case bulk_latency:
4865                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
4866                 break;
4867         default:
4868                 break;
4869         }
4870
4871 set_itr_now:
4872         if (new_itr != q_vector->itr_val) {
4873                 /* this attempts to bias the interrupt rate towards Bulk
4874                  * by adding intermediate steps when interrupt rate is
4875                  * increasing
4876                  */
4877                 new_itr = new_itr > q_vector->itr_val ?
4878                           max((new_itr * q_vector->itr_val) /
4879                           (new_itr + (q_vector->itr_val >> 2)),
4880                           new_itr) : new_itr;
4881                 /* Don't write the value here; it resets the adapter's
4882                  * internal timer, and causes us to delay far longer than
4883                  * we should between interrupts.  Instead, we write the ITR
4884                  * value at the beginning of the next interrupt so the timing
4885                  * ends up being correct.
4886                  */
4887                 q_vector->itr_val = new_itr;
4888                 q_vector->set_itr = 1;
4889         }
4890 }
4891
4892 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4893                             u32 type_tucmd, u32 mss_l4len_idx)
4894 {
4895         struct e1000_adv_tx_context_desc *context_desc;
4896         u16 i = tx_ring->next_to_use;
4897
4898         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4899
4900         i++;
4901         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4902
4903         /* set bits to identify this as an advanced context descriptor */
4904         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4905
4906         /* For 82575, context index must be unique per ring. */
4907         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4908                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4909
4910         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4911         context_desc->seqnum_seed       = 0;
4912         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4913         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4914 }
4915
4916 static int igb_tso(struct igb_ring *tx_ring,
4917                    struct igb_tx_buffer *first,
4918                    u8 *hdr_len)
4919 {
4920         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
4921         struct sk_buff *skb = first->skb;
4922         union {
4923                 struct iphdr *v4;
4924                 struct ipv6hdr *v6;
4925                 unsigned char *hdr;
4926         } ip;
4927         union {
4928                 struct tcphdr *tcp;
4929                 unsigned char *hdr;
4930         } l4;
4931         u32 paylen, l4_offset;
4932         int err;
4933
4934         if (skb->ip_summed != CHECKSUM_PARTIAL)
4935                 return 0;
4936
4937         if (!skb_is_gso(skb))
4938                 return 0;
4939
4940         err = skb_cow_head(skb, 0);
4941         if (err < 0)
4942                 return err;
4943
4944         ip.hdr = skb_network_header(skb);
4945         l4.hdr = skb_checksum_start(skb);
4946
4947         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4948         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4949
4950         /* initialize outer IP header fields */
4951         if (ip.v4->version == 4) {
4952                 unsigned char *csum_start = skb_checksum_start(skb);
4953                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
4954
4955                 /* IP header will have to cancel out any data that
4956                  * is not a part of the outer IP header
4957                  */
4958                 ip.v4->check = csum_fold(csum_partial(trans_start,
4959                                                       csum_start - trans_start,
4960                                                       0));
4961                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4962
4963                 ip.v4->tot_len = 0;
4964                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4965                                    IGB_TX_FLAGS_CSUM |
4966                                    IGB_TX_FLAGS_IPV4;
4967         } else {
4968                 ip.v6->payload_len = 0;
4969                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4970                                    IGB_TX_FLAGS_CSUM;
4971         }
4972
4973         /* determine offset of inner transport header */
4974         l4_offset = l4.hdr - skb->data;
4975
4976         /* compute length of segmentation header */
4977         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
4978
4979         /* remove payload length from inner checksum */
4980         paylen = skb->len - l4_offset;
4981         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
4982
4983         /* update gso size and bytecount with header size */
4984         first->gso_segs = skb_shinfo(skb)->gso_segs;
4985         first->bytecount += (first->gso_segs - 1) * *hdr_len;
4986
4987         /* MSS L4LEN IDX */
4988         mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
4989         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4990
4991         /* VLAN MACLEN IPLEN */
4992         vlan_macip_lens = l4.hdr - ip.hdr;
4993         vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
4994         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4995
4996         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4997
4998         return 1;
4999 }
5000
5001 static inline bool igb_ipv6_csum_is_sctp(struct sk_buff *skb)
5002 {
5003         unsigned int offset = 0;
5004
5005         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
5006
5007         return offset == skb_checksum_start_offset(skb);
5008 }
5009
5010 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5011 {
5012         struct sk_buff *skb = first->skb;
5013         u32 vlan_macip_lens = 0;
5014         u32 type_tucmd = 0;
5015
5016         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5017 csum_failed:
5018                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5019                         return;
5020                 goto no_csum;
5021         }
5022
5023         switch (skb->csum_offset) {
5024         case offsetof(struct tcphdr, check):
5025                 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5026                 /* fall through */
5027         case offsetof(struct udphdr, check):
5028                 break;
5029         case offsetof(struct sctphdr, checksum):
5030                 /* validate that this is actually an SCTP request */
5031                 if (((first->protocol == htons(ETH_P_IP)) &&
5032                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
5033                     ((first->protocol == htons(ETH_P_IPV6)) &&
5034                      igb_ipv6_csum_is_sctp(skb))) {
5035                         type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
5036                         break;
5037                 }
5038         default:
5039                 skb_checksum_help(skb);
5040                 goto csum_failed;
5041         }
5042
5043         /* update TX checksum flag */
5044         first->tx_flags |= IGB_TX_FLAGS_CSUM;
5045         vlan_macip_lens = skb_checksum_start_offset(skb) -
5046                           skb_network_offset(skb);
5047 no_csum:
5048         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5049         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5050
5051         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, 0);
5052 }
5053
5054 #define IGB_SET_FLAG(_input, _flag, _result) \
5055         ((_flag <= _result) ? \
5056          ((u32)(_input & _flag) * (_result / _flag)) : \
5057          ((u32)(_input & _flag) / (_flag / _result)))
5058
5059 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5060 {
5061         /* set type for advanced descriptor with frame checksum insertion */
5062         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5063                        E1000_ADVTXD_DCMD_DEXT |
5064                        E1000_ADVTXD_DCMD_IFCS;
5065
5066         /* set HW vlan bit if vlan is present */
5067         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5068                                  (E1000_ADVTXD_DCMD_VLE));
5069
5070         /* set segmentation bits for TSO */
5071         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5072                                  (E1000_ADVTXD_DCMD_TSE));
5073
5074         /* set timestamp bit if present */
5075         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5076                                  (E1000_ADVTXD_MAC_TSTAMP));
5077
5078         /* insert frame checksum */
5079         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
5080
5081         return cmd_type;
5082 }
5083
5084 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5085                                  union e1000_adv_tx_desc *tx_desc,
5086                                  u32 tx_flags, unsigned int paylen)
5087 {
5088         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5089
5090         /* 82575 requires a unique index per ring */
5091         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5092                 olinfo_status |= tx_ring->reg_idx << 4;
5093
5094         /* insert L4 checksum */
5095         olinfo_status |= IGB_SET_FLAG(tx_flags,
5096                                       IGB_TX_FLAGS_CSUM,
5097                                       (E1000_TXD_POPTS_TXSM << 8));
5098
5099         /* insert IPv4 checksum */
5100         olinfo_status |= IGB_SET_FLAG(tx_flags,
5101                                       IGB_TX_FLAGS_IPV4,
5102                                       (E1000_TXD_POPTS_IXSM << 8));
5103
5104         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5105 }
5106
5107 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5108 {
5109         struct net_device *netdev = tx_ring->netdev;
5110
5111         netif_stop_subqueue(netdev, tx_ring->queue_index);
5112
5113         /* Herbert's original patch had:
5114          *  smp_mb__after_netif_stop_queue();
5115          * but since that doesn't exist yet, just open code it.
5116          */
5117         smp_mb();
5118
5119         /* We need to check again in a case another CPU has just
5120          * made room available.
5121          */
5122         if (igb_desc_unused(tx_ring) < size)
5123                 return -EBUSY;
5124
5125         /* A reprieve! */
5126         netif_wake_subqueue(netdev, tx_ring->queue_index);
5127
5128         u64_stats_update_begin(&tx_ring->tx_syncp2);
5129         tx_ring->tx_stats.restart_queue2++;
5130         u64_stats_update_end(&tx_ring->tx_syncp2);
5131
5132         return 0;
5133 }
5134
5135 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5136 {
5137         if (igb_desc_unused(tx_ring) >= size)
5138                 return 0;
5139         return __igb_maybe_stop_tx(tx_ring, size);
5140 }
5141
5142 static void igb_tx_map(struct igb_ring *tx_ring,
5143                        struct igb_tx_buffer *first,
5144                        const u8 hdr_len)
5145 {
5146         struct sk_buff *skb = first->skb;
5147         struct igb_tx_buffer *tx_buffer;
5148         union e1000_adv_tx_desc *tx_desc;
5149         struct skb_frag_struct *frag;
5150         dma_addr_t dma;
5151         unsigned int data_len, size;
5152         u32 tx_flags = first->tx_flags;
5153         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5154         u16 i = tx_ring->next_to_use;
5155
5156         tx_desc = IGB_TX_DESC(tx_ring, i);
5157
5158         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5159
5160         size = skb_headlen(skb);
5161         data_len = skb->data_len;
5162
5163         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5164
5165         tx_buffer = first;
5166
5167         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5168                 if (dma_mapping_error(tx_ring->dev, dma))
5169                         goto dma_error;
5170
5171                 /* record length, and DMA address */
5172                 dma_unmap_len_set(tx_buffer, len, size);
5173                 dma_unmap_addr_set(tx_buffer, dma, dma);
5174
5175                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5176
5177                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5178                         tx_desc->read.cmd_type_len =
5179                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5180
5181                         i++;
5182                         tx_desc++;
5183                         if (i == tx_ring->count) {
5184                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5185                                 i = 0;
5186                         }
5187                         tx_desc->read.olinfo_status = 0;
5188
5189                         dma += IGB_MAX_DATA_PER_TXD;
5190                         size -= IGB_MAX_DATA_PER_TXD;
5191
5192                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5193                 }
5194
5195                 if (likely(!data_len))
5196                         break;
5197
5198                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5199
5200                 i++;
5201                 tx_desc++;
5202                 if (i == tx_ring->count) {
5203                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5204                         i = 0;
5205                 }
5206                 tx_desc->read.olinfo_status = 0;
5207
5208                 size = skb_frag_size(frag);
5209                 data_len -= size;
5210
5211                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5212                                        size, DMA_TO_DEVICE);
5213
5214                 tx_buffer = &tx_ring->tx_buffer_info[i];
5215         }
5216
5217         /* write last descriptor with RS and EOP bits */
5218         cmd_type |= size | IGB_TXD_DCMD;
5219         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5220
5221         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5222
5223         /* set the timestamp */
5224         first->time_stamp = jiffies;
5225
5226         /* Force memory writes to complete before letting h/w know there
5227          * are new descriptors to fetch.  (Only applicable for weak-ordered
5228          * memory model archs, such as IA-64).
5229          *
5230          * We also need this memory barrier to make certain all of the
5231          * status bits have been updated before next_to_watch is written.
5232          */
5233         wmb();
5234
5235         /* set next_to_watch value indicating a packet is present */
5236         first->next_to_watch = tx_desc;
5237
5238         i++;
5239         if (i == tx_ring->count)
5240                 i = 0;
5241
5242         tx_ring->next_to_use = i;
5243
5244         /* Make sure there is space in the ring for the next send. */
5245         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5246
5247         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
5248                 writel(i, tx_ring->tail);
5249
5250                 /* we need this if more than one processor can write to our tail
5251                  * at a time, it synchronizes IO on IA64/Altix systems
5252                  */
5253                 mmiowb();
5254         }
5255         return;
5256
5257 dma_error:
5258         dev_err(tx_ring->dev, "TX DMA map failed\n");
5259
5260         /* clear dma mappings for failed tx_buffer_info map */
5261         for (;;) {
5262                 tx_buffer = &tx_ring->tx_buffer_info[i];
5263                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5264                 if (tx_buffer == first)
5265                         break;
5266                 if (i == 0)
5267                         i = tx_ring->count;
5268                 i--;
5269         }
5270
5271         tx_ring->next_to_use = i;
5272 }
5273
5274 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5275                                 struct igb_ring *tx_ring)
5276 {
5277         struct igb_tx_buffer *first;
5278         int tso;
5279         u32 tx_flags = 0;
5280         unsigned short f;
5281         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5282         __be16 protocol = vlan_get_protocol(skb);
5283         u8 hdr_len = 0;
5284
5285         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5286          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5287          *       + 2 desc gap to keep tail from touching head,
5288          *       + 1 desc for context descriptor,
5289          * otherwise try next time
5290          */
5291         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5292                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5293
5294         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5295                 /* this is a hard error */
5296                 return NETDEV_TX_BUSY;
5297         }
5298
5299         /* record the location of the first descriptor for this packet */
5300         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5301         first->skb = skb;
5302         first->bytecount = skb->len;
5303         first->gso_segs = 1;
5304
5305         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5306                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5307
5308                 if (!test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
5309                                            &adapter->state)) {
5310                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5311                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5312
5313                         adapter->ptp_tx_skb = skb_get(skb);
5314                         adapter->ptp_tx_start = jiffies;
5315                         if (adapter->hw.mac.type == e1000_82576)
5316                                 schedule_work(&adapter->ptp_tx_work);
5317                 }
5318         }
5319
5320         skb_tx_timestamp(skb);
5321
5322         if (skb_vlan_tag_present(skb)) {
5323                 tx_flags |= IGB_TX_FLAGS_VLAN;
5324                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5325         }
5326
5327         /* record initial flags and protocol */
5328         first->tx_flags = tx_flags;
5329         first->protocol = protocol;
5330
5331         tso = igb_tso(tx_ring, first, &hdr_len);
5332         if (tso < 0)
5333                 goto out_drop;
5334         else if (!tso)
5335                 igb_tx_csum(tx_ring, first);
5336
5337         igb_tx_map(tx_ring, first, hdr_len);
5338
5339         return NETDEV_TX_OK;
5340
5341 out_drop:
5342         igb_unmap_and_free_tx_resource(tx_ring, first);
5343
5344         return NETDEV_TX_OK;
5345 }
5346
5347 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5348                                                     struct sk_buff *skb)
5349 {
5350         unsigned int r_idx = skb->queue_mapping;
5351
5352         if (r_idx >= adapter->num_tx_queues)
5353                 r_idx = r_idx % adapter->num_tx_queues;
5354
5355         return adapter->tx_ring[r_idx];
5356 }
5357
5358 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5359                                   struct net_device *netdev)
5360 {
5361         struct igb_adapter *adapter = netdev_priv(netdev);
5362
5363         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5364          * in order to meet this minimum size requirement.
5365          */
5366         if (skb_put_padto(skb, 17))
5367                 return NETDEV_TX_OK;
5368
5369         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5370 }
5371
5372 /**
5373  *  igb_tx_timeout - Respond to a Tx Hang
5374  *  @netdev: network interface device structure
5375  **/
5376 static void igb_tx_timeout(struct net_device *netdev)
5377 {
5378         struct igb_adapter *adapter = netdev_priv(netdev);
5379         struct e1000_hw *hw = &adapter->hw;
5380
5381         /* Do the reset outside of interrupt context */
5382         adapter->tx_timeout_count++;
5383
5384         if (hw->mac.type >= e1000_82580)
5385                 hw->dev_spec._82575.global_device_reset = true;
5386
5387         schedule_work(&adapter->reset_task);
5388         wr32(E1000_EICS,
5389              (adapter->eims_enable_mask & ~adapter->eims_other));
5390 }
5391
5392 static void igb_reset_task(struct work_struct *work)
5393 {
5394         struct igb_adapter *adapter;
5395         adapter = container_of(work, struct igb_adapter, reset_task);
5396
5397         rtnl_lock();
5398         /* If we're already down or resetting, just bail */
5399         if (test_bit(__IGB_DOWN, &adapter->state) ||
5400             test_bit(__IGB_RESETTING, &adapter->state)) {
5401                 rtnl_unlock();
5402                 return;
5403         }
5404
5405         igb_dump(adapter);
5406         netdev_err(adapter->netdev, "Reset adapter\n");
5407         igb_reinit_locked(adapter);
5408         rtnl_unlock();
5409 }
5410
5411 /**
5412  *  igb_get_stats64 - Get System Network Statistics
5413  *  @netdev: network interface device structure
5414  *  @stats: rtnl_link_stats64 pointer
5415  **/
5416 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
5417                                                 struct rtnl_link_stats64 *stats)
5418 {
5419         struct igb_adapter *adapter = netdev_priv(netdev);
5420
5421         spin_lock(&adapter->stats64_lock);
5422         igb_update_stats(adapter, &adapter->stats64);
5423         memcpy(stats, &adapter->stats64, sizeof(*stats));
5424         spin_unlock(&adapter->stats64_lock);
5425
5426         return stats;
5427 }
5428
5429 /**
5430  *  igb_change_mtu - Change the Maximum Transfer Unit
5431  *  @netdev: network interface device structure
5432  *  @new_mtu: new value for maximum frame size
5433  *
5434  *  Returns 0 on success, negative on failure
5435  **/
5436 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5437 {
5438         struct igb_adapter *adapter = netdev_priv(netdev);
5439         struct pci_dev *pdev = adapter->pdev;
5440         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5441
5442         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5443                 dev_err(&pdev->dev, "Invalid MTU setting\n");
5444                 return -EINVAL;
5445         }
5446
5447 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5448         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5449                 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
5450                 return -EINVAL;
5451         }
5452
5453         /* adjust max frame to be at least the size of a standard frame */
5454         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5455                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5456
5457         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5458                 usleep_range(1000, 2000);
5459
5460         /* igb_down has a dependency on max_frame_size */
5461         adapter->max_frame_size = max_frame;
5462
5463         if (netif_running(netdev))
5464                 igb_down(adapter);
5465
5466         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
5467                  netdev->mtu, new_mtu);
5468         netdev->mtu = new_mtu;
5469
5470         if (netif_running(netdev))
5471                 igb_up(adapter);
5472         else
5473                 igb_reset(adapter);
5474
5475         clear_bit(__IGB_RESETTING, &adapter->state);
5476
5477         return 0;
5478 }
5479
5480 /**
5481  *  igb_update_stats - Update the board statistics counters
5482  *  @adapter: board private structure
5483  **/
5484 void igb_update_stats(struct igb_adapter *adapter,
5485                       struct rtnl_link_stats64 *net_stats)
5486 {
5487         struct e1000_hw *hw = &adapter->hw;
5488         struct pci_dev *pdev = adapter->pdev;
5489         u32 reg, mpc;
5490         int i;
5491         u64 bytes, packets;
5492         unsigned int start;
5493         u64 _bytes, _packets;
5494
5495         /* Prevent stats update while adapter is being reset, or if the pci
5496          * connection is down.
5497          */
5498         if (adapter->link_speed == 0)
5499                 return;
5500         if (pci_channel_offline(pdev))
5501                 return;
5502
5503         bytes = 0;
5504         packets = 0;
5505
5506         rcu_read_lock();
5507         for (i = 0; i < adapter->num_rx_queues; i++) {
5508                 struct igb_ring *ring = adapter->rx_ring[i];
5509                 u32 rqdpc = rd32(E1000_RQDPC(i));
5510                 if (hw->mac.type >= e1000_i210)
5511                         wr32(E1000_RQDPC(i), 0);
5512
5513                 if (rqdpc) {
5514                         ring->rx_stats.drops += rqdpc;
5515                         net_stats->rx_fifo_errors += rqdpc;
5516                 }
5517
5518                 do {
5519                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
5520                         _bytes = ring->rx_stats.bytes;
5521                         _packets = ring->rx_stats.packets;
5522                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
5523                 bytes += _bytes;
5524                 packets += _packets;
5525         }
5526
5527         net_stats->rx_bytes = bytes;
5528         net_stats->rx_packets = packets;
5529
5530         bytes = 0;
5531         packets = 0;
5532         for (i = 0; i < adapter->num_tx_queues; i++) {
5533                 struct igb_ring *ring = adapter->tx_ring[i];
5534                 do {
5535                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
5536                         _bytes = ring->tx_stats.bytes;
5537                         _packets = ring->tx_stats.packets;
5538                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
5539                 bytes += _bytes;
5540                 packets += _packets;
5541         }
5542         net_stats->tx_bytes = bytes;
5543         net_stats->tx_packets = packets;
5544         rcu_read_unlock();
5545
5546         /* read stats registers */
5547         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
5548         adapter->stats.gprc += rd32(E1000_GPRC);
5549         adapter->stats.gorc += rd32(E1000_GORCL);
5550         rd32(E1000_GORCH); /* clear GORCL */
5551         adapter->stats.bprc += rd32(E1000_BPRC);
5552         adapter->stats.mprc += rd32(E1000_MPRC);
5553         adapter->stats.roc += rd32(E1000_ROC);
5554
5555         adapter->stats.prc64 += rd32(E1000_PRC64);
5556         adapter->stats.prc127 += rd32(E1000_PRC127);
5557         adapter->stats.prc255 += rd32(E1000_PRC255);
5558         adapter->stats.prc511 += rd32(E1000_PRC511);
5559         adapter->stats.prc1023 += rd32(E1000_PRC1023);
5560         adapter->stats.prc1522 += rd32(E1000_PRC1522);
5561         adapter->stats.symerrs += rd32(E1000_SYMERRS);
5562         adapter->stats.sec += rd32(E1000_SEC);
5563
5564         mpc = rd32(E1000_MPC);
5565         adapter->stats.mpc += mpc;
5566         net_stats->rx_fifo_errors += mpc;
5567         adapter->stats.scc += rd32(E1000_SCC);
5568         adapter->stats.ecol += rd32(E1000_ECOL);
5569         adapter->stats.mcc += rd32(E1000_MCC);
5570         adapter->stats.latecol += rd32(E1000_LATECOL);
5571         adapter->stats.dc += rd32(E1000_DC);
5572         adapter->stats.rlec += rd32(E1000_RLEC);
5573         adapter->stats.xonrxc += rd32(E1000_XONRXC);
5574         adapter->stats.xontxc += rd32(E1000_XONTXC);
5575         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
5576         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
5577         adapter->stats.fcruc += rd32(E1000_FCRUC);
5578         adapter->stats.gptc += rd32(E1000_GPTC);
5579         adapter->stats.gotc += rd32(E1000_GOTCL);
5580         rd32(E1000_GOTCH); /* clear GOTCL */
5581         adapter->stats.rnbc += rd32(E1000_RNBC);
5582         adapter->stats.ruc += rd32(E1000_RUC);
5583         adapter->stats.rfc += rd32(E1000_RFC);
5584         adapter->stats.rjc += rd32(E1000_RJC);
5585         adapter->stats.tor += rd32(E1000_TORH);
5586         adapter->stats.tot += rd32(E1000_TOTH);
5587         adapter->stats.tpr += rd32(E1000_TPR);
5588
5589         adapter->stats.ptc64 += rd32(E1000_PTC64);
5590         adapter->stats.ptc127 += rd32(E1000_PTC127);
5591         adapter->stats.ptc255 += rd32(E1000_PTC255);
5592         adapter->stats.ptc511 += rd32(E1000_PTC511);
5593         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
5594         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
5595
5596         adapter->stats.mptc += rd32(E1000_MPTC);
5597         adapter->stats.bptc += rd32(E1000_BPTC);
5598
5599         adapter->stats.tpt += rd32(E1000_TPT);
5600         adapter->stats.colc += rd32(E1000_COLC);
5601
5602         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
5603         /* read internal phy specific stats */
5604         reg = rd32(E1000_CTRL_EXT);
5605         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5606                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
5607
5608                 /* this stat has invalid values on i210/i211 */
5609                 if ((hw->mac.type != e1000_i210) &&
5610                     (hw->mac.type != e1000_i211))
5611                         adapter->stats.tncrs += rd32(E1000_TNCRS);
5612         }
5613
5614         adapter->stats.tsctc += rd32(E1000_TSCTC);
5615         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
5616
5617         adapter->stats.iac += rd32(E1000_IAC);
5618         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
5619         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
5620         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
5621         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
5622         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
5623         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
5624         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
5625         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
5626
5627         /* Fill out the OS statistics structure */
5628         net_stats->multicast = adapter->stats.mprc;
5629         net_stats->collisions = adapter->stats.colc;
5630
5631         /* Rx Errors */
5632
5633         /* RLEC on some newer hardware can be incorrect so build
5634          * our own version based on RUC and ROC
5635          */
5636         net_stats->rx_errors = adapter->stats.rxerrc +
5637                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5638                 adapter->stats.ruc + adapter->stats.roc +
5639                 adapter->stats.cexterr;
5640         net_stats->rx_length_errors = adapter->stats.ruc +
5641                                       adapter->stats.roc;
5642         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5643         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5644         net_stats->rx_missed_errors = adapter->stats.mpc;
5645
5646         /* Tx Errors */
5647         net_stats->tx_errors = adapter->stats.ecol +
5648                                adapter->stats.latecol;
5649         net_stats->tx_aborted_errors = adapter->stats.ecol;
5650         net_stats->tx_window_errors = adapter->stats.latecol;
5651         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5652
5653         /* Tx Dropped needs to be maintained elsewhere */
5654
5655         /* Management Stats */
5656         adapter->stats.mgptc += rd32(E1000_MGTPTC);
5657         adapter->stats.mgprc += rd32(E1000_MGTPRC);
5658         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5659
5660         /* OS2BMC Stats */
5661         reg = rd32(E1000_MANC);
5662         if (reg & E1000_MANC_EN_BMC2OS) {
5663                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5664                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5665                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5666                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5667         }
5668 }
5669
5670 static void igb_tsync_interrupt(struct igb_adapter *adapter)
5671 {
5672         struct e1000_hw *hw = &adapter->hw;
5673         struct ptp_clock_event event;
5674         struct timespec64 ts;
5675         u32 ack = 0, tsauxc, sec, nsec, tsicr = rd32(E1000_TSICR);
5676
5677         if (tsicr & TSINTR_SYS_WRAP) {
5678                 event.type = PTP_CLOCK_PPS;
5679                 if (adapter->ptp_caps.pps)
5680                         ptp_clock_event(adapter->ptp_clock, &event);
5681                 ack |= TSINTR_SYS_WRAP;
5682         }
5683
5684         if (tsicr & E1000_TSICR_TXTS) {
5685                 /* retrieve hardware timestamp */
5686                 schedule_work(&adapter->ptp_tx_work);
5687                 ack |= E1000_TSICR_TXTS;
5688         }
5689
5690         if (tsicr & TSINTR_TT0) {
5691                 spin_lock(&adapter->tmreg_lock);
5692                 ts = timespec64_add(adapter->perout[0].start,
5693                                     adapter->perout[0].period);
5694                 /* u32 conversion of tv_sec is safe until y2106 */
5695                 wr32(E1000_TRGTTIML0, ts.tv_nsec);
5696                 wr32(E1000_TRGTTIMH0, (u32)ts.tv_sec);
5697                 tsauxc = rd32(E1000_TSAUXC);
5698                 tsauxc |= TSAUXC_EN_TT0;
5699                 wr32(E1000_TSAUXC, tsauxc);
5700                 adapter->perout[0].start = ts;
5701                 spin_unlock(&adapter->tmreg_lock);
5702                 ack |= TSINTR_TT0;
5703         }
5704
5705         if (tsicr & TSINTR_TT1) {
5706                 spin_lock(&adapter->tmreg_lock);
5707                 ts = timespec64_add(adapter->perout[1].start,
5708                                     adapter->perout[1].period);
5709                 wr32(E1000_TRGTTIML1, ts.tv_nsec);
5710                 wr32(E1000_TRGTTIMH1, (u32)ts.tv_sec);
5711                 tsauxc = rd32(E1000_TSAUXC);
5712                 tsauxc |= TSAUXC_EN_TT1;
5713                 wr32(E1000_TSAUXC, tsauxc);
5714                 adapter->perout[1].start = ts;
5715                 spin_unlock(&adapter->tmreg_lock);
5716                 ack |= TSINTR_TT1;
5717         }
5718
5719         if (tsicr & TSINTR_AUTT0) {
5720                 nsec = rd32(E1000_AUXSTMPL0);
5721                 sec  = rd32(E1000_AUXSTMPH0);
5722                 event.type = PTP_CLOCK_EXTTS;
5723                 event.index = 0;
5724                 event.timestamp = sec * 1000000000ULL + nsec;
5725                 ptp_clock_event(adapter->ptp_clock, &event);
5726                 ack |= TSINTR_AUTT0;
5727         }
5728
5729         if (tsicr & TSINTR_AUTT1) {
5730                 nsec = rd32(E1000_AUXSTMPL1);
5731                 sec  = rd32(E1000_AUXSTMPH1);
5732                 event.type = PTP_CLOCK_EXTTS;
5733                 event.index = 1;
5734                 event.timestamp = sec * 1000000000ULL + nsec;
5735                 ptp_clock_event(adapter->ptp_clock, &event);
5736                 ack |= TSINTR_AUTT1;
5737         }
5738
5739         /* acknowledge the interrupts */
5740         wr32(E1000_TSICR, ack);
5741 }
5742
5743 static irqreturn_t igb_msix_other(int irq, void *data)
5744 {
5745         struct igb_adapter *adapter = data;
5746         struct e1000_hw *hw = &adapter->hw;
5747         u32 icr = rd32(E1000_ICR);
5748         /* reading ICR causes bit 31 of EICR to be cleared */
5749
5750         if (icr & E1000_ICR_DRSTA)
5751                 schedule_work(&adapter->reset_task);
5752
5753         if (icr & E1000_ICR_DOUTSYNC) {
5754                 /* HW is reporting DMA is out of sync */
5755                 adapter->stats.doosync++;
5756                 /* The DMA Out of Sync is also indication of a spoof event
5757                  * in IOV mode. Check the Wrong VM Behavior register to
5758                  * see if it is really a spoof event.
5759                  */
5760                 igb_check_wvbr(adapter);
5761         }
5762
5763         /* Check for a mailbox event */
5764         if (icr & E1000_ICR_VMMB)
5765                 igb_msg_task(adapter);
5766
5767         if (icr & E1000_ICR_LSC) {
5768                 hw->mac.get_link_status = 1;
5769                 /* guard against interrupt when we're going down */
5770                 if (!test_bit(__IGB_DOWN, &adapter->state))
5771                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5772         }
5773
5774         if (icr & E1000_ICR_TS)
5775                 igb_tsync_interrupt(adapter);
5776
5777         wr32(E1000_EIMS, adapter->eims_other);
5778
5779         return IRQ_HANDLED;
5780 }
5781
5782 static void igb_write_itr(struct igb_q_vector *q_vector)
5783 {
5784         struct igb_adapter *adapter = q_vector->adapter;
5785         u32 itr_val = q_vector->itr_val & 0x7FFC;
5786
5787         if (!q_vector->set_itr)
5788                 return;
5789
5790         if (!itr_val)
5791                 itr_val = 0x4;
5792
5793         if (adapter->hw.mac.type == e1000_82575)
5794                 itr_val |= itr_val << 16;
5795         else
5796                 itr_val |= E1000_EITR_CNT_IGNR;
5797
5798         writel(itr_val, q_vector->itr_register);
5799         q_vector->set_itr = 0;
5800 }
5801
5802 static irqreturn_t igb_msix_ring(int irq, void *data)
5803 {
5804         struct igb_q_vector *q_vector = data;
5805
5806         /* Write the ITR value calculated from the previous interrupt. */
5807         igb_write_itr(q_vector);
5808
5809         napi_schedule(&q_vector->napi);
5810
5811         return IRQ_HANDLED;
5812 }
5813
5814 #ifdef CONFIG_IGB_DCA
5815 static void igb_update_tx_dca(struct igb_adapter *adapter,
5816                               struct igb_ring *tx_ring,
5817                               int cpu)
5818 {
5819         struct e1000_hw *hw = &adapter->hw;
5820         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5821
5822         if (hw->mac.type != e1000_82575)
5823                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5824
5825         /* We can enable relaxed ordering for reads, but not writes when
5826          * DCA is enabled.  This is due to a known issue in some chipsets
5827          * which will cause the DCA tag to be cleared.
5828          */
5829         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5830                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5831                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5832
5833         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5834 }
5835
5836 static void igb_update_rx_dca(struct igb_adapter *adapter,
5837                               struct igb_ring *rx_ring,
5838                               int cpu)
5839 {
5840         struct e1000_hw *hw = &adapter->hw;
5841         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5842
5843         if (hw->mac.type != e1000_82575)
5844                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5845
5846         /* We can enable relaxed ordering for reads, but not writes when
5847          * DCA is enabled.  This is due to a known issue in some chipsets
5848          * which will cause the DCA tag to be cleared.
5849          */
5850         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5851                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5852
5853         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5854 }
5855
5856 static void igb_update_dca(struct igb_q_vector *q_vector)
5857 {
5858         struct igb_adapter *adapter = q_vector->adapter;
5859         int cpu = get_cpu();
5860
5861         if (q_vector->cpu == cpu)
5862                 goto out_no_update;
5863
5864         if (q_vector->tx.ring)
5865                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5866
5867         if (q_vector->rx.ring)
5868                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5869
5870         q_vector->cpu = cpu;
5871 out_no_update:
5872         put_cpu();
5873 }
5874
5875 static void igb_setup_dca(struct igb_adapter *adapter)
5876 {
5877         struct e1000_hw *hw = &adapter->hw;
5878         int i;
5879
5880         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5881                 return;
5882
5883         /* Always use CB2 mode, difference is masked in the CB driver. */
5884         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5885
5886         for (i = 0; i < adapter->num_q_vectors; i++) {
5887                 adapter->q_vector[i]->cpu = -1;
5888                 igb_update_dca(adapter->q_vector[i]);
5889         }
5890 }
5891
5892 static int __igb_notify_dca(struct device *dev, void *data)
5893 {
5894         struct net_device *netdev = dev_get_drvdata(dev);
5895         struct igb_adapter *adapter = netdev_priv(netdev);
5896         struct pci_dev *pdev = adapter->pdev;
5897         struct e1000_hw *hw = &adapter->hw;
5898         unsigned long event = *(unsigned long *)data;
5899
5900         switch (event) {
5901         case DCA_PROVIDER_ADD:
5902                 /* if already enabled, don't do it again */
5903                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5904                         break;
5905                 if (dca_add_requester(dev) == 0) {
5906                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
5907                         dev_info(&pdev->dev, "DCA enabled\n");
5908                         igb_setup_dca(adapter);
5909                         break;
5910                 }
5911                 /* Fall Through since DCA is disabled. */
5912         case DCA_PROVIDER_REMOVE:
5913                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5914                         /* without this a class_device is left
5915                          * hanging around in the sysfs model
5916                          */
5917                         dca_remove_requester(dev);
5918                         dev_info(&pdev->dev, "DCA disabled\n");
5919                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5920                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5921                 }
5922                 break;
5923         }
5924
5925         return 0;
5926 }
5927
5928 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5929                           void *p)
5930 {
5931         int ret_val;
5932
5933         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5934                                          __igb_notify_dca);
5935
5936         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5937 }
5938 #endif /* CONFIG_IGB_DCA */
5939
5940 #ifdef CONFIG_PCI_IOV
5941 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5942 {
5943         unsigned char mac_addr[ETH_ALEN];
5944
5945         eth_zero_addr(mac_addr);
5946         igb_set_vf_mac(adapter, vf, mac_addr);
5947
5948         /* By default spoof check is enabled for all VFs */
5949         adapter->vf_data[vf].spoofchk_enabled = true;
5950
5951         return 0;
5952 }
5953
5954 #endif
5955 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5956 {
5957         struct e1000_hw *hw = &adapter->hw;
5958         u32 ping;
5959         int i;
5960
5961         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5962                 ping = E1000_PF_CONTROL_MSG;
5963                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5964                         ping |= E1000_VT_MSGTYPE_CTS;
5965                 igb_write_mbx(hw, &ping, 1, i);
5966         }
5967 }
5968
5969 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5970 {
5971         struct e1000_hw *hw = &adapter->hw;
5972         u32 vmolr = rd32(E1000_VMOLR(vf));
5973         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5974
5975         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5976                             IGB_VF_FLAG_MULTI_PROMISC);
5977         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5978
5979         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5980                 vmolr |= E1000_VMOLR_MPME;
5981                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5982                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5983         } else {
5984                 /* if we have hashes and we are clearing a multicast promisc
5985                  * flag we need to write the hashes to the MTA as this step
5986                  * was previously skipped
5987                  */
5988                 if (vf_data->num_vf_mc_hashes > 30) {
5989                         vmolr |= E1000_VMOLR_MPME;
5990                 } else if (vf_data->num_vf_mc_hashes) {
5991                         int j;
5992
5993                         vmolr |= E1000_VMOLR_ROMPE;
5994                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5995                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5996                 }
5997         }
5998
5999         wr32(E1000_VMOLR(vf), vmolr);
6000
6001         /* there are flags left unprocessed, likely not supported */
6002         if (*msgbuf & E1000_VT_MSGINFO_MASK)
6003                 return -EINVAL;
6004
6005         return 0;
6006 }
6007
6008 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6009                                   u32 *msgbuf, u32 vf)
6010 {
6011         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6012         u16 *hash_list = (u16 *)&msgbuf[1];
6013         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6014         int i;
6015
6016         /* salt away the number of multicast addresses assigned
6017          * to this VF for later use to restore when the PF multi cast
6018          * list changes
6019          */
6020         vf_data->num_vf_mc_hashes = n;
6021
6022         /* only up to 30 hash values supported */
6023         if (n > 30)
6024                 n = 30;
6025
6026         /* store the hashes for later use */
6027         for (i = 0; i < n; i++)
6028                 vf_data->vf_mc_hashes[i] = hash_list[i];
6029
6030         /* Flush and reset the mta with the new values */
6031         igb_set_rx_mode(adapter->netdev);
6032
6033         return 0;
6034 }
6035
6036 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6037 {
6038         struct e1000_hw *hw = &adapter->hw;
6039         struct vf_data_storage *vf_data;
6040         int i, j;
6041
6042         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6043                 u32 vmolr = rd32(E1000_VMOLR(i));
6044
6045                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6046
6047                 vf_data = &adapter->vf_data[i];
6048
6049                 if ((vf_data->num_vf_mc_hashes > 30) ||
6050                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6051                         vmolr |= E1000_VMOLR_MPME;
6052                 } else if (vf_data->num_vf_mc_hashes) {
6053                         vmolr |= E1000_VMOLR_ROMPE;
6054                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6055                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
6056                 }
6057                 wr32(E1000_VMOLR(i), vmolr);
6058         }
6059 }
6060
6061 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6062 {
6063         struct e1000_hw *hw = &adapter->hw;
6064         u32 pool_mask, vlvf_mask, i;
6065
6066         /* create mask for VF and other pools */
6067         pool_mask = E1000_VLVF_POOLSEL_MASK;
6068         vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
6069
6070         /* drop PF from pool bits */
6071         pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
6072                              adapter->vfs_allocated_count);
6073
6074         /* Find the vlan filter for this id */
6075         for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
6076                 u32 vlvf = rd32(E1000_VLVF(i));
6077                 u32 vfta_mask, vid, vfta;
6078
6079                 /* remove the vf from the pool */
6080                 if (!(vlvf & vlvf_mask))
6081                         continue;
6082
6083                 /* clear out bit from VLVF */
6084                 vlvf ^= vlvf_mask;
6085
6086                 /* if other pools are present, just remove ourselves */
6087                 if (vlvf & pool_mask)
6088                         goto update_vlvfb;
6089
6090                 /* if PF is present, leave VFTA */
6091                 if (vlvf & E1000_VLVF_POOLSEL_MASK)
6092                         goto update_vlvf;
6093
6094                 vid = vlvf & E1000_VLVF_VLANID_MASK;
6095                 vfta_mask = BIT(vid % 32);
6096
6097                 /* clear bit from VFTA */
6098                 vfta = adapter->shadow_vfta[vid / 32];
6099                 if (vfta & vfta_mask)
6100                         hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
6101 update_vlvf:
6102                 /* clear pool selection enable */
6103                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6104                         vlvf &= E1000_VLVF_POOLSEL_MASK;
6105                 else
6106                         vlvf = 0;
6107 update_vlvfb:
6108                 /* clear pool bits */
6109                 wr32(E1000_VLVF(i), vlvf);
6110         }
6111 }
6112
6113 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
6114 {
6115         u32 vlvf;
6116         int idx;
6117
6118         /* short cut the special case */
6119         if (vlan == 0)
6120                 return 0;
6121
6122         /* Search for the VLAN id in the VLVF entries */
6123         for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
6124                 vlvf = rd32(E1000_VLVF(idx));
6125                 if ((vlvf & VLAN_VID_MASK) == vlan)
6126                         break;
6127         }
6128
6129         return idx;
6130 }
6131
6132 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
6133 {
6134         struct e1000_hw *hw = &adapter->hw;
6135         u32 bits, pf_id;
6136         int idx;
6137
6138         idx = igb_find_vlvf_entry(hw, vid);
6139         if (!idx)
6140                 return;
6141
6142         /* See if any other pools are set for this VLAN filter
6143          * entry other than the PF.
6144          */
6145         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
6146         bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
6147         bits &= rd32(E1000_VLVF(idx));
6148
6149         /* Disable the filter so this falls into the default pool. */
6150         if (!bits) {
6151                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6152                         wr32(E1000_VLVF(idx), BIT(pf_id));
6153                 else
6154                         wr32(E1000_VLVF(idx), 0);
6155         }
6156 }
6157
6158 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
6159                            bool add, u32 vf)
6160 {
6161         int pf_id = adapter->vfs_allocated_count;
6162         struct e1000_hw *hw = &adapter->hw;
6163         int err;
6164
6165         /* If VLAN overlaps with one the PF is currently monitoring make
6166          * sure that we are able to allocate a VLVF entry.  This may be
6167          * redundant but it guarantees PF will maintain visibility to
6168          * the VLAN.
6169          */
6170         if (add && test_bit(vid, adapter->active_vlans)) {
6171                 err = igb_vfta_set(hw, vid, pf_id, true, false);
6172                 if (err)
6173                         return err;
6174         }
6175
6176         err = igb_vfta_set(hw, vid, vf, add, false);
6177
6178         if (add && !err)
6179                 return err;
6180
6181         /* If we failed to add the VF VLAN or we are removing the VF VLAN
6182          * we may need to drop the PF pool bit in order to allow us to free
6183          * up the VLVF resources.
6184          */
6185         if (test_bit(vid, adapter->active_vlans) ||
6186             (adapter->flags & IGB_FLAG_VLAN_PROMISC))
6187                 igb_update_pf_vlvf(adapter, vid);
6188
6189         return err;
6190 }
6191
6192 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6193 {
6194         struct e1000_hw *hw = &adapter->hw;
6195
6196         if (vid)
6197                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6198         else
6199                 wr32(E1000_VMVIR(vf), 0);
6200 }
6201
6202 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
6203                                 u16 vlan, u8 qos)
6204 {
6205         int err;
6206
6207         err = igb_set_vf_vlan(adapter, vlan, true, vf);
6208         if (err)
6209                 return err;
6210
6211         igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6212         igb_set_vmolr(adapter, vf, !vlan);
6213
6214         /* revoke access to previous VLAN */
6215         if (vlan != adapter->vf_data[vf].pf_vlan)
6216                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6217                                 false, vf);
6218
6219         adapter->vf_data[vf].pf_vlan = vlan;
6220         adapter->vf_data[vf].pf_qos = qos;
6221         igb_set_vf_vlan_strip(adapter, vf, true);
6222         dev_info(&adapter->pdev->dev,
6223                  "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6224         if (test_bit(__IGB_DOWN, &adapter->state)) {
6225                 dev_warn(&adapter->pdev->dev,
6226                          "The VF VLAN has been set, but the PF device is not up.\n");
6227                 dev_warn(&adapter->pdev->dev,
6228                          "Bring the PF device up before attempting to use the VF device.\n");
6229         }
6230
6231         return err;
6232 }
6233
6234 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
6235 {
6236         /* Restore tagless access via VLAN 0 */
6237         igb_set_vf_vlan(adapter, 0, true, vf);
6238
6239         igb_set_vmvir(adapter, 0, vf);
6240         igb_set_vmolr(adapter, vf, true);
6241
6242         /* Remove any PF assigned VLAN */
6243         if (adapter->vf_data[vf].pf_vlan)
6244                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6245                                 false, vf);
6246
6247         adapter->vf_data[vf].pf_vlan = 0;
6248         adapter->vf_data[vf].pf_qos = 0;
6249         igb_set_vf_vlan_strip(adapter, vf, false);
6250
6251         return 0;
6252 }
6253
6254 static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
6255                                u16 vlan, u8 qos, __be16 vlan_proto)
6256 {
6257         struct igb_adapter *adapter = netdev_priv(netdev);
6258
6259         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
6260                 return -EINVAL;
6261
6262         if (vlan_proto != htons(ETH_P_8021Q))
6263                 return -EPROTONOSUPPORT;
6264
6265         return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
6266                                igb_disable_port_vlan(adapter, vf);
6267 }
6268
6269 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6270 {
6271         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6272         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6273         int ret;
6274
6275         if (adapter->vf_data[vf].pf_vlan)
6276                 return -1;
6277
6278         /* VLAN 0 is a special case, don't allow it to be removed */
6279         if (!vid && !add)
6280                 return 0;
6281
6282         ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
6283         if (!ret)
6284                 igb_set_vf_vlan_strip(adapter, vf, !!vid);
6285         return ret;
6286 }
6287
6288 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6289 {
6290         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6291
6292         /* clear flags - except flag that indicates PF has set the MAC */
6293         vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
6294         vf_data->last_nack = jiffies;
6295
6296         /* reset vlans for device */
6297         igb_clear_vf_vfta(adapter, vf);
6298         igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
6299         igb_set_vmvir(adapter, vf_data->pf_vlan |
6300                                (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
6301         igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
6302         igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
6303
6304         /* reset multicast table array for vf */
6305         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6306
6307         /* Flush and reset the mta with the new values */
6308         igb_set_rx_mode(adapter->netdev);
6309 }
6310
6311 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6312 {
6313         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6314
6315         /* clear mac address as we were hotplug removed/added */
6316         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6317                 eth_zero_addr(vf_mac);
6318
6319         /* process remaining reset events */
6320         igb_vf_reset(adapter, vf);
6321 }
6322
6323 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6324 {
6325         struct e1000_hw *hw = &adapter->hw;
6326         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6327         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
6328         u32 reg, msgbuf[3];
6329         u8 *addr = (u8 *)(&msgbuf[1]);
6330
6331         /* process all the same items cleared in a function level reset */
6332         igb_vf_reset(adapter, vf);
6333
6334         /* set vf mac address */
6335         igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
6336
6337         /* enable transmit and receive for vf */
6338         reg = rd32(E1000_VFTE);
6339         wr32(E1000_VFTE, reg | BIT(vf));
6340         reg = rd32(E1000_VFRE);
6341         wr32(E1000_VFRE, reg | BIT(vf));
6342
6343         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6344
6345         /* reply to reset with ack and vf mac address */
6346         if (!is_zero_ether_addr(vf_mac)) {
6347                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6348                 memcpy(addr, vf_mac, ETH_ALEN);
6349         } else {
6350                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
6351         }
6352         igb_write_mbx(hw, msgbuf, 3, vf);
6353 }
6354
6355 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6356 {
6357         /* The VF MAC Address is stored in a packed array of bytes
6358          * starting at the second 32 bit word of the msg array
6359          */
6360         unsigned char *addr = (char *)&msg[1];
6361         int err = -1;
6362
6363         if (is_valid_ether_addr(addr))
6364                 err = igb_set_vf_mac(adapter, vf, addr);
6365
6366         return err;
6367 }
6368
6369 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6370 {
6371         struct e1000_hw *hw = &adapter->hw;
6372         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6373         u32 msg = E1000_VT_MSGTYPE_NACK;
6374
6375         /* if device isn't clear to send it shouldn't be reading either */
6376         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6377             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6378                 igb_write_mbx(hw, &msg, 1, vf);
6379                 vf_data->last_nack = jiffies;
6380         }
6381 }
6382
6383 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6384 {
6385         struct pci_dev *pdev = adapter->pdev;
6386         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6387         struct e1000_hw *hw = &adapter->hw;
6388         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6389         s32 retval;
6390
6391         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6392
6393         if (retval) {
6394                 /* if receive failed revoke VF CTS stats and restart init */
6395                 dev_err(&pdev->dev, "Error receiving message from VF\n");
6396                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
6397                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6398                         return;
6399                 goto out;
6400         }
6401
6402         /* this is a message we already processed, do nothing */
6403         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6404                 return;
6405
6406         /* until the vf completes a reset it should not be
6407          * allowed to start any configuration.
6408          */
6409         if (msgbuf[0] == E1000_VF_RESET) {
6410                 igb_vf_reset_msg(adapter, vf);
6411                 return;
6412         }
6413
6414         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6415                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6416                         return;
6417                 retval = -1;
6418                 goto out;
6419         }
6420
6421         switch ((msgbuf[0] & 0xFFFF)) {
6422         case E1000_VF_SET_MAC_ADDR:
6423                 retval = -EINVAL;
6424                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6425                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6426                 else
6427                         dev_warn(&pdev->dev,
6428                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6429                                  vf);
6430                 break;
6431         case E1000_VF_SET_PROMISC:
6432                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6433                 break;
6434         case E1000_VF_SET_MULTICAST:
6435                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6436                 break;
6437         case E1000_VF_SET_LPE:
6438                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6439                 break;
6440         case E1000_VF_SET_VLAN:
6441                 retval = -1;
6442                 if (vf_data->pf_vlan)
6443                         dev_warn(&pdev->dev,
6444                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6445                                  vf);
6446                 else
6447                         retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
6448                 break;
6449         default:
6450                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
6451                 retval = -1;
6452                 break;
6453         }
6454
6455         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6456 out:
6457         /* notify the VF of the results of what it sent us */
6458         if (retval)
6459                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6460         else
6461                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6462
6463         igb_write_mbx(hw, msgbuf, 1, vf);
6464 }
6465
6466 static void igb_msg_task(struct igb_adapter *adapter)
6467 {
6468         struct e1000_hw *hw = &adapter->hw;
6469         u32 vf;
6470
6471         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6472                 /* process any reset requests */
6473                 if (!igb_check_for_rst(hw, vf))
6474                         igb_vf_reset_event(adapter, vf);
6475
6476                 /* process any messages pending */
6477                 if (!igb_check_for_msg(hw, vf))
6478                         igb_rcv_msg_from_vf(adapter, vf);
6479
6480                 /* process any acks */
6481                 if (!igb_check_for_ack(hw, vf))
6482                         igb_rcv_ack_from_vf(adapter, vf);
6483         }
6484 }
6485
6486 /**
6487  *  igb_set_uta - Set unicast filter table address
6488  *  @adapter: board private structure
6489  *  @set: boolean indicating if we are setting or clearing bits
6490  *
6491  *  The unicast table address is a register array of 32-bit registers.
6492  *  The table is meant to be used in a way similar to how the MTA is used
6493  *  however due to certain limitations in the hardware it is necessary to
6494  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6495  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6496  **/
6497 static void igb_set_uta(struct igb_adapter *adapter, bool set)
6498 {
6499         struct e1000_hw *hw = &adapter->hw;
6500         u32 uta = set ? ~0 : 0;
6501         int i;
6502
6503         /* we only need to do this if VMDq is enabled */
6504         if (!adapter->vfs_allocated_count)
6505                 return;
6506
6507         for (i = hw->mac.uta_reg_count; i--;)
6508                 array_wr32(E1000_UTA, i, uta);
6509 }
6510
6511 /**
6512  *  igb_intr_msi - Interrupt Handler
6513  *  @irq: interrupt number
6514  *  @data: pointer to a network interface device structure
6515  **/
6516 static irqreturn_t igb_intr_msi(int irq, void *data)
6517 {
6518         struct igb_adapter *adapter = data;
6519         struct igb_q_vector *q_vector = adapter->q_vector[0];
6520         struct e1000_hw *hw = &adapter->hw;
6521         /* read ICR disables interrupts using IAM */
6522         u32 icr = rd32(E1000_ICR);
6523
6524         igb_write_itr(q_vector);
6525
6526         if (icr & E1000_ICR_DRSTA)
6527                 schedule_work(&adapter->reset_task);
6528
6529         if (icr & E1000_ICR_DOUTSYNC) {
6530                 /* HW is reporting DMA is out of sync */
6531                 adapter->stats.doosync++;
6532         }
6533
6534         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6535                 hw->mac.get_link_status = 1;
6536                 if (!test_bit(__IGB_DOWN, &adapter->state))
6537                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6538         }
6539
6540         if (icr & E1000_ICR_TS)
6541                 igb_tsync_interrupt(adapter);
6542
6543         napi_schedule(&q_vector->napi);
6544
6545         return IRQ_HANDLED;
6546 }
6547
6548 /**
6549  *  igb_intr - Legacy Interrupt Handler
6550  *  @irq: interrupt number
6551  *  @data: pointer to a network interface device structure
6552  **/
6553 static irqreturn_t igb_intr(int irq, void *data)
6554 {
6555         struct igb_adapter *adapter = data;
6556         struct igb_q_vector *q_vector = adapter->q_vector[0];
6557         struct e1000_hw *hw = &adapter->hw;
6558         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6559          * need for the IMC write
6560          */
6561         u32 icr = rd32(E1000_ICR);
6562
6563         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6564          * not set, then the adapter didn't send an interrupt
6565          */
6566         if (!(icr & E1000_ICR_INT_ASSERTED))
6567                 return IRQ_NONE;
6568
6569         igb_write_itr(q_vector);
6570
6571         if (icr & E1000_ICR_DRSTA)
6572                 schedule_work(&adapter->reset_task);
6573
6574         if (icr & E1000_ICR_DOUTSYNC) {
6575                 /* HW is reporting DMA is out of sync */
6576                 adapter->stats.doosync++;
6577         }
6578
6579         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6580                 hw->mac.get_link_status = 1;
6581                 /* guard against interrupt when we're going down */
6582                 if (!test_bit(__IGB_DOWN, &adapter->state))
6583                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6584         }
6585
6586         if (icr & E1000_ICR_TS)
6587                 igb_tsync_interrupt(adapter);
6588
6589         napi_schedule(&q_vector->napi);
6590
6591         return IRQ_HANDLED;
6592 }
6593
6594 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6595 {
6596         struct igb_adapter *adapter = q_vector->adapter;
6597         struct e1000_hw *hw = &adapter->hw;
6598
6599         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6600             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6601                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6602                         igb_set_itr(q_vector);
6603                 else
6604                         igb_update_ring_itr(q_vector);
6605         }
6606
6607         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6608                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
6609                         wr32(E1000_EIMS, q_vector->eims_value);
6610                 else
6611                         igb_irq_enable(adapter);
6612         }
6613 }
6614
6615 /**
6616  *  igb_poll - NAPI Rx polling callback
6617  *  @napi: napi polling structure
6618  *  @budget: count of how many packets we should handle
6619  **/
6620 static int igb_poll(struct napi_struct *napi, int budget)
6621 {
6622         struct igb_q_vector *q_vector = container_of(napi,
6623                                                      struct igb_q_vector,
6624                                                      napi);
6625         bool clean_complete = true;
6626         int work_done = 0;
6627
6628 #ifdef CONFIG_IGB_DCA
6629         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6630                 igb_update_dca(q_vector);
6631 #endif
6632         if (q_vector->tx.ring)
6633                 clean_complete = igb_clean_tx_irq(q_vector, budget);
6634
6635         if (q_vector->rx.ring) {
6636                 int cleaned = igb_clean_rx_irq(q_vector, budget);
6637
6638                 work_done += cleaned;
6639                 if (cleaned >= budget)
6640                         clean_complete = false;
6641         }
6642
6643         /* If all work not completed, return budget and keep polling */
6644         if (!clean_complete)
6645                 return budget;
6646
6647         /* If not enough Rx work done, exit the polling mode */
6648         napi_complete_done(napi, work_done);
6649         igb_ring_irq_enable(q_vector);
6650
6651         return 0;
6652 }
6653
6654 /**
6655  *  igb_clean_tx_irq - Reclaim resources after transmit completes
6656  *  @q_vector: pointer to q_vector containing needed info
6657  *  @napi_budget: Used to determine if we are in netpoll
6658  *
6659  *  returns true if ring is completely cleaned
6660  **/
6661 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
6662 {
6663         struct igb_adapter *adapter = q_vector->adapter;
6664         struct igb_ring *tx_ring = q_vector->tx.ring;
6665         struct igb_tx_buffer *tx_buffer;
6666         union e1000_adv_tx_desc *tx_desc;
6667         unsigned int total_bytes = 0, total_packets = 0;
6668         unsigned int budget = q_vector->tx.work_limit;
6669         unsigned int i = tx_ring->next_to_clean;
6670
6671         if (test_bit(__IGB_DOWN, &adapter->state))
6672                 return true;
6673
6674         tx_buffer = &tx_ring->tx_buffer_info[i];
6675         tx_desc = IGB_TX_DESC(tx_ring, i);
6676         i -= tx_ring->count;
6677
6678         do {
6679                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6680
6681                 /* if next_to_watch is not set then there is no work pending */
6682                 if (!eop_desc)
6683                         break;
6684
6685                 /* prevent any other reads prior to eop_desc */
6686                 smp_rmb();
6687
6688                 /* if DD is not set pending work has not been completed */
6689                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6690                         break;
6691
6692                 /* clear next_to_watch to prevent false hangs */
6693                 tx_buffer->next_to_watch = NULL;
6694
6695                 /* update the statistics for this packet */
6696                 total_bytes += tx_buffer->bytecount;
6697                 total_packets += tx_buffer->gso_segs;
6698
6699                 /* free the skb */
6700                 napi_consume_skb(tx_buffer->skb, napi_budget);
6701
6702                 /* unmap skb header data */
6703                 dma_unmap_single(tx_ring->dev,
6704                                  dma_unmap_addr(tx_buffer, dma),
6705                                  dma_unmap_len(tx_buffer, len),
6706                                  DMA_TO_DEVICE);
6707
6708                 /* clear tx_buffer data */
6709                 tx_buffer->skb = NULL;
6710                 dma_unmap_len_set(tx_buffer, len, 0);
6711
6712                 /* clear last DMA location and unmap remaining buffers */
6713                 while (tx_desc != eop_desc) {
6714                         tx_buffer++;
6715                         tx_desc++;
6716                         i++;
6717                         if (unlikely(!i)) {
6718                                 i -= tx_ring->count;
6719                                 tx_buffer = tx_ring->tx_buffer_info;
6720                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6721                         }
6722
6723                         /* unmap any remaining paged data */
6724                         if (dma_unmap_len(tx_buffer, len)) {
6725                                 dma_unmap_page(tx_ring->dev,
6726                                                dma_unmap_addr(tx_buffer, dma),
6727                                                dma_unmap_len(tx_buffer, len),
6728                                                DMA_TO_DEVICE);
6729                                 dma_unmap_len_set(tx_buffer, len, 0);
6730                         }
6731                 }
6732
6733                 /* move us one more past the eop_desc for start of next pkt */
6734                 tx_buffer++;
6735                 tx_desc++;
6736                 i++;
6737                 if (unlikely(!i)) {
6738                         i -= tx_ring->count;
6739                         tx_buffer = tx_ring->tx_buffer_info;
6740                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6741                 }
6742
6743                 /* issue prefetch for next Tx descriptor */
6744                 prefetch(tx_desc);
6745
6746                 /* update budget accounting */
6747                 budget--;
6748         } while (likely(budget));
6749
6750         netdev_tx_completed_queue(txring_txq(tx_ring),
6751                                   total_packets, total_bytes);
6752         i += tx_ring->count;
6753         tx_ring->next_to_clean = i;
6754         u64_stats_update_begin(&tx_ring->tx_syncp);
6755         tx_ring->tx_stats.bytes += total_bytes;
6756         tx_ring->tx_stats.packets += total_packets;
6757         u64_stats_update_end(&tx_ring->tx_syncp);
6758         q_vector->tx.total_bytes += total_bytes;
6759         q_vector->tx.total_packets += total_packets;
6760
6761         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6762                 struct e1000_hw *hw = &adapter->hw;
6763
6764                 /* Detect a transmit hang in hardware, this serializes the
6765                  * check with the clearing of time_stamp and movement of i
6766                  */
6767                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6768                 if (tx_buffer->next_to_watch &&
6769                     time_after(jiffies, tx_buffer->time_stamp +
6770                                (adapter->tx_timeout_factor * HZ)) &&
6771                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6772
6773                         /* detected Tx unit hang */
6774                         dev_err(tx_ring->dev,
6775                                 "Detected Tx Unit Hang\n"
6776                                 "  Tx Queue             <%d>\n"
6777                                 "  TDH                  <%x>\n"
6778                                 "  TDT                  <%x>\n"
6779                                 "  next_to_use          <%x>\n"
6780                                 "  next_to_clean        <%x>\n"
6781                                 "buffer_info[next_to_clean]\n"
6782                                 "  time_stamp           <%lx>\n"
6783                                 "  next_to_watch        <%p>\n"
6784                                 "  jiffies              <%lx>\n"
6785                                 "  desc.status          <%x>\n",
6786                                 tx_ring->queue_index,
6787                                 rd32(E1000_TDH(tx_ring->reg_idx)),
6788                                 readl(tx_ring->tail),
6789                                 tx_ring->next_to_use,
6790                                 tx_ring->next_to_clean,
6791                                 tx_buffer->time_stamp,
6792                                 tx_buffer->next_to_watch,
6793                                 jiffies,
6794                                 tx_buffer->next_to_watch->wb.status);
6795                         netif_stop_subqueue(tx_ring->netdev,
6796                                             tx_ring->queue_index);
6797
6798                         /* we are about to reset, no point in enabling stuff */
6799                         return true;
6800                 }
6801         }
6802
6803 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6804         if (unlikely(total_packets &&
6805             netif_carrier_ok(tx_ring->netdev) &&
6806             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6807                 /* Make sure that anybody stopping the queue after this
6808                  * sees the new next_to_clean.
6809                  */
6810                 smp_mb();
6811                 if (__netif_subqueue_stopped(tx_ring->netdev,
6812                                              tx_ring->queue_index) &&
6813                     !(test_bit(__IGB_DOWN, &adapter->state))) {
6814                         netif_wake_subqueue(tx_ring->netdev,
6815                                             tx_ring->queue_index);
6816
6817                         u64_stats_update_begin(&tx_ring->tx_syncp);
6818                         tx_ring->tx_stats.restart_queue++;
6819                         u64_stats_update_end(&tx_ring->tx_syncp);
6820                 }
6821         }
6822
6823         return !!budget;
6824 }
6825
6826 /**
6827  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
6828  *  @rx_ring: rx descriptor ring to store buffers on
6829  *  @old_buff: donor buffer to have page reused
6830  *
6831  *  Synchronizes page for reuse by the adapter
6832  **/
6833 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6834                               struct igb_rx_buffer *old_buff)
6835 {
6836         struct igb_rx_buffer *new_buff;
6837         u16 nta = rx_ring->next_to_alloc;
6838
6839         new_buff = &rx_ring->rx_buffer_info[nta];
6840
6841         /* update, and store next to alloc */
6842         nta++;
6843         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6844
6845         /* transfer page from old buffer to new buffer */
6846         *new_buff = *old_buff;
6847
6848         /* sync the buffer for use by the device */
6849         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6850                                          old_buff->page_offset,
6851                                          IGB_RX_BUFSZ,
6852                                          DMA_FROM_DEVICE);
6853 }
6854
6855 static inline bool igb_page_is_reserved(struct page *page)
6856 {
6857         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
6858 }
6859
6860 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6861                                   struct page *page,
6862                                   unsigned int truesize)
6863 {
6864         /* avoid re-using remote pages */
6865         if (unlikely(igb_page_is_reserved(page)))
6866                 return false;
6867
6868 #if (PAGE_SIZE < 8192)
6869         /* if we are only owner of page we can reuse it */
6870         if (unlikely(page_count(page) != 1))
6871                 return false;
6872
6873         /* flip page offset to other buffer */
6874         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6875 #else
6876         /* move offset up to the next cache line */
6877         rx_buffer->page_offset += truesize;
6878
6879         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6880                 return false;
6881 #endif
6882
6883         /* Even if we own the page, we are not allowed to use atomic_set()
6884          * This would break get_page_unless_zero() users.
6885          */
6886         page_ref_inc(page);
6887
6888         return true;
6889 }
6890
6891 /**
6892  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6893  *  @rx_ring: rx descriptor ring to transact packets on
6894  *  @rx_buffer: buffer containing page to add
6895  *  @rx_desc: descriptor containing length of buffer written by hardware
6896  *  @skb: sk_buff to place the data into
6897  *
6898  *  This function will add the data contained in rx_buffer->page to the skb.
6899  *  This is done either through a direct copy if the data in the buffer is
6900  *  less than the skb header size, otherwise it will just attach the page as
6901  *  a frag to the skb.
6902  *
6903  *  The function will then update the page offset if necessary and return
6904  *  true if the buffer can be reused by the adapter.
6905  **/
6906 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6907                             struct igb_rx_buffer *rx_buffer,
6908                             unsigned int size,
6909                             union e1000_adv_rx_desc *rx_desc,
6910                             struct sk_buff *skb)
6911 {
6912         struct page *page = rx_buffer->page;
6913         unsigned char *va = page_address(page) + rx_buffer->page_offset;
6914 #if (PAGE_SIZE < 8192)
6915         unsigned int truesize = IGB_RX_BUFSZ;
6916 #else
6917         unsigned int truesize = SKB_DATA_ALIGN(size);
6918 #endif
6919         unsigned int pull_len;
6920
6921         if (unlikely(skb_is_nonlinear(skb)))
6922                 goto add_tail_frag;
6923
6924         if (unlikely(igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))) {
6925                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6926                 va += IGB_TS_HDR_LEN;
6927                 size -= IGB_TS_HDR_LEN;
6928         }
6929
6930         if (likely(size <= IGB_RX_HDR_LEN)) {
6931                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6932
6933                 /* page is not reserved, we can reuse buffer as-is */
6934                 if (likely(!igb_page_is_reserved(page)))
6935                         return true;
6936
6937                 /* this page cannot be reused so discard it */
6938                 __free_page(page);
6939                 return false;
6940         }
6941
6942         /* we need the header to contain the greater of either ETH_HLEN or
6943          * 60 bytes if the skb->len is less than 60 for skb_pad.
6944          */
6945         pull_len = eth_get_headlen(va, IGB_RX_HDR_LEN);
6946
6947         /* align pull length to size of long to optimize memcpy performance */
6948         memcpy(__skb_put(skb, pull_len), va, ALIGN(pull_len, sizeof(long)));
6949
6950         /* update all of the pointers */
6951         va += pull_len;
6952         size -= pull_len;
6953
6954 add_tail_frag:
6955         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6956                         (unsigned long)va & ~PAGE_MASK, size, truesize);
6957
6958         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6959 }
6960
6961 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6962                                            union e1000_adv_rx_desc *rx_desc,
6963                                            struct sk_buff *skb)
6964 {
6965         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6966         struct igb_rx_buffer *rx_buffer;
6967         struct page *page;
6968
6969         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6970         page = rx_buffer->page;
6971         prefetchw(page);
6972
6973         if (likely(!skb)) {
6974                 void *page_addr = page_address(page) +
6975                                   rx_buffer->page_offset;
6976
6977                 /* prefetch first cache line of first page */
6978                 prefetch(page_addr);
6979 #if L1_CACHE_BYTES < 128
6980                 prefetch(page_addr + L1_CACHE_BYTES);
6981 #endif
6982
6983                 /* allocate a skb to store the frags */
6984                 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
6985                 if (unlikely(!skb)) {
6986                         rx_ring->rx_stats.alloc_failed++;
6987                         return NULL;
6988                 }
6989
6990                 /* we will be copying header into skb->data in
6991                  * pskb_may_pull so it is in our interest to prefetch
6992                  * it now to avoid a possible cache miss
6993                  */
6994                 prefetchw(skb->data);
6995         }
6996
6997         /* we are reusing so sync this buffer for CPU use */
6998         dma_sync_single_range_for_cpu(rx_ring->dev,
6999                                       rx_buffer->dma,
7000                                       rx_buffer->page_offset,
7001                                       size,
7002                                       DMA_FROM_DEVICE);
7003
7004         /* pull page into skb */
7005         if (igb_add_rx_frag(rx_ring, rx_buffer, size, rx_desc, skb)) {
7006                 /* hand second half of page back to the ring */
7007                 igb_reuse_rx_page(rx_ring, rx_buffer);
7008         } else {
7009                 /* we are not reusing the buffer so unmap it */
7010                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7011                                PAGE_SIZE, DMA_FROM_DEVICE);
7012         }
7013
7014         /* clear contents of rx_buffer */
7015         rx_buffer->page = NULL;
7016
7017         return skb;
7018 }
7019
7020 static inline void igb_rx_checksum(struct igb_ring *ring,
7021                                    union e1000_adv_rx_desc *rx_desc,
7022                                    struct sk_buff *skb)
7023 {
7024         skb_checksum_none_assert(skb);
7025
7026         /* Ignore Checksum bit is set */
7027         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7028                 return;
7029
7030         /* Rx checksum disabled via ethtool */
7031         if (!(ring->netdev->features & NETIF_F_RXCSUM))
7032                 return;
7033
7034         /* TCP/UDP checksum error bit is set */
7035         if (igb_test_staterr(rx_desc,
7036                              E1000_RXDEXT_STATERR_TCPE |
7037                              E1000_RXDEXT_STATERR_IPE)) {
7038                 /* work around errata with sctp packets where the TCPE aka
7039                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7040                  * packets, (aka let the stack check the crc32c)
7041                  */
7042                 if (!((skb->len == 60) &&
7043                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
7044                         u64_stats_update_begin(&ring->rx_syncp);
7045                         ring->rx_stats.csum_err++;
7046                         u64_stats_update_end(&ring->rx_syncp);
7047                 }
7048                 /* let the stack verify checksum errors */
7049                 return;
7050         }
7051         /* It must be a TCP or UDP packet with a valid checksum */
7052         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7053                                       E1000_RXD_STAT_UDPCS))
7054                 skb->ip_summed = CHECKSUM_UNNECESSARY;
7055
7056         dev_dbg(ring->dev, "cksum success: bits %08X\n",
7057                 le32_to_cpu(rx_desc->wb.upper.status_error));
7058 }
7059
7060 static inline void igb_rx_hash(struct igb_ring *ring,
7061                                union e1000_adv_rx_desc *rx_desc,
7062                                struct sk_buff *skb)
7063 {
7064         if (ring->netdev->features & NETIF_F_RXHASH)
7065                 skb_set_hash(skb,
7066                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7067                              PKT_HASH_TYPE_L3);
7068 }
7069
7070 /**
7071  *  igb_is_non_eop - process handling of non-EOP buffers
7072  *  @rx_ring: Rx ring being processed
7073  *  @rx_desc: Rx descriptor for current buffer
7074  *  @skb: current socket buffer containing buffer in progress
7075  *
7076  *  This function updates next to clean.  If the buffer is an EOP buffer
7077  *  this function exits returning false, otherwise it will place the
7078  *  sk_buff in the next buffer to be chained and return true indicating
7079  *  that this is in fact a non-EOP buffer.
7080  **/
7081 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7082                            union e1000_adv_rx_desc *rx_desc)
7083 {
7084         u32 ntc = rx_ring->next_to_clean + 1;
7085
7086         /* fetch, update, and store next to clean */
7087         ntc = (ntc < rx_ring->count) ? ntc : 0;
7088         rx_ring->next_to_clean = ntc;
7089
7090         prefetch(IGB_RX_DESC(rx_ring, ntc));
7091
7092         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7093                 return false;
7094
7095         return true;
7096 }
7097
7098 /**
7099  *  igb_cleanup_headers - Correct corrupted or empty headers
7100  *  @rx_ring: rx descriptor ring packet is being transacted on
7101  *  @rx_desc: pointer to the EOP Rx descriptor
7102  *  @skb: pointer to current skb being fixed
7103  *
7104  *  Address the case where we are pulling data in on pages only
7105  *  and as such no data is present in the skb header.
7106  *
7107  *  In addition if skb is not at least 60 bytes we need to pad it so that
7108  *  it is large enough to qualify as a valid Ethernet frame.
7109  *
7110  *  Returns true if an error was encountered and skb was freed.
7111  **/
7112 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
7113                                 union e1000_adv_rx_desc *rx_desc,
7114                                 struct sk_buff *skb)
7115 {
7116         if (unlikely((igb_test_staterr(rx_desc,
7117                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
7118                 struct net_device *netdev = rx_ring->netdev;
7119                 if (!(netdev->features & NETIF_F_RXALL)) {
7120                         dev_kfree_skb_any(skb);
7121                         return true;
7122                 }
7123         }
7124
7125         /* if eth_skb_pad returns an error the skb was freed */
7126         if (eth_skb_pad(skb))
7127                 return true;
7128
7129         return false;
7130 }
7131
7132 /**
7133  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
7134  *  @rx_ring: rx descriptor ring packet is being transacted on
7135  *  @rx_desc: pointer to the EOP Rx descriptor
7136  *  @skb: pointer to current skb being populated
7137  *
7138  *  This function checks the ring, descriptor, and packet information in
7139  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
7140  *  other fields within the skb.
7141  **/
7142 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7143                                    union e1000_adv_rx_desc *rx_desc,
7144                                    struct sk_buff *skb)
7145 {
7146         struct net_device *dev = rx_ring->netdev;
7147
7148         igb_rx_hash(rx_ring, rx_desc, skb);
7149
7150         igb_rx_checksum(rx_ring, rx_desc, skb);
7151
7152         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
7153             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
7154                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
7155
7156         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7157             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7158                 u16 vid;
7159
7160                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7161                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7162                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7163                 else
7164                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7165
7166                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7167         }
7168
7169         skb_record_rx_queue(skb, rx_ring->queue_index);
7170
7171         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
7172 }
7173
7174 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
7175 {
7176         struct igb_ring *rx_ring = q_vector->rx.ring;
7177         struct sk_buff *skb = rx_ring->skb;
7178         unsigned int total_bytes = 0, total_packets = 0;
7179         u16 cleaned_count = igb_desc_unused(rx_ring);
7180
7181         while (likely(total_packets < budget)) {
7182                 union e1000_adv_rx_desc *rx_desc;
7183
7184                 /* return some buffers to hardware, one at a time is too slow */
7185                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7186                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
7187                         cleaned_count = 0;
7188                 }
7189
7190                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
7191
7192                 if (!rx_desc->wb.upper.status_error)
7193                         break;
7194
7195                 /* This memory barrier is needed to keep us from reading
7196                  * any other fields out of the rx_desc until we know the
7197                  * descriptor has been written back
7198                  */
7199                 dma_rmb();
7200
7201                 /* retrieve a buffer from the ring */
7202                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
7203
7204                 /* exit if we failed to retrieve a buffer */
7205                 if (!skb)
7206                         break;
7207
7208                 cleaned_count++;
7209
7210                 /* fetch next buffer in frame if non-eop */
7211                 if (igb_is_non_eop(rx_ring, rx_desc))
7212                         continue;
7213
7214                 /* verify the packet layout is correct */
7215                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
7216                         skb = NULL;
7217                         continue;
7218                 }
7219
7220                 /* probably a little skewed due to removing CRC */
7221                 total_bytes += skb->len;
7222
7223                 /* populate checksum, timestamp, VLAN, and protocol */
7224                 igb_process_skb_fields(rx_ring, rx_desc, skb);
7225
7226                 napi_gro_receive(&q_vector->napi, skb);
7227
7228                 /* reset skb pointer */
7229                 skb = NULL;
7230
7231                 /* update budget accounting */
7232                 total_packets++;
7233         }
7234
7235         /* place incomplete frames back on ring for completion */
7236         rx_ring->skb = skb;
7237
7238         u64_stats_update_begin(&rx_ring->rx_syncp);
7239         rx_ring->rx_stats.packets += total_packets;
7240         rx_ring->rx_stats.bytes += total_bytes;
7241         u64_stats_update_end(&rx_ring->rx_syncp);
7242         q_vector->rx.total_packets += total_packets;
7243         q_vector->rx.total_bytes += total_bytes;
7244
7245         if (cleaned_count)
7246                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
7247
7248         return total_packets;
7249 }
7250
7251 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
7252                                   struct igb_rx_buffer *bi)
7253 {
7254         struct page *page = bi->page;
7255         dma_addr_t dma;
7256
7257         /* since we are recycling buffers we should seldom need to alloc */
7258         if (likely(page))
7259                 return true;
7260
7261         /* alloc new page for storage */
7262         page = dev_alloc_page();
7263         if (unlikely(!page)) {
7264                 rx_ring->rx_stats.alloc_failed++;
7265                 return false;
7266         }
7267
7268         /* map page for use */
7269         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
7270
7271         /* if mapping failed free memory back to system since
7272          * there isn't much point in holding memory we can't use
7273          */
7274         if (dma_mapping_error(rx_ring->dev, dma)) {
7275                 __free_page(page);
7276
7277                 rx_ring->rx_stats.alloc_failed++;
7278                 return false;
7279         }
7280
7281         bi->dma = dma;
7282         bi->page = page;
7283         bi->page_offset = 0;
7284
7285         return true;
7286 }
7287
7288 /**
7289  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
7290  *  @adapter: address of board private structure
7291  **/
7292 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
7293 {
7294         union e1000_adv_rx_desc *rx_desc;
7295         struct igb_rx_buffer *bi;
7296         u16 i = rx_ring->next_to_use;
7297
7298         /* nothing to do */
7299         if (!cleaned_count)
7300                 return;
7301
7302         rx_desc = IGB_RX_DESC(rx_ring, i);
7303         bi = &rx_ring->rx_buffer_info[i];
7304         i -= rx_ring->count;
7305
7306         do {
7307                 if (!igb_alloc_mapped_page(rx_ring, bi))
7308                         break;
7309
7310                 /* Refresh the desc even if buffer_addrs didn't change
7311                  * because each write-back erases this info.
7312                  */
7313                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
7314
7315                 rx_desc++;
7316                 bi++;
7317                 i++;
7318                 if (unlikely(!i)) {
7319                         rx_desc = IGB_RX_DESC(rx_ring, 0);
7320                         bi = rx_ring->rx_buffer_info;
7321                         i -= rx_ring->count;
7322                 }
7323
7324                 /* clear the status bits for the next_to_use descriptor */
7325                 rx_desc->wb.upper.status_error = 0;
7326
7327                 cleaned_count--;
7328         } while (cleaned_count);
7329
7330         i += rx_ring->count;
7331
7332         if (rx_ring->next_to_use != i) {
7333                 /* record the next descriptor to use */
7334                 rx_ring->next_to_use = i;
7335
7336                 /* update next to alloc since we have filled the ring */
7337                 rx_ring->next_to_alloc = i;
7338
7339                 /* Force memory writes to complete before letting h/w
7340                  * know there are new descriptors to fetch.  (Only
7341                  * applicable for weak-ordered memory model archs,
7342                  * such as IA-64).
7343                  */
7344                 wmb();
7345                 writel(i, rx_ring->tail);
7346         }
7347 }
7348
7349 /**
7350  * igb_mii_ioctl -
7351  * @netdev:
7352  * @ifreq:
7353  * @cmd:
7354  **/
7355 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7356 {
7357         struct igb_adapter *adapter = netdev_priv(netdev);
7358         struct mii_ioctl_data *data = if_mii(ifr);
7359
7360         if (adapter->hw.phy.media_type != e1000_media_type_copper)
7361                 return -EOPNOTSUPP;
7362
7363         switch (cmd) {
7364         case SIOCGMIIPHY:
7365                 data->phy_id = adapter->hw.phy.addr;
7366                 break;
7367         case SIOCGMIIREG:
7368                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
7369                                      &data->val_out))
7370                         return -EIO;
7371                 break;
7372         case SIOCSMIIREG:
7373         default:
7374                 return -EOPNOTSUPP;
7375         }
7376         return 0;
7377 }
7378
7379 /**
7380  * igb_ioctl -
7381  * @netdev:
7382  * @ifreq:
7383  * @cmd:
7384  **/
7385 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7386 {
7387         switch (cmd) {
7388         case SIOCGMIIPHY:
7389         case SIOCGMIIREG:
7390         case SIOCSMIIREG:
7391                 return igb_mii_ioctl(netdev, ifr, cmd);
7392         case SIOCGHWTSTAMP:
7393                 return igb_ptp_get_ts_config(netdev, ifr);
7394         case SIOCSHWTSTAMP:
7395                 return igb_ptp_set_ts_config(netdev, ifr);
7396         default:
7397                 return -EOPNOTSUPP;
7398         }
7399 }
7400
7401 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7402 {
7403         struct igb_adapter *adapter = hw->back;
7404
7405         pci_read_config_word(adapter->pdev, reg, value);
7406 }
7407
7408 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7409 {
7410         struct igb_adapter *adapter = hw->back;
7411
7412         pci_write_config_word(adapter->pdev, reg, *value);
7413 }
7414
7415 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7416 {
7417         struct igb_adapter *adapter = hw->back;
7418
7419         if (pcie_capability_read_word(adapter->pdev, reg, value))
7420                 return -E1000_ERR_CONFIG;
7421
7422         return 0;
7423 }
7424
7425 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7426 {
7427         struct igb_adapter *adapter = hw->back;
7428
7429         if (pcie_capability_write_word(adapter->pdev, reg, *value))
7430                 return -E1000_ERR_CONFIG;
7431
7432         return 0;
7433 }
7434
7435 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
7436 {
7437         struct igb_adapter *adapter = netdev_priv(netdev);
7438         struct e1000_hw *hw = &adapter->hw;
7439         u32 ctrl, rctl;
7440         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
7441
7442         if (enable) {
7443                 /* enable VLAN tag insert/strip */
7444                 ctrl = rd32(E1000_CTRL);
7445                 ctrl |= E1000_CTRL_VME;
7446                 wr32(E1000_CTRL, ctrl);
7447
7448                 /* Disable CFI check */
7449                 rctl = rd32(E1000_RCTL);
7450                 rctl &= ~E1000_RCTL_CFIEN;
7451                 wr32(E1000_RCTL, rctl);
7452         } else {
7453                 /* disable VLAN tag insert/strip */
7454                 ctrl = rd32(E1000_CTRL);
7455                 ctrl &= ~E1000_CTRL_VME;
7456                 wr32(E1000_CTRL, ctrl);
7457         }
7458
7459         igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
7460 }
7461
7462 static int igb_vlan_rx_add_vid(struct net_device *netdev,
7463                                __be16 proto, u16 vid)
7464 {
7465         struct igb_adapter *adapter = netdev_priv(netdev);
7466         struct e1000_hw *hw = &adapter->hw;
7467         int pf_id = adapter->vfs_allocated_count;
7468
7469         /* add the filter since PF can receive vlans w/o entry in vlvf */
7470         if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
7471                 igb_vfta_set(hw, vid, pf_id, true, !!vid);
7472
7473         set_bit(vid, adapter->active_vlans);
7474
7475         return 0;
7476 }
7477
7478 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
7479                                 __be16 proto, u16 vid)
7480 {
7481         struct igb_adapter *adapter = netdev_priv(netdev);
7482         int pf_id = adapter->vfs_allocated_count;
7483         struct e1000_hw *hw = &adapter->hw;
7484
7485         /* remove VID from filter table */
7486         if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
7487                 igb_vfta_set(hw, vid, pf_id, false, true);
7488
7489         clear_bit(vid, adapter->active_vlans);
7490
7491         return 0;
7492 }
7493
7494 static void igb_restore_vlan(struct igb_adapter *adapter)
7495 {
7496         u16 vid = 1;
7497
7498         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7499         igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
7500
7501         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
7502                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
7503 }
7504
7505 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7506 {
7507         struct pci_dev *pdev = adapter->pdev;
7508         struct e1000_mac_info *mac = &adapter->hw.mac;
7509
7510         mac->autoneg = 0;
7511
7512         /* Make sure dplx is at most 1 bit and lsb of speed is not set
7513          * for the switch() below to work
7514          */
7515         if ((spd & 1) || (dplx & ~1))
7516                 goto err_inval;
7517
7518         /* Fiber NIC's only allow 1000 gbps Full duplex
7519          * and 100Mbps Full duplex for 100baseFx sfp
7520          */
7521         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7522                 switch (spd + dplx) {
7523                 case SPEED_10 + DUPLEX_HALF:
7524                 case SPEED_10 + DUPLEX_FULL:
7525                 case SPEED_100 + DUPLEX_HALF:
7526                         goto err_inval;
7527                 default:
7528                         break;
7529                 }
7530         }
7531
7532         switch (spd + dplx) {
7533         case SPEED_10 + DUPLEX_HALF:
7534                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7535                 break;
7536         case SPEED_10 + DUPLEX_FULL:
7537                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7538                 break;
7539         case SPEED_100 + DUPLEX_HALF:
7540                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7541                 break;
7542         case SPEED_100 + DUPLEX_FULL:
7543                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7544                 break;
7545         case SPEED_1000 + DUPLEX_FULL:
7546                 mac->autoneg = 1;
7547                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7548                 break;
7549         case SPEED_1000 + DUPLEX_HALF: /* not supported */
7550         default:
7551                 goto err_inval;
7552         }
7553
7554         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7555         adapter->hw.phy.mdix = AUTO_ALL_MODES;
7556
7557         return 0;
7558
7559 err_inval:
7560         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7561         return -EINVAL;
7562 }
7563
7564 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7565                           bool runtime)
7566 {
7567         struct net_device *netdev = pci_get_drvdata(pdev);
7568         struct igb_adapter *adapter = netdev_priv(netdev);
7569         struct e1000_hw *hw = &adapter->hw;
7570         u32 ctrl, rctl, status;
7571         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7572         bool wake;
7573
7574         rtnl_lock();
7575         netif_device_detach(netdev);
7576
7577         if (netif_running(netdev))
7578                 __igb_close(netdev, true);
7579
7580         igb_ptp_suspend(adapter);
7581
7582         igb_clear_interrupt_scheme(adapter);
7583         rtnl_unlock();
7584
7585         status = rd32(E1000_STATUS);
7586         if (status & E1000_STATUS_LU)
7587                 wufc &= ~E1000_WUFC_LNKC;
7588
7589         if (wufc) {
7590                 igb_setup_rctl(adapter);
7591                 igb_set_rx_mode(netdev);
7592
7593                 /* turn on all-multi mode if wake on multicast is enabled */
7594                 if (wufc & E1000_WUFC_MC) {
7595                         rctl = rd32(E1000_RCTL);
7596                         rctl |= E1000_RCTL_MPE;
7597                         wr32(E1000_RCTL, rctl);
7598                 }
7599
7600                 ctrl = rd32(E1000_CTRL);
7601                 ctrl |= E1000_CTRL_ADVD3WUC;
7602                 wr32(E1000_CTRL, ctrl);
7603
7604                 /* Allow time for pending master requests to run */
7605                 igb_disable_pcie_master(hw);
7606
7607                 wr32(E1000_WUC, E1000_WUC_PME_EN);
7608                 wr32(E1000_WUFC, wufc);
7609         } else {
7610                 wr32(E1000_WUC, 0);
7611                 wr32(E1000_WUFC, 0);
7612         }
7613
7614         wake = wufc || adapter->en_mng_pt;
7615         if (!wake)
7616                 igb_power_down_link(adapter);
7617         else
7618                 igb_power_up_link(adapter);
7619
7620         if (enable_wake)
7621                 *enable_wake = wake;
7622
7623         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7624          * would have already happened in close and is redundant.
7625          */
7626         igb_release_hw_control(adapter);
7627
7628         pci_disable_device(pdev);
7629
7630         return 0;
7631 }
7632
7633 #ifdef CONFIG_PM
7634 #ifdef CONFIG_PM_SLEEP
7635 static int igb_suspend(struct device *dev)
7636 {
7637         return __igb_shutdown(to_pci_dev(dev), NULL, 0);
7638 }
7639 #endif /* CONFIG_PM_SLEEP */
7640
7641 static int igb_resume(struct device *dev)
7642 {
7643         struct pci_dev *pdev = to_pci_dev(dev);
7644         struct net_device *netdev = pci_get_drvdata(pdev);
7645         struct igb_adapter *adapter = netdev_priv(netdev);
7646         struct e1000_hw *hw = &adapter->hw;
7647         u32 err;
7648
7649         pci_set_power_state(pdev, PCI_D0);
7650         pci_restore_state(pdev);
7651         pci_save_state(pdev);
7652
7653         if (!pci_device_is_present(pdev))
7654                 return -ENODEV;
7655         err = pci_enable_device_mem(pdev);
7656         if (err) {
7657                 dev_err(&pdev->dev,
7658                         "igb: Cannot enable PCI device from suspend\n");
7659                 return err;
7660         }
7661         pci_set_master(pdev);
7662
7663         pci_enable_wake(pdev, PCI_D3hot, 0);
7664         pci_enable_wake(pdev, PCI_D3cold, 0);
7665
7666         if (igb_init_interrupt_scheme(adapter, true)) {
7667                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7668                 return -ENOMEM;
7669         }
7670
7671         igb_reset(adapter);
7672
7673         /* let the f/w know that the h/w is now under the control of the
7674          * driver.
7675          */
7676         igb_get_hw_control(adapter);
7677
7678         wr32(E1000_WUS, ~0);
7679
7680         rtnl_lock();
7681         if (!err && netif_running(netdev))
7682                 err = __igb_open(netdev, true);
7683
7684         if (!err)
7685                 netif_device_attach(netdev);
7686         rtnl_unlock();
7687
7688         return err;
7689 }
7690
7691 static int igb_runtime_idle(struct device *dev)
7692 {
7693         struct pci_dev *pdev = to_pci_dev(dev);
7694         struct net_device *netdev = pci_get_drvdata(pdev);
7695         struct igb_adapter *adapter = netdev_priv(netdev);
7696
7697         if (!igb_has_link(adapter))
7698                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7699
7700         return -EBUSY;
7701 }
7702
7703 static int igb_runtime_suspend(struct device *dev)
7704 {
7705         return __igb_shutdown(to_pci_dev(dev), NULL, 1);
7706 }
7707
7708 static int igb_runtime_resume(struct device *dev)
7709 {
7710         return igb_resume(dev);
7711 }
7712 #endif /* CONFIG_PM */
7713
7714 static void igb_shutdown(struct pci_dev *pdev)
7715 {
7716         bool wake;
7717
7718         __igb_shutdown(pdev, &wake, 0);
7719
7720         if (system_state == SYSTEM_POWER_OFF) {
7721                 pci_wake_from_d3(pdev, wake);
7722                 pci_set_power_state(pdev, PCI_D3hot);
7723         }
7724 }
7725
7726 #ifdef CONFIG_PCI_IOV
7727 static int igb_sriov_reinit(struct pci_dev *dev)
7728 {
7729         struct net_device *netdev = pci_get_drvdata(dev);
7730         struct igb_adapter *adapter = netdev_priv(netdev);
7731         struct pci_dev *pdev = adapter->pdev;
7732
7733         rtnl_lock();
7734
7735         if (netif_running(netdev))
7736                 igb_close(netdev);
7737         else
7738                 igb_reset(adapter);
7739
7740         igb_clear_interrupt_scheme(adapter);
7741
7742         igb_init_queue_configuration(adapter);
7743
7744         if (igb_init_interrupt_scheme(adapter, true)) {
7745                 rtnl_unlock();
7746                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7747                 return -ENOMEM;
7748         }
7749
7750         if (netif_running(netdev))
7751                 igb_open(netdev);
7752
7753         rtnl_unlock();
7754
7755         return 0;
7756 }
7757
7758 static int igb_pci_disable_sriov(struct pci_dev *dev)
7759 {
7760         int err = igb_disable_sriov(dev);
7761
7762         if (!err)
7763                 err = igb_sriov_reinit(dev);
7764
7765         return err;
7766 }
7767
7768 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7769 {
7770         int err = igb_enable_sriov(dev, num_vfs);
7771
7772         if (err)
7773                 goto out;
7774
7775         err = igb_sriov_reinit(dev);
7776         if (!err)
7777                 return num_vfs;
7778
7779 out:
7780         return err;
7781 }
7782
7783 #endif
7784 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7785 {
7786 #ifdef CONFIG_PCI_IOV
7787         if (num_vfs == 0)
7788                 return igb_pci_disable_sriov(dev);
7789         else
7790                 return igb_pci_enable_sriov(dev, num_vfs);
7791 #endif
7792         return 0;
7793 }
7794
7795 #ifdef CONFIG_NET_POLL_CONTROLLER
7796 /* Polling 'interrupt' - used by things like netconsole to send skbs
7797  * without having to re-enable interrupts. It's not called while
7798  * the interrupt routine is executing.
7799  */
7800 static void igb_netpoll(struct net_device *netdev)
7801 {
7802         struct igb_adapter *adapter = netdev_priv(netdev);
7803         struct e1000_hw *hw = &adapter->hw;
7804         struct igb_q_vector *q_vector;
7805         int i;
7806
7807         for (i = 0; i < adapter->num_q_vectors; i++) {
7808                 q_vector = adapter->q_vector[i];
7809                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7810                         wr32(E1000_EIMC, q_vector->eims_value);
7811                 else
7812                         igb_irq_disable(adapter);
7813                 napi_schedule(&q_vector->napi);
7814         }
7815 }
7816 #endif /* CONFIG_NET_POLL_CONTROLLER */
7817
7818 /**
7819  *  igb_io_error_detected - called when PCI error is detected
7820  *  @pdev: Pointer to PCI device
7821  *  @state: The current pci connection state
7822  *
7823  *  This function is called after a PCI bus error affecting
7824  *  this device has been detected.
7825  **/
7826 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7827                                               pci_channel_state_t state)
7828 {
7829         struct net_device *netdev = pci_get_drvdata(pdev);
7830         struct igb_adapter *adapter = netdev_priv(netdev);
7831
7832         netif_device_detach(netdev);
7833
7834         if (state == pci_channel_io_perm_failure)
7835                 return PCI_ERS_RESULT_DISCONNECT;
7836
7837         if (netif_running(netdev))
7838                 igb_down(adapter);
7839         pci_disable_device(pdev);
7840
7841         /* Request a slot slot reset. */
7842         return PCI_ERS_RESULT_NEED_RESET;
7843 }
7844
7845 /**
7846  *  igb_io_slot_reset - called after the pci bus has been reset.
7847  *  @pdev: Pointer to PCI device
7848  *
7849  *  Restart the card from scratch, as if from a cold-boot. Implementation
7850  *  resembles the first-half of the igb_resume routine.
7851  **/
7852 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7853 {
7854         struct net_device *netdev = pci_get_drvdata(pdev);
7855         struct igb_adapter *adapter = netdev_priv(netdev);
7856         struct e1000_hw *hw = &adapter->hw;
7857         pci_ers_result_t result;
7858         int err;
7859
7860         if (pci_enable_device_mem(pdev)) {
7861                 dev_err(&pdev->dev,
7862                         "Cannot re-enable PCI device after reset.\n");
7863                 result = PCI_ERS_RESULT_DISCONNECT;
7864         } else {
7865                 pci_set_master(pdev);
7866                 pci_restore_state(pdev);
7867                 pci_save_state(pdev);
7868
7869                 pci_enable_wake(pdev, PCI_D3hot, 0);
7870                 pci_enable_wake(pdev, PCI_D3cold, 0);
7871
7872                 /* In case of PCI error, adapter lose its HW address
7873                  * so we should re-assign it here.
7874                  */
7875                 hw->hw_addr = adapter->io_addr;
7876
7877                 igb_reset(adapter);
7878                 wr32(E1000_WUS, ~0);
7879                 result = PCI_ERS_RESULT_RECOVERED;
7880         }
7881
7882         err = pci_cleanup_aer_uncorrect_error_status(pdev);
7883         if (err) {
7884                 dev_err(&pdev->dev,
7885                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7886                         err);
7887                 /* non-fatal, continue */
7888         }
7889
7890         return result;
7891 }
7892
7893 /**
7894  *  igb_io_resume - called when traffic can start flowing again.
7895  *  @pdev: Pointer to PCI device
7896  *
7897  *  This callback is called when the error recovery driver tells us that
7898  *  its OK to resume normal operation. Implementation resembles the
7899  *  second-half of the igb_resume routine.
7900  */
7901 static void igb_io_resume(struct pci_dev *pdev)
7902 {
7903         struct net_device *netdev = pci_get_drvdata(pdev);
7904         struct igb_adapter *adapter = netdev_priv(netdev);
7905
7906         if (netif_running(netdev)) {
7907                 if (igb_up(adapter)) {
7908                         dev_err(&pdev->dev, "igb_up failed after reset\n");
7909                         return;
7910                 }
7911         }
7912
7913         netif_device_attach(netdev);
7914
7915         /* let the f/w know that the h/w is now under the control of the
7916          * driver.
7917          */
7918         igb_get_hw_control(adapter);
7919 }
7920
7921 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7922                              u8 qsel)
7923 {
7924         struct e1000_hw *hw = &adapter->hw;
7925         u32 rar_low, rar_high;
7926
7927         /* HW expects these to be in network order when they are plugged
7928          * into the registers which are little endian.  In order to guarantee
7929          * that ordering we need to do an leXX_to_cpup here in order to be
7930          * ready for the byteswap that occurs with writel
7931          */
7932         rar_low = le32_to_cpup((__le32 *)(addr));
7933         rar_high = le16_to_cpup((__le16 *)(addr + 4));
7934
7935         /* Indicate to hardware the Address is Valid. */
7936         rar_high |= E1000_RAH_AV;
7937
7938         if (hw->mac.type == e1000_82575)
7939                 rar_high |= E1000_RAH_POOL_1 * qsel;
7940         else
7941                 rar_high |= E1000_RAH_POOL_1 << qsel;
7942
7943         wr32(E1000_RAL(index), rar_low);
7944         wrfl();
7945         wr32(E1000_RAH(index), rar_high);
7946         wrfl();
7947 }
7948
7949 static int igb_set_vf_mac(struct igb_adapter *adapter,
7950                           int vf, unsigned char *mac_addr)
7951 {
7952         struct e1000_hw *hw = &adapter->hw;
7953         /* VF MAC addresses start at end of receive addresses and moves
7954          * towards the first, as a result a collision should not be possible
7955          */
7956         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7957
7958         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7959
7960         igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7961
7962         return 0;
7963 }
7964
7965 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7966 {
7967         struct igb_adapter *adapter = netdev_priv(netdev);
7968         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7969                 return -EINVAL;
7970         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7971         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7972         dev_info(&adapter->pdev->dev,
7973                  "Reload the VF driver to make this change effective.");
7974         if (test_bit(__IGB_DOWN, &adapter->state)) {
7975                 dev_warn(&adapter->pdev->dev,
7976                          "The VF MAC address has been set, but the PF device is not up.\n");
7977                 dev_warn(&adapter->pdev->dev,
7978                          "Bring the PF device up before attempting to use the VF device.\n");
7979         }
7980         return igb_set_vf_mac(adapter, vf, mac);
7981 }
7982
7983 static int igb_link_mbps(int internal_link_speed)
7984 {
7985         switch (internal_link_speed) {
7986         case SPEED_100:
7987                 return 100;
7988         case SPEED_1000:
7989                 return 1000;
7990         default:
7991                 return 0;
7992         }
7993 }
7994
7995 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7996                                   int link_speed)
7997 {
7998         int rf_dec, rf_int;
7999         u32 bcnrc_val;
8000
8001         if (tx_rate != 0) {
8002                 /* Calculate the rate factor values to set */
8003                 rf_int = link_speed / tx_rate;
8004                 rf_dec = (link_speed - (rf_int * tx_rate));
8005                 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
8006                          tx_rate;
8007
8008                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
8009                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
8010                               E1000_RTTBCNRC_RF_INT_MASK);
8011                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
8012         } else {
8013                 bcnrc_val = 0;
8014         }
8015
8016         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
8017         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
8018          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
8019          */
8020         wr32(E1000_RTTBCNRM, 0x14);
8021         wr32(E1000_RTTBCNRC, bcnrc_val);
8022 }
8023
8024 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
8025 {
8026         int actual_link_speed, i;
8027         bool reset_rate = false;
8028
8029         /* VF TX rate limit was not set or not supported */
8030         if ((adapter->vf_rate_link_speed == 0) ||
8031             (adapter->hw.mac.type != e1000_82576))
8032                 return;
8033
8034         actual_link_speed = igb_link_mbps(adapter->link_speed);
8035         if (actual_link_speed != adapter->vf_rate_link_speed) {
8036                 reset_rate = true;
8037                 adapter->vf_rate_link_speed = 0;
8038                 dev_info(&adapter->pdev->dev,
8039                          "Link speed has been changed. VF Transmit rate is disabled\n");
8040         }
8041
8042         for (i = 0; i < adapter->vfs_allocated_count; i++) {
8043                 if (reset_rate)
8044                         adapter->vf_data[i].tx_rate = 0;
8045
8046                 igb_set_vf_rate_limit(&adapter->hw, i,
8047                                       adapter->vf_data[i].tx_rate,
8048                                       actual_link_speed);
8049         }
8050 }
8051
8052 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
8053                              int min_tx_rate, int max_tx_rate)
8054 {
8055         struct igb_adapter *adapter = netdev_priv(netdev);
8056         struct e1000_hw *hw = &adapter->hw;
8057         int actual_link_speed;
8058
8059         if (hw->mac.type != e1000_82576)
8060                 return -EOPNOTSUPP;
8061
8062         if (min_tx_rate)
8063                 return -EINVAL;
8064
8065         actual_link_speed = igb_link_mbps(adapter->link_speed);
8066         if ((vf >= adapter->vfs_allocated_count) ||
8067             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
8068             (max_tx_rate < 0) ||
8069             (max_tx_rate > actual_link_speed))
8070                 return -EINVAL;
8071
8072         adapter->vf_rate_link_speed = actual_link_speed;
8073         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
8074         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
8075
8076         return 0;
8077 }
8078
8079 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
8080                                    bool setting)
8081 {
8082         struct igb_adapter *adapter = netdev_priv(netdev);
8083         struct e1000_hw *hw = &adapter->hw;
8084         u32 reg_val, reg_offset;
8085
8086         if (!adapter->vfs_allocated_count)
8087                 return -EOPNOTSUPP;
8088
8089         if (vf >= adapter->vfs_allocated_count)
8090                 return -EINVAL;
8091
8092         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
8093         reg_val = rd32(reg_offset);
8094         if (setting)
8095                 reg_val |= (BIT(vf) |
8096                             BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
8097         else
8098                 reg_val &= ~(BIT(vf) |
8099                              BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
8100         wr32(reg_offset, reg_val);
8101
8102         adapter->vf_data[vf].spoofchk_enabled = setting;
8103         return 0;
8104 }
8105
8106 static int igb_ndo_get_vf_config(struct net_device *netdev,
8107                                  int vf, struct ifla_vf_info *ivi)
8108 {
8109         struct igb_adapter *adapter = netdev_priv(netdev);
8110         if (vf >= adapter->vfs_allocated_count)
8111                 return -EINVAL;
8112         ivi->vf = vf;
8113         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
8114         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
8115         ivi->min_tx_rate = 0;
8116         ivi->vlan = adapter->vf_data[vf].pf_vlan;
8117         ivi->qos = adapter->vf_data[vf].pf_qos;
8118         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
8119         return 0;
8120 }
8121
8122 static void igb_vmm_control(struct igb_adapter *adapter)
8123 {
8124         struct e1000_hw *hw = &adapter->hw;
8125         u32 reg;
8126
8127         switch (hw->mac.type) {
8128         case e1000_82575:
8129         case e1000_i210:
8130         case e1000_i211:
8131         case e1000_i354:
8132         default:
8133                 /* replication is not supported for 82575 */
8134                 return;
8135         case e1000_82576:
8136                 /* notify HW that the MAC is adding vlan tags */
8137                 reg = rd32(E1000_DTXCTL);
8138                 reg |= E1000_DTXCTL_VLAN_ADDED;
8139                 wr32(E1000_DTXCTL, reg);
8140                 /* Fall through */
8141         case e1000_82580:
8142                 /* enable replication vlan tag stripping */
8143                 reg = rd32(E1000_RPLOLR);
8144                 reg |= E1000_RPLOLR_STRVLAN;
8145                 wr32(E1000_RPLOLR, reg);
8146                 /* Fall through */
8147         case e1000_i350:
8148                 /* none of the above registers are supported by i350 */
8149                 break;
8150         }
8151
8152         if (adapter->vfs_allocated_count) {
8153                 igb_vmdq_set_loopback_pf(hw, true);
8154                 igb_vmdq_set_replication_pf(hw, true);
8155                 igb_vmdq_set_anti_spoofing_pf(hw, true,
8156                                               adapter->vfs_allocated_count);
8157         } else {
8158                 igb_vmdq_set_loopback_pf(hw, false);
8159                 igb_vmdq_set_replication_pf(hw, false);
8160         }
8161 }
8162
8163 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
8164 {
8165         struct e1000_hw *hw = &adapter->hw;
8166         u32 dmac_thr;
8167         u16 hwm;
8168         u32 reg;
8169
8170         if (hw->mac.type > e1000_82580) {
8171                 if (adapter->flags & IGB_FLAG_DMAC) {
8172                         /* force threshold to 0. */
8173                         wr32(E1000_DMCTXTH, 0);
8174
8175                         /* DMA Coalescing high water mark needs to be greater
8176                          * than the Rx threshold. Set hwm to PBA - max frame
8177                          * size in 16B units, capping it at PBA - 6KB.
8178                          */
8179                         hwm = 64 * (pba - 6);
8180                         reg = rd32(E1000_FCRTC);
8181                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
8182                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
8183                                 & E1000_FCRTC_RTH_COAL_MASK);
8184                         wr32(E1000_FCRTC, reg);
8185
8186                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
8187                          * frame size, capping it at PBA - 10KB.
8188                          */
8189                         dmac_thr = pba - 10;
8190                         reg = rd32(E1000_DMACR);
8191                         reg &= ~E1000_DMACR_DMACTHR_MASK;
8192                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
8193                                 & E1000_DMACR_DMACTHR_MASK);
8194
8195                         /* transition to L0x or L1 if available..*/
8196                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
8197
8198                         /* watchdog timer= +-1000 usec in 32usec intervals */
8199                         reg |= (1000 >> 5);
8200
8201                         /* Disable BMC-to-OS Watchdog Enable */
8202                         if (hw->mac.type != e1000_i354)
8203                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
8204                         wr32(E1000_DMACR, reg);
8205
8206                         /* no lower threshold to disable
8207                          * coalescing(smart fifb)-UTRESH=0
8208                          */
8209                         wr32(E1000_DMCRTRH, 0);
8210
8211                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
8212
8213                         wr32(E1000_DMCTLX, reg);
8214
8215                         /* free space in tx packet buffer to wake from
8216                          * DMA coal
8217                          */
8218                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
8219                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
8220                 }
8221
8222                 if (hw->mac.type >= e1000_i210 ||
8223                     (adapter->flags & IGB_FLAG_DMAC)) {
8224                         reg = rd32(E1000_PCIEMISC);
8225                         reg |= E1000_PCIEMISC_LX_DECISION;
8226                         wr32(E1000_PCIEMISC, reg);
8227                 } /* endif adapter->dmac is not disabled */
8228         } else if (hw->mac.type == e1000_82580) {
8229                 u32 reg = rd32(E1000_PCIEMISC);
8230
8231                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
8232                 wr32(E1000_DMACR, 0);
8233         }
8234 }
8235
8236 /**
8237  *  igb_read_i2c_byte - Reads 8 bit word over I2C
8238  *  @hw: pointer to hardware structure
8239  *  @byte_offset: byte offset to read
8240  *  @dev_addr: device address
8241  *  @data: value read
8242  *
8243  *  Performs byte read operation over I2C interface at
8244  *  a specified device address.
8245  **/
8246 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8247                       u8 dev_addr, u8 *data)
8248 {
8249         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8250         struct i2c_client *this_client = adapter->i2c_client;
8251         s32 status;
8252         u16 swfw_mask = 0;
8253
8254         if (!this_client)
8255                 return E1000_ERR_I2C;
8256
8257         swfw_mask = E1000_SWFW_PHY0_SM;
8258
8259         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8260                 return E1000_ERR_SWFW_SYNC;
8261
8262         status = i2c_smbus_read_byte_data(this_client, byte_offset);
8263         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8264
8265         if (status < 0)
8266                 return E1000_ERR_I2C;
8267         else {
8268                 *data = status;
8269                 return 0;
8270         }
8271 }
8272
8273 /**
8274  *  igb_write_i2c_byte - Writes 8 bit word over I2C
8275  *  @hw: pointer to hardware structure
8276  *  @byte_offset: byte offset to write
8277  *  @dev_addr: device address
8278  *  @data: value to write
8279  *
8280  *  Performs byte write operation over I2C interface at
8281  *  a specified device address.
8282  **/
8283 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8284                        u8 dev_addr, u8 data)
8285 {
8286         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8287         struct i2c_client *this_client = adapter->i2c_client;
8288         s32 status;
8289         u16 swfw_mask = E1000_SWFW_PHY0_SM;
8290
8291         if (!this_client)
8292                 return E1000_ERR_I2C;
8293
8294         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8295                 return E1000_ERR_SWFW_SYNC;
8296         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
8297         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8298
8299         if (status)
8300                 return E1000_ERR_I2C;
8301         else
8302                 return 0;
8303
8304 }
8305
8306 int igb_reinit_queues(struct igb_adapter *adapter)
8307 {
8308         struct net_device *netdev = adapter->netdev;
8309         struct pci_dev *pdev = adapter->pdev;
8310         int err = 0;
8311
8312         if (netif_running(netdev))
8313                 igb_close(netdev);
8314
8315         igb_reset_interrupt_capability(adapter);
8316
8317         if (igb_init_interrupt_scheme(adapter, true)) {
8318                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8319                 return -ENOMEM;
8320         }
8321
8322         if (netif_running(netdev))
8323                 err = igb_open(netdev);
8324
8325         return err;
8326 }
8327
8328 static void igb_nfc_filter_exit(struct igb_adapter *adapter)
8329 {
8330         struct igb_nfc_filter *rule;
8331
8332         spin_lock(&adapter->nfc_lock);
8333
8334         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
8335                 igb_erase_filter(adapter, rule);
8336
8337         spin_unlock(&adapter->nfc_lock);
8338 }
8339
8340 static void igb_nfc_filter_restore(struct igb_adapter *adapter)
8341 {
8342         struct igb_nfc_filter *rule;
8343
8344         spin_lock(&adapter->nfc_lock);
8345
8346         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
8347                 igb_add_filter(adapter, rule);
8348
8349         spin_unlock(&adapter->nfc_lock);
8350 }
8351 /* igb_main.c */