drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4 #include <linux/types.h>
   5 #include <linux/module.h>
   6 #include <linux/pci.h>
   7 #include <linux/netdevice.h>
   8 #include <linux/vmalloc.h>
   9 #include <linux/string.h>
  10 #include <linux/in.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/ip.h>
  13 #include <linux/tcp.h>
  14 #include <linux/sctp.h>
  15 #include <linux/pkt_sched.h>
  16 #include <linux/ipv6.h>
  17 #include <linux/slab.h>
  18 #include <net/checksum.h>
  19 #include <net/ip6_checksum.h>
  20 #include <linux/etherdevice.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/if_macvlan.h>
  25 #include <linux/if_bridge.h>
  26 #include <linux/prefetch.h>
  27 #include <linux/bpf.h>
  28 #include <linux/bpf_trace.h>
  29 #include <linux/atomic.h>
  30 #include <scsi/fc/fc_fcoe.h>
  31 #include <net/udp_tunnel.h>
  32 #include <net/pkt_cls.h>
  33 #include <net/tc_act/tc_gact.h>
  34 #include <net/tc_act/tc_mirred.h>
  35 #include <net/vxlan.h>
  36 #include <net/mpls.h>
  37 #include <net/xfrm.h>
  38
  39 #include "ixgbe.h"
  40 #include "ixgbe_common.h"
  41 #include "ixgbe_dcb_82599.h"
  42 #include "ixgbe_sriov.h"
  43 #include "ixgbe_model.h"
  44
  45 char ixgbe_driver_name[] = "ixgbe";
  46 static const char ixgbe_driver_string[] =
  47                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  48 #ifdef IXGBE_FCOE
  49 char ixgbe_default_device_descr[] =
  50                               "Intel(R) 10 Gigabit Network Connection";
  51 #else
  52 static char ixgbe_default_device_descr[] =
  53                               "Intel(R) 10 Gigabit Network Connection";
  54 #endif
  55 #define DRV_VERSION "5.1.0-k"
  56 const char ixgbe_driver_version[] = DRV_VERSION;
  57 static const char ixgbe_copyright[] =
  58                                 "Copyright (c) 1999-2016 Intel Corporation.";
  59
  60 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  61
  62 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  63         [board_82598]           = &ixgbe_82598_info,
  64         [board_82599]           = &ixgbe_82599_info,
  65         [board_X540]            = &ixgbe_X540_info,
  66         [board_X550]            = &ixgbe_X550_info,
  67         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  68         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  69         [board_x550em_a]        = &ixgbe_x550em_a_info,
  70         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  71 };
  72
  73 /* ixgbe_pci_tbl - PCI Device ID Table
  74  *
  75  * Wildcard entries (PCI_ANY_ID) should come last
  76  * Last entry must be all 0s
  77  *
  78  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  79  *   Class, Class Mask, private data (not used) }
  80  */
  81 static const struct pci_device_id ixgbe_pci_tbl[] = {
  82         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
  83         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
  84         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
  85         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
  86         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
  87         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
  88         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
  89         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
  90         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
  91         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
  92         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
  93         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
  94         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
  95         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
  96         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
  97         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
  98         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
  99         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 100         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 129         /* required last entry */
 130         {0, }
 131 };
 132 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 133
 134 #ifdef CONFIG_IXGBE_DCA
 135 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 136                             void *p);
 137 static struct notifier_block dca_notifier = {
 138         .notifier_call = ixgbe_notify_dca,
 139         .next          = NULL,
 140         .priority      = 0
 141 };
 142 #endif
 143
 144 #ifdef CONFIG_PCI_IOV
 145 static unsigned int max_vfs;
 146 module_param(max_vfs, uint, 0);
 147 MODULE_PARM_DESC(max_vfs,
 148                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 149 #endif /* CONFIG_PCI_IOV */
 150
 151 static unsigned int allow_unsupported_sfp;
 152 module_param(allow_unsupported_sfp, uint, 0);
 153 MODULE_PARM_DESC(allow_unsupported_sfp,
 154                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 155
 156 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 157 static int debug = -1;
 158 module_param(debug, int, 0);
 159 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 160
 161 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 162 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 163 MODULE_LICENSE("GPL");
 164 MODULE_VERSION(DRV_VERSION);
 165
 166 static struct workqueue_struct *ixgbe_wq;
 167
 168 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 169 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 170
 171 static const struct net_device_ops ixgbe_netdev_ops;
 172
 173 static bool netif_is_ixgbe(struct net_device *dev)
 174 {
 175         return dev && (dev->netdev_ops == &ixgbe_netdev_ops);
 176 }
 177
 178 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 179                                           u32 reg, u16 *value)
 180 {
 181         struct pci_dev *parent_dev;
 182         struct pci_bus *parent_bus;
 183
 184         parent_bus = adapter->pdev->bus->parent;
 185         if (!parent_bus)
 186                 return -1;
 187
 188         parent_dev = parent_bus->self;
 189         if (!parent_dev)
 190                 return -1;
 191
 192         if (!pci_is_pcie(parent_dev))
 193                 return -1;
 194
 195         pcie_capability_read_word(parent_dev, reg, value);
 196         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 197             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 198                 return -1;
 199         return 0;
 200 }
 201
 202 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 203 {
 204         struct ixgbe_hw *hw = &adapter->hw;
 205         u16 link_status = 0;
 206         int err;
 207
 208         hw->bus.type = ixgbe_bus_type_pci_express;
 209
 210         /* Get the negotiated link width and speed from PCI config space of the
 211          * parent, as this device is behind a switch
 212          */
 213         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 214
 215         /* assume caller will handle error case */
 216         if (err)
 217                 return err;
 218
 219         hw->bus.width = ixgbe_convert_bus_width(link_status);
 220         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 221
 222         return 0;
 223 }
 224
 225 /**
 226  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 227  * @hw: hw specific details
 228  *
 229  * This function is used by probe to determine whether a device's PCI-Express
 230  * bandwidth details should be gathered from the parent bus instead of from the
 231  * device. Used to ensure that various locations all have the correct device ID
 232  * checks.
 233  */
 234 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 235 {
 236         switch (hw->device_id) {
 237         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 238         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 239                 return true;
 240         default:
 241                 return false;
 242         }
 243 }
 244
 245 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 246                                      int expected_gts)
 247 {
 248         struct ixgbe_hw *hw = &adapter->hw;
 249         struct pci_dev *pdev;
 250
 251         /* Some devices are not connected over PCIe and thus do not negotiate
 252          * speed. These devices do not have valid bus info, and thus any report
 253          * we generate may not be correct.
 254          */
 255         if (hw->bus.type == ixgbe_bus_type_internal)
 256                 return;
 257
 258         /* determine whether to use the parent device */
 259         if (ixgbe_pcie_from_parent(&adapter->hw))
 260                 pdev = adapter->pdev->bus->parent->self;
 261         else
 262                 pdev = adapter->pdev;
 263
 264         pcie_print_link_status(pdev);
 265 }
 266
 267 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 268 {
 269         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 270             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 271             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 272                 queue_work(ixgbe_wq, &adapter->service_task);
 273 }
 274
 275 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 276 {
 277         struct ixgbe_adapter *adapter = hw->back;
 278
 279         if (!hw->hw_addr)
 280                 return;
 281         hw->hw_addr = NULL;
 282         e_dev_err("Adapter removed\n");
 283         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 284                 ixgbe_service_event_schedule(adapter);
 285 }
 286
 287 static u32 ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 288 {
 289         u8 __iomem *reg_addr;
 290         u32 value;
 291         int i;
 292
 293         reg_addr = READ_ONCE(hw->hw_addr);
 294         if (ixgbe_removed(reg_addr))
 295                 return IXGBE_FAILED_READ_REG;
 296
 297         /* Register read of 0xFFFFFFF can indicate the adapter has been removed,
 298          * so perform several status register reads to determine if the adapter
 299          * has been removed.
 300          */
 301         for (i = 0; i < IXGBE_FAILED_READ_RETRIES; i++) {
 302                 value = readl(reg_addr + IXGBE_STATUS);
 303                 if (value != IXGBE_FAILED_READ_REG)
 304                         break;
 305                 mdelay(3);
 306         }
 307
 308         if (value == IXGBE_FAILED_READ_REG)
 309                 ixgbe_remove_adapter(hw);
 310         else
 311                 value = readl(reg_addr + reg);
 312         return value;
 313 }
 314
 315 /**
 316  * ixgbe_read_reg - Read from device register
 317  * @hw: hw specific details
 318  * @reg: offset of register to read
 319  *
 320  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 321  *
 322  * This function is used to read device registers. It checks for device
 323  * removal by confirming any read that returns all ones by checking the
 324  * status register value for all ones. This function avoids reading from
 325  * the hardware if a removal was previously detected in which case it
 326  * returns IXGBE_FAILED_READ_REG (all ones).
 327  */
 328 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 329 {
 330         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 331         u32 value;
 332
 333         if (ixgbe_removed(reg_addr))
 334                 return IXGBE_FAILED_READ_REG;
 335         if (unlikely(hw->phy.nw_mng_if_sel &
 336                      IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
 337                 struct ixgbe_adapter *adapter;
 338                 int i;
 339
 340                 for (i = 0; i < 200; ++i) {
 341                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 342                         if (likely(!value))
 343                                 goto writes_completed;
 344                         if (value == IXGBE_FAILED_READ_REG) {
 345                                 ixgbe_remove_adapter(hw);
 346                                 return IXGBE_FAILED_READ_REG;
 347                         }
 348                         udelay(5);
 349                 }
 350
 351                 adapter = hw->back;
 352                 e_warn(hw, "register writes incomplete %08x\n", value);
 353         }
 354
 355 writes_completed:
 356         value = readl(reg_addr + reg);
 357         if (unlikely(value == IXGBE_FAILED_READ_REG))
 358                 value = ixgbe_check_remove(hw, reg);
 359         return value;
 360 }
 361
 362 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 363 {
 364         u16 value;
 365
 366         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 367         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 368                 ixgbe_remove_adapter(hw);
 369                 return true;
 370         }
 371         return false;
 372 }
 373
 374 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 375 {
 376         struct ixgbe_adapter *adapter = hw->back;
 377         u16 value;
 378
 379         if (ixgbe_removed(hw->hw_addr))
 380                 return IXGBE_FAILED_READ_CFG_WORD;
 381         pci_read_config_word(adapter->pdev, reg, &value);
 382         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 383             ixgbe_check_cfg_remove(hw, adapter->pdev))
 384                 return IXGBE_FAILED_READ_CFG_WORD;
 385         return value;
 386 }
 387
 388 #ifdef CONFIG_PCI_IOV
 389 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 390 {
 391         struct ixgbe_adapter *adapter = hw->back;
 392         u32 value;
 393
 394         if (ixgbe_removed(hw->hw_addr))
 395                 return IXGBE_FAILED_READ_CFG_DWORD;
 396         pci_read_config_dword(adapter->pdev, reg, &value);
 397         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 398             ixgbe_check_cfg_remove(hw, adapter->pdev))
 399                 return IXGBE_FAILED_READ_CFG_DWORD;
 400         return value;
 401 }
 402 #endif /* CONFIG_PCI_IOV */
 403
 404 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 405 {
 406         struct ixgbe_adapter *adapter = hw->back;
 407
 408         if (ixgbe_removed(hw->hw_addr))
 409                 return;
 410         pci_write_config_word(adapter->pdev, reg, value);
 411 }
 412
 413 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 414 {
 415         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 416
 417         /* flush memory to make sure state is correct before next watchdog */
 418         smp_mb__before_atomic();
 419         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 420 }
 421
 422 struct ixgbe_reg_info {
 423         u32 ofs;
 424         char *name;
 425 };
 426
 427 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 428
 429         /* General Registers */
 430         {IXGBE_CTRL, "CTRL"},
 431         {IXGBE_STATUS, "STATUS"},
 432         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 433
 434         /* Interrupt Registers */
 435         {IXGBE_EICR, "EICR"},
 436
 437         /* RX Registers */
 438         {IXGBE_SRRCTL(0), "SRRCTL"},
 439         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 440         {IXGBE_RDLEN(0), "RDLEN"},
 441         {IXGBE_RDH(0), "RDH"},
 442         {IXGBE_RDT(0), "RDT"},
 443         {IXGBE_RXDCTL(0), "RXDCTL"},
 444         {IXGBE_RDBAL(0), "RDBAL"},
 445         {IXGBE_RDBAH(0), "RDBAH"},
 446
 447         /* TX Registers */
 448         {IXGBE_TDBAL(0), "TDBAL"},
 449         {IXGBE_TDBAH(0), "TDBAH"},
 450         {IXGBE_TDLEN(0), "TDLEN"},
 451         {IXGBE_TDH(0), "TDH"},
 452         {IXGBE_TDT(0), "TDT"},
 453         {IXGBE_TXDCTL(0), "TXDCTL"},
 454
 455         /* List Terminator */
 456         { .name = NULL }
 457 };
 458
 459
 460 /*
 461  * ixgbe_regdump - register printout routine
 462  */
 463 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 464 {
 465         int i;
 466         char rname[16];
 467         u32 regs[64];
 468
 469         switch (reginfo->ofs) {
 470         case IXGBE_SRRCTL(0):
 471                 for (i = 0; i < 64; i++)
 472                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 473                 break;
 474         case IXGBE_DCA_RXCTRL(0):
 475                 for (i = 0; i < 64; i++)
 476                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 477                 break;
 478         case IXGBE_RDLEN(0):
 479                 for (i = 0; i < 64; i++)
 480                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 481                 break;
 482         case IXGBE_RDH(0):
 483                 for (i = 0; i < 64; i++)
 484                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 485                 break;
 486         case IXGBE_RDT(0):
 487                 for (i = 0; i < 64; i++)
 488                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 489                 break;
 490         case IXGBE_RXDCTL(0):
 491                 for (i = 0; i < 64; i++)
 492                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 493                 break;
 494         case IXGBE_RDBAL(0):
 495                 for (i = 0; i < 64; i++)
 496                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 497                 break;
 498         case IXGBE_RDBAH(0):
 499                 for (i = 0; i < 64; i++)
 500                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 501                 break;
 502         case IXGBE_TDBAL(0):
 503                 for (i = 0; i < 64; i++)
 504                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 505                 break;
 506         case IXGBE_TDBAH(0):
 507                 for (i = 0; i < 64; i++)
 508                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 509                 break;
 510         case IXGBE_TDLEN(0):
 511                 for (i = 0; i < 64; i++)
 512                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 513                 break;
 514         case IXGBE_TDH(0):
 515                 for (i = 0; i < 64; i++)
 516                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 517                 break;
 518         case IXGBE_TDT(0):
 519                 for (i = 0; i < 64; i++)
 520                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 521                 break;
 522         case IXGBE_TXDCTL(0):
 523                 for (i = 0; i < 64; i++)
 524                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 525                 break;
 526         default:
 527                 pr_info("%-15s %08x\n",
 528                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 529                 return;
 530         }
 531
 532         i = 0;
 533         while (i < 64) {
 534                 int j;
 535                 char buf[9 * 8 + 1];
 536                 char *p = buf;
 537
 538                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 539                 for (j = 0; j < 8; j++)
 540                         p += sprintf(p, " %08x", regs[i++]);
 541                 pr_err("%-15s%s\n", rname, buf);
 542         }
 543
 544 }
 545
 546 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 547 {
 548         struct ixgbe_tx_buffer *tx_buffer;
 549
 550         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 551         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 552                 n, ring->next_to_use, ring->next_to_clean,
 553                 (u64)dma_unmap_addr(tx_buffer, dma),
 554                 dma_unmap_len(tx_buffer, len),
 555                 tx_buffer->next_to_watch,
 556                 (u64)tx_buffer->time_stamp);
 557 }
 558
 559 /*
 560  * ixgbe_dump - Print registers, tx-rings and rx-rings
 561  */
 562 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 563 {
 564         struct net_device *netdev = adapter->netdev;
 565         struct ixgbe_hw *hw = &adapter->hw;
 566         struct ixgbe_reg_info *reginfo;
 567         int n = 0;
 568         struct ixgbe_ring *ring;
 569         struct ixgbe_tx_buffer *tx_buffer;
 570         union ixgbe_adv_tx_desc *tx_desc;
 571         struct my_u0 { u64 a; u64 b; } *u0;
 572         struct ixgbe_ring *rx_ring;
 573         union ixgbe_adv_rx_desc *rx_desc;
 574         struct ixgbe_rx_buffer *rx_buffer_info;
 575         int i = 0;
 576
 577         if (!netif_msg_hw(adapter))
 578                 return;
 579
 580         /* Print netdevice Info */
 581         if (netdev) {
 582                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 583                 pr_info("Device Name     state            "
 584                         "trans_start\n");
 585                 pr_info("%-15s %016lX %016lX\n",
 586                         netdev->name,
 587                         netdev->state,
 588                         dev_trans_start(netdev));
 589         }
 590
 591         /* Print Registers */
 592         dev_info(&adapter->pdev->dev, "Register Dump\n");
 593         pr_info(" Register Name   Value\n");
 594         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 595              reginfo->name; reginfo++) {
 596                 ixgbe_regdump(hw, reginfo);
 597         }
 598
 599         /* Print TX Ring Summary */
 600         if (!netdev || !netif_running(netdev))
 601                 return;
 602
 603         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 604         pr_info(" %s     %s              %s        %s\n",
 605                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 606                 "leng", "ntw", "timestamp");
 607         for (n = 0; n < adapter->num_tx_queues; n++) {
 608                 ring = adapter->tx_ring[n];
 609                 ixgbe_print_buffer(ring, n);
 610         }
 611
 612         for (n = 0; n < adapter->num_xdp_queues; n++) {
 613                 ring = adapter->xdp_ring[n];
 614                 ixgbe_print_buffer(ring, n);
 615         }
 616
 617         /* Print TX Rings */
 618         if (!netif_msg_tx_done(adapter))
 619                 goto rx_ring_summary;
 620
 621         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 622
 623         /* Transmit Descriptor Formats
 624          *
 625          * 82598 Advanced Transmit Descriptor
 626          *   +--------------------------------------------------------------+
 627          * 0 |         Buffer Address [63:0]                                |
 628          *   +--------------------------------------------------------------+
 629          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 630          *   +--------------------------------------------------------------+
 631          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 632          *
 633          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 634          *   +--------------------------------------------------------------+
 635          * 0 |                          RSV [63:0]                          |
 636          *   +--------------------------------------------------------------+
 637          * 8 |            RSV           |  STA  |          NXTSEQ           |
 638          *   +--------------------------------------------------------------+
 639          *   63                       36 35   32 31                         0
 640          *
 641          * 82599+ Advanced Transmit Descriptor
 642          *   +--------------------------------------------------------------+
 643          * 0 |         Buffer Address [63:0]                                |
 644          *   +--------------------------------------------------------------+
 645          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 646          *   +--------------------------------------------------------------+
 647          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 648          *
 649          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 650          *   +--------------------------------------------------------------+
 651          * 0 |                          RSV [63:0]                          |
 652          *   +--------------------------------------------------------------+
 653          * 8 |            RSV           |  STA  |           RSV             |
 654          *   +--------------------------------------------------------------+
 655          *   63                       36 35   32 31                         0
 656          */
 657
 658         for (n = 0; n < adapter->num_tx_queues; n++) {
 659                 ring = adapter->tx_ring[n];
 660                 pr_info("------------------------------------\n");
 661                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 662                 pr_info("------------------------------------\n");
 663                 pr_info("%s%s    %s              %s        %s          %s\n",
 664                         "T [desc]     [address 63:0  ] ",
 665                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 666                         "leng", "ntw", "timestamp", "bi->skb");
 667
 668                 for (i = 0; ring->desc && (i < ring->count); i++) {
 669                         tx_desc = IXGBE_TX_DESC(ring, i);
 670                         tx_buffer = &ring->tx_buffer_info[i];
 671                         u0 = (struct my_u0 *)tx_desc;
 672                         if (dma_unmap_len(tx_buffer, len) > 0) {
 673                                 const char *ring_desc;
 674
 675                                 if (i == ring->next_to_use &&
 676                                     i == ring->next_to_clean)
 677                                         ring_desc = " NTC/U";
 678                                 else if (i == ring->next_to_use)
 679                                         ring_desc = " NTU";
 680                                 else if (i == ring->next_to_clean)
 681                                         ring_desc = " NTC";
 682                                 else
 683                                         ring_desc = "";
 684                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 685                                         i,
 686                                         le64_to_cpu((__force __le64)u0->a),
 687                                         le64_to_cpu((__force __le64)u0->b),
 688                                         (u64)dma_unmap_addr(tx_buffer, dma),
 689                                         dma_unmap_len(tx_buffer, len),
 690                                         tx_buffer->next_to_watch,
 691                                         (u64)tx_buffer->time_stamp,
 692                                         tx_buffer->skb,
 693                                         ring_desc);
 694
 695                                 if (netif_msg_pktdata(adapter) &&
 696                                     tx_buffer->skb)
 697                                         print_hex_dump(KERN_INFO, "",
 698                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 699                                                 tx_buffer->skb->data,
 700                                                 dma_unmap_len(tx_buffer, len),
 701                                                 true);
 702                         }
 703                 }
 704         }
 705
 706         /* Print RX Rings Summary */
 707 rx_ring_summary:
 708         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 709         pr_info("Queue [NTU] [NTC]\n");
 710         for (n = 0; n < adapter->num_rx_queues; n++) {
 711                 rx_ring = adapter->rx_ring[n];
 712                 pr_info("%5d %5X %5X\n",
 713                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 714         }
 715
 716         /* Print RX Rings */
 717         if (!netif_msg_rx_status(adapter))
 718                 return;
 719
 720         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 721
 722         /* Receive Descriptor Formats
 723          *
 724          * 82598 Advanced Receive Descriptor (Read) Format
 725          *    63                                           1        0
 726          *    +-----------------------------------------------------+
 727          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 728          *    +----------------------------------------------+------+
 729          *  8 |       Header Buffer Address [63:1]           |  DD  |
 730          *    +-----------------------------------------------------+
 731          *
 732          *
 733          * 82598 Advanced Receive Descriptor (Write-Back) Format
 734          *
 735          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 736          *   +------------------------------------------------------+
 737          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 738          *   | Packet   | IP     |   |          |     | Type | Type |
 739          *   | Checksum | Ident  |   |          |     |      |      |
 740          *   +------------------------------------------------------+
 741          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 742          *   +------------------------------------------------------+
 743          *   63       48 47    32 31            20 19               0
 744          *
 745          * 82599+ Advanced Receive Descriptor (Read) Format
 746          *    63                                           1        0
 747          *    +-----------------------------------------------------+
 748          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 749          *    +----------------------------------------------+------+
 750          *  8 |       Header Buffer Address [63:1]           |  DD  |
 751          *    +-----------------------------------------------------+
 752          *
 753          *
 754          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 755          *
 756          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 757          *   +------------------------------------------------------+
 758          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 759          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 760          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 761          *   +------------------------------------------------------+
 762          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 763          *   +------------------------------------------------------+
 764          *   63       48 47    32 31          20 19                 0
 765          */
 766
 767         for (n = 0; n < adapter->num_rx_queues; n++) {
 768                 rx_ring = adapter->rx_ring[n];
 769                 pr_info("------------------------------------\n");
 770                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 771                 pr_info("------------------------------------\n");
 772                 pr_info("%s%s%s\n",
 773                         "R  [desc]      [ PktBuf     A0] ",
 774                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 775                         "<-- Adv Rx Read format");
 776                 pr_info("%s%s%s\n",
 777                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 778                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 779                         "<-- Adv Rx Write-Back format");
 780
 781                 for (i = 0; i < rx_ring->count; i++) {
 782                         const char *ring_desc;
 783
 784                         if (i == rx_ring->next_to_use)
 785                                 ring_desc = " NTU";
 786                         else if (i == rx_ring->next_to_clean)
 787                                 ring_desc = " NTC";
 788                         else
 789                                 ring_desc = "";
 790
 791                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 792                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 793                         u0 = (struct my_u0 *)rx_desc;
 794                         if (rx_desc->wb.upper.length) {
 795                                 /* Descriptor Done */
 796                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 797                                         i,
 798                                         le64_to_cpu((__force __le64)u0->a),
 799                                         le64_to_cpu((__force __le64)u0->b),
 800                                         rx_buffer_info->skb,
 801                                         ring_desc);
 802                         } else {
 803                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 804                                         i,
 805                                         le64_to_cpu((__force __le64)u0->a),
 806                                         le64_to_cpu((__force __le64)u0->b),
 807                                         (u64)rx_buffer_info->dma,
 808                                         rx_buffer_info->skb,
 809                                         ring_desc);
 810
 811                                 if (netif_msg_pktdata(adapter) &&
 812                                     rx_buffer_info->dma) {
 813                                         print_hex_dump(KERN_INFO, "",
 814                                            DUMP_PREFIX_ADDRESS, 16, 1,
 815                                            page_address(rx_buffer_info->page) +
 816                                                     rx_buffer_info->page_offset,
 817                                            ixgbe_rx_bufsz(rx_ring), true);
 818                                 }
 819                         }
 820                 }
 821         }
 822 }
 823
 824 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 825 {
 826         u32 ctrl_ext;
 827
 828         /* Let firmware take over control of h/w */
 829         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 830         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 831                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 832 }
 833
 834 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 835 {
 836         u32 ctrl_ext;
 837
 838         /* Let firmware know the driver has taken over */
 839         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 840         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 841                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 842 }
 843
 844 /**
 845  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 846  * @adapter: pointer to adapter struct
 847  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 848  * @queue: queue to map the corresponding interrupt to
 849  * @msix_vector: the vector to map to the corresponding queue
 850  *
 851  */
 852 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 853                            u8 queue, u8 msix_vector)
 854 {
 855         u32 ivar, index;
 856         struct ixgbe_hw *hw = &adapter->hw;
 857         switch (hw->mac.type) {
 858         case ixgbe_mac_82598EB:
 859                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 860                 if (direction == -1)
 861                         direction = 0;
 862                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 863                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 864                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 865                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 866                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 867                 break;
 868         case ixgbe_mac_82599EB:
 869         case ixgbe_mac_X540:
 870         case ixgbe_mac_X550:
 871         case ixgbe_mac_X550EM_x:
 872         case ixgbe_mac_x550em_a:
 873                 if (direction == -1) {
 874                         /* other causes */
 875                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 876                         index = ((queue & 1) * 8);
 877                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 878                         ivar &= ~(0xFF << index);
 879                         ivar |= (msix_vector << index);
 880                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 881                         break;
 882                 } else {
 883                         /* tx or rx causes */
 884                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 885                         index = ((16 * (queue & 1)) + (8 * direction));
 886                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 887                         ivar &= ~(0xFF << index);
 888                         ivar |= (msix_vector << index);
 889                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 890                         break;
 891                 }
 892         default:
 893                 break;
 894         }
 895 }
 896
 897 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 898                                           u64 qmask)
 899 {
 900         u32 mask;
 901
 902         switch (adapter->hw.mac.type) {
 903         case ixgbe_mac_82598EB:
 904                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 905                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 906                 break;
 907         case ixgbe_mac_82599EB:
 908         case ixgbe_mac_X540:
 909         case ixgbe_mac_X550:
 910         case ixgbe_mac_X550EM_x:
 911         case ixgbe_mac_x550em_a:
 912                 mask = (qmask & 0xFFFFFFFF);
 913                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 914                 mask = (qmask >> 32);
 915                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 916                 break;
 917         default:
 918                 break;
 919         }
 920 }
 921
 922 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 923 {
 924         struct ixgbe_hw *hw = &adapter->hw;
 925         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 926         int i;
 927         u32 data;
 928
 929         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 930             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 931                 return;
 932
 933         switch (hw->mac.type) {
 934         case ixgbe_mac_82598EB:
 935                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 936                 break;
 937         default:
 938                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 939         }
 940         hwstats->lxoffrxc += data;
 941
 942         /* refill credits (no tx hang) if we received xoff */
 943         if (!data)
 944                 return;
 945
 946         for (i = 0; i < adapter->num_tx_queues; i++)
 947                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 948                           &adapter->tx_ring[i]->state);
 949
 950         for (i = 0; i < adapter->num_xdp_queues; i++)
 951                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 952                           &adapter->xdp_ring[i]->state);
 953 }
 954
 955 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 956 {
 957         struct ixgbe_hw *hw = &adapter->hw;
 958         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 959         u32 xoff[8] = {0};
 960         u8 tc;
 961         int i;
 962         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 963
 964         if (adapter->ixgbe_ieee_pfc)
 965                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 966
 967         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 968                 ixgbe_update_xoff_rx_lfc(adapter);
 969                 return;
 970         }
 971
 972         /* update stats for each tc, only valid with PFC enabled */
 973         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 974                 u32 pxoffrxc;
 975
 976                 switch (hw->mac.type) {
 977                 case ixgbe_mac_82598EB:
 978                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
 979                         break;
 980                 default:
 981                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 982                 }
 983                 hwstats->pxoffrxc[i] += pxoffrxc;
 984                 /* Get the TC for given UP */
 985                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
 986                 xoff[tc] += pxoffrxc;
 987         }
 988
 989         /* disarm tx queues that have received xoff frames */
 990         for (i = 0; i < adapter->num_tx_queues; i++) {
 991                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
 992
 993                 tc = tx_ring->dcb_tc;
 994                 if (xoff[tc])
 995                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
 996         }
 997
 998         for (i = 0; i < adapter->num_xdp_queues; i++) {
 999                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1000
1001                 tc = xdp_ring->dcb_tc;
1002                 if (xoff[tc])
1003                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1004         }
1005 }
1006
1007 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1008 {
1009         return ring->stats.packets;
1010 }
1011
1012 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1013 {
1014         unsigned int head, tail;
1015
1016         head = ring->next_to_clean;
1017         tail = ring->next_to_use;
1018
1019         return ((head <= tail) ? tail : tail + ring->count) - head;
1020 }
1021
1022 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1023 {
1024         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1025         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1026         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1027
1028         clear_check_for_tx_hang(tx_ring);
1029
1030         /*
1031          * Check for a hung queue, but be thorough. This verifies
1032          * that a transmit has been completed since the previous
1033          * check AND there is at least one packet pending. The
1034          * ARMED bit is set to indicate a potential hang. The
1035          * bit is cleared if a pause frame is received to remove
1036          * false hang detection due to PFC or 802.3x frames. By
1037          * requiring this to fail twice we avoid races with
1038          * pfc clearing the ARMED bit and conditions where we
1039          * run the check_tx_hang logic with a transmit completion
1040          * pending but without time to complete it yet.
1041          */
1042         if (tx_done_old == tx_done && tx_pending)
1043                 /* make sure it is true for two checks in a row */
1044                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1045                                         &tx_ring->state);
1046         /* update completed stats and continue */
1047         tx_ring->tx_stats.tx_done_old = tx_done;
1048         /* reset the countdown */
1049         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1050
1051         return false;
1052 }
1053
1054 /**
1055  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1056  * @adapter: driver private struct
1057  **/
1058 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1059 {
1060
1061         /* Do the reset outside of interrupt context */
1062         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1063                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1064                 e_warn(drv, "initiating reset due to tx timeout\n");
1065                 ixgbe_service_event_schedule(adapter);
1066         }
1067 }
1068
1069 /**
1070  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1071  * @netdev: network interface device structure
1072  * @queue_index: Tx queue to set
1073  * @maxrate: desired maximum transmit bitrate
1074  **/
1075 static int ixgbe_tx_maxrate(struct net_device *netdev,
1076                             int queue_index, u32 maxrate)
1077 {
1078         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1079         struct ixgbe_hw *hw = &adapter->hw;
1080         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1081
1082         if (!maxrate)
1083                 return 0;
1084
1085         /* Calculate the rate factor values to set */
1086         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1087         bcnrc_val /= maxrate;
1088
1089         /* clear everything but the rate factor */
1090         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1091         IXGBE_RTTBCNRC_RF_DEC_MASK;
1092
1093         /* enable the rate scheduler */
1094         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1095
1096         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1097         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1098
1099         return 0;
1100 }
1101
1102 /**
1103  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1104  * @q_vector: structure containing interrupt and ring information
1105  * @tx_ring: tx ring to clean
1106  * @napi_budget: Used to determine if we are in netpoll
1107  **/
1108 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1109                                struct ixgbe_ring *tx_ring, int napi_budget)
1110 {
1111         struct ixgbe_adapter *adapter = q_vector->adapter;
1112         struct ixgbe_tx_buffer *tx_buffer;
1113         union ixgbe_adv_tx_desc *tx_desc;
1114         unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
1115         unsigned int budget = q_vector->tx.work_limit;
1116         unsigned int i = tx_ring->next_to_clean;
1117
1118         if (test_bit(__IXGBE_DOWN, &adapter->state))
1119                 return true;
1120
1121         tx_buffer = &tx_ring->tx_buffer_info[i];
1122         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1123         i -= tx_ring->count;
1124
1125         do {
1126                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1127
1128                 /* if next_to_watch is not set then there is no work pending */
1129                 if (!eop_desc)
1130                         break;
1131
1132                 /* prevent any other reads prior to eop_desc */
1133                 smp_rmb();
1134
1135                 /* if DD is not set pending work has not been completed */
1136                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1137                         break;
1138
1139                 /* clear next_to_watch to prevent false hangs */
1140                 tx_buffer->next_to_watch = NULL;
1141
1142                 /* update the statistics for this packet */
1143                 total_bytes += tx_buffer->bytecount;
1144                 total_packets += tx_buffer->gso_segs;
1145                 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
1146                         total_ipsec++;
1147
1148                 /* free the skb */
1149                 if (ring_is_xdp(tx_ring))
1150                         xdp_return_frame(tx_buffer->xdpf);
1151                 else
1152                         napi_consume_skb(tx_buffer->skb, napi_budget);
1153
1154                 /* unmap skb header data */
1155                 dma_unmap_single(tx_ring->dev,
1156                                  dma_unmap_addr(tx_buffer, dma),
1157                                  dma_unmap_len(tx_buffer, len),
1158                                  DMA_TO_DEVICE);
1159
1160                 /* clear tx_buffer data */
1161                 dma_unmap_len_set(tx_buffer, len, 0);
1162
1163                 /* unmap remaining buffers */
1164                 while (tx_desc != eop_desc) {
1165                         tx_buffer++;
1166                         tx_desc++;
1167                         i++;
1168                         if (unlikely(!i)) {
1169                                 i -= tx_ring->count;
1170                                 tx_buffer = tx_ring->tx_buffer_info;
1171                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1172                         }
1173
1174                         /* unmap any remaining paged data */
1175                         if (dma_unmap_len(tx_buffer, len)) {
1176                                 dma_unmap_page(tx_ring->dev,
1177                                                dma_unmap_addr(tx_buffer, dma),
1178                                                dma_unmap_len(tx_buffer, len),
1179                                                DMA_TO_DEVICE);
1180                                 dma_unmap_len_set(tx_buffer, len, 0);
1181                         }
1182                 }
1183
1184                 /* move us one more past the eop_desc for start of next pkt */
1185                 tx_buffer++;
1186                 tx_desc++;
1187                 i++;
1188                 if (unlikely(!i)) {
1189                         i -= tx_ring->count;
1190                         tx_buffer = tx_ring->tx_buffer_info;
1191                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1192                 }
1193
1194                 /* issue prefetch for next Tx descriptor */
1195                 prefetch(tx_desc);
1196
1197                 /* update budget accounting */
1198                 budget--;
1199         } while (likely(budget));
1200
1201         i += tx_ring->count;
1202         tx_ring->next_to_clean = i;
1203         u64_stats_update_begin(&tx_ring->syncp);
1204         tx_ring->stats.bytes += total_bytes;
1205         tx_ring->stats.packets += total_packets;
1206         u64_stats_update_end(&tx_ring->syncp);
1207         q_vector->tx.total_bytes += total_bytes;
1208         q_vector->tx.total_packets += total_packets;
1209         adapter->tx_ipsec += total_ipsec;
1210
1211         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1212                 /* schedule immediate reset if we believe we hung */
1213                 struct ixgbe_hw *hw = &adapter->hw;
1214                 e_err(drv, "Detected Tx Unit Hang %s\n"
1215                         "  Tx Queue             <%d>\n"
1216                         "  TDH, TDT             <%x>, <%x>\n"
1217                         "  next_to_use          <%x>\n"
1218                         "  next_to_clean        <%x>\n"
1219                         "tx_buffer_info[next_to_clean]\n"
1220                         "  time_stamp           <%lx>\n"
1221                         "  jiffies              <%lx>\n",
1222                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1223                         tx_ring->queue_index,
1224                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1225                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1226                         tx_ring->next_to_use, i,
1227                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1228
1229                 if (!ring_is_xdp(tx_ring))
1230                         netif_stop_subqueue(tx_ring->netdev,
1231                                             tx_ring->queue_index);
1232
1233                 e_info(probe,
1234                        "tx hang %d detected on queue %d, resetting adapter\n",
1235                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1236
1237                 /* schedule immediate reset if we believe we hung */
1238                 ixgbe_tx_timeout_reset(adapter);
1239
1240                 /* the adapter is about to reset, no point in enabling stuff */
1241                 return true;
1242         }
1243
1244         if (ring_is_xdp(tx_ring))
1245                 return !!budget;
1246
1247         netdev_tx_completed_queue(txring_txq(tx_ring),
1248                                   total_packets, total_bytes);
1249
1250 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1251         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1252                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1253                 /* Make sure that anybody stopping the queue after this
1254                  * sees the new next_to_clean.
1255                  */
1256                 smp_mb();
1257                 if (__netif_subqueue_stopped(tx_ring->netdev,
1258                                              tx_ring->queue_index)
1259                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1260                         netif_wake_subqueue(tx_ring->netdev,
1261                                             tx_ring->queue_index);
1262                         ++tx_ring->tx_stats.restart_queue;
1263                 }
1264         }
1265
1266         return !!budget;
1267 }
1268
1269 #ifdef CONFIG_IXGBE_DCA
1270 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1271                                 struct ixgbe_ring *tx_ring,
1272                                 int cpu)
1273 {
1274         struct ixgbe_hw *hw = &adapter->hw;
1275         u32 txctrl = 0;
1276         u16 reg_offset;
1277
1278         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1279                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1280
1281         switch (hw->mac.type) {
1282         case ixgbe_mac_82598EB:
1283                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1284                 break;
1285         case ixgbe_mac_82599EB:
1286         case ixgbe_mac_X540:
1287                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1288                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1289                 break;
1290         default:
1291                 /* for unknown hardware do not write register */
1292                 return;
1293         }
1294
1295         /*
1296          * We can enable relaxed ordering for reads, but not writes when
1297          * DCA is enabled.  This is due to a known issue in some chipsets
1298          * which will cause the DCA tag to be cleared.
1299          */
1300         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1301                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1302                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1303
1304         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1305 }
1306
1307 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1308                                 struct ixgbe_ring *rx_ring,
1309                                 int cpu)
1310 {
1311         struct ixgbe_hw *hw = &adapter->hw;
1312         u32 rxctrl = 0;
1313         u8 reg_idx = rx_ring->reg_idx;
1314
1315         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1316                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1317
1318         switch (hw->mac.type) {
1319         case ixgbe_mac_82599EB:
1320         case ixgbe_mac_X540:
1321                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1322                 break;
1323         default:
1324                 break;
1325         }
1326
1327         /*
1328          * We can enable relaxed ordering for reads, but not writes when
1329          * DCA is enabled.  This is due to a known issue in some chipsets
1330          * which will cause the DCA tag to be cleared.
1331          */
1332         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1333                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1334                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1335
1336         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1337 }
1338
1339 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1340 {
1341         struct ixgbe_adapter *adapter = q_vector->adapter;
1342         struct ixgbe_ring *ring;
1343         int cpu = get_cpu();
1344
1345         if (q_vector->cpu == cpu)
1346                 goto out_no_update;
1347
1348         ixgbe_for_each_ring(ring, q_vector->tx)
1349                 ixgbe_update_tx_dca(adapter, ring, cpu);
1350
1351         ixgbe_for_each_ring(ring, q_vector->rx)
1352                 ixgbe_update_rx_dca(adapter, ring, cpu);
1353
1354         q_vector->cpu = cpu;
1355 out_no_update:
1356         put_cpu();
1357 }
1358
1359 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1360 {
1361         int i;
1362
1363         /* always use CB2 mode, difference is masked in the CB driver */
1364         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1365                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1366                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1367         else
1368                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1369                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1370
1371         for (i = 0; i < adapter->num_q_vectors; i++) {
1372                 adapter->q_vector[i]->cpu = -1;
1373                 ixgbe_update_dca(adapter->q_vector[i]);
1374         }
1375 }
1376
1377 static int __ixgbe_notify_dca(struct device *dev, void *data)
1378 {
1379         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1380         unsigned long event = *(unsigned long *)data;
1381
1382         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1383                 return 0;
1384
1385         switch (event) {
1386         case DCA_PROVIDER_ADD:
1387                 /* if we're already enabled, don't do it again */
1388                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1389                         break;
1390                 if (dca_add_requester(dev) == 0) {
1391                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1392                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1393                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1394                         break;
1395                 }
1396                 /* fall through - DCA is disabled. */
1397         case DCA_PROVIDER_REMOVE:
1398                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1399                         dca_remove_requester(dev);
1400                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1401                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1402                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1403                 }
1404                 break;
1405         }
1406
1407         return 0;
1408 }
1409
1410 #endif /* CONFIG_IXGBE_DCA */
1411
1412 #define IXGBE_RSS_L4_TYPES_MASK \
1413         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1414          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1415          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1416          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1417
1418 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1419                                  union ixgbe_adv_rx_desc *rx_desc,
1420                                  struct sk_buff *skb)
1421 {
1422         u16 rss_type;
1423
1424         if (!(ring->netdev->features & NETIF_F_RXHASH))
1425                 return;
1426
1427         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1428                    IXGBE_RXDADV_RSSTYPE_MASK;
1429
1430         if (!rss_type)
1431                 return;
1432
1433         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1434                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1435                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1436 }
1437
1438 #ifdef IXGBE_FCOE
1439 /**
1440  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1441  * @ring: structure containing ring specific data
1442  * @rx_desc: advanced rx descriptor
1443  *
1444  * Returns : true if it is FCoE pkt
1445  */
1446 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1447                                     union ixgbe_adv_rx_desc *rx_desc)
1448 {
1449         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1450
1451         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1452                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1453                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1454                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1455 }
1456
1457 #endif /* IXGBE_FCOE */
1458 /**
1459  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1460  * @ring: structure containing ring specific data
1461  * @rx_desc: current Rx descriptor being processed
1462  * @skb: skb currently being received and modified
1463  **/
1464 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1465                                      union ixgbe_adv_rx_desc *rx_desc,
1466                                      struct sk_buff *skb)
1467 {
1468         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1469         bool encap_pkt = false;
1470
1471         skb_checksum_none_assert(skb);
1472
1473         /* Rx csum disabled */
1474         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1475                 return;
1476
1477         /* check for VXLAN and Geneve packets */
1478         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1479                 encap_pkt = true;
1480                 skb->encapsulation = 1;
1481         }
1482
1483         /* if IP and error */
1484         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1485             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1486                 ring->rx_stats.csum_err++;
1487                 return;
1488         }
1489
1490         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1491                 return;
1492
1493         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1494                 /*
1495                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1496                  * checksum errors.
1497                  */
1498                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1499                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1500                         return;
1501
1502                 ring->rx_stats.csum_err++;
1503                 return;
1504         }
1505
1506         /* It must be a TCP or UDP packet with a valid checksum */
1507         skb->ip_summed = CHECKSUM_UNNECESSARY;
1508         if (encap_pkt) {
1509                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1510                         return;
1511
1512                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1513                         skb->ip_summed = CHECKSUM_NONE;
1514                         return;
1515                 }
1516                 /* If we checked the outer header let the stack know */
1517                 skb->csum_level = 1;
1518         }
1519 }
1520
1521 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1522 {
1523         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1524 }
1525
1526 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1527                                     struct ixgbe_rx_buffer *bi)
1528 {
1529         struct page *page = bi->page;
1530         dma_addr_t dma;
1531
1532         /* since we are recycling buffers we should seldom need to alloc */
1533         if (likely(page))
1534                 return true;
1535
1536         /* alloc new page for storage */
1537         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1538         if (unlikely(!page)) {
1539                 rx_ring->rx_stats.alloc_rx_page_failed++;
1540                 return false;
1541         }
1542
1543         /* map page for use */
1544         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1545                                  ixgbe_rx_pg_size(rx_ring),
1546                                  DMA_FROM_DEVICE,
1547                                  IXGBE_RX_DMA_ATTR);
1548
1549         /*
1550          * if mapping failed free memory back to system since
1551          * there isn't much point in holding memory we can't use
1552          */
1553         if (dma_mapping_error(rx_ring->dev, dma)) {
1554                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1555
1556                 rx_ring->rx_stats.alloc_rx_page_failed++;
1557                 return false;
1558         }
1559
1560         bi->dma = dma;
1561         bi->page = page;
1562         bi->page_offset = ixgbe_rx_offset(rx_ring);
1563         page_ref_add(page, USHRT_MAX - 1);
1564         bi->pagecnt_bias = USHRT_MAX;
1565         rx_ring->rx_stats.alloc_rx_page++;
1566
1567         return true;
1568 }
1569
1570 /**
1571  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1572  * @rx_ring: ring to place buffers on
1573  * @cleaned_count: number of buffers to replace
1574  **/
1575 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1576 {
1577         union ixgbe_adv_rx_desc *rx_desc;
1578         struct ixgbe_rx_buffer *bi;
1579         u16 i = rx_ring->next_to_use;
1580         u16 bufsz;
1581
1582         /* nothing to do */
1583         if (!cleaned_count)
1584                 return;
1585
1586         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1587         bi = &rx_ring->rx_buffer_info[i];
1588         i -= rx_ring->count;
1589
1590         bufsz = ixgbe_rx_bufsz(rx_ring);
1591
1592         do {
1593                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1594                         break;
1595
1596                 /* sync the buffer for use by the device */
1597                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1598                                                  bi->page_offset, bufsz,
1599                                                  DMA_FROM_DEVICE);
1600
1601                 /*
1602                  * Refresh the desc even if buffer_addrs didn't change
1603                  * because each write-back erases this info.
1604                  */
1605                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1606
1607                 rx_desc++;
1608                 bi++;
1609                 i++;
1610                 if (unlikely(!i)) {
1611                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1612                         bi = rx_ring->rx_buffer_info;
1613                         i -= rx_ring->count;
1614                 }
1615
1616                 /* clear the length for the next_to_use descriptor */
1617                 rx_desc->wb.upper.length = 0;
1618
1619                 cleaned_count--;
1620         } while (cleaned_count);
1621
1622         i += rx_ring->count;
1623
1624         if (rx_ring->next_to_use != i) {
1625                 rx_ring->next_to_use = i;
1626
1627                 /* update next to alloc since we have filled the ring */
1628                 rx_ring->next_to_alloc = i;
1629
1630                 /* Force memory writes to complete before letting h/w
1631                  * know there are new descriptors to fetch.  (Only
1632                  * applicable for weak-ordered memory model archs,
1633                  * such as IA-64).
1634                  */
1635                 wmb();
1636                 writel(i, rx_ring->tail);
1637         }
1638 }
1639
1640 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1641                                    struct sk_buff *skb)
1642 {
1643         u16 hdr_len = skb_headlen(skb);
1644
1645         /* set gso_size to avoid messing up TCP MSS */
1646         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1647                                                  IXGBE_CB(skb)->append_cnt);
1648         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1649 }
1650
1651 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1652                                    struct sk_buff *skb)
1653 {
1654         /* if append_cnt is 0 then frame is not RSC */
1655         if (!IXGBE_CB(skb)->append_cnt)
1656                 return;
1657
1658         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1659         rx_ring->rx_stats.rsc_flush++;
1660
1661         ixgbe_set_rsc_gso_size(rx_ring, skb);
1662
1663         /* gso_size is computed using append_cnt so always clear it last */
1664         IXGBE_CB(skb)->append_cnt = 0;
1665 }
1666
1667 /**
1668  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1669  * @rx_ring: rx descriptor ring packet is being transacted on
1670  * @rx_desc: pointer to the EOP Rx descriptor
1671  * @skb: pointer to current skb being populated
1672  *
1673  * This function checks the ring, descriptor, and packet information in
1674  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1675  * other fields within the skb.
1676  **/
1677 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1678                                      union ixgbe_adv_rx_desc *rx_desc,
1679                                      struct sk_buff *skb)
1680 {
1681         struct net_device *dev = rx_ring->netdev;
1682         u32 flags = rx_ring->q_vector->adapter->flags;
1683
1684         ixgbe_update_rsc_stats(rx_ring, skb);
1685
1686         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1687
1688         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1689
1690         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1691                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1692
1693         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1694             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1695                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1696                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1697         }
1698
1699         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
1700                 ixgbe_ipsec_rx(rx_ring, rx_desc, skb);
1701
1702         /* record Rx queue, or update MACVLAN statistics */
1703         if (netif_is_ixgbe(dev))
1704                 skb_record_rx_queue(skb, rx_ring->queue_index);
1705         else
1706                 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
1707                                  false);
1708
1709         skb->protocol = eth_type_trans(skb, dev);
1710 }
1711
1712 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1713                          struct sk_buff *skb)
1714 {
1715         napi_gro_receive(&q_vector->napi, skb);
1716 }
1717
1718 /**
1719  * ixgbe_is_non_eop - process handling of non-EOP buffers
1720  * @rx_ring: Rx ring being processed
1721  * @rx_desc: Rx descriptor for current buffer
1722  * @skb: Current socket buffer containing buffer in progress
1723  *
1724  * This function updates next to clean.  If the buffer is an EOP buffer
1725  * this function exits returning false, otherwise it will place the
1726  * sk_buff in the next buffer to be chained and return true indicating
1727  * that this is in fact a non-EOP buffer.
1728  **/
1729 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1730                              union ixgbe_adv_rx_desc *rx_desc,
1731                              struct sk_buff *skb)
1732 {
1733         u32 ntc = rx_ring->next_to_clean + 1;
1734
1735         /* fetch, update, and store next to clean */
1736         ntc = (ntc < rx_ring->count) ? ntc : 0;
1737         rx_ring->next_to_clean = ntc;
1738
1739         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1740
1741         /* update RSC append count if present */
1742         if (ring_is_rsc_enabled(rx_ring)) {
1743                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1744                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1745
1746                 if (unlikely(rsc_enabled)) {
1747                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1748
1749                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1750                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1751
1752                         /* update ntc based on RSC value */
1753                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1754                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1755                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1756                 }
1757         }
1758
1759         /* if we are the last buffer then there is nothing else to do */
1760         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1761                 return false;
1762
1763         /* place skb in next buffer to be received */
1764         rx_ring->rx_buffer_info[ntc].skb = skb;
1765         rx_ring->rx_stats.non_eop_descs++;
1766
1767         return true;
1768 }
1769
1770 /**
1771  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1772  * @rx_ring: rx descriptor ring packet is being transacted on
1773  * @skb: pointer to current skb being adjusted
1774  *
1775  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1776  * main difference between this version and the original function is that
1777  * this function can make several assumptions about the state of things
1778  * that allow for significant optimizations versus the standard function.
1779  * As a result we can do things like drop a frag and maintain an accurate
1780  * truesize for the skb.
1781  */
1782 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1783                             struct sk_buff *skb)
1784 {
1785         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1786         unsigned char *va;
1787         unsigned int pull_len;
1788
1789         /*
1790          * it is valid to use page_address instead of kmap since we are
1791          * working with pages allocated out of the lomem pool per
1792          * alloc_page(GFP_ATOMIC)
1793          */
1794         va = skb_frag_address(frag);
1795
1796         /*
1797          * we need the header to contain the greater of either ETH_HLEN or
1798          * 60 bytes if the skb->len is less than 60 for skb_pad.
1799          */
1800         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1801
1802         /* align pull length to size of long to optimize memcpy performance */
1803         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1804
1805         /* update all of the pointers */
1806         skb_frag_size_sub(frag, pull_len);
1807         frag->page_offset += pull_len;
1808         skb->data_len -= pull_len;
1809         skb->tail += pull_len;
1810 }
1811
1812 /**
1813  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1814  * @rx_ring: rx descriptor ring packet is being transacted on
1815  * @skb: pointer to current skb being updated
1816  *
1817  * This function provides a basic DMA sync up for the first fragment of an
1818  * skb.  The reason for doing this is that the first fragment cannot be
1819  * unmapped until we have reached the end of packet descriptor for a buffer
1820  * chain.
1821  */
1822 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1823                                 struct sk_buff *skb)
1824 {
1825         if (ring_uses_build_skb(rx_ring)) {
1826                 unsigned long mask = (unsigned long)ixgbe_rx_pg_size(rx_ring) - 1;
1827                 unsigned long offset = (unsigned long)(skb->data) & mask;
1828
1829                 dma_sync_single_range_for_cpu(rx_ring->dev,
1830                                               IXGBE_CB(skb)->dma,
1831                                               offset,
1832                                               skb_headlen(skb),
1833                                               DMA_FROM_DEVICE);
1834         } else {
1835                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1836
1837                 dma_sync_single_range_for_cpu(rx_ring->dev,
1838                                               IXGBE_CB(skb)->dma,
1839                                               frag->page_offset,
1840                                               skb_frag_size(frag),
1841                                               DMA_FROM_DEVICE);
1842         }
1843
1844         /* If the page was released, just unmap it. */
1845         if (unlikely(IXGBE_CB(skb)->page_released)) {
1846                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1847                                      ixgbe_rx_pg_size(rx_ring),
1848                                      DMA_FROM_DEVICE,
1849                                      IXGBE_RX_DMA_ATTR);
1850         }
1851 }
1852
1853 /**
1854  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1855  * @rx_ring: rx descriptor ring packet is being transacted on
1856  * @rx_desc: pointer to the EOP Rx descriptor
1857  * @skb: pointer to current skb being fixed
1858  *
1859  * Check if the skb is valid in the XDP case it will be an error pointer.
1860  * Return true in this case to abort processing and advance to next
1861  * descriptor.
1862  *
1863  * Check for corrupted packet headers caused by senders on the local L2
1864  * embedded NIC switch not setting up their Tx Descriptors right.  These
1865  * should be very rare.
1866  *
1867  * Also address the case where we are pulling data in on pages only
1868  * and as such no data is present in the skb header.
1869  *
1870  * In addition if skb is not at least 60 bytes we need to pad it so that
1871  * it is large enough to qualify as a valid Ethernet frame.
1872  *
1873  * Returns true if an error was encountered and skb was freed.
1874  **/
1875 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1876                                   union ixgbe_adv_rx_desc *rx_desc,
1877                                   struct sk_buff *skb)
1878 {
1879         struct net_device *netdev = rx_ring->netdev;
1880
1881         /* XDP packets use error pointer so abort at this point */
1882         if (IS_ERR(skb))
1883                 return true;
1884
1885         /* Verify netdev is present, and that packet does not have any
1886          * errors that would be unacceptable to the netdev.
1887          */
1888         if (!netdev ||
1889             (unlikely(ixgbe_test_staterr(rx_desc,
1890                                          IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1891              !(netdev->features & NETIF_F_RXALL)))) {
1892                 dev_kfree_skb_any(skb);
1893                 return true;
1894         }
1895
1896         /* place header in linear portion of buffer */
1897         if (!skb_headlen(skb))
1898                 ixgbe_pull_tail(rx_ring, skb);
1899
1900 #ifdef IXGBE_FCOE
1901         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1902         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1903                 return false;
1904
1905 #endif
1906         /* if eth_skb_pad returns an error the skb was freed */
1907         if (eth_skb_pad(skb))
1908                 return true;
1909
1910         return false;
1911 }
1912
1913 /**
1914  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1915  * @rx_ring: rx descriptor ring to store buffers on
1916  * @old_buff: donor buffer to have page reused
1917  *
1918  * Synchronizes page for reuse by the adapter
1919  **/
1920 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1921                                 struct ixgbe_rx_buffer *old_buff)
1922 {
1923         struct ixgbe_rx_buffer *new_buff;
1924         u16 nta = rx_ring->next_to_alloc;
1925
1926         new_buff = &rx_ring->rx_buffer_info[nta];
1927
1928         /* update, and store next to alloc */
1929         nta++;
1930         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1931
1932         /* Transfer page from old buffer to new buffer.
1933          * Move each member individually to avoid possible store
1934          * forwarding stalls and unnecessary copy of skb.
1935          */
1936         new_buff->dma           = old_buff->dma;
1937         new_buff->page          = old_buff->page;
1938         new_buff->page_offset   = old_buff->page_offset;
1939         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1940 }
1941
1942 static inline bool ixgbe_page_is_reserved(struct page *page)
1943 {
1944         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1945 }
1946
1947 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer,
1948                                     int rx_buffer_pgcnt)
1949 {
1950         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1951         struct page *page = rx_buffer->page;
1952
1953         /* avoid re-using remote pages */
1954         if (unlikely(ixgbe_page_is_reserved(page)))
1955                 return false;
1956
1957 #if (PAGE_SIZE < 8192)
1958         /* if we are only owner of page we can reuse it */
1959         if (unlikely((rx_buffer_pgcnt - pagecnt_bias) > 1))
1960                 return false;
1961 #else
1962         /* The last offset is a bit aggressive in that we assume the
1963          * worst case of FCoE being enabled and using a 3K buffer.
1964          * However this should have minimal impact as the 1K extra is
1965          * still less than one buffer in size.
1966          */
1967 #define IXGBE_LAST_OFFSET \
1968         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
1969         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
1970                 return false;
1971 #endif
1972
1973         /* If we have drained the page fragment pool we need to update
1974          * the pagecnt_bias and page count so that we fully restock the
1975          * number of references the driver holds.
1976          */
1977         if (unlikely(pagecnt_bias == 1)) {
1978                 page_ref_add(page, USHRT_MAX - 1);
1979                 rx_buffer->pagecnt_bias = USHRT_MAX;
1980         }
1981
1982         return true;
1983 }
1984
1985 /**
1986  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1987  * @rx_ring: rx descriptor ring to transact packets on
1988  * @rx_buffer: buffer containing page to add
1989  * @skb: sk_buff to place the data into
1990  * @size: size of data in rx_buffer
1991  *
1992  * This function will add the data contained in rx_buffer->page to the skb.
1993  * This is done either through a direct copy if the data in the buffer is
1994  * less than the skb header size, otherwise it will just attach the page as
1995  * a frag to the skb.
1996  *
1997  * The function will then update the page offset if necessary and return
1998  * true if the buffer can be reused by the adapter.
1999  **/
2000 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
2001                               struct ixgbe_rx_buffer *rx_buffer,
2002                               struct sk_buff *skb,
2003                               unsigned int size)
2004 {
2005 #if (PAGE_SIZE < 8192)
2006         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2007 #else
2008         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2009                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2010                                 SKB_DATA_ALIGN(size);
2011 #endif
2012         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2013                         rx_buffer->page_offset, size, truesize);
2014 #if (PAGE_SIZE < 8192)
2015         rx_buffer->page_offset ^= truesize;
2016 #else
2017         rx_buffer->page_offset += truesize;
2018 #endif
2019 }
2020
2021 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2022                                                    union ixgbe_adv_rx_desc *rx_desc,
2023                                                    struct sk_buff **skb,
2024                                                    const unsigned int size,
2025                                                    int *rx_buffer_pgcnt)
2026 {
2027         struct ixgbe_rx_buffer *rx_buffer;
2028
2029         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2030         *rx_buffer_pgcnt =
2031 #if (PAGE_SIZE < 8192)
2032                 page_count(rx_buffer->page);
2033 #else
2034                 0;
2035 #endif
2036         prefetchw(rx_buffer->page);
2037         *skb = rx_buffer->skb;
2038
2039         /* Delay unmapping of the first packet. It carries the header
2040          * information, HW may still access the header after the writeback.
2041          * Only unmap it when EOP is reached
2042          */
2043         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2044                 if (!*skb)
2045                         goto skip_sync;
2046         } else {
2047                 if (*skb)
2048                         ixgbe_dma_sync_frag(rx_ring, *skb);
2049         }
2050
2051         /* we are reusing so sync this buffer for CPU use */
2052         dma_sync_single_range_for_cpu(rx_ring->dev,
2053                                       rx_buffer->dma,
2054                                       rx_buffer->page_offset,
2055                                       size,
2056                                       DMA_FROM_DEVICE);
2057 skip_sync:
2058         rx_buffer->pagecnt_bias--;
2059
2060         return rx_buffer;
2061 }
2062
2063 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2064                                 struct ixgbe_rx_buffer *rx_buffer,
2065                                 struct sk_buff *skb,
2066                                 int rx_buffer_pgcnt)
2067 {
2068         if (ixgbe_can_reuse_rx_page(rx_buffer, rx_buffer_pgcnt)) {
2069                 /* hand second half of page back to the ring */
2070                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2071         } else {
2072                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2073                         /* the page has been released from the ring */
2074                         IXGBE_CB(skb)->page_released = true;
2075                 } else {
2076                         /* we are not reusing the buffer so unmap it */
2077                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2078                                              ixgbe_rx_pg_size(rx_ring),
2079                                              DMA_FROM_DEVICE,
2080                                              IXGBE_RX_DMA_ATTR);
2081                 }
2082                 __page_frag_cache_drain(rx_buffer->page,
2083                                         rx_buffer->pagecnt_bias);
2084         }
2085
2086         /* clear contents of rx_buffer */
2087         rx_buffer->page = NULL;
2088         rx_buffer->skb = NULL;
2089 }
2090
2091 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2092                                            struct ixgbe_rx_buffer *rx_buffer,
2093                                            struct xdp_buff *xdp,
2094                                            union ixgbe_adv_rx_desc *rx_desc)
2095 {
2096         unsigned int size = xdp->data_end - xdp->data;
2097 #if (PAGE_SIZE < 8192)
2098         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2099 #else
2100         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2101                                                xdp->data_hard_start);
2102 #endif
2103         struct sk_buff *skb;
2104
2105         /* prefetch first cache line of first page */
2106         prefetch(xdp->data);
2107 #if L1_CACHE_BYTES < 128
2108         prefetch(xdp->data + L1_CACHE_BYTES);
2109 #endif
2110         /* Note, we get here by enabling legacy-rx via:
2111          *
2112          *    ethtool --set-priv-flags <dev> legacy-rx on
2113          *
2114          * In this mode, we currently get 0 extra XDP headroom as
2115          * opposed to having legacy-rx off, where we process XDP
2116          * packets going to stack via ixgbe_build_skb(). The latter
2117          * provides us currently with 192 bytes of headroom.
2118          *
2119          * For ixgbe_construct_skb() mode it means that the
2120          * xdp->data_meta will always point to xdp->data, since
2121          * the helper cannot expand the head. Should this ever
2122          * change in future for legacy-rx mode on, then lets also
2123          * add xdp->data_meta handling here.
2124          */
2125
2126         /* allocate a skb to store the frags */
2127         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2128         if (unlikely(!skb))
2129                 return NULL;
2130
2131         if (size > IXGBE_RX_HDR_SIZE) {
2132                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2133                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2134
2135                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2136                                 xdp->data - page_address(rx_buffer->page),
2137                                 size, truesize);
2138 #if (PAGE_SIZE < 8192)
2139                 rx_buffer->page_offset ^= truesize;
2140 #else
2141                 rx_buffer->page_offset += truesize;
2142 #endif
2143         } else {
2144                 memcpy(__skb_put(skb, size),
2145                        xdp->data, ALIGN(size, sizeof(long)));
2146                 rx_buffer->pagecnt_bias++;
2147         }
2148
2149         return skb;
2150 }
2151
2152 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2153                                        struct ixgbe_rx_buffer *rx_buffer,
2154                                        struct xdp_buff *xdp,
2155                                        union ixgbe_adv_rx_desc *rx_desc)
2156 {
2157         unsigned int metasize = xdp->data - xdp->data_meta;
2158 #if (PAGE_SIZE < 8192)
2159         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2160 #else
2161         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2162                                 SKB_DATA_ALIGN(xdp->data_end -
2163                                                xdp->data_hard_start);
2164 #endif
2165         struct sk_buff *skb;
2166
2167         /* Prefetch first cache line of first page. If xdp->data_meta
2168          * is unused, this points extactly as xdp->data, otherwise we
2169          * likely have a consumer accessing first few bytes of meta
2170          * data, and then actual data.
2171          */
2172         prefetch(xdp->data_meta);
2173 #if L1_CACHE_BYTES < 128
2174         prefetch(xdp->data_meta + L1_CACHE_BYTES);
2175 #endif
2176
2177         /* build an skb to around the page buffer */
2178         skb = build_skb(xdp->data_hard_start, truesize);
2179         if (unlikely(!skb))
2180                 return NULL;
2181
2182         /* update pointers within the skb to store the data */
2183         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2184         __skb_put(skb, xdp->data_end - xdp->data);
2185         if (metasize)
2186                 skb_metadata_set(skb, metasize);
2187
2188         /* record DMA address if this is the start of a chain of buffers */
2189         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2190                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2191
2192         /* update buffer offset */
2193 #if (PAGE_SIZE < 8192)
2194         rx_buffer->page_offset ^= truesize;
2195 #else
2196         rx_buffer->page_offset += truesize;
2197 #endif
2198
2199         return skb;
2200 }
2201
2202 #define IXGBE_XDP_PASS          0
2203 #define IXGBE_XDP_CONSUMED      BIT(0)
2204 #define IXGBE_XDP_TX            BIT(1)
2205 #define IXGBE_XDP_REDIR         BIT(2)
2206
2207 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
2208                                struct xdp_frame *xdpf);
2209
2210 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2211                                      struct ixgbe_ring *rx_ring,
2212                                      struct xdp_buff *xdp)
2213 {
2214         int err, result = IXGBE_XDP_PASS;
2215         struct bpf_prog *xdp_prog;
2216         struct xdp_frame *xdpf;
2217         u32 act;
2218
2219         rcu_read_lock();
2220         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2221
2222         if (!xdp_prog)
2223                 goto xdp_out;
2224
2225         prefetchw(xdp->data_hard_start); /* xdp_frame write */
2226
2227         act = bpf_prog_run_xdp(xdp_prog, xdp);
2228         switch (act) {
2229         case XDP_PASS:
2230                 break;
2231         case XDP_TX:
2232                 xdpf = convert_to_xdp_frame(xdp);
2233                 if (unlikely(!xdpf)) {
2234                         result = IXGBE_XDP_CONSUMED;
2235                         break;
2236                 }
2237                 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
2238                 break;
2239         case XDP_REDIRECT:
2240                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2241                 if (!err)
2242                         result = IXGBE_XDP_REDIR;
2243                 else
2244                         result = IXGBE_XDP_CONSUMED;
2245                 break;
2246         default:
2247                 bpf_warn_invalid_xdp_action(act);
2248                 /* fallthrough */
2249         case XDP_ABORTED:
2250                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2251                 /* fallthrough -- handle aborts by dropping packet */
2252         case XDP_DROP:
2253                 result = IXGBE_XDP_CONSUMED;
2254                 break;
2255         }
2256 xdp_out:
2257         rcu_read_unlock();
2258         return ERR_PTR(-result);
2259 }
2260
2261 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2262                                  struct ixgbe_rx_buffer *rx_buffer,
2263                                  unsigned int size)
2264 {
2265 #if (PAGE_SIZE < 8192)
2266         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2267
2268         rx_buffer->page_offset ^= truesize;
2269 #else
2270         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2271                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) +
2272                                 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
2273                                 SKB_DATA_ALIGN(size);
2274
2275         rx_buffer->page_offset += truesize;
2276 #endif
2277 }
2278
2279 /**
2280  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2281  * @q_vector: structure containing interrupt and ring information
2282  * @rx_ring: rx descriptor ring to transact packets on
2283  * @budget: Total limit on number of packets to process
2284  *
2285  * This function provides a "bounce buffer" approach to Rx interrupt
2286  * processing.  The advantage to this is that on systems that have
2287  * expensive overhead for IOMMU access this provides a means of avoiding
2288  * it by maintaining the mapping of the page to the syste.
2289  *
2290  * Returns amount of work completed
2291  **/
2292 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2293                                struct ixgbe_ring *rx_ring,
2294                                const int budget)
2295 {
2296         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2297         struct ixgbe_adapter *adapter = q_vector->adapter;
2298 #ifdef IXGBE_FCOE
2299         int ddp_bytes;
2300         unsigned int mss = 0;
2301 #endif /* IXGBE_FCOE */
2302         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2303         unsigned int xdp_xmit = 0;
2304         struct xdp_buff xdp;
2305
2306         xdp.rxq = &rx_ring->xdp_rxq;
2307
2308         while (likely(total_rx_packets < budget)) {
2309                 union ixgbe_adv_rx_desc *rx_desc;
2310                 struct ixgbe_rx_buffer *rx_buffer;
2311                 struct sk_buff *skb;
2312                 int rx_buffer_pgcnt;
2313                 unsigned int size;
2314
2315                 /* return some buffers to hardware, one at a time is too slow */
2316                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2317                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2318                         cleaned_count = 0;
2319                 }
2320
2321                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2322                 size = le16_to_cpu(rx_desc->wb.upper.length);
2323                 if (!size)
2324                         break;
2325
2326                 /* This memory barrier is needed to keep us from reading
2327                  * any other fields out of the rx_desc until we know the
2328                  * descriptor has been written back
2329                  */
2330                 dma_rmb();
2331
2332                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size, &rx_buffer_pgcnt);
2333
2334                 /* retrieve a buffer from the ring */
2335                 if (!skb) {
2336                         xdp.data = page_address(rx_buffer->page) +
2337                                    rx_buffer->page_offset;
2338                         xdp.data_meta = xdp.data;
2339                         xdp.data_hard_start = xdp.data -
2340                                               ixgbe_rx_offset(rx_ring);
2341                         xdp.data_end = xdp.data + size;
2342
2343                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2344                 }
2345
2346                 if (IS_ERR(skb)) {
2347                         unsigned int xdp_res = -PTR_ERR(skb);
2348
2349                         if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {
2350                                 xdp_xmit |= xdp_res;
2351                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2352                         } else {
2353                                 rx_buffer->pagecnt_bias++;
2354                         }
2355                         total_rx_packets++;
2356                         total_rx_bytes += size;
2357                 } else if (skb) {
2358                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2359                 } else if (ring_uses_build_skb(rx_ring)) {
2360                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2361                                               &xdp, rx_desc);
2362                 } else {
2363                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2364                                                   &xdp, rx_desc);
2365                 }
2366
2367                 /* exit if we failed to retrieve a buffer */
2368                 if (!skb) {
2369                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2370                         rx_buffer->pagecnt_bias++;
2371                         break;
2372                 }
2373
2374                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb, rx_buffer_pgcnt);
2375                 cleaned_count++;
2376
2377                 /* place incomplete frames back on ring for completion */
2378                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2379                         continue;
2380
2381                 /* verify the packet layout is correct */
2382                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2383                         continue;
2384
2385                 /* probably a little skewed due to removing CRC */
2386                 total_rx_bytes += skb->len;
2387
2388                 /* populate checksum, timestamp, VLAN, and protocol */
2389                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2390
2391 #ifdef IXGBE_FCOE
2392                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2393                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2394                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2395                         /* include DDPed FCoE data */
2396                         if (ddp_bytes > 0) {
2397                                 if (!mss) {
2398                                         mss = rx_ring->netdev->mtu -
2399                                                 sizeof(struct fcoe_hdr) -
2400                                                 sizeof(struct fc_frame_header) -
2401                                                 sizeof(struct fcoe_crc_eof);
2402                                         if (mss > 512)
2403                                                 mss &= ~511;
2404                                 }
2405                                 total_rx_bytes += ddp_bytes;
2406                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2407                                                                  mss);
2408                         }
2409                         if (!ddp_bytes) {
2410                                 dev_kfree_skb_any(skb);
2411                                 continue;
2412                         }
2413                 }
2414
2415 #endif /* IXGBE_FCOE */
2416                 ixgbe_rx_skb(q_vector, skb);
2417
2418                 /* update budget accounting */
2419                 total_rx_packets++;
2420         }
2421
2422         if (xdp_xmit & IXGBE_XDP_REDIR)
2423                 xdp_do_flush_map();
2424
2425         if (xdp_xmit & IXGBE_XDP_TX) {
2426                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2427
2428                 /* Force memory writes to complete before letting h/w
2429                  * know there are new descriptors to fetch.
2430                  */
2431                 wmb();
2432                 writel(ring->next_to_use, ring->tail);
2433         }
2434
2435         u64_stats_update_begin(&rx_ring->syncp);
2436         rx_ring->stats.packets += total_rx_packets;
2437         rx_ring->stats.bytes += total_rx_bytes;
2438         u64_stats_update_end(&rx_ring->syncp);
2439         q_vector->rx.total_packets += total_rx_packets;
2440         q_vector->rx.total_bytes += total_rx_bytes;
2441
2442         return total_rx_packets;
2443 }
2444
2445 /**
2446  * ixgbe_configure_msix - Configure MSI-X hardware
2447  * @adapter: board private structure
2448  *
2449  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2450  * interrupts.
2451  **/
2452 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2453 {
2454         struct ixgbe_q_vector *q_vector;
2455         int v_idx;
2456         u32 mask;
2457
2458         /* Populate MSIX to EITR Select */
2459         if (adapter->num_vfs > 32) {
2460                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2461                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2462         }
2463
2464         /*
2465          * Populate the IVAR table and set the ITR values to the
2466          * corresponding register.
2467          */
2468         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2469                 struct ixgbe_ring *ring;
2470                 q_vector = adapter->q_vector[v_idx];
2471
2472                 ixgbe_for_each_ring(ring, q_vector->rx)
2473                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2474
2475                 ixgbe_for_each_ring(ring, q_vector->tx)
2476                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2477
2478                 ixgbe_write_eitr(q_vector);
2479         }
2480
2481         switch (adapter->hw.mac.type) {
2482         case ixgbe_mac_82598EB:
2483                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2484                                v_idx);
2485                 break;
2486         case ixgbe_mac_82599EB:
2487         case ixgbe_mac_X540:
2488         case ixgbe_mac_X550:
2489         case ixgbe_mac_X550EM_x:
2490         case ixgbe_mac_x550em_a:
2491                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2492                 break;
2493         default:
2494                 break;
2495         }
2496         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2497
2498         /* set up to autoclear timer, and the vectors */
2499         mask = IXGBE_EIMS_ENABLE_MASK;
2500         mask &= ~(IXGBE_EIMS_OTHER |
2501                   IXGBE_EIMS_MAILBOX |
2502                   IXGBE_EIMS_LSC);
2503
2504         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2505 }
2506
2507 /**
2508  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2509  * @q_vector: structure containing interrupt and ring information
2510  * @ring_container: structure containing ring performance data
2511  *
2512  *      Stores a new ITR value based on packets and byte
2513  *      counts during the last interrupt.  The advantage of per interrupt
2514  *      computation is faster updates and more accurate ITR for the current
2515  *      traffic pattern.  Constants in this function were computed
2516  *      based on theoretical maximum wire speed and thresholds were set based
2517  *      on testing data as well as attempting to minimize response time
2518  *      while increasing bulk throughput.
2519  **/
2520 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2521                              struct ixgbe_ring_container *ring_container)
2522 {
2523         unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2524                            IXGBE_ITR_ADAPTIVE_LATENCY;
2525         unsigned int avg_wire_size, packets, bytes;
2526         unsigned long next_update = jiffies;
2527
2528         /* If we don't have any rings just leave ourselves set for maximum
2529          * possible latency so we take ourselves out of the equation.
2530          */
2531         if (!ring_container->ring)
2532                 return;
2533
2534         /* If we didn't update within up to 1 - 2 jiffies we can assume
2535          * that either packets are coming in so slow there hasn't been
2536          * any work, or that there is so much work that NAPI is dealing
2537          * with interrupt moderation and we don't need to do anything.
2538          */
2539         if (time_after(next_update, ring_container->next_update))
2540                 goto clear_counts;
2541
2542         packets = ring_container->total_packets;
2543
2544         /* We have no packets to actually measure against. This means
2545          * either one of the other queues on this vector is active or
2546          * we are a Tx queue doing TSO with too high of an interrupt rate.
2547          *
2548          * When this occurs just tick up our delay by the minimum value
2549          * and hope that this extra delay will prevent us from being called
2550          * without any work on our queue.
2551          */
2552         if (!packets) {
2553                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2554                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2555                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2556                 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2557                 goto clear_counts;
2558         }
2559
2560         bytes = ring_container->total_bytes;
2561
2562         /* If packets are less than 4 or bytes are less than 9000 assume
2563          * insufficient data to use bulk rate limiting approach. We are
2564          * likely latency driven.
2565          */
2566         if (packets < 4 && bytes < 9000) {
2567                 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2568                 goto adjust_by_size;
2569         }
2570
2571         /* Between 4 and 48 we can assume that our current interrupt delay
2572          * is only slightly too low. As such we should increase it by a small
2573          * fixed amount.
2574          */
2575         if (packets < 48) {
2576                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2577                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2578                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2579                 goto clear_counts;
2580         }
2581
2582         /* Between 48 and 96 is our "goldilocks" zone where we are working
2583          * out "just right". Just report that our current ITR is good for us.
2584          */
2585         if (packets < 96) {
2586                 itr = q_vector->itr >> 2;
2587                 goto clear_counts;
2588         }
2589
2590         /* If packet count is 96 or greater we are likely looking at a slight
2591          * overrun of the delay we want. Try halving our delay to see if that
2592          * will cut the number of packets in half per interrupt.
2593          */
2594         if (packets < 256) {
2595                 itr = q_vector->itr >> 3;
2596                 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2597                         itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2598                 goto clear_counts;
2599         }
2600
2601         /* The paths below assume we are dealing with a bulk ITR since number
2602          * of packets is 256 or greater. We are just going to have to compute
2603          * a value and try to bring the count under control, though for smaller
2604          * packet sizes there isn't much we can do as NAPI polling will likely
2605          * be kicking in sooner rather than later.
2606          */
2607         itr = IXGBE_ITR_ADAPTIVE_BULK;
2608
2609 adjust_by_size:
2610         /* If packet counts are 256 or greater we can assume we have a gross
2611          * overestimation of what the rate should be. Instead of trying to fine
2612          * tune it just use the formula below to try and dial in an exact value
2613          * give the current packet size of the frame.
2614          */
2615         avg_wire_size = bytes / packets;
2616
2617         /* The following is a crude approximation of:
2618          *  wmem_default / (size + overhead) = desired_pkts_per_int
2619          *  rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2620          *  (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2621          *
2622          * Assuming wmem_default is 212992 and overhead is 640 bytes per
2623          * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2624          * formula down to
2625          *
2626          *  (170 * (size + 24)) / (size + 640) = ITR
2627          *
2628          * We first do some math on the packet size and then finally bitshift
2629          * by 8 after rounding up. We also have to account for PCIe link speed
2630          * difference as ITR scales based on this.
2631          */
2632         if (avg_wire_size <= 60) {
2633                 /* Start at 50k ints/sec */
2634                 avg_wire_size = 5120;
2635         } else if (avg_wire_size <= 316) {
2636                 /* 50K ints/sec to 16K ints/sec */
2637                 avg_wire_size *= 40;
2638                 avg_wire_size += 2720;
2639         } else if (avg_wire_size <= 1084) {
2640                 /* 16K ints/sec to 9.2K ints/sec */
2641                 avg_wire_size *= 15;
2642                 avg_wire_size += 11452;
2643         } else if (avg_wire_size < 1968) {
2644                 /* 9.2K ints/sec to 8K ints/sec */
2645                 avg_wire_size *= 5;
2646                 avg_wire_size += 22420;
2647         } else {
2648                 /* plateau at a limit of 8K ints/sec */
2649                 avg_wire_size = 32256;
2650         }
2651
2652         /* If we are in low latency mode half our delay which doubles the rate
2653          * to somewhere between 100K to 16K ints/sec
2654          */
2655         if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2656                 avg_wire_size >>= 1;
2657
2658         /* Resultant value is 256 times larger than it needs to be. This
2659          * gives us room to adjust the value as needed to either increase
2660          * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2661          *
2662          * Use addition as we have already recorded the new latency flag
2663          * for the ITR value.
2664          */
2665         switch (q_vector->adapter->link_speed) {
2666         case IXGBE_LINK_SPEED_10GB_FULL:
2667         case IXGBE_LINK_SPEED_100_FULL:
2668         default:
2669                 itr += DIV_ROUND_UP(avg_wire_size,
2670                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2671                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2672                 break;
2673         case IXGBE_LINK_SPEED_2_5GB_FULL:
2674         case IXGBE_LINK_SPEED_1GB_FULL:
2675         case IXGBE_LINK_SPEED_10_FULL:
2676                 if (avg_wire_size > 8064)
2677                         avg_wire_size = 8064;
2678                 itr += DIV_ROUND_UP(avg_wire_size,
2679                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2680                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2681                 break;
2682         }
2683
2684 clear_counts:
2685         /* write back value */
2686         ring_container->itr = itr;
2687
2688         /* next update should occur within next jiffy */
2689         ring_container->next_update = next_update + 1;
2690
2691         ring_container->total_bytes = 0;
2692         ring_container->total_packets = 0;
2693 }
2694
2695 /**
2696  * ixgbe_write_eitr - write EITR register in hardware specific way
2697  * @q_vector: structure containing interrupt and ring information
2698  *
2699  * This function is made to be called by ethtool and by the driver
2700  * when it needs to update EITR registers at runtime.  Hardware
2701  * specific quirks/differences are taken care of here.
2702  */
2703 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2704 {
2705         struct ixgbe_adapter *adapter = q_vector->adapter;
2706         struct ixgbe_hw *hw = &adapter->hw;
2707         int v_idx = q_vector->v_idx;
2708         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2709
2710         switch (adapter->hw.mac.type) {
2711         case ixgbe_mac_82598EB:
2712                 /* must write high and low 16 bits to reset counter */
2713                 itr_reg |= (itr_reg << 16);
2714                 break;
2715         case ixgbe_mac_82599EB:
2716         case ixgbe_mac_X540:
2717         case ixgbe_mac_X550:
2718         case ixgbe_mac_X550EM_x:
2719         case ixgbe_mac_x550em_a:
2720                 /*
2721                  * set the WDIS bit to not clear the timer bits and cause an
2722                  * immediate assertion of the interrupt
2723                  */
2724                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2725                 break;
2726         default:
2727                 break;
2728         }
2729         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2730 }
2731
2732 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2733 {
2734         u32 new_itr;
2735
2736         ixgbe_update_itr(q_vector, &q_vector->tx);
2737         ixgbe_update_itr(q_vector, &q_vector->rx);
2738
2739         /* use the smallest value of new ITR delay calculations */
2740         new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2741
2742         /* Clear latency flag if set, shift into correct position */
2743         new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2744         new_itr <<= 2;
2745
2746         if (new_itr != q_vector->itr) {
2747                 /* save the algorithm value here */
2748                 q_vector->itr = new_itr;
2749
2750                 ixgbe_write_eitr(q_vector);
2751         }
2752 }
2753
2754 /**
2755  * ixgbe_check_overtemp_subtask - check for over temperature
2756  * @adapter: pointer to adapter
2757  **/
2758 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2759 {
2760         struct ixgbe_hw *hw = &adapter->hw;
2761         u32 eicr = adapter->interrupt_event;
2762         s32 rc;
2763
2764         if (test_bit(__IXGBE_DOWN, &adapter->state))
2765                 return;
2766
2767         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2768                 return;
2769
2770         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2771
2772         switch (hw->device_id) {
2773         case IXGBE_DEV_ID_82599_T3_LOM:
2774                 /*
2775                  * Since the warning interrupt is for both ports
2776                  * we don't have to check if:
2777                  *  - This interrupt wasn't for our port.
2778                  *  - We may have missed the interrupt so always have to
2779                  *    check if we  got a LSC
2780                  */
2781                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2782                     !(eicr & IXGBE_EICR_LSC))
2783                         return;
2784
2785                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2786                         u32 speed;
2787                         bool link_up = false;
2788
2789                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2790
2791                         if (link_up)
2792                                 return;
2793                 }
2794
2795                 /* Check if this is not due to overtemp */
2796                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2797                         return;
2798
2799                 break;
2800         case IXGBE_DEV_ID_X550EM_A_1G_T:
2801         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2802                 rc = hw->phy.ops.check_overtemp(hw);
2803                 if (rc != IXGBE_ERR_OVERTEMP)
2804                         return;
2805                 break;
2806         default:
2807                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2808                         return;
2809                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2810                         return;
2811                 break;
2812         }
2813         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2814
2815         adapter->interrupt_event = 0;
2816 }
2817
2818 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2819 {
2820         struct ixgbe_hw *hw = &adapter->hw;
2821
2822         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2823             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2824                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2825                 /* write to clear the interrupt */
2826                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2827         }
2828 }
2829
2830 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2831 {
2832         struct ixgbe_hw *hw = &adapter->hw;
2833
2834         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2835                 return;
2836
2837         switch (adapter->hw.mac.type) {
2838         case ixgbe_mac_82599EB:
2839                 /*
2840                  * Need to check link state so complete overtemp check
2841                  * on service task
2842                  */
2843                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2844                      (eicr & IXGBE_EICR_LSC)) &&
2845                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2846                         adapter->interrupt_event = eicr;
2847                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2848                         ixgbe_service_event_schedule(adapter);
2849                         return;
2850                 }
2851                 return;
2852         case ixgbe_mac_x550em_a:
2853                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2854                         adapter->interrupt_event = eicr;
2855                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2856                         ixgbe_service_event_schedule(adapter);
2857                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2858                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2859                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2860                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2861                 }
2862                 return;
2863         case ixgbe_mac_X550:
2864         case ixgbe_mac_X540:
2865                 if (!(eicr & IXGBE_EICR_TS))
2866                         return;
2867                 break;
2868         default:
2869                 return;
2870         }
2871
2872         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2873 }
2874
2875 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2876 {
2877         switch (hw->mac.type) {
2878         case ixgbe_mac_82598EB:
2879                 if (hw->phy.type == ixgbe_phy_nl)
2880                         return true;
2881                 return false;
2882         case ixgbe_mac_82599EB:
2883         case ixgbe_mac_X550EM_x:
2884         case ixgbe_mac_x550em_a:
2885                 switch (hw->mac.ops.get_media_type(hw)) {
2886                 case ixgbe_media_type_fiber:
2887                 case ixgbe_media_type_fiber_qsfp:
2888                         return true;
2889                 default:
2890                         return false;
2891                 }
2892         default:
2893                 return false;
2894         }
2895 }
2896
2897 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2898 {
2899         struct ixgbe_hw *hw = &adapter->hw;
2900         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2901
2902         if (!ixgbe_is_sfp(hw))
2903                 return;
2904
2905         /* Later MAC's use different SDP */
2906         if (hw->mac.type >= ixgbe_mac_X540)
2907                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2908
2909         if (eicr & eicr_mask) {
2910                 /* Clear the interrupt */
2911                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2912                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2913                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2914                         adapter->sfp_poll_time = 0;
2915                         ixgbe_service_event_schedule(adapter);
2916                 }
2917         }
2918
2919         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2920             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2921                 /* Clear the interrupt */
2922                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2923                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2924                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2925                         ixgbe_service_event_schedule(adapter);
2926                 }
2927         }
2928 }
2929
2930 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2931 {
2932         struct ixgbe_hw *hw = &adapter->hw;
2933
2934         adapter->lsc_int++;
2935         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2936         adapter->link_check_timeout = jiffies;
2937         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2938                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2939                 IXGBE_WRITE_FLUSH(hw);
2940                 ixgbe_service_event_schedule(adapter);
2941         }
2942 }
2943
2944 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2945                                            u64 qmask)
2946 {
2947         u32 mask;
2948         struct ixgbe_hw *hw = &adapter->hw;
2949
2950         switch (hw->mac.type) {
2951         case ixgbe_mac_82598EB:
2952                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2953                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2954                 break;
2955         case ixgbe_mac_82599EB:
2956         case ixgbe_mac_X540:
2957         case ixgbe_mac_X550:
2958         case ixgbe_mac_X550EM_x:
2959         case ixgbe_mac_x550em_a:
2960                 mask = (qmask & 0xFFFFFFFF);
2961                 if (mask)
2962                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2963                 mask = (qmask >> 32);
2964                 if (mask)
2965                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2966                 break;
2967         default:
2968                 break;
2969         }
2970         /* skip the flush */
2971 }
2972
2973 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2974                                             u64 qmask)
2975 {
2976         u32 mask;
2977         struct ixgbe_hw *hw = &adapter->hw;
2978
2979         switch (hw->mac.type) {
2980         case ixgbe_mac_82598EB:
2981                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2982                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2983                 break;
2984         case ixgbe_mac_82599EB:
2985         case ixgbe_mac_X540:
2986         case ixgbe_mac_X550:
2987         case ixgbe_mac_X550EM_x:
2988         case ixgbe_mac_x550em_a:
2989                 mask = (qmask & 0xFFFFFFFF);
2990                 if (mask)
2991                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2992                 mask = (qmask >> 32);
2993                 if (mask)
2994                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2995                 break;
2996         default:
2997                 break;
2998         }
2999         /* skip the flush */
3000 }
3001
3002 /**
3003  * ixgbe_irq_enable - Enable default interrupt generation settings
3004  * @adapter: board private structure
3005  * @queues: enable irqs for queues
3006  * @flush: flush register write
3007  **/
3008 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
3009                                     bool flush)
3010 {
3011         struct ixgbe_hw *hw = &adapter->hw;
3012         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
3013
3014         /* don't reenable LSC while waiting for link */
3015         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
3016                 mask &= ~IXGBE_EIMS_LSC;
3017
3018         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
3019                 switch (adapter->hw.mac.type) {
3020                 case ixgbe_mac_82599EB:
3021                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
3022                         break;
3023                 case ixgbe_mac_X540:
3024                 case ixgbe_mac_X550:
3025                 case ixgbe_mac_X550EM_x:
3026                 case ixgbe_mac_x550em_a:
3027                         mask |= IXGBE_EIMS_TS;
3028                         break;
3029                 default:
3030                         break;
3031                 }
3032         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3033                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3034         switch (adapter->hw.mac.type) {
3035         case ixgbe_mac_82599EB:
3036                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3037                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3038                 /* fall through */
3039         case ixgbe_mac_X540:
3040         case ixgbe_mac_X550:
3041         case ixgbe_mac_X550EM_x:
3042         case ixgbe_mac_x550em_a:
3043                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3044                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3045                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3046                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3047                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3048                         mask |= IXGBE_EICR_GPI_SDP0_X540;
3049                 mask |= IXGBE_EIMS_ECC;
3050                 mask |= IXGBE_EIMS_MAILBOX;
3051                 break;
3052         default:
3053                 break;
3054         }
3055
3056         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3057             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3058                 mask |= IXGBE_EIMS_FLOW_DIR;
3059
3060         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3061         if (queues)
3062                 ixgbe_irq_enable_queues(adapter, ~0);
3063         if (flush)
3064                 IXGBE_WRITE_FLUSH(&adapter->hw);
3065 }
3066
3067 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3068 {
3069         struct ixgbe_adapter *adapter = data;
3070         struct ixgbe_hw *hw = &adapter->hw;
3071         u32 eicr;
3072
3073         /*
3074          * Workaround for Silicon errata.  Use clear-by-write instead
3075          * of clear-by-read.  Reading with EICS will return the
3076          * interrupt causes without clearing, which later be done
3077          * with the write to EICR.
3078          */
3079         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3080
3081         /* The lower 16bits of the EICR register are for the queue interrupts
3082          * which should be masked here in order to not accidentally clear them if
3083          * the bits are high when ixgbe_msix_other is called. There is a race
3084          * condition otherwise which results in possible performance loss
3085          * especially if the ixgbe_msix_other interrupt is triggering
3086          * consistently (as it would when PPS is turned on for the X540 device)
3087          */
3088         eicr &= 0xFFFF0000;
3089
3090         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3091
3092         if (eicr & IXGBE_EICR_LSC)
3093                 ixgbe_check_lsc(adapter);
3094
3095         if (eicr & IXGBE_EICR_MAILBOX)
3096                 ixgbe_msg_task(adapter);
3097
3098         switch (hw->mac.type) {
3099         case ixgbe_mac_82599EB:
3100         case ixgbe_mac_X540:
3101         case ixgbe_mac_X550:
3102         case ixgbe_mac_X550EM_x:
3103         case ixgbe_mac_x550em_a:
3104                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3105                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3106                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3107                         ixgbe_service_event_schedule(adapter);
3108                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
3109                                         IXGBE_EICR_GPI_SDP0_X540);
3110                 }
3111                 if (eicr & IXGBE_EICR_ECC) {
3112                         e_info(link, "Received ECC Err, initiating reset\n");
3113                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3114                         ixgbe_service_event_schedule(adapter);
3115                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3116                 }
3117                 /* Handle Flow Director Full threshold interrupt */
3118                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3119                         int reinit_count = 0;
3120                         int i;
3121                         for (i = 0; i < adapter->num_tx_queues; i++) {
3122                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3123                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3124                                                        &ring->state))
3125                                         reinit_count++;
3126                         }
3127                         if (reinit_count) {
3128                                 /* no more flow director interrupts until after init */
3129                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3130                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3131                                 ixgbe_service_event_schedule(adapter);
3132                         }
3133                 }
3134                 ixgbe_check_sfp_event(adapter, eicr);
3135                 ixgbe_check_overtemp_event(adapter, eicr);
3136                 break;
3137         default:
3138                 break;
3139         }
3140
3141         ixgbe_check_fan_failure(adapter, eicr);
3142
3143         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3144                 ixgbe_ptp_check_pps_event(adapter);
3145
3146         /* re-enable the original interrupt state, no lsc, no queues */
3147         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3148                 ixgbe_irq_enable(adapter, false, false);
3149
3150         return IRQ_HANDLED;
3151 }
3152
3153 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3154 {
3155         struct ixgbe_q_vector *q_vector = data;
3156
3157         /* EIAM disabled interrupts (on this vector) for us */
3158
3159         if (q_vector->rx.ring || q_vector->tx.ring)
3160                 napi_schedule_irqoff(&q_vector->napi);
3161
3162         return IRQ_HANDLED;
3163 }
3164
3165 /**
3166  * ixgbe_poll - NAPI Rx polling callback
3167  * @napi: structure for representing this polling device
3168  * @budget: how many packets driver is allowed to clean
3169  *
3170  * This function is used for legacy and MSI, NAPI mode
3171  **/
3172 int ixgbe_poll(struct napi_struct *napi, int budget)
3173 {
3174         struct ixgbe_q_vector *q_vector =
3175                                 container_of(napi, struct ixgbe_q_vector, napi);
3176         struct ixgbe_adapter *adapter = q_vector->adapter;
3177         struct ixgbe_ring *ring;
3178         int per_ring_budget, work_done = 0;
3179         bool clean_complete = true;
3180
3181 #ifdef CONFIG_IXGBE_DCA
3182         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3183                 ixgbe_update_dca(q_vector);
3184 #endif
3185
3186         ixgbe_for_each_ring(ring, q_vector->tx) {
3187                 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
3188                         clean_complete = false;
3189         }
3190
3191         /* Exit if we are called by netpoll */
3192         if (budget <= 0)
3193                 return budget;
3194
3195         /* attempt to distribute budget to each queue fairly, but don't allow
3196          * the budget to go below 1 because we'll exit polling */
3197         if (q_vector->rx.count > 1)
3198                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3199         else
3200                 per_ring_budget = budget;
3201
3202         ixgbe_for_each_ring(ring, q_vector->rx) {
3203                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
3204                                                  per_ring_budget);
3205
3206                 work_done += cleaned;
3207                 if (cleaned >= per_ring_budget)
3208                         clean_complete = false;
3209         }
3210
3211         /* If all work not completed, return budget and keep polling */
3212         if (!clean_complete)
3213                 return budget;
3214
3215         /* all work done, exit the polling mode */
3216         if (likely(napi_complete_done(napi, work_done))) {
3217                 if (adapter->rx_itr_setting & 1)
3218                         ixgbe_set_itr(q_vector);
3219                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3220                         ixgbe_irq_enable_queues(adapter,
3221                                                 BIT_ULL(q_vector->v_idx));
3222         }
3223
3224         return min(work_done, budget - 1);
3225 }
3226
3227 /**
3228  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3229  * @adapter: board private structure
3230  *
3231  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3232  * interrupts from the kernel.
3233  **/
3234 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3235 {
3236         struct net_device *netdev = adapter->netdev;
3237         unsigned int ri = 0, ti = 0;
3238         int vector, err;
3239
3240         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3241                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3242                 struct msix_entry *entry = &adapter->msix_entries[vector];
3243
3244                 if (q_vector->tx.ring && q_vector->rx.ring) {
3245                         snprintf(q_vector->name, sizeof(q_vector->name),
3246                                  "%s-TxRx-%u", netdev->name, ri++);
3247                         ti++;
3248                 } else if (q_vector->rx.ring) {
3249                         snprintf(q_vector->name, sizeof(q_vector->name),
3250                                  "%s-rx-%u", netdev->name, ri++);
3251                 } else if (q_vector->tx.ring) {
3252                         snprintf(q_vector->name, sizeof(q_vector->name),
3253                                  "%s-tx-%u", netdev->name, ti++);
3254                 } else {
3255                         /* skip this unused q_vector */
3256                         continue;
3257                 }
3258                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3259                                   q_vector->name, q_vector);
3260                 if (err) {
3261                         e_err(probe, "request_irq failed for MSIX interrupt "
3262                               "Error: %d\n", err);
3263                         goto free_queue_irqs;
3264                 }
3265                 /* If Flow Director is enabled, set interrupt affinity */
3266                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3267                         /* assign the mask for this irq */
3268                         irq_set_affinity_hint(entry->vector,
3269                                               &q_vector->affinity_mask);
3270                 }
3271         }
3272
3273         err = request_irq(adapter->msix_entries[vector].vector,
3274                           ixgbe_msix_other, 0, netdev->name, adapter);
3275         if (err) {
3276                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3277                 goto free_queue_irqs;
3278         }
3279
3280         return 0;
3281
3282 free_queue_irqs:
3283         while (vector) {
3284                 vector--;
3285                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3286                                       NULL);
3287                 free_irq(adapter->msix_entries[vector].vector,
3288                          adapter->q_vector[vector]);
3289         }
3290         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3291         pci_disable_msix(adapter->pdev);
3292         kfree(adapter->msix_entries);
3293         adapter->msix_entries = NULL;
3294         return err;
3295 }
3296
3297 /**
3298  * ixgbe_intr - legacy mode Interrupt Handler
3299  * @irq: interrupt number
3300  * @data: pointer to a network interface device structure
3301  **/
3302 static irqreturn_t ixgbe_intr(int irq, void *data)
3303 {
3304         struct ixgbe_adapter *adapter = data;
3305         struct ixgbe_hw *hw = &adapter->hw;
3306         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3307         u32 eicr;
3308
3309         /*
3310          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3311          * before the read of EICR.
3312          */
3313         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3314
3315         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3316          * therefore no explicit interrupt disable is necessary */
3317         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3318         if (!eicr) {
3319                 /*
3320                  * shared interrupt alert!
3321                  * make sure interrupts are enabled because the read will
3322                  * have disabled interrupts due to EIAM
3323                  * finish the workaround of silicon errata on 82598.  Unmask
3324                  * the interrupt that we masked before the EICR read.
3325                  */
3326                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3327                         ixgbe_irq_enable(adapter, true, true);
3328                 return IRQ_NONE;        /* Not our interrupt */
3329         }
3330
3331         if (eicr & IXGBE_EICR_LSC)
3332                 ixgbe_check_lsc(adapter);
3333
3334         switch (hw->mac.type) {
3335         case ixgbe_mac_82599EB:
3336                 ixgbe_check_sfp_event(adapter, eicr);
3337                 /* Fall through */
3338         case ixgbe_mac_X540:
3339         case ixgbe_mac_X550:
3340         case ixgbe_mac_X550EM_x:
3341         case ixgbe_mac_x550em_a:
3342                 if (eicr & IXGBE_EICR_ECC) {
3343                         e_info(link, "Received ECC Err, initiating reset\n");
3344                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3345                         ixgbe_service_event_schedule(adapter);
3346                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3347                 }
3348                 ixgbe_check_overtemp_event(adapter, eicr);
3349                 break;
3350         default:
3351                 break;
3352         }
3353
3354         ixgbe_check_fan_failure(adapter, eicr);
3355         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3356                 ixgbe_ptp_check_pps_event(adapter);
3357
3358         /* would disable interrupts here but EIAM disabled it */
3359         napi_schedule_irqoff(&q_vector->napi);
3360
3361         /*
3362          * re-enable link(maybe) and non-queue interrupts, no flush.
3363          * ixgbe_poll will re-enable the queue interrupts
3364          */
3365         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3366                 ixgbe_irq_enable(adapter, false, false);
3367
3368         return IRQ_HANDLED;
3369 }
3370
3371 /**
3372  * ixgbe_request_irq - initialize interrupts
3373  * @adapter: board private structure
3374  *
3375  * Attempts to configure interrupts using the best available
3376  * capabilities of the hardware and kernel.
3377  **/
3378 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3379 {
3380         struct net_device *netdev = adapter->netdev;
3381         int err;
3382
3383         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3384                 err = ixgbe_request_msix_irqs(adapter);
3385         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3386                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3387                                   netdev->name, adapter);
3388         else
3389                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3390                                   netdev->name, adapter);
3391
3392         if (err)
3393                 e_err(probe, "request_irq failed, Error %d\n", err);
3394
3395         return err;
3396 }
3397
3398 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3399 {
3400         int vector;
3401
3402         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3403                 free_irq(adapter->pdev->irq, adapter);
3404                 return;
3405         }
3406
3407         if (!adapter->msix_entries)
3408                 return;
3409
3410         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3411                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3412                 struct msix_entry *entry = &adapter->msix_entries[vector];
3413
3414                 /* free only the irqs that were actually requested */
3415                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3416                         continue;
3417
3418                 /* clear the affinity_mask in the IRQ descriptor */
3419                 irq_set_affinity_hint(entry->vector, NULL);
3420
3421                 free_irq(entry->vector, q_vector);
3422         }
3423
3424         free_irq(adapter->msix_entries[vector].vector, adapter);
3425 }
3426
3427 /**
3428  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3429  * @adapter: board private structure
3430  **/
3431 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3432 {
3433         switch (adapter->hw.mac.type) {
3434         case ixgbe_mac_82598EB:
3435                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3436                 break;
3437         case ixgbe_mac_82599EB:
3438         case ixgbe_mac_X540:
3439         case ixgbe_mac_X550:
3440         case ixgbe_mac_X550EM_x:
3441         case ixgbe_mac_x550em_a:
3442                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3443                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3444                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3445                 break;
3446         default:
3447                 break;
3448         }
3449         IXGBE_WRITE_FLUSH(&adapter->hw);
3450         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3451                 int vector;
3452
3453                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3454                         synchronize_irq(adapter->msix_entries[vector].vector);
3455
3456                 synchronize_irq(adapter->msix_entries[vector++].vector);
3457         } else {
3458                 synchronize_irq(adapter->pdev->irq);
3459         }
3460 }
3461
3462 /**
3463  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3464  * @adapter: board private structure
3465  *
3466  **/
3467 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3468 {
3469         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3470
3471         ixgbe_write_eitr(q_vector);
3472
3473         ixgbe_set_ivar(adapter, 0, 0, 0);
3474         ixgbe_set_ivar(adapter, 1, 0, 0);
3475
3476         e_info(hw, "Legacy interrupt IVAR setup done\n");
3477 }
3478
3479 /**
3480  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3481  * @adapter: board private structure
3482  * @ring: structure containing ring specific data
3483  *
3484  * Configure the Tx descriptor ring after a reset.
3485  **/
3486 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3487                              struct ixgbe_ring *ring)
3488 {
3489         struct ixgbe_hw *hw = &adapter->hw;
3490         u64 tdba = ring->dma;
3491         int wait_loop = 10;
3492         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3493         u8 reg_idx = ring->reg_idx;
3494
3495         /* disable queue to avoid issues while updating state */
3496         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3497         IXGBE_WRITE_FLUSH(hw);
3498
3499         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3500                         (tdba & DMA_BIT_MASK(32)));
3501         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3502         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3503                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3504         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3505         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3506         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3507
3508         /*
3509          * set WTHRESH to encourage burst writeback, it should not be set
3510          * higher than 1 when:
3511          * - ITR is 0 as it could cause false TX hangs
3512          * - ITR is set to > 100k int/sec and BQL is enabled
3513          *
3514          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3515          * to or less than the number of on chip descriptors, which is
3516          * currently 40.
3517          */
3518         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3519                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3520         else
3521                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3522
3523         /*
3524          * Setting PTHRESH to 32 both improves performance
3525          * and avoids a TX hang with DFP enabled
3526          */
3527         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3528                    32;          /* PTHRESH = 32 */
3529
3530         /* reinitialize flowdirector state */
3531         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3532                 ring->atr_sample_rate = adapter->atr_sample_rate;
3533                 ring->atr_count = 0;
3534                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3535         } else {
3536                 ring->atr_sample_rate = 0;
3537         }
3538
3539         /* initialize XPS */
3540         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3541                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3542
3543                 if (q_vector)
3544                         netif_set_xps_queue(ring->netdev,
3545                                             &q_vector->affinity_mask,
3546                                             ring->queue_index);
3547         }
3548
3549         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3550
3551         /* reinitialize tx_buffer_info */
3552         memset(ring->tx_buffer_info, 0,
3553                sizeof(struct ixgbe_tx_buffer) * ring->count);
3554
3555         /* enable queue */
3556         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3557
3558         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3559         if (hw->mac.type == ixgbe_mac_82598EB &&
3560             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3561                 return;
3562
3563         /* poll to verify queue is enabled */
3564         do {
3565                 usleep_range(1000, 2000);
3566                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3567         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3568         if (!wait_loop)
3569                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3570 }
3571
3572 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3573 {
3574         struct ixgbe_hw *hw = &adapter->hw;
3575         u32 rttdcs, mtqc;
3576         u8 tcs = adapter->hw_tcs;
3577
3578         if (hw->mac.type == ixgbe_mac_82598EB)
3579                 return;
3580
3581         /* disable the arbiter while setting MTQC */
3582         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3583         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3584         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3585
3586         /* set transmit pool layout */
3587         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3588                 mtqc = IXGBE_MTQC_VT_ENA;
3589                 if (tcs > 4)
3590                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3591                 else if (tcs > 1)
3592                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3593                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3594                          IXGBE_82599_VMDQ_4Q_MASK)
3595                         mtqc |= IXGBE_MTQC_32VF;
3596                 else
3597                         mtqc |= IXGBE_MTQC_64VF;
3598         } else {
3599                 if (tcs > 4) {
3600                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3601                 } else if (tcs > 1) {
3602                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3603                 } else {
3604                         u8 max_txq = adapter->num_tx_queues +
3605                                 adapter->num_xdp_queues;
3606                         if (max_txq > 63)
3607                                 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3608                         else
3609                                 mtqc = IXGBE_MTQC_64Q_1PB;
3610                 }
3611         }
3612
3613         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3614
3615         /* Enable Security TX Buffer IFG for multiple pb */
3616         if (tcs) {
3617                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3618                 sectx |= IXGBE_SECTX_DCB;
3619                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3620         }
3621
3622         /* re-enable the arbiter */
3623         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3624         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3625 }
3626
3627 /**
3628  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3629  * @adapter: board private structure
3630  *
3631  * Configure the Tx unit of the MAC after a reset.
3632  **/
3633 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3634 {
3635         struct ixgbe_hw *hw = &adapter->hw;
3636         u32 dmatxctl;
3637         u32 i;
3638
3639         ixgbe_setup_mtqc(adapter);
3640
3641         if (hw->mac.type != ixgbe_mac_82598EB) {
3642                 /* DMATXCTL.EN must be before Tx queues are enabled */
3643                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3644                 dmatxctl |= IXGBE_DMATXCTL_TE;
3645                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3646         }
3647
3648         /* Setup the HW Tx Head and Tail descriptor pointers */
3649         for (i = 0; i < adapter->num_tx_queues; i++)
3650                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3651         for (i = 0; i < adapter->num_xdp_queues; i++)
3652                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3653 }
3654
3655 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3656                                  struct ixgbe_ring *ring)
3657 {
3658         struct ixgbe_hw *hw = &adapter->hw;
3659         u8 reg_idx = ring->reg_idx;
3660         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3661
3662         srrctl |= IXGBE_SRRCTL_DROP_EN;
3663
3664         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3665 }
3666
3667 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3668                                   struct ixgbe_ring *ring)
3669 {
3670         struct ixgbe_hw *hw = &adapter->hw;
3671         u8 reg_idx = ring->reg_idx;
3672         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3673
3674         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3675
3676         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3677 }
3678
3679 #ifdef CONFIG_IXGBE_DCB
3680 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3681 #else
3682 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3683 #endif
3684 {
3685         int i;
3686         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3687
3688         if (adapter->ixgbe_ieee_pfc)
3689                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3690
3691         /*
3692          * We should set the drop enable bit if:
3693          *  SR-IOV is enabled
3694          *   or
3695          *  Number of Rx queues > 1 and flow control is disabled
3696          *
3697          *  This allows us to avoid head of line blocking for security
3698          *  and performance reasons.
3699          */
3700         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3701             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3702                 for (i = 0; i < adapter->num_rx_queues; i++)
3703                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3704         } else {
3705                 for (i = 0; i < adapter->num_rx_queues; i++)
3706                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3707         }
3708 }
3709
3710 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3711
3712 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3713                                    struct ixgbe_ring *rx_ring)
3714 {
3715         struct ixgbe_hw *hw = &adapter->hw;
3716         u32 srrctl;
3717         u8 reg_idx = rx_ring->reg_idx;
3718
3719         if (hw->mac.type == ixgbe_mac_82598EB) {
3720                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3721
3722                 /*
3723                  * if VMDq is not active we must program one srrctl register
3724                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3725                  */
3726                 reg_idx &= mask;
3727         }
3728
3729         /* configure header buffer length, needed for RSC */
3730         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3731
3732         /* configure the packet buffer length */
3733         if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state))
3734                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3735         else
3736                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3737
3738         /* configure descriptor type */
3739         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3740
3741         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3742 }
3743
3744 /**
3745  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3746  * @adapter: device handle
3747  *
3748  *  - 82598/82599/X540:     128
3749  *  - X550(non-SRIOV mode): 512
3750  *  - X550(SRIOV mode):     64
3751  */
3752 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3753 {
3754         if (adapter->hw.mac.type < ixgbe_mac_X550)
3755                 return 128;
3756         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3757                 return 64;
3758         else
3759                 return 512;
3760 }
3761
3762 /**
3763  * ixgbe_store_key - Write the RSS key to HW
3764  * @adapter: device handle
3765  *
3766  * Write the RSS key stored in adapter.rss_key to HW.
3767  */
3768 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3769 {
3770         struct ixgbe_hw *hw = &adapter->hw;
3771         int i;
3772
3773         for (i = 0; i < 10; i++)
3774                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3775 }
3776
3777 /**
3778  * ixgbe_init_rss_key - Initialize adapter RSS key
3779  * @adapter: device handle
3780  *
3781  * Allocates and initializes the RSS key if it is not allocated.
3782  **/
3783 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3784 {
3785         u32 *rss_key;
3786
3787         if (!adapter->rss_key) {
3788                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3789                 if (unlikely(!rss_key))
3790                         return -ENOMEM;
3791
3792                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3793                 adapter->rss_key = rss_key;
3794         }
3795
3796         return 0;
3797 }
3798
3799 /**
3800  * ixgbe_store_reta - Write the RETA table to HW
3801  * @adapter: device handle
3802  *
3803  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3804  */
3805 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3806 {
3807         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3808         struct ixgbe_hw *hw = &adapter->hw;
3809         u32 reta = 0;
3810         u32 indices_multi;
3811         u8 *indir_tbl = adapter->rss_indir_tbl;
3812
3813         /* Fill out the redirection table as follows:
3814          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3815          *    indices.
3816          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3817          *  - X550:       8 bit wide entries containing 6 bit RSS index
3818          */
3819         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3820                 indices_multi = 0x11;
3821         else
3822                 indices_multi = 0x1;
3823
3824         /* Write redirection table to HW */
3825         for (i = 0; i < reta_entries; i++) {
3826                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3827                 if ((i & 3) == 3) {
3828                         if (i < 128)
3829                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3830                         else
3831                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3832                                                 reta);
3833                         reta = 0;
3834                 }
3835         }
3836 }
3837
3838 /**
3839  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3840  * @adapter: device handle
3841  *
3842  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3843  */
3844 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3845 {
3846         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3847         struct ixgbe_hw *hw = &adapter->hw;
3848         u32 vfreta = 0;
3849
3850         /* Write redirection table to HW */
3851         for (i = 0; i < reta_entries; i++) {
3852                 u16 pool = adapter->num_rx_pools;
3853
3854                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3855                 if ((i & 3) != 3)
3856                         continue;
3857
3858                 while (pool--)
3859                         IXGBE_WRITE_REG(hw,
3860                                         IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)),
3861                                         vfreta);
3862                 vfreta = 0;
3863         }
3864 }
3865
3866 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3867 {
3868         u32 i, j;
3869         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3870         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3871
3872         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3873          * make full use of any rings they may have.  We will use the
3874          * PSRTYPE register to control how many rings we use within the PF.
3875          */
3876         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3877                 rss_i = 4;
3878
3879         /* Fill out hash function seeds */
3880         ixgbe_store_key(adapter);
3881
3882         /* Fill out redirection table */
3883         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3884
3885         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3886                 if (j == rss_i)
3887                         j = 0;
3888
3889                 adapter->rss_indir_tbl[i] = j;
3890         }
3891
3892         ixgbe_store_reta(adapter);
3893 }
3894
3895 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3896 {
3897         struct ixgbe_hw *hw = &adapter->hw;
3898         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3899         int i, j;
3900
3901         /* Fill out hash function seeds */
3902         for (i = 0; i < 10; i++) {
3903                 u16 pool = adapter->num_rx_pools;
3904
3905                 while (pool--)
3906                         IXGBE_WRITE_REG(hw,
3907                                         IXGBE_PFVFRSSRK(i, VMDQ_P(pool)),
3908                                         *(adapter->rss_key + i));
3909         }
3910
3911         /* Fill out the redirection table */
3912         for (i = 0, j = 0; i < 64; i++, j++) {
3913                 if (j == rss_i)
3914                         j = 0;
3915
3916                 adapter->rss_indir_tbl[i] = j;
3917         }
3918
3919         ixgbe_store_vfreta(adapter);
3920 }
3921
3922 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3923 {
3924         struct ixgbe_hw *hw = &adapter->hw;
3925         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3926         u32 rxcsum;
3927
3928         /* Disable indicating checksum in descriptor, enables RSS hash */
3929         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3930         rxcsum |= IXGBE_RXCSUM_PCSD;
3931         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3932
3933         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3934                 if (adapter->ring_feature[RING_F_RSS].mask)
3935                         mrqc = IXGBE_MRQC_RSSEN;
3936         } else {
3937                 u8 tcs = adapter->hw_tcs;
3938
3939                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3940                         if (tcs > 4)
3941                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3942                         else if (tcs > 1)
3943                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3944                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3945                                  IXGBE_82599_VMDQ_4Q_MASK)
3946                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3947                         else
3948                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3949
3950                         /* Enable L3/L4 for Tx Switched packets only for X550,
3951                          * older devices do not support this feature
3952                          */
3953                         if (hw->mac.type >= ixgbe_mac_X550)
3954                                 mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3955                 } else {
3956                         if (tcs > 4)
3957                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3958                         else if (tcs > 1)
3959                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3960                         else
3961                                 mrqc = IXGBE_MRQC_RSSEN;
3962                 }
3963         }
3964
3965         /* Perform hash on these packet types */
3966         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3967                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3968                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3969                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3970
3971         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3972                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3973         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3974                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3975
3976         if ((hw->mac.type >= ixgbe_mac_X550) &&
3977             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3978                 u16 pool = adapter->num_rx_pools;
3979
3980                 /* Enable VF RSS mode */
3981                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3982                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3983
3984                 /* Setup RSS through the VF registers */
3985                 ixgbe_setup_vfreta(adapter);
3986                 vfmrqc = IXGBE_MRQC_RSSEN;
3987                 vfmrqc |= rss_field;
3988
3989                 while (pool--)
3990                         IXGBE_WRITE_REG(hw,
3991                                         IXGBE_PFVFMRQC(VMDQ_P(pool)),
3992                                         vfmrqc);
3993         } else {
3994                 ixgbe_setup_reta(adapter);
3995                 mrqc |= rss_field;
3996                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3997         }
3998 }
3999
4000 /**
4001  * ixgbe_configure_rscctl - enable RSC for the indicated ring
4002  * @adapter: address of board private structure
4003  * @ring: structure containing ring specific data
4004  **/
4005 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
4006                                    struct ixgbe_ring *ring)
4007 {
4008         struct ixgbe_hw *hw = &adapter->hw;
4009         u32 rscctrl;
4010         u8 reg_idx = ring->reg_idx;
4011
4012         if (!ring_is_rsc_enabled(ring))
4013                 return;
4014
4015         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
4016         rscctrl |= IXGBE_RSCCTL_RSCEN;
4017         /*
4018          * we must limit the number of descriptors so that the
4019          * total size of max desc * buf_len is not greater
4020          * than 65536
4021          */
4022         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
4023         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
4024 }
4025
4026 #define IXGBE_MAX_RX_DESC_POLL 10
4027 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4028                                        struct ixgbe_ring *ring)
4029 {
4030         struct ixgbe_hw *hw = &adapter->hw;
4031         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4032         u32 rxdctl;
4033         u8 reg_idx = ring->reg_idx;
4034
4035         if (ixgbe_removed(hw->hw_addr))
4036                 return;
4037         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4038         if (hw->mac.type == ixgbe_mac_82598EB &&
4039             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4040                 return;
4041
4042         do {
4043                 usleep_range(1000, 2000);
4044                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4045         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4046
4047         if (!wait_loop) {
4048                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4049                       "the polling period\n", reg_idx);
4050         }
4051 }
4052
4053 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4054                              struct ixgbe_ring *ring)
4055 {
4056         struct ixgbe_hw *hw = &adapter->hw;
4057         union ixgbe_adv_rx_desc *rx_desc;
4058         u64 rdba = ring->dma;
4059         u32 rxdctl;
4060         u8 reg_idx = ring->reg_idx;
4061
4062         /* disable queue to avoid use of these values while updating state */
4063         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4064         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4065
4066         /* write value back with RXDCTL.ENABLE bit cleared */
4067         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4068         IXGBE_WRITE_FLUSH(hw);
4069
4070         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4071         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4072         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4073                         ring->count * sizeof(union ixgbe_adv_rx_desc));
4074         /* Force flushing of IXGBE_RDLEN to prevent MDD */
4075         IXGBE_WRITE_FLUSH(hw);
4076
4077         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4078         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4079         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4080
4081         ixgbe_configure_srrctl(adapter, ring);
4082         ixgbe_configure_rscctl(adapter, ring);
4083
4084         if (hw->mac.type == ixgbe_mac_82598EB) {
4085                 /*
4086                  * enable cache line friendly hardware writes:
4087                  * PTHRESH=32 descriptors (half the internal cache),
4088                  * this also removes ugly rx_no_buffer_count increment
4089                  * HTHRESH=4 descriptors (to minimize latency on fetch)
4090                  * WTHRESH=8 burst writeback up to two cache lines
4091                  */
4092                 rxdctl &= ~0x3FFFFF;
4093                 rxdctl |=  0x080420;
4094 #if (PAGE_SIZE < 8192)
4095         /* RXDCTL.RLPML does not work on 82599 */
4096         } else if (hw->mac.type != ixgbe_mac_82599EB) {
4097                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4098                             IXGBE_RXDCTL_RLPML_EN);
4099
4100                 /* Limit the maximum frame size so we don't overrun the skb.
4101                  * This can happen in SRIOV mode when the MTU of the VF is
4102                  * higher than the MTU of the PF.
4103                  */
4104                 if (ring_uses_build_skb(ring) &&
4105                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4106                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4107                                   IXGBE_RXDCTL_RLPML_EN;
4108 #endif
4109         }
4110
4111         /* initialize rx_buffer_info */
4112         memset(ring->rx_buffer_info, 0,
4113                sizeof(struct ixgbe_rx_buffer) * ring->count);
4114
4115         /* initialize Rx descriptor 0 */
4116         rx_desc = IXGBE_RX_DESC(ring, 0);
4117         rx_desc->wb.upper.length = 0;
4118
4119         /* enable receive descriptor ring */
4120         rxdctl |= IXGBE_RXDCTL_ENABLE;
4121         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4122
4123         ixgbe_rx_desc_queue_enable(adapter, ring);
4124         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4125 }
4126
4127 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4128 {
4129         struct ixgbe_hw *hw = &adapter->hw;
4130         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4131         u16 pool = adapter->num_rx_pools;
4132
4133         /* PSRTYPE must be initialized in non 82598 adapters */
4134         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4135                       IXGBE_PSRTYPE_UDPHDR |
4136                       IXGBE_PSRTYPE_IPV4HDR |
4137                       IXGBE_PSRTYPE_L2HDR |
4138                       IXGBE_PSRTYPE_IPV6HDR;
4139
4140         if (hw->mac.type == ixgbe_mac_82598EB)
4141                 return;
4142
4143         if (rss_i > 3)
4144                 psrtype |= 2u << 29;
4145         else if (rss_i > 1)
4146                 psrtype |= 1u << 29;
4147
4148         while (pool--)
4149                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4150 }
4151
4152 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4153 {
4154         struct ixgbe_hw *hw = &adapter->hw;
4155         u16 pool = adapter->num_rx_pools;
4156         u32 reg_offset, vf_shift, vmolr;
4157         u32 gcr_ext, vmdctl;
4158         int i;
4159
4160         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4161                 return;
4162
4163         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4164         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4165         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4166         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4167         vmdctl |= IXGBE_VT_CTL_REPLEN;
4168         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4169
4170         /* accept untagged packets until a vlan tag is
4171          * specifically set for the VMDQ queue/pool
4172          */
4173         vmolr = IXGBE_VMOLR_AUPE;
4174         while (pool--)
4175                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(pool)), vmolr);
4176
4177         vf_shift = VMDQ_P(0) % 32;
4178         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4179
4180         /* Enable only the PF's pool for Tx/Rx */
4181         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4182         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4183         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4184         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4185         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4186                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4187
4188         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4189         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4190
4191         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4192         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4193
4194         /*
4195          * Set up VF register offsets for selected VT Mode,
4196          * i.e. 32 or 64 VFs for SR-IOV
4197          */
4198         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4199         case IXGBE_82599_VMDQ_8Q_MASK:
4200                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4201                 break;
4202         case IXGBE_82599_VMDQ_4Q_MASK:
4203                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4204                 break;
4205         default:
4206                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4207                 break;
4208         }
4209
4210         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4211
4212         for (i = 0; i < adapter->num_vfs; i++) {
4213                 /* configure spoof checking */
4214                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4215                                           adapter->vfinfo[i].spoofchk_enabled);
4216
4217                 /* Enable/Disable RSS query feature  */
4218                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4219                                           adapter->vfinfo[i].rss_query_enabled);
4220         }
4221 }
4222
4223 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4224 {
4225         struct ixgbe_hw *hw = &adapter->hw;
4226         struct net_device *netdev = adapter->netdev;
4227         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4228         struct ixgbe_ring *rx_ring;
4229         int i;
4230         u32 mhadd, hlreg0;
4231
4232 #ifdef IXGBE_FCOE
4233         /* adjust max frame to be able to do baby jumbo for FCoE */
4234         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4235             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4236                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4237
4238 #endif /* IXGBE_FCOE */
4239
4240         /* adjust max frame to be at least the size of a standard frame */
4241         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4242                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4243
4244         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4245         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4246                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4247                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4248
4249                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4250         }
4251
4252         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4253         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4254         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4255         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4256
4257         /*
4258          * Setup the HW Rx Head and Tail Descriptor Pointers and
4259          * the Base and Length of the Rx Descriptor Ring
4260          */
4261         for (i = 0; i < adapter->num_rx_queues; i++) {
4262                 rx_ring = adapter->rx_ring[i];
4263
4264                 clear_ring_rsc_enabled(rx_ring);
4265                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4266                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4267
4268                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4269                         set_ring_rsc_enabled(rx_ring);
4270
4271                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4272                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4273
4274                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4275                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4276                         continue;
4277
4278                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4279
4280 #if (PAGE_SIZE < 8192)
4281                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4282                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4283
4284                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4285                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4286                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4287 #endif
4288         }
4289 }
4290
4291 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4292 {
4293         struct ixgbe_hw *hw = &adapter->hw;
4294         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4295
4296         switch (hw->mac.type) {
4297         case ixgbe_mac_82598EB:
4298                 /*
4299                  * For VMDq support of different descriptor types or
4300                  * buffer sizes through the use of multiple SRRCTL
4301                  * registers, RDRXCTL.MVMEN must be set to 1
4302                  *
4303                  * also, the manual doesn't mention it clearly but DCA hints
4304                  * will only use queue 0's tags unless this bit is set.  Side
4305                  * effects of setting this bit are only that SRRCTL must be
4306                  * fully programmed [0..15]
4307                  */
4308                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4309                 break;
4310         case ixgbe_mac_X550:
4311         case ixgbe_mac_X550EM_x:
4312         case ixgbe_mac_x550em_a:
4313                 if (adapter->num_vfs)
4314                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4315                 /* fall through */
4316         case ixgbe_mac_82599EB:
4317         case ixgbe_mac_X540:
4318                 /* Disable RSC for ACK packets */
4319                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4320                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4321                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4322                 /* hardware requires some bits to be set by default */
4323                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4324                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4325                 break;
4326         default:
4327                 /* We should do nothing since we don't know this hardware */
4328                 return;
4329         }
4330
4331         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4332 }
4333
4334 /**
4335  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4336  * @adapter: board private structure
4337  *
4338  * Configure the Rx unit of the MAC after a reset.
4339  **/
4340 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4341 {
4342         struct ixgbe_hw *hw = &adapter->hw;
4343         int i;
4344         u32 rxctrl, rfctl;
4345
4346         /* disable receives while setting up the descriptors */
4347         hw->mac.ops.disable_rx(hw);
4348
4349         ixgbe_setup_psrtype(adapter);
4350         ixgbe_setup_rdrxctl(adapter);
4351
4352         /* RSC Setup */
4353         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4354         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4355         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4356                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4357
4358         /* disable NFS filtering */
4359         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4360         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4361
4362         /* Program registers for the distribution of queues */
4363         ixgbe_setup_mrqc(adapter);
4364
4365         /* set_rx_buffer_len must be called before ring initialization */
4366         ixgbe_set_rx_buffer_len(adapter);
4367
4368         /*
4369          * Setup the HW Rx Head and Tail Descriptor Pointers and
4370          * the Base and Length of the Rx Descriptor Ring
4371          */
4372         for (i = 0; i < adapter->num_rx_queues; i++)
4373                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4374
4375         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4376         /* disable drop enable for 82598 parts */
4377         if (hw->mac.type == ixgbe_mac_82598EB)
4378                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4379
4380         /* enable all receives */
4381         rxctrl |= IXGBE_RXCTRL_RXEN;
4382         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4383 }
4384
4385 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4386                                  __be16 proto, u16 vid)
4387 {
4388         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4389         struct ixgbe_hw *hw = &adapter->hw;
4390
4391         /* add VID to filter table */
4392         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4393                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4394
4395         set_bit(vid, adapter->active_vlans);
4396
4397         return 0;
4398 }
4399
4400 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4401 {
4402         u32 vlvf;
4403         int idx;
4404
4405         /* short cut the special case */
4406         if (vlan == 0)
4407                 return 0;
4408
4409         /* Search for the vlan id in the VLVF entries */
4410         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4411                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4412                 if ((vlvf & VLAN_VID_MASK) == vlan)
4413                         break;
4414         }
4415
4416         return idx;
4417 }
4418
4419 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4420 {
4421         struct ixgbe_hw *hw = &adapter->hw;
4422         u32 bits, word;
4423         int idx;
4424
4425         idx = ixgbe_find_vlvf_entry(hw, vid);
4426         if (!idx)
4427                 return;
4428
4429         /* See if any other pools are set for this VLAN filter
4430          * entry other than the PF.
4431          */
4432         word = idx * 2 + (VMDQ_P(0) / 32);
4433         bits = ~BIT(VMDQ_P(0) % 32);
4434         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4435
4436         /* Disable the filter so this falls into the default pool. */
4437         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4438                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4439                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4440                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4441         }
4442 }
4443
4444 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4445                                   __be16 proto, u16 vid)
4446 {
4447         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4448         struct ixgbe_hw *hw = &adapter->hw;
4449
4450         /* remove VID from filter table */
4451         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4452                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4453
4454         clear_bit(vid, adapter->active_vlans);
4455
4456         return 0;
4457 }
4458
4459 /**
4460  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4461  * @adapter: driver data
4462  */
4463 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4464 {
4465         struct ixgbe_hw *hw = &adapter->hw;
4466         u32 vlnctrl;
4467         int i, j;
4468
4469         switch (hw->mac.type) {
4470         case ixgbe_mac_82598EB:
4471                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4472                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4473                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4474                 break;
4475         case ixgbe_mac_82599EB:
4476         case ixgbe_mac_X540:
4477         case ixgbe_mac_X550:
4478         case ixgbe_mac_X550EM_x:
4479         case ixgbe_mac_x550em_a:
4480                 for (i = 0; i < adapter->num_rx_queues; i++) {
4481                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4482
4483                         if (!netif_is_ixgbe(ring->netdev))
4484                                 continue;
4485
4486                         j = ring->reg_idx;
4487                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4488                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4489                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4490                 }
4491                 break;
4492         default:
4493                 break;
4494         }
4495 }
4496
4497 /**
4498  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4499  * @adapter: driver data
4500  */
4501 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4502 {
4503         struct ixgbe_hw *hw = &adapter->hw;
4504         u32 vlnctrl;
4505         int i, j;
4506
4507         switch (hw->mac.type) {
4508         case ixgbe_mac_82598EB:
4509                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4510                 vlnctrl |= IXGBE_VLNCTRL_VME;
4511                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4512                 break;
4513         case ixgbe_mac_82599EB:
4514         case ixgbe_mac_X540:
4515         case ixgbe_mac_X550:
4516         case ixgbe_mac_X550EM_x:
4517         case ixgbe_mac_x550em_a:
4518                 for (i = 0; i < adapter->num_rx_queues; i++) {
4519                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4520
4521                         if (!netif_is_ixgbe(ring->netdev))
4522                                 continue;
4523
4524                         j = ring->reg_idx;
4525                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4526                         vlnctrl |= IXGBE_RXDCTL_VME;
4527                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4528                 }
4529                 break;
4530         default:
4531                 break;
4532         }
4533 }
4534
4535 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4536 {
4537         struct ixgbe_hw *hw = &adapter->hw;
4538         u32 vlnctrl, i;
4539
4540         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4541
4542         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4543         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4544                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4545                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4546         } else {
4547                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4548                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4549                 return;
4550         }
4551
4552         /* Nothing to do for 82598 */
4553         if (hw->mac.type == ixgbe_mac_82598EB)
4554                 return;
4555
4556         /* We are already in VLAN promisc, nothing to do */
4557         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4558                 return;
4559
4560         /* Set flag so we don't redo unnecessary work */
4561         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4562
4563         /* Add PF to all active pools */
4564         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4565                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4566                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4567
4568                 vlvfb |= BIT(VMDQ_P(0) % 32);
4569                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4570         }
4571
4572         /* Set all bits in the VLAN filter table array */
4573         for (i = hw->mac.vft_size; i--;)
4574                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4575 }
4576
4577 #define VFTA_BLOCK_SIZE 8
4578 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4579 {
4580         struct ixgbe_hw *hw = &adapter->hw;
4581         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4582         u32 vid_start = vfta_offset * 32;
4583         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4584         u32 i, vid, word, bits;
4585
4586         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4587                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4588
4589                 /* pull VLAN ID from VLVF */
4590                 vid = vlvf & VLAN_VID_MASK;
4591
4592                 /* only concern outselves with a certain range */
4593                 if (vid < vid_start || vid >= vid_end)
4594                         continue;
4595
4596                 if (vlvf) {
4597                         /* record VLAN ID in VFTA */
4598                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4599
4600                         /* if PF is part of this then continue */
4601                         if (test_bit(vid, adapter->active_vlans))
4602                                 continue;
4603                 }
4604
4605                 /* remove PF from the pool */
4606                 word = i * 2 + VMDQ_P(0) / 32;
4607                 bits = ~BIT(VMDQ_P(0) % 32);
4608                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4609                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4610         }
4611
4612         /* extract values from active_vlans and write back to VFTA */
4613         for (i = VFTA_BLOCK_SIZE; i--;) {
4614                 vid = (vfta_offset + i) * 32;
4615                 word = vid / BITS_PER_LONG;
4616                 bits = vid % BITS_PER_LONG;
4617
4618                 vfta[i] |= adapter->active_vlans[word] >> bits;
4619
4620                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4621         }
4622 }
4623
4624 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4625 {
4626         struct ixgbe_hw *hw = &adapter->hw;
4627         u32 vlnctrl, i;
4628
4629         /* Set VLAN filtering to enabled */
4630         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4631         vlnctrl |= IXGBE_VLNCTRL_VFE;
4632         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4633
4634         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4635             hw->mac.type == ixgbe_mac_82598EB)
4636                 return;
4637
4638         /* We are not in VLAN promisc, nothing to do */
4639         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4640                 return;
4641
4642         /* Set flag so we don't redo unnecessary work */
4643         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4644
4645         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4646                 ixgbe_scrub_vfta(adapter, i);
4647 }
4648
4649 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4650 {
4651         u16 vid = 1;
4652
4653         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4654
4655         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4656                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4657 }
4658
4659 /**
4660  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4661  * @netdev: network interface device structure
4662  *
4663  * Writes multicast address list to the MTA hash table.
4664  * Returns: -ENOMEM on failure
4665  *                0 on no addresses written
4666  *                X on writing X addresses to MTA
4667  **/
4668 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4669 {
4670         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4671         struct ixgbe_hw *hw = &adapter->hw;
4672
4673         if (!netif_running(netdev))
4674                 return 0;
4675
4676         if (hw->mac.ops.update_mc_addr_list)
4677                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4678         else
4679                 return -ENOMEM;
4680
4681 #ifdef CONFIG_PCI_IOV
4682         ixgbe_restore_vf_multicasts(adapter);
4683 #endif
4684
4685         return netdev_mc_count(netdev);
4686 }
4687
4688 #ifdef CONFIG_PCI_IOV
4689 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4690 {
4691         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4692         struct ixgbe_hw *hw = &adapter->hw;
4693         int i;
4694
4695         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4696                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4697
4698                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4699                         hw->mac.ops.set_rar(hw, i,
4700                                             mac_table->addr,
4701                                             mac_table->pool,
4702                                             IXGBE_RAH_AV);
4703                 else
4704                         hw->mac.ops.clear_rar(hw, i);
4705         }
4706 }
4707
4708 #endif
4709 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4710 {
4711         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4712         struct ixgbe_hw *hw = &adapter->hw;
4713         int i;
4714
4715         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4716                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4717                         continue;
4718
4719                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4720
4721                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4722                         hw->mac.ops.set_rar(hw, i,
4723                                             mac_table->addr,
4724                                             mac_table->pool,
4725                                             IXGBE_RAH_AV);
4726                 else
4727                         hw->mac.ops.clear_rar(hw, i);
4728         }
4729 }
4730
4731 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4732 {
4733         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4734         struct ixgbe_hw *hw = &adapter->hw;
4735         int i;
4736
4737         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4738                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4739                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4740         }
4741
4742         ixgbe_sync_mac_table(adapter);
4743 }
4744
4745 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4746 {
4747         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4748         struct ixgbe_hw *hw = &adapter->hw;
4749         int i, count = 0;
4750
4751         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4752                 /* do not count default RAR as available */
4753                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4754                         continue;
4755
4756                 /* only count unused and addresses that belong to us */
4757                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4758                         if (mac_table->pool != pool)
4759                                 continue;
4760                 }
4761
4762                 count++;
4763         }
4764
4765         return count;
4766 }
4767
4768 /* this function destroys the first RAR entry */
4769 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4770 {
4771         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4772         struct ixgbe_hw *hw = &adapter->hw;
4773
4774         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4775         mac_table->pool = VMDQ_P(0);
4776
4777         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4778
4779         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4780                             IXGBE_RAH_AV);
4781 }
4782
4783 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4784                          const u8 *addr, u16 pool)
4785 {
4786         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4787         struct ixgbe_hw *hw = &adapter->hw;
4788         int i;
4789
4790         if (is_zero_ether_addr(addr))
4791                 return -EINVAL;
4792
4793         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4794                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4795                         continue;
4796
4797                 ether_addr_copy(mac_table->addr, addr);
4798                 mac_table->pool = pool;
4799
4800                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4801                                     IXGBE_MAC_STATE_IN_USE;
4802
4803                 ixgbe_sync_mac_table(adapter);
4804
4805                 return i;
4806         }
4807
4808         return -ENOMEM;
4809 }
4810
4811 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4812                          const u8 *addr, u16 pool)
4813 {
4814         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4815         struct ixgbe_hw *hw = &adapter->hw;
4816         int i;
4817
4818         if (is_zero_ether_addr(addr))
4819                 return -EINVAL;
4820
4821         /* search table for addr, if found clear IN_USE flag and sync */
4822         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4823                 /* we can only delete an entry if it is in use */
4824                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4825                         continue;
4826                 /* we only care about entries that belong to the given pool */
4827                 if (mac_table->pool != pool)
4828                         continue;
4829                 /* we only care about a specific MAC address */
4830                 if (!ether_addr_equal(addr, mac_table->addr))
4831                         continue;
4832
4833                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4834                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4835
4836                 ixgbe_sync_mac_table(adapter);
4837
4838                 return 0;
4839         }
4840
4841         return -ENOMEM;
4842 }
4843
4844 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4845 {
4846         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4847         int ret;
4848
4849         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4850
4851         return min_t(int, ret, 0);
4852 }
4853
4854 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4855 {
4856         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4857
4858         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4859
4860         return 0;
4861 }
4862
4863 /**
4864  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4865  * @netdev: network interface device structure
4866  *
4867  * The set_rx_method entry point is called whenever the unicast/multicast
4868  * address list or the network interface flags are updated.  This routine is
4869  * responsible for configuring the hardware for proper unicast, multicast and
4870  * promiscuous mode.
4871  **/
4872 void ixgbe_set_rx_mode(struct net_device *netdev)
4873 {
4874         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4875         struct ixgbe_hw *hw = &adapter->hw;
4876         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4877         netdev_features_t features = netdev->features;
4878         int count;
4879
4880         /* Check for Promiscuous and All Multicast modes */
4881         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4882
4883         /* set all bits that we expect to always be set */
4884         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4885         fctrl |= IXGBE_FCTRL_BAM;
4886         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4887         fctrl |= IXGBE_FCTRL_PMCF;
4888
4889         /* clear the bits we are changing the status of */
4890         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4891         if (netdev->flags & IFF_PROMISC) {
4892                 hw->addr_ctrl.user_set_promisc = true;
4893                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4894                 vmolr |= IXGBE_VMOLR_MPE;
4895                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4896         } else {
4897                 if (netdev->flags & IFF_ALLMULTI) {
4898                         fctrl |= IXGBE_FCTRL_MPE;
4899                         vmolr |= IXGBE_VMOLR_MPE;
4900                 }
4901                 hw->addr_ctrl.user_set_promisc = false;
4902         }
4903
4904         /*
4905          * Write addresses to available RAR registers, if there is not
4906          * sufficient space to store all the addresses then enable
4907          * unicast promiscuous mode
4908          */
4909         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4910                 fctrl |= IXGBE_FCTRL_UPE;
4911                 vmolr |= IXGBE_VMOLR_ROPE;
4912         }
4913
4914         /* Write addresses to the MTA, if the attempt fails
4915          * then we should just turn on promiscuous mode so
4916          * that we can at least receive multicast traffic
4917          */
4918         count = ixgbe_write_mc_addr_list(netdev);
4919         if (count < 0) {
4920                 fctrl |= IXGBE_FCTRL_MPE;
4921                 vmolr |= IXGBE_VMOLR_MPE;
4922         } else if (count) {
4923                 vmolr |= IXGBE_VMOLR_ROMPE;
4924         }
4925
4926         if (hw->mac.type != ixgbe_mac_82598EB) {
4927                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4928                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4929                            IXGBE_VMOLR_ROPE);
4930                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4931         }
4932
4933         /* This is useful for sniffing bad packets. */
4934         if (features & NETIF_F_RXALL) {
4935                 /* UPE and MPE will be handled by normal PROMISC logic
4936                  * in e1000e_set_rx_mode */
4937                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4938                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4939                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4940
4941                 fctrl &= ~(IXGBE_FCTRL_DPF);
4942                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4943         }
4944
4945         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4946
4947         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4948                 ixgbe_vlan_strip_enable(adapter);
4949         else
4950                 ixgbe_vlan_strip_disable(adapter);
4951
4952         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4953                 ixgbe_vlan_promisc_disable(adapter);
4954         else
4955                 ixgbe_vlan_promisc_enable(adapter);
4956 }
4957
4958 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4959 {
4960         int q_idx;
4961
4962         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4963                 napi_enable(&adapter->q_vector[q_idx]->napi);
4964 }
4965
4966 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4967 {
4968         int q_idx;
4969
4970         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4971                 napi_disable(&adapter->q_vector[q_idx]->napi);
4972 }
4973
4974 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
4975 {
4976         struct ixgbe_hw *hw = &adapter->hw;
4977         u32 vxlanctrl;
4978
4979         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
4980                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
4981                 return;
4982
4983         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;
4984         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
4985
4986         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
4987                 adapter->vxlan_port = 0;
4988
4989         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
4990                 adapter->geneve_port = 0;
4991 }
4992
4993 #ifdef CONFIG_IXGBE_DCB
4994 /**
4995  * ixgbe_configure_dcb - Configure DCB hardware
4996  * @adapter: ixgbe adapter struct
4997  *
4998  * This is called by the driver on open to configure the DCB hardware.
4999  * This is also called by the gennetlink interface when reconfiguring
5000  * the DCB state.
5001  */
5002 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
5003 {
5004         struct ixgbe_hw *hw = &adapter->hw;
5005         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
5006
5007         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
5008                 if (hw->mac.type == ixgbe_mac_82598EB)
5009                         netif_set_gso_max_size(adapter->netdev, 65536);
5010                 return;
5011         }
5012
5013         if (hw->mac.type == ixgbe_mac_82598EB)
5014                 netif_set_gso_max_size(adapter->netdev, 32768);
5015
5016 #ifdef IXGBE_FCOE
5017         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
5018                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
5019 #endif
5020
5021         /* reconfigure the hardware */
5022         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
5023                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5024                                                 DCB_TX_CONFIG);
5025                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5026                                                 DCB_RX_CONFIG);
5027                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5028         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5029                 ixgbe_dcb_hw_ets(&adapter->hw,
5030                                  adapter->ixgbe_ieee_ets,
5031                                  max_frame);
5032                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5033                                         adapter->ixgbe_ieee_pfc->pfc_en,
5034                                         adapter->ixgbe_ieee_ets->prio_tc);
5035         }
5036
5037         /* Enable RSS Hash per TC */
5038         if (hw->mac.type != ixgbe_mac_82598EB) {
5039                 u32 msb = 0;
5040                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5041
5042                 while (rss_i) {
5043                         msb++;
5044                         rss_i >>= 1;
5045                 }
5046
5047                 /* write msb to all 8 TCs in one write */
5048                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5049         }
5050 }
5051 #endif
5052
5053 /* Additional bittime to account for IXGBE framing */
5054 #define IXGBE_ETH_FRAMING 20
5055
5056 /**
5057  * ixgbe_hpbthresh - calculate high water mark for flow control
5058  *
5059  * @adapter: board private structure to calculate for
5060  * @pb: packet buffer to calculate
5061  */
5062 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5063 {
5064         struct ixgbe_hw *hw = &adapter->hw;
5065         struct net_device *dev = adapter->netdev;
5066         int link, tc, kb, marker;
5067         u32 dv_id, rx_pba;
5068
5069         /* Calculate max LAN frame size */
5070         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5071
5072 #ifdef IXGBE_FCOE
5073         /* FCoE traffic class uses FCOE jumbo frames */
5074         if ((dev->features & NETIF_F_FCOE_MTU) &&
5075             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5076             (pb == ixgbe_fcoe_get_tc(adapter)))
5077                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5078 #endif
5079
5080         /* Calculate delay value for device */
5081         switch (hw->mac.type) {
5082         case ixgbe_mac_X540:
5083         case ixgbe_mac_X550:
5084         case ixgbe_mac_X550EM_x:
5085         case ixgbe_mac_x550em_a:
5086                 dv_id = IXGBE_DV_X540(link, tc);
5087                 break;
5088         default:
5089                 dv_id = IXGBE_DV(link, tc);
5090                 break;
5091         }
5092
5093         /* Loopback switch introduces additional latency */
5094         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5095                 dv_id += IXGBE_B2BT(tc);
5096
5097         /* Delay value is calculated in bit times convert to KB */
5098         kb = IXGBE_BT2KB(dv_id);
5099         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5100
5101         marker = rx_pba - kb;
5102
5103         /* It is possible that the packet buffer is not large enough
5104          * to provide required headroom. In this case throw an error
5105          * to user and a do the best we can.
5106          */
5107         if (marker < 0) {
5108                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5109                             "headroom to support flow control."
5110                             "Decrease MTU or number of traffic classes\n", pb);
5111                 marker = tc + 1;
5112         }
5113
5114         return marker;
5115 }
5116
5117 /**
5118  * ixgbe_lpbthresh - calculate low water mark for for flow control
5119  *
5120  * @adapter: board private structure to calculate for
5121  * @pb: packet buffer to calculate
5122  */
5123 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5124 {
5125         struct ixgbe_hw *hw = &adapter->hw;
5126         struct net_device *dev = adapter->netdev;
5127         int tc;
5128         u32 dv_id;
5129
5130         /* Calculate max LAN frame size */
5131         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5132
5133 #ifdef IXGBE_FCOE
5134         /* FCoE traffic class uses FCOE jumbo frames */
5135         if ((dev->features & NETIF_F_FCOE_MTU) &&
5136             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5137             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5138                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5139 #endif
5140
5141         /* Calculate delay value for device */
5142         switch (hw->mac.type) {
5143         case ixgbe_mac_X540:
5144         case ixgbe_mac_X550:
5145         case ixgbe_mac_X550EM_x:
5146         case ixgbe_mac_x550em_a:
5147                 dv_id = IXGBE_LOW_DV_X540(tc);
5148                 break;
5149         default:
5150                 dv_id = IXGBE_LOW_DV(tc);
5151                 break;
5152         }
5153
5154         /* Delay value is calculated in bit times convert to KB */
5155         return IXGBE_BT2KB(dv_id);
5156 }
5157
5158 /*
5159  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5160  */
5161 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5162 {
5163         struct ixgbe_hw *hw = &adapter->hw;
5164         int num_tc = adapter->hw_tcs;
5165         int i;
5166
5167         if (!num_tc)
5168                 num_tc = 1;
5169
5170         for (i = 0; i < num_tc; i++) {
5171                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5172                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5173
5174                 /* Low water marks must not be larger than high water marks */
5175                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5176                         hw->fc.low_water[i] = 0;
5177         }
5178
5179         for (; i < MAX_TRAFFIC_CLASS; i++)
5180                 hw->fc.high_water[i] = 0;
5181 }
5182
5183 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5184 {
5185         struct ixgbe_hw *hw = &adapter->hw;
5186         int hdrm;
5187         u8 tc = adapter->hw_tcs;
5188
5189         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5190             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5191                 hdrm = 32 << adapter->fdir_pballoc;
5192         else
5193                 hdrm = 0;
5194
5195         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5196         ixgbe_pbthresh_setup(adapter);
5197 }
5198
5199 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5200 {
5201         struct ixgbe_hw *hw = &adapter->hw;
5202         struct hlist_node *node2;
5203         struct ixgbe_fdir_filter *filter;
5204         u8 queue;
5205
5206         spin_lock(&adapter->fdir_perfect_lock);
5207
5208         if (!hlist_empty(&adapter->fdir_filter_list))
5209                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5210
5211         hlist_for_each_entry_safe(filter, node2,
5212                                   &adapter->fdir_filter_list, fdir_node) {
5213                 if (filter->action == IXGBE_FDIR_DROP_QUEUE) {
5214                         queue = IXGBE_FDIR_DROP_QUEUE;
5215                 } else {
5216                         u32 ring = ethtool_get_flow_spec_ring(filter->action);
5217                         u8 vf = ethtool_get_flow_spec_ring_vf(filter->action);
5218
5219                         if (!vf && (ring >= adapter->num_rx_queues)) {
5220                                 e_err(drv, "FDIR restore failed without VF, ring: %u\n",
5221                                       ring);
5222                                 continue;
5223                         } else if (vf &&
5224                                    ((vf > adapter->num_vfs) ||
5225                                      ring >= adapter->num_rx_queues_per_pool)) {
5226                                 e_err(drv, "FDIR restore failed with VF, vf: %hhu, ring: %u\n",
5227                                       vf, ring);
5228                                 continue;
5229                         }
5230
5231                         /* Map the ring onto the absolute queue index */
5232                         if (!vf)
5233                                 queue = adapter->rx_ring[ring]->reg_idx;
5234                         else
5235                                 queue = ((vf - 1) *
5236                                         adapter->num_rx_queues_per_pool) + ring;
5237                 }
5238
5239                 ixgbe_fdir_write_perfect_filter_82599(hw,
5240                                 &filter->filter, filter->sw_idx, queue);
5241         }
5242
5243         spin_unlock(&adapter->fdir_perfect_lock);
5244 }
5245
5246 /**
5247  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5248  * @rx_ring: ring to free buffers from
5249  **/
5250 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5251 {
5252         u16 i = rx_ring->next_to_clean;
5253         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5254
5255         /* Free all the Rx ring sk_buffs */
5256         while (i != rx_ring->next_to_alloc) {
5257                 if (rx_buffer->skb) {
5258                         struct sk_buff *skb = rx_buffer->skb;
5259                         if (IXGBE_CB(skb)->page_released)
5260                                 dma_unmap_page_attrs(rx_ring->dev,
5261                                                      IXGBE_CB(skb)->dma,
5262                                                      ixgbe_rx_pg_size(rx_ring),
5263                                                      DMA_FROM_DEVICE,
5264                                                      IXGBE_RX_DMA_ATTR);
5265                         dev_kfree_skb(skb);
5266                 }
5267
5268                 /* Invalidate cache lines that may have been written to by
5269                  * device so that we avoid corrupting memory.
5270                  */
5271                 dma_sync_single_range_for_cpu(rx_ring->dev,
5272                                               rx_buffer->dma,
5273                                               rx_buffer->page_offset,
5274                                               ixgbe_rx_bufsz(rx_ring),
5275                                               DMA_FROM_DEVICE);
5276
5277                 /* free resources associated with mapping */
5278                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5279                                      ixgbe_rx_pg_size(rx_ring),
5280                                      DMA_FROM_DEVICE,
5281                                      IXGBE_RX_DMA_ATTR);
5282                 __page_frag_cache_drain(rx_buffer->page,
5283                                         rx_buffer->pagecnt_bias);
5284
5285                 i++;
5286                 rx_buffer++;
5287                 if (i == rx_ring->count) {
5288                         i = 0;
5289                         rx_buffer = rx_ring->rx_buffer_info;
5290                 }
5291         }
5292
5293         rx_ring->next_to_alloc = 0;
5294         rx_ring->next_to_clean = 0;
5295         rx_ring->next_to_use = 0;
5296 }
5297
5298 static int ixgbe_fwd_ring_up(struct ixgbe_adapter *adapter,
5299                              struct ixgbe_fwd_adapter *accel)
5300 {
5301         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
5302         int num_tc = netdev_get_num_tc(adapter->netdev);
5303         struct net_device *vdev = accel->netdev;
5304         int i, baseq, err;
5305
5306         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5307         netdev_dbg(vdev, "pool %i:%i queues %i:%i\n",
5308                    accel->pool, adapter->num_rx_pools,
5309                    baseq, baseq + adapter->num_rx_queues_per_pool);
5310
5311         accel->rx_base_queue = baseq;
5312         accel->tx_base_queue = baseq;
5313
5314         /* record configuration for macvlan interface in vdev */
5315         for (i = 0; i < num_tc; i++)
5316                 netdev_bind_sb_channel_queue(adapter->netdev, vdev,
5317                                              i, rss_i, baseq + (rss_i * i));
5318
5319         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5320                 adapter->rx_ring[baseq + i]->netdev = vdev;
5321
5322         /* Guarantee all rings are updated before we update the
5323          * MAC address filter.
5324          */
5325         wmb();
5326
5327         /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5328          * need to only treat it as an error value if it is negative.
5329          */
5330         err = ixgbe_add_mac_filter(adapter, vdev->dev_addr,
5331                                    VMDQ_P(accel->pool));
5332         if (err >= 0)
5333                 return 0;
5334
5335         /* if we cannot add the MAC rule then disable the offload */
5336         macvlan_release_l2fw_offload(vdev);
5337
5338         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5339                 adapter->rx_ring[baseq + i]->netdev = NULL;
5340
5341         netdev_err(vdev, "L2FW offload disabled due to L2 filter error\n");
5342
5343         /* unbind the queues and drop the subordinate channel config */
5344         netdev_unbind_sb_channel(adapter->netdev, vdev);
5345         netdev_set_sb_channel(vdev, 0);
5346
5347         clear_bit(accel->pool, adapter->fwd_bitmask);
5348         kfree(accel);
5349
5350         return err;
5351 }
5352
5353 static int ixgbe_macvlan_up(struct net_device *vdev, void *data)
5354 {
5355         struct ixgbe_adapter *adapter = data;
5356         struct ixgbe_fwd_adapter *accel;
5357
5358         if (!netif_is_macvlan(vdev))
5359                 return 0;
5360
5361         accel = macvlan_accel_priv(vdev);
5362         if (!accel)
5363                 return 0;
5364
5365         ixgbe_fwd_ring_up(adapter, accel);
5366
5367         return 0;
5368 }
5369
5370 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5371 {
5372         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5373                                       ixgbe_macvlan_up, adapter);
5374 }
5375
5376 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5377 {
5378         struct ixgbe_hw *hw = &adapter->hw;
5379
5380         ixgbe_configure_pb(adapter);
5381 #ifdef CONFIG_IXGBE_DCB
5382         ixgbe_configure_dcb(adapter);
5383 #endif
5384         /*
5385          * We must restore virtualization before VLANs or else
5386          * the VLVF registers will not be populated
5387          */
5388         ixgbe_configure_virtualization(adapter);
5389
5390         ixgbe_set_rx_mode(adapter->netdev);
5391         ixgbe_restore_vlan(adapter);
5392         ixgbe_ipsec_restore(adapter);
5393
5394         switch (hw->mac.type) {
5395         case ixgbe_mac_82599EB:
5396         case ixgbe_mac_X540:
5397                 hw->mac.ops.disable_rx_buff(hw);
5398                 break;
5399         default:
5400                 break;
5401         }
5402
5403         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5404                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5405                                                 adapter->fdir_pballoc);
5406         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5407                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5408                                               adapter->fdir_pballoc);
5409                 ixgbe_fdir_filter_restore(adapter);
5410         }
5411
5412         switch (hw->mac.type) {
5413         case ixgbe_mac_82599EB:
5414         case ixgbe_mac_X540:
5415                 hw->mac.ops.enable_rx_buff(hw);
5416                 break;
5417         default:
5418                 break;
5419         }
5420
5421 #ifdef CONFIG_IXGBE_DCA
5422         /* configure DCA */
5423         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5424                 ixgbe_setup_dca(adapter);
5425 #endif /* CONFIG_IXGBE_DCA */
5426
5427 #ifdef IXGBE_FCOE
5428         /* configure FCoE L2 filters, redirection table, and Rx control */
5429         ixgbe_configure_fcoe(adapter);
5430
5431 #endif /* IXGBE_FCOE */
5432         ixgbe_configure_tx(adapter);
5433         ixgbe_configure_rx(adapter);
5434         ixgbe_configure_dfwd(adapter);
5435 }
5436
5437 /**
5438  * ixgbe_sfp_link_config - set up SFP+ link
5439  * @adapter: pointer to private adapter struct
5440  **/
5441 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5442 {
5443         /*
5444          * We are assuming the worst case scenario here, and that
5445          * is that an SFP was inserted/removed after the reset
5446          * but before SFP detection was enabled.  As such the best
5447          * solution is to just start searching as soon as we start
5448          */
5449         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5450                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5451
5452         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5453         adapter->sfp_poll_time = 0;
5454 }
5455
5456 /**
5457  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5458  * @hw: pointer to private hardware struct
5459  *
5460  * Returns 0 on success, negative on failure
5461  **/
5462 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5463 {
5464         u32 speed;
5465         bool autoneg, link_up = false;
5466         int ret = IXGBE_ERR_LINK_SETUP;
5467
5468         if (hw->mac.ops.check_link)
5469                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5470
5471         if (ret)
5472                 return ret;
5473
5474         speed = hw->phy.autoneg_advertised;
5475         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5476                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5477                                                         &autoneg);
5478         if (ret)
5479                 return ret;
5480
5481         if (hw->mac.ops.setup_link)
5482                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5483
5484         return ret;
5485 }
5486
5487 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5488 {
5489         struct ixgbe_hw *hw = &adapter->hw;
5490         u32 gpie = 0;
5491
5492         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5493                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5494                        IXGBE_GPIE_OCD;
5495                 gpie |= IXGBE_GPIE_EIAME;
5496                 /*
5497                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5498                  * this saves a register write for every interrupt
5499                  */
5500                 switch (hw->mac.type) {
5501                 case ixgbe_mac_82598EB:
5502                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5503                         break;
5504                 case ixgbe_mac_82599EB:
5505                 case ixgbe_mac_X540:
5506                 case ixgbe_mac_X550:
5507                 case ixgbe_mac_X550EM_x:
5508                 case ixgbe_mac_x550em_a:
5509                 default:
5510                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5511                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5512                         break;
5513                 }
5514         } else {
5515                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5516                  * specifically only auto mask tx and rx interrupts */
5517                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5518         }
5519
5520         /* XXX: to interrupt immediately for EICS writes, enable this */
5521         /* gpie |= IXGBE_GPIE_EIMEN; */
5522
5523         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5524                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5525
5526                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5527                 case IXGBE_82599_VMDQ_8Q_MASK:
5528                         gpie |= IXGBE_GPIE_VTMODE_16;
5529                         break;
5530                 case IXGBE_82599_VMDQ_4Q_MASK:
5531                         gpie |= IXGBE_GPIE_VTMODE_32;
5532                         break;
5533                 default:
5534                         gpie |= IXGBE_GPIE_VTMODE_64;
5535                         break;
5536                 }
5537         }
5538
5539         /* Enable Thermal over heat sensor interrupt */
5540         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5541                 switch (adapter->hw.mac.type) {
5542                 case ixgbe_mac_82599EB:
5543                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5544                         break;
5545                 default:
5546                         break;
5547                 }
5548         }
5549
5550         /* Enable fan failure interrupt */
5551         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5552                 gpie |= IXGBE_SDP1_GPIEN(hw);
5553
5554         switch (hw->mac.type) {
5555         case ixgbe_mac_82599EB:
5556                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5557                 break;
5558         case ixgbe_mac_X550EM_x:
5559         case ixgbe_mac_x550em_a:
5560                 gpie |= IXGBE_SDP0_GPIEN_X540;
5561                 break;
5562         default:
5563                 break;
5564         }
5565
5566         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5567 }
5568
5569 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5570 {
5571         struct ixgbe_hw *hw = &adapter->hw;
5572         int err;
5573         u32 ctrl_ext;
5574
5575         ixgbe_get_hw_control(adapter);
5576         ixgbe_setup_gpie(adapter);
5577
5578         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5579                 ixgbe_configure_msix(adapter);
5580         else
5581                 ixgbe_configure_msi_and_legacy(adapter);
5582
5583         /* enable the optics for 82599 SFP+ fiber */
5584         if (hw->mac.ops.enable_tx_laser)
5585                 hw->mac.ops.enable_tx_laser(hw);
5586
5587         if (hw->phy.ops.set_phy_power)
5588                 hw->phy.ops.set_phy_power(hw, true);
5589
5590         smp_mb__before_atomic();
5591         clear_bit(__IXGBE_DOWN, &adapter->state);
5592         ixgbe_napi_enable_all(adapter);
5593
5594         if (ixgbe_is_sfp(hw)) {
5595                 ixgbe_sfp_link_config(adapter);
5596         } else {
5597                 err = ixgbe_non_sfp_link_config(hw);
5598                 if (err)
5599                         e_err(probe, "link_config FAILED %d\n", err);
5600         }
5601
5602         /* clear any pending interrupts, may auto mask */
5603         IXGBE_READ_REG(hw, IXGBE_EICR);
5604         ixgbe_irq_enable(adapter, true, true);
5605
5606         /*
5607          * If this adapter has a fan, check to see if we had a failure
5608          * before we enabled the interrupt.
5609          */
5610         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5611                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5612                 if (esdp & IXGBE_ESDP_SDP1)
5613                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5614         }
5615
5616         /* bring the link up in the watchdog, this could race with our first
5617          * link up interrupt but shouldn't be a problem */
5618         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5619         adapter->link_check_timeout = jiffies;
5620         mod_timer(&adapter->service_timer, jiffies);
5621
5622         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5623         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5624         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5625         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5626 }
5627
5628 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5629 {
5630         WARN_ON(in_interrupt());
5631         /* put off any impending NetWatchDogTimeout */
5632         netif_trans_update(adapter->netdev);
5633
5634         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5635                 usleep_range(1000, 2000);
5636         if (adapter->hw.phy.type == ixgbe_phy_fw)
5637                 ixgbe_watchdog_link_is_down(adapter);
5638         ixgbe_down(adapter);
5639         /*
5640          * If SR-IOV enabled then wait a bit before bringing the adapter
5641          * back up to give the VFs time to respond to the reset.  The
5642          * two second wait is based upon the watchdog timer cycle in
5643          * the VF driver.
5644          */
5645         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5646                 msleep(2000);
5647         ixgbe_up(adapter);
5648         clear_bit(__IXGBE_RESETTING, &adapter->state);
5649 }
5650
5651 void ixgbe_up(struct ixgbe_adapter *adapter)
5652 {
5653         /* hardware has been reset, we need to reload some things */
5654         ixgbe_configure(adapter);
5655
5656         ixgbe_up_complete(adapter);
5657 }
5658
5659 static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter *adapter)
5660 {
5661         u16 devctl2;
5662
5663         pcie_capability_read_word(adapter->pdev, PCI_EXP_DEVCTL2, &devctl2);
5664
5665         switch (devctl2 & IXGBE_PCIDEVCTRL2_TIMEO_MASK) {
5666         case IXGBE_PCIDEVCTRL2_17_34s:
5667         case IXGBE_PCIDEVCTRL2_4_8s:
5668                 /* For now we cap the upper limit on delay to 2 seconds
5669                  * as we end up going up to 34 seconds of delay in worst
5670                  * case timeout value.
5671                  */
5672         case IXGBE_PCIDEVCTRL2_1_2s:
5673                 return 2000000ul;       /* 2.0 s */
5674         case IXGBE_PCIDEVCTRL2_260_520ms:
5675                 return 520000ul;        /* 520 ms */
5676         case IXGBE_PCIDEVCTRL2_65_130ms:
5677                 return 130000ul;        /* 130 ms */
5678         case IXGBE_PCIDEVCTRL2_16_32ms:
5679                 return 32000ul;         /* 32 ms */
5680         case IXGBE_PCIDEVCTRL2_1_2ms:
5681                 return 2000ul;          /* 2 ms */
5682         case IXGBE_PCIDEVCTRL2_50_100us:
5683                 return 100ul;           /* 100 us */
5684         case IXGBE_PCIDEVCTRL2_16_32ms_def:
5685                 return 32000ul;         /* 32 ms */
5686         default:
5687                 break;
5688         }
5689
5690         /* We shouldn't need to hit this path, but just in case default as
5691          * though completion timeout is not supported and support 32ms.
5692          */
5693         return 32000ul;
5694 }
5695
5696 void ixgbe_disable_rx(struct ixgbe_adapter *adapter)
5697 {
5698         unsigned long wait_delay, delay_interval;
5699         struct ixgbe_hw *hw = &adapter->hw;
5700         int i, wait_loop;
5701         u32 rxdctl;
5702
5703         /* disable receives */
5704         hw->mac.ops.disable_rx(hw);
5705
5706         if (ixgbe_removed(hw->hw_addr))
5707                 return;
5708
5709         /* disable all enabled Rx queues */
5710         for (i = 0; i < adapter->num_rx_queues; i++) {
5711                 struct ixgbe_ring *ring = adapter->rx_ring[i];
5712                 u8 reg_idx = ring->reg_idx;
5713
5714                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5715                 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
5716                 rxdctl |= IXGBE_RXDCTL_SWFLSH;
5717
5718                 /* write value back with RXDCTL.ENABLE bit cleared */
5719                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
5720         }
5721
5722         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
5723         if (hw->mac.type == ixgbe_mac_82598EB &&
5724             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5725                 return;
5726
5727         /* Determine our minimum delay interval. We will increase this value
5728          * with each subsequent test. This way if the device returns quickly
5729          * we should spend as little time as possible waiting, however as
5730          * the time increases we will wait for larger periods of time.
5731          *
5732          * The trick here is that we increase the interval using the
5733          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5734          * of that wait is that it totals up to 100x whatever interval we
5735          * choose. Since our minimum wait is 100us we can just divide the
5736          * total timeout by 100 to get our minimum delay interval.
5737          */
5738         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5739
5740         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5741         wait_delay = delay_interval;
5742
5743         while (wait_loop--) {
5744                 usleep_range(wait_delay, wait_delay + 10);
5745                 wait_delay += delay_interval * 2;
5746                 rxdctl = 0;
5747
5748                 /* OR together the reading of all the active RXDCTL registers,
5749                  * and then test the result. We need the disable to complete
5750                  * before we start freeing the memory and invalidating the
5751                  * DMA mappings.
5752                  */
5753                 for (i = 0; i < adapter->num_rx_queues; i++) {
5754                         struct ixgbe_ring *ring = adapter->rx_ring[i];
5755                         u8 reg_idx = ring->reg_idx;
5756
5757                         rxdctl |= IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5758                 }
5759
5760                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
5761                         return;
5762         }
5763
5764         e_err(drv,
5765               "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5766 }
5767
5768 void ixgbe_disable_tx(struct ixgbe_adapter *adapter)
5769 {
5770         unsigned long wait_delay, delay_interval;
5771         struct ixgbe_hw *hw = &adapter->hw;
5772         int i, wait_loop;
5773         u32 txdctl;
5774
5775         if (ixgbe_removed(hw->hw_addr))
5776                 return;
5777
5778         /* disable all enabled Tx queues */
5779         for (i = 0; i < adapter->num_tx_queues; i++) {
5780                 struct ixgbe_ring *ring = adapter->tx_ring[i];
5781                 u8 reg_idx = ring->reg_idx;
5782
5783                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5784         }
5785
5786         /* disable all enabled XDP Tx queues */
5787         for (i = 0; i < adapter->num_xdp_queues; i++) {
5788                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
5789                 u8 reg_idx = ring->reg_idx;
5790
5791                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5792         }
5793
5794         /* If the link is not up there shouldn't be much in the way of
5795          * pending transactions. Those that are left will be flushed out
5796          * when the reset logic goes through the flush sequence to clean out
5797          * the pending Tx transactions.
5798          */
5799         if (!(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5800                 goto dma_engine_disable;
5801
5802         /* Determine our minimum delay interval. We will increase this value
5803          * with each subsequent test. This way if the device returns quickly
5804          * we should spend as little time as possible waiting, however as
5805          * the time increases we will wait for larger periods of time.
5806          *
5807          * The trick here is that we increase the interval using the
5808          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5809          * of that wait is that it totals up to 100x whatever interval we
5810          * choose. Since our minimum wait is 100us we can just divide the
5811          * total timeout by 100 to get our minimum delay interval.
5812          */
5813         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5814
5815         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5816         wait_delay = delay_interval;
5817
5818         while (wait_loop--) {
5819                 usleep_range(wait_delay, wait_delay + 10);
5820                 wait_delay += delay_interval * 2;
5821                 txdctl = 0;
5822
5823                 /* OR together the reading of all the active TXDCTL registers,
5824                  * and then test the result. We need the disable to complete
5825                  * before we start freeing the memory and invalidating the
5826                  * DMA mappings.
5827                  */
5828                 for (i = 0; i < adapter->num_tx_queues; i++) {
5829                         struct ixgbe_ring *ring = adapter->tx_ring[i];
5830                         u8 reg_idx = ring->reg_idx;
5831
5832                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5833                 }
5834                 for (i = 0; i < adapter->num_xdp_queues; i++) {
5835                         struct ixgbe_ring *ring = adapter->xdp_ring[i];
5836                         u8 reg_idx = ring->reg_idx;
5837
5838                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5839                 }
5840
5841                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
5842                         goto dma_engine_disable;
5843         }
5844
5845         e_err(drv,
5846               "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5847
5848 dma_engine_disable:
5849         /* Disable the Tx DMA engine on 82599 and later MAC */
5850         switch (hw->mac.type) {
5851         case ixgbe_mac_82599EB:
5852         case ixgbe_mac_X540:
5853         case ixgbe_mac_X550:
5854         case ixgbe_mac_X550EM_x:
5855         case ixgbe_mac_x550em_a:
5856                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5857                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5858                                  ~IXGBE_DMATXCTL_TE));
5859                 /* fall through */
5860         default:
5861                 break;
5862         }
5863 }
5864
5865 void ixgbe_reset(struct ixgbe_adapter *adapter)
5866 {
5867         struct ixgbe_hw *hw = &adapter->hw;
5868         struct net_device *netdev = adapter->netdev;
5869         int err;
5870
5871         if (ixgbe_removed(hw->hw_addr))
5872                 return;
5873         /* lock SFP init bit to prevent race conditions with the watchdog */
5874         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5875                 usleep_range(1000, 2000);
5876
5877         /* clear all SFP and link config related flags while holding SFP_INIT */
5878         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5879                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5880         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5881
5882         err = hw->mac.ops.init_hw(hw);
5883         switch (err) {
5884         case 0:
5885         case IXGBE_ERR_SFP_NOT_PRESENT:
5886         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5887                 break;
5888         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5889                 e_dev_err("master disable timed out\n");
5890                 break;
5891         case IXGBE_ERR_EEPROM_VERSION:
5892                 /* We are running on a pre-production device, log a warning */
5893                 e_dev_warn("This device is a pre-production adapter/LOM. "
5894                            "Please be aware there may be issues associated with "
5895                            "your hardware.  If you are experiencing problems "
5896                            "please contact your Intel or hardware "
5897                            "representative who provided you with this "
5898                            "hardware.\n");
5899                 break;
5900         default:
5901                 e_dev_err("Hardware Error: %d\n", err);
5902         }
5903
5904         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5905
5906         /* flush entries out of MAC table */
5907         ixgbe_flush_sw_mac_table(adapter);
5908         __dev_uc_unsync(netdev, NULL);
5909
5910         /* do not flush user set addresses */
5911         ixgbe_mac_set_default_filter(adapter);
5912
5913         /* update SAN MAC vmdq pool selection */
5914         if (hw->mac.san_mac_rar_index)
5915                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5916
5917         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5918                 ixgbe_ptp_reset(adapter);
5919
5920         if (hw->phy.ops.set_phy_power) {
5921                 if (!netif_running(adapter->netdev) && !adapter->wol)
5922                         hw->phy.ops.set_phy_power(hw, false);
5923                 else
5924                         hw->phy.ops.set_phy_power(hw, true);
5925         }
5926 }
5927
5928 /**
5929  * ixgbe_clean_tx_ring - Free Tx Buffers
5930  * @tx_ring: ring to be cleaned
5931  **/
5932 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5933 {
5934         u16 i = tx_ring->next_to_clean;
5935         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5936
5937         while (i != tx_ring->next_to_use) {
5938                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5939
5940                 /* Free all the Tx ring sk_buffs */
5941                 if (ring_is_xdp(tx_ring))
5942                         xdp_return_frame(tx_buffer->xdpf);
5943                 else
5944                         dev_kfree_skb_any(tx_buffer->skb);
5945
5946                 /* unmap skb header data */
5947                 dma_unmap_single(tx_ring->dev,
5948                                  dma_unmap_addr(tx_buffer, dma),
5949                                  dma_unmap_len(tx_buffer, len),
5950                                  DMA_TO_DEVICE);
5951
5952                 /* check for eop_desc to determine the end of the packet */
5953                 eop_desc = tx_buffer->next_to_watch;
5954                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5955
5956                 /* unmap remaining buffers */
5957                 while (tx_desc != eop_desc) {
5958                         tx_buffer++;
5959                         tx_desc++;
5960                         i++;
5961                         if (unlikely(i == tx_ring->count)) {
5962                                 i = 0;
5963                                 tx_buffer = tx_ring->tx_buffer_info;
5964                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5965                         }
5966
5967                         /* unmap any remaining paged data */
5968                         if (dma_unmap_len(tx_buffer, len))
5969                                 dma_unmap_page(tx_ring->dev,
5970                                                dma_unmap_addr(tx_buffer, dma),
5971                                                dma_unmap_len(tx_buffer, len),
5972                                                DMA_TO_DEVICE);
5973                 }
5974
5975                 /* move us one more past the eop_desc for start of next pkt */
5976                 tx_buffer++;
5977                 i++;
5978                 if (unlikely(i == tx_ring->count)) {
5979                         i = 0;
5980                         tx_buffer = tx_ring->tx_buffer_info;
5981                 }
5982         }
5983
5984         /* reset BQL for queue */
5985         if (!ring_is_xdp(tx_ring))
5986                 netdev_tx_reset_queue(txring_txq(tx_ring));
5987
5988         /* reset next_to_use and next_to_clean */
5989         tx_ring->next_to_use = 0;
5990         tx_ring->next_to_clean = 0;
5991 }
5992
5993 /**
5994  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5995  * @adapter: board private structure
5996  **/
5997 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5998 {
5999         int i;
6000
6001         for (i = 0; i < adapter->num_rx_queues; i++)
6002                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
6003 }
6004
6005 /**
6006  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
6007  * @adapter: board private structure
6008  **/
6009 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
6010 {
6011         int i;
6012
6013         for (i = 0; i < adapter->num_tx_queues; i++)
6014                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
6015         for (i = 0; i < adapter->num_xdp_queues; i++)
6016                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
6017 }
6018
6019 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
6020 {
6021         struct hlist_node *node2;
6022         struct ixgbe_fdir_filter *filter;
6023
6024         spin_lock(&adapter->fdir_perfect_lock);
6025
6026         hlist_for_each_entry_safe(filter, node2,
6027                                   &adapter->fdir_filter_list, fdir_node) {
6028                 hlist_del(&filter->fdir_node);
6029                 kfree(filter);
6030         }
6031         adapter->fdir_filter_count = 0;
6032
6033         spin_unlock(&adapter->fdir_perfect_lock);
6034 }
6035
6036 void ixgbe_down(struct ixgbe_adapter *adapter)
6037 {
6038         struct net_device *netdev = adapter->netdev;
6039         struct ixgbe_hw *hw = &adapter->hw;
6040         int i;
6041
6042         /* signal that we are down to the interrupt handler */
6043         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
6044                 return; /* do nothing if already down */
6045
6046         /* Shut off incoming Tx traffic */
6047         netif_tx_stop_all_queues(netdev);
6048
6049         /* call carrier off first to avoid false dev_watchdog timeouts */
6050         netif_carrier_off(netdev);
6051         netif_tx_disable(netdev);
6052
6053         /* Disable Rx */
6054         ixgbe_disable_rx(adapter);
6055
6056         /* synchronize_sched() needed for pending XDP buffers to drain */
6057         if (adapter->xdp_ring[0])
6058                 synchronize_sched();
6059
6060         ixgbe_irq_disable(adapter);
6061
6062         ixgbe_napi_disable_all(adapter);
6063
6064         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6065         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6066         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6067
6068         del_timer_sync(&adapter->service_timer);
6069
6070         if (adapter->num_vfs) {
6071                 /* Clear EITR Select mapping */
6072                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
6073
6074                 /* Mark all the VFs as inactive */
6075                 for (i = 0 ; i < adapter->num_vfs; i++)
6076                         adapter->vfinfo[i].clear_to_send = false;
6077
6078                 /* ping all the active vfs to let them know we are going down */
6079                 ixgbe_ping_all_vfs(adapter);
6080
6081                 /* Disable all VFTE/VFRE TX/RX */
6082                 ixgbe_disable_tx_rx(adapter);
6083         }
6084
6085         /* disable transmits in the hardware now that interrupts are off */
6086         ixgbe_disable_tx(adapter);
6087
6088         if (!pci_channel_offline(adapter->pdev))
6089                 ixgbe_reset(adapter);
6090
6091         /* power down the optics for 82599 SFP+ fiber */
6092         if (hw->mac.ops.disable_tx_laser)
6093                 hw->mac.ops.disable_tx_laser(hw);
6094
6095         ixgbe_clean_all_tx_rings(adapter);
6096         ixgbe_clean_all_rx_rings(adapter);
6097 }
6098
6099 /**
6100  * ixgbe_eee_capable - helper function to determine EEE support on X550
6101  * @adapter: board private structure
6102  */
6103 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
6104 {
6105         struct ixgbe_hw *hw = &adapter->hw;
6106
6107         switch (hw->device_id) {
6108         case IXGBE_DEV_ID_X550EM_A_1G_T:
6109         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6110                 if (!hw->phy.eee_speeds_supported)
6111                         break;
6112                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
6113                 if (!hw->phy.eee_speeds_advertised)
6114                         break;
6115                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
6116                 break;
6117         default:
6118                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
6119                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
6120                 break;
6121         }
6122 }
6123
6124 /**
6125  * ixgbe_tx_timeout - Respond to a Tx Hang
6126  * @netdev: network interface device structure
6127  **/
6128 static void ixgbe_tx_timeout(struct net_device *netdev)
6129 {
6130         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6131
6132         /* Do the reset outside of interrupt context */
6133         ixgbe_tx_timeout_reset(adapter);
6134 }
6135
6136 #ifdef CONFIG_IXGBE_DCB
6137 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6138 {
6139         struct ixgbe_hw *hw = &adapter->hw;
6140         struct tc_configuration *tc;
6141         int j;
6142
6143         switch (hw->mac.type) {
6144         case ixgbe_mac_82598EB:
6145         case ixgbe_mac_82599EB:
6146                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6147                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6148                 break;
6149         case ixgbe_mac_X540:
6150         case ixgbe_mac_X550:
6151                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6152                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6153                 break;
6154         case ixgbe_mac_X550EM_x:
6155         case ixgbe_mac_x550em_a:
6156         default:
6157                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6158                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6159                 break;
6160         }
6161
6162         /* Configure DCB traffic classes */
6163         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6164                 tc = &adapter->dcb_cfg.tc_config[j];
6165                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6166                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6167                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6168                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6169                 tc->dcb_pfc = pfc_disabled;
6170         }
6171
6172         /* Initialize default user to priority mapping, UPx->TC0 */
6173         tc = &adapter->dcb_cfg.tc_config[0];
6174         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6175         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6176
6177         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6178         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6179         adapter->dcb_cfg.pfc_mode_enable = false;
6180         adapter->dcb_set_bitmap = 0x00;
6181         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6182                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6183         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6184                sizeof(adapter->temp_dcb_cfg));
6185 }
6186 #endif
6187
6188 /**
6189  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6190  * @adapter: board private structure to initialize
6191  * @ii: pointer to ixgbe_info for device
6192  *
6193  * ixgbe_sw_init initializes the Adapter private data structure.
6194  * Fields are initialized based on PCI device information and
6195  * OS network device settings (MTU size).
6196  **/
6197 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6198                          const struct ixgbe_info *ii)
6199 {
6200         struct ixgbe_hw *hw = &adapter->hw;
6201         struct pci_dev *pdev = adapter->pdev;
6202         unsigned int rss, fdir;
6203         u32 fwsm;
6204         int i;
6205
6206         /* PCI config space info */
6207
6208         hw->vendor_id = pdev->vendor;
6209         hw->device_id = pdev->device;
6210         hw->revision_id = pdev->revision;
6211         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6212         hw->subsystem_device_id = pdev->subsystem_device;
6213
6214         /* get_invariants needs the device IDs */
6215         ii->get_invariants(hw);
6216
6217         /* Set common capability flags and settings */
6218         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6219         adapter->ring_feature[RING_F_RSS].limit = rss;
6220         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6221         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6222         adapter->atr_sample_rate = 20;
6223         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6224         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6225         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6226         adapter->ring_feature[RING_F_VMDQ].limit = 1;
6227 #ifdef CONFIG_IXGBE_DCA
6228         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6229 #endif
6230 #ifdef CONFIG_IXGBE_DCB
6231         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6232         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6233 #endif
6234 #ifdef IXGBE_FCOE
6235         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6236         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6237 #ifdef CONFIG_IXGBE_DCB
6238         /* Default traffic class to use for FCoE */
6239         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6240 #endif /* CONFIG_IXGBE_DCB */
6241 #endif /* IXGBE_FCOE */
6242
6243         /* initialize static ixgbe jump table entries */
6244         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6245                                           GFP_KERNEL);
6246         if (!adapter->jump_tables[0])
6247                 return -ENOMEM;
6248         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6249
6250         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6251                 adapter->jump_tables[i] = NULL;
6252
6253         adapter->mac_table = kcalloc(hw->mac.num_rar_entries,
6254                                      sizeof(struct ixgbe_mac_addr),
6255                                      GFP_KERNEL);
6256         if (!adapter->mac_table)
6257                 return -ENOMEM;
6258
6259         if (ixgbe_init_rss_key(adapter))
6260                 return -ENOMEM;
6261
6262         /* Set MAC specific capability flags and exceptions */
6263         switch (hw->mac.type) {
6264         case ixgbe_mac_82598EB:
6265                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6266
6267                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6268                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6269
6270                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6271                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6272                 adapter->atr_sample_rate = 0;
6273                 adapter->fdir_pballoc = 0;
6274 #ifdef IXGBE_FCOE
6275                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6276                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6277 #ifdef CONFIG_IXGBE_DCB
6278                 adapter->fcoe.up = 0;
6279 #endif /* IXGBE_DCB */
6280 #endif /* IXGBE_FCOE */
6281                 break;
6282         case ixgbe_mac_82599EB:
6283                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6284                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6285                 break;
6286         case ixgbe_mac_X540:
6287                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6288                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6289                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6290                 break;
6291         case ixgbe_mac_x550em_a:
6292                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6293                 switch (hw->device_id) {
6294                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6295                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6296                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6297                         break;
6298                 default:
6299                         break;
6300                 }
6301         /* fall through */
6302         case ixgbe_mac_X550EM_x:
6303 #ifdef CONFIG_IXGBE_DCB
6304                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6305 #endif
6306 #ifdef IXGBE_FCOE
6307                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6308 #ifdef CONFIG_IXGBE_DCB
6309                 adapter->fcoe.up = 0;
6310 #endif /* IXGBE_DCB */
6311 #endif /* IXGBE_FCOE */
6312         /* Fall Through */
6313         case ixgbe_mac_X550:
6314                 if (hw->mac.type == ixgbe_mac_X550)
6315                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6316 #ifdef CONFIG_IXGBE_DCA
6317                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6318 #endif
6319                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6320                 break;
6321         default:
6322                 break;
6323         }
6324
6325 #ifdef IXGBE_FCOE
6326         /* FCoE support exists, always init the FCoE lock */
6327         spin_lock_init(&adapter->fcoe.lock);
6328
6329 #endif
6330         /* n-tuple support exists, always init our spinlock */
6331         spin_lock_init(&adapter->fdir_perfect_lock);
6332
6333 #ifdef CONFIG_IXGBE_DCB
6334         ixgbe_init_dcb(adapter);
6335 #endif
6336         ixgbe_init_ipsec_offload(adapter);
6337
6338         /* default flow control settings */
6339         hw->fc.requested_mode = ixgbe_fc_full;
6340         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6341         ixgbe_pbthresh_setup(adapter);
6342         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6343         hw->fc.send_xon = true;
6344         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6345
6346 #ifdef CONFIG_PCI_IOV
6347         if (max_vfs > 0)
6348                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6349
6350         /* assign number of SR-IOV VFs */
6351         if (hw->mac.type != ixgbe_mac_82598EB) {
6352                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6353                         max_vfs = 0;
6354                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6355                 }
6356         }
6357 #endif /* CONFIG_PCI_IOV */
6358
6359         /* enable itr by default in dynamic mode */
6360         adapter->rx_itr_setting = 1;
6361         adapter->tx_itr_setting = 1;
6362
6363         /* set default ring sizes */
6364         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6365         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6366
6367         /* set default work limits */
6368         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6369
6370         /* initialize eeprom parameters */
6371         if (ixgbe_init_eeprom_params_generic(hw)) {
6372                 e_dev_err("EEPROM initialization failed\n");
6373                 return -EIO;
6374         }
6375
6376         /* PF holds first pool slot */
6377         set_bit(0, adapter->fwd_bitmask);
6378         set_bit(__IXGBE_DOWN, &adapter->state);
6379
6380         return 0;
6381 }
6382
6383 /**
6384  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6385  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6386  *
6387  * Return 0 on success, negative on failure
6388  **/
6389 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6390 {
6391         struct device *dev = tx_ring->dev;
6392         int orig_node = dev_to_node(dev);
6393         int ring_node = -1;
6394         int size;
6395
6396         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6397
6398         if (tx_ring->q_vector)
6399                 ring_node = tx_ring->q_vector->numa_node;
6400
6401         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6402         if (!tx_ring->tx_buffer_info)
6403                 tx_ring->tx_buffer_info = vmalloc(size);
6404         if (!tx_ring->tx_buffer_info)
6405                 goto err;
6406
6407         /* round up to nearest 4K */
6408         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6409         tx_ring->size = ALIGN(tx_ring->size, 4096);
6410
6411         set_dev_node(dev, ring_node);
6412         tx_ring->desc = dma_alloc_coherent(dev,
6413                                            tx_ring->size,
6414                                            &tx_ring->dma,
6415                                            GFP_KERNEL);
6416         set_dev_node(dev, orig_node);
6417         if (!tx_ring->desc)
6418                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6419                                                    &tx_ring->dma, GFP_KERNEL);
6420         if (!tx_ring->desc)
6421                 goto err;
6422
6423         tx_ring->next_to_use = 0;
6424         tx_ring->next_to_clean = 0;
6425         return 0;
6426
6427 err:
6428         vfree(tx_ring->tx_buffer_info);
6429         tx_ring->tx_buffer_info = NULL;
6430         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6431         return -ENOMEM;
6432 }
6433
6434 /**
6435  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6436  * @adapter: board private structure
6437  *
6438  * If this function returns with an error, then it's possible one or
6439  * more of the rings is populated (while the rest are not).  It is the
6440  * callers duty to clean those orphaned rings.
6441  *
6442  * Return 0 on success, negative on failure
6443  **/
6444 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6445 {
6446         int i, j = 0, err = 0;
6447
6448         for (i = 0; i < adapter->num_tx_queues; i++) {
6449                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6450                 if (!err)
6451                         continue;
6452
6453                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6454                 goto err_setup_tx;
6455         }
6456         for (j = 0; j < adapter->num_xdp_queues; j++) {
6457                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6458                 if (!err)
6459                         continue;
6460
6461                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6462                 goto err_setup_tx;
6463         }
6464
6465         return 0;
6466 err_setup_tx:
6467         /* rewind the index freeing the rings as we go */
6468         while (j--)
6469                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6470         while (i--)
6471                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6472         return err;
6473 }
6474
6475 /**
6476  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6477  * @adapter: pointer to ixgbe_adapter
6478  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6479  *
6480  * Returns 0 on success, negative on failure
6481  **/
6482 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6483                              struct ixgbe_ring *rx_ring)
6484 {
6485         struct device *dev = rx_ring->dev;
6486         int orig_node = dev_to_node(dev);
6487         int ring_node = -1;
6488         int size, err;
6489
6490         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6491
6492         if (rx_ring->q_vector)
6493                 ring_node = rx_ring->q_vector->numa_node;
6494
6495         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6496         if (!rx_ring->rx_buffer_info)
6497                 rx_ring->rx_buffer_info = vmalloc(size);
6498         if (!rx_ring->rx_buffer_info)
6499                 goto err;
6500
6501         /* Round up to nearest 4K */
6502         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6503         rx_ring->size = ALIGN(rx_ring->size, 4096);
6504
6505         set_dev_node(dev, ring_node);
6506         rx_ring->desc = dma_alloc_coherent(dev,
6507                                            rx_ring->size,
6508                                            &rx_ring->dma,
6509                                            GFP_KERNEL);
6510         set_dev_node(dev, orig_node);
6511         if (!rx_ring->desc)
6512                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6513                                                    &rx_ring->dma, GFP_KERNEL);
6514         if (!rx_ring->desc)
6515                 goto err;
6516
6517         rx_ring->next_to_clean = 0;
6518         rx_ring->next_to_use = 0;
6519
6520         /* XDP RX-queue info */
6521         if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6522                              rx_ring->queue_index) < 0)
6523                 goto err;
6524
6525         err = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq,
6526                                          MEM_TYPE_PAGE_SHARED, NULL);
6527         if (err) {
6528                 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6529                 goto err;
6530         }
6531
6532         rx_ring->xdp_prog = adapter->xdp_prog;
6533
6534         return 0;
6535 err:
6536         vfree(rx_ring->rx_buffer_info);
6537         rx_ring->rx_buffer_info = NULL;
6538         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6539         return -ENOMEM;
6540 }
6541
6542 /**
6543  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6544  * @adapter: board private structure
6545  *
6546  * If this function returns with an error, then it's possible one or
6547  * more of the rings is populated (while the rest are not).  It is the
6548  * callers duty to clean those orphaned rings.
6549  *
6550  * Return 0 on success, negative on failure
6551  **/
6552 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6553 {
6554         int i, err = 0;
6555
6556         for (i = 0; i < adapter->num_rx_queues; i++) {
6557                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6558                 if (!err)
6559                         continue;
6560
6561                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6562                 goto err_setup_rx;
6563         }
6564
6565 #ifdef IXGBE_FCOE
6566         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6567         if (!err)
6568 #endif
6569                 return 0;
6570 err_setup_rx:
6571         /* rewind the index freeing the rings as we go */
6572         while (i--)
6573                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6574         return err;
6575 }
6576
6577 /**
6578  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6579  * @tx_ring: Tx descriptor ring for a specific queue
6580  *
6581  * Free all transmit software resources
6582  **/
6583 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6584 {
6585         ixgbe_clean_tx_ring(tx_ring);
6586
6587         vfree(tx_ring->tx_buffer_info);
6588         tx_ring->tx_buffer_info = NULL;
6589
6590         /* if not set, then don't free */
6591         if (!tx_ring->desc)
6592                 return;
6593
6594         dma_free_coherent(tx_ring->dev, tx_ring->size,
6595                           tx_ring->desc, tx_ring->dma);
6596
6597         tx_ring->desc = NULL;
6598 }
6599
6600 /**
6601  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6602  * @adapter: board private structure
6603  *
6604  * Free all transmit software resources
6605  **/
6606 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6607 {
6608         int i;
6609
6610         for (i = 0; i < adapter->num_tx_queues; i++)
6611                 if (adapter->tx_ring[i]->desc)
6612                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6613         for (i = 0; i < adapter->num_xdp_queues; i++)
6614                 if (adapter->xdp_ring[i]->desc)
6615                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6616 }
6617
6618 /**
6619  * ixgbe_free_rx_resources - Free Rx Resources
6620  * @rx_ring: ring to clean the resources from
6621  *
6622  * Free all receive software resources
6623  **/
6624 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6625 {
6626         ixgbe_clean_rx_ring(rx_ring);
6627
6628         rx_ring->xdp_prog = NULL;
6629         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6630         vfree(rx_ring->rx_buffer_info);
6631         rx_ring->rx_buffer_info = NULL;
6632
6633         /* if not set, then don't free */
6634         if (!rx_ring->desc)
6635                 return;
6636
6637         dma_free_coherent(rx_ring->dev, rx_ring->size,
6638                           rx_ring->desc, rx_ring->dma);
6639
6640         rx_ring->desc = NULL;
6641 }
6642
6643 /**
6644  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6645  * @adapter: board private structure
6646  *
6647  * Free all receive software resources
6648  **/
6649 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6650 {
6651         int i;
6652
6653 #ifdef IXGBE_FCOE
6654         ixgbe_free_fcoe_ddp_resources(adapter);
6655
6656 #endif
6657         for (i = 0; i < adapter->num_rx_queues; i++)
6658                 if (adapter->rx_ring[i]->desc)
6659                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6660 }
6661
6662 /**
6663  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6664  * @netdev: network interface device structure
6665  * @new_mtu: new value for maximum frame size
6666  *
6667  * Returns 0 on success, negative on failure
6668  **/
6669 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6670 {
6671         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6672
6673         if (adapter->xdp_prog) {
6674                 int new_frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN +
6675                                      VLAN_HLEN;
6676                 int i;
6677
6678                 for (i = 0; i < adapter->num_rx_queues; i++) {
6679                         struct ixgbe_ring *ring = adapter->rx_ring[i];
6680
6681                         if (new_frame_size > ixgbe_rx_bufsz(ring)) {
6682                                 e_warn(probe, "Requested MTU size is not supported with XDP\n");
6683                                 return -EINVAL;
6684                         }
6685                 }
6686         }
6687
6688         /*
6689          * For 82599EB we cannot allow legacy VFs to enable their receive
6690          * paths when MTU greater than 1500 is configured.  So display a
6691          * warning that legacy VFs will be disabled.
6692          */
6693         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6694             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6695             (new_mtu > ETH_DATA_LEN))
6696                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6697
6698         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6699
6700         /* must set new MTU before calling down or up */
6701         netdev->mtu = new_mtu;
6702
6703         if (netif_running(netdev))
6704                 ixgbe_reinit_locked(adapter);
6705
6706         return 0;
6707 }
6708
6709 /**
6710  * ixgbe_open - Called when a network interface is made active
6711  * @netdev: network interface device structure
6712  *
6713  * Returns 0 on success, negative value on failure
6714  *
6715  * The open entry point is called when a network interface is made
6716  * active by the system (IFF_UP).  At this point all resources needed
6717  * for transmit and receive operations are allocated, the interrupt
6718  * handler is registered with the OS, the watchdog timer is started,
6719  * and the stack is notified that the interface is ready.
6720  **/
6721 int ixgbe_open(struct net_device *netdev)
6722 {
6723         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6724         struct ixgbe_hw *hw = &adapter->hw;
6725         int err, queues;
6726
6727         /* disallow open during test */
6728         if (test_bit(__IXGBE_TESTING, &adapter->state))
6729                 return -EBUSY;
6730
6731         netif_carrier_off(netdev);
6732
6733         /* allocate transmit descriptors */
6734         err = ixgbe_setup_all_tx_resources(adapter);
6735         if (err)
6736                 goto err_setup_tx;
6737
6738         /* allocate receive descriptors */
6739         err = ixgbe_setup_all_rx_resources(adapter);
6740         if (err)
6741                 goto err_setup_rx;
6742
6743         ixgbe_configure(adapter);
6744
6745         err = ixgbe_request_irq(adapter);
6746         if (err)
6747                 goto err_req_irq;
6748
6749         /* Notify the stack of the actual queue counts. */
6750         queues = adapter->num_tx_queues;
6751         err = netif_set_real_num_tx_queues(netdev, queues);
6752         if (err)
6753                 goto err_set_queues;
6754
6755         queues = adapter->num_rx_queues;
6756         err = netif_set_real_num_rx_queues(netdev, queues);
6757         if (err)
6758                 goto err_set_queues;
6759
6760         ixgbe_ptp_init(adapter);
6761
6762         ixgbe_up_complete(adapter);
6763
6764         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6765         udp_tunnel_get_rx_info(netdev);
6766
6767         return 0;
6768
6769 err_set_queues:
6770         ixgbe_free_irq(adapter);
6771 err_req_irq:
6772         ixgbe_free_all_rx_resources(adapter);
6773         if (hw->phy.ops.set_phy_power && !adapter->wol)
6774                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6775 err_setup_rx:
6776         ixgbe_free_all_tx_resources(adapter);
6777 err_setup_tx:
6778         ixgbe_reset(adapter);
6779
6780         return err;
6781 }
6782
6783 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6784 {
6785         ixgbe_ptp_suspend(adapter);
6786
6787         if (adapter->hw.phy.ops.enter_lplu) {
6788                 adapter->hw.phy.reset_disable = true;
6789                 ixgbe_down(adapter);
6790                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6791                 adapter->hw.phy.reset_disable = false;
6792         } else {
6793                 ixgbe_down(adapter);
6794         }
6795
6796         ixgbe_free_irq(adapter);
6797
6798         ixgbe_free_all_tx_resources(adapter);
6799         ixgbe_free_all_rx_resources(adapter);
6800 }
6801
6802 /**
6803  * ixgbe_close - Disables a network interface
6804  * @netdev: network interface device structure
6805  *
6806  * Returns 0, this is not allowed to fail
6807  *
6808  * The close entry point is called when an interface is de-activated
6809  * by the OS.  The hardware is still under the drivers control, but
6810  * needs to be disabled.  A global MAC reset is issued to stop the
6811  * hardware, and all transmit and receive resources are freed.
6812  **/
6813 int ixgbe_close(struct net_device *netdev)
6814 {
6815         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6816
6817         ixgbe_ptp_stop(adapter);
6818
6819         if (netif_device_present(netdev))
6820                 ixgbe_close_suspend(adapter);
6821
6822         ixgbe_fdir_filter_exit(adapter);
6823
6824         ixgbe_release_hw_control(adapter);
6825
6826         return 0;
6827 }
6828
6829 #ifdef CONFIG_PM
6830 static int ixgbe_resume(struct pci_dev *pdev)
6831 {
6832         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6833         struct net_device *netdev = adapter->netdev;
6834         u32 err;
6835
6836         adapter->hw.hw_addr = adapter->io_addr;
6837         pci_set_power_state(pdev, PCI_D0);
6838         pci_restore_state(pdev);
6839         /*
6840          * pci_restore_state clears dev->state_saved so call
6841          * pci_save_state to restore it.
6842          */
6843         pci_save_state(pdev);
6844
6845         err = pci_enable_device_mem(pdev);
6846         if (err) {
6847                 e_dev_err("Cannot enable PCI device from suspend\n");
6848                 return err;
6849         }
6850         smp_mb__before_atomic();
6851         clear_bit(__IXGBE_DISABLED, &adapter->state);
6852         pci_set_master(pdev);
6853
6854         pci_wake_from_d3(pdev, false);
6855
6856         ixgbe_reset(adapter);
6857
6858         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6859
6860         rtnl_lock();
6861         err = ixgbe_init_interrupt_scheme(adapter);
6862         if (!err && netif_running(netdev))
6863                 err = ixgbe_open(netdev);
6864
6865
6866         if (!err)
6867                 netif_device_attach(netdev);
6868         rtnl_unlock();
6869
6870         return err;
6871 }
6872 #endif /* CONFIG_PM */
6873
6874 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6875 {
6876         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6877         struct net_device *netdev = adapter->netdev;
6878         struct ixgbe_hw *hw = &adapter->hw;
6879         u32 ctrl;
6880         u32 wufc = adapter->wol;
6881 #ifdef CONFIG_PM
6882         int retval = 0;
6883 #endif
6884
6885         rtnl_lock();
6886         netif_device_detach(netdev);
6887
6888         if (netif_running(netdev))
6889                 ixgbe_close_suspend(adapter);
6890
6891         ixgbe_clear_interrupt_scheme(adapter);
6892         rtnl_unlock();
6893
6894 #ifdef CONFIG_PM
6895         retval = pci_save_state(pdev);
6896         if (retval)
6897                 return retval;
6898
6899 #endif
6900         if (hw->mac.ops.stop_link_on_d3)
6901                 hw->mac.ops.stop_link_on_d3(hw);
6902
6903         if (wufc) {
6904                 u32 fctrl;
6905
6906                 ixgbe_set_rx_mode(netdev);
6907
6908                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6909                 if (hw->mac.ops.enable_tx_laser)
6910                         hw->mac.ops.enable_tx_laser(hw);
6911
6912                 /* enable the reception of multicast packets */
6913                 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6914                 fctrl |= IXGBE_FCTRL_MPE;
6915                 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6916
6917                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6918                 ctrl |= IXGBE_CTRL_GIO_DIS;
6919                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6920
6921                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6922         } else {
6923                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6924                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6925         }
6926
6927         switch (hw->mac.type) {
6928         case ixgbe_mac_82598EB:
6929                 pci_wake_from_d3(pdev, false);
6930                 break;
6931         case ixgbe_mac_82599EB:
6932         case ixgbe_mac_X540:
6933         case ixgbe_mac_X550:
6934         case ixgbe_mac_X550EM_x:
6935         case ixgbe_mac_x550em_a:
6936                 pci_wake_from_d3(pdev, !!wufc);
6937                 break;
6938         default:
6939                 break;
6940         }
6941
6942         *enable_wake = !!wufc;
6943         if (hw->phy.ops.set_phy_power && !*enable_wake)
6944                 hw->phy.ops.set_phy_power(hw, false);
6945
6946         ixgbe_release_hw_control(adapter);
6947
6948         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6949                 pci_disable_device(pdev);
6950
6951         return 0;
6952 }
6953
6954 #ifdef CONFIG_PM
6955 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6956 {
6957         int retval;
6958         bool wake;
6959
6960         retval = __ixgbe_shutdown(pdev, &wake);
6961         if (retval)
6962                 return retval;
6963
6964         if (wake) {
6965                 pci_prepare_to_sleep(pdev);
6966         } else {
6967                 pci_wake_from_d3(pdev, false);
6968                 pci_set_power_state(pdev, PCI_D3hot);
6969         }
6970
6971         return 0;
6972 }
6973 #endif /* CONFIG_PM */
6974
6975 static void ixgbe_shutdown(struct pci_dev *pdev)
6976 {
6977         bool wake;
6978
6979         __ixgbe_shutdown(pdev, &wake);
6980
6981         if (system_state == SYSTEM_POWER_OFF) {
6982                 pci_wake_from_d3(pdev, wake);
6983                 pci_set_power_state(pdev, PCI_D3hot);
6984         }
6985 }
6986
6987 /**
6988  * ixgbe_update_stats - Update the board statistics counters.
6989  * @adapter: board private structure
6990  **/
6991 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6992 {
6993         struct net_device *netdev = adapter->netdev;
6994         struct ixgbe_hw *hw = &adapter->hw;
6995         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6996         u64 total_mpc = 0;
6997         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6998         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6999         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
7000         u64 alloc_rx_page = 0;
7001         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
7002
7003         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7004             test_bit(__IXGBE_RESETTING, &adapter->state))
7005                 return;
7006
7007         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
7008                 u64 rsc_count = 0;
7009                 u64 rsc_flush = 0;
7010                 for (i = 0; i < adapter->num_rx_queues; i++) {
7011                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
7012                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
7013                 }
7014                 adapter->rsc_total_count = rsc_count;
7015                 adapter->rsc_total_flush = rsc_flush;
7016         }
7017
7018         for (i = 0; i < adapter->num_rx_queues; i++) {
7019                 struct ixgbe_ring *rx_ring = READ_ONCE(adapter->rx_ring[i]);
7020
7021                 if (!rx_ring)
7022                         continue;
7023                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
7024                 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
7025                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
7026                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
7027                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
7028                 bytes += rx_ring->stats.bytes;
7029                 packets += rx_ring->stats.packets;
7030         }
7031         adapter->non_eop_descs = non_eop_descs;
7032         adapter->alloc_rx_page = alloc_rx_page;
7033         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
7034         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
7035         adapter->hw_csum_rx_error = hw_csum_rx_error;
7036         netdev->stats.rx_bytes = bytes;
7037         netdev->stats.rx_packets = packets;
7038
7039         bytes = 0;
7040         packets = 0;
7041         /* gather some stats to the adapter struct that are per queue */
7042         for (i = 0; i < adapter->num_tx_queues; i++) {
7043                 struct ixgbe_ring *tx_ring = READ_ONCE(adapter->tx_ring[i]);
7044
7045                 if (!tx_ring)
7046                         continue;
7047                 restart_queue += tx_ring->tx_stats.restart_queue;
7048                 tx_busy += tx_ring->tx_stats.tx_busy;
7049                 bytes += tx_ring->stats.bytes;
7050                 packets += tx_ring->stats.packets;
7051         }
7052         for (i = 0; i < adapter->num_xdp_queues; i++) {
7053                 struct ixgbe_ring *xdp_ring = READ_ONCE(adapter->xdp_ring[i]);
7054
7055                 if (!xdp_ring)
7056                         continue;
7057                 restart_queue += xdp_ring->tx_stats.restart_queue;
7058                 tx_busy += xdp_ring->tx_stats.tx_busy;
7059                 bytes += xdp_ring->stats.bytes;
7060                 packets += xdp_ring->stats.packets;
7061         }
7062         adapter->restart_queue = restart_queue;
7063         adapter->tx_busy = tx_busy;
7064         netdev->stats.tx_bytes = bytes;
7065         netdev->stats.tx_packets = packets;
7066
7067         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
7068
7069         /* 8 register reads */
7070         for (i = 0; i < 8; i++) {
7071                 /* for packet buffers not used, the register should read 0 */
7072                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
7073                 missed_rx += mpc;
7074                 hwstats->mpc[i] += mpc;
7075                 total_mpc += hwstats->mpc[i];
7076                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
7077                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
7078                 switch (hw->mac.type) {
7079                 case ixgbe_mac_82598EB:
7080                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
7081                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
7082                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
7083                         hwstats->pxonrxc[i] +=
7084                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
7085                         break;
7086                 case ixgbe_mac_82599EB:
7087                 case ixgbe_mac_X540:
7088                 case ixgbe_mac_X550:
7089                 case ixgbe_mac_X550EM_x:
7090                 case ixgbe_mac_x550em_a:
7091                         hwstats->pxonrxc[i] +=
7092                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
7093                         break;
7094                 default:
7095                         break;
7096                 }
7097         }
7098
7099         /*16 register reads */
7100         for (i = 0; i < 16; i++) {
7101                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
7102                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
7103                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
7104                     (hw->mac.type == ixgbe_mac_X540) ||
7105                     (hw->mac.type == ixgbe_mac_X550) ||
7106                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
7107                     (hw->mac.type == ixgbe_mac_x550em_a)) {
7108                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
7109                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
7110                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
7111                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
7112                 }
7113         }
7114
7115         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
7116         /* work around hardware counting issue */
7117         hwstats->gprc -= missed_rx;
7118
7119         ixgbe_update_xoff_received(adapter);
7120
7121         /* 82598 hardware only has a 32 bit counter in the high register */
7122         switch (hw->mac.type) {
7123         case ixgbe_mac_82598EB:
7124                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
7125                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
7126                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
7127                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
7128                 break;
7129         case ixgbe_mac_X540:
7130         case ixgbe_mac_X550:
7131         case ixgbe_mac_X550EM_x:
7132         case ixgbe_mac_x550em_a:
7133                 /* OS2BMC stats are X540 and later */
7134                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
7135                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
7136                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
7137                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
7138                 /* fall through */
7139         case ixgbe_mac_82599EB:
7140                 for (i = 0; i < 16; i++)
7141                         adapter->hw_rx_no_dma_resources +=
7142                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
7143                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
7144                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
7145                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
7146                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
7147                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
7148                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
7149                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
7150                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
7151                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
7152 #ifdef IXGBE_FCOE
7153                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
7154                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
7155                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
7156                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
7157                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
7158                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
7159                 /* Add up per cpu counters for total ddp aloc fail */
7160                 if (adapter->fcoe.ddp_pool) {
7161                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
7162                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
7163                         unsigned int cpu;
7164                         u64 noddp = 0, noddp_ext_buff = 0;
7165                         for_each_possible_cpu(cpu) {
7166                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7167                                 noddp += ddp_pool->noddp;
7168                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7169                         }
7170                         hwstats->fcoe_noddp = noddp;
7171                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7172                 }
7173 #endif /* IXGBE_FCOE */
7174                 break;
7175         default:
7176                 break;
7177         }
7178         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7179         hwstats->bprc += bprc;
7180         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7181         if (hw->mac.type == ixgbe_mac_82598EB)
7182                 hwstats->mprc -= bprc;
7183         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7184         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7185         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7186         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7187         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7188         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7189         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7190         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7191         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7192         hwstats->lxontxc += lxon;
7193         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7194         hwstats->lxofftxc += lxoff;
7195         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7196         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7197         /*
7198          * 82598 errata - tx of flow control packets is included in tx counters
7199          */
7200         xon_off_tot = lxon + lxoff;
7201         hwstats->gptc -= xon_off_tot;
7202         hwstats->mptc -= xon_off_tot;
7203         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7204         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7205         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7206         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7207         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7208         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7209         hwstats->ptc64 -= xon_off_tot;
7210         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7211         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7212         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7213         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7214         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7215         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7216
7217         /* Fill out the OS statistics structure */
7218         netdev->stats.multicast = hwstats->mprc;
7219
7220         /* Rx Errors */
7221         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7222         netdev->stats.rx_dropped = 0;
7223         netdev->stats.rx_length_errors = hwstats->rlec;
7224         netdev->stats.rx_crc_errors = hwstats->crcerrs;
7225         netdev->stats.rx_missed_errors = total_mpc;
7226 }
7227
7228 /**
7229  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7230  * @adapter: pointer to the device adapter structure
7231  **/
7232 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7233 {
7234         struct ixgbe_hw *hw = &adapter->hw;
7235         int i;
7236
7237         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7238                 return;
7239
7240         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7241
7242         /* if interface is down do nothing */
7243         if (test_bit(__IXGBE_DOWN, &adapter->state))
7244                 return;
7245
7246         /* do nothing if we are not using signature filters */
7247         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7248                 return;
7249
7250         adapter->fdir_overflow++;
7251
7252         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7253                 for (i = 0; i < adapter->num_tx_queues; i++)
7254                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7255                                 &(adapter->tx_ring[i]->state));
7256                 for (i = 0; i < adapter->num_xdp_queues; i++)
7257                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7258                                 &adapter->xdp_ring[i]->state);
7259                 /* re-enable flow director interrupts */
7260                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7261         } else {
7262                 e_err(probe, "failed to finish FDIR re-initialization, "
7263                       "ignored adding FDIR ATR filters\n");
7264         }
7265 }
7266
7267 /**
7268  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7269  * @adapter: pointer to the device adapter structure
7270  *
7271  * This function serves two purposes.  First it strobes the interrupt lines
7272  * in order to make certain interrupts are occurring.  Secondly it sets the
7273  * bits needed to check for TX hangs.  As a result we should immediately
7274  * determine if a hang has occurred.
7275  */
7276 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7277 {
7278         struct ixgbe_hw *hw = &adapter->hw;
7279         u64 eics = 0;
7280         int i;
7281
7282         /* If we're down, removing or resetting, just bail */
7283         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7284             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7285             test_bit(__IXGBE_RESETTING, &adapter->state))
7286                 return;
7287
7288         /* Force detection of hung controller */
7289         if (netif_carrier_ok(adapter->netdev)) {
7290                 for (i = 0; i < adapter->num_tx_queues; i++)
7291                         set_check_for_tx_hang(adapter->tx_ring[i]);
7292                 for (i = 0; i < adapter->num_xdp_queues; i++)
7293                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7294         }
7295
7296         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7297                 /*
7298                  * for legacy and MSI interrupts don't set any bits
7299                  * that are enabled for EIAM, because this operation
7300                  * would set *both* EIMS and EICS for any bit in EIAM
7301                  */
7302                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7303                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7304         } else {
7305                 /* get one bit for every active tx/rx interrupt vector */
7306                 for (i = 0; i < adapter->num_q_vectors; i++) {
7307                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7308                         if (qv->rx.ring || qv->tx.ring)
7309                                 eics |= BIT_ULL(i);
7310                 }
7311         }
7312
7313         /* Cause software interrupt to ensure rings are cleaned */
7314         ixgbe_irq_rearm_queues(adapter, eics);
7315 }
7316
7317 /**
7318  * ixgbe_watchdog_update_link - update the link status
7319  * @adapter: pointer to the device adapter structure
7320  **/
7321 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7322 {
7323         struct ixgbe_hw *hw = &adapter->hw;
7324         u32 link_speed = adapter->link_speed;
7325         bool link_up = adapter->link_up;
7326         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7327
7328         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7329                 return;
7330
7331         if (hw->mac.ops.check_link) {
7332                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7333         } else {
7334                 /* always assume link is up, if no check link function */
7335                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7336                 link_up = true;
7337         }
7338
7339         if (adapter->ixgbe_ieee_pfc)
7340                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7341
7342         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7343                 hw->mac.ops.fc_enable(hw);
7344                 ixgbe_set_rx_drop_en(adapter);
7345         }
7346
7347         if (link_up ||
7348             time_after(jiffies, (adapter->link_check_timeout +
7349                                  IXGBE_TRY_LINK_TIMEOUT))) {
7350                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7351                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7352                 IXGBE_WRITE_FLUSH(hw);
7353         }
7354
7355         adapter->link_up = link_up;
7356         adapter->link_speed = link_speed;
7357 }
7358
7359 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7360 {
7361 #ifdef CONFIG_IXGBE_DCB
7362         struct net_device *netdev = adapter->netdev;
7363         struct dcb_app app = {
7364                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7365                               .protocol = 0,
7366                              };
7367         u8 up = 0;
7368
7369         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7370                 up = dcb_ieee_getapp_mask(netdev, &app);
7371
7372         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7373 #endif
7374 }
7375
7376 /**
7377  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7378  *                             print link up message
7379  * @adapter: pointer to the device adapter structure
7380  **/
7381 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7382 {
7383         struct net_device *netdev = adapter->netdev;
7384         struct ixgbe_hw *hw = &adapter->hw;
7385         u32 link_speed = adapter->link_speed;
7386         const char *speed_str;
7387         bool flow_rx, flow_tx;
7388
7389         /* only continue if link was previously down */
7390         if (netif_carrier_ok(netdev))
7391                 return;
7392
7393         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7394
7395         switch (hw->mac.type) {
7396         case ixgbe_mac_82598EB: {
7397                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7398                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7399                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7400                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7401         }
7402                 break;
7403         case ixgbe_mac_X540:
7404         case ixgbe_mac_X550:
7405         case ixgbe_mac_X550EM_x:
7406         case ixgbe_mac_x550em_a:
7407         case ixgbe_mac_82599EB: {
7408                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7409                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7410                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7411                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7412         }
7413                 break;
7414         default:
7415                 flow_tx = false;
7416                 flow_rx = false;
7417                 break;
7418         }
7419
7420         adapter->last_rx_ptp_check = jiffies;
7421
7422         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7423                 ixgbe_ptp_start_cyclecounter(adapter);
7424
7425         switch (link_speed) {
7426         case IXGBE_LINK_SPEED_10GB_FULL:
7427                 speed_str = "10 Gbps";
7428                 break;
7429         case IXGBE_LINK_SPEED_5GB_FULL:
7430                 speed_str = "5 Gbps";
7431                 break;
7432         case IXGBE_LINK_SPEED_2_5GB_FULL:
7433                 speed_str = "2.5 Gbps";
7434                 break;
7435         case IXGBE_LINK_SPEED_1GB_FULL:
7436                 speed_str = "1 Gbps";
7437                 break;
7438         case IXGBE_LINK_SPEED_100_FULL:
7439                 speed_str = "100 Mbps";
7440                 break;
7441         case IXGBE_LINK_SPEED_10_FULL:
7442                 speed_str = "10 Mbps";
7443                 break;
7444         default:
7445                 speed_str = "unknown speed";
7446                 break;
7447         }
7448         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7449                ((flow_rx && flow_tx) ? "RX/TX" :
7450                (flow_rx ? "RX" :
7451                (flow_tx ? "TX" : "None"))));
7452
7453         netif_carrier_on(netdev);
7454         ixgbe_check_vf_rate_limit(adapter);
7455
7456         /* enable transmits */
7457         netif_tx_wake_all_queues(adapter->netdev);
7458
7459         /* update the default user priority for VFs */
7460         ixgbe_update_default_up(adapter);
7461
7462         /* ping all the active vfs to let them know link has changed */
7463         ixgbe_ping_all_vfs(adapter);
7464 }
7465
7466 /**
7467  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7468  *                               print link down message
7469  * @adapter: pointer to the adapter structure
7470  **/
7471 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7472 {
7473         struct net_device *netdev = adapter->netdev;
7474         struct ixgbe_hw *hw = &adapter->hw;
7475
7476         adapter->link_up = false;
7477         adapter->link_speed = 0;
7478
7479         /* only continue if link was up previously */
7480         if (!netif_carrier_ok(netdev))
7481                 return;
7482
7483         /* poll for SFP+ cable when link is down */
7484         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7485                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7486
7487         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7488                 ixgbe_ptp_start_cyclecounter(adapter);
7489
7490         e_info(drv, "NIC Link is Down\n");
7491         netif_carrier_off(netdev);
7492
7493         /* ping all the active vfs to let them know link has changed */
7494         ixgbe_ping_all_vfs(adapter);
7495 }
7496
7497 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7498 {
7499         int i;
7500
7501         for (i = 0; i < adapter->num_tx_queues; i++) {
7502                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7503
7504                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7505                         return true;
7506         }
7507
7508         for (i = 0; i < adapter->num_xdp_queues; i++) {
7509                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7510
7511                 if (ring->next_to_use != ring->next_to_clean)
7512                         return true;
7513         }
7514
7515         return false;
7516 }
7517
7518 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7519 {
7520         struct ixgbe_hw *hw = &adapter->hw;
7521         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7522         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7523
7524         int i, j;
7525
7526         if (!adapter->num_vfs)
7527                 return false;
7528
7529         /* resetting the PF is only needed for MAC before X550 */
7530         if (hw->mac.type >= ixgbe_mac_X550)
7531                 return false;
7532
7533         for (i = 0; i < adapter->num_vfs; i++) {
7534                 for (j = 0; j < q_per_pool; j++) {
7535                         u32 h, t;
7536
7537                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7538                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7539
7540                         if (h != t)
7541                                 return true;
7542                 }
7543         }
7544
7545         return false;
7546 }
7547
7548 /**
7549  * ixgbe_watchdog_flush_tx - flush queues on link down
7550  * @adapter: pointer to the device adapter structure
7551  **/
7552 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7553 {
7554         if (!netif_carrier_ok(adapter->netdev)) {
7555                 if (ixgbe_ring_tx_pending(adapter) ||
7556                     ixgbe_vf_tx_pending(adapter)) {
7557                         /* We've lost link, so the controller stops DMA,
7558                          * but we've got queued Tx work that's never going
7559                          * to get done, so reset controller to flush Tx.
7560                          * (Do the reset outside of interrupt context).
7561                          */
7562                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7563                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7564                 }
7565         }
7566 }
7567
7568 #ifdef CONFIG_PCI_IOV
7569 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7570 {
7571         struct ixgbe_hw *hw = &adapter->hw;
7572         struct pci_dev *pdev = adapter->pdev;
7573         unsigned int vf;
7574         u32 gpc;
7575
7576         if (!(netif_carrier_ok(adapter->netdev)))
7577                 return;
7578
7579         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7580         if (gpc) /* If incrementing then no need for the check below */
7581                 return;
7582         /* Check to see if a bad DMA write target from an errant or
7583          * malicious VF has caused a PCIe error.  If so then we can
7584          * issue a VFLR to the offending VF(s) and then resume without
7585          * requesting a full slot reset.
7586          */
7587
7588         if (!pdev)
7589                 return;
7590
7591         /* check status reg for all VFs owned by this PF */
7592         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7593                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7594                 u16 status_reg;
7595
7596                 if (!vfdev)
7597                         continue;
7598                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7599                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7600                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7601                         pcie_flr(vfdev);
7602         }
7603 }
7604
7605 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7606 {
7607         u32 ssvpc;
7608
7609         /* Do not perform spoof check for 82598 or if not in IOV mode */
7610         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7611             adapter->num_vfs == 0)
7612                 return;
7613
7614         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7615
7616         /*
7617          * ssvpc register is cleared on read, if zero then no
7618          * spoofed packets in the last interval.
7619          */
7620         if (!ssvpc)
7621                 return;
7622
7623         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7624 }
7625 #else
7626 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7627 {
7628 }
7629
7630 static void
7631 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7632 {
7633 }
7634 #endif /* CONFIG_PCI_IOV */
7635
7636
7637 /**
7638  * ixgbe_watchdog_subtask - check and bring link up
7639  * @adapter: pointer to the device adapter structure
7640  **/
7641 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7642 {
7643         /* if interface is down, removing or resetting, do nothing */
7644         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7645             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7646             test_bit(__IXGBE_RESETTING, &adapter->state))
7647                 return;
7648
7649         ixgbe_watchdog_update_link(adapter);
7650
7651         if (adapter->link_up)
7652                 ixgbe_watchdog_link_is_up(adapter);
7653         else
7654                 ixgbe_watchdog_link_is_down(adapter);
7655
7656         ixgbe_check_for_bad_vf(adapter);
7657         ixgbe_spoof_check(adapter);
7658         ixgbe_update_stats(adapter);
7659
7660         ixgbe_watchdog_flush_tx(adapter);
7661 }
7662
7663 /**
7664  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7665  * @adapter: the ixgbe adapter structure
7666  **/
7667 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7668 {
7669         struct ixgbe_hw *hw = &adapter->hw;
7670         s32 err;
7671
7672         /* not searching for SFP so there is nothing to do here */
7673         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7674             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7675                 return;
7676
7677         if (adapter->sfp_poll_time &&
7678             time_after(adapter->sfp_poll_time, jiffies))
7679                 return; /* If not yet time to poll for SFP */
7680
7681         /* someone else is in init, wait until next service event */
7682         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7683                 return;
7684
7685         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7686
7687         err = hw->phy.ops.identify_sfp(hw);
7688         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7689                 goto sfp_out;
7690
7691         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7692                 /* If no cable is present, then we need to reset
7693                  * the next time we find a good cable. */
7694                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7695         }
7696
7697         /* exit on error */
7698         if (err)
7699                 goto sfp_out;
7700
7701         /* exit if reset not needed */
7702         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7703                 goto sfp_out;
7704
7705         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7706
7707         /*
7708          * A module may be identified correctly, but the EEPROM may not have
7709          * support for that module.  setup_sfp() will fail in that case, so
7710          * we should not allow that module to load.
7711          */
7712         if (hw->mac.type == ixgbe_mac_82598EB)
7713                 err = hw->phy.ops.reset(hw);
7714         else
7715                 err = hw->mac.ops.setup_sfp(hw);
7716
7717         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7718                 goto sfp_out;
7719
7720         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7721         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7722
7723 sfp_out:
7724         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7725
7726         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7727             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7728                 e_dev_err("failed to initialize because an unsupported "
7729                           "SFP+ module type was detected.\n");
7730                 e_dev_err("Reload the driver after installing a "
7731                           "supported module.\n");
7732                 unregister_netdev(adapter->netdev);
7733         }
7734 }
7735
7736 /**
7737  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7738  * @adapter: the ixgbe adapter structure
7739  **/
7740 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7741 {
7742         struct ixgbe_hw *hw = &adapter->hw;
7743         u32 cap_speed;
7744         u32 speed;
7745         bool autoneg = false;
7746
7747         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7748                 return;
7749
7750         /* someone else is in init, wait until next service event */
7751         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7752                 return;
7753
7754         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7755
7756         hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7757
7758         /* advertise highest capable link speed */
7759         if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7760                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7761         else
7762                 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7763                                      IXGBE_LINK_SPEED_1GB_FULL);
7764
7765         if (hw->mac.ops.setup_link)
7766                 hw->mac.ops.setup_link(hw, speed, true);
7767
7768         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7769         adapter->link_check_timeout = jiffies;
7770         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7771 }
7772
7773 /**
7774  * ixgbe_service_timer - Timer Call-back
7775  * @t: pointer to timer_list structure
7776  **/
7777 static void ixgbe_service_timer(struct timer_list *t)
7778 {
7779         struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7780         unsigned long next_event_offset;
7781
7782         /* poll faster when waiting for link */
7783         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7784                 next_event_offset = HZ / 10;
7785         else
7786                 next_event_offset = HZ * 2;
7787
7788         /* Reset the timer */
7789         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7790
7791         ixgbe_service_event_schedule(adapter);
7792 }
7793
7794 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7795 {
7796         struct ixgbe_hw *hw = &adapter->hw;
7797         u32 status;
7798
7799         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7800                 return;
7801
7802         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7803
7804         if (!hw->phy.ops.handle_lasi)
7805                 return;
7806
7807         status = hw->phy.ops.handle_lasi(&adapter->hw);
7808         if (status != IXGBE_ERR_OVERTEMP)
7809                 return;
7810
7811         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7812 }
7813
7814 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7815 {
7816         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7817                 return;
7818
7819         rtnl_lock();
7820         /* If we're already down, removing or resetting, just bail */
7821         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7822             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7823             test_bit(__IXGBE_RESETTING, &adapter->state)) {
7824                 rtnl_unlock();
7825                 return;
7826         }
7827
7828         ixgbe_dump(adapter);
7829         netdev_err(adapter->netdev, "Reset adapter\n");
7830         adapter->tx_timeout_count++;
7831
7832         ixgbe_reinit_locked(adapter);
7833         rtnl_unlock();
7834 }
7835
7836 /**
7837  * ixgbe_service_task - manages and runs subtasks
7838  * @work: pointer to work_struct containing our data
7839  **/
7840 static void ixgbe_service_task(struct work_struct *work)
7841 {
7842         struct ixgbe_adapter *adapter = container_of(work,
7843                                                      struct ixgbe_adapter,
7844                                                      service_task);
7845         if (ixgbe_removed(adapter->hw.hw_addr)) {
7846                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7847                         rtnl_lock();
7848                         ixgbe_down(adapter);
7849                         rtnl_unlock();
7850                 }
7851                 ixgbe_service_event_complete(adapter);
7852                 return;
7853         }
7854         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7855                 rtnl_lock();
7856                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7857                 udp_tunnel_get_rx_info(adapter->netdev);
7858                 rtnl_unlock();
7859         }
7860         ixgbe_reset_subtask(adapter);
7861         ixgbe_phy_interrupt_subtask(adapter);
7862         ixgbe_sfp_detection_subtask(adapter);
7863         ixgbe_sfp_link_config_subtask(adapter);
7864         ixgbe_check_overtemp_subtask(adapter);
7865         ixgbe_watchdog_subtask(adapter);
7866         ixgbe_fdir_reinit_subtask(adapter);
7867         ixgbe_check_hang_subtask(adapter);
7868
7869         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7870                 ixgbe_ptp_overflow_check(adapter);
7871                 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER)
7872                         ixgbe_ptp_rx_hang(adapter);
7873                 ixgbe_ptp_tx_hang(adapter);
7874         }
7875
7876         ixgbe_service_event_complete(adapter);
7877 }
7878
7879 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7880                      struct ixgbe_tx_buffer *first,
7881                      u8 *hdr_len,
7882                      struct ixgbe_ipsec_tx_data *itd)
7883 {
7884         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7885         struct sk_buff *skb = first->skb;
7886         union {
7887                 struct iphdr *v4;
7888                 struct ipv6hdr *v6;
7889                 unsigned char *hdr;
7890         } ip;
7891         union {
7892                 struct tcphdr *tcp;
7893                 unsigned char *hdr;
7894         } l4;
7895         u32 paylen, l4_offset;
7896         u32 fceof_saidx = 0;
7897         int err;
7898
7899         if (skb->ip_summed != CHECKSUM_PARTIAL)
7900                 return 0;
7901
7902         if (!skb_is_gso(skb))
7903                 return 0;
7904
7905         err = skb_cow_head(skb, 0);
7906         if (err < 0)
7907                 return err;
7908
7909         if (eth_p_mpls(first->protocol))
7910                 ip.hdr = skb_inner_network_header(skb);
7911         else
7912                 ip.hdr = skb_network_header(skb);
7913         l4.hdr = skb_checksum_start(skb);
7914
7915         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7916         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7917
7918         /* initialize outer IP header fields */
7919         if (ip.v4->version == 4) {
7920                 unsigned char *csum_start = skb_checksum_start(skb);
7921                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7922                 int len = csum_start - trans_start;
7923
7924                 /* IP header will have to cancel out any data that
7925                  * is not a part of the outer IP header, so set to
7926                  * a reverse csum if needed, else init check to 0.
7927                  */
7928                 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
7929                                            csum_fold(csum_partial(trans_start,
7930                                                                   len, 0)) : 0;
7931                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7932
7933                 ip.v4->tot_len = 0;
7934                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7935                                    IXGBE_TX_FLAGS_CSUM |
7936                                    IXGBE_TX_FLAGS_IPV4;
7937         } else {
7938                 ip.v6->payload_len = 0;
7939                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7940                                    IXGBE_TX_FLAGS_CSUM;
7941         }
7942
7943         /* determine offset of inner transport header */
7944         l4_offset = l4.hdr - skb->data;
7945
7946         /* compute length of segmentation header */
7947         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7948
7949         /* remove payload length from inner checksum */
7950         paylen = skb->len - l4_offset;
7951         csum_replace_by_diff(&l4.tcp->check, (__force __wsum)htonl(paylen));
7952
7953         /* update gso size and bytecount with header size */
7954         first->gso_segs = skb_shinfo(skb)->gso_segs;
7955         first->bytecount += (first->gso_segs - 1) * *hdr_len;
7956
7957         /* mss_l4len_id: use 0 as index for TSO */
7958         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7959         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7960
7961         fceof_saidx |= itd->sa_idx;
7962         type_tucmd |= itd->flags | itd->trailer_len;
7963
7964         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7965         vlan_macip_lens = l4.hdr - ip.hdr;
7966         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7967         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7968
7969         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
7970                           mss_l4len_idx);
7971
7972         return 1;
7973 }
7974
7975 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7976 {
7977         unsigned int offset = 0;
7978
7979         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7980
7981         return offset == skb_checksum_start_offset(skb);
7982 }
7983
7984 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7985                           struct ixgbe_tx_buffer *first,
7986                           struct ixgbe_ipsec_tx_data *itd)
7987 {
7988         struct sk_buff *skb = first->skb;
7989         u32 vlan_macip_lens = 0;
7990         u32 fceof_saidx = 0;
7991         u32 type_tucmd = 0;
7992
7993         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7994 csum_failed:
7995                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7996                                          IXGBE_TX_FLAGS_CC)))
7997                         return;
7998                 goto no_csum;
7999         }
8000
8001         switch (skb->csum_offset) {
8002         case offsetof(struct tcphdr, check):
8003                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
8004                 /* fall through */
8005         case offsetof(struct udphdr, check):
8006                 break;
8007         case offsetof(struct sctphdr, checksum):
8008                 /* validate that this is actually an SCTP request */
8009                 if (((first->protocol == htons(ETH_P_IP)) &&
8010                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
8011                     ((first->protocol == htons(ETH_P_IPV6)) &&
8012                      ixgbe_ipv6_csum_is_sctp(skb))) {
8013                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
8014                         break;
8015                 }
8016                 /* fall through */
8017         default:
8018                 skb_checksum_help(skb);
8019                 goto csum_failed;
8020         }
8021
8022         /* update TX checksum flag */
8023         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
8024         vlan_macip_lens = skb_checksum_start_offset(skb) -
8025                           skb_network_offset(skb);
8026 no_csum:
8027         /* vlan_macip_lens: MACLEN, VLAN tag */
8028         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
8029         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8030
8031         fceof_saidx |= itd->sa_idx;
8032         type_tucmd |= itd->flags | itd->trailer_len;
8033
8034         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 0);
8035 }
8036
8037 #define IXGBE_SET_FLAG(_input, _flag, _result) \
8038         ((_flag <= _result) ? \
8039          ((u32)(_input & _flag) * (_result / _flag)) : \
8040          ((u32)(_input & _flag) / (_flag / _result)))
8041
8042 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
8043 {
8044         /* set type for advanced descriptor with frame checksum insertion */
8045         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8046                        IXGBE_ADVTXD_DCMD_DEXT |
8047                        IXGBE_ADVTXD_DCMD_IFCS;
8048
8049         /* set HW vlan bit if vlan is present */
8050         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
8051                                    IXGBE_ADVTXD_DCMD_VLE);
8052
8053         /* set segmentation enable bits for TSO/FSO */
8054         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
8055                                    IXGBE_ADVTXD_DCMD_TSE);
8056
8057         /* set timestamp bit if present */
8058         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
8059                                    IXGBE_ADVTXD_MAC_TSTAMP);
8060
8061         /* insert frame checksum */
8062         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
8063
8064         return cmd_type;
8065 }
8066
8067 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
8068                                    u32 tx_flags, unsigned int paylen)
8069 {
8070         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
8071
8072         /* enable L4 checksum for TSO and TX checksum offload */
8073         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8074                                         IXGBE_TX_FLAGS_CSUM,
8075                                         IXGBE_ADVTXD_POPTS_TXSM);
8076
8077         /* enable IPv4 checksum for TSO */
8078         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8079                                         IXGBE_TX_FLAGS_IPV4,
8080                                         IXGBE_ADVTXD_POPTS_IXSM);
8081
8082         /* enable IPsec */
8083         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8084                                         IXGBE_TX_FLAGS_IPSEC,
8085                                         IXGBE_ADVTXD_POPTS_IPSEC);
8086
8087         /*
8088          * Check Context must be set if Tx switch is enabled, which it
8089          * always is for case where virtual functions are running
8090          */
8091         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8092                                         IXGBE_TX_FLAGS_CC,
8093                                         IXGBE_ADVTXD_CC);
8094
8095         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
8096 }
8097
8098 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8099 {
8100         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
8101
8102         /* Herbert's original patch had:
8103          *  smp_mb__after_netif_stop_queue();
8104          * but since that doesn't exist yet, just open code it.
8105          */
8106         smp_mb();
8107
8108         /* We need to check again in a case another CPU has just
8109          * made room available.
8110          */
8111         if (likely(ixgbe_desc_unused(tx_ring) < size))
8112                 return -EBUSY;
8113
8114         /* A reprieve! - use start_queue because it doesn't call schedule */
8115         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
8116         ++tx_ring->tx_stats.restart_queue;
8117         return 0;
8118 }
8119
8120 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8121 {
8122         if (likely(ixgbe_desc_unused(tx_ring) >= size))
8123                 return 0;
8124
8125         return __ixgbe_maybe_stop_tx(tx_ring, size);
8126 }
8127
8128 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
8129                        IXGBE_TXD_CMD_RS)
8130
8131 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
8132                         struct ixgbe_tx_buffer *first,
8133                         const u8 hdr_len)
8134 {
8135         struct sk_buff *skb = first->skb;
8136         struct ixgbe_tx_buffer *tx_buffer;
8137         union ixgbe_adv_tx_desc *tx_desc;
8138         struct skb_frag_struct *frag;
8139         dma_addr_t dma;
8140         unsigned int data_len, size;
8141         u32 tx_flags = first->tx_flags;
8142         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
8143         u16 i = tx_ring->next_to_use;
8144
8145         tx_desc = IXGBE_TX_DESC(tx_ring, i);
8146
8147         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
8148
8149         size = skb_headlen(skb);
8150         data_len = skb->data_len;
8151
8152 #ifdef IXGBE_FCOE
8153         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
8154                 if (data_len < sizeof(struct fcoe_crc_eof)) {
8155                         size -= sizeof(struct fcoe_crc_eof) - data_len;
8156                         data_len = 0;
8157                 } else {
8158                         data_len -= sizeof(struct fcoe_crc_eof);
8159                 }
8160         }
8161
8162 #endif
8163         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
8164
8165         tx_buffer = first;
8166
8167         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
8168                 if (dma_mapping_error(tx_ring->dev, dma))
8169                         goto dma_error;
8170
8171                 /* record length, and DMA address */
8172                 dma_unmap_len_set(tx_buffer, len, size);
8173                 dma_unmap_addr_set(tx_buffer, dma, dma);
8174
8175                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8176
8177                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8178                         tx_desc->read.cmd_type_len =
8179                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8180
8181                         i++;
8182                         tx_desc++;
8183                         if (i == tx_ring->count) {
8184                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8185                                 i = 0;
8186                         }
8187                         tx_desc->read.olinfo_status = 0;
8188
8189                         dma += IXGBE_MAX_DATA_PER_TXD;
8190                         size -= IXGBE_MAX_DATA_PER_TXD;
8191
8192                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8193                 }
8194
8195                 if (likely(!data_len))
8196                         break;
8197
8198                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8199
8200                 i++;
8201                 tx_desc++;
8202                 if (i == tx_ring->count) {
8203                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8204                         i = 0;
8205                 }
8206                 tx_desc->read.olinfo_status = 0;
8207
8208 #ifdef IXGBE_FCOE
8209                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8210 #else
8211                 size = skb_frag_size(frag);
8212 #endif
8213                 data_len -= size;
8214
8215                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8216                                        DMA_TO_DEVICE);
8217
8218                 tx_buffer = &tx_ring->tx_buffer_info[i];
8219         }
8220
8221         /* write last descriptor with RS and EOP bits */
8222         cmd_type |= size | IXGBE_TXD_CMD;
8223         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8224
8225         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8226
8227         /* set the timestamp */
8228         first->time_stamp = jiffies;
8229
8230         /*
8231          * Force memory writes to complete before letting h/w know there
8232          * are new descriptors to fetch.  (Only applicable for weak-ordered
8233          * memory model archs, such as IA-64).
8234          *
8235          * We also need this memory barrier to make certain all of the
8236          * status bits have been updated before next_to_watch is written.
8237          */
8238         wmb();
8239
8240         /* set next_to_watch value indicating a packet is present */
8241         first->next_to_watch = tx_desc;
8242
8243         i++;
8244         if (i == tx_ring->count)
8245                 i = 0;
8246
8247         tx_ring->next_to_use = i;
8248
8249         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8250
8251         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
8252                 writel(i, tx_ring->tail);
8253
8254                 /* we need this if more than one processor can write to our tail
8255                  * at a time, it synchronizes IO on IA64/Altix systems
8256                  */
8257                 mmiowb();
8258         }
8259
8260         return 0;
8261 dma_error:
8262         dev_err(tx_ring->dev, "TX DMA map failed\n");
8263
8264         /* clear dma mappings for failed tx_buffer_info map */
8265         for (;;) {
8266                 tx_buffer = &tx_ring->tx_buffer_info[i];
8267                 if (dma_unmap_len(tx_buffer, len))
8268                         dma_unmap_page(tx_ring->dev,
8269                                        dma_unmap_addr(tx_buffer, dma),
8270                                        dma_unmap_len(tx_buffer, len),
8271                                        DMA_TO_DEVICE);
8272                 dma_unmap_len_set(tx_buffer, len, 0);
8273                 if (tx_buffer == first)
8274                         break;
8275                 if (i == 0)
8276                         i += tx_ring->count;
8277                 i--;
8278         }
8279
8280         dev_kfree_skb_any(first->skb);
8281         first->skb = NULL;
8282
8283         tx_ring->next_to_use = i;
8284
8285         return -1;
8286 }
8287
8288 static void ixgbe_atr(struct ixgbe_ring *ring,
8289                       struct ixgbe_tx_buffer *first)
8290 {
8291         struct ixgbe_q_vector *q_vector = ring->q_vector;
8292         union ixgbe_atr_hash_dword input = { .dword = 0 };
8293         union ixgbe_atr_hash_dword common = { .dword = 0 };
8294         union {
8295                 unsigned char *network;
8296                 struct iphdr *ipv4;
8297                 struct ipv6hdr *ipv6;
8298         } hdr;
8299         struct tcphdr *th;
8300         unsigned int hlen;
8301         struct sk_buff *skb;
8302         __be16 vlan_id;
8303         int l4_proto;
8304
8305         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8306         if (!q_vector)
8307                 return;
8308
8309         /* do nothing if sampling is disabled */
8310         if (!ring->atr_sample_rate)
8311                 return;
8312
8313         ring->atr_count++;
8314
8315         /* currently only IPv4/IPv6 with TCP is supported */
8316         if ((first->protocol != htons(ETH_P_IP)) &&
8317             (first->protocol != htons(ETH_P_IPV6)))
8318                 return;
8319
8320         /* snag network header to get L4 type and address */
8321         skb = first->skb;
8322         hdr.network = skb_network_header(skb);
8323         if (unlikely(hdr.network <= skb->data))
8324                 return;
8325         if (skb->encapsulation &&
8326             first->protocol == htons(ETH_P_IP) &&
8327             hdr.ipv4->protocol == IPPROTO_UDP) {
8328                 struct ixgbe_adapter *adapter = q_vector->adapter;
8329
8330                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8331                              VXLAN_HEADROOM))
8332                         return;
8333
8334                 /* verify the port is recognized as VXLAN */
8335                 if (adapter->vxlan_port &&
8336                     udp_hdr(skb)->dest == adapter->vxlan_port)
8337                         hdr.network = skb_inner_network_header(skb);
8338
8339                 if (adapter->geneve_port &&
8340                     udp_hdr(skb)->dest == adapter->geneve_port)
8341                         hdr.network = skb_inner_network_header(skb);
8342         }
8343
8344         /* Make sure we have at least [minimum IPv4 header + TCP]
8345          * or [IPv6 header] bytes
8346          */
8347         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8348                 return;
8349
8350         /* Currently only IPv4/IPv6 with TCP is supported */
8351         switch (hdr.ipv4->version) {
8352         case IPVERSION:
8353                 /* access ihl as u8 to avoid unaligned access on ia64 */
8354                 hlen = (hdr.network[0] & 0x0F) << 2;
8355                 l4_proto = hdr.ipv4->protocol;
8356                 break;
8357         case 6:
8358                 hlen = hdr.network - skb->data;
8359                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8360                 hlen -= hdr.network - skb->data;
8361                 break;
8362         default:
8363                 return;
8364         }
8365
8366         if (l4_proto != IPPROTO_TCP)
8367                 return;
8368
8369         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8370                      hlen + sizeof(struct tcphdr)))
8371                 return;
8372
8373         th = (struct tcphdr *)(hdr.network + hlen);
8374
8375         /* skip this packet since the socket is closing */
8376         if (th->fin)
8377                 return;
8378
8379         /* sample on all syn packets or once every atr sample count */
8380         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8381                 return;
8382
8383         /* reset sample count */
8384         ring->atr_count = 0;
8385
8386         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8387
8388         /*
8389          * src and dst are inverted, think how the receiver sees them
8390          *
8391          * The input is broken into two sections, a non-compressed section
8392          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8393          * is XORed together and stored in the compressed dword.
8394          */
8395         input.formatted.vlan_id = vlan_id;
8396
8397         /*
8398          * since src port and flex bytes occupy the same word XOR them together
8399          * and write the value to source port portion of compressed dword
8400          */
8401         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8402                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8403         else
8404                 common.port.src ^= th->dest ^ first->protocol;
8405         common.port.dst ^= th->source;
8406
8407         switch (hdr.ipv4->version) {
8408         case IPVERSION:
8409                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8410                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8411                 break;
8412         case 6:
8413                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8414                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8415                              hdr.ipv6->saddr.s6_addr32[1] ^
8416                              hdr.ipv6->saddr.s6_addr32[2] ^
8417                              hdr.ipv6->saddr.s6_addr32[3] ^
8418                              hdr.ipv6->daddr.s6_addr32[0] ^
8419                              hdr.ipv6->daddr.s6_addr32[1] ^
8420                              hdr.ipv6->daddr.s6_addr32[2] ^
8421                              hdr.ipv6->daddr.s6_addr32[3];
8422                 break;
8423         default:
8424                 break;
8425         }
8426
8427         if (hdr.network != skb_network_header(skb))
8428                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8429
8430         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8431         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8432                                               input, common, ring->queue_index);
8433 }
8434
8435 #ifdef IXGBE_FCOE
8436 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8437                               struct net_device *sb_dev,
8438                               select_queue_fallback_t fallback)
8439 {
8440         struct ixgbe_adapter *adapter;
8441         struct ixgbe_ring_feature *f;
8442         int txq;
8443
8444         if (sb_dev) {
8445                 u8 tc = netdev_get_prio_tc_map(dev, skb->priority);
8446                 struct net_device *vdev = sb_dev;
8447
8448                 txq = vdev->tc_to_txq[tc].offset;
8449                 txq += reciprocal_scale(skb_get_hash(skb),
8450                                         vdev->tc_to_txq[tc].count);
8451
8452                 return txq;
8453         }
8454
8455         /*
8456          * only execute the code below if protocol is FCoE
8457          * or FIP and we have FCoE enabled on the adapter
8458          */
8459         switch (vlan_get_protocol(skb)) {
8460         case htons(ETH_P_FCOE):
8461         case htons(ETH_P_FIP):
8462                 adapter = netdev_priv(dev);
8463
8464                 if (!sb_dev && (adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
8465                         break;
8466                 /* fall through */
8467         default:
8468                 return fallback(dev, skb, sb_dev);
8469         }
8470
8471         f = &adapter->ring_feature[RING_F_FCOE];
8472
8473         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8474                                            smp_processor_id();
8475
8476         while (txq >= f->indices)
8477                 txq -= f->indices;
8478
8479         return txq + f->offset;
8480 }
8481
8482 #endif
8483 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8484                                struct xdp_frame *xdpf)
8485 {
8486         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8487         struct ixgbe_tx_buffer *tx_buffer;
8488         union ixgbe_adv_tx_desc *tx_desc;
8489         u32 len, cmd_type;
8490         dma_addr_t dma;
8491         u16 i;
8492
8493         len = xdpf->len;
8494
8495         if (unlikely(!ixgbe_desc_unused(ring)))
8496                 return IXGBE_XDP_CONSUMED;
8497
8498         dma = dma_map_single(ring->dev, xdpf->data, len, DMA_TO_DEVICE);
8499         if (dma_mapping_error(ring->dev, dma))
8500                 return IXGBE_XDP_CONSUMED;
8501
8502         /* record the location of the first descriptor for this packet */
8503         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8504         tx_buffer->bytecount = len;
8505         tx_buffer->gso_segs = 1;
8506         tx_buffer->protocol = 0;
8507
8508         i = ring->next_to_use;
8509         tx_desc = IXGBE_TX_DESC(ring, i);
8510
8511         dma_unmap_len_set(tx_buffer, len, len);
8512         dma_unmap_addr_set(tx_buffer, dma, dma);
8513         tx_buffer->xdpf = xdpf;
8514
8515         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8516
8517         /* put descriptor type bits */
8518         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8519                    IXGBE_ADVTXD_DCMD_DEXT |
8520                    IXGBE_ADVTXD_DCMD_IFCS;
8521         cmd_type |= len | IXGBE_TXD_CMD;
8522         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8523         tx_desc->read.olinfo_status =
8524                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8525
8526         /* Avoid any potential race with xdp_xmit and cleanup */
8527         smp_wmb();
8528
8529         /* set next_to_watch value indicating a packet is present */
8530         i++;
8531         if (i == ring->count)
8532                 i = 0;
8533
8534         tx_buffer->next_to_watch = tx_desc;
8535         ring->next_to_use = i;
8536
8537         return IXGBE_XDP_TX;
8538 }
8539
8540 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8541                           struct ixgbe_adapter *adapter,
8542                           struct ixgbe_ring *tx_ring)
8543 {
8544         struct ixgbe_tx_buffer *first;
8545         int tso;
8546         u32 tx_flags = 0;
8547         unsigned short f;
8548         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8549         struct ixgbe_ipsec_tx_data ipsec_tx = { 0 };
8550         __be16 protocol = skb->protocol;
8551         u8 hdr_len = 0;
8552
8553         /*
8554          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8555          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8556          *       + 2 desc gap to keep tail from touching head,
8557          *       + 1 desc for context descriptor,
8558          * otherwise try next time
8559          */
8560         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8561                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
8562
8563         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8564                 tx_ring->tx_stats.tx_busy++;
8565                 return NETDEV_TX_BUSY;
8566         }
8567
8568         /* record the location of the first descriptor for this packet */
8569         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8570         first->skb = skb;
8571         first->bytecount = skb->len;
8572         first->gso_segs = 1;
8573
8574         /* if we have a HW VLAN tag being added default to the HW one */
8575         if (skb_vlan_tag_present(skb)) {
8576                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8577                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8578         /* else if it is a SW VLAN check the next protocol and store the tag */
8579         } else if (protocol == htons(ETH_P_8021Q)) {
8580                 struct vlan_hdr *vhdr, _vhdr;
8581                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8582                 if (!vhdr)
8583                         goto out_drop;
8584
8585                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8586                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8587                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8588         }
8589         protocol = vlan_get_protocol(skb);
8590
8591         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8592             adapter->ptp_clock) {
8593                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
8594                     !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8595                                            &adapter->state)) {
8596                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8597                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8598
8599                         /* schedule check for Tx timestamp */
8600                         adapter->ptp_tx_skb = skb_get(skb);
8601                         adapter->ptp_tx_start = jiffies;
8602                         schedule_work(&adapter->ptp_tx_work);
8603                 } else {
8604                         adapter->tx_hwtstamp_skipped++;
8605                 }
8606         }
8607
8608         skb_tx_timestamp(skb);
8609
8610 #ifdef CONFIG_PCI_IOV
8611         /*
8612          * Use the l2switch_enable flag - would be false if the DMA
8613          * Tx switch had been disabled.
8614          */
8615         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8616                 tx_flags |= IXGBE_TX_FLAGS_CC;
8617
8618 #endif
8619         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8620         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8621             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8622              (skb->priority != TC_PRIO_CONTROL))) {
8623                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8624                 tx_flags |= (skb->priority & 0x7) <<
8625                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8626                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8627                         struct vlan_ethhdr *vhdr;
8628
8629                         if (skb_cow_head(skb, 0))
8630                                 goto out_drop;
8631                         vhdr = (struct vlan_ethhdr *)skb->data;
8632                         vhdr->h_vlan_TCI = htons(tx_flags >>
8633                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8634                 } else {
8635                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8636                 }
8637         }
8638
8639         /* record initial flags and protocol */
8640         first->tx_flags = tx_flags;
8641         first->protocol = protocol;
8642
8643 #ifdef IXGBE_FCOE
8644         /* setup tx offload for FCoE */
8645         if ((protocol == htons(ETH_P_FCOE)) &&
8646             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8647                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8648                 if (tso < 0)
8649                         goto out_drop;
8650
8651                 goto xmit_fcoe;
8652         }
8653
8654 #endif /* IXGBE_FCOE */
8655
8656 #ifdef CONFIG_XFRM_OFFLOAD
8657         if (xfrm_offload(skb) &&
8658             !ixgbe_ipsec_tx(tx_ring, first, &ipsec_tx))
8659                 goto out_drop;
8660 #endif
8661         tso = ixgbe_tso(tx_ring, first, &hdr_len, &ipsec_tx);
8662         if (tso < 0)
8663                 goto out_drop;
8664         else if (!tso)
8665                 ixgbe_tx_csum(tx_ring, first, &ipsec_tx);
8666
8667         /* add the ATR filter if ATR is on */
8668         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8669                 ixgbe_atr(tx_ring, first);
8670
8671 #ifdef IXGBE_FCOE
8672 xmit_fcoe:
8673 #endif /* IXGBE_FCOE */
8674         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8675                 goto cleanup_tx_timestamp;
8676
8677         return NETDEV_TX_OK;
8678
8679 out_drop:
8680         dev_kfree_skb_any(first->skb);
8681         first->skb = NULL;
8682 cleanup_tx_timestamp:
8683         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8684                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8685                 adapter->ptp_tx_skb = NULL;
8686                 cancel_work_sync(&adapter->ptp_tx_work);
8687                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8688         }
8689
8690         return NETDEV_TX_OK;
8691 }
8692
8693 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8694                                       struct net_device *netdev,
8695                                       struct ixgbe_ring *ring)
8696 {
8697         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8698         struct ixgbe_ring *tx_ring;
8699
8700         /*
8701          * The minimum packet size for olinfo paylen is 17 so pad the skb
8702          * in order to meet this minimum size requirement.
8703          */
8704         if (skb_put_padto(skb, 17))
8705                 return NETDEV_TX_OK;
8706
8707         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8708
8709         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8710 }
8711
8712 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8713                                     struct net_device *netdev)
8714 {
8715         return __ixgbe_xmit_frame(skb, netdev, NULL);
8716 }
8717
8718 /**
8719  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8720  * @netdev: network interface device structure
8721  * @p: pointer to an address structure
8722  *
8723  * Returns 0 on success, negative on failure
8724  **/
8725 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8726 {
8727         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8728         struct ixgbe_hw *hw = &adapter->hw;
8729         struct sockaddr *addr = p;
8730
8731         if (!is_valid_ether_addr(addr->sa_data))
8732                 return -EADDRNOTAVAIL;
8733
8734         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8735         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8736
8737         ixgbe_mac_set_default_filter(adapter);
8738
8739         return 0;
8740 }
8741
8742 static int
8743 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8744 {
8745         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8746         struct ixgbe_hw *hw = &adapter->hw;
8747         u16 value;
8748         int rc;
8749
8750         if (prtad != hw->phy.mdio.prtad)
8751                 return -EINVAL;
8752         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8753         if (!rc)
8754                 rc = value;
8755         return rc;
8756 }
8757
8758 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8759                             u16 addr, u16 value)
8760 {
8761         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8762         struct ixgbe_hw *hw = &adapter->hw;
8763
8764         if (prtad != hw->phy.mdio.prtad)
8765                 return -EINVAL;
8766         return hw->phy.ops.write_reg(hw, addr, devad, value);
8767 }
8768
8769 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8770 {
8771         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8772
8773         switch (cmd) {
8774         case SIOCSHWTSTAMP:
8775                 return ixgbe_ptp_set_ts_config(adapter, req);
8776         case SIOCGHWTSTAMP:
8777                 return ixgbe_ptp_get_ts_config(adapter, req);
8778         case SIOCGMIIPHY:
8779                 if (!adapter->hw.phy.ops.read_reg)
8780                         return -EOPNOTSUPP;
8781                 /* fall through */
8782         default:
8783                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8784         }
8785 }
8786
8787 /**
8788  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8789  * netdev->dev_addrs
8790  * @dev: network interface device structure
8791  *
8792  * Returns non-zero on failure
8793  **/
8794 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8795 {
8796         int err = 0;
8797         struct ixgbe_adapter *adapter = netdev_priv(dev);
8798         struct ixgbe_hw *hw = &adapter->hw;
8799
8800         if (is_valid_ether_addr(hw->mac.san_addr)) {
8801                 rtnl_lock();
8802                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8803                 rtnl_unlock();
8804
8805                 /* update SAN MAC vmdq pool selection */
8806                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8807         }
8808         return err;
8809 }
8810
8811 /**
8812  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8813  * netdev->dev_addrs
8814  * @dev: network interface device structure
8815  *
8816  * Returns non-zero on failure
8817  **/
8818 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8819 {
8820         int err = 0;
8821         struct ixgbe_adapter *adapter = netdev_priv(dev);
8822         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8823
8824         if (is_valid_ether_addr(mac->san_addr)) {
8825                 rtnl_lock();
8826                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8827                 rtnl_unlock();
8828         }
8829         return err;
8830 }
8831
8832 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8833                                    struct ixgbe_ring *ring)
8834 {
8835         u64 bytes, packets;
8836         unsigned int start;
8837
8838         if (ring) {
8839                 do {
8840                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8841                         packets = ring->stats.packets;
8842                         bytes   = ring->stats.bytes;
8843                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8844                 stats->tx_packets += packets;
8845                 stats->tx_bytes   += bytes;
8846         }
8847 }
8848
8849 static void ixgbe_get_stats64(struct net_device *netdev,
8850                               struct rtnl_link_stats64 *stats)
8851 {
8852         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8853         int i;
8854
8855         rcu_read_lock();
8856         for (i = 0; i < adapter->num_rx_queues; i++) {
8857                 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8858                 u64 bytes, packets;
8859                 unsigned int start;
8860
8861                 if (ring) {
8862                         do {
8863                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8864                                 packets = ring->stats.packets;
8865                                 bytes   = ring->stats.bytes;
8866                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8867                         stats->rx_packets += packets;
8868                         stats->rx_bytes   += bytes;
8869                 }
8870         }
8871
8872         for (i = 0; i < adapter->num_tx_queues; i++) {
8873                 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8874
8875                 ixgbe_get_ring_stats64(stats, ring);
8876         }
8877         for (i = 0; i < adapter->num_xdp_queues; i++) {
8878                 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8879
8880                 ixgbe_get_ring_stats64(stats, ring);
8881         }
8882         rcu_read_unlock();
8883
8884         /* following stats updated by ixgbe_watchdog_task() */
8885         stats->multicast        = netdev->stats.multicast;
8886         stats->rx_errors        = netdev->stats.rx_errors;
8887         stats->rx_length_errors = netdev->stats.rx_length_errors;
8888         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8889         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8890 }
8891
8892 #ifdef CONFIG_IXGBE_DCB
8893 /**
8894  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8895  * @adapter: pointer to ixgbe_adapter
8896  * @tc: number of traffic classes currently enabled
8897  *
8898  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8899  * 802.1Q priority maps to a packet buffer that exists.
8900  */
8901 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8902 {
8903         struct ixgbe_hw *hw = &adapter->hw;
8904         u32 reg, rsave;
8905         int i;
8906
8907         /* 82598 have a static priority to TC mapping that can not
8908          * be changed so no validation is needed.
8909          */
8910         if (hw->mac.type == ixgbe_mac_82598EB)
8911                 return;
8912
8913         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8914         rsave = reg;
8915
8916         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8917                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8918
8919                 /* If up2tc is out of bounds default to zero */
8920                 if (up2tc > tc)
8921                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8922         }
8923
8924         if (reg != rsave)
8925                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8926
8927         return;
8928 }
8929
8930 /**
8931  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8932  * @adapter: Pointer to adapter struct
8933  *
8934  * Populate the netdev user priority to tc map
8935  */
8936 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8937 {
8938         struct net_device *dev = adapter->netdev;
8939         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8940         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8941         u8 prio;
8942
8943         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8944                 u8 tc = 0;
8945
8946                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8947                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8948                 else if (ets)
8949                         tc = ets->prio_tc[prio];
8950
8951                 netdev_set_prio_tc_map(dev, prio, tc);
8952         }
8953 }
8954
8955 #endif /* CONFIG_IXGBE_DCB */
8956 static int ixgbe_reassign_macvlan_pool(struct net_device *vdev, void *data)
8957 {
8958         struct ixgbe_adapter *adapter = data;
8959         struct ixgbe_fwd_adapter *accel;
8960         int pool;
8961
8962         /* we only care about macvlans... */
8963         if (!netif_is_macvlan(vdev))
8964                 return 0;
8965
8966         /* that have hardware offload enabled... */
8967         accel = macvlan_accel_priv(vdev);
8968         if (!accel)
8969                 return 0;
8970
8971         /* If we can relocate to a different bit do so */
8972         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
8973         if (pool < adapter->num_rx_pools) {
8974                 set_bit(pool, adapter->fwd_bitmask);
8975                 accel->pool = pool;
8976                 return 0;
8977         }
8978
8979         /* if we cannot find a free pool then disable the offload */
8980         netdev_err(vdev, "L2FW offload disabled due to lack of queue resources\n");
8981         macvlan_release_l2fw_offload(vdev);
8982
8983         /* unbind the queues and drop the subordinate channel config */
8984         netdev_unbind_sb_channel(adapter->netdev, vdev);
8985         netdev_set_sb_channel(vdev, 0);
8986
8987         kfree(accel);
8988
8989         return 0;
8990 }
8991
8992 static void ixgbe_defrag_macvlan_pools(struct net_device *dev)
8993 {
8994         struct ixgbe_adapter *adapter = netdev_priv(dev);
8995
8996         /* flush any stale bits out of the fwd bitmask */
8997         bitmap_clear(adapter->fwd_bitmask, 1, 63);
8998
8999         /* walk through upper devices reassigning pools */
9000         netdev_walk_all_upper_dev_rcu(dev, ixgbe_reassign_macvlan_pool,
9001                                       adapter);
9002 }
9003
9004 /**
9005  * ixgbe_setup_tc - configure net_device for multiple traffic classes
9006  *
9007  * @dev: net device to configure
9008  * @tc: number of traffic classes to enable
9009  */
9010 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
9011 {
9012         struct ixgbe_adapter *adapter = netdev_priv(dev);
9013         struct ixgbe_hw *hw = &adapter->hw;
9014
9015         /* Hardware supports up to 8 traffic classes */
9016         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
9017                 return -EINVAL;
9018
9019         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
9020                 return -EINVAL;
9021
9022         /* Hardware has to reinitialize queues and interrupts to
9023          * match packet buffer alignment. Unfortunately, the
9024          * hardware is not flexible enough to do this dynamically.
9025          */
9026         if (netif_running(dev))
9027                 ixgbe_close(dev);
9028         else
9029                 ixgbe_reset(adapter);
9030
9031         ixgbe_clear_interrupt_scheme(adapter);
9032
9033 #ifdef CONFIG_IXGBE_DCB
9034         if (tc) {
9035                 if (adapter->xdp_prog) {
9036                         e_warn(probe, "DCB is not supported with XDP\n");
9037
9038                         ixgbe_init_interrupt_scheme(adapter);
9039                         if (netif_running(dev))
9040                                 ixgbe_open(dev);
9041                         return -EINVAL;
9042                 }
9043
9044                 netdev_set_num_tc(dev, tc);
9045                 ixgbe_set_prio_tc_map(adapter);
9046
9047                 adapter->hw_tcs = tc;
9048                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
9049
9050                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
9051                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
9052                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
9053                 }
9054         } else {
9055                 netdev_reset_tc(dev);
9056
9057                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9058                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
9059
9060                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
9061                 adapter->hw_tcs = tc;
9062
9063                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
9064                 adapter->dcb_cfg.pfc_mode_enable = false;
9065         }
9066
9067         ixgbe_validate_rtr(adapter, tc);
9068
9069 #endif /* CONFIG_IXGBE_DCB */
9070         ixgbe_init_interrupt_scheme(adapter);
9071
9072         ixgbe_defrag_macvlan_pools(dev);
9073
9074         if (netif_running(dev))
9075                 return ixgbe_open(dev);
9076
9077         return 0;
9078 }
9079
9080 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
9081                                struct tc_cls_u32_offload *cls)
9082 {
9083         u32 hdl = cls->knode.handle;
9084         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
9085         u32 loc = cls->knode.handle & 0xfffff;
9086         int err = 0, i, j;
9087         struct ixgbe_jump_table *jump = NULL;
9088
9089         if (loc > IXGBE_MAX_HW_ENTRIES)
9090                 return -EINVAL;
9091
9092         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
9093                 return -EINVAL;
9094
9095         /* Clear this filter in the link data it is associated with */
9096         if (uhtid != 0x800) {
9097                 jump = adapter->jump_tables[uhtid];
9098                 if (!jump)
9099                         return -EINVAL;
9100                 if (!test_bit(loc - 1, jump->child_loc_map))
9101                         return -EINVAL;
9102                 clear_bit(loc - 1, jump->child_loc_map);
9103         }
9104
9105         /* Check if the filter being deleted is a link */
9106         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9107                 jump = adapter->jump_tables[i];
9108                 if (jump && jump->link_hdl == hdl) {
9109                         /* Delete filters in the hardware in the child hash
9110                          * table associated with this link
9111                          */
9112                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
9113                                 if (!test_bit(j, jump->child_loc_map))
9114                                         continue;
9115                                 spin_lock(&adapter->fdir_perfect_lock);
9116                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
9117                                                                       NULL,
9118                                                                       j + 1);
9119                                 spin_unlock(&adapter->fdir_perfect_lock);
9120                                 clear_bit(j, jump->child_loc_map);
9121                         }
9122                         /* Remove resources for this link */
9123                         kfree(jump->input);
9124                         kfree(jump->mask);
9125                         kfree(jump);
9126                         adapter->jump_tables[i] = NULL;
9127                         return err;
9128                 }
9129         }
9130
9131         spin_lock(&adapter->fdir_perfect_lock);
9132         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
9133         spin_unlock(&adapter->fdir_perfect_lock);
9134         return err;
9135 }
9136
9137 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
9138                                             struct tc_cls_u32_offload *cls)
9139 {
9140         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9141
9142         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9143                 return -EINVAL;
9144
9145         /* This ixgbe devices do not support hash tables at the moment
9146          * so abort when given hash tables.
9147          */
9148         if (cls->hnode.divisor > 0)
9149                 return -EINVAL;
9150
9151         set_bit(uhtid - 1, &adapter->tables);
9152         return 0;
9153 }
9154
9155 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
9156                                             struct tc_cls_u32_offload *cls)
9157 {
9158         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9159
9160         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9161                 return -EINVAL;
9162
9163         clear_bit(uhtid - 1, &adapter->tables);
9164         return 0;
9165 }
9166
9167 #ifdef CONFIG_NET_CLS_ACT
9168 struct upper_walk_data {
9169         struct ixgbe_adapter *adapter;
9170         u64 action;
9171         int ifindex;
9172         u8 queue;
9173 };
9174
9175 static int get_macvlan_queue(struct net_device *upper, void *_data)
9176 {
9177         if (netif_is_macvlan(upper)) {
9178                 struct ixgbe_fwd_adapter *vadapter = macvlan_accel_priv(upper);
9179                 struct upper_walk_data *data = _data;
9180                 struct ixgbe_adapter *adapter = data->adapter;
9181                 int ifindex = data->ifindex;
9182
9183                 if (vadapter && upper->ifindex == ifindex) {
9184                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9185                         data->action = data->queue;
9186                         return 1;
9187                 }
9188         }
9189
9190         return 0;
9191 }
9192
9193 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
9194                                   u8 *queue, u64 *action)
9195 {
9196         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
9197         unsigned int num_vfs = adapter->num_vfs, vf;
9198         struct upper_walk_data data;
9199         struct net_device *upper;
9200
9201         /* redirect to a SRIOV VF */
9202         for (vf = 0; vf < num_vfs; ++vf) {
9203                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
9204                 if (upper->ifindex == ifindex) {
9205                         *queue = vf * __ALIGN_MASK(1, ~vmdq->mask);
9206                         *action = vf + 1;
9207                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9208                         return 0;
9209                 }
9210         }
9211
9212         /* redirect to a offloaded macvlan netdev */
9213         data.adapter = adapter;
9214         data.ifindex = ifindex;
9215         data.action = 0;
9216         data.queue = 0;
9217         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9218                                           get_macvlan_queue, &data)) {
9219                 *action = data.action;
9220                 *queue = data.queue;
9221
9222                 return 0;
9223         }
9224
9225         return -EINVAL;
9226 }
9227
9228 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9229                             struct tcf_exts *exts, u64 *action, u8 *queue)
9230 {
9231         const struct tc_action *a;
9232         int i;
9233
9234         if (!tcf_exts_has_actions(exts))
9235                 return -EINVAL;
9236
9237         tcf_exts_for_each_action(i, a, exts) {
9238                 /* Drop action */
9239                 if (is_tcf_gact_shot(a)) {
9240                         *action = IXGBE_FDIR_DROP_QUEUE;
9241                         *queue = IXGBE_FDIR_DROP_QUEUE;
9242                         return 0;
9243                 }
9244
9245                 /* Redirect to a VF or a offloaded macvlan */
9246                 if (is_tcf_mirred_egress_redirect(a)) {
9247                         struct net_device *dev = tcf_mirred_dev(a);
9248
9249                         if (!dev)
9250                                 return -EINVAL;
9251                         return handle_redirect_action(adapter, dev->ifindex,
9252                                                       queue, action);
9253                 }
9254
9255                 return -EINVAL;
9256         }
9257
9258         return -EINVAL;
9259 }
9260 #else
9261 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9262                             struct tcf_exts *exts, u64 *action, u8 *queue)
9263 {
9264         return -EINVAL;
9265 }
9266 #endif /* CONFIG_NET_CLS_ACT */
9267
9268 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9269                                     union ixgbe_atr_input *mask,
9270                                     struct tc_cls_u32_offload *cls,
9271                                     struct ixgbe_mat_field *field_ptr,
9272                                     struct ixgbe_nexthdr *nexthdr)
9273 {
9274         int i, j, off;
9275         __be32 val, m;
9276         bool found_entry = false, found_jump_field = false;
9277
9278         for (i = 0; i < cls->knode.sel->nkeys; i++) {
9279                 off = cls->knode.sel->keys[i].off;
9280                 val = cls->knode.sel->keys[i].val;
9281                 m = cls->knode.sel->keys[i].mask;
9282
9283                 for (j = 0; field_ptr[j].val; j++) {
9284                         if (field_ptr[j].off == off) {
9285                                 field_ptr[j].val(input, mask, (__force u32)val,
9286                                                  (__force u32)m);
9287                                 input->filter.formatted.flow_type |=
9288                                         field_ptr[j].type;
9289                                 found_entry = true;
9290                                 break;
9291                         }
9292                 }
9293                 if (nexthdr) {
9294                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9295                             nexthdr->val ==
9296                             (__force u32)cls->knode.sel->keys[i].val &&
9297                             nexthdr->mask ==
9298                             (__force u32)cls->knode.sel->keys[i].mask)
9299                                 found_jump_field = true;
9300                         else
9301                                 continue;
9302                 }
9303         }
9304
9305         if (nexthdr && !found_jump_field)
9306                 return -EINVAL;
9307
9308         if (!found_entry)
9309                 return 0;
9310
9311         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9312                                     IXGBE_ATR_L4TYPE_MASK;
9313
9314         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9315                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9316
9317         return 0;
9318 }
9319
9320 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9321                                   struct tc_cls_u32_offload *cls)
9322 {
9323         __be16 protocol = cls->common.protocol;
9324         u32 loc = cls->knode.handle & 0xfffff;
9325         struct ixgbe_hw *hw = &adapter->hw;
9326         struct ixgbe_mat_field *field_ptr;
9327         struct ixgbe_fdir_filter *input = NULL;
9328         union ixgbe_atr_input *mask = NULL;
9329         struct ixgbe_jump_table *jump = NULL;
9330         int i, err = -EINVAL;
9331         u8 queue;
9332         u32 uhtid, link_uhtid;
9333
9334         uhtid = TC_U32_USERHTID(cls->knode.handle);
9335         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9336
9337         /* At the moment cls_u32 jumps to network layer and skips past
9338          * L2 headers. The canonical method to match L2 frames is to use
9339          * negative values. However this is error prone at best but really
9340          * just broken because there is no way to "know" what sort of hdr
9341          * is in front of the network layer. Fix cls_u32 to support L2
9342          * headers when needed.
9343          */
9344         if (protocol != htons(ETH_P_IP))
9345                 return err;
9346
9347         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9348                 e_err(drv, "Location out of range\n");
9349                 return err;
9350         }
9351
9352         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9353          * links and also the fields used to advance the parser across each
9354          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9355          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9356          * To add support for new nodes update ixgbe_model.h parse structures
9357          * this function _should_ be generic try not to hardcode values here.
9358          */
9359         if (uhtid == 0x800) {
9360                 field_ptr = (adapter->jump_tables[0])->mat;
9361         } else {
9362                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9363                         return err;
9364                 if (!adapter->jump_tables[uhtid])
9365                         return err;
9366                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9367         }
9368
9369         if (!field_ptr)
9370                 return err;
9371
9372         /* At this point we know the field_ptr is valid and need to either
9373          * build cls_u32 link or attach filter. Because adding a link to
9374          * a handle that does not exist is invalid and the same for adding
9375          * rules to handles that don't exist.
9376          */
9377
9378         if (link_uhtid) {
9379                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9380
9381                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9382                         return err;
9383
9384                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9385                         return err;
9386
9387                 /* Multiple filters as links to the same hash table are not
9388                  * supported. To add a new filter with the same next header
9389                  * but different match/jump conditions, create a new hash table
9390                  * and link to it.
9391                  */
9392                 if (adapter->jump_tables[link_uhtid] &&
9393                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9394                         e_err(drv, "Link filter exists for link: %x\n",
9395                               link_uhtid);
9396                         return err;
9397                 }
9398
9399                 for (i = 0; nexthdr[i].jump; i++) {
9400                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9401                             nexthdr[i].s != cls->knode.sel->offshift ||
9402                             nexthdr[i].m !=
9403                             (__force u32)cls->knode.sel->offmask)
9404                                 return err;
9405
9406                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9407                         if (!jump)
9408                                 return -ENOMEM;
9409                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9410                         if (!input) {
9411                                 err = -ENOMEM;
9412                                 goto free_jump;
9413                         }
9414                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9415                         if (!mask) {
9416                                 err = -ENOMEM;
9417                                 goto free_input;
9418                         }
9419                         jump->input = input;
9420                         jump->mask = mask;
9421                         jump->link_hdl = cls->knode.handle;
9422
9423                         err = ixgbe_clsu32_build_input(input, mask, cls,
9424                                                        field_ptr, &nexthdr[i]);
9425                         if (!err) {
9426                                 jump->mat = nexthdr[i].jump;
9427                                 adapter->jump_tables[link_uhtid] = jump;
9428                                 break;
9429                         }
9430                 }
9431                 return 0;
9432         }
9433
9434         input = kzalloc(sizeof(*input), GFP_KERNEL);
9435         if (!input)
9436                 return -ENOMEM;
9437         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9438         if (!mask) {
9439                 err = -ENOMEM;
9440                 goto free_input;
9441         }
9442
9443         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9444                 if ((adapter->jump_tables[uhtid])->input)
9445                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9446                                sizeof(*input));
9447                 if ((adapter->jump_tables[uhtid])->mask)
9448                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9449                                sizeof(*mask));
9450
9451                 /* Lookup in all child hash tables if this location is already
9452                  * filled with a filter
9453                  */
9454                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9455                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9456
9457                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9458                                 e_err(drv, "Filter exists in location: %x\n",
9459                                       loc);
9460                                 err = -EINVAL;
9461                                 goto err_out;
9462                         }
9463                 }
9464         }
9465         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9466         if (err)
9467                 goto err_out;
9468
9469         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9470                                &queue);
9471         if (err < 0)
9472                 goto err_out;
9473
9474         input->sw_idx = loc;
9475
9476         spin_lock(&adapter->fdir_perfect_lock);
9477
9478         if (hlist_empty(&adapter->fdir_filter_list)) {
9479                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9480                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9481                 if (err)
9482                         goto err_out_w_lock;
9483         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9484                 err = -EINVAL;
9485                 goto err_out_w_lock;
9486         }
9487
9488         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9489         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9490                                                     input->sw_idx, queue);
9491         if (err)
9492                 goto err_out_w_lock;
9493
9494         ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9495         spin_unlock(&adapter->fdir_perfect_lock);
9496
9497         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9498                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9499
9500         kfree(mask);
9501         return err;
9502 err_out_w_lock:
9503         spin_unlock(&adapter->fdir_perfect_lock);
9504 err_out:
9505         kfree(mask);
9506 free_input:
9507         kfree(input);
9508 free_jump:
9509         kfree(jump);
9510         return err;
9511 }
9512
9513 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9514                                   struct tc_cls_u32_offload *cls_u32)
9515 {
9516         switch (cls_u32->command) {
9517         case TC_CLSU32_NEW_KNODE:
9518         case TC_CLSU32_REPLACE_KNODE:
9519                 return ixgbe_configure_clsu32(adapter, cls_u32);
9520         case TC_CLSU32_DELETE_KNODE:
9521                 return ixgbe_delete_clsu32(adapter, cls_u32);
9522         case TC_CLSU32_NEW_HNODE:
9523         case TC_CLSU32_REPLACE_HNODE:
9524                 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9525         case TC_CLSU32_DELETE_HNODE:
9526                 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9527         default:
9528                 return -EOPNOTSUPP;
9529         }
9530 }
9531
9532 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9533                                    void *cb_priv)
9534 {
9535         struct ixgbe_adapter *adapter = cb_priv;
9536
9537         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
9538                 return -EOPNOTSUPP;
9539
9540         switch (type) {
9541         case TC_SETUP_CLSU32:
9542                 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9543         default:
9544                 return -EOPNOTSUPP;
9545         }
9546 }
9547
9548 static int ixgbe_setup_tc_block(struct net_device *dev,
9549                                 struct tc_block_offload *f)
9550 {
9551         struct ixgbe_adapter *adapter = netdev_priv(dev);
9552
9553         if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
9554                 return -EOPNOTSUPP;
9555
9556         switch (f->command) {
9557         case TC_BLOCK_BIND:
9558                 return tcf_block_cb_register(f->block, ixgbe_setup_tc_block_cb,
9559                                              adapter, adapter, f->extack);
9560         case TC_BLOCK_UNBIND:
9561                 tcf_block_cb_unregister(f->block, ixgbe_setup_tc_block_cb,
9562                                         adapter);
9563                 return 0;
9564         default:
9565                 return -EOPNOTSUPP;
9566         }
9567 }
9568
9569 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9570                                  struct tc_mqprio_qopt *mqprio)
9571 {
9572         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9573         return ixgbe_setup_tc(dev, mqprio->num_tc);
9574 }
9575
9576 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9577                             void *type_data)
9578 {
9579         switch (type) {
9580         case TC_SETUP_BLOCK:
9581                 return ixgbe_setup_tc_block(dev, type_data);
9582         case TC_SETUP_QDISC_MQPRIO:
9583                 return ixgbe_setup_tc_mqprio(dev, type_data);
9584         default:
9585                 return -EOPNOTSUPP;
9586         }
9587 }
9588
9589 #ifdef CONFIG_PCI_IOV
9590 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9591 {
9592         struct net_device *netdev = adapter->netdev;
9593
9594         rtnl_lock();
9595         ixgbe_setup_tc(netdev, adapter->hw_tcs);
9596         rtnl_unlock();
9597 }
9598
9599 #endif
9600 void ixgbe_do_reset(struct net_device *netdev)
9601 {
9602         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9603
9604         if (netif_running(netdev))
9605                 ixgbe_reinit_locked(adapter);
9606         else
9607                 ixgbe_reset(adapter);
9608 }
9609
9610 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9611                                             netdev_features_t features)
9612 {
9613         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9614
9615         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9616         if (!(features & NETIF_F_RXCSUM))
9617                 features &= ~NETIF_F_LRO;
9618
9619         /* Turn off LRO if not RSC capable */
9620         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9621                 features &= ~NETIF_F_LRO;
9622
9623         if (adapter->xdp_prog && (features & NETIF_F_LRO)) {
9624                 e_dev_err("LRO is not supported with XDP\n");
9625                 features &= ~NETIF_F_LRO;
9626         }
9627
9628         return features;
9629 }
9630
9631 static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter *adapter)
9632 {
9633         int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9634                         num_online_cpus());
9635
9636         /* go back to full RSS if we're not running SR-IOV */
9637         if (!adapter->ring_feature[RING_F_VMDQ].offset)
9638                 adapter->flags &= ~(IXGBE_FLAG_VMDQ_ENABLED |
9639                                     IXGBE_FLAG_SRIOV_ENABLED);
9640
9641         adapter->ring_feature[RING_F_RSS].limit = rss;
9642         adapter->ring_feature[RING_F_VMDQ].limit = 1;
9643
9644         ixgbe_setup_tc(adapter->netdev, adapter->hw_tcs);
9645 }
9646
9647 static int ixgbe_set_features(struct net_device *netdev,
9648                               netdev_features_t features)
9649 {
9650         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9651         netdev_features_t changed = netdev->features ^ features;
9652         bool need_reset = false;
9653
9654         /* Make sure RSC matches LRO, reset if change */
9655         if (!(features & NETIF_F_LRO)) {
9656                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9657                         need_reset = true;
9658                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9659         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9660                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9661                 if (adapter->rx_itr_setting == 1 ||
9662                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9663                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9664                         need_reset = true;
9665                 } else if ((changed ^ features) & NETIF_F_LRO) {
9666                         e_info(probe, "rx-usecs set too low, "
9667                                "disabling RSC\n");
9668                 }
9669         }
9670
9671         /*
9672          * Check if Flow Director n-tuple support or hw_tc support was
9673          * enabled or disabled.  If the state changed, we need to reset.
9674          */
9675         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9676                 /* turn off ATR, enable perfect filters and reset */
9677                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9678                         need_reset = true;
9679
9680                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9681                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9682         } else {
9683                 /* turn off perfect filters, enable ATR and reset */
9684                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9685                         need_reset = true;
9686
9687                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9688
9689                 /* We cannot enable ATR if SR-IOV is enabled */
9690                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9691                     /* We cannot enable ATR if we have 2 or more tcs */
9692                     (adapter->hw_tcs > 1) ||
9693                     /* We cannot enable ATR if RSS is disabled */
9694                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9695                     /* A sample rate of 0 indicates ATR disabled */
9696                     (!adapter->atr_sample_rate))
9697                         ; /* do nothing not supported */
9698                 else /* otherwise supported and set the flag */
9699                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9700         }
9701
9702         if (changed & NETIF_F_RXALL)
9703                 need_reset = true;
9704
9705         netdev->features = features;
9706
9707         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9708                 if (features & NETIF_F_RXCSUM) {
9709                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9710                 } else {
9711                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9712
9713                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9714                 }
9715         }
9716
9717         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9718                 if (features & NETIF_F_RXCSUM) {
9719                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9720                 } else {
9721                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9722
9723                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9724                 }
9725         }
9726
9727         if ((changed & NETIF_F_HW_L2FW_DOFFLOAD) && adapter->num_rx_pools > 1)
9728                 ixgbe_reset_l2fw_offload(adapter);
9729         else if (need_reset)
9730                 ixgbe_do_reset(netdev);
9731         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9732                             NETIF_F_HW_VLAN_CTAG_FILTER))
9733                 ixgbe_set_rx_mode(netdev);
9734
9735         return 0;
9736 }
9737
9738 /**
9739  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9740  * @dev: The port's netdev
9741  * @ti: Tunnel endpoint information
9742  **/
9743 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9744                                       struct udp_tunnel_info *ti)
9745 {
9746         struct ixgbe_adapter *adapter = netdev_priv(dev);
9747         struct ixgbe_hw *hw = &adapter->hw;
9748         __be16 port = ti->port;
9749         u32 port_shift = 0;
9750         u32 reg;
9751
9752         if (ti->sa_family != AF_INET)
9753                 return;
9754
9755         switch (ti->type) {
9756         case UDP_TUNNEL_TYPE_VXLAN:
9757                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9758                         return;
9759
9760                 if (adapter->vxlan_port == port)
9761                         return;
9762
9763                 if (adapter->vxlan_port) {
9764                         netdev_info(dev,
9765                                     "VXLAN port %d set, not adding port %d\n",
9766                                     ntohs(adapter->vxlan_port),
9767                                     ntohs(port));
9768                         return;
9769                 }
9770
9771                 adapter->vxlan_port = port;
9772                 break;
9773         case UDP_TUNNEL_TYPE_GENEVE:
9774                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9775                         return;
9776
9777                 if (adapter->geneve_port == port)
9778                         return;
9779
9780                 if (adapter->geneve_port) {
9781                         netdev_info(dev,
9782                                     "GENEVE port %d set, not adding port %d\n",
9783                                     ntohs(adapter->geneve_port),
9784                                     ntohs(port));
9785                         return;
9786                 }
9787
9788                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9789                 adapter->geneve_port = port;
9790                 break;
9791         default:
9792                 return;
9793         }
9794
9795         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9796         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9797 }
9798
9799 /**
9800  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9801  * @dev: The port's netdev
9802  * @ti: Tunnel endpoint information
9803  **/
9804 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9805                                       struct udp_tunnel_info *ti)
9806 {
9807         struct ixgbe_adapter *adapter = netdev_priv(dev);
9808         u32 port_mask;
9809
9810         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9811             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9812                 return;
9813
9814         if (ti->sa_family != AF_INET)
9815                 return;
9816
9817         switch (ti->type) {
9818         case UDP_TUNNEL_TYPE_VXLAN:
9819                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9820                         return;
9821
9822                 if (adapter->vxlan_port != ti->port) {
9823                         netdev_info(dev, "VXLAN port %d not found\n",
9824                                     ntohs(ti->port));
9825                         return;
9826                 }
9827
9828                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9829                 break;
9830         case UDP_TUNNEL_TYPE_GENEVE:
9831                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9832                         return;
9833
9834                 if (adapter->geneve_port != ti->port) {
9835                         netdev_info(dev, "GENEVE port %d not found\n",
9836                                     ntohs(ti->port));
9837                         return;
9838                 }
9839
9840                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9841                 break;
9842         default:
9843                 return;
9844         }
9845
9846         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9847         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9848 }
9849
9850 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9851                              struct net_device *dev,
9852                              const unsigned char *addr, u16 vid,
9853                              u16 flags)
9854 {
9855         /* guarantee we can provide a unique filter for the unicast address */
9856         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9857                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9858                 u16 pool = VMDQ_P(0);
9859
9860                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9861                         return -ENOMEM;
9862         }
9863
9864         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9865 }
9866
9867 /**
9868  * ixgbe_configure_bridge_mode - set various bridge modes
9869  * @adapter: the private structure
9870  * @mode: requested bridge mode
9871  *
9872  * Configure some settings require for various bridge modes.
9873  **/
9874 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9875                                        __u16 mode)
9876 {
9877         struct ixgbe_hw *hw = &adapter->hw;
9878         unsigned int p, num_pools;
9879         u32 vmdctl;
9880
9881         switch (mode) {
9882         case BRIDGE_MODE_VEPA:
9883                 /* disable Tx loopback, rely on switch hairpin mode */
9884                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9885
9886                 /* must enable Rx switching replication to allow multicast
9887                  * packet reception on all VFs, and to enable source address
9888                  * pruning.
9889                  */
9890                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9891                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9892                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9893
9894                 /* enable Rx source address pruning. Note, this requires
9895                  * replication to be enabled or else it does nothing.
9896                  */
9897                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9898                 for (p = 0; p < num_pools; p++) {
9899                         if (hw->mac.ops.set_source_address_pruning)
9900                                 hw->mac.ops.set_source_address_pruning(hw,
9901                                                                        true,
9902                                                                        p);
9903                 }
9904                 break;
9905         case BRIDGE_MODE_VEB:
9906                 /* enable Tx loopback for internal VF/PF communication */
9907                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9908                                 IXGBE_PFDTXGSWC_VT_LBEN);
9909
9910                 /* disable Rx switching replication unless we have SR-IOV
9911                  * virtual functions
9912                  */
9913                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9914                 if (!adapter->num_vfs)
9915                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9916                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9917
9918                 /* disable Rx source address pruning, since we don't expect to
9919                  * be receiving external loopback of our transmitted frames.
9920                  */
9921                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9922                 for (p = 0; p < num_pools; p++) {
9923                         if (hw->mac.ops.set_source_address_pruning)
9924                                 hw->mac.ops.set_source_address_pruning(hw,
9925                                                                        false,
9926                                                                        p);
9927                 }
9928                 break;
9929         default:
9930                 return -EINVAL;
9931         }
9932
9933         adapter->bridge_mode = mode;
9934
9935         e_info(drv, "enabling bridge mode: %s\n",
9936                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9937
9938         return 0;
9939 }
9940
9941 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9942                                     struct nlmsghdr *nlh, u16 flags)
9943 {
9944         struct ixgbe_adapter *adapter = netdev_priv(dev);
9945         struct nlattr *attr, *br_spec;
9946         int rem;
9947
9948         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9949                 return -EOPNOTSUPP;
9950
9951         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9952         if (!br_spec)
9953                 return -EINVAL;
9954
9955         nla_for_each_nested(attr, br_spec, rem) {
9956                 int status;
9957                 __u16 mode;
9958
9959                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9960                         continue;
9961
9962                 if (nla_len(attr) < sizeof(mode))
9963                         return -EINVAL;
9964
9965                 mode = nla_get_u16(attr);
9966                 status = ixgbe_configure_bridge_mode(adapter, mode);
9967                 if (status)
9968                         return status;
9969
9970                 break;
9971         }
9972
9973         return 0;
9974 }
9975
9976 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9977                                     struct net_device *dev,
9978                                     u32 filter_mask, int nlflags)
9979 {
9980         struct ixgbe_adapter *adapter = netdev_priv(dev);
9981
9982         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9983                 return 0;
9984
9985         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9986                                        adapter->bridge_mode, 0, 0, nlflags,
9987                                        filter_mask, NULL);
9988 }
9989
9990 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9991 {
9992         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9993         struct ixgbe_fwd_adapter *accel;
9994         int tcs = adapter->hw_tcs ? : 1;
9995         int pool, err;
9996
9997         if (adapter->xdp_prog) {
9998                 e_warn(probe, "L2FW offload is not supported with XDP\n");
9999                 return ERR_PTR(-EINVAL);
10000         }
10001
10002         /* The hardware supported by ixgbe only filters on the destination MAC
10003          * address. In order to avoid issues we only support offloading modes
10004          * where the hardware can actually provide the functionality.
10005          */
10006         if (!macvlan_supports_dest_filter(vdev))
10007                 return ERR_PTR(-EMEDIUMTYPE);
10008
10009         /* We need to lock down the macvlan to be a single queue device so that
10010          * we can reuse the tc_to_txq field in the macvlan netdev to represent
10011          * the queue mapping to our netdev.
10012          */
10013         if (netif_is_multiqueue(vdev))
10014                 return ERR_PTR(-ERANGE);
10015
10016         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
10017         if (pool == adapter->num_rx_pools) {
10018                 u16 used_pools = adapter->num_vfs + adapter->num_rx_pools;
10019                 u16 reserved_pools;
10020
10021                 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
10022                      adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||
10023                     adapter->num_rx_pools > IXGBE_MAX_MACVLANS)
10024                         return ERR_PTR(-EBUSY);
10025
10026                 /* Hardware has a limited number of available pools. Each VF,
10027                  * and the PF require a pool. Check to ensure we don't
10028                  * attempt to use more then the available number of pools.
10029                  */
10030                 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
10031                         return ERR_PTR(-EBUSY);
10032
10033                 /* Enable VMDq flag so device will be set in VM mode */
10034                 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED |
10035                                   IXGBE_FLAG_SRIOV_ENABLED;
10036
10037                 /* Try to reserve as many queues per pool as possible,
10038                  * we start with the configurations that support 4 queues
10039                  * per pools, followed by 2, and then by just 1 per pool.
10040                  */
10041                 if (used_pools < 32 && adapter->num_rx_pools < 16)
10042                         reserved_pools = min_t(u16,
10043                                                32 - used_pools,
10044                                                16 - adapter->num_rx_pools);
10045                 else if (adapter->num_rx_pools < 32)
10046                         reserved_pools = min_t(u16,
10047                                                64 - used_pools,
10048                                                32 - adapter->num_rx_pools);
10049                 else
10050                         reserved_pools = 64 - used_pools;
10051
10052
10053                 if (!reserved_pools)
10054                         return ERR_PTR(-EBUSY);
10055
10056                 adapter->ring_feature[RING_F_VMDQ].limit += reserved_pools;
10057
10058                 /* Force reinit of ring allocation with VMDQ enabled */
10059                 err = ixgbe_setup_tc(pdev, adapter->hw_tcs);
10060                 if (err)
10061                         return ERR_PTR(err);
10062
10063                 if (pool >= adapter->num_rx_pools)
10064                         return ERR_PTR(-ENOMEM);
10065         }
10066
10067         accel = kzalloc(sizeof(*accel), GFP_KERNEL);
10068         if (!accel)
10069                 return ERR_PTR(-ENOMEM);
10070
10071         set_bit(pool, adapter->fwd_bitmask);
10072         netdev_set_sb_channel(vdev, pool);
10073         accel->pool = pool;
10074         accel->netdev = vdev;
10075
10076         if (!netif_running(pdev))
10077                 return accel;
10078
10079         err = ixgbe_fwd_ring_up(adapter, accel);
10080         if (err)
10081                 return ERR_PTR(err);
10082
10083         return accel;
10084 }
10085
10086 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
10087 {
10088         struct ixgbe_fwd_adapter *accel = priv;
10089         struct ixgbe_adapter *adapter = netdev_priv(pdev);
10090         unsigned int rxbase = accel->rx_base_queue;
10091         unsigned int i;
10092
10093         /* delete unicast filter associated with offloaded interface */
10094         ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr,
10095                              VMDQ_P(accel->pool));
10096
10097         /* Allow remaining Rx packets to get flushed out of the
10098          * Rx FIFO before we drop the netdev for the ring.
10099          */
10100         usleep_range(10000, 20000);
10101
10102         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
10103                 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i];
10104                 struct ixgbe_q_vector *qv = ring->q_vector;
10105
10106                 /* Make sure we aren't processing any packets and clear
10107                  * netdev to shut down the ring.
10108                  */
10109                 if (netif_running(adapter->netdev))
10110                         napi_synchronize(&qv->napi);
10111                 ring->netdev = NULL;
10112         }
10113
10114         /* unbind the queues and drop the subordinate channel config */
10115         netdev_unbind_sb_channel(pdev, accel->netdev);
10116         netdev_set_sb_channel(accel->netdev, 0);
10117
10118         clear_bit(accel->pool, adapter->fwd_bitmask);
10119         kfree(accel);
10120 }
10121
10122 #define IXGBE_MAX_MAC_HDR_LEN           127
10123 #define IXGBE_MAX_NETWORK_HDR_LEN       511
10124
10125 static netdev_features_t
10126 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
10127                      netdev_features_t features)
10128 {
10129         unsigned int network_hdr_len, mac_hdr_len;
10130
10131         /* Make certain the headers can be described by a context descriptor */
10132         mac_hdr_len = skb_network_header(skb) - skb->data;
10133         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
10134                 return features & ~(NETIF_F_HW_CSUM |
10135                                     NETIF_F_SCTP_CRC |
10136                                     NETIF_F_HW_VLAN_CTAG_TX |
10137                                     NETIF_F_TSO |
10138                                     NETIF_F_TSO6);
10139
10140         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
10141         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
10142                 return features & ~(NETIF_F_HW_CSUM |
10143                                     NETIF_F_SCTP_CRC |
10144                                     NETIF_F_TSO |
10145                                     NETIF_F_TSO6);
10146
10147         /* We can only support IPV4 TSO in tunnels if we can mangle the
10148          * inner IP ID field, so strip TSO if MANGLEID is not supported.
10149          * IPsec offoad sets skb->encapsulation but still can handle
10150          * the TSO, so it's the exception.
10151          */
10152         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) {
10153 #ifdef CONFIG_XFRM_OFFLOAD
10154                 if (!skb->sp)
10155 #endif
10156                         features &= ~NETIF_F_TSO;
10157         }
10158
10159         return features;
10160 }
10161
10162 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
10163 {
10164         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
10165         struct ixgbe_adapter *adapter = netdev_priv(dev);
10166         struct bpf_prog *old_prog;
10167
10168         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
10169                 return -EINVAL;
10170
10171         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
10172                 return -EINVAL;
10173
10174         /* verify ixgbe ring attributes are sufficient for XDP */
10175         for (i = 0; i < adapter->num_rx_queues; i++) {
10176                 struct ixgbe_ring *ring = adapter->rx_ring[i];
10177
10178                 if (ring_is_rsc_enabled(ring))
10179                         return -EINVAL;
10180
10181                 if (frame_size > ixgbe_rx_bufsz(ring))
10182                         return -EINVAL;
10183         }
10184
10185         if (nr_cpu_ids > MAX_XDP_QUEUES)
10186                 return -ENOMEM;
10187
10188         old_prog = xchg(&adapter->xdp_prog, prog);
10189
10190         /* If transitioning XDP modes reconfigure rings */
10191         if (!!prog != !!old_prog) {
10192                 int err = ixgbe_setup_tc(dev, adapter->hw_tcs);
10193
10194                 if (err) {
10195                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
10196                         return -EINVAL;
10197                 }
10198         } else {
10199                 for (i = 0; i < adapter->num_rx_queues; i++)
10200                         (void)xchg(&adapter->rx_ring[i]->xdp_prog,
10201                             adapter->xdp_prog);
10202         }
10203
10204         if (old_prog)
10205                 bpf_prog_put(old_prog);
10206
10207         return 0;
10208 }
10209
10210 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
10211 {
10212         struct ixgbe_adapter *adapter = netdev_priv(dev);
10213
10214         switch (xdp->command) {
10215         case XDP_SETUP_PROG:
10216                 return ixgbe_xdp_setup(dev, xdp->prog);
10217         case XDP_QUERY_PROG:
10218                 xdp->prog_id = adapter->xdp_prog ?
10219                         adapter->xdp_prog->aux->id : 0;
10220                 return 0;
10221         default:
10222                 return -EINVAL;
10223         }
10224 }
10225
10226 static void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring)
10227 {
10228         /* Force memory writes to complete before letting h/w know there
10229          * are new descriptors to fetch.
10230          */
10231         wmb();
10232         writel(ring->next_to_use, ring->tail);
10233 }
10234
10235 static int ixgbe_xdp_xmit(struct net_device *dev, int n,
10236                           struct xdp_frame **frames, u32 flags)
10237 {
10238         struct ixgbe_adapter *adapter = netdev_priv(dev);
10239         struct ixgbe_ring *ring;
10240         int drops = 0;
10241         int i;
10242
10243         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10244                 return -ENETDOWN;
10245
10246         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
10247                 return -EINVAL;
10248
10249         /* During program transitions its possible adapter->xdp_prog is assigned
10250          * but ring has not been configured yet. In this case simply abort xmit.
10251          */
10252         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10253         if (unlikely(!ring))
10254                 return -ENXIO;
10255
10256         for (i = 0; i < n; i++) {
10257                 struct xdp_frame *xdpf = frames[i];
10258                 int err;
10259
10260                 err = ixgbe_xmit_xdp_ring(adapter, xdpf);
10261                 if (err != IXGBE_XDP_TX) {
10262                         xdp_return_frame_rx_napi(xdpf);
10263                         drops++;
10264                 }
10265         }
10266
10267         if (unlikely(flags & XDP_XMIT_FLUSH))
10268                 ixgbe_xdp_ring_update_tail(ring);
10269
10270         return n - drops;
10271 }
10272
10273 static const struct net_device_ops ixgbe_netdev_ops = {
10274         .ndo_open               = ixgbe_open,
10275         .ndo_stop               = ixgbe_close,
10276         .ndo_start_xmit         = ixgbe_xmit_frame,
10277         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
10278         .ndo_validate_addr      = eth_validate_addr,
10279         .ndo_set_mac_address    = ixgbe_set_mac,
10280         .ndo_change_mtu         = ixgbe_change_mtu,
10281         .ndo_tx_timeout         = ixgbe_tx_timeout,
10282         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
10283         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
10284         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
10285         .ndo_do_ioctl           = ixgbe_ioctl,
10286         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
10287         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
10288         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
10289         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
10290         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10291         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
10292         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
10293         .ndo_get_stats64        = ixgbe_get_stats64,
10294         .ndo_setup_tc           = __ixgbe_setup_tc,
10295 #ifdef IXGBE_FCOE
10296         .ndo_select_queue       = ixgbe_select_queue,
10297         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10298         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10299         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10300         .ndo_fcoe_enable = ixgbe_fcoe_enable,
10301         .ndo_fcoe_disable = ixgbe_fcoe_disable,
10302         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10303         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10304 #endif /* IXGBE_FCOE */
10305         .ndo_set_features = ixgbe_set_features,
10306         .ndo_fix_features = ixgbe_fix_features,
10307         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
10308         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
10309         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
10310         .ndo_dfwd_add_station   = ixgbe_fwd_add,
10311         .ndo_dfwd_del_station   = ixgbe_fwd_del,
10312         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
10313         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
10314         .ndo_features_check     = ixgbe_features_check,
10315         .ndo_bpf                = ixgbe_xdp,
10316         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
10317 };
10318
10319 /**
10320  * ixgbe_enumerate_functions - Get the number of ports this device has
10321  * @adapter: adapter structure
10322  *
10323  * This function enumerates the phsyical functions co-located on a single slot,
10324  * in order to determine how many ports a device has. This is most useful in
10325  * determining the required GT/s of PCIe bandwidth necessary for optimal
10326  * performance.
10327  **/
10328 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10329 {
10330         struct pci_dev *entry, *pdev = adapter->pdev;
10331         int physfns = 0;
10332
10333         /* Some cards can not use the generic count PCIe functions method,
10334          * because they are behind a parent switch, so we hardcode these with
10335          * the correct number of functions.
10336          */
10337         if (ixgbe_pcie_from_parent(&adapter->hw))
10338                 physfns = 4;
10339
10340         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10341                 /* don't count virtual functions */
10342                 if (entry->is_virtfn)
10343                         continue;
10344
10345                 /* When the devices on the bus don't all match our device ID,
10346                  * we can't reliably determine the correct number of
10347                  * functions. This can occur if a function has been direct
10348                  * attached to a virtual machine using VT-d, for example. In
10349                  * this case, simply return -1 to indicate this.
10350                  */
10351                 if ((entry->vendor != pdev->vendor) ||
10352                     (entry->device != pdev->device))
10353                         return -1;
10354
10355                 physfns++;
10356         }
10357
10358         return physfns;
10359 }
10360
10361 /**
10362  * ixgbe_wol_supported - Check whether device supports WoL
10363  * @adapter: the adapter private structure
10364  * @device_id: the device ID
10365  * @subdevice_id: the subsystem device ID
10366  *
10367  * This function is used by probe and ethtool to determine
10368  * which devices have WoL support
10369  *
10370  **/
10371 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10372                          u16 subdevice_id)
10373 {
10374         struct ixgbe_hw *hw = &adapter->hw;
10375         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10376
10377         /* WOL not supported on 82598 */
10378         if (hw->mac.type == ixgbe_mac_82598EB)
10379                 return false;
10380
10381         /* check eeprom to see if WOL is enabled for X540 and newer */
10382         if (hw->mac.type >= ixgbe_mac_X540) {
10383                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10384                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10385                      (hw->bus.func == 0)))
10386                         return true;
10387         }
10388
10389         /* WOL is determined based on device IDs for 82599 MACs */
10390         switch (device_id) {
10391         case IXGBE_DEV_ID_82599_SFP:
10392                 /* Only these subdevices could supports WOL */
10393                 switch (subdevice_id) {
10394                 case IXGBE_SUBDEV_ID_82599_560FLR:
10395                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10396                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10397                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10398                         /* only support first port */
10399                         if (hw->bus.func != 0)
10400                                 break;
10401                         /* fall through */
10402                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10403                 case IXGBE_SUBDEV_ID_82599_SFP:
10404                 case IXGBE_SUBDEV_ID_82599_RNDC:
10405                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10406                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10407                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10408                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10409                         return true;
10410                 }
10411                 break;
10412         case IXGBE_DEV_ID_82599EN_SFP:
10413                 /* Only these subdevices support WOL */
10414                 switch (subdevice_id) {
10415                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10416                         return true;
10417                 }
10418                 break;
10419         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10420                 /* All except this subdevice support WOL */
10421                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10422                         return true;
10423                 break;
10424         case IXGBE_DEV_ID_82599_KX4:
10425                 return  true;
10426         default:
10427                 break;
10428         }
10429
10430         return false;
10431 }
10432
10433 /**
10434  * ixgbe_set_fw_version - Set FW version
10435  * @adapter: the adapter private structure
10436  *
10437  * This function is used by probe and ethtool to determine the FW version to
10438  * format to display. The FW version is taken from the EEPROM/NVM.
10439  */
10440 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10441 {
10442         struct ixgbe_hw *hw = &adapter->hw;
10443         struct ixgbe_nvm_version nvm_ver;
10444
10445         ixgbe_get_oem_prod_version(hw, &nvm_ver);
10446         if (nvm_ver.oem_valid) {
10447                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10448                          "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10449                          nvm_ver.oem_release);
10450                 return;
10451         }
10452
10453         ixgbe_get_etk_id(hw, &nvm_ver);
10454         ixgbe_get_orom_version(hw, &nvm_ver);
10455
10456         if (nvm_ver.or_valid) {
10457                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10458                          "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10459                          nvm_ver.or_build, nvm_ver.or_patch);
10460                 return;
10461         }
10462
10463         /* Set ETrack ID format */
10464         snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10465                  "0x%08x", nvm_ver.etk_id);
10466 }
10467
10468 /**
10469  * ixgbe_probe - Device Initialization Routine
10470  * @pdev: PCI device information struct
10471  * @ent: entry in ixgbe_pci_tbl
10472  *
10473  * Returns 0 on success, negative on failure
10474  *
10475  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10476  * The OS initialization, configuring of the adapter private structure,
10477  * and a hardware reset occur.
10478  **/
10479 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10480 {
10481         struct net_device *netdev;
10482         struct ixgbe_adapter *adapter = NULL;
10483         struct ixgbe_hw *hw;
10484         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10485         int i, err, pci_using_dac, expected_gts;
10486         unsigned int indices = MAX_TX_QUEUES;
10487         u8 part_str[IXGBE_PBANUM_LENGTH];
10488         bool disable_dev = false;
10489 #ifdef IXGBE_FCOE
10490         u16 device_caps;
10491 #endif
10492         u32 eec;
10493
10494         /* Catch broken hardware that put the wrong VF device ID in
10495          * the PCIe SR-IOV capability.
10496          */
10497         if (pdev->is_virtfn) {
10498                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10499                      pci_name(pdev), pdev->vendor, pdev->device);
10500                 return -EINVAL;
10501         }
10502
10503         err = pci_enable_device_mem(pdev);
10504         if (err)
10505                 return err;
10506
10507         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10508                 pci_using_dac = 1;
10509         } else {
10510                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10511                 if (err) {
10512                         dev_err(&pdev->dev,
10513                                 "No usable DMA configuration, aborting\n");
10514                         goto err_dma;
10515                 }
10516                 pci_using_dac = 0;
10517         }
10518
10519         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10520         if (err) {
10521                 dev_err(&pdev->dev,
10522                         "pci_request_selected_regions failed 0x%x\n", err);
10523                 goto err_pci_reg;
10524         }
10525
10526         pci_enable_pcie_error_reporting(pdev);
10527
10528         pci_set_master(pdev);
10529         pci_save_state(pdev);
10530
10531         if (ii->mac == ixgbe_mac_82598EB) {
10532 #ifdef CONFIG_IXGBE_DCB
10533                 /* 8 TC w/ 4 queues per TC */
10534                 indices = 4 * MAX_TRAFFIC_CLASS;
10535 #else
10536                 indices = IXGBE_MAX_RSS_INDICES;
10537 #endif
10538         }
10539
10540         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10541         if (!netdev) {
10542                 err = -ENOMEM;
10543                 goto err_alloc_etherdev;
10544         }
10545
10546         SET_NETDEV_DEV(netdev, &pdev->dev);
10547
10548         adapter = netdev_priv(netdev);
10549
10550         adapter->netdev = netdev;
10551         adapter->pdev = pdev;
10552         hw = &adapter->hw;
10553         hw->back = adapter;
10554         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10555
10556         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10557                               pci_resource_len(pdev, 0));
10558         adapter->io_addr = hw->hw_addr;
10559         if (!hw->hw_addr) {
10560                 err = -EIO;
10561                 goto err_ioremap;
10562         }
10563
10564         netdev->netdev_ops = &ixgbe_netdev_ops;
10565         ixgbe_set_ethtool_ops(netdev);
10566         netdev->watchdog_timeo = 5 * HZ;
10567         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10568
10569         /* Setup hw api */
10570         hw->mac.ops   = *ii->mac_ops;
10571         hw->mac.type  = ii->mac;
10572         hw->mvals     = ii->mvals;
10573         if (ii->link_ops)
10574                 hw->link.ops  = *ii->link_ops;
10575
10576         /* EEPROM */
10577         hw->eeprom.ops = *ii->eeprom_ops;
10578         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10579         if (ixgbe_removed(hw->hw_addr)) {
10580                 err = -EIO;
10581                 goto err_ioremap;
10582         }
10583         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10584         if (!(eec & BIT(8)))
10585                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10586
10587         /* PHY */
10588         hw->phy.ops = *ii->phy_ops;
10589         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10590         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10591         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10592         hw->phy.mdio.mmds = 0;
10593         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10594         hw->phy.mdio.dev = netdev;
10595         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10596         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10597
10598         /* setup the private structure */
10599         err = ixgbe_sw_init(adapter, ii);
10600         if (err)
10601                 goto err_sw_init;
10602
10603         /* Make sure the SWFW semaphore is in a valid state */
10604         if (hw->mac.ops.init_swfw_sync)
10605                 hw->mac.ops.init_swfw_sync(hw);
10606
10607         /* Make it possible the adapter to be woken up via WOL */
10608         switch (adapter->hw.mac.type) {
10609         case ixgbe_mac_82599EB:
10610         case ixgbe_mac_X540:
10611         case ixgbe_mac_X550:
10612         case ixgbe_mac_X550EM_x:
10613         case ixgbe_mac_x550em_a:
10614                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10615                 break;
10616         default:
10617                 break;
10618         }
10619
10620         /*
10621          * If there is a fan on this device and it has failed log the
10622          * failure.
10623          */
10624         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10625                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10626                 if (esdp & IXGBE_ESDP_SDP1)
10627                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10628         }
10629
10630         if (allow_unsupported_sfp)
10631                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10632
10633         /* reset_hw fills in the perm_addr as well */
10634         hw->phy.reset_if_overtemp = true;
10635         err = hw->mac.ops.reset_hw(hw);
10636         hw->phy.reset_if_overtemp = false;
10637         ixgbe_set_eee_capable(adapter);
10638         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10639                 err = 0;
10640         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10641                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10642                 e_dev_err("Reload the driver after installing a supported module.\n");
10643                 goto err_sw_init;
10644         } else if (err) {
10645                 e_dev_err("HW Init failed: %d\n", err);
10646                 goto err_sw_init;
10647         }
10648
10649 #ifdef CONFIG_PCI_IOV
10650         /* SR-IOV not supported on the 82598 */
10651         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10652                 goto skip_sriov;
10653         /* Mailbox */
10654         ixgbe_init_mbx_params_pf(hw);
10655         hw->mbx.ops = ii->mbx_ops;
10656         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10657         ixgbe_enable_sriov(adapter, max_vfs);
10658 skip_sriov:
10659
10660 #endif
10661         netdev->features = NETIF_F_SG |
10662                            NETIF_F_TSO |
10663                            NETIF_F_TSO6 |
10664                            NETIF_F_RXHASH |
10665                            NETIF_F_RXCSUM |
10666                            NETIF_F_HW_CSUM;
10667
10668 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10669                                     NETIF_F_GSO_GRE_CSUM | \
10670                                     NETIF_F_GSO_IPXIP4 | \
10671                                     NETIF_F_GSO_IPXIP6 | \
10672                                     NETIF_F_GSO_UDP_TUNNEL | \
10673                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10674
10675         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10676         netdev->features |= NETIF_F_GSO_PARTIAL |
10677                             IXGBE_GSO_PARTIAL_FEATURES;
10678
10679         if (hw->mac.type >= ixgbe_mac_82599EB)
10680                 netdev->features |= NETIF_F_SCTP_CRC;
10681
10682 #ifdef CONFIG_XFRM_OFFLOAD
10683 #define IXGBE_ESP_FEATURES      (NETIF_F_HW_ESP | \
10684                                  NETIF_F_HW_ESP_TX_CSUM | \
10685                                  NETIF_F_GSO_ESP)
10686
10687         if (adapter->ipsec)
10688                 netdev->features |= IXGBE_ESP_FEATURES;
10689 #endif
10690         /* copy netdev features into list of user selectable features */
10691         netdev->hw_features |= netdev->features |
10692                                NETIF_F_HW_VLAN_CTAG_FILTER |
10693                                NETIF_F_HW_VLAN_CTAG_RX |
10694                                NETIF_F_HW_VLAN_CTAG_TX |
10695                                NETIF_F_RXALL |
10696                                NETIF_F_HW_L2FW_DOFFLOAD;
10697
10698         if (hw->mac.type >= ixgbe_mac_82599EB)
10699                 netdev->hw_features |= NETIF_F_NTUPLE |
10700                                        NETIF_F_HW_TC;
10701
10702         if (pci_using_dac)
10703                 netdev->features |= NETIF_F_HIGHDMA;
10704
10705         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10706         netdev->hw_enc_features |= netdev->vlan_features;
10707         netdev->mpls_features |= NETIF_F_SG |
10708                                  NETIF_F_TSO |
10709                                  NETIF_F_TSO6 |
10710                                  NETIF_F_HW_CSUM;
10711         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10712
10713         /* set this bit last since it cannot be part of vlan_features */
10714         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10715                             NETIF_F_HW_VLAN_CTAG_RX |
10716                             NETIF_F_HW_VLAN_CTAG_TX;
10717
10718         netdev->priv_flags |= IFF_UNICAST_FLT;
10719         netdev->priv_flags |= IFF_SUPP_NOFCS;
10720
10721         /* MTU range: 68 - 9710 */
10722         netdev->min_mtu = ETH_MIN_MTU;
10723         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10724
10725 #ifdef CONFIG_IXGBE_DCB
10726         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10727                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10728 #endif
10729
10730 #ifdef IXGBE_FCOE
10731         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10732                 unsigned int fcoe_l;
10733
10734                 if (hw->mac.ops.get_device_caps) {
10735                         hw->mac.ops.get_device_caps(hw, &device_caps);
10736                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10737                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10738                 }
10739
10740
10741                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10742                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10743
10744                 netdev->features |= NETIF_F_FSO |
10745                                     NETIF_F_FCOE_CRC;
10746
10747                 netdev->vlan_features |= NETIF_F_FSO |
10748                                          NETIF_F_FCOE_CRC |
10749                                          NETIF_F_FCOE_MTU;
10750         }
10751 #endif /* IXGBE_FCOE */
10752         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10753                 netdev->hw_features |= NETIF_F_LRO;
10754         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10755                 netdev->features |= NETIF_F_LRO;
10756
10757         /* make sure the EEPROM is good */
10758         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10759                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10760                 err = -EIO;
10761                 goto err_sw_init;
10762         }
10763
10764         eth_platform_get_mac_address(&adapter->pdev->dev,
10765                                      adapter->hw.mac.perm_addr);
10766
10767         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10768
10769         if (!is_valid_ether_addr(netdev->dev_addr)) {
10770                 e_dev_err("invalid MAC address\n");
10771                 err = -EIO;
10772                 goto err_sw_init;
10773         }
10774
10775         /* Set hw->mac.addr to permanent MAC address */
10776         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
10777         ixgbe_mac_set_default_filter(adapter);
10778
10779         timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
10780
10781         if (ixgbe_removed(hw->hw_addr)) {
10782                 err = -EIO;
10783                 goto err_sw_init;
10784         }
10785         INIT_WORK(&adapter->service_task, ixgbe_service_task);
10786         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
10787         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
10788
10789         err = ixgbe_init_interrupt_scheme(adapter);
10790         if (err)
10791                 goto err_sw_init;
10792
10793         for (i = 0; i < adapter->num_rx_queues; i++)
10794                 u64_stats_init(&adapter->rx_ring[i]->syncp);
10795         for (i = 0; i < adapter->num_tx_queues; i++)
10796                 u64_stats_init(&adapter->tx_ring[i]->syncp);
10797         for (i = 0; i < adapter->num_xdp_queues; i++)
10798                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
10799
10800         /* WOL not supported for all devices */
10801         adapter->wol = 0;
10802         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
10803         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
10804                                                 pdev->subsystem_device);
10805         if (hw->wol_enabled)
10806                 adapter->wol = IXGBE_WUFC_MAG;
10807
10808         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
10809
10810         /* save off EEPROM version number */
10811         ixgbe_set_fw_version(adapter);
10812
10813         /* pick up the PCI bus settings for reporting later */
10814         if (ixgbe_pcie_from_parent(hw))
10815                 ixgbe_get_parent_bus_info(adapter);
10816         else
10817                  hw->mac.ops.get_bus_info(hw);
10818
10819         /* calculate the expected PCIe bandwidth required for optimal
10820          * performance. Note that some older parts will never have enough
10821          * bandwidth due to being older generation PCIe parts. We clamp these
10822          * parts to ensure no warning is displayed if it can't be fixed.
10823          */
10824         switch (hw->mac.type) {
10825         case ixgbe_mac_82598EB:
10826                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
10827                 break;
10828         default:
10829                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
10830                 break;
10831         }
10832
10833         /* don't check link if we failed to enumerate functions */
10834         if (expected_gts > 0)
10835                 ixgbe_check_minimum_link(adapter, expected_gts);
10836
10837         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
10838         if (err)
10839                 strlcpy(part_str, "Unknown", sizeof(part_str));
10840         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
10841                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
10842                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
10843                            part_str);
10844         else
10845                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
10846                            hw->mac.type, hw->phy.type, part_str);
10847
10848         e_dev_info("%pM\n", netdev->dev_addr);
10849
10850         /* reset the hardware with the new settings */
10851         err = hw->mac.ops.start_hw(hw);
10852         if (err == IXGBE_ERR_EEPROM_VERSION) {
10853                 /* We are running on a pre-production device, log a warning */
10854                 e_dev_warn("This device is a pre-production adapter/LOM. "
10855                            "Please be aware there may be issues associated "
10856                            "with your hardware.  If you are experiencing "
10857                            "problems please contact your Intel or hardware "
10858                            "representative who provided you with this "
10859                            "hardware.\n");
10860         }
10861         strcpy(netdev->name, "eth%d");
10862         pci_set_drvdata(pdev, adapter);
10863         err = register_netdev(netdev);
10864         if (err)
10865                 goto err_register;
10866
10867
10868         /* power down the optics for 82599 SFP+ fiber */
10869         if (hw->mac.ops.disable_tx_laser)
10870                 hw->mac.ops.disable_tx_laser(hw);
10871
10872         /* carrier off reporting is important to ethtool even BEFORE open */
10873         netif_carrier_off(netdev);
10874
10875 #ifdef CONFIG_IXGBE_DCA
10876         if (dca_add_requester(&pdev->dev) == 0) {
10877                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
10878                 ixgbe_setup_dca(adapter);
10879         }
10880 #endif
10881         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
10882                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
10883                 for (i = 0; i < adapter->num_vfs; i++)
10884                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
10885         }
10886
10887         /* firmware requires driver version to be 0xFFFFFFFF
10888          * since os does not support feature
10889          */
10890         if (hw->mac.ops.set_fw_drv_ver)
10891                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
10892                                            sizeof(ixgbe_driver_version) - 1,
10893                                            ixgbe_driver_version);
10894
10895         /* add san mac addr to netdev */
10896         ixgbe_add_sanmac_netdev(netdev);
10897
10898         e_dev_info("%s\n", ixgbe_default_device_descr);
10899
10900 #ifdef CONFIG_IXGBE_HWMON
10901         if (ixgbe_sysfs_init(adapter))
10902                 e_err(probe, "failed to allocate sysfs resources\n");
10903 #endif /* CONFIG_IXGBE_HWMON */
10904
10905         ixgbe_dbg_adapter_init(adapter);
10906
10907         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
10908         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
10909                 hw->mac.ops.setup_link(hw,
10910                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
10911                         true);
10912
10913         return 0;
10914
10915 err_register:
10916         ixgbe_release_hw_control(adapter);
10917         ixgbe_clear_interrupt_scheme(adapter);
10918 err_sw_init:
10919         ixgbe_disable_sriov(adapter);
10920         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
10921         iounmap(adapter->io_addr);
10922         kfree(adapter->jump_tables[0]);
10923         kfree(adapter->mac_table);
10924         kfree(adapter->rss_key);
10925 err_ioremap:
10926         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10927         free_netdev(netdev);
10928 err_alloc_etherdev:
10929         pci_disable_pcie_error_reporting(pdev);
10930         pci_release_mem_regions(pdev);
10931 err_pci_reg:
10932 err_dma:
10933         if (!adapter || disable_dev)
10934                 pci_disable_device(pdev);
10935         return err;
10936 }
10937
10938 /**
10939  * ixgbe_remove - Device Removal Routine
10940  * @pdev: PCI device information struct
10941  *
10942  * ixgbe_remove is called by the PCI subsystem to alert the driver
10943  * that it should release a PCI device.  The could be caused by a
10944  * Hot-Plug event, or because the driver is going to be removed from
10945  * memory.
10946  **/
10947 static void ixgbe_remove(struct pci_dev *pdev)
10948 {
10949         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10950         struct net_device *netdev;
10951         bool disable_dev;
10952         int i;
10953
10954         /* if !adapter then we already cleaned up in probe */
10955         if (!adapter)
10956                 return;
10957
10958         netdev  = adapter->netdev;
10959         ixgbe_dbg_adapter_exit(adapter);
10960
10961         set_bit(__IXGBE_REMOVING, &adapter->state);
10962         cancel_work_sync(&adapter->service_task);
10963
10964
10965 #ifdef CONFIG_IXGBE_DCA
10966         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
10967                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
10968                 dca_remove_requester(&pdev->dev);
10969                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
10970                                 IXGBE_DCA_CTRL_DCA_DISABLE);
10971         }
10972
10973 #endif
10974 #ifdef CONFIG_IXGBE_HWMON
10975         ixgbe_sysfs_exit(adapter);
10976 #endif /* CONFIG_IXGBE_HWMON */
10977
10978         /* remove the added san mac */
10979         ixgbe_del_sanmac_netdev(netdev);
10980
10981 #ifdef CONFIG_PCI_IOV
10982         ixgbe_disable_sriov(adapter);
10983 #endif
10984         if (netdev->reg_state == NETREG_REGISTERED)
10985                 unregister_netdev(netdev);
10986
10987         ixgbe_stop_ipsec_offload(adapter);
10988         ixgbe_clear_interrupt_scheme(adapter);
10989
10990         ixgbe_release_hw_control(adapter);
10991
10992 #ifdef CONFIG_DCB
10993         kfree(adapter->ixgbe_ieee_pfc);
10994         kfree(adapter->ixgbe_ieee_ets);
10995
10996 #endif
10997         iounmap(adapter->io_addr);
10998         pci_release_mem_regions(pdev);
10999
11000         e_dev_info("complete\n");
11001
11002         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
11003                 if (adapter->jump_tables[i]) {
11004                         kfree(adapter->jump_tables[i]->input);
11005                         kfree(adapter->jump_tables[i]->mask);
11006                 }
11007                 kfree(adapter->jump_tables[i]);
11008         }
11009
11010         kfree(adapter->mac_table);
11011         kfree(adapter->rss_key);
11012         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11013         free_netdev(netdev);
11014
11015         pci_disable_pcie_error_reporting(pdev);
11016
11017         if (disable_dev)
11018                 pci_disable_device(pdev);
11019 }
11020
11021 /**
11022  * ixgbe_io_error_detected - called when PCI error is detected
11023  * @pdev: Pointer to PCI device
11024  * @state: The current pci connection state
11025  *
11026  * This function is called after a PCI bus error affecting
11027  * this device has been detected.
11028  */
11029 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
11030                                                 pci_channel_state_t state)
11031 {
11032         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11033         struct net_device *netdev = adapter->netdev;
11034
11035 #ifdef CONFIG_PCI_IOV
11036         struct ixgbe_hw *hw = &adapter->hw;
11037         struct pci_dev *bdev, *vfdev;
11038         u32 dw0, dw1, dw2, dw3;
11039         int vf, pos;
11040         u16 req_id, pf_func;
11041
11042         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
11043             adapter->num_vfs == 0)
11044                 goto skip_bad_vf_detection;
11045
11046         bdev = pdev->bus->self;
11047         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
11048                 bdev = bdev->bus->self;
11049
11050         if (!bdev)
11051                 goto skip_bad_vf_detection;
11052
11053         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
11054         if (!pos)
11055                 goto skip_bad_vf_detection;
11056
11057         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
11058         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
11059         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
11060         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
11061         if (ixgbe_removed(hw->hw_addr))
11062                 goto skip_bad_vf_detection;
11063
11064         req_id = dw1 >> 16;
11065         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
11066         if (!(req_id & 0x0080))
11067                 goto skip_bad_vf_detection;
11068
11069         pf_func = req_id & 0x01;
11070         if ((pf_func & 1) == (pdev->devfn & 1)) {
11071                 unsigned int device_id;
11072
11073                 vf = (req_id & 0x7F) >> 1;
11074                 e_dev_err("VF %d has caused a PCIe error\n", vf);
11075                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
11076                                 "%8.8x\tdw3: %8.8x\n",
11077                 dw0, dw1, dw2, dw3);
11078                 switch (adapter->hw.mac.type) {
11079                 case ixgbe_mac_82599EB:
11080                         device_id = IXGBE_82599_VF_DEVICE_ID;
11081                         break;
11082                 case ixgbe_mac_X540:
11083                         device_id = IXGBE_X540_VF_DEVICE_ID;
11084                         break;
11085                 case ixgbe_mac_X550:
11086                         device_id = IXGBE_DEV_ID_X550_VF;
11087                         break;
11088                 case ixgbe_mac_X550EM_x:
11089                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
11090                         break;
11091                 case ixgbe_mac_x550em_a:
11092                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
11093                         break;
11094                 default:
11095                         device_id = 0;
11096                         break;
11097                 }
11098
11099                 /* Find the pci device of the offending VF */
11100                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
11101                 while (vfdev) {
11102                         if (vfdev->devfn == (req_id & 0xFF))
11103                                 break;
11104                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
11105                                                device_id, vfdev);
11106                 }
11107                 /*
11108                  * There's a slim chance the VF could have been hot plugged,
11109                  * so if it is no longer present we don't need to issue the
11110                  * VFLR.  Just clean up the AER in that case.
11111                  */
11112                 if (vfdev) {
11113                         pcie_flr(vfdev);
11114                         /* Free device reference count */
11115                         pci_dev_put(vfdev);
11116                 }
11117
11118                 pci_cleanup_aer_uncorrect_error_status(pdev);
11119         }
11120
11121         /*
11122          * Even though the error may have occurred on the other port
11123          * we still need to increment the vf error reference count for
11124          * both ports because the I/O resume function will be called
11125          * for both of them.
11126          */
11127         adapter->vferr_refcount++;
11128
11129         return PCI_ERS_RESULT_RECOVERED;
11130
11131 skip_bad_vf_detection:
11132 #endif /* CONFIG_PCI_IOV */
11133         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
11134                 return PCI_ERS_RESULT_DISCONNECT;
11135
11136         if (!netif_device_present(netdev))
11137                 return PCI_ERS_RESULT_DISCONNECT;
11138
11139         rtnl_lock();
11140         netif_device_detach(netdev);
11141
11142         if (netif_running(netdev))
11143                 ixgbe_close_suspend(adapter);
11144
11145         if (state == pci_channel_io_perm_failure) {
11146                 rtnl_unlock();
11147                 return PCI_ERS_RESULT_DISCONNECT;
11148         }
11149
11150         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
11151                 pci_disable_device(pdev);
11152         rtnl_unlock();
11153
11154         /* Request a slot reset. */
11155         return PCI_ERS_RESULT_NEED_RESET;
11156 }
11157
11158 /**
11159  * ixgbe_io_slot_reset - called after the pci bus has been reset.
11160  * @pdev: Pointer to PCI device
11161  *
11162  * Restart the card from scratch, as if from a cold-boot.
11163  */
11164 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
11165 {
11166         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11167         pci_ers_result_t result;
11168         int err;
11169
11170         if (pci_enable_device_mem(pdev)) {
11171                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
11172                 result = PCI_ERS_RESULT_DISCONNECT;
11173         } else {
11174                 smp_mb__before_atomic();
11175                 clear_bit(__IXGBE_DISABLED, &adapter->state);
11176                 adapter->hw.hw_addr = adapter->io_addr;
11177                 pci_set_master(pdev);
11178                 pci_restore_state(pdev);
11179                 pci_save_state(pdev);
11180
11181                 pci_wake_from_d3(pdev, false);
11182
11183                 ixgbe_reset(adapter);
11184                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
11185                 result = PCI_ERS_RESULT_RECOVERED;
11186         }
11187
11188         err = pci_cleanup_aer_uncorrect_error_status(pdev);
11189         if (err) {
11190                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
11191                           "failed 0x%0x\n", err);
11192                 /* non-fatal, continue */
11193         }
11194
11195         return result;
11196 }
11197
11198 /**
11199  * ixgbe_io_resume - called when traffic can start flowing again.
11200  * @pdev: Pointer to PCI device
11201  *
11202  * This callback is called when the error recovery driver tells us that
11203  * its OK to resume normal operation.
11204  */
11205 static void ixgbe_io_resume(struct pci_dev *pdev)
11206 {
11207         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11208         struct net_device *netdev = adapter->netdev;
11209
11210 #ifdef CONFIG_PCI_IOV
11211         if (adapter->vferr_refcount) {
11212                 e_info(drv, "Resuming after VF err\n");
11213                 adapter->vferr_refcount--;
11214                 return;
11215         }
11216
11217 #endif
11218         rtnl_lock();
11219         if (netif_running(netdev))
11220                 ixgbe_open(netdev);
11221
11222         netif_device_attach(netdev);
11223         rtnl_unlock();
11224 }
11225
11226 static const struct pci_error_handlers ixgbe_err_handler = {
11227         .error_detected = ixgbe_io_error_detected,
11228         .slot_reset = ixgbe_io_slot_reset,
11229         .resume = ixgbe_io_resume,
11230 };
11231
11232 static struct pci_driver ixgbe_driver = {
11233         .name     = ixgbe_driver_name,
11234         .id_table = ixgbe_pci_tbl,
11235         .probe    = ixgbe_probe,
11236         .remove   = ixgbe_remove,
11237 #ifdef CONFIG_PM
11238         .suspend  = ixgbe_suspend,
11239         .resume   = ixgbe_resume,
11240 #endif
11241         .shutdown = ixgbe_shutdown,
11242         .sriov_configure = ixgbe_pci_sriov_configure,
11243         .err_handler = &ixgbe_err_handler
11244 };
11245
11246 /**
11247  * ixgbe_init_module - Driver Registration Routine
11248  *
11249  * ixgbe_init_module is the first routine called when the driver is
11250  * loaded. All it does is register with the PCI subsystem.
11251  **/
11252 static int __init ixgbe_init_module(void)
11253 {
11254         int ret;
11255         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
11256         pr_info("%s\n", ixgbe_copyright);
11257
11258         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
11259         if (!ixgbe_wq) {
11260                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11261                 return -ENOMEM;
11262         }
11263
11264         ixgbe_dbg_init();
11265
11266         ret = pci_register_driver(&ixgbe_driver);
11267         if (ret) {
11268                 destroy_workqueue(ixgbe_wq);
11269                 ixgbe_dbg_exit();
11270                 return ret;
11271         }
11272
11273 #ifdef CONFIG_IXGBE_DCA
11274         dca_register_notify(&dca_notifier);
11275 #endif
11276
11277         return 0;
11278 }
11279
11280 module_init(ixgbe_init_module);
11281
11282 /**
11283  * ixgbe_exit_module - Driver Exit Cleanup Routine
11284  *
11285  * ixgbe_exit_module is called just before the driver is removed
11286  * from memory.
11287  **/
11288 static void __exit ixgbe_exit_module(void)
11289 {
11290 #ifdef CONFIG_IXGBE_DCA
11291         dca_unregister_notify(&dca_notifier);
11292 #endif
11293         pci_unregister_driver(&ixgbe_driver);
11294
11295         ixgbe_dbg_exit();
11296         if (ixgbe_wq) {
11297                 destroy_workqueue(ixgbe_wq);
11298                 ixgbe_wq = NULL;
11299         }
11300 }
11301
11302 #ifdef CONFIG_IXGBE_DCA
11303 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11304                             void *p)
11305 {
11306         int ret_val;
11307
11308         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11309                                          __ixgbe_notify_dca);
11310
11311         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11312 }
11313
11314 #endif /* CONFIG_IXGBE_DCA */
11315
11316 module_exit(ixgbe_exit_module);
11317
11318 /* ixgbe_main.c */