drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c

   1 /*
   2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32 #include <linux/device.h>
  33 #include <linux/netdevice.h>
  34 #include "en.h"
  35 #include "en/port.h"
  36 #include "en/port_buffer.h"
  37
  38 #define MLX5E_100MB (100000)
  39 #define MLX5E_1GB   (1000000)
  40
  41 #define MLX5E_CEE_STATE_UP    1
  42 #define MLX5E_CEE_STATE_DOWN  0
  43
  44 /* Max supported cable length is 1000 meters */
  45 #define MLX5E_MAX_CABLE_LENGTH 1000
  46
  47 enum {
  48         MLX5E_VENDOR_TC_GROUP_NUM = 7,
  49         MLX5E_LOWEST_PRIO_GROUP   = 0,
  50 };
  51
  52 #define MLX5_DSCP_SUPPORTED(mdev) (MLX5_CAP_GEN(mdev, qcam_reg)  && \
  53                                    MLX5_CAP_QCAM_REG(mdev, qpts) && \
  54                                    MLX5_CAP_QCAM_REG(mdev, qpdpm))
  55
  56 static int mlx5e_set_trust_state(struct mlx5e_priv *priv, u8 trust_state);
  57 static int mlx5e_set_dscp2prio(struct mlx5e_priv *priv, u8 dscp, u8 prio);
  58
  59 /* If dcbx mode is non-host set the dcbx mode to host.
  60  */
  61 static int mlx5e_dcbnl_set_dcbx_mode(struct mlx5e_priv *priv,
  62                                      enum mlx5_dcbx_oper_mode mode)
  63 {
  64         struct mlx5_core_dev *mdev = priv->mdev;
  65         u32 param[MLX5_ST_SZ_DW(dcbx_param)];
  66         int err;
  67
  68         err = mlx5_query_port_dcbx_param(mdev, param);
  69         if (err)
  70                 return err;
  71
  72         MLX5_SET(dcbx_param, param, version_admin, mode);
  73         if (mode != MLX5E_DCBX_PARAM_VER_OPER_HOST)
  74                 MLX5_SET(dcbx_param, param, willing_admin, 1);
  75
  76         return mlx5_set_port_dcbx_param(mdev, param);
  77 }
  78
  79 static int mlx5e_dcbnl_switch_to_host_mode(struct mlx5e_priv *priv)
  80 {
  81         struct mlx5e_dcbx *dcbx = &priv->dcbx;
  82         int err;
  83
  84         if (!MLX5_CAP_GEN(priv->mdev, dcbx))
  85                 return 0;
  86
  87         if (dcbx->mode == MLX5E_DCBX_PARAM_VER_OPER_HOST)
  88                 return 0;
  89
  90         err = mlx5e_dcbnl_set_dcbx_mode(priv, MLX5E_DCBX_PARAM_VER_OPER_HOST);
  91         if (err)
  92                 return err;
  93
  94         dcbx->mode = MLX5E_DCBX_PARAM_VER_OPER_HOST;
  95         return 0;
  96 }
  97
  98 static int mlx5e_dcbnl_ieee_getets(struct net_device *netdev,
  99                                    struct ieee_ets *ets)
 100 {
 101         struct mlx5e_priv *priv = netdev_priv(netdev);
 102         struct mlx5_core_dev *mdev = priv->mdev;
 103         u8 tc_group[IEEE_8021QAZ_MAX_TCS];
 104         bool is_tc_group_6_exist = false;
 105         bool is_zero_bw_ets_tc = false;
 106         int err = 0;
 107         int i;
 108
 109         if (!MLX5_CAP_GEN(priv->mdev, ets))
 110                 return -EOPNOTSUPP;
 111
 112         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
 113                 err = mlx5_query_port_prio_tc(mdev, i, &ets->prio_tc[i]);
 114                 if (err)
 115                         return err;
 116         }
 117
 118         ets->ets_cap = mlx5_max_tc(priv->mdev) + 1;
 119         for (i = 0; i < ets->ets_cap; i++) {
 120                 err = mlx5_query_port_tc_group(mdev, i, &tc_group[i]);
 121                 if (err)
 122                         return err;
 123
 124                 err = mlx5_query_port_tc_bw_alloc(mdev, i, &ets->tc_tx_bw[i]);
 125                 if (err)
 126                         return err;
 127
 128                 if (ets->tc_tx_bw[i] < MLX5E_MAX_BW_ALLOC &&
 129                     tc_group[i] == (MLX5E_LOWEST_PRIO_GROUP + 1))
 130                         is_zero_bw_ets_tc = true;
 131
 132                 if (tc_group[i] == (MLX5E_VENDOR_TC_GROUP_NUM - 1))
 133                         is_tc_group_6_exist = true;
 134         }
 135
 136         /* Report 0% ets tc if exits*/
 137         if (is_zero_bw_ets_tc) {
 138                 for (i = 0; i < ets->ets_cap; i++)
 139                         if (tc_group[i] == MLX5E_LOWEST_PRIO_GROUP)
 140                                 ets->tc_tx_bw[i] = 0;
 141         }
 142
 143         /* Update tc_tsa based on fw setting*/
 144         for (i = 0; i < ets->ets_cap; i++) {
 145                 if (ets->tc_tx_bw[i] < MLX5E_MAX_BW_ALLOC)
 146                         priv->dcbx.tc_tsa[i] = IEEE_8021QAZ_TSA_ETS;
 147                 else if (tc_group[i] == MLX5E_VENDOR_TC_GROUP_NUM &&
 148                          !is_tc_group_6_exist)
 149                         priv->dcbx.tc_tsa[i] = IEEE_8021QAZ_TSA_VENDOR;
 150         }
 151         memcpy(ets->tc_tsa, priv->dcbx.tc_tsa, sizeof(ets->tc_tsa));
 152
 153         return err;
 154 }
 155
 156 static void mlx5e_build_tc_group(struct ieee_ets *ets, u8 *tc_group, int max_tc)
 157 {
 158         bool any_tc_mapped_to_ets = false;
 159         bool ets_zero_bw = false;
 160         int strict_group;
 161         int i;
 162
 163         for (i = 0; i <= max_tc; i++) {
 164                 if (ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS) {
 165                         any_tc_mapped_to_ets = true;
 166                         if (!ets->tc_tx_bw[i])
 167                                 ets_zero_bw = true;
 168                 }
 169         }
 170
 171         /* strict group has higher priority than ets group */
 172         strict_group = MLX5E_LOWEST_PRIO_GROUP;
 173         if (any_tc_mapped_to_ets)
 174                 strict_group++;
 175         if (ets_zero_bw)
 176                 strict_group++;
 177
 178         for (i = 0; i <= max_tc; i++) {
 179                 switch (ets->tc_tsa[i]) {
 180                 case IEEE_8021QAZ_TSA_VENDOR:
 181                         tc_group[i] = MLX5E_VENDOR_TC_GROUP_NUM;
 182                         break;
 183                 case IEEE_8021QAZ_TSA_STRICT:
 184                         tc_group[i] = strict_group++;
 185                         break;
 186                 case IEEE_8021QAZ_TSA_ETS:
 187                         tc_group[i] = MLX5E_LOWEST_PRIO_GROUP;
 188                         if (ets->tc_tx_bw[i] && ets_zero_bw)
 189                                 tc_group[i] = MLX5E_LOWEST_PRIO_GROUP + 1;
 190                         break;
 191                 }
 192         }
 193 }
 194
 195 static void mlx5e_build_tc_tx_bw(struct ieee_ets *ets, u8 *tc_tx_bw,
 196                                  u8 *tc_group, int max_tc)
 197 {
 198         int bw_for_ets_zero_bw_tc = 0;
 199         int last_ets_zero_bw_tc = -1;
 200         int num_ets_zero_bw = 0;
 201         int i;
 202
 203         for (i = 0; i <= max_tc; i++) {
 204                 if (ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS &&
 205                     !ets->tc_tx_bw[i]) {
 206                         num_ets_zero_bw++;
 207                         last_ets_zero_bw_tc = i;
 208                 }
 209         }
 210
 211         if (num_ets_zero_bw)
 212                 bw_for_ets_zero_bw_tc = MLX5E_MAX_BW_ALLOC / num_ets_zero_bw;
 213
 214         for (i = 0; i <= max_tc; i++) {
 215                 switch (ets->tc_tsa[i]) {
 216                 case IEEE_8021QAZ_TSA_VENDOR:
 217                         tc_tx_bw[i] = MLX5E_MAX_BW_ALLOC;
 218                         break;
 219                 case IEEE_8021QAZ_TSA_STRICT:
 220                         tc_tx_bw[i] = MLX5E_MAX_BW_ALLOC;
 221                         break;
 222                 case IEEE_8021QAZ_TSA_ETS:
 223                         tc_tx_bw[i] = ets->tc_tx_bw[i] ?
 224                                       ets->tc_tx_bw[i] :
 225                                       bw_for_ets_zero_bw_tc;
 226                         break;
 227                 }
 228         }
 229
 230         /* Make sure the total bw for ets zero bw group is 100% */
 231         if (last_ets_zero_bw_tc != -1)
 232                 tc_tx_bw[last_ets_zero_bw_tc] +=
 233                         MLX5E_MAX_BW_ALLOC % num_ets_zero_bw;
 234 }
 235
 236 /* If there are ETS BW 0,
 237  *   Set ETS group # to 1 for all ETS non zero BW tcs. Their sum must be 100%.
 238  *   Set group #0 to all the ETS BW 0 tcs and
 239  *     equally splits the 100% BW between them
 240  *   Report both group #0 and #1 as ETS type.
 241  *     All the tcs in group #0 will be reported with 0% BW.
 242  */
 243 int mlx5e_dcbnl_ieee_setets_core(struct mlx5e_priv *priv, struct ieee_ets *ets)
 244 {
 245         struct mlx5_core_dev *mdev = priv->mdev;
 246         u8 tc_tx_bw[IEEE_8021QAZ_MAX_TCS];
 247         u8 tc_group[IEEE_8021QAZ_MAX_TCS];
 248         int max_tc = mlx5_max_tc(mdev);
 249         int err, i;
 250
 251         mlx5e_build_tc_group(ets, tc_group, max_tc);
 252         mlx5e_build_tc_tx_bw(ets, tc_tx_bw, tc_group, max_tc);
 253
 254         err = mlx5_set_port_prio_tc(mdev, ets->prio_tc);
 255         if (err)
 256                 return err;
 257
 258         err = mlx5_set_port_tc_group(mdev, tc_group);
 259         if (err)
 260                 return err;
 261
 262         err = mlx5_set_port_tc_bw_alloc(mdev, tc_tx_bw);
 263
 264         if (err)
 265                 return err;
 266
 267         memcpy(priv->dcbx.tc_tsa, ets->tc_tsa, sizeof(ets->tc_tsa));
 268
 269         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
 270                 mlx5e_dbg(HW, priv, "%s: prio_%d <=> tc_%d\n",
 271                           __func__, i, ets->prio_tc[i]);
 272                 mlx5e_dbg(HW, priv, "%s: tc_%d <=> tx_bw_%d%%, group_%d\n",
 273                           __func__, i, tc_tx_bw[i], tc_group[i]);
 274         }
 275
 276         return err;
 277 }
 278
 279 static int mlx5e_dbcnl_validate_ets(struct net_device *netdev,
 280                                     struct ieee_ets *ets,
 281                                     bool zero_sum_allowed)
 282 {
 283         bool have_ets_tc = false;
 284         int bw_sum = 0;
 285         int i;
 286
 287         /* Validate Priority */
 288         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
 289                 if (ets->prio_tc[i] >= MLX5E_MAX_PRIORITY) {
 290                         netdev_err(netdev,
 291                                    "Failed to validate ETS: priority value greater than max(%d)\n",
 292                                     MLX5E_MAX_PRIORITY);
 293                         return -EINVAL;
 294                 }
 295         }
 296
 297         /* Validate Bandwidth Sum */
 298         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
 299                 if (ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS) {
 300                         have_ets_tc = true;
 301                         bw_sum += ets->tc_tx_bw[i];
 302                 }
 303         }
 304
 305         if (have_ets_tc && bw_sum != 100) {
 306                 if (bw_sum || (!bw_sum && !zero_sum_allowed))
 307                         netdev_err(netdev,
 308                                    "Failed to validate ETS: BW sum is illegal\n");
 309                 return -EINVAL;
 310         }
 311         return 0;
 312 }
 313
 314 static int mlx5e_dcbnl_ieee_setets(struct net_device *netdev,
 315                                    struct ieee_ets *ets)
 316 {
 317         struct mlx5e_priv *priv = netdev_priv(netdev);
 318         int err;
 319
 320         if (!MLX5_CAP_GEN(priv->mdev, ets))
 321                 return -EOPNOTSUPP;
 322
 323         err = mlx5e_dbcnl_validate_ets(netdev, ets, false);
 324         if (err)
 325                 return err;
 326
 327         err = mlx5e_dcbnl_ieee_setets_core(priv, ets);
 328         if (err)
 329                 return err;
 330
 331         return 0;
 332 }
 333
 334 static int mlx5e_dcbnl_ieee_getpfc(struct net_device *dev,
 335                                    struct ieee_pfc *pfc)
 336 {
 337         struct mlx5e_priv *priv = netdev_priv(dev);
 338         struct mlx5_core_dev *mdev = priv->mdev;
 339         struct mlx5e_pport_stats *pstats = &priv->stats.pport;
 340         int i;
 341
 342         pfc->pfc_cap = mlx5_max_tc(mdev) + 1;
 343         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
 344                 pfc->requests[i]    = PPORT_PER_PRIO_GET(pstats, i, tx_pause);
 345                 pfc->indications[i] = PPORT_PER_PRIO_GET(pstats, i, rx_pause);
 346         }
 347
 348         if (MLX5_BUFFER_SUPPORTED(mdev))
 349                 pfc->delay = priv->dcbx.cable_len;
 350
 351         return mlx5_query_port_pfc(mdev, &pfc->pfc_en, NULL);
 352 }
 353
 354 static int mlx5e_dcbnl_ieee_setpfc(struct net_device *dev,
 355                                    struct ieee_pfc *pfc)
 356 {
 357         struct mlx5e_priv *priv = netdev_priv(dev);
 358         struct mlx5_core_dev *mdev = priv->mdev;
 359         u32 old_cable_len = priv->dcbx.cable_len;
 360         struct ieee_pfc pfc_new;
 361         u32 changed = 0;
 362         u8 curr_pfc_en;
 363         int ret = 0;
 364
 365         /* pfc_en */
 366         mlx5_query_port_pfc(mdev, &curr_pfc_en, NULL);
 367         if (pfc->pfc_en != curr_pfc_en) {
 368                 ret = mlx5_set_port_pfc(mdev, pfc->pfc_en, pfc->pfc_en);
 369                 if (ret)
 370                         return ret;
 371                 mlx5_toggle_port_link(mdev);
 372                 changed |= MLX5E_PORT_BUFFER_PFC;
 373         }
 374
 375         if (pfc->delay &&
 376             pfc->delay < MLX5E_MAX_CABLE_LENGTH &&
 377             pfc->delay != priv->dcbx.cable_len) {
 378                 priv->dcbx.cable_len = pfc->delay;
 379                 changed |= MLX5E_PORT_BUFFER_CABLE_LEN;
 380         }
 381
 382         if (MLX5_BUFFER_SUPPORTED(mdev)) {
 383                 pfc_new.pfc_en = (changed & MLX5E_PORT_BUFFER_PFC) ? pfc->pfc_en : curr_pfc_en;
 384                 if (priv->dcbx.manual_buffer)
 385                         ret = mlx5e_port_manual_buffer_config(priv, changed,
 386                                                               dev->mtu, &pfc_new,
 387                                                               NULL, NULL);
 388
 389                 if (ret && (changed & MLX5E_PORT_BUFFER_CABLE_LEN))
 390                         priv->dcbx.cable_len = old_cable_len;
 391         }
 392
 393         if (!ret) {
 394                 mlx5e_dbg(HW, priv,
 395                           "%s: PFC per priority bit mask: 0x%x\n",
 396                           __func__, pfc->pfc_en);
 397         }
 398         return ret;
 399 }
 400
 401 static u8 mlx5e_dcbnl_getdcbx(struct net_device *dev)
 402 {
 403         struct mlx5e_priv *priv = netdev_priv(dev);
 404
 405         return priv->dcbx.cap;
 406 }
 407
 408 static u8 mlx5e_dcbnl_setdcbx(struct net_device *dev, u8 mode)
 409 {
 410         struct mlx5e_priv *priv = netdev_priv(dev);
 411         struct mlx5e_dcbx *dcbx = &priv->dcbx;
 412
 413         if (mode & DCB_CAP_DCBX_LLD_MANAGED)
 414                 return 1;
 415
 416         if ((!mode) && MLX5_CAP_GEN(priv->mdev, dcbx)) {
 417                 if (dcbx->mode == MLX5E_DCBX_PARAM_VER_OPER_AUTO)
 418                         return 0;
 419
 420                 /* set dcbx to fw controlled */
 421                 if (!mlx5e_dcbnl_set_dcbx_mode(priv, MLX5E_DCBX_PARAM_VER_OPER_AUTO)) {
 422                         dcbx->mode = MLX5E_DCBX_PARAM_VER_OPER_AUTO;
 423                         dcbx->cap &= ~DCB_CAP_DCBX_HOST;
 424                         return 0;
 425                 }
 426
 427                 return 1;
 428         }
 429
 430         if (!(mode & DCB_CAP_DCBX_HOST))
 431                 return 1;
 432
 433         if (mlx5e_dcbnl_switch_to_host_mode(netdev_priv(dev)))
 434                 return 1;
 435
 436         dcbx->cap = mode;
 437
 438         return 0;
 439 }
 440
 441 static int mlx5e_dcbnl_ieee_setapp(struct net_device *dev, struct dcb_app *app)
 442 {
 443         struct mlx5e_priv *priv = netdev_priv(dev);
 444         struct dcb_app temp;
 445         bool is_new;
 446         int err;
 447
 448         if (!MLX5_CAP_GEN(priv->mdev, vport_group_manager) ||
 449             !MLX5_DSCP_SUPPORTED(priv->mdev))
 450                 return -EOPNOTSUPP;
 451
 452         if ((app->selector != IEEE_8021QAZ_APP_SEL_DSCP) ||
 453             (app->protocol >= MLX5E_MAX_DSCP))
 454                 return -EINVAL;
 455
 456         /* Save the old entry info */
 457         temp.selector = IEEE_8021QAZ_APP_SEL_DSCP;
 458         temp.protocol = app->protocol;
 459         temp.priority = priv->dcbx_dp.dscp2prio[app->protocol];
 460
 461         /* Check if need to switch to dscp trust state */
 462         if (!priv->dcbx.dscp_app_cnt) {
 463                 err =  mlx5e_set_trust_state(priv, MLX5_QPTS_TRUST_DSCP);
 464                 if (err)
 465                         return err;
 466         }
 467
 468         /* Skip the fw command if new and old mapping are the same */
 469         if (app->priority != priv->dcbx_dp.dscp2prio[app->protocol]) {
 470                 err = mlx5e_set_dscp2prio(priv, app->protocol, app->priority);
 471                 if (err)
 472                         goto fw_err;
 473         }
 474
 475         /* Delete the old entry if exists */
 476         is_new = false;
 477         err = dcb_ieee_delapp(dev, &temp);
 478         if (err)
 479                 is_new = true;
 480
 481         /* Add new entry and update counter */
 482         err = dcb_ieee_setapp(dev, app);
 483         if (err)
 484                 return err;
 485
 486         if (is_new)
 487                 priv->dcbx.dscp_app_cnt++;
 488
 489         return err;
 490
 491 fw_err:
 492         mlx5e_set_trust_state(priv, MLX5_QPTS_TRUST_PCP);
 493         return err;
 494 }
 495
 496 static int mlx5e_dcbnl_ieee_delapp(struct net_device *dev, struct dcb_app *app)
 497 {
 498         struct mlx5e_priv *priv = netdev_priv(dev);
 499         int err;
 500
 501         if  (!MLX5_CAP_GEN(priv->mdev, vport_group_manager) ||
 502              !MLX5_DSCP_SUPPORTED(priv->mdev))
 503                 return -EOPNOTSUPP;
 504
 505         if ((app->selector != IEEE_8021QAZ_APP_SEL_DSCP) ||
 506             (app->protocol >= MLX5E_MAX_DSCP))
 507                 return -EINVAL;
 508
 509         /* Skip if no dscp app entry */
 510         if (!priv->dcbx.dscp_app_cnt)
 511                 return -ENOENT;
 512
 513         /* Check if the entry matches fw setting */
 514         if (app->priority != priv->dcbx_dp.dscp2prio[app->protocol])
 515                 return -ENOENT;
 516
 517         /* Delete the app entry */
 518         err = dcb_ieee_delapp(dev, app);
 519         if (err)
 520                 return err;
 521
 522         /* Reset the priority mapping back to zero */
 523         err = mlx5e_set_dscp2prio(priv, app->protocol, 0);
 524         if (err)
 525                 goto fw_err;
 526
 527         priv->dcbx.dscp_app_cnt--;
 528
 529         /* Check if need to switch to pcp trust state */
 530         if (!priv->dcbx.dscp_app_cnt)
 531                 err = mlx5e_set_trust_state(priv, MLX5_QPTS_TRUST_PCP);
 532
 533         return err;
 534
 535 fw_err:
 536         mlx5e_set_trust_state(priv, MLX5_QPTS_TRUST_PCP);
 537         return err;
 538 }
 539
 540 static int mlx5e_dcbnl_ieee_getmaxrate(struct net_device *netdev,
 541                                        struct ieee_maxrate *maxrate)
 542 {
 543         struct mlx5e_priv *priv    = netdev_priv(netdev);
 544         struct mlx5_core_dev *mdev = priv->mdev;
 545         u8 max_bw_value[IEEE_8021QAZ_MAX_TCS];
 546         u8 max_bw_unit[IEEE_8021QAZ_MAX_TCS];
 547         int err;
 548         int i;
 549
 550         err = mlx5_query_port_ets_rate_limit(mdev, max_bw_value, max_bw_unit);
 551         if (err)
 552                 return err;
 553
 554         memset(maxrate->tc_maxrate, 0, sizeof(maxrate->tc_maxrate));
 555
 556         for (i = 0; i <= mlx5_max_tc(mdev); i++) {
 557                 switch (max_bw_unit[i]) {
 558                 case MLX5_100_MBPS_UNIT:
 559                         maxrate->tc_maxrate[i] = max_bw_value[i] * MLX5E_100MB;
 560                         break;
 561                 case MLX5_GBPS_UNIT:
 562                         maxrate->tc_maxrate[i] = max_bw_value[i] * MLX5E_1GB;
 563                         break;
 564                 case MLX5_BW_NO_LIMIT:
 565                         break;
 566                 default:
 567                         WARN(true, "non-supported BW unit");
 568                         break;
 569                 }
 570         }
 571
 572         return 0;
 573 }
 574
 575 static int mlx5e_dcbnl_ieee_setmaxrate(struct net_device *netdev,
 576                                        struct ieee_maxrate *maxrate)
 577 {
 578         struct mlx5e_priv *priv    = netdev_priv(netdev);
 579         struct mlx5_core_dev *mdev = priv->mdev;
 580         u8 max_bw_value[IEEE_8021QAZ_MAX_TCS];
 581         u8 max_bw_unit[IEEE_8021QAZ_MAX_TCS];
 582         __u64 upper_limit_mbps = roundup(255 * MLX5E_100MB, MLX5E_1GB);
 583         int i;
 584
 585         memset(max_bw_value, 0, sizeof(max_bw_value));
 586         memset(max_bw_unit, 0, sizeof(max_bw_unit));
 587
 588         for (i = 0; i <= mlx5_max_tc(mdev); i++) {
 589                 if (!maxrate->tc_maxrate[i]) {
 590                         max_bw_unit[i]  = MLX5_BW_NO_LIMIT;
 591                         continue;
 592                 }
 593                 if (maxrate->tc_maxrate[i] < upper_limit_mbps) {
 594                         max_bw_value[i] = div_u64(maxrate->tc_maxrate[i],
 595                                                   MLX5E_100MB);
 596                         max_bw_value[i] = max_bw_value[i] ? max_bw_value[i] : 1;
 597                         max_bw_unit[i]  = MLX5_100_MBPS_UNIT;
 598                 } else {
 599                         max_bw_value[i] = div_u64(maxrate->tc_maxrate[i],
 600                                                   MLX5E_1GB);
 601                         max_bw_unit[i]  = MLX5_GBPS_UNIT;
 602                 }
 603         }
 604
 605         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
 606                 mlx5e_dbg(HW, priv, "%s: tc_%d <=> max_bw %d Gbps\n",
 607                           __func__, i, max_bw_value[i]);
 608         }
 609
 610         return mlx5_modify_port_ets_rate_limit(mdev, max_bw_value, max_bw_unit);
 611 }
 612
 613 static u8 mlx5e_dcbnl_setall(struct net_device *netdev)
 614 {
 615         struct mlx5e_priv *priv = netdev_priv(netdev);
 616         struct mlx5e_cee_config *cee_cfg = &priv->dcbx.cee_cfg;
 617         struct mlx5_core_dev *mdev = priv->mdev;
 618         struct ieee_ets ets;
 619         struct ieee_pfc pfc;
 620         int err = -EOPNOTSUPP;
 621         int i;
 622
 623         if (!MLX5_CAP_GEN(mdev, ets))
 624                 goto out;
 625
 626         memset(&ets, 0, sizeof(ets));
 627         memset(&pfc, 0, sizeof(pfc));
 628
 629         ets.ets_cap = IEEE_8021QAZ_MAX_TCS;
 630         for (i = 0; i < CEE_DCBX_MAX_PGS; i++) {
 631                 ets.tc_tx_bw[i] = cee_cfg->pg_bw_pct[i];
 632                 ets.tc_rx_bw[i] = cee_cfg->pg_bw_pct[i];
 633                 ets.tc_tsa[i]   = IEEE_8021QAZ_TSA_ETS;
 634                 ets.prio_tc[i]  = cee_cfg->prio_to_pg_map[i];
 635                 mlx5e_dbg(HW, priv,
 636                           "%s: Priority group %d: tx_bw %d, rx_bw %d, prio_tc %d\n",
 637                           __func__, i, ets.tc_tx_bw[i], ets.tc_rx_bw[i],
 638                           ets.prio_tc[i]);
 639         }
 640
 641         err = mlx5e_dbcnl_validate_ets(netdev, &ets, true);
 642         if (err)
 643                 goto out;
 644
 645         err = mlx5e_dcbnl_ieee_setets_core(priv, &ets);
 646         if (err) {
 647                 netdev_err(netdev,
 648                            "%s, Failed to set ETS: %d\n", __func__, err);
 649                 goto out;
 650         }
 651
 652         /* Set PFC */
 653         pfc.pfc_cap = mlx5_max_tc(mdev) + 1;
 654         if (!cee_cfg->pfc_enable)
 655                 pfc.pfc_en = 0;
 656         else
 657                 for (i = 0; i < CEE_DCBX_MAX_PRIO; i++)
 658                         pfc.pfc_en |= cee_cfg->pfc_setting[i] << i;
 659
 660         err = mlx5e_dcbnl_ieee_setpfc(netdev, &pfc);
 661         if (err) {
 662                 netdev_err(netdev,
 663                            "%s, Failed to set PFC: %d\n", __func__, err);
 664                 goto out;
 665         }
 666 out:
 667         return err ? MLX5_DCB_NO_CHG : MLX5_DCB_CHG_RESET;
 668 }
 669
 670 static u8 mlx5e_dcbnl_getstate(struct net_device *netdev)
 671 {
 672         return MLX5E_CEE_STATE_UP;
 673 }
 674
 675 static void mlx5e_dcbnl_getpermhwaddr(struct net_device *netdev,
 676                                       u8 *perm_addr)
 677 {
 678         struct mlx5e_priv *priv = netdev_priv(netdev);
 679
 680         if (!perm_addr)
 681                 return;
 682
 683         memset(perm_addr, 0xff, MAX_ADDR_LEN);
 684
 685         mlx5_query_nic_vport_mac_address(priv->mdev, 0, perm_addr);
 686 }
 687
 688 static void mlx5e_dcbnl_setpgtccfgtx(struct net_device *netdev,
 689                                      int priority, u8 prio_type,
 690                                      u8 pgid, u8 bw_pct, u8 up_map)
 691 {
 692         struct mlx5e_priv *priv = netdev_priv(netdev);
 693         struct mlx5e_cee_config *cee_cfg = &priv->dcbx.cee_cfg;
 694
 695         if (priority >= CEE_DCBX_MAX_PRIO) {
 696                 netdev_err(netdev,
 697                            "%s, priority is out of range\n", __func__);
 698                 return;
 699         }
 700
 701         if (pgid >= CEE_DCBX_MAX_PGS) {
 702                 netdev_err(netdev,
 703                            "%s, priority group is out of range\n", __func__);
 704                 return;
 705         }
 706
 707         cee_cfg->prio_to_pg_map[priority] = pgid;
 708 }
 709
 710 static void mlx5e_dcbnl_setpgbwgcfgtx(struct net_device *netdev,
 711                                       int pgid, u8 bw_pct)
 712 {
 713         struct mlx5e_priv *priv = netdev_priv(netdev);
 714         struct mlx5e_cee_config *cee_cfg = &priv->dcbx.cee_cfg;
 715
 716         if (pgid >= CEE_DCBX_MAX_PGS) {
 717                 netdev_err(netdev,
 718                            "%s, priority group is out of range\n", __func__);
 719                 return;
 720         }
 721
 722         cee_cfg->pg_bw_pct[pgid] = bw_pct;
 723 }
 724
 725 static void mlx5e_dcbnl_getpgtccfgtx(struct net_device *netdev,
 726                                      int priority, u8 *prio_type,
 727                                      u8 *pgid, u8 *bw_pct, u8 *up_map)
 728 {
 729         struct mlx5e_priv *priv = netdev_priv(netdev);
 730         struct mlx5_core_dev *mdev = priv->mdev;
 731
 732         if (!MLX5_CAP_GEN(priv->mdev, ets)) {
 733                 netdev_err(netdev, "%s, ets is not supported\n", __func__);
 734                 return;
 735         }
 736
 737         if (priority >= CEE_DCBX_MAX_PRIO) {
 738                 netdev_err(netdev,
 739                            "%s, priority is out of range\n", __func__);
 740                 return;
 741         }
 742
 743         *prio_type = 0;
 744         *bw_pct = 0;
 745         *up_map = 0;
 746
 747         if (mlx5_query_port_prio_tc(mdev, priority, pgid))
 748                 *pgid = 0;
 749 }
 750
 751 static void mlx5e_dcbnl_getpgbwgcfgtx(struct net_device *netdev,
 752                                       int pgid, u8 *bw_pct)
 753 {
 754         struct ieee_ets ets;
 755
 756         if (pgid >= CEE_DCBX_MAX_PGS) {
 757                 netdev_err(netdev,
 758                            "%s, priority group is out of range\n", __func__);
 759                 return;
 760         }
 761
 762         mlx5e_dcbnl_ieee_getets(netdev, &ets);
 763         *bw_pct = ets.tc_tx_bw[pgid];
 764 }
 765
 766 static void mlx5e_dcbnl_setpfccfg(struct net_device *netdev,
 767                                   int priority, u8 setting)
 768 {
 769         struct mlx5e_priv *priv = netdev_priv(netdev);
 770         struct mlx5e_cee_config *cee_cfg = &priv->dcbx.cee_cfg;
 771
 772         if (priority >= CEE_DCBX_MAX_PRIO) {
 773                 netdev_err(netdev,
 774                            "%s, priority is out of range\n", __func__);
 775                 return;
 776         }
 777
 778         if (setting > 1)
 779                 return;
 780
 781         cee_cfg->pfc_setting[priority] = setting;
 782 }
 783
 784 static int
 785 mlx5e_dcbnl_get_priority_pfc(struct net_device *netdev,
 786                              int priority, u8 *setting)
 787 {
 788         struct ieee_pfc pfc;
 789         int err;
 790
 791         err = mlx5e_dcbnl_ieee_getpfc(netdev, &pfc);
 792
 793         if (err)
 794                 *setting = 0;
 795         else
 796                 *setting = (pfc.pfc_en >> priority) & 0x01;
 797
 798         return err;
 799 }
 800
 801 static void mlx5e_dcbnl_getpfccfg(struct net_device *netdev,
 802                                   int priority, u8 *setting)
 803 {
 804         if (priority >= CEE_DCBX_MAX_PRIO) {
 805                 netdev_err(netdev,
 806                            "%s, priority is out of range\n", __func__);
 807                 return;
 808         }
 809
 810         if (!setting)
 811                 return;
 812
 813         mlx5e_dcbnl_get_priority_pfc(netdev, priority, setting);
 814 }
 815
 816 static u8 mlx5e_dcbnl_getcap(struct net_device *netdev,
 817                              int capid, u8 *cap)
 818 {
 819         struct mlx5e_priv *priv = netdev_priv(netdev);
 820         struct mlx5_core_dev *mdev = priv->mdev;
 821         u8 rval = 0;
 822
 823         switch (capid) {
 824         case DCB_CAP_ATTR_PG:
 825                 *cap = true;
 826                 break;
 827         case DCB_CAP_ATTR_PFC:
 828                 *cap = true;
 829                 break;
 830         case DCB_CAP_ATTR_UP2TC:
 831                 *cap = false;
 832                 break;
 833         case DCB_CAP_ATTR_PG_TCS:
 834                 *cap = 1 << mlx5_max_tc(mdev);
 835                 break;
 836         case DCB_CAP_ATTR_PFC_TCS:
 837                 *cap = 1 << mlx5_max_tc(mdev);
 838                 break;
 839         case DCB_CAP_ATTR_GSP:
 840                 *cap = false;
 841                 break;
 842         case DCB_CAP_ATTR_BCN:
 843                 *cap = false;
 844                 break;
 845         case DCB_CAP_ATTR_DCBX:
 846                 *cap = priv->dcbx.cap |
 847                        DCB_CAP_DCBX_VER_CEE |
 848                        DCB_CAP_DCBX_VER_IEEE;
 849                 break;
 850         default:
 851                 *cap = 0;
 852                 rval = 1;
 853                 break;
 854         }
 855
 856         return rval;
 857 }
 858
 859 static int mlx5e_dcbnl_getnumtcs(struct net_device *netdev,
 860                                  int tcs_id, u8 *num)
 861 {
 862         struct mlx5e_priv *priv = netdev_priv(netdev);
 863         struct mlx5_core_dev *mdev = priv->mdev;
 864
 865         switch (tcs_id) {
 866         case DCB_NUMTCS_ATTR_PG:
 867         case DCB_NUMTCS_ATTR_PFC:
 868                 *num = mlx5_max_tc(mdev) + 1;
 869                 break;
 870         default:
 871                 return -EINVAL;
 872         }
 873
 874         return 0;
 875 }
 876
 877 static u8 mlx5e_dcbnl_getpfcstate(struct net_device *netdev)
 878 {
 879         struct ieee_pfc pfc;
 880
 881         if (mlx5e_dcbnl_ieee_getpfc(netdev, &pfc))
 882                 return MLX5E_CEE_STATE_DOWN;
 883
 884         return pfc.pfc_en ? MLX5E_CEE_STATE_UP : MLX5E_CEE_STATE_DOWN;
 885 }
 886
 887 static void mlx5e_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
 888 {
 889         struct mlx5e_priv *priv = netdev_priv(netdev);
 890         struct mlx5e_cee_config *cee_cfg = &priv->dcbx.cee_cfg;
 891
 892         if ((state != MLX5E_CEE_STATE_UP) && (state != MLX5E_CEE_STATE_DOWN))
 893                 return;
 894
 895         cee_cfg->pfc_enable = state;
 896 }
 897
 898 static int mlx5e_dcbnl_getbuffer(struct net_device *dev,
 899                                  struct dcbnl_buffer *dcb_buffer)
 900 {
 901         struct mlx5e_priv *priv = netdev_priv(dev);
 902         struct mlx5_core_dev *mdev = priv->mdev;
 903         struct mlx5e_port_buffer port_buffer;
 904         u8 buffer[MLX5E_MAX_PRIORITY];
 905         int i, err;
 906
 907         if (!MLX5_BUFFER_SUPPORTED(mdev))
 908                 return -EOPNOTSUPP;
 909
 910         err = mlx5e_port_query_priority2buffer(mdev, buffer);
 911         if (err)
 912                 return err;
 913
 914         for (i = 0; i < MLX5E_MAX_PRIORITY; i++)
 915                 dcb_buffer->prio2buffer[i] = buffer[i];
 916
 917         err = mlx5e_port_query_buffer(priv, &port_buffer);
 918         if (err)
 919                 return err;
 920
 921         for (i = 0; i < MLX5E_MAX_BUFFER; i++)
 922                 dcb_buffer->buffer_size[i] = port_buffer.buffer[i].size;
 923         dcb_buffer->total_size = port_buffer.port_buffer_size;
 924
 925         return 0;
 926 }
 927
 928 static int mlx5e_dcbnl_setbuffer(struct net_device *dev,
 929                                  struct dcbnl_buffer *dcb_buffer)
 930 {
 931         struct mlx5e_priv *priv = netdev_priv(dev);
 932         struct mlx5_core_dev *mdev = priv->mdev;
 933         struct mlx5e_port_buffer port_buffer;
 934         u8 old_prio2buffer[MLX5E_MAX_PRIORITY];
 935         u32 *buffer_size = NULL;
 936         u8 *prio2buffer = NULL;
 937         u32 changed = 0;
 938         int i, err;
 939
 940         if (!MLX5_BUFFER_SUPPORTED(mdev))
 941                 return -EOPNOTSUPP;
 942
 943         for (i = 0; i < DCBX_MAX_BUFFERS; i++)
 944                 mlx5_core_dbg(mdev, "buffer[%d]=%d\n", i, dcb_buffer->buffer_size[i]);
 945
 946         for (i = 0; i < MLX5E_MAX_PRIORITY; i++)
 947                 mlx5_core_dbg(mdev, "priority %d buffer%d\n", i, dcb_buffer->prio2buffer[i]);
 948
 949         err = mlx5e_port_query_priority2buffer(mdev, old_prio2buffer);
 950         if (err)
 951                 return err;
 952
 953         for (i = 0; i < MLX5E_MAX_PRIORITY; i++) {
 954                 if (dcb_buffer->prio2buffer[i] != old_prio2buffer[i]) {
 955                         changed |= MLX5E_PORT_BUFFER_PRIO2BUFFER;
 956                         prio2buffer = dcb_buffer->prio2buffer;
 957                         break;
 958                 }
 959         }
 960
 961         err = mlx5e_port_query_buffer(priv, &port_buffer);
 962         if (err)
 963                 return err;
 964
 965         for (i = 0; i < MLX5E_MAX_BUFFER; i++) {
 966                 if (port_buffer.buffer[i].size != dcb_buffer->buffer_size[i]) {
 967                         changed |= MLX5E_PORT_BUFFER_SIZE;
 968                         buffer_size = dcb_buffer->buffer_size;
 969                         break;
 970                 }
 971         }
 972
 973         if (!changed)
 974                 return 0;
 975
 976         priv->dcbx.manual_buffer = true;
 977         err = mlx5e_port_manual_buffer_config(priv, changed, dev->mtu, NULL,
 978                                               buffer_size, prio2buffer);
 979         return err;
 980 }
 981
 982 const struct dcbnl_rtnl_ops mlx5e_dcbnl_ops = {
 983         .ieee_getets    = mlx5e_dcbnl_ieee_getets,
 984         .ieee_setets    = mlx5e_dcbnl_ieee_setets,
 985         .ieee_getmaxrate = mlx5e_dcbnl_ieee_getmaxrate,
 986         .ieee_setmaxrate = mlx5e_dcbnl_ieee_setmaxrate,
 987         .ieee_getpfc    = mlx5e_dcbnl_ieee_getpfc,
 988         .ieee_setpfc    = mlx5e_dcbnl_ieee_setpfc,
 989         .ieee_setapp    = mlx5e_dcbnl_ieee_setapp,
 990         .ieee_delapp    = mlx5e_dcbnl_ieee_delapp,
 991         .getdcbx        = mlx5e_dcbnl_getdcbx,
 992         .setdcbx        = mlx5e_dcbnl_setdcbx,
 993         .dcbnl_getbuffer = mlx5e_dcbnl_getbuffer,
 994         .dcbnl_setbuffer = mlx5e_dcbnl_setbuffer,
 995
 996 /* CEE interfaces */
 997         .setall         = mlx5e_dcbnl_setall,
 998         .getstate       = mlx5e_dcbnl_getstate,
 999         .getpermhwaddr  = mlx5e_dcbnl_getpermhwaddr,
1000
1001         .setpgtccfgtx   = mlx5e_dcbnl_setpgtccfgtx,
1002         .setpgbwgcfgtx  = mlx5e_dcbnl_setpgbwgcfgtx,
1003         .getpgtccfgtx   = mlx5e_dcbnl_getpgtccfgtx,
1004         .getpgbwgcfgtx  = mlx5e_dcbnl_getpgbwgcfgtx,
1005
1006         .setpfccfg      = mlx5e_dcbnl_setpfccfg,
1007         .getpfccfg      = mlx5e_dcbnl_getpfccfg,
1008         .getcap         = mlx5e_dcbnl_getcap,
1009         .getnumtcs      = mlx5e_dcbnl_getnumtcs,
1010         .getpfcstate    = mlx5e_dcbnl_getpfcstate,
1011         .setpfcstate    = mlx5e_dcbnl_setpfcstate,
1012 };
1013
1014 static void mlx5e_dcbnl_query_dcbx_mode(struct mlx5e_priv *priv,
1015                                         enum mlx5_dcbx_oper_mode *mode)
1016 {
1017         u32 out[MLX5_ST_SZ_DW(dcbx_param)];
1018
1019         *mode = MLX5E_DCBX_PARAM_VER_OPER_HOST;
1020
1021         if (!mlx5_query_port_dcbx_param(priv->mdev, out))
1022                 *mode = MLX5_GET(dcbx_param, out, version_oper);
1023
1024         /* From driver's point of view, we only care if the mode
1025          * is host (HOST) or non-host (AUTO)
1026          */
1027         if (*mode != MLX5E_DCBX_PARAM_VER_OPER_HOST)
1028                 *mode = MLX5E_DCBX_PARAM_VER_OPER_AUTO;
1029 }
1030
1031 static void mlx5e_ets_init(struct mlx5e_priv *priv)
1032 {
1033         struct ieee_ets ets;
1034         int err;
1035         int i;
1036
1037         if (!MLX5_CAP_GEN(priv->mdev, ets))
1038                 return;
1039
1040         memset(&ets, 0, sizeof(ets));
1041         ets.ets_cap = mlx5_max_tc(priv->mdev) + 1;
1042         for (i = 0; i < ets.ets_cap; i++) {
1043                 ets.tc_tx_bw[i] = MLX5E_MAX_BW_ALLOC;
1044                 ets.tc_tsa[i] = IEEE_8021QAZ_TSA_VENDOR;
1045                 ets.prio_tc[i] = i;
1046         }
1047
1048         if (ets.ets_cap > 1) {
1049                 /* tclass[prio=0]=1, tclass[prio=1]=0, tclass[prio=i]=i (for i>1) */
1050                 ets.prio_tc[0] = 1;
1051                 ets.prio_tc[1] = 0;
1052         }
1053
1054         err = mlx5e_dcbnl_ieee_setets_core(priv, &ets);
1055         if (err)
1056                 netdev_err(priv->netdev,
1057                            "%s, Failed to init ETS: %d\n", __func__, err);
1058 }
1059
1060 enum {
1061         INIT,
1062         DELETE,
1063 };
1064
1065 static void mlx5e_dcbnl_dscp_app(struct mlx5e_priv *priv, int action)
1066 {
1067         struct dcb_app temp;
1068         int i;
1069
1070         if (!MLX5_CAP_GEN(priv->mdev, vport_group_manager))
1071                 return;
1072
1073         if (!MLX5_DSCP_SUPPORTED(priv->mdev))
1074                 return;
1075
1076         /* No SEL_DSCP entry in non DSCP state */
1077         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_DSCP)
1078                 return;
1079
1080         temp.selector = IEEE_8021QAZ_APP_SEL_DSCP;
1081         for (i = 0; i < MLX5E_MAX_DSCP; i++) {
1082                 temp.protocol = i;
1083                 temp.priority = priv->dcbx_dp.dscp2prio[i];
1084                 if (action == INIT)
1085                         dcb_ieee_setapp(priv->netdev, &temp);
1086                 else
1087                         dcb_ieee_delapp(priv->netdev, &temp);
1088         }
1089
1090         priv->dcbx.dscp_app_cnt = (action == INIT) ? MLX5E_MAX_DSCP : 0;
1091 }
1092
1093 void mlx5e_dcbnl_init_app(struct mlx5e_priv *priv)
1094 {
1095         mlx5e_dcbnl_dscp_app(priv, INIT);
1096 }
1097
1098 void mlx5e_dcbnl_delete_app(struct mlx5e_priv *priv)
1099 {
1100         mlx5e_dcbnl_dscp_app(priv, DELETE);
1101 }
1102
1103 static void mlx5e_trust_update_tx_min_inline_mode(struct mlx5e_priv *priv,
1104                                                   struct mlx5e_params *params)
1105 {
1106         params->tx_min_inline_mode = mlx5e_params_calculate_tx_min_inline(priv->mdev);
1107         if (priv->dcbx_dp.trust_state == MLX5_QPTS_TRUST_DSCP &&
1108             params->tx_min_inline_mode == MLX5_INLINE_MODE_L2)
1109                 params->tx_min_inline_mode = MLX5_INLINE_MODE_IP;
1110 }
1111
1112 static void mlx5e_trust_update_sq_inline_mode(struct mlx5e_priv *priv)
1113 {
1114         struct mlx5e_channels new_channels = {};
1115
1116         mutex_lock(&priv->state_lock);
1117
1118         new_channels.params = priv->channels.params;
1119         mlx5e_trust_update_tx_min_inline_mode(priv, &new_channels.params);
1120
1121         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1122                 priv->channels.params = new_channels.params;
1123                 goto out;
1124         }
1125
1126         /* Skip if tx_min_inline is the same */
1127         if (new_channels.params.tx_min_inline_mode ==
1128             priv->channels.params.tx_min_inline_mode)
1129                 goto out;
1130
1131         if (mlx5e_open_channels(priv, &new_channels))
1132                 goto out;
1133         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1134
1135 out:
1136         mutex_unlock(&priv->state_lock);
1137 }
1138
1139 static int mlx5e_set_trust_state(struct mlx5e_priv *priv, u8 trust_state)
1140 {
1141         int err;
1142
1143         err = mlx5_set_trust_state(priv->mdev, trust_state);
1144         if (err)
1145                 return err;
1146         priv->dcbx_dp.trust_state = trust_state;
1147         mlx5e_trust_update_sq_inline_mode(priv);
1148
1149         return err;
1150 }
1151
1152 static int mlx5e_set_dscp2prio(struct mlx5e_priv *priv, u8 dscp, u8 prio)
1153 {
1154         int err;
1155
1156         err = mlx5_set_dscp2prio(priv->mdev, dscp, prio);
1157         if (err)
1158                 return err;
1159
1160         priv->dcbx_dp.dscp2prio[dscp] = prio;
1161         return err;
1162 }
1163
1164 static int mlx5e_trust_initialize(struct mlx5e_priv *priv)
1165 {
1166         struct mlx5_core_dev *mdev = priv->mdev;
1167         int err;
1168
1169         priv->dcbx_dp.trust_state = MLX5_QPTS_TRUST_PCP;
1170
1171         if (!MLX5_DSCP_SUPPORTED(mdev))
1172                 return 0;
1173
1174         err = mlx5_query_trust_state(priv->mdev, &priv->dcbx_dp.trust_state);
1175         if (err)
1176                 return err;
1177
1178         mlx5e_trust_update_tx_min_inline_mode(priv, &priv->channels.params);
1179
1180         err = mlx5_query_dscp2prio(priv->mdev, priv->dcbx_dp.dscp2prio);
1181         if (err)
1182                 return err;
1183
1184         return 0;
1185 }
1186
1187 void mlx5e_dcbnl_initialize(struct mlx5e_priv *priv)
1188 {
1189         struct mlx5e_dcbx *dcbx = &priv->dcbx;
1190
1191         mlx5e_trust_initialize(priv);
1192
1193         if (!MLX5_CAP_GEN(priv->mdev, qos))
1194                 return;
1195
1196         if (MLX5_CAP_GEN(priv->mdev, dcbx))
1197                 mlx5e_dcbnl_query_dcbx_mode(priv, &dcbx->mode);
1198
1199         priv->dcbx.cap = DCB_CAP_DCBX_VER_CEE |
1200                          DCB_CAP_DCBX_VER_IEEE;
1201         if (priv->dcbx.mode == MLX5E_DCBX_PARAM_VER_OPER_HOST)
1202                 priv->dcbx.cap |= DCB_CAP_DCBX_HOST;
1203
1204         priv->dcbx.manual_buffer = false;
1205         priv->dcbx.cable_len = MLX5E_DEFAULT_CABLE_LEN;
1206
1207         mlx5e_ets_init(priv);
1208 }