drivers/net/ethernet/qlogic/qed/qed_mcp.c

   1 /* QLogic qed NIC Driver
   2  * Copyright (c) 2015 QLogic Corporation
   3  *
   4  * This software is available under the terms of the GNU General Public License
   5  * (GPL) Version 2, available from the file COPYING in the main directory of
   6  * this source tree.
   7  */
   8
   9 #include <linux/types.h>
  10 #include <asm/byteorder.h>
  11 #include <linux/delay.h>
  12 #include <linux/errno.h>
  13 #include <linux/kernel.h>
  14 #include <linux/mutex.h>
  15 #include <linux/slab.h>
  16 #include <linux/string.h>
  17 #include "qed.h"
  18 #include "qed_hsi.h"
  19 #include "qed_hw.h"
  20 #include "qed_mcp.h"
  21 #include "qed_reg_addr.h"
  22 #define CHIP_MCP_RESP_ITER_US 10
  23
  24 #define QED_DRV_MB_MAX_RETRIES  (500 * 1000)    /* Account for 5 sec */
  25 #define QED_MCP_RESET_RETRIES   (50 * 1000)     /* Account for 500 msec */
  26
  27 #define DRV_INNER_WR(_p_hwfn, _p_ptt, _ptr, _offset, _val)           \
  28         qed_wr(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset), \
  29                _val)
  30
  31 #define DRV_INNER_RD(_p_hwfn, _p_ptt, _ptr, _offset) \
  32         qed_rd(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset))
  33
  34 #define DRV_MB_WR(_p_hwfn, _p_ptt, _field, _val)  \
  35         DRV_INNER_WR(p_hwfn, _p_ptt, drv_mb_addr, \
  36                      offsetof(struct public_drv_mb, _field), _val)
  37
  38 #define DRV_MB_RD(_p_hwfn, _p_ptt, _field)         \
  39         DRV_INNER_RD(_p_hwfn, _p_ptt, drv_mb_addr, \
  40                      offsetof(struct public_drv_mb, _field))
  41
  42 #define PDA_COMP (((FW_MAJOR_VERSION) + (FW_MINOR_VERSION << 8)) << \
  43                   DRV_ID_PDA_COMP_VER_SHIFT)
  44
  45 #define MCP_BYTES_PER_MBIT_SHIFT 17
  46
  47 bool qed_mcp_is_init(struct qed_hwfn *p_hwfn)
  48 {
  49         if (!p_hwfn->mcp_info || !p_hwfn->mcp_info->public_base)
  50                 return false;
  51         return true;
  52 }
  53
  54 void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn,
  55                            struct qed_ptt *p_ptt)
  56 {
  57         u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,
  58                                         PUBLIC_PORT);
  59         u32 mfw_mb_offsize = qed_rd(p_hwfn, p_ptt, addr);
  60
  61         p_hwfn->mcp_info->port_addr = SECTION_ADDR(mfw_mb_offsize,
  62                                                    MFW_PORT(p_hwfn));
  63         DP_VERBOSE(p_hwfn, QED_MSG_SP,
  64                    "port_addr = 0x%x, port_id 0x%02x\n",
  65                    p_hwfn->mcp_info->port_addr, MFW_PORT(p_hwfn));
  66 }
  67
  68 void qed_mcp_read_mb(struct qed_hwfn *p_hwfn,
  69                      struct qed_ptt *p_ptt)
  70 {
  71         u32 length = MFW_DRV_MSG_MAX_DWORDS(p_hwfn->mcp_info->mfw_mb_length);
  72         u32 tmp, i;
  73
  74         if (!p_hwfn->mcp_info->public_base)
  75                 return;
  76
  77         for (i = 0; i < length; i++) {
  78                 tmp = qed_rd(p_hwfn, p_ptt,
  79                              p_hwfn->mcp_info->mfw_mb_addr +
  80                              (i << 2) + sizeof(u32));
  81
  82                 /* The MB data is actually BE; Need to force it to cpu */
  83                 ((u32 *)p_hwfn->mcp_info->mfw_mb_cur)[i] =
  84                         be32_to_cpu((__force __be32)tmp);
  85         }
  86 }
  87
  88 int qed_mcp_free(struct qed_hwfn *p_hwfn)
  89 {
  90         if (p_hwfn->mcp_info) {
  91                 kfree(p_hwfn->mcp_info->mfw_mb_cur);
  92                 kfree(p_hwfn->mcp_info->mfw_mb_shadow);
  93         }
  94         kfree(p_hwfn->mcp_info);
  95
  96         return 0;
  97 }
  98
  99 static int qed_load_mcp_offsets(struct qed_hwfn *p_hwfn,
 100                                 struct qed_ptt *p_ptt)
 101 {
 102         struct qed_mcp_info *p_info = p_hwfn->mcp_info;
 103         u32 drv_mb_offsize, mfw_mb_offsize;
 104         u32 mcp_pf_id = MCP_PF_ID(p_hwfn);
 105
 106         p_info->public_base = qed_rd(p_hwfn, p_ptt, MISC_REG_SHARED_MEM_ADDR);
 107         if (!p_info->public_base)
 108                 return 0;
 109
 110         p_info->public_base |= GRCBASE_MCP;
 111
 112         /* Calculate the driver and MFW mailbox address */
 113         drv_mb_offsize = qed_rd(p_hwfn, p_ptt,
 114                                 SECTION_OFFSIZE_ADDR(p_info->public_base,
 115                                                      PUBLIC_DRV_MB));
 116         p_info->drv_mb_addr = SECTION_ADDR(drv_mb_offsize, mcp_pf_id);
 117         DP_VERBOSE(p_hwfn, QED_MSG_SP,
 118                    "drv_mb_offsiz = 0x%x, drv_mb_addr = 0x%x mcp_pf_id = 0x%x\n",
 119                    drv_mb_offsize, p_info->drv_mb_addr, mcp_pf_id);
 120
 121         /* Set the MFW MB address */
 122         mfw_mb_offsize = qed_rd(p_hwfn, p_ptt,
 123                                 SECTION_OFFSIZE_ADDR(p_info->public_base,
 124                                                      PUBLIC_MFW_MB));
 125         p_info->mfw_mb_addr = SECTION_ADDR(mfw_mb_offsize, mcp_pf_id);
 126         p_info->mfw_mb_length = (u16)qed_rd(p_hwfn, p_ptt, p_info->mfw_mb_addr);
 127
 128         /* Get the current driver mailbox sequence before sending
 129          * the first command
 130          */
 131         p_info->drv_mb_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_mb_header) &
 132                              DRV_MSG_SEQ_NUMBER_MASK;
 133
 134         /* Get current FW pulse sequence */
 135         p_info->drv_pulse_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_pulse_mb) &
 136                                 DRV_PULSE_SEQ_MASK;
 137
 138         p_info->mcp_hist = (u16)qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0);
 139
 140         return 0;
 141 }
 142
 143 int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn,
 144                      struct qed_ptt *p_ptt)
 145 {
 146         struct qed_mcp_info *p_info;
 147         u32 size;
 148
 149         /* Allocate mcp_info structure */
 150         p_hwfn->mcp_info = kzalloc(sizeof(*p_hwfn->mcp_info), GFP_ATOMIC);
 151         if (!p_hwfn->mcp_info)
 152                 goto err;
 153         p_info = p_hwfn->mcp_info;
 154
 155         if (qed_load_mcp_offsets(p_hwfn, p_ptt) != 0) {
 156                 DP_NOTICE(p_hwfn, "MCP is not initialized\n");
 157                 /* Do not free mcp_info here, since public_base indicate that
 158                  * the MCP is not initialized
 159                  */
 160                 return 0;
 161         }
 162
 163         size = MFW_DRV_MSG_MAX_DWORDS(p_info->mfw_mb_length) * sizeof(u32);
 164         p_info->mfw_mb_cur = kzalloc(size, GFP_ATOMIC);
 165         p_info->mfw_mb_shadow =
 166                 kzalloc(sizeof(u32) * MFW_DRV_MSG_MAX_DWORDS(
 167                                 p_info->mfw_mb_length), GFP_ATOMIC);
 168         if (!p_info->mfw_mb_shadow || !p_info->mfw_mb_addr)
 169                 goto err;
 170
 171         /* Initialize the MFW mutex */
 172         mutex_init(&p_info->mutex);
 173
 174         return 0;
 175
 176 err:
 177         DP_NOTICE(p_hwfn, "Failed to allocate mcp memory\n");
 178         qed_mcp_free(p_hwfn);
 179         return -ENOMEM;
 180 }
 181
 182 int qed_mcp_reset(struct qed_hwfn *p_hwfn,
 183                   struct qed_ptt *p_ptt)
 184 {
 185         u32 seq = ++p_hwfn->mcp_info->drv_mb_seq;
 186         u8 delay = CHIP_MCP_RESP_ITER_US;
 187         u32 org_mcp_reset_seq, cnt = 0;
 188         int rc = 0;
 189
 190         /* Set drv command along with the updated sequence */
 191         org_mcp_reset_seq = qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0);
 192         DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header,
 193                   (DRV_MSG_CODE_MCP_RESET | seq));
 194
 195         do {
 196                 /* Wait for MFW response */
 197                 udelay(delay);
 198                 /* Give the FW up to 500 second (50*1000*10usec) */
 199         } while ((org_mcp_reset_seq == qed_rd(p_hwfn, p_ptt,
 200                                               MISCS_REG_GENERIC_POR_0)) &&
 201                  (cnt++ < QED_MCP_RESET_RETRIES));
 202
 203         if (org_mcp_reset_seq !=
 204             qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0)) {
 205                 DP_VERBOSE(p_hwfn, QED_MSG_SP,
 206                            "MCP was reset after %d usec\n", cnt * delay);
 207         } else {
 208                 DP_ERR(p_hwfn, "Failed to reset MCP\n");
 209                 rc = -EAGAIN;
 210         }
 211
 212         return rc;
 213 }
 214
 215 static int qed_do_mcp_cmd(struct qed_hwfn *p_hwfn,
 216                           struct qed_ptt *p_ptt,
 217                           u32 cmd,
 218                           u32 param,
 219                           u32 *o_mcp_resp,
 220                           u32 *o_mcp_param)
 221 {
 222         u8 delay = CHIP_MCP_RESP_ITER_US;
 223         u32 seq, cnt = 1, actual_mb_seq;
 224         int rc = 0;
 225
 226         /* Get actual driver mailbox sequence */
 227         actual_mb_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_mb_header) &
 228                         DRV_MSG_SEQ_NUMBER_MASK;
 229
 230         /* Use MCP history register to check if MCP reset occurred between
 231          * init time and now.
 232          */
 233         if (p_hwfn->mcp_info->mcp_hist !=
 234             qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0)) {
 235                 DP_VERBOSE(p_hwfn, QED_MSG_SP, "Rereading MCP offsets\n");
 236                 qed_load_mcp_offsets(p_hwfn, p_ptt);
 237                 qed_mcp_cmd_port_init(p_hwfn, p_ptt);
 238         }
 239         seq = ++p_hwfn->mcp_info->drv_mb_seq;
 240
 241         /* Set drv param */
 242         DRV_MB_WR(p_hwfn, p_ptt, drv_mb_param, param);
 243
 244         /* Set drv command along with the updated sequence */
 245         DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header, (cmd | seq));
 246
 247         DP_VERBOSE(p_hwfn, QED_MSG_SP,
 248                    "wrote command (%x) to MFW MB param 0x%08x\n",
 249                    (cmd | seq), param);
 250
 251         do {
 252                 /* Wait for MFW response */
 253                 udelay(delay);
 254                 *o_mcp_resp = DRV_MB_RD(p_hwfn, p_ptt, fw_mb_header);
 255
 256                 /* Give the FW up to 5 second (500*10ms) */
 257         } while ((seq != (*o_mcp_resp & FW_MSG_SEQ_NUMBER_MASK)) &&
 258                  (cnt++ < QED_DRV_MB_MAX_RETRIES));
 259
 260         DP_VERBOSE(p_hwfn, QED_MSG_SP,
 261                    "[after %d ms] read (%x) seq is (%x) from FW MB\n",
 262                    cnt * delay, *o_mcp_resp, seq);
 263
 264         /* Is this a reply to our command? */
 265         if (seq == (*o_mcp_resp & FW_MSG_SEQ_NUMBER_MASK)) {
 266                 *o_mcp_resp &= FW_MSG_CODE_MASK;
 267                 /* Get the MCP param */
 268                 *o_mcp_param = DRV_MB_RD(p_hwfn, p_ptt, fw_mb_param);
 269         } else {
 270                 /* FW BUG! */
 271                 DP_ERR(p_hwfn, "MFW failed to respond!\n");
 272                 *o_mcp_resp = 0;
 273                 rc = -EAGAIN;
 274         }
 275         return rc;
 276 }
 277
 278 int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
 279                 struct qed_ptt *p_ptt,
 280                 u32 cmd,
 281                 u32 param,
 282                 u32 *o_mcp_resp,
 283                 u32 *o_mcp_param)
 284 {
 285         int rc = 0;
 286
 287         /* MCP not initialized */
 288         if (!qed_mcp_is_init(p_hwfn)) {
 289                 DP_NOTICE(p_hwfn, "MFW is not initialized !\n");
 290                 return -EBUSY;
 291         }
 292
 293         /* Lock Mutex to ensure only single thread is
 294          * accessing the MCP at one time
 295          */
 296         mutex_lock(&p_hwfn->mcp_info->mutex);
 297         rc = qed_do_mcp_cmd(p_hwfn, p_ptt, cmd, param,
 298                             o_mcp_resp, o_mcp_param);
 299         /* Release Mutex */
 300         mutex_unlock(&p_hwfn->mcp_info->mutex);
 301
 302         return rc;
 303 }
 304
 305 static void qed_mcp_set_drv_ver(struct qed_dev *cdev,
 306                                 struct qed_hwfn *p_hwfn,
 307                                 struct qed_ptt *p_ptt)
 308 {
 309         u32 i;
 310
 311         /* Copy version string to MCP */
 312         for (i = 0; i < MCP_DRV_VER_STR_SIZE_DWORD; i++)
 313                 DRV_MB_WR(p_hwfn, p_ptt, union_data.ver_str[i],
 314                           *(u32 *)&cdev->ver_str[i * sizeof(u32)]);
 315 }
 316
 317 int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
 318                      struct qed_ptt *p_ptt,
 319                      u32 *p_load_code)
 320 {
 321         struct qed_dev *cdev = p_hwfn->cdev;
 322         u32 param;
 323         int rc;
 324
 325         if (!qed_mcp_is_init(p_hwfn)) {
 326                 DP_NOTICE(p_hwfn, "MFW is not initialized !\n");
 327                 return -EBUSY;
 328         }
 329
 330         /* Save driver's version to shmem */
 331         qed_mcp_set_drv_ver(cdev, p_hwfn, p_ptt);
 332
 333         DP_VERBOSE(p_hwfn, QED_MSG_SP, "fw_seq 0x%08x, drv_pulse 0x%x\n",
 334                    p_hwfn->mcp_info->drv_mb_seq,
 335                    p_hwfn->mcp_info->drv_pulse_seq);
 336
 337         /* Load Request */
 338         rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_LOAD_REQ,
 339                          (PDA_COMP | DRV_ID_MCP_HSI_VER_CURRENT |
 340                           cdev->drv_type),
 341                          p_load_code, &param);
 342
 343         /* if mcp fails to respond we must abort */
 344         if (rc) {
 345                 DP_ERR(p_hwfn, "MCP response failure, aborting\n");
 346                 return rc;
 347         }
 348
 349         /* If MFW refused (e.g. other port is in diagnostic mode) we
 350          * must abort. This can happen in the following cases:
 351          * - Other port is in diagnostic mode
 352          * - Previously loaded function on the engine is not compliant with
 353          *   the requester.
 354          * - MFW cannot cope with the requester's DRV_MFW_HSI_VERSION.
 355          *      -
 356          */
 357         if (!(*p_load_code) ||
 358             ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_HSI) ||
 359             ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_PDA) ||
 360             ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_DIAG)) {
 361                 DP_ERR(p_hwfn, "MCP refused load request, aborting\n");
 362                 return -EBUSY;
 363         }
 364
 365         return 0;
 366 }
 367
 368 static void qed_mcp_handle_link_change(struct qed_hwfn *p_hwfn,
 369                                        struct qed_ptt *p_ptt,
 370                                        bool b_reset)
 371 {
 372         struct qed_mcp_link_state *p_link;
 373         u32 status = 0;
 374
 375         p_link = &p_hwfn->mcp_info->link_output;
 376         memset(p_link, 0, sizeof(*p_link));
 377         if (!b_reset) {
 378                 status = qed_rd(p_hwfn, p_ptt,
 379                                 p_hwfn->mcp_info->port_addr +
 380                                 offsetof(struct public_port, link_status));
 381                 DP_VERBOSE(p_hwfn, (NETIF_MSG_LINK | QED_MSG_SP),
 382                            "Received link update [0x%08x] from mfw [Addr 0x%x]\n",
 383                            status,
 384                            (u32)(p_hwfn->mcp_info->port_addr +
 385                                  offsetof(struct public_port,
 386                                           link_status)));
 387         } else {
 388                 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
 389                            "Resetting link indications\n");
 390                 return;
 391         }
 392
 393         p_link->link_up = !!(status & LINK_STATUS_LINK_UP);
 394
 395         p_link->full_duplex = true;
 396         switch ((status & LINK_STATUS_SPEED_AND_DUPLEX_MASK)) {
 397         case LINK_STATUS_SPEED_AND_DUPLEX_100G:
 398                 p_link->speed = 100000;
 399                 break;
 400         case LINK_STATUS_SPEED_AND_DUPLEX_50G:
 401                 p_link->speed = 50000;
 402                 break;
 403         case LINK_STATUS_SPEED_AND_DUPLEX_40G:
 404                 p_link->speed = 40000;
 405                 break;
 406         case LINK_STATUS_SPEED_AND_DUPLEX_25G:
 407                 p_link->speed = 25000;
 408                 break;
 409         case LINK_STATUS_SPEED_AND_DUPLEX_20G:
 410                 p_link->speed = 20000;
 411                 break;
 412         case LINK_STATUS_SPEED_AND_DUPLEX_10G:
 413                 p_link->speed = 10000;
 414                 break;
 415         case LINK_STATUS_SPEED_AND_DUPLEX_1000THD:
 416                 p_link->full_duplex = false;
 417         /* Fall-through */
 418         case LINK_STATUS_SPEED_AND_DUPLEX_1000TFD:
 419                 p_link->speed = 1000;
 420                 break;
 421         default:
 422                 p_link->speed = 0;
 423                 p_link->link_up = 0;
 424         }
 425
 426         /* Correct speed according to bandwidth allocation */
 427         if (p_hwfn->mcp_info->func_info.bandwidth_max && p_link->speed) {
 428                 p_link->speed = p_link->speed *
 429                                 p_hwfn->mcp_info->func_info.bandwidth_max /
 430                                 100;
 431                 qed_init_pf_rl(p_hwfn, p_ptt, p_hwfn->rel_pf_id,
 432                                p_link->speed);
 433                 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
 434                            "Configured MAX bandwidth to be %08x Mb/sec\n",
 435                            p_link->speed);
 436         }
 437
 438         p_link->an = !!(status & LINK_STATUS_AUTO_NEGOTIATE_ENABLED);
 439         p_link->an_complete = !!(status &
 440                                  LINK_STATUS_AUTO_NEGOTIATE_COMPLETE);
 441         p_link->parallel_detection = !!(status &
 442                                         LINK_STATUS_PARALLEL_DETECTION_USED);
 443         p_link->pfc_enabled = !!(status & LINK_STATUS_PFC_ENABLED);
 444
 445         p_link->partner_adv_speed |=
 446                 (status & LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE) ?
 447                 QED_LINK_PARTNER_SPEED_1G_FD : 0;
 448         p_link->partner_adv_speed |=
 449                 (status & LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE) ?
 450                 QED_LINK_PARTNER_SPEED_1G_HD : 0;
 451         p_link->partner_adv_speed |=
 452                 (status & LINK_STATUS_LINK_PARTNER_10G_CAPABLE) ?
 453                 QED_LINK_PARTNER_SPEED_10G : 0;
 454         p_link->partner_adv_speed |=
 455                 (status & LINK_STATUS_LINK_PARTNER_20G_CAPABLE) ?
 456                 QED_LINK_PARTNER_SPEED_20G : 0;
 457         p_link->partner_adv_speed |=
 458                 (status & LINK_STATUS_LINK_PARTNER_40G_CAPABLE) ?
 459                 QED_LINK_PARTNER_SPEED_40G : 0;
 460         p_link->partner_adv_speed |=
 461                 (status & LINK_STATUS_LINK_PARTNER_50G_CAPABLE) ?
 462                 QED_LINK_PARTNER_SPEED_50G : 0;
 463         p_link->partner_adv_speed |=
 464                 (status & LINK_STATUS_LINK_PARTNER_100G_CAPABLE) ?
 465                 QED_LINK_PARTNER_SPEED_100G : 0;
 466
 467         p_link->partner_tx_flow_ctrl_en =
 468                 !!(status & LINK_STATUS_TX_FLOW_CONTROL_ENABLED);
 469         p_link->partner_rx_flow_ctrl_en =
 470                 !!(status & LINK_STATUS_RX_FLOW_CONTROL_ENABLED);
 471
 472         switch (status & LINK_STATUS_LINK_PARTNER_FLOW_CONTROL_MASK) {
 473         case LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE:
 474                 p_link->partner_adv_pause = QED_LINK_PARTNER_SYMMETRIC_PAUSE;
 475                 break;
 476         case LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE:
 477                 p_link->partner_adv_pause = QED_LINK_PARTNER_ASYMMETRIC_PAUSE;
 478                 break;
 479         case LINK_STATUS_LINK_PARTNER_BOTH_PAUSE:
 480                 p_link->partner_adv_pause = QED_LINK_PARTNER_BOTH_PAUSE;
 481                 break;
 482         default:
 483                 p_link->partner_adv_pause = 0;
 484         }
 485
 486         p_link->sfp_tx_fault = !!(status & LINK_STATUS_SFP_TX_FAULT);
 487
 488         qed_link_update(p_hwfn);
 489 }
 490
 491 int qed_mcp_set_link(struct qed_hwfn *p_hwfn,
 492                      struct qed_ptt *p_ptt,
 493                      bool b_up)
 494 {
 495         struct qed_mcp_link_params *params = &p_hwfn->mcp_info->link_input;
 496         u32 param = 0, reply = 0, cmd;
 497         struct pmm_phy_cfg phy_cfg;
 498         int rc = 0;
 499         u32 i;
 500
 501         if (!qed_mcp_is_init(p_hwfn)) {
 502                 DP_NOTICE(p_hwfn, "MFW is not initialized !\n");
 503                 return -EBUSY;
 504         }
 505
 506         /* Set the shmem configuration according to params */
 507         memset(&phy_cfg, 0, sizeof(phy_cfg));
 508         cmd = b_up ? DRV_MSG_CODE_INIT_PHY : DRV_MSG_CODE_LINK_RESET;
 509         if (!params->speed.autoneg)
 510                 phy_cfg.speed = params->speed.forced_speed;
 511         phy_cfg.pause |= (params->pause.autoneg) ? PMM_PAUSE_AUTONEG : 0;
 512         phy_cfg.pause |= (params->pause.forced_rx) ? PMM_PAUSE_RX : 0;
 513         phy_cfg.pause |= (params->pause.forced_tx) ? PMM_PAUSE_TX : 0;
 514         phy_cfg.adv_speed = params->speed.advertised_speeds;
 515         phy_cfg.loopback_mode = params->loopback_mode;
 516
 517         /* Write the requested configuration to shmem */
 518         for (i = 0; i < sizeof(phy_cfg); i += 4)
 519                 qed_wr(p_hwfn, p_ptt,
 520                        p_hwfn->mcp_info->drv_mb_addr +
 521                        offsetof(struct public_drv_mb, union_data) + i,
 522                        ((u32 *)&phy_cfg)[i >> 2]);
 523
 524         if (b_up) {
 525                 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
 526                            "Configuring Link: Speed 0x%08x, Pause 0x%08x, adv_speed 0x%08x, loopback 0x%08x, features 0x%08x\n",
 527                            phy_cfg.speed,
 528                            phy_cfg.pause,
 529                            phy_cfg.adv_speed,
 530                            phy_cfg.loopback_mode,
 531                            phy_cfg.feature_config_flags);
 532         } else {
 533                 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
 534                            "Resetting link\n");
 535         }
 536
 537         DP_VERBOSE(p_hwfn, QED_MSG_SP, "fw_seq 0x%08x, drv_pulse 0x%x\n",
 538                    p_hwfn->mcp_info->drv_mb_seq,
 539                    p_hwfn->mcp_info->drv_pulse_seq);
 540
 541         /* Load Request */
 542         rc = qed_mcp_cmd(p_hwfn, p_ptt, cmd, 0, &reply, &param);
 543
 544         /* if mcp fails to respond we must abort */
 545         if (rc) {
 546                 DP_ERR(p_hwfn, "MCP response failure, aborting\n");
 547                 return rc;
 548         }
 549
 550         /* Reset the link status if needed */
 551         if (!b_up)
 552                 qed_mcp_handle_link_change(p_hwfn, p_ptt, true);
 553
 554         return 0;
 555 }
 556
 557 int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
 558                           struct qed_ptt *p_ptt)
 559 {
 560         struct qed_mcp_info *info = p_hwfn->mcp_info;
 561         int rc = 0;
 562         bool found = false;
 563         u16 i;
 564
 565         DP_VERBOSE(p_hwfn, QED_MSG_SP, "Received message from MFW\n");
 566
 567         /* Read Messages from MFW */
 568         qed_mcp_read_mb(p_hwfn, p_ptt);
 569
 570         /* Compare current messages to old ones */
 571         for (i = 0; i < info->mfw_mb_length; i++) {
 572                 if (info->mfw_mb_cur[i] == info->mfw_mb_shadow[i])
 573                         continue;
 574
 575                 found = true;
 576
 577                 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
 578                            "Msg [%d] - old CMD 0x%02x, new CMD 0x%02x\n",
 579                            i, info->mfw_mb_shadow[i], info->mfw_mb_cur[i]);
 580
 581                 switch (i) {
 582                 case MFW_DRV_MSG_LINK_CHANGE:
 583                         qed_mcp_handle_link_change(p_hwfn, p_ptt, false);
 584                         break;
 585                 default:
 586                         DP_NOTICE(p_hwfn, "Unimplemented MFW message %d\n", i);
 587                         rc = -EINVAL;
 588                 }
 589         }
 590
 591         /* ACK everything */
 592         for (i = 0; i < MFW_DRV_MSG_MAX_DWORDS(info->mfw_mb_length); i++) {
 593                 __be32 val = cpu_to_be32(((u32 *)info->mfw_mb_cur)[i]);
 594
 595                 /* MFW expect answer in BE, so we force write in that format */
 596                 qed_wr(p_hwfn, p_ptt,
 597                        info->mfw_mb_addr + sizeof(u32) +
 598                        MFW_DRV_MSG_MAX_DWORDS(info->mfw_mb_length) *
 599                        sizeof(u32) + i * sizeof(u32),
 600                        (__force u32)val);
 601         }
 602
 603         if (!found) {
 604                 DP_NOTICE(p_hwfn,
 605                           "Received an MFW message indication but no new message!\n");
 606                 rc = -EINVAL;
 607         }
 608
 609         /* Copy the new mfw messages into the shadow */
 610         memcpy(info->mfw_mb_shadow, info->mfw_mb_cur, info->mfw_mb_length);
 611
 612         return rc;
 613 }
 614
 615 int qed_mcp_get_mfw_ver(struct qed_dev *cdev,
 616                         u32 *p_mfw_ver)
 617 {
 618         struct qed_hwfn *p_hwfn = &cdev->hwfns[0];
 619         struct qed_ptt *p_ptt;
 620         u32 global_offsize;
 621
 622         p_ptt = qed_ptt_acquire(p_hwfn);
 623         if (!p_ptt)
 624                 return -EBUSY;
 625
 626         global_offsize = qed_rd(p_hwfn, p_ptt,
 627                                 SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->
 628                                                      public_base,
 629                                                      PUBLIC_GLOBAL));
 630         *p_mfw_ver = qed_rd(p_hwfn, p_ptt,
 631                             SECTION_ADDR(global_offsize, 0) +
 632                             offsetof(struct public_global, mfw_ver));
 633
 634         qed_ptt_release(p_hwfn, p_ptt);
 635
 636         return 0;
 637 }
 638
 639 int qed_mcp_get_media_type(struct qed_dev *cdev,
 640                            u32 *p_media_type)
 641 {
 642         struct qed_hwfn *p_hwfn = &cdev->hwfns[0];
 643         struct qed_ptt  *p_ptt;
 644
 645         if (!qed_mcp_is_init(p_hwfn)) {
 646                 DP_NOTICE(p_hwfn, "MFW is not initialized !\n");
 647                 return -EBUSY;
 648         }
 649
 650         *p_media_type = MEDIA_UNSPECIFIED;
 651
 652         p_ptt = qed_ptt_acquire(p_hwfn);
 653         if (!p_ptt)
 654                 return -EBUSY;
 655
 656         *p_media_type = qed_rd(p_hwfn, p_ptt, p_hwfn->mcp_info->port_addr +
 657                                offsetof(struct public_port, media_type));
 658
 659         qed_ptt_release(p_hwfn, p_ptt);
 660
 661         return 0;
 662 }
 663
 664 static u32 qed_mcp_get_shmem_func(struct qed_hwfn *p_hwfn,
 665                                   struct qed_ptt *p_ptt,
 666                                   struct public_func *p_data,
 667                                   int pfid)
 668 {
 669         u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,
 670                                         PUBLIC_FUNC);
 671         u32 mfw_path_offsize = qed_rd(p_hwfn, p_ptt, addr);
 672         u32 func_addr = SECTION_ADDR(mfw_path_offsize, pfid);
 673         u32 i, size;
 674
 675         memset(p_data, 0, sizeof(*p_data));
 676
 677         size = min_t(u32, sizeof(*p_data),
 678                      QED_SECTION_SIZE(mfw_path_offsize));
 679         for (i = 0; i < size / sizeof(u32); i++)
 680                 ((u32 *)p_data)[i] = qed_rd(p_hwfn, p_ptt,
 681                                             func_addr + (i << 2));
 682
 683         return size;
 684 }
 685
 686 static int
 687 qed_mcp_get_shmem_proto(struct qed_hwfn *p_hwfn,
 688                         struct public_func *p_info,
 689                         enum qed_pci_personality *p_proto)
 690 {
 691         int rc = 0;
 692
 693         switch (p_info->config & FUNC_MF_CFG_PROTOCOL_MASK) {
 694         case FUNC_MF_CFG_PROTOCOL_ETHERNET:
 695                 *p_proto = QED_PCI_ETH;
 696                 break;
 697         default:
 698                 rc = -EINVAL;
 699         }
 700
 701         return rc;
 702 }
 703
 704 int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
 705                                  struct qed_ptt *p_ptt)
 706 {
 707         struct qed_mcp_function_info *info;
 708         struct public_func shmem_info;
 709
 710         qed_mcp_get_shmem_func(p_hwfn, p_ptt, &shmem_info,
 711                                MCP_PF_ID(p_hwfn));
 712         info = &p_hwfn->mcp_info->func_info;
 713
 714         info->pause_on_host = (shmem_info.config &
 715                                FUNC_MF_CFG_PAUSE_ON_HOST_RING) ? 1 : 0;
 716
 717         if (qed_mcp_get_shmem_proto(p_hwfn, &shmem_info,
 718                                     &info->protocol)) {
 719                 DP_ERR(p_hwfn, "Unknown personality %08x\n",
 720                        (u32)(shmem_info.config & FUNC_MF_CFG_PROTOCOL_MASK));
 721                 return -EINVAL;
 722         }
 723
 724         if (p_hwfn->cdev->mf_mode != SF) {
 725                 info->bandwidth_min = (shmem_info.config &
 726                                        FUNC_MF_CFG_MIN_BW_MASK) >>
 727                                       FUNC_MF_CFG_MIN_BW_SHIFT;
 728                 if (info->bandwidth_min < 1 || info->bandwidth_min > 100) {
 729                         DP_INFO(p_hwfn,
 730                                 "bandwidth minimum out of bounds [%02x]. Set to 1\n",
 731                                 info->bandwidth_min);
 732                         info->bandwidth_min = 1;
 733                 }
 734
 735                 info->bandwidth_max = (shmem_info.config &
 736                                        FUNC_MF_CFG_MAX_BW_MASK) >>
 737                                       FUNC_MF_CFG_MAX_BW_SHIFT;
 738                 if (info->bandwidth_max < 1 || info->bandwidth_max > 100) {
 739                         DP_INFO(p_hwfn,
 740                                 "bandwidth maximum out of bounds [%02x]. Set to 100\n",
 741                                 info->bandwidth_max);
 742                         info->bandwidth_max = 100;
 743                 }
 744         }
 745
 746         if (shmem_info.mac_upper || shmem_info.mac_lower) {
 747                 info->mac[0] = (u8)(shmem_info.mac_upper >> 8);
 748                 info->mac[1] = (u8)(shmem_info.mac_upper);
 749                 info->mac[2] = (u8)(shmem_info.mac_lower >> 24);
 750                 info->mac[3] = (u8)(shmem_info.mac_lower >> 16);
 751                 info->mac[4] = (u8)(shmem_info.mac_lower >> 8);
 752                 info->mac[5] = (u8)(shmem_info.mac_lower);
 753         } else {
 754                 DP_NOTICE(p_hwfn, "MAC is 0 in shmem\n");
 755         }
 756
 757         info->wwn_port = (u64)shmem_info.fcoe_wwn_port_name_upper |
 758                          (((u64)shmem_info.fcoe_wwn_port_name_lower) << 32);
 759         info->wwn_node = (u64)shmem_info.fcoe_wwn_node_name_upper |
 760                          (((u64)shmem_info.fcoe_wwn_node_name_lower) << 32);
 761
 762         info->ovlan = (u16)(shmem_info.ovlan_stag & FUNC_MF_CFG_OV_STAG_MASK);
 763
 764         DP_VERBOSE(p_hwfn, (QED_MSG_SP | NETIF_MSG_IFUP),
 765                    "Read configuration from shmem: pause_on_host %02x protocol %02x BW [%02x - %02x] MAC %02x:%02x:%02x:%02x:%02x:%02x wwn port %llx node %llx ovlan %04x\n",
 766                 info->pause_on_host, info->protocol,
 767                 info->bandwidth_min, info->bandwidth_max,
 768                 info->mac[0], info->mac[1], info->mac[2],
 769                 info->mac[3], info->mac[4], info->mac[5],
 770                 info->wwn_port, info->wwn_node, info->ovlan);
 771
 772         return 0;
 773 }
 774
 775 struct qed_mcp_link_params
 776 *qed_mcp_get_link_params(struct qed_hwfn *p_hwfn)
 777 {
 778         if (!p_hwfn || !p_hwfn->mcp_info)
 779                 return NULL;
 780         return &p_hwfn->mcp_info->link_input;
 781 }
 782
 783 struct qed_mcp_link_state
 784 *qed_mcp_get_link_state(struct qed_hwfn *p_hwfn)
 785 {
 786         if (!p_hwfn || !p_hwfn->mcp_info)
 787                 return NULL;
 788         return &p_hwfn->mcp_info->link_output;
 789 }
 790
 791 struct qed_mcp_link_capabilities
 792 *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn)
 793 {
 794         if (!p_hwfn || !p_hwfn->mcp_info)
 795                 return NULL;
 796         return &p_hwfn->mcp_info->link_capabilities;
 797 }
 798
 799 int qed_mcp_drain(struct qed_hwfn *p_hwfn,
 800                   struct qed_ptt *p_ptt)
 801 {
 802         u32 resp = 0, param = 0;
 803         int rc;
 804
 805         rc = qed_mcp_cmd(p_hwfn, p_ptt,
 806                          DRV_MSG_CODE_NIG_DRAIN, 100,
 807                          &resp, &param);
 808
 809         /* Wait for the drain to complete before returning */
 810         msleep(120);
 811
 812         return rc;
 813 }
 814
 815 int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn,
 816                            struct qed_ptt *p_ptt,
 817                            u32 *p_flash_size)
 818 {
 819         u32 flash_size;
 820
 821         flash_size = qed_rd(p_hwfn, p_ptt, MCP_REG_NVM_CFG4);
 822         flash_size = (flash_size & MCP_REG_NVM_CFG4_FLASH_SIZE) >>
 823                       MCP_REG_NVM_CFG4_FLASH_SIZE_SHIFT;
 824         flash_size = (1 << (flash_size + MCP_BYTES_PER_MBIT_SHIFT));
 825
 826         *p_flash_size = flash_size;
 827
 828         return 0;
 829 }
 830
 831 int
 832 qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
 833                          struct qed_ptt *p_ptt,
 834                          struct qed_mcp_drv_version *p_ver)
 835 {
 836         int rc = 0;
 837         u32 param = 0, reply = 0, i;
 838
 839         if (!qed_mcp_is_init(p_hwfn)) {
 840                 DP_NOTICE(p_hwfn, "MFW is not initialized !\n");
 841                 return -EBUSY;
 842         }
 843
 844         DRV_MB_WR(p_hwfn, p_ptt, union_data.drv_version.version,
 845                   p_ver->version);
 846         /* Copy version string to shmem */
 847         for (i = 0; i < (MCP_DRV_VER_STR_SIZE - 4) / 4; i++) {
 848                 DRV_MB_WR(p_hwfn, p_ptt,
 849                           union_data.drv_version.name[i * sizeof(u32)],
 850                           *(u32 *)&p_ver->name[i * sizeof(u32)]);
 851         }
 852
 853         rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_VERSION, 0, &reply,
 854                          &param);
 855         if (rc) {
 856                 DP_ERR(p_hwfn, "MCP response failure, aborting\n");
 857                 return rc;
 858         }
 859
 860         return 0;
 861 }