drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c

   1 /*
   2  * QLogic qlcnic NIC Driver
   3  * Copyright (c) 2009-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qlcnic for copyright and licensing details.
   6  */
   7
   8 #include <linux/types.h>
   9
  10 #include "qlcnic_sriov.h"
  11 #include "qlcnic.h"
  12 #include "qlcnic_83xx_hw.h"
  13
  14 #define QLC_BC_COMMAND  0
  15 #define QLC_BC_RESPONSE 1
  16
  17 #define QLC_MBOX_RESP_TIMEOUT           (10 * HZ)
  18 #define QLC_MBOX_CH_FREE_TIMEOUT        (10 * HZ)
  19
  20 #define QLC_BC_MSG              0
  21 #define QLC_BC_CFREE            1
  22 #define QLC_BC_FLR              2
  23 #define QLC_BC_HDR_SZ           16
  24 #define QLC_BC_PAYLOAD_SZ       (1024 - QLC_BC_HDR_SZ)
  25
  26 #define QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF            2048
  27 #define QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF      512
  28
  29 #define QLC_83XX_VF_RESET_FAIL_THRESH   8
  30 #define QLC_BC_CMD_MAX_RETRY_CNT        5
  31
  32 static void qlcnic_sriov_handle_async_issue_cmd(struct work_struct *work);
  33 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *);
  34 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *, u32);
  35 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *);
  36 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *);
  37 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *);
  38 static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *,
  39                                   struct qlcnic_cmd_args *);
  40 static int qlcnic_sriov_channel_cfg_cmd(struct qlcnic_adapter *, u8);
  41 static void qlcnic_sriov_process_bc_cmd(struct work_struct *);
  42 static int qlcnic_sriov_vf_shutdown(struct pci_dev *);
  43 static int qlcnic_sriov_vf_resume(struct qlcnic_adapter *);
  44 static int qlcnic_sriov_async_issue_cmd(struct qlcnic_adapter *,
  45                                         struct qlcnic_cmd_args *);
  46
  47 static struct qlcnic_hardware_ops qlcnic_sriov_vf_hw_ops = {
  48         .read_crb                       = qlcnic_83xx_read_crb,
  49         .write_crb                      = qlcnic_83xx_write_crb,
  50         .read_reg                       = qlcnic_83xx_rd_reg_indirect,
  51         .write_reg                      = qlcnic_83xx_wrt_reg_indirect,
  52         .get_mac_address                = qlcnic_83xx_get_mac_address,
  53         .setup_intr                     = qlcnic_83xx_setup_intr,
  54         .alloc_mbx_args                 = qlcnic_83xx_alloc_mbx_args,
  55         .mbx_cmd                        = qlcnic_sriov_issue_cmd,
  56         .get_func_no                    = qlcnic_83xx_get_func_no,
  57         .api_lock                       = qlcnic_83xx_cam_lock,
  58         .api_unlock                     = qlcnic_83xx_cam_unlock,
  59         .process_lb_rcv_ring_diag       = qlcnic_83xx_process_rcv_ring_diag,
  60         .create_rx_ctx                  = qlcnic_83xx_create_rx_ctx,
  61         .create_tx_ctx                  = qlcnic_83xx_create_tx_ctx,
  62         .del_rx_ctx                     = qlcnic_83xx_del_rx_ctx,
  63         .del_tx_ctx                     = qlcnic_83xx_del_tx_ctx,
  64         .setup_link_event               = qlcnic_83xx_setup_link_event,
  65         .get_nic_info                   = qlcnic_83xx_get_nic_info,
  66         .get_pci_info                   = qlcnic_83xx_get_pci_info,
  67         .set_nic_info                   = qlcnic_83xx_set_nic_info,
  68         .change_macvlan                 = qlcnic_83xx_sre_macaddr_change,
  69         .napi_enable                    = qlcnic_83xx_napi_enable,
  70         .napi_disable                   = qlcnic_83xx_napi_disable,
  71         .config_intr_coal               = qlcnic_83xx_config_intr_coal,
  72         .config_rss                     = qlcnic_83xx_config_rss,
  73         .config_hw_lro                  = qlcnic_83xx_config_hw_lro,
  74         .config_promisc_mode            = qlcnic_83xx_nic_set_promisc,
  75         .change_l2_filter               = qlcnic_83xx_change_l2_filter,
  76         .get_board_info                 = qlcnic_83xx_get_port_info,
  77         .free_mac_list                  = qlcnic_sriov_vf_free_mac_list,
  78         .enable_sds_intr                = qlcnic_83xx_enable_sds_intr,
  79         .disable_sds_intr               = qlcnic_83xx_disable_sds_intr,
  80         .encap_rx_offload               = qlcnic_83xx_encap_rx_offload,
  81         .encap_tx_offload               = qlcnic_83xx_encap_tx_offload,
  82 };
  83
  84 static struct qlcnic_nic_template qlcnic_sriov_vf_ops = {
  85         .config_bridged_mode    = qlcnic_config_bridged_mode,
  86         .config_led             = qlcnic_config_led,
  87         .cancel_idc_work        = qlcnic_sriov_vf_cancel_fw_work,
  88         .napi_add               = qlcnic_83xx_napi_add,
  89         .napi_del               = qlcnic_83xx_napi_del,
  90         .shutdown               = qlcnic_sriov_vf_shutdown,
  91         .resume                 = qlcnic_sriov_vf_resume,
  92         .config_ipaddr          = qlcnic_83xx_config_ipaddr,
  93         .clear_legacy_intr      = qlcnic_83xx_clear_legacy_intr,
  94 };
  95
  96 static const struct qlcnic_mailbox_metadata qlcnic_sriov_bc_mbx_tbl[] = {
  97         {QLCNIC_BC_CMD_CHANNEL_INIT, 2, 2},
  98         {QLCNIC_BC_CMD_CHANNEL_TERM, 2, 2},
  99         {QLCNIC_BC_CMD_GET_ACL, 3, 14},
 100         {QLCNIC_BC_CMD_CFG_GUEST_VLAN, 2, 2},
 101 };
 102
 103 static inline bool qlcnic_sriov_bc_msg_check(u32 val)
 104 {
 105         return (val & (1 << QLC_BC_MSG)) ? true : false;
 106 }
 107
 108 static inline bool qlcnic_sriov_channel_free_check(u32 val)
 109 {
 110         return (val & (1 << QLC_BC_CFREE)) ? true : false;
 111 }
 112
 113 static inline bool qlcnic_sriov_flr_check(u32 val)
 114 {
 115         return (val & (1 << QLC_BC_FLR)) ? true : false;
 116 }
 117
 118 static inline u8 qlcnic_sriov_target_func_id(u32 val)
 119 {
 120         return (val >> 4) & 0xff;
 121 }
 122
 123 static int qlcnic_sriov_virtid_fn(struct qlcnic_adapter *adapter, int vf_id)
 124 {
 125         struct pci_dev *dev = adapter->pdev;
 126         int pos;
 127         u16 stride, offset;
 128
 129         if (qlcnic_sriov_vf_check(adapter))
 130                 return 0;
 131
 132         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
 133         if (!pos)
 134                 return 0;
 135         pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
 136         pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
 137
 138         return (dev->devfn + offset + stride * vf_id) & 0xff;
 139 }
 140
 141 int qlcnic_sriov_init(struct qlcnic_adapter *adapter, int num_vfs)
 142 {
 143         struct qlcnic_sriov *sriov;
 144         struct qlcnic_back_channel *bc;
 145         struct workqueue_struct *wq;
 146         struct qlcnic_vport *vp;
 147         struct qlcnic_vf_info *vf;
 148         int err, i;
 149
 150         if (!qlcnic_sriov_enable_check(adapter))
 151                 return -EIO;
 152
 153         sriov  = kzalloc(sizeof(struct qlcnic_sriov), GFP_KERNEL);
 154         if (!sriov)
 155                 return -ENOMEM;
 156
 157         adapter->ahw->sriov = sriov;
 158         sriov->num_vfs = num_vfs;
 159         bc = &sriov->bc;
 160         sriov->vf_info = kcalloc(num_vfs, sizeof(struct qlcnic_vf_info),
 161                                  GFP_KERNEL);
 162         if (!sriov->vf_info) {
 163                 err = -ENOMEM;
 164                 goto qlcnic_free_sriov;
 165         }
 166
 167         wq = create_singlethread_workqueue("bc-trans");
 168         if (wq == NULL) {
 169                 err = -ENOMEM;
 170                 dev_err(&adapter->pdev->dev,
 171                         "Cannot create bc-trans workqueue\n");
 172                 goto qlcnic_free_vf_info;
 173         }
 174
 175         bc->bc_trans_wq = wq;
 176
 177         wq = create_singlethread_workqueue("async");
 178         if (wq == NULL) {
 179                 err = -ENOMEM;
 180                 dev_err(&adapter->pdev->dev, "Cannot create async workqueue\n");
 181                 goto qlcnic_destroy_trans_wq;
 182         }
 183
 184         bc->bc_async_wq =  wq;
 185         INIT_LIST_HEAD(&bc->async_cmd_list);
 186         INIT_WORK(&bc->vf_async_work, qlcnic_sriov_handle_async_issue_cmd);
 187         spin_lock_init(&bc->queue_lock);
 188         bc->adapter = adapter;
 189
 190         for (i = 0; i < num_vfs; i++) {
 191                 vf = &sriov->vf_info[i];
 192                 vf->adapter = adapter;
 193                 vf->pci_func = qlcnic_sriov_virtid_fn(adapter, i);
 194                 mutex_init(&vf->send_cmd_lock);
 195                 spin_lock_init(&vf->vlan_list_lock);
 196                 INIT_LIST_HEAD(&vf->rcv_act.wait_list);
 197                 INIT_LIST_HEAD(&vf->rcv_pend.wait_list);
 198                 spin_lock_init(&vf->rcv_act.lock);
 199                 spin_lock_init(&vf->rcv_pend.lock);
 200                 init_completion(&vf->ch_free_cmpl);
 201
 202                 INIT_WORK(&vf->trans_work, qlcnic_sriov_process_bc_cmd);
 203
 204                 if (qlcnic_sriov_pf_check(adapter)) {
 205                         vp = kzalloc(sizeof(struct qlcnic_vport), GFP_KERNEL);
 206                         if (!vp) {
 207                                 err = -ENOMEM;
 208                                 goto qlcnic_destroy_async_wq;
 209                         }
 210                         sriov->vf_info[i].vp = vp;
 211                         vp->vlan_mode = QLC_GUEST_VLAN_MODE;
 212                         vp->max_tx_bw = MAX_BW;
 213                         vp->min_tx_bw = MIN_BW;
 214                         vp->spoofchk = false;
 215                         eth_random_addr(vp->mac);
 216                         dev_info(&adapter->pdev->dev,
 217                                  "MAC Address %pM is configured for VF %d\n",
 218                                  vp->mac, i);
 219                 }
 220         }
 221
 222         return 0;
 223
 224 qlcnic_destroy_async_wq:
 225         destroy_workqueue(bc->bc_async_wq);
 226
 227 qlcnic_destroy_trans_wq:
 228         destroy_workqueue(bc->bc_trans_wq);
 229
 230 qlcnic_free_vf_info:
 231         kfree(sriov->vf_info);
 232
 233 qlcnic_free_sriov:
 234         kfree(adapter->ahw->sriov);
 235         return err;
 236 }
 237
 238 void qlcnic_sriov_cleanup_list(struct qlcnic_trans_list *t_list)
 239 {
 240         struct qlcnic_bc_trans *trans;
 241         struct qlcnic_cmd_args cmd;
 242         unsigned long flags;
 243
 244         spin_lock_irqsave(&t_list->lock, flags);
 245
 246         while (!list_empty(&t_list->wait_list)) {
 247                 trans = list_first_entry(&t_list->wait_list,
 248                                          struct qlcnic_bc_trans, list);
 249                 list_del(&trans->list);
 250                 t_list->count--;
 251                 cmd.req.arg = (u32 *)trans->req_pay;
 252                 cmd.rsp.arg = (u32 *)trans->rsp_pay;
 253                 qlcnic_free_mbx_args(&cmd);
 254                 qlcnic_sriov_cleanup_transaction(trans);
 255         }
 256
 257         spin_unlock_irqrestore(&t_list->lock, flags);
 258 }
 259
 260 void __qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 261 {
 262         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 263         struct qlcnic_back_channel *bc = &sriov->bc;
 264         struct qlcnic_vf_info *vf;
 265         int i;
 266
 267         if (!qlcnic_sriov_enable_check(adapter))
 268                 return;
 269
 270         qlcnic_sriov_cleanup_async_list(bc);
 271         destroy_workqueue(bc->bc_async_wq);
 272
 273         for (i = 0; i < sriov->num_vfs; i++) {
 274                 vf = &sriov->vf_info[i];
 275                 qlcnic_sriov_cleanup_list(&vf->rcv_pend);
 276                 cancel_work_sync(&vf->trans_work);
 277                 qlcnic_sriov_cleanup_list(&vf->rcv_act);
 278         }
 279
 280         destroy_workqueue(bc->bc_trans_wq);
 281
 282         for (i = 0; i < sriov->num_vfs; i++)
 283                 kfree(sriov->vf_info[i].vp);
 284
 285         kfree(sriov->vf_info);
 286         kfree(adapter->ahw->sriov);
 287 }
 288
 289 static void qlcnic_sriov_vf_cleanup(struct qlcnic_adapter *adapter)
 290 {
 291         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 292         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 293         __qlcnic_sriov_cleanup(adapter);
 294 }
 295
 296 void qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 297 {
 298         if (!test_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state))
 299                 return;
 300
 301         qlcnic_sriov_free_vlans(adapter);
 302
 303         if (qlcnic_sriov_pf_check(adapter))
 304                 qlcnic_sriov_pf_cleanup(adapter);
 305
 306         if (qlcnic_sriov_vf_check(adapter))
 307                 qlcnic_sriov_vf_cleanup(adapter);
 308 }
 309
 310 static int qlcnic_sriov_post_bc_msg(struct qlcnic_adapter *adapter, u32 *hdr,
 311                                     u32 *pay, u8 pci_func, u8 size)
 312 {
 313         struct qlcnic_hardware_context *ahw = adapter->ahw;
 314         struct qlcnic_mailbox *mbx = ahw->mailbox;
 315         struct qlcnic_cmd_args cmd;
 316         unsigned long timeout;
 317         int err;
 318
 319         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
 320         cmd.hdr = hdr;
 321         cmd.pay = pay;
 322         cmd.pay_size = size;
 323         cmd.func_num = pci_func;
 324         cmd.op_type = QLC_83XX_MBX_POST_BC_OP;
 325         cmd.cmd_op = ((struct qlcnic_bc_hdr *)hdr)->cmd_op;
 326
 327         err = mbx->ops->enqueue_cmd(adapter, &cmd, &timeout);
 328         if (err) {
 329                 dev_err(&adapter->pdev->dev,
 330                         "%s: Mailbox not available, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
 331                         __func__, cmd.cmd_op, cmd.type, ahw->pci_func,
 332                         ahw->op_mode);
 333                 return err;
 334         }
 335
 336         if (!wait_for_completion_timeout(&cmd.completion, timeout)) {
 337                 dev_err(&adapter->pdev->dev,
 338                         "%s: Mailbox command timed out, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
 339                         __func__, cmd.cmd_op, cmd.type, ahw->pci_func,
 340                         ahw->op_mode);
 341                 flush_workqueue(mbx->work_q);
 342         }
 343
 344         return cmd.rsp_opcode;
 345 }
 346
 347 static void qlcnic_sriov_vf_cfg_buff_desc(struct qlcnic_adapter *adapter)
 348 {
 349         adapter->num_rxd = QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF;
 350         adapter->max_rxd = MAX_RCV_DESCRIPTORS_10G;
 351         adapter->num_jumbo_rxd = QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF;
 352         adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G;
 353         adapter->num_txd = MAX_CMD_DESCRIPTORS;
 354         adapter->max_rds_rings = MAX_RDS_RINGS;
 355 }
 356
 357 int qlcnic_sriov_get_vf_vport_info(struct qlcnic_adapter *adapter,
 358                                    struct qlcnic_info *npar_info, u16 vport_id)
 359 {
 360         struct device *dev = &adapter->pdev->dev;
 361         struct qlcnic_cmd_args cmd;
 362         int err;
 363         u32 status;
 364
 365         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_NIC_INFO);
 366         if (err)
 367                 return err;
 368
 369         cmd.req.arg[1] = vport_id << 16 | 0x1;
 370         err = qlcnic_issue_cmd(adapter, &cmd);
 371         if (err) {
 372                 dev_err(&adapter->pdev->dev,
 373                         "Failed to get vport info, err=%d\n", err);
 374                 qlcnic_free_mbx_args(&cmd);
 375                 return err;
 376         }
 377
 378         status = cmd.rsp.arg[2] & 0xffff;
 379         if (status & BIT_0)
 380                 npar_info->min_tx_bw = MSW(cmd.rsp.arg[2]);
 381         if (status & BIT_1)
 382                 npar_info->max_tx_bw = LSW(cmd.rsp.arg[3]);
 383         if (status & BIT_2)
 384                 npar_info->max_tx_ques = MSW(cmd.rsp.arg[3]);
 385         if (status & BIT_3)
 386                 npar_info->max_tx_mac_filters = LSW(cmd.rsp.arg[4]);
 387         if (status & BIT_4)
 388                 npar_info->max_rx_mcast_mac_filters = MSW(cmd.rsp.arg[4]);
 389         if (status & BIT_5)
 390                 npar_info->max_rx_ucast_mac_filters = LSW(cmd.rsp.arg[5]);
 391         if (status & BIT_6)
 392                 npar_info->max_rx_ip_addr = MSW(cmd.rsp.arg[5]);
 393         if (status & BIT_7)
 394                 npar_info->max_rx_lro_flow = LSW(cmd.rsp.arg[6]);
 395         if (status & BIT_8)
 396                 npar_info->max_rx_status_rings = MSW(cmd.rsp.arg[6]);
 397         if (status & BIT_9)
 398                 npar_info->max_rx_buf_rings = LSW(cmd.rsp.arg[7]);
 399
 400         npar_info->max_rx_ques = MSW(cmd.rsp.arg[7]);
 401         npar_info->max_tx_vlan_keys = LSW(cmd.rsp.arg[8]);
 402         npar_info->max_local_ipv6_addrs = MSW(cmd.rsp.arg[8]);
 403         npar_info->max_remote_ipv6_addrs = LSW(cmd.rsp.arg[9]);
 404
 405         dev_info(dev, "\n\tmin_tx_bw: %d, max_tx_bw: %d max_tx_ques: %d,\n"
 406                  "\tmax_tx_mac_filters: %d max_rx_mcast_mac_filters: %d,\n"
 407                  "\tmax_rx_ucast_mac_filters: 0x%x, max_rx_ip_addr: %d,\n"
 408                  "\tmax_rx_lro_flow: %d max_rx_status_rings: %d,\n"
 409                  "\tmax_rx_buf_rings: %d, max_rx_ques: %d, max_tx_vlan_keys %d\n"
 410                  "\tlocal_ipv6_addr: %d, remote_ipv6_addr: %d\n",
 411                  npar_info->min_tx_bw, npar_info->max_tx_bw,
 412                  npar_info->max_tx_ques, npar_info->max_tx_mac_filters,
 413                  npar_info->max_rx_mcast_mac_filters,
 414                  npar_info->max_rx_ucast_mac_filters, npar_info->max_rx_ip_addr,
 415                  npar_info->max_rx_lro_flow, npar_info->max_rx_status_rings,
 416                  npar_info->max_rx_buf_rings, npar_info->max_rx_ques,
 417                  npar_info->max_tx_vlan_keys, npar_info->max_local_ipv6_addrs,
 418                  npar_info->max_remote_ipv6_addrs);
 419
 420         qlcnic_free_mbx_args(&cmd);
 421         return err;
 422 }
 423
 424 static int qlcnic_sriov_set_pvid_mode(struct qlcnic_adapter *adapter,
 425                                       struct qlcnic_cmd_args *cmd)
 426 {
 427         adapter->rx_pvid = MSW(cmd->rsp.arg[1]) & 0xffff;
 428         adapter->flags &= ~QLCNIC_TAGGING_ENABLED;
 429         return 0;
 430 }
 431
 432 static int qlcnic_sriov_set_guest_vlan_mode(struct qlcnic_adapter *adapter,
 433                                             struct qlcnic_cmd_args *cmd)
 434 {
 435         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 436         int i, num_vlans, ret;
 437         u16 *vlans;
 438
 439         if (sriov->allowed_vlans)
 440                 return 0;
 441
 442         sriov->any_vlan = cmd->rsp.arg[2] & 0xf;
 443         sriov->num_allowed_vlans = cmd->rsp.arg[2] >> 16;
 444         dev_info(&adapter->pdev->dev, "Number of allowed Guest VLANs = %d\n",
 445                  sriov->num_allowed_vlans);
 446
 447         ret = qlcnic_sriov_alloc_vlans(adapter);
 448         if (ret)
 449                 return ret;
 450
 451         if (!sriov->any_vlan)
 452                 return 0;
 453
 454         num_vlans = sriov->num_allowed_vlans;
 455         sriov->allowed_vlans = kcalloc(num_vlans, sizeof(u16), GFP_KERNEL);
 456         if (!sriov->allowed_vlans)
 457                 return -ENOMEM;
 458
 459         vlans = (u16 *)&cmd->rsp.arg[3];
 460         for (i = 0; i < num_vlans; i++)
 461                 sriov->allowed_vlans[i] = vlans[i];
 462
 463         return 0;
 464 }
 465
 466 static int qlcnic_sriov_get_vf_acl(struct qlcnic_adapter *adapter)
 467 {
 468         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 469         struct qlcnic_cmd_args cmd;
 470         int ret = 0;
 471
 472         memset(&cmd, 0, sizeof(cmd));
 473         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd, QLCNIC_BC_CMD_GET_ACL);
 474         if (ret)
 475                 return ret;
 476
 477         ret = qlcnic_issue_cmd(adapter, &cmd);
 478         if (ret) {
 479                 dev_err(&adapter->pdev->dev, "Failed to get ACL, err=%d\n",
 480                         ret);
 481         } else {
 482                 sriov->vlan_mode = cmd.rsp.arg[1] & 0x3;
 483                 switch (sriov->vlan_mode) {
 484                 case QLC_GUEST_VLAN_MODE:
 485                         ret = qlcnic_sriov_set_guest_vlan_mode(adapter, &cmd);
 486                         break;
 487                 case QLC_PVID_MODE:
 488                         ret = qlcnic_sriov_set_pvid_mode(adapter, &cmd);
 489                         break;
 490                 }
 491         }
 492
 493         qlcnic_free_mbx_args(&cmd);
 494         return ret;
 495 }
 496
 497 static int qlcnic_sriov_vf_init_driver(struct qlcnic_adapter *adapter)
 498 {
 499         struct qlcnic_hardware_context *ahw = adapter->ahw;
 500         struct qlcnic_info nic_info;
 501         int err;
 502
 503         err = qlcnic_sriov_get_vf_vport_info(adapter, &nic_info, 0);
 504         if (err)
 505                 return err;
 506
 507         ahw->max_mc_count = nic_info.max_rx_mcast_mac_filters;
 508
 509         err = qlcnic_get_nic_info(adapter, &nic_info, ahw->pci_func);
 510         if (err)
 511                 return -EIO;
 512
 513         if (qlcnic_83xx_get_port_info(adapter))
 514                 return -EIO;
 515
 516         qlcnic_sriov_vf_cfg_buff_desc(adapter);
 517         adapter->flags |= QLCNIC_ADAPTER_INITIALIZED;
 518         dev_info(&adapter->pdev->dev, "HAL Version: %d\n",
 519                  adapter->ahw->fw_hal_version);
 520
 521         ahw->physical_port = (u8) nic_info.phys_port;
 522         ahw->switch_mode = nic_info.switch_mode;
 523         ahw->max_mtu = nic_info.max_mtu;
 524         ahw->op_mode = nic_info.op_mode;
 525         ahw->capabilities = nic_info.capabilities;
 526         return 0;
 527 }
 528
 529 static int qlcnic_sriov_setup_vf(struct qlcnic_adapter *adapter,
 530                                  int pci_using_dac)
 531 {
 532         int err;
 533
 534         adapter->flags |= QLCNIC_VLAN_FILTERING;
 535         adapter->ahw->total_nic_func = 1;
 536         INIT_LIST_HEAD(&adapter->vf_mc_list);
 537         if (!qlcnic_use_msi_x && !!qlcnic_use_msi)
 538                 dev_warn(&adapter->pdev->dev,
 539                          "Device does not support MSI interrupts\n");
 540
 541         /* compute and set default and max tx/sds rings */
 542         qlcnic_set_tx_ring_count(adapter, QLCNIC_SINGLE_RING);
 543         qlcnic_set_sds_ring_count(adapter, QLCNIC_SINGLE_RING);
 544
 545         err = qlcnic_setup_intr(adapter);
 546         if (err) {
 547                 dev_err(&adapter->pdev->dev, "Failed to setup interrupt\n");
 548                 goto err_out_disable_msi;
 549         }
 550
 551         err = qlcnic_83xx_setup_mbx_intr(adapter);
 552         if (err)
 553                 goto err_out_disable_msi;
 554
 555         err = qlcnic_sriov_init(adapter, 1);
 556         if (err)
 557                 goto err_out_disable_mbx_intr;
 558
 559         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
 560         if (err)
 561                 goto err_out_cleanup_sriov;
 562
 563         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
 564         if (err)
 565                 goto err_out_disable_bc_intr;
 566
 567         err = qlcnic_sriov_vf_init_driver(adapter);
 568         if (err)
 569                 goto err_out_send_channel_term;
 570
 571         err = qlcnic_sriov_get_vf_acl(adapter);
 572         if (err)
 573                 goto err_out_send_channel_term;
 574
 575         err = qlcnic_setup_netdev(adapter, adapter->netdev, pci_using_dac);
 576         if (err)
 577                 goto err_out_send_channel_term;
 578
 579         pci_set_drvdata(adapter->pdev, adapter);
 580         dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n",
 581                  adapter->netdev->name);
 582
 583         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
 584                              adapter->ahw->idc.delay);
 585         return 0;
 586
 587 err_out_send_channel_term:
 588         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 589
 590 err_out_disable_bc_intr:
 591         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 592
 593 err_out_cleanup_sriov:
 594         __qlcnic_sriov_cleanup(adapter);
 595
 596 err_out_disable_mbx_intr:
 597         qlcnic_83xx_free_mbx_intr(adapter);
 598
 599 err_out_disable_msi:
 600         qlcnic_teardown_intr(adapter);
 601         return err;
 602 }
 603
 604 static int qlcnic_sriov_check_dev_ready(struct qlcnic_adapter *adapter)
 605 {
 606         u32 state;
 607
 608         do {
 609                 msleep(20);
 610                 if (++adapter->fw_fail_cnt > QLC_BC_CMD_MAX_RETRY_CNT)
 611                         return -EIO;
 612                 state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
 613         } while (state != QLC_83XX_IDC_DEV_READY);
 614
 615         return 0;
 616 }
 617
 618 int qlcnic_sriov_vf_init(struct qlcnic_adapter *adapter, int pci_using_dac)
 619 {
 620         struct qlcnic_hardware_context *ahw = adapter->ahw;
 621         int err;
 622
 623         set_bit(QLC_83XX_MODULE_LOADED, &ahw->idc.status);
 624         ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
 625         ahw->reset_context = 0;
 626         adapter->fw_fail_cnt = 0;
 627         ahw->msix_supported = 1;
 628         adapter->need_fw_reset = 0;
 629         adapter->flags |= QLCNIC_TX_INTR_SHARED;
 630
 631         err = qlcnic_sriov_check_dev_ready(adapter);
 632         if (err)
 633                 return err;
 634
 635         err = qlcnic_sriov_setup_vf(adapter, pci_using_dac);
 636         if (err)
 637                 return err;
 638
 639         if (qlcnic_read_mac_addr(adapter))
 640                 dev_warn(&adapter->pdev->dev, "failed to read mac addr\n");
 641
 642         INIT_DELAYED_WORK(&adapter->idc_aen_work, qlcnic_83xx_idc_aen_work);
 643
 644         clear_bit(__QLCNIC_RESETTING, &adapter->state);
 645         return 0;
 646 }
 647
 648 void qlcnic_sriov_vf_set_ops(struct qlcnic_adapter *adapter)
 649 {
 650         struct qlcnic_hardware_context *ahw = adapter->ahw;
 651
 652         ahw->op_mode = QLCNIC_SRIOV_VF_FUNC;
 653         dev_info(&adapter->pdev->dev,
 654                  "HAL Version: %d Non Privileged SRIOV function\n",
 655                  ahw->fw_hal_version);
 656         adapter->nic_ops = &qlcnic_sriov_vf_ops;
 657         set_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state);
 658         return;
 659 }
 660
 661 void qlcnic_sriov_vf_register_map(struct qlcnic_hardware_context *ahw)
 662 {
 663         ahw->hw_ops             = &qlcnic_sriov_vf_hw_ops;
 664         ahw->reg_tbl            = (u32 *)qlcnic_83xx_reg_tbl;
 665         ahw->ext_reg_tbl        = (u32 *)qlcnic_83xx_ext_reg_tbl;
 666 }
 667
 668 static u32 qlcnic_sriov_get_bc_paysize(u32 real_pay_size, u8 curr_frag)
 669 {
 670         u32 pay_size;
 671
 672         pay_size = real_pay_size / ((curr_frag + 1) * QLC_BC_PAYLOAD_SZ);
 673
 674         if (pay_size)
 675                 pay_size = QLC_BC_PAYLOAD_SZ;
 676         else
 677                 pay_size = real_pay_size % QLC_BC_PAYLOAD_SZ;
 678
 679         return pay_size;
 680 }
 681
 682 int qlcnic_sriov_func_to_index(struct qlcnic_adapter *adapter, u8 pci_func)
 683 {
 684         struct qlcnic_vf_info *vf_info = adapter->ahw->sriov->vf_info;
 685         u8 i;
 686
 687         if (qlcnic_sriov_vf_check(adapter))
 688                 return 0;
 689
 690         for (i = 0; i < adapter->ahw->sriov->num_vfs; i++) {
 691                 if (vf_info[i].pci_func == pci_func)
 692                         return i;
 693         }
 694
 695         return -EINVAL;
 696 }
 697
 698 static inline int qlcnic_sriov_alloc_bc_trans(struct qlcnic_bc_trans **trans)
 699 {
 700         *trans = kzalloc(sizeof(struct qlcnic_bc_trans), GFP_ATOMIC);
 701         if (!*trans)
 702                 return -ENOMEM;
 703
 704         init_completion(&(*trans)->resp_cmpl);
 705         return 0;
 706 }
 707
 708 static inline int qlcnic_sriov_alloc_bc_msg(struct qlcnic_bc_hdr **hdr,
 709                                             u32 size)
 710 {
 711         *hdr = kcalloc(size, sizeof(struct qlcnic_bc_hdr), GFP_ATOMIC);
 712         if (!*hdr)
 713                 return -ENOMEM;
 714
 715         return 0;
 716 }
 717
 718 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *mbx, u32 type)
 719 {
 720         const struct qlcnic_mailbox_metadata *mbx_tbl;
 721         int i, size;
 722
 723         mbx_tbl = qlcnic_sriov_bc_mbx_tbl;
 724         size = ARRAY_SIZE(qlcnic_sriov_bc_mbx_tbl);
 725
 726         for (i = 0; i < size; i++) {
 727                 if (type == mbx_tbl[i].cmd) {
 728                         mbx->op_type = QLC_BC_CMD;
 729                         mbx->req.num = mbx_tbl[i].in_args;
 730                         mbx->rsp.num = mbx_tbl[i].out_args;
 731                         mbx->req.arg = kcalloc(mbx->req.num, sizeof(u32),
 732                                                GFP_ATOMIC);
 733                         if (!mbx->req.arg)
 734                                 return -ENOMEM;
 735                         mbx->rsp.arg = kcalloc(mbx->rsp.num, sizeof(u32),
 736                                                GFP_ATOMIC);
 737                         if (!mbx->rsp.arg) {
 738                                 kfree(mbx->req.arg);
 739                                 mbx->req.arg = NULL;
 740                                 return -ENOMEM;
 741                         }
 742                         mbx->req.arg[0] = (type | (mbx->req.num << 16) |
 743                                            (3 << 29));
 744                         mbx->rsp.arg[0] = (type & 0xffff) | mbx->rsp.num << 16;
 745                         return 0;
 746                 }
 747         }
 748         return -EINVAL;
 749 }
 750
 751 static int qlcnic_sriov_prepare_bc_hdr(struct qlcnic_bc_trans *trans,
 752                                        struct qlcnic_cmd_args *cmd,
 753                                        u16 seq, u8 msg_type)
 754 {
 755         struct qlcnic_bc_hdr *hdr;
 756         int i;
 757         u32 num_regs, bc_pay_sz;
 758         u16 remainder;
 759         u8 cmd_op, num_frags, t_num_frags;
 760
 761         bc_pay_sz = QLC_BC_PAYLOAD_SZ;
 762         if (msg_type == QLC_BC_COMMAND) {
 763                 trans->req_pay = (struct qlcnic_bc_payload *)cmd->req.arg;
 764                 trans->rsp_pay = (struct qlcnic_bc_payload *)cmd->rsp.arg;
 765                 num_regs = cmd->req.num;
 766                 trans->req_pay_size = (num_regs * 4);
 767                 num_regs = cmd->rsp.num;
 768                 trans->rsp_pay_size = (num_regs * 4);
 769                 cmd_op = cmd->req.arg[0] & 0xff;
 770                 remainder = (trans->req_pay_size) % (bc_pay_sz);
 771                 num_frags = (trans->req_pay_size) / (bc_pay_sz);
 772                 if (remainder)
 773                         num_frags++;
 774                 t_num_frags = num_frags;
 775                 if (qlcnic_sriov_alloc_bc_msg(&trans->req_hdr, num_frags))
 776                         return -ENOMEM;
 777                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 778                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 779                 if (remainder)
 780                         num_frags++;
 781                 if (qlcnic_sriov_alloc_bc_msg(&trans->rsp_hdr, num_frags))
 782                         return -ENOMEM;
 783                 num_frags  = t_num_frags;
 784                 hdr = trans->req_hdr;
 785         }  else {
 786                 cmd->req.arg = (u32 *)trans->req_pay;
 787                 cmd->rsp.arg = (u32 *)trans->rsp_pay;
 788                 cmd_op = cmd->req.arg[0] & 0xff;
 789                 cmd->cmd_op = cmd_op;
 790                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 791                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 792                 if (remainder)
 793                         num_frags++;
 794                 cmd->req.num = trans->req_pay_size / 4;
 795                 cmd->rsp.num = trans->rsp_pay_size / 4;
 796                 hdr = trans->rsp_hdr;
 797                 cmd->op_type = trans->req_hdr->op_type;
 798         }
 799
 800         trans->trans_id = seq;
 801         trans->cmd_id = cmd_op;
 802         for (i = 0; i < num_frags; i++) {
 803                 hdr[i].version = 2;
 804                 hdr[i].msg_type = msg_type;
 805                 hdr[i].op_type = cmd->op_type;
 806                 hdr[i].num_cmds = 1;
 807                 hdr[i].num_frags = num_frags;
 808                 hdr[i].frag_num = i + 1;
 809                 hdr[i].cmd_op = cmd_op;
 810                 hdr[i].seq_id = seq;
 811         }
 812         return 0;
 813 }
 814
 815 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *trans)
 816 {
 817         if (!trans)
 818                 return;
 819         kfree(trans->req_hdr);
 820         kfree(trans->rsp_hdr);
 821         kfree(trans);
 822 }
 823
 824 static int qlcnic_sriov_clear_trans(struct qlcnic_vf_info *vf,
 825                                     struct qlcnic_bc_trans *trans, u8 type)
 826 {
 827         struct qlcnic_trans_list *t_list;
 828         unsigned long flags;
 829         int ret = 0;
 830
 831         if (type == QLC_BC_RESPONSE) {
 832                 t_list = &vf->rcv_act;
 833                 spin_lock_irqsave(&t_list->lock, flags);
 834                 t_list->count--;
 835                 list_del(&trans->list);
 836                 if (t_list->count > 0)
 837                         ret = 1;
 838                 spin_unlock_irqrestore(&t_list->lock, flags);
 839         }
 840         if (type == QLC_BC_COMMAND) {
 841                 while (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
 842                         msleep(100);
 843                 vf->send_cmd = NULL;
 844                 clear_bit(QLC_BC_VF_SEND, &vf->state);
 845         }
 846         return ret;
 847 }
 848
 849 static void qlcnic_sriov_schedule_bc_cmd(struct qlcnic_sriov *sriov,
 850                                          struct qlcnic_vf_info *vf,
 851                                          work_func_t func)
 852 {
 853         if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 854             vf->adapter->need_fw_reset)
 855                 return;
 856
 857         queue_work(sriov->bc.bc_trans_wq, &vf->trans_work);
 858 }
 859
 860 static inline void qlcnic_sriov_wait_for_resp(struct qlcnic_bc_trans *trans)
 861 {
 862         struct completion *cmpl = &trans->resp_cmpl;
 863
 864         if (wait_for_completion_timeout(cmpl, QLC_MBOX_RESP_TIMEOUT))
 865                 trans->trans_state = QLC_END;
 866         else
 867                 trans->trans_state = QLC_ABORT;
 868
 869         return;
 870 }
 871
 872 static void qlcnic_sriov_handle_multi_frags(struct qlcnic_bc_trans *trans,
 873                                             u8 type)
 874 {
 875         if (type == QLC_BC_RESPONSE) {
 876                 trans->curr_rsp_frag++;
 877                 if (trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
 878                         trans->trans_state = QLC_INIT;
 879                 else
 880                         trans->trans_state = QLC_END;
 881         } else {
 882                 trans->curr_req_frag++;
 883                 if (trans->curr_req_frag < trans->req_hdr->num_frags)
 884                         trans->trans_state = QLC_INIT;
 885                 else
 886                         trans->trans_state = QLC_WAIT_FOR_RESP;
 887         }
 888 }
 889
 890 static void qlcnic_sriov_wait_for_channel_free(struct qlcnic_bc_trans *trans,
 891                                                u8 type)
 892 {
 893         struct qlcnic_vf_info *vf = trans->vf;
 894         struct completion *cmpl = &vf->ch_free_cmpl;
 895
 896         if (!wait_for_completion_timeout(cmpl, QLC_MBOX_CH_FREE_TIMEOUT)) {
 897                 trans->trans_state = QLC_ABORT;
 898                 return;
 899         }
 900
 901         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 902         qlcnic_sriov_handle_multi_frags(trans, type);
 903 }
 904
 905 static void qlcnic_sriov_pull_bc_msg(struct qlcnic_adapter *adapter,
 906                                      u32 *hdr, u32 *pay, u32 size)
 907 {
 908         struct qlcnic_hardware_context *ahw = adapter->ahw;
 909         u32 fw_mbx;
 910         u8 i, max = 2, hdr_size, j;
 911
 912         hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 913         max = (size / sizeof(u32)) + hdr_size;
 914
 915         fw_mbx = readl(QLCNIC_MBX_FW(ahw, 0));
 916         for (i = 2, j = 0; j < hdr_size; i++, j++)
 917                 *(hdr++) = readl(QLCNIC_MBX_FW(ahw, i));
 918         for (; j < max; i++, j++)
 919                 *(pay++) = readl(QLCNIC_MBX_FW(ahw, i));
 920 }
 921
 922 static int __qlcnic_sriov_issue_bc_post(struct qlcnic_vf_info *vf)
 923 {
 924         int ret = -EBUSY;
 925         u32 timeout = 10000;
 926
 927         do {
 928                 if (!test_and_set_bit(QLC_BC_VF_CHANNEL, &vf->state)) {
 929                         ret = 0;
 930                         break;
 931                 }
 932                 mdelay(1);
 933         } while (--timeout);
 934
 935         return ret;
 936 }
 937
 938 static int qlcnic_sriov_issue_bc_post(struct qlcnic_bc_trans *trans, u8 type)
 939 {
 940         struct qlcnic_vf_info *vf = trans->vf;
 941         u32 pay_size, hdr_size;
 942         u32 *hdr, *pay;
 943         int ret;
 944         u8 pci_func = trans->func_id;
 945
 946         if (__qlcnic_sriov_issue_bc_post(vf))
 947                 return -EBUSY;
 948
 949         if (type == QLC_BC_COMMAND) {
 950                 hdr = (u32 *)(trans->req_hdr + trans->curr_req_frag);
 951                 pay = (u32 *)(trans->req_pay + trans->curr_req_frag);
 952                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 953                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
 954                                                        trans->curr_req_frag);
 955                 pay_size = (pay_size / sizeof(u32));
 956         } else {
 957                 hdr = (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag);
 958                 pay = (u32 *)(trans->rsp_pay + trans->curr_rsp_frag);
 959                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 960                 pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
 961                                                        trans->curr_rsp_frag);
 962                 pay_size = (pay_size / sizeof(u32));
 963         }
 964
 965         ret = qlcnic_sriov_post_bc_msg(vf->adapter, hdr, pay,
 966                                        pci_func, pay_size);
 967         return ret;
 968 }
 969
 970 static int __qlcnic_sriov_send_bc_msg(struct qlcnic_bc_trans *trans,
 971                                       struct qlcnic_vf_info *vf, u8 type)
 972 {
 973         bool flag = true;
 974         int err = -EIO;
 975
 976         while (flag) {
 977                 if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 978                     vf->adapter->need_fw_reset)
 979                         trans->trans_state = QLC_ABORT;
 980
 981                 switch (trans->trans_state) {
 982                 case QLC_INIT:
 983                         trans->trans_state = QLC_WAIT_FOR_CHANNEL_FREE;
 984                         if (qlcnic_sriov_issue_bc_post(trans, type))
 985                                 trans->trans_state = QLC_ABORT;
 986                         break;
 987                 case QLC_WAIT_FOR_CHANNEL_FREE:
 988                         qlcnic_sriov_wait_for_channel_free(trans, type);
 989                         break;
 990                 case QLC_WAIT_FOR_RESP:
 991                         qlcnic_sriov_wait_for_resp(trans);
 992                         break;
 993                 case QLC_END:
 994                         err = 0;
 995                         flag = false;
 996                         break;
 997                 case QLC_ABORT:
 998                         err = -EIO;
 999                         flag = false;
1000                         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
1001                         break;
1002                 default:
1003                         err = -EIO;
1004                         flag = false;
1005                 }
1006         }
1007         return err;
1008 }
1009
1010 static int qlcnic_sriov_send_bc_cmd(struct qlcnic_adapter *adapter,
1011                                     struct qlcnic_bc_trans *trans, int pci_func)
1012 {
1013         struct qlcnic_vf_info *vf;
1014         int err, index = qlcnic_sriov_func_to_index(adapter, pci_func);
1015
1016         if (index < 0)
1017                 return -EIO;
1018
1019         vf = &adapter->ahw->sriov->vf_info[index];
1020         trans->vf = vf;
1021         trans->func_id = pci_func;
1022
1023         if (!test_bit(QLC_BC_VF_STATE, &vf->state)) {
1024                 if (qlcnic_sriov_pf_check(adapter))
1025                         return -EIO;
1026                 if (qlcnic_sriov_vf_check(adapter) &&
1027                     trans->cmd_id != QLCNIC_BC_CMD_CHANNEL_INIT)
1028                         return -EIO;
1029         }
1030
1031         mutex_lock(&vf->send_cmd_lock);
1032         vf->send_cmd = trans;
1033         err = __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_COMMAND);
1034         qlcnic_sriov_clear_trans(vf, trans, QLC_BC_COMMAND);
1035         mutex_unlock(&vf->send_cmd_lock);
1036         return err;
1037 }
1038
1039 static void __qlcnic_sriov_process_bc_cmd(struct qlcnic_adapter *adapter,
1040                                           struct qlcnic_bc_trans *trans,
1041                                           struct qlcnic_cmd_args *cmd)
1042 {
1043 #ifdef CONFIG_QLCNIC_SRIOV
1044         if (qlcnic_sriov_pf_check(adapter)) {
1045                 qlcnic_sriov_pf_process_bc_cmd(adapter, trans, cmd);
1046                 return;
1047         }
1048 #endif
1049         cmd->rsp.arg[0] |= (0x9 << 25);
1050         return;
1051 }
1052
1053 static void qlcnic_sriov_process_bc_cmd(struct work_struct *work)
1054 {
1055         struct qlcnic_vf_info *vf = container_of(work, struct qlcnic_vf_info,
1056                                                  trans_work);
1057         struct qlcnic_bc_trans *trans = NULL;
1058         struct qlcnic_adapter *adapter  = vf->adapter;
1059         struct qlcnic_cmd_args cmd;
1060         u8 req;
1061
1062         if (adapter->need_fw_reset)
1063                 return;
1064
1065         if (test_bit(QLC_BC_VF_FLR, &vf->state))
1066                 return;
1067
1068         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
1069         trans = list_first_entry(&vf->rcv_act.wait_list,
1070                                  struct qlcnic_bc_trans, list);
1071         adapter = vf->adapter;
1072
1073         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, trans->req_hdr->seq_id,
1074                                         QLC_BC_RESPONSE))
1075                 goto cleanup_trans;
1076
1077         __qlcnic_sriov_process_bc_cmd(adapter, trans, &cmd);
1078         trans->trans_state = QLC_INIT;
1079         __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_RESPONSE);
1080
1081 cleanup_trans:
1082         qlcnic_free_mbx_args(&cmd);
1083         req = qlcnic_sriov_clear_trans(vf, trans, QLC_BC_RESPONSE);
1084         qlcnic_sriov_cleanup_transaction(trans);
1085         if (req)
1086                 qlcnic_sriov_schedule_bc_cmd(adapter->ahw->sriov, vf,
1087                                              qlcnic_sriov_process_bc_cmd);
1088 }
1089
1090 static void qlcnic_sriov_handle_bc_resp(struct qlcnic_bc_hdr *hdr,
1091                                         struct qlcnic_vf_info *vf)
1092 {
1093         struct qlcnic_bc_trans *trans;
1094         u32 pay_size;
1095
1096         if (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
1097                 return;
1098
1099         trans = vf->send_cmd;
1100
1101         if (trans == NULL)
1102                 goto clear_send;
1103
1104         if (trans->trans_id != hdr->seq_id)
1105                 goto clear_send;
1106
1107         pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
1108                                                trans->curr_rsp_frag);
1109         qlcnic_sriov_pull_bc_msg(vf->adapter,
1110                                  (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag),
1111                                  (u32 *)(trans->rsp_pay + trans->curr_rsp_frag),
1112                                  pay_size);
1113         if (++trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
1114                 goto clear_send;
1115
1116         complete(&trans->resp_cmpl);
1117
1118 clear_send:
1119         clear_bit(QLC_BC_VF_SEND, &vf->state);
1120 }
1121
1122 int __qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1123                                 struct qlcnic_vf_info *vf,
1124                                 struct qlcnic_bc_trans *trans)
1125 {
1126         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1127
1128         t_list->count++;
1129         list_add_tail(&trans->list, &t_list->wait_list);
1130         if (t_list->count == 1)
1131                 qlcnic_sriov_schedule_bc_cmd(sriov, vf,
1132                                              qlcnic_sriov_process_bc_cmd);
1133         return 0;
1134 }
1135
1136 static int qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1137                                      struct qlcnic_vf_info *vf,
1138                                      struct qlcnic_bc_trans *trans)
1139 {
1140         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1141
1142         spin_lock(&t_list->lock);
1143
1144         __qlcnic_sriov_add_act_list(sriov, vf, trans);
1145
1146         spin_unlock(&t_list->lock);
1147         return 0;
1148 }
1149
1150 static void qlcnic_sriov_handle_pending_trans(struct qlcnic_sriov *sriov,
1151                                               struct qlcnic_vf_info *vf,
1152                                               struct qlcnic_bc_hdr *hdr)
1153 {
1154         struct qlcnic_bc_trans *trans = NULL;
1155         struct list_head *node;
1156         u32 pay_size, curr_frag;
1157         u8 found = 0, active = 0;
1158
1159         spin_lock(&vf->rcv_pend.lock);
1160         if (vf->rcv_pend.count > 0) {
1161                 list_for_each(node, &vf->rcv_pend.wait_list) {
1162                         trans = list_entry(node, struct qlcnic_bc_trans, list);
1163                         if (trans->trans_id == hdr->seq_id) {
1164                                 found = 1;
1165                                 break;
1166                         }
1167                 }
1168         }
1169
1170         if (found) {
1171                 curr_frag = trans->curr_req_frag;
1172                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1173                                                        curr_frag);
1174                 qlcnic_sriov_pull_bc_msg(vf->adapter,
1175                                          (u32 *)(trans->req_hdr + curr_frag),
1176                                          (u32 *)(trans->req_pay + curr_frag),
1177                                          pay_size);
1178                 trans->curr_req_frag++;
1179                 if (trans->curr_req_frag >= hdr->num_frags) {
1180                         vf->rcv_pend.count--;
1181                         list_del(&trans->list);
1182                         active = 1;
1183                 }
1184         }
1185         spin_unlock(&vf->rcv_pend.lock);
1186
1187         if (active)
1188                 if (qlcnic_sriov_add_act_list(sriov, vf, trans))
1189                         qlcnic_sriov_cleanup_transaction(trans);
1190
1191         return;
1192 }
1193
1194 static void qlcnic_sriov_handle_bc_cmd(struct qlcnic_sriov *sriov,
1195                                        struct qlcnic_bc_hdr *hdr,
1196                                        struct qlcnic_vf_info *vf)
1197 {
1198         struct qlcnic_bc_trans *trans;
1199         struct qlcnic_adapter *adapter = vf->adapter;
1200         struct qlcnic_cmd_args cmd;
1201         u32 pay_size;
1202         int err;
1203         u8 cmd_op;
1204
1205         if (adapter->need_fw_reset)
1206                 return;
1207
1208         if (!test_bit(QLC_BC_VF_STATE, &vf->state) &&
1209             hdr->op_type != QLC_BC_CMD &&
1210             hdr->cmd_op != QLCNIC_BC_CMD_CHANNEL_INIT)
1211                 return;
1212
1213         if (hdr->frag_num > 1) {
1214                 qlcnic_sriov_handle_pending_trans(sriov, vf, hdr);
1215                 return;
1216         }
1217
1218         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
1219         cmd_op = hdr->cmd_op;
1220         if (qlcnic_sriov_alloc_bc_trans(&trans))
1221                 return;
1222
1223         if (hdr->op_type == QLC_BC_CMD)
1224                 err = qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op);
1225         else
1226                 err = qlcnic_alloc_mbx_args(&cmd, adapter, cmd_op);
1227
1228         if (err) {
1229                 qlcnic_sriov_cleanup_transaction(trans);
1230                 return;
1231         }
1232
1233         cmd.op_type = hdr->op_type;
1234         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, hdr->seq_id,
1235                                         QLC_BC_COMMAND)) {
1236                 qlcnic_free_mbx_args(&cmd);
1237                 qlcnic_sriov_cleanup_transaction(trans);
1238                 return;
1239         }
1240
1241         pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1242                                          trans->curr_req_frag);
1243         qlcnic_sriov_pull_bc_msg(vf->adapter,
1244                                  (u32 *)(trans->req_hdr + trans->curr_req_frag),
1245                                  (u32 *)(trans->req_pay + trans->curr_req_frag),
1246                                  pay_size);
1247         trans->func_id = vf->pci_func;
1248         trans->vf = vf;
1249         trans->trans_id = hdr->seq_id;
1250         trans->curr_req_frag++;
1251
1252         if (qlcnic_sriov_soft_flr_check(adapter, trans, vf))
1253                 return;
1254
1255         if (trans->curr_req_frag == trans->req_hdr->num_frags) {
1256                 if (qlcnic_sriov_add_act_list(sriov, vf, trans)) {
1257                         qlcnic_free_mbx_args(&cmd);
1258                         qlcnic_sriov_cleanup_transaction(trans);
1259                 }
1260         } else {
1261                 spin_lock(&vf->rcv_pend.lock);
1262                 list_add_tail(&trans->list, &vf->rcv_pend.wait_list);
1263                 vf->rcv_pend.count++;
1264                 spin_unlock(&vf->rcv_pend.lock);
1265         }
1266 }
1267
1268 static void qlcnic_sriov_handle_msg_event(struct qlcnic_sriov *sriov,
1269                                           struct qlcnic_vf_info *vf)
1270 {
1271         struct qlcnic_bc_hdr hdr;
1272         u32 *ptr = (u32 *)&hdr;
1273         u8 msg_type, i;
1274
1275         for (i = 2; i < 6; i++)
1276                 ptr[i - 2] = readl(QLCNIC_MBX_FW(vf->adapter->ahw, i));
1277         msg_type = hdr.msg_type;
1278
1279         switch (msg_type) {
1280         case QLC_BC_COMMAND:
1281                 qlcnic_sriov_handle_bc_cmd(sriov, &hdr, vf);
1282                 break;
1283         case QLC_BC_RESPONSE:
1284                 qlcnic_sriov_handle_bc_resp(&hdr, vf);
1285                 break;
1286         }
1287 }
1288
1289 static void qlcnic_sriov_handle_flr_event(struct qlcnic_sriov *sriov,
1290                                           struct qlcnic_vf_info *vf)
1291 {
1292         struct qlcnic_adapter *adapter = vf->adapter;
1293
1294         if (qlcnic_sriov_pf_check(adapter))
1295                 qlcnic_sriov_pf_handle_flr(sriov, vf);
1296         else
1297                 dev_err(&adapter->pdev->dev,
1298                         "Invalid event to VF. VF should not get FLR event\n");
1299 }
1300
1301 void qlcnic_sriov_handle_bc_event(struct qlcnic_adapter *adapter, u32 event)
1302 {
1303         struct qlcnic_vf_info *vf;
1304         struct qlcnic_sriov *sriov;
1305         int index;
1306         u8 pci_func;
1307
1308         sriov = adapter->ahw->sriov;
1309         pci_func = qlcnic_sriov_target_func_id(event);
1310         index = qlcnic_sriov_func_to_index(adapter, pci_func);
1311
1312         if (index < 0)
1313                 return;
1314
1315         vf = &sriov->vf_info[index];
1316         vf->pci_func = pci_func;
1317
1318         if (qlcnic_sriov_channel_free_check(event))
1319                 complete(&vf->ch_free_cmpl);
1320
1321         if (qlcnic_sriov_flr_check(event)) {
1322                 qlcnic_sriov_handle_flr_event(sriov, vf);
1323                 return;
1324         }
1325
1326         if (qlcnic_sriov_bc_msg_check(event))
1327                 qlcnic_sriov_handle_msg_event(sriov, vf);
1328 }
1329
1330 int qlcnic_sriov_cfg_bc_intr(struct qlcnic_adapter *adapter, u8 enable)
1331 {
1332         struct qlcnic_cmd_args cmd;
1333         int err;
1334
1335         if (!test_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state))
1336                 return 0;
1337
1338         if (qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_BC_EVENT_SETUP))
1339                 return -ENOMEM;
1340
1341         if (enable)
1342                 cmd.req.arg[1] = (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7);
1343
1344         err = qlcnic_83xx_issue_cmd(adapter, &cmd);
1345
1346         if (err != QLCNIC_RCODE_SUCCESS) {
1347                 dev_err(&adapter->pdev->dev,
1348                         "Failed to %s bc events, err=%d\n",
1349                         (enable ? "enable" : "disable"), err);
1350         }
1351
1352         qlcnic_free_mbx_args(&cmd);
1353         return err;
1354 }
1355
1356 static int qlcnic_sriov_retry_bc_cmd(struct qlcnic_adapter *adapter,
1357                                      struct qlcnic_bc_trans *trans)
1358 {
1359         u8 max = QLC_BC_CMD_MAX_RETRY_CNT;
1360         u32 state;
1361
1362         state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1363         if (state == QLC_83XX_IDC_DEV_READY) {
1364                 msleep(20);
1365                 clear_bit(QLC_BC_VF_CHANNEL, &trans->vf->state);
1366                 trans->trans_state = QLC_INIT;
1367                 if (++adapter->fw_fail_cnt > max)
1368                         return -EIO;
1369                 else
1370                         return 0;
1371         }
1372
1373         return -EIO;
1374 }
1375
1376 static int __qlcnic_sriov_issue_cmd(struct qlcnic_adapter *adapter,
1377                                   struct qlcnic_cmd_args *cmd)
1378 {
1379         struct qlcnic_hardware_context *ahw = adapter->ahw;
1380         struct qlcnic_mailbox *mbx = ahw->mailbox;
1381         struct device *dev = &adapter->pdev->dev;
1382         struct qlcnic_bc_trans *trans;
1383         int err;
1384         u32 rsp_data, opcode, mbx_err_code, rsp;
1385         u16 seq = ++adapter->ahw->sriov->bc.trans_counter;
1386         u8 func = ahw->pci_func;
1387
1388         rsp = qlcnic_sriov_alloc_bc_trans(&trans);
1389         if (rsp)
1390                 goto free_cmd;
1391
1392         rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND);
1393         if (rsp)
1394                 goto cleanup_transaction;
1395
1396 retry:
1397         if (!test_bit(QLC_83XX_MBX_READY, &mbx->status)) {
1398                 rsp = -EIO;
1399                 QLCDB(adapter, DRV, "MBX not Ready!(cmd 0x%x) for VF 0x%x\n",
1400                       QLCNIC_MBX_RSP(cmd->req.arg[0]), func);
1401                 goto err_out;
1402         }
1403
1404         err = qlcnic_sriov_send_bc_cmd(adapter, trans, func);
1405         if (err) {
1406                 dev_err(dev, "MBX command 0x%x timed out for VF %d\n",
1407                         (cmd->req.arg[0] & 0xffff), func);
1408                 rsp = QLCNIC_RCODE_TIMEOUT;
1409
1410                 /* After adapter reset PF driver may take some time to
1411                  * respond to VF's request. Retry request till maximum retries.
1412                  */
1413                 if ((trans->req_hdr->cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT) &&
1414                     !qlcnic_sriov_retry_bc_cmd(adapter, trans))
1415                         goto retry;
1416
1417                 goto err_out;
1418         }
1419
1420         rsp_data = cmd->rsp.arg[0];
1421         mbx_err_code = QLCNIC_MBX_STATUS(rsp_data);
1422         opcode = QLCNIC_MBX_RSP(cmd->req.arg[0]);
1423
1424         if ((mbx_err_code == QLCNIC_MBX_RSP_OK) ||
1425             (mbx_err_code == QLCNIC_MBX_PORT_RSP_OK)) {
1426                 rsp = QLCNIC_RCODE_SUCCESS;
1427         } else {
1428                 if (cmd->type == QLC_83XX_MBX_CMD_NO_WAIT) {
1429                         rsp = QLCNIC_RCODE_SUCCESS;
1430                 } else {
1431                         rsp = mbx_err_code;
1432                         if (!rsp)
1433                                 rsp = 1;
1434
1435                         dev_err(dev,
1436                                 "MBX command 0x%x failed with err:0x%x for VF %d\n",
1437                                 opcode, mbx_err_code, func);
1438                 }
1439         }
1440
1441 err_out:
1442         if (rsp == QLCNIC_RCODE_TIMEOUT) {
1443                 ahw->reset_context = 1;
1444                 adapter->need_fw_reset = 1;
1445                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1446         }
1447
1448 cleanup_transaction:
1449         qlcnic_sriov_cleanup_transaction(trans);
1450
1451 free_cmd:
1452         if (cmd->type == QLC_83XX_MBX_CMD_NO_WAIT) {
1453                 qlcnic_free_mbx_args(cmd);
1454                 kfree(cmd);
1455         }
1456
1457         return rsp;
1458 }
1459
1460
1461 static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *adapter,
1462                                   struct qlcnic_cmd_args *cmd)
1463 {
1464         if (cmd->type == QLC_83XX_MBX_CMD_NO_WAIT)
1465                 return qlcnic_sriov_async_issue_cmd(adapter, cmd);
1466         else
1467                 return __qlcnic_sriov_issue_cmd(adapter, cmd);
1468 }
1469
1470 static int qlcnic_sriov_channel_cfg_cmd(struct qlcnic_adapter *adapter, u8 cmd_op)
1471 {
1472         struct qlcnic_cmd_args cmd;
1473         struct qlcnic_vf_info *vf = &adapter->ahw->sriov->vf_info[0];
1474         int ret;
1475
1476         memset(&cmd, 0, sizeof(cmd));
1477         if (qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op))
1478                 return -ENOMEM;
1479
1480         ret = qlcnic_issue_cmd(adapter, &cmd);
1481         if (ret) {
1482                 dev_err(&adapter->pdev->dev,
1483                         "Failed bc channel %s %d\n", cmd_op ? "term" : "init",
1484                         ret);
1485                 goto out;
1486         }
1487
1488         cmd_op = (cmd.rsp.arg[0] & 0xff);
1489         if (cmd.rsp.arg[0] >> 25 == 2)
1490                 return 2;
1491         if (cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT)
1492                 set_bit(QLC_BC_VF_STATE, &vf->state);
1493         else
1494                 clear_bit(QLC_BC_VF_STATE, &vf->state);
1495
1496 out:
1497         qlcnic_free_mbx_args(&cmd);
1498         return ret;
1499 }
1500
1501 static void qlcnic_vf_add_mc_list(struct net_device *netdev, const u8 *mac,
1502                                   enum qlcnic_mac_type mac_type)
1503 {
1504         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1505         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
1506         struct qlcnic_vf_info *vf;
1507         u16 vlan_id;
1508         int i;
1509
1510         vf = &adapter->ahw->sriov->vf_info[0];
1511
1512         if (!qlcnic_sriov_check_any_vlan(vf)) {
1513                 qlcnic_nic_add_mac(adapter, mac, 0, mac_type);
1514         } else {
1515                 spin_lock(&vf->vlan_list_lock);
1516                 for (i = 0; i < sriov->num_allowed_vlans; i++) {
1517                         vlan_id = vf->sriov_vlans[i];
1518                         if (vlan_id)
1519                                 qlcnic_nic_add_mac(adapter, mac, vlan_id,
1520                                                    mac_type);
1521                 }
1522                 spin_unlock(&vf->vlan_list_lock);
1523                 if (qlcnic_84xx_check(adapter))
1524                         qlcnic_nic_add_mac(adapter, mac, 0, mac_type);
1525         }
1526 }
1527
1528 void qlcnic_sriov_cleanup_async_list(struct qlcnic_back_channel *bc)
1529 {
1530         struct list_head *head = &bc->async_cmd_list;
1531         struct qlcnic_async_cmd *entry;
1532
1533         flush_workqueue(bc->bc_async_wq);
1534         cancel_work_sync(&bc->vf_async_work);
1535
1536         spin_lock(&bc->queue_lock);
1537         while (!list_empty(head)) {
1538                 entry = list_entry(head->next, struct qlcnic_async_cmd,
1539                                    list);
1540                 list_del(&entry->list);
1541                 kfree(entry->cmd);
1542                 kfree(entry);
1543         }
1544         spin_unlock(&bc->queue_lock);
1545 }
1546
1547 void qlcnic_sriov_vf_set_multi(struct net_device *netdev)
1548 {
1549         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1550         struct qlcnic_hardware_context *ahw = adapter->ahw;
1551         static const u8 bcast_addr[ETH_ALEN] = {
1552                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
1553         };
1554         struct netdev_hw_addr *ha;
1555         u32 mode = VPORT_MISS_MODE_DROP;
1556
1557         if (!test_bit(__QLCNIC_FW_ATTACHED, &adapter->state))
1558                 return;
1559
1560         if (netdev->flags & IFF_PROMISC) {
1561                 if (!(adapter->flags & QLCNIC_PROMISC_DISABLED))
1562                         mode = VPORT_MISS_MODE_ACCEPT_ALL;
1563         } else if ((netdev->flags & IFF_ALLMULTI) ||
1564                    (netdev_mc_count(netdev) > ahw->max_mc_count)) {
1565                 mode = VPORT_MISS_MODE_ACCEPT_MULTI;
1566         } else {
1567                 qlcnic_vf_add_mc_list(netdev, bcast_addr, QLCNIC_BROADCAST_MAC);
1568                 if (!netdev_mc_empty(netdev)) {
1569                         qlcnic_flush_mcast_mac(adapter);
1570                         netdev_for_each_mc_addr(ha, netdev)
1571                                 qlcnic_vf_add_mc_list(netdev, ha->addr,
1572                                                       QLCNIC_MULTICAST_MAC);
1573                 }
1574         }
1575
1576         /* configure unicast MAC address, if there is not sufficient space
1577          * to store all the unicast addresses then enable promiscuous mode
1578          */
1579         if (netdev_uc_count(netdev) > ahw->max_uc_count) {
1580                 mode = VPORT_MISS_MODE_ACCEPT_ALL;
1581         } else if (!netdev_uc_empty(netdev)) {
1582                 netdev_for_each_uc_addr(ha, netdev)
1583                         qlcnic_vf_add_mc_list(netdev, ha->addr,
1584                                               QLCNIC_UNICAST_MAC);
1585         }
1586
1587         if (adapter->pdev->is_virtfn) {
1588                 if (mode == VPORT_MISS_MODE_ACCEPT_ALL &&
1589                     !adapter->fdb_mac_learn) {
1590                         qlcnic_alloc_lb_filters_mem(adapter);
1591                         adapter->drv_mac_learn = 1;
1592                         adapter->rx_mac_learn = true;
1593                 } else {
1594                         adapter->drv_mac_learn = 0;
1595                         adapter->rx_mac_learn = false;
1596                 }
1597         }
1598
1599         qlcnic_nic_set_promisc(adapter, mode);
1600 }
1601
1602 static void qlcnic_sriov_handle_async_issue_cmd(struct work_struct *work)
1603 {
1604         struct qlcnic_async_cmd *entry, *tmp;
1605         struct qlcnic_back_channel *bc;
1606         struct qlcnic_cmd_args *cmd;
1607         struct list_head *head;
1608         LIST_HEAD(del_list);
1609
1610         bc = container_of(work, struct qlcnic_back_channel, vf_async_work);
1611         head = &bc->async_cmd_list;
1612
1613         spin_lock(&bc->queue_lock);
1614         list_splice_init(head, &del_list);
1615         spin_unlock(&bc->queue_lock);
1616
1617         list_for_each_entry_safe(entry, tmp, &del_list, list) {
1618                 list_del(&entry->list);
1619                 cmd = entry->cmd;
1620                 __qlcnic_sriov_issue_cmd(bc->adapter, cmd);
1621                 kfree(entry);
1622         }
1623
1624         if (!list_empty(head))
1625                 queue_work(bc->bc_async_wq, &bc->vf_async_work);
1626
1627         return;
1628 }
1629
1630 static struct qlcnic_async_cmd *
1631 qlcnic_sriov_alloc_async_cmd(struct qlcnic_back_channel *bc,
1632                              struct qlcnic_cmd_args *cmd)
1633 {
1634         struct qlcnic_async_cmd *entry = NULL;
1635
1636         entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
1637         if (!entry)
1638                 return NULL;
1639
1640         entry->cmd = cmd;
1641
1642         spin_lock(&bc->queue_lock);
1643         list_add_tail(&entry->list, &bc->async_cmd_list);
1644         spin_unlock(&bc->queue_lock);
1645
1646         return entry;
1647 }
1648
1649 static void qlcnic_sriov_schedule_async_cmd(struct qlcnic_back_channel *bc,
1650                                             struct qlcnic_cmd_args *cmd)
1651 {
1652         struct qlcnic_async_cmd *entry = NULL;
1653
1654         entry = qlcnic_sriov_alloc_async_cmd(bc, cmd);
1655         if (!entry) {
1656                 qlcnic_free_mbx_args(cmd);
1657                 kfree(cmd);
1658                 return;
1659         }
1660
1661         queue_work(bc->bc_async_wq, &bc->vf_async_work);
1662 }
1663
1664 static int qlcnic_sriov_async_issue_cmd(struct qlcnic_adapter *adapter,
1665                                         struct qlcnic_cmd_args *cmd)
1666 {
1667
1668         struct qlcnic_back_channel *bc = &adapter->ahw->sriov->bc;
1669
1670         if (adapter->need_fw_reset)
1671                 return -EIO;
1672
1673         qlcnic_sriov_schedule_async_cmd(bc, cmd);
1674
1675         return 0;
1676 }
1677
1678 static int qlcnic_sriov_vf_reinit_driver(struct qlcnic_adapter *adapter)
1679 {
1680         int err;
1681
1682         adapter->need_fw_reset = 0;
1683         qlcnic_83xx_reinit_mbx_work(adapter->ahw->mailbox);
1684         qlcnic_83xx_enable_mbx_interrupt(adapter);
1685
1686         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
1687         if (err)
1688                 return err;
1689
1690         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
1691         if (err)
1692                 goto err_out_cleanup_bc_intr;
1693
1694         err = qlcnic_sriov_vf_init_driver(adapter);
1695         if (err)
1696                 goto err_out_term_channel;
1697
1698         return 0;
1699
1700 err_out_term_channel:
1701         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
1702
1703 err_out_cleanup_bc_intr:
1704         qlcnic_sriov_cfg_bc_intr(adapter, 0);
1705         return err;
1706 }
1707
1708 static void qlcnic_sriov_vf_attach(struct qlcnic_adapter *adapter)
1709 {
1710         struct net_device *netdev = adapter->netdev;
1711
1712         if (netif_running(netdev)) {
1713                 if (!qlcnic_up(adapter, netdev))
1714                         qlcnic_restore_indev_addr(netdev, NETDEV_UP);
1715         }
1716
1717         netif_device_attach(netdev);
1718 }
1719
1720 static void qlcnic_sriov_vf_detach(struct qlcnic_adapter *adapter)
1721 {
1722         struct qlcnic_hardware_context *ahw = adapter->ahw;
1723         struct qlcnic_intrpt_config *intr_tbl = ahw->intr_tbl;
1724         struct net_device *netdev = adapter->netdev;
1725         u8 i, max_ints = ahw->num_msix - 1;
1726
1727         netif_device_detach(netdev);
1728         qlcnic_83xx_detach_mailbox_work(adapter);
1729         qlcnic_83xx_disable_mbx_intr(adapter);
1730
1731         if (netif_running(netdev))
1732                 qlcnic_down(adapter, netdev);
1733
1734         for (i = 0; i < max_ints; i++) {
1735                 intr_tbl[i].id = i;
1736                 intr_tbl[i].enabled = 0;
1737                 intr_tbl[i].src = 0;
1738         }
1739         ahw->reset_context = 0;
1740 }
1741
1742 static int qlcnic_sriov_vf_handle_dev_ready(struct qlcnic_adapter *adapter)
1743 {
1744         struct qlcnic_hardware_context *ahw = adapter->ahw;
1745         struct device *dev = &adapter->pdev->dev;
1746         struct qlc_83xx_idc *idc = &ahw->idc;
1747         u8 func = ahw->pci_func;
1748         u32 state;
1749
1750         if ((idc->prev_state == QLC_83XX_IDC_DEV_NEED_RESET) ||
1751             (idc->prev_state == QLC_83XX_IDC_DEV_INIT)) {
1752                 if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1753                         qlcnic_sriov_vf_attach(adapter);
1754                         adapter->fw_fail_cnt = 0;
1755                         dev_info(dev,
1756                                  "%s: Reinitialization of VF 0x%x done after FW reset\n",
1757                                  __func__, func);
1758                 } else {
1759                         dev_err(dev,
1760                                 "%s: Reinitialization of VF 0x%x failed after FW reset\n",
1761                                 __func__, func);
1762                         state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1763                         dev_info(dev, "Current state 0x%x after FW reset\n",
1764                                  state);
1765                 }
1766         }
1767
1768         return 0;
1769 }
1770
1771 static int qlcnic_sriov_vf_handle_context_reset(struct qlcnic_adapter *adapter)
1772 {
1773         struct qlcnic_hardware_context *ahw = adapter->ahw;
1774         struct qlcnic_mailbox *mbx = ahw->mailbox;
1775         struct device *dev = &adapter->pdev->dev;
1776         struct qlc_83xx_idc *idc = &ahw->idc;
1777         u8 func = ahw->pci_func;
1778         u32 state;
1779
1780         adapter->reset_ctx_cnt++;
1781
1782         /* Skip the context reset and check if FW is hung */
1783         if (adapter->reset_ctx_cnt < 3) {
1784                 adapter->need_fw_reset = 1;
1785                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1786                 dev_info(dev,
1787                          "Resetting context, wait here to check if FW is in failed state\n");
1788                 return 0;
1789         }
1790
1791         /* Check if number of resets exceed the threshold.
1792          * If it exceeds the threshold just fail the VF.
1793          */
1794         if (adapter->reset_ctx_cnt > QLC_83XX_VF_RESET_FAIL_THRESH) {
1795                 clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1796                 adapter->tx_timeo_cnt = 0;
1797                 adapter->fw_fail_cnt = 0;
1798                 adapter->reset_ctx_cnt = 0;
1799                 qlcnic_sriov_vf_detach(adapter);
1800                 dev_err(dev,
1801                         "Device context resets have exceeded the threshold, device interface will be shutdown\n");
1802                 return -EIO;
1803         }
1804
1805         dev_info(dev, "Resetting context of VF 0x%x\n", func);
1806         dev_info(dev, "%s: Context reset count %d for VF 0x%x\n",
1807                  __func__, adapter->reset_ctx_cnt, func);
1808         set_bit(__QLCNIC_RESETTING, &adapter->state);
1809         adapter->need_fw_reset = 1;
1810         clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1811         qlcnic_sriov_vf_detach(adapter);
1812         adapter->need_fw_reset = 0;
1813
1814         if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1815                 qlcnic_sriov_vf_attach(adapter);
1816                 adapter->tx_timeo_cnt = 0;
1817                 adapter->reset_ctx_cnt = 0;
1818                 adapter->fw_fail_cnt = 0;
1819                 dev_info(dev, "Done resetting context for VF 0x%x\n", func);
1820         } else {
1821                 dev_err(dev, "%s: Reinitialization of VF 0x%x failed\n",
1822                         __func__, func);
1823                 state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1824                 dev_info(dev, "%s: Current state 0x%x\n", __func__, state);
1825         }
1826
1827         return 0;
1828 }
1829
1830 static int qlcnic_sriov_vf_idc_ready_state(struct qlcnic_adapter *adapter)
1831 {
1832         struct qlcnic_hardware_context *ahw = adapter->ahw;
1833         int ret = 0;
1834
1835         if (ahw->idc.prev_state != QLC_83XX_IDC_DEV_READY)
1836                 ret = qlcnic_sriov_vf_handle_dev_ready(adapter);
1837         else if (ahw->reset_context)
1838                 ret = qlcnic_sriov_vf_handle_context_reset(adapter);
1839
1840         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1841         return ret;
1842 }
1843
1844 static int qlcnic_sriov_vf_idc_failed_state(struct qlcnic_adapter *adapter)
1845 {
1846         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1847
1848         dev_err(&adapter->pdev->dev, "Device is in failed state\n");
1849         if (idc->prev_state == QLC_83XX_IDC_DEV_READY)
1850                 qlcnic_sriov_vf_detach(adapter);
1851
1852         clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1853         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1854         return -EIO;
1855 }
1856
1857 static int
1858 qlcnic_sriov_vf_idc_need_quiescent_state(struct qlcnic_adapter *adapter)
1859 {
1860         struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
1861         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1862
1863         dev_info(&adapter->pdev->dev, "Device is in quiescent state\n");
1864         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1865                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1866                 adapter->tx_timeo_cnt = 0;
1867                 adapter->reset_ctx_cnt = 0;
1868                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1869                 qlcnic_sriov_vf_detach(adapter);
1870         }
1871
1872         return 0;
1873 }
1874
1875 static int qlcnic_sriov_vf_idc_init_reset_state(struct qlcnic_adapter *adapter)
1876 {
1877         struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
1878         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1879         u8 func = adapter->ahw->pci_func;
1880
1881         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1882                 dev_err(&adapter->pdev->dev,
1883                         "Firmware hang detected by VF 0x%x\n", func);
1884                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1885                 adapter->tx_timeo_cnt = 0;
1886                 adapter->reset_ctx_cnt = 0;
1887                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1888                 qlcnic_sriov_vf_detach(adapter);
1889         }
1890         return 0;
1891 }
1892
1893 static int qlcnic_sriov_vf_idc_unknown_state(struct qlcnic_adapter *adapter)
1894 {
1895         dev_err(&adapter->pdev->dev, "%s: Device in unknown state\n", __func__);
1896         return 0;
1897 }
1898
1899 static void qlcnic_sriov_vf_periodic_tasks(struct qlcnic_adapter *adapter)
1900 {
1901         if (adapter->fhash.fnum)
1902                 qlcnic_prune_lb_filters(adapter);
1903 }
1904
1905 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *work)
1906 {
1907         struct qlcnic_adapter *adapter;
1908         struct qlc_83xx_idc *idc;
1909         int ret = 0;
1910
1911         adapter = container_of(work, struct qlcnic_adapter, fw_work.work);
1912         idc = &adapter->ahw->idc;
1913         idc->curr_state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1914
1915         switch (idc->curr_state) {
1916         case QLC_83XX_IDC_DEV_READY:
1917                 ret = qlcnic_sriov_vf_idc_ready_state(adapter);
1918                 break;
1919         case QLC_83XX_IDC_DEV_NEED_RESET:
1920         case QLC_83XX_IDC_DEV_INIT:
1921                 ret = qlcnic_sriov_vf_idc_init_reset_state(adapter);
1922                 break;
1923         case QLC_83XX_IDC_DEV_NEED_QUISCENT:
1924                 ret = qlcnic_sriov_vf_idc_need_quiescent_state(adapter);
1925                 break;
1926         case QLC_83XX_IDC_DEV_FAILED:
1927                 ret = qlcnic_sriov_vf_idc_failed_state(adapter);
1928                 break;
1929         case QLC_83XX_IDC_DEV_QUISCENT:
1930                 break;
1931         default:
1932                 ret = qlcnic_sriov_vf_idc_unknown_state(adapter);
1933         }
1934
1935         idc->prev_state = idc->curr_state;
1936         qlcnic_sriov_vf_periodic_tasks(adapter);
1937
1938         if (!ret && test_bit(QLC_83XX_MODULE_LOADED, &idc->status))
1939                 qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
1940                                      idc->delay);
1941 }
1942
1943 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *adapter)
1944 {
1945         while (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
1946                 msleep(20);
1947
1948         clear_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
1949         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1950         cancel_delayed_work_sync(&adapter->fw_work);
1951 }
1952
1953 static int qlcnic_sriov_check_vlan_id(struct qlcnic_sriov *sriov,
1954                                       struct qlcnic_vf_info *vf, u16 vlan_id)
1955 {
1956         int i, err = -EINVAL;
1957
1958         if (!vf->sriov_vlans)
1959                 return err;
1960
1961         spin_lock_bh(&vf->vlan_list_lock);
1962
1963         for (i = 0; i < sriov->num_allowed_vlans; i++) {
1964                 if (vf->sriov_vlans[i] == vlan_id) {
1965                         err = 0;
1966                         break;
1967                 }
1968         }
1969
1970         spin_unlock_bh(&vf->vlan_list_lock);
1971         return err;
1972 }
1973
1974 static int qlcnic_sriov_validate_num_vlans(struct qlcnic_sriov *sriov,
1975                                            struct qlcnic_vf_info *vf)
1976 {
1977         int err = 0;
1978
1979         spin_lock_bh(&vf->vlan_list_lock);
1980
1981         if (vf->num_vlan >= sriov->num_allowed_vlans)
1982                 err = -EINVAL;
1983
1984         spin_unlock_bh(&vf->vlan_list_lock);
1985         return err;
1986 }
1987
1988 static int qlcnic_sriov_validate_vlan_cfg(struct qlcnic_adapter *adapter,
1989                                           u16 vid, u8 enable)
1990 {
1991         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
1992         struct qlcnic_vf_info *vf;
1993         bool vlan_exist;
1994         u8 allowed = 0;
1995         int i;
1996
1997         vf = &adapter->ahw->sriov->vf_info[0];
1998         vlan_exist = qlcnic_sriov_check_any_vlan(vf);
1999         if (sriov->vlan_mode != QLC_GUEST_VLAN_MODE)
2000                 return -EINVAL;
2001
2002         if (enable) {
2003                 if (qlcnic_83xx_vf_check(adapter) && vlan_exist)
2004                         return -EINVAL;
2005
2006                 if (qlcnic_sriov_validate_num_vlans(sriov, vf))
2007                         return -EINVAL;
2008
2009                 if (sriov->any_vlan) {
2010                         for (i = 0; i < sriov->num_allowed_vlans; i++) {
2011                                 if (sriov->allowed_vlans[i] == vid)
2012                                         allowed = 1;
2013                         }
2014
2015                         if (!allowed)
2016                                 return -EINVAL;
2017                 }
2018         } else {
2019                 if (!vlan_exist || qlcnic_sriov_check_vlan_id(sriov, vf, vid))
2020                         return -EINVAL;
2021         }
2022
2023         return 0;
2024 }
2025
2026 static void qlcnic_sriov_vlan_operation(struct qlcnic_vf_info *vf, u16 vlan_id,
2027                                         enum qlcnic_vlan_operations opcode)
2028 {
2029         struct qlcnic_adapter *adapter = vf->adapter;
2030         struct qlcnic_sriov *sriov;
2031
2032         sriov = adapter->ahw->sriov;
2033
2034         if (!vf->sriov_vlans)
2035                 return;
2036
2037         spin_lock_bh(&vf->vlan_list_lock);
2038
2039         switch (opcode) {
2040         case QLC_VLAN_ADD:
2041                 qlcnic_sriov_add_vlan_id(sriov, vf, vlan_id);
2042                 break;
2043         case QLC_VLAN_DELETE:
2044                 qlcnic_sriov_del_vlan_id(sriov, vf, vlan_id);
2045                 break;
2046         default:
2047                 netdev_err(adapter->netdev, "Invalid VLAN operation\n");
2048         }
2049
2050         spin_unlock_bh(&vf->vlan_list_lock);
2051         return;
2052 }
2053
2054 int qlcnic_sriov_cfg_vf_guest_vlan(struct qlcnic_adapter *adapter,
2055                                    u16 vid, u8 enable)
2056 {
2057         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
2058         struct net_device *netdev = adapter->netdev;
2059         struct qlcnic_vf_info *vf;
2060         struct qlcnic_cmd_args cmd;
2061         int ret;
2062
2063         memset(&cmd, 0, sizeof(cmd));
2064         if (vid == 0)
2065                 return 0;
2066
2067         vf = &adapter->ahw->sriov->vf_info[0];
2068         ret = qlcnic_sriov_validate_vlan_cfg(adapter, vid, enable);
2069         if (ret)
2070                 return ret;
2071
2072         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd,
2073                                              QLCNIC_BC_CMD_CFG_GUEST_VLAN);
2074         if (ret)
2075                 return ret;
2076
2077         cmd.req.arg[1] = (enable & 1) | vid << 16;
2078
2079         qlcnic_sriov_cleanup_async_list(&sriov->bc);
2080         ret = qlcnic_issue_cmd(adapter, &cmd);
2081         if (ret) {
2082                 dev_err(&adapter->pdev->dev,
2083                         "Failed to configure guest VLAN, err=%d\n", ret);
2084         } else {
2085                 netif_addr_lock_bh(netdev);
2086                 qlcnic_free_mac_list(adapter);
2087                 netif_addr_unlock_bh(netdev);
2088
2089                 if (enable)
2090                         qlcnic_sriov_vlan_operation(vf, vid, QLC_VLAN_ADD);
2091                 else
2092                         qlcnic_sriov_vlan_operation(vf, vid, QLC_VLAN_DELETE);
2093
2094                 netif_addr_lock_bh(netdev);
2095                 qlcnic_set_multi(netdev);
2096                 netif_addr_unlock_bh(netdev);
2097         }
2098
2099         qlcnic_free_mbx_args(&cmd);
2100         return ret;
2101 }
2102
2103 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *adapter)
2104 {
2105         struct list_head *head = &adapter->mac_list;
2106         struct qlcnic_mac_vlan_list *cur;
2107
2108         while (!list_empty(head)) {
2109                 cur = list_entry(head->next, struct qlcnic_mac_vlan_list, list);
2110                 qlcnic_sre_macaddr_change(adapter, cur->mac_addr, cur->vlan_id,
2111                                           QLCNIC_MAC_DEL);
2112                 list_del(&cur->list);
2113                 kfree(cur);
2114         }
2115 }
2116
2117
2118 static int qlcnic_sriov_vf_shutdown(struct pci_dev *pdev)
2119 {
2120         struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
2121         struct net_device *netdev = adapter->netdev;
2122         int retval;
2123
2124         netif_device_detach(netdev);
2125         qlcnic_cancel_idc_work(adapter);
2126
2127         if (netif_running(netdev))
2128                 qlcnic_down(adapter, netdev);
2129
2130         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
2131         qlcnic_sriov_cfg_bc_intr(adapter, 0);
2132         qlcnic_83xx_disable_mbx_intr(adapter);
2133         cancel_delayed_work_sync(&adapter->idc_aen_work);
2134
2135         retval = pci_save_state(pdev);
2136         if (retval)
2137                 return retval;
2138
2139         return 0;
2140 }
2141
2142 static int qlcnic_sriov_vf_resume(struct qlcnic_adapter *adapter)
2143 {
2144         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
2145         struct net_device *netdev = adapter->netdev;
2146         int err;
2147
2148         set_bit(QLC_83XX_MODULE_LOADED, &idc->status);
2149         qlcnic_83xx_enable_mbx_interrupt(adapter);
2150         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
2151         if (err)
2152                 return err;
2153
2154         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
2155         if (!err) {
2156                 if (netif_running(netdev)) {
2157                         err = qlcnic_up(adapter, netdev);
2158                         if (!err)
2159                                 qlcnic_restore_indev_addr(netdev, NETDEV_UP);
2160                 }
2161         }
2162
2163         netif_device_attach(netdev);
2164         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
2165                              idc->delay);
2166         return err;
2167 }
2168
2169 int qlcnic_sriov_alloc_vlans(struct qlcnic_adapter *adapter)
2170 {
2171         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
2172         struct qlcnic_vf_info *vf;
2173         int i;
2174
2175         for (i = 0; i < sriov->num_vfs; i++) {
2176                 vf = &sriov->vf_info[i];
2177                 vf->sriov_vlans = kcalloc(sriov->num_allowed_vlans,
2178                                           sizeof(*vf->sriov_vlans), GFP_KERNEL);
2179                 if (!vf->sriov_vlans)
2180                         return -ENOMEM;
2181         }
2182
2183         return 0;
2184 }
2185
2186 void qlcnic_sriov_free_vlans(struct qlcnic_adapter *adapter)
2187 {
2188         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
2189         struct qlcnic_vf_info *vf;
2190         int i;
2191
2192         for (i = 0; i < sriov->num_vfs; i++) {
2193                 vf = &sriov->vf_info[i];
2194                 kfree(vf->sriov_vlans);
2195                 vf->sriov_vlans = NULL;
2196         }
2197 }
2198
2199 void qlcnic_sriov_add_vlan_id(struct qlcnic_sriov *sriov,
2200                               struct qlcnic_vf_info *vf, u16 vlan_id)
2201 {
2202         int i;
2203
2204         for (i = 0; i < sriov->num_allowed_vlans; i++) {
2205                 if (!vf->sriov_vlans[i]) {
2206                         vf->sriov_vlans[i] = vlan_id;
2207                         vf->num_vlan++;
2208                         return;
2209                 }
2210         }
2211 }
2212
2213 void qlcnic_sriov_del_vlan_id(struct qlcnic_sriov *sriov,
2214                               struct qlcnic_vf_info *vf, u16 vlan_id)
2215 {
2216         int i;
2217
2218         for (i = 0; i < sriov->num_allowed_vlans; i++) {
2219                 if (vf->sriov_vlans[i] == vlan_id) {
2220                         vf->sriov_vlans[i] = 0;
2221                         vf->num_vlan--;
2222                         return;
2223                 }
2224         }
2225 }
2226
2227 bool qlcnic_sriov_check_any_vlan(struct qlcnic_vf_info *vf)
2228 {
2229         bool err = false;
2230
2231         spin_lock_bh(&vf->vlan_list_lock);
2232
2233         if (vf->num_vlan)
2234                 err = true;
2235
2236         spin_unlock_bh(&vf->vlan_list_lock);
2237         return err;
2238 }