drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c

   1 /*
   2  * QLogic qlcnic NIC Driver
   3  * Copyright (c) 2009-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qlcnic for copyright and licensing details.
   6  */
   7
   8 #include <linux/types.h>
   9
  10 #include "qlcnic_sriov.h"
  11 #include "qlcnic.h"
  12 #include "qlcnic_83xx_hw.h"
  13
  14 #define QLC_BC_COMMAND  0
  15 #define QLC_BC_RESPONSE 1
  16
  17 #define QLC_MBOX_RESP_TIMEOUT           (10 * HZ)
  18 #define QLC_MBOX_CH_FREE_TIMEOUT        (10 * HZ)
  19
  20 #define QLC_BC_MSG              0
  21 #define QLC_BC_CFREE            1
  22 #define QLC_BC_FLR              2
  23 #define QLC_BC_HDR_SZ           16
  24 #define QLC_BC_PAYLOAD_SZ       (1024 - QLC_BC_HDR_SZ)
  25
  26 #define QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF            2048
  27 #define QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF      512
  28
  29 #define QLC_83XX_VF_RESET_FAIL_THRESH   8
  30 #define QLC_BC_CMD_MAX_RETRY_CNT        5
  31
  32 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *);
  33 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *, u32);
  34 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *);
  35 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *);
  36 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *);
  37 static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *,
  38                                   struct qlcnic_cmd_args *);
  39 static int qlcnic_sriov_channel_cfg_cmd(struct qlcnic_adapter *, u8);
  40 static void qlcnic_sriov_process_bc_cmd(struct work_struct *);
  41 static int qlcnic_sriov_vf_shutdown(struct pci_dev *);
  42 static int qlcnic_sriov_vf_resume(struct qlcnic_adapter *);
  43 static int qlcnic_sriov_async_issue_cmd(struct qlcnic_adapter *,
  44                                         struct qlcnic_cmd_args *);
  45
  46 static struct qlcnic_hardware_ops qlcnic_sriov_vf_hw_ops = {
  47         .read_crb                       = qlcnic_83xx_read_crb,
  48         .write_crb                      = qlcnic_83xx_write_crb,
  49         .read_reg                       = qlcnic_83xx_rd_reg_indirect,
  50         .write_reg                      = qlcnic_83xx_wrt_reg_indirect,
  51         .get_mac_address                = qlcnic_83xx_get_mac_address,
  52         .setup_intr                     = qlcnic_83xx_setup_intr,
  53         .alloc_mbx_args                 = qlcnic_83xx_alloc_mbx_args,
  54         .mbx_cmd                        = qlcnic_sriov_issue_cmd,
  55         .get_func_no                    = qlcnic_83xx_get_func_no,
  56         .api_lock                       = qlcnic_83xx_cam_lock,
  57         .api_unlock                     = qlcnic_83xx_cam_unlock,
  58         .process_lb_rcv_ring_diag       = qlcnic_83xx_process_rcv_ring_diag,
  59         .create_rx_ctx                  = qlcnic_83xx_create_rx_ctx,
  60         .create_tx_ctx                  = qlcnic_83xx_create_tx_ctx,
  61         .del_rx_ctx                     = qlcnic_83xx_del_rx_ctx,
  62         .del_tx_ctx                     = qlcnic_83xx_del_tx_ctx,
  63         .setup_link_event               = qlcnic_83xx_setup_link_event,
  64         .get_nic_info                   = qlcnic_83xx_get_nic_info,
  65         .get_pci_info                   = qlcnic_83xx_get_pci_info,
  66         .set_nic_info                   = qlcnic_83xx_set_nic_info,
  67         .change_macvlan                 = qlcnic_83xx_sre_macaddr_change,
  68         .napi_enable                    = qlcnic_83xx_napi_enable,
  69         .napi_disable                   = qlcnic_83xx_napi_disable,
  70         .config_intr_coal               = qlcnic_83xx_config_intr_coal,
  71         .config_rss                     = qlcnic_83xx_config_rss,
  72         .config_hw_lro                  = qlcnic_83xx_config_hw_lro,
  73         .config_promisc_mode            = qlcnic_83xx_nic_set_promisc,
  74         .change_l2_filter               = qlcnic_83xx_change_l2_filter,
  75         .get_board_info                 = qlcnic_83xx_get_port_info,
  76         .free_mac_list                  = qlcnic_sriov_vf_free_mac_list,
  77         .enable_sds_intr                = qlcnic_83xx_enable_sds_intr,
  78         .disable_sds_intr               = qlcnic_83xx_disable_sds_intr,
  79 };
  80
  81 static struct qlcnic_nic_template qlcnic_sriov_vf_ops = {
  82         .config_bridged_mode    = qlcnic_config_bridged_mode,
  83         .config_led             = qlcnic_config_led,
  84         .cancel_idc_work        = qlcnic_sriov_vf_cancel_fw_work,
  85         .napi_add               = qlcnic_83xx_napi_add,
  86         .napi_del               = qlcnic_83xx_napi_del,
  87         .shutdown               = qlcnic_sriov_vf_shutdown,
  88         .resume                 = qlcnic_sriov_vf_resume,
  89         .config_ipaddr          = qlcnic_83xx_config_ipaddr,
  90         .clear_legacy_intr      = qlcnic_83xx_clear_legacy_intr,
  91 };
  92
  93 static const struct qlcnic_mailbox_metadata qlcnic_sriov_bc_mbx_tbl[] = {
  94         {QLCNIC_BC_CMD_CHANNEL_INIT, 2, 2},
  95         {QLCNIC_BC_CMD_CHANNEL_TERM, 2, 2},
  96         {QLCNIC_BC_CMD_GET_ACL, 3, 14},
  97         {QLCNIC_BC_CMD_CFG_GUEST_VLAN, 2, 2},
  98 };
  99
 100 static inline bool qlcnic_sriov_bc_msg_check(u32 val)
 101 {
 102         return (val & (1 << QLC_BC_MSG)) ? true : false;
 103 }
 104
 105 static inline bool qlcnic_sriov_channel_free_check(u32 val)
 106 {
 107         return (val & (1 << QLC_BC_CFREE)) ? true : false;
 108 }
 109
 110 static inline bool qlcnic_sriov_flr_check(u32 val)
 111 {
 112         return (val & (1 << QLC_BC_FLR)) ? true : false;
 113 }
 114
 115 static inline u8 qlcnic_sriov_target_func_id(u32 val)
 116 {
 117         return (val >> 4) & 0xff;
 118 }
 119
 120 static int qlcnic_sriov_virtid_fn(struct qlcnic_adapter *adapter, int vf_id)
 121 {
 122         struct pci_dev *dev = adapter->pdev;
 123         int pos;
 124         u16 stride, offset;
 125
 126         if (qlcnic_sriov_vf_check(adapter))
 127                 return 0;
 128
 129         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
 130         if (!pos)
 131                 return 0;
 132         pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
 133         pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
 134
 135         return (dev->devfn + offset + stride * vf_id) & 0xff;
 136 }
 137
 138 int qlcnic_sriov_init(struct qlcnic_adapter *adapter, int num_vfs)
 139 {
 140         struct qlcnic_sriov *sriov;
 141         struct qlcnic_back_channel *bc;
 142         struct workqueue_struct *wq;
 143         struct qlcnic_vport *vp;
 144         struct qlcnic_vf_info *vf;
 145         int err, i;
 146
 147         if (!qlcnic_sriov_enable_check(adapter))
 148                 return -EIO;
 149
 150         sriov  = kzalloc(sizeof(struct qlcnic_sriov), GFP_KERNEL);
 151         if (!sriov)
 152                 return -ENOMEM;
 153
 154         adapter->ahw->sriov = sriov;
 155         sriov->num_vfs = num_vfs;
 156         bc = &sriov->bc;
 157         sriov->vf_info = kzalloc(sizeof(struct qlcnic_vf_info) *
 158                                  num_vfs, GFP_KERNEL);
 159         if (!sriov->vf_info) {
 160                 err = -ENOMEM;
 161                 goto qlcnic_free_sriov;
 162         }
 163
 164         wq = create_singlethread_workqueue("bc-trans");
 165         if (wq == NULL) {
 166                 err = -ENOMEM;
 167                 dev_err(&adapter->pdev->dev,
 168                         "Cannot create bc-trans workqueue\n");
 169                 goto qlcnic_free_vf_info;
 170         }
 171
 172         bc->bc_trans_wq = wq;
 173
 174         wq = create_singlethread_workqueue("async");
 175         if (wq == NULL) {
 176                 err = -ENOMEM;
 177                 dev_err(&adapter->pdev->dev, "Cannot create async workqueue\n");
 178                 goto qlcnic_destroy_trans_wq;
 179         }
 180
 181         bc->bc_async_wq =  wq;
 182         INIT_LIST_HEAD(&bc->async_list);
 183
 184         for (i = 0; i < num_vfs; i++) {
 185                 vf = &sriov->vf_info[i];
 186                 vf->adapter = adapter;
 187                 vf->pci_func = qlcnic_sriov_virtid_fn(adapter, i);
 188                 mutex_init(&vf->send_cmd_lock);
 189                 spin_lock_init(&vf->vlan_list_lock);
 190                 INIT_LIST_HEAD(&vf->rcv_act.wait_list);
 191                 INIT_LIST_HEAD(&vf->rcv_pend.wait_list);
 192                 spin_lock_init(&vf->rcv_act.lock);
 193                 spin_lock_init(&vf->rcv_pend.lock);
 194                 init_completion(&vf->ch_free_cmpl);
 195
 196                 INIT_WORK(&vf->trans_work, qlcnic_sriov_process_bc_cmd);
 197
 198                 if (qlcnic_sriov_pf_check(adapter)) {
 199                         vp = kzalloc(sizeof(struct qlcnic_vport), GFP_KERNEL);
 200                         if (!vp) {
 201                                 err = -ENOMEM;
 202                                 goto qlcnic_destroy_async_wq;
 203                         }
 204                         sriov->vf_info[i].vp = vp;
 205                         vp->vlan_mode = QLC_GUEST_VLAN_MODE;
 206                         vp->max_tx_bw = MAX_BW;
 207                         vp->min_tx_bw = MIN_BW;
 208                         vp->spoofchk = false;
 209                         random_ether_addr(vp->mac);
 210                         dev_info(&adapter->pdev->dev,
 211                                  "MAC Address %pM is configured for VF %d\n",
 212                                  vp->mac, i);
 213                 }
 214         }
 215
 216         return 0;
 217
 218 qlcnic_destroy_async_wq:
 219         destroy_workqueue(bc->bc_async_wq);
 220
 221 qlcnic_destroy_trans_wq:
 222         destroy_workqueue(bc->bc_trans_wq);
 223
 224 qlcnic_free_vf_info:
 225         kfree(sriov->vf_info);
 226
 227 qlcnic_free_sriov:
 228         kfree(adapter->ahw->sriov);
 229         return err;
 230 }
 231
 232 void qlcnic_sriov_cleanup_list(struct qlcnic_trans_list *t_list)
 233 {
 234         struct qlcnic_bc_trans *trans;
 235         struct qlcnic_cmd_args cmd;
 236         unsigned long flags;
 237
 238         spin_lock_irqsave(&t_list->lock, flags);
 239
 240         while (!list_empty(&t_list->wait_list)) {
 241                 trans = list_first_entry(&t_list->wait_list,
 242                                          struct qlcnic_bc_trans, list);
 243                 list_del(&trans->list);
 244                 t_list->count--;
 245                 cmd.req.arg = (u32 *)trans->req_pay;
 246                 cmd.rsp.arg = (u32 *)trans->rsp_pay;
 247                 qlcnic_free_mbx_args(&cmd);
 248                 qlcnic_sriov_cleanup_transaction(trans);
 249         }
 250
 251         spin_unlock_irqrestore(&t_list->lock, flags);
 252 }
 253
 254 void __qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 255 {
 256         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 257         struct qlcnic_back_channel *bc = &sriov->bc;
 258         struct qlcnic_vf_info *vf;
 259         int i;
 260
 261         if (!qlcnic_sriov_enable_check(adapter))
 262                 return;
 263
 264         qlcnic_sriov_cleanup_async_list(bc);
 265         destroy_workqueue(bc->bc_async_wq);
 266
 267         for (i = 0; i < sriov->num_vfs; i++) {
 268                 vf = &sriov->vf_info[i];
 269                 qlcnic_sriov_cleanup_list(&vf->rcv_pend);
 270                 cancel_work_sync(&vf->trans_work);
 271                 qlcnic_sriov_cleanup_list(&vf->rcv_act);
 272         }
 273
 274         destroy_workqueue(bc->bc_trans_wq);
 275
 276         for (i = 0; i < sriov->num_vfs; i++)
 277                 kfree(sriov->vf_info[i].vp);
 278
 279         kfree(sriov->vf_info);
 280         kfree(adapter->ahw->sriov);
 281 }
 282
 283 static void qlcnic_sriov_vf_cleanup(struct qlcnic_adapter *adapter)
 284 {
 285         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 286         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 287         __qlcnic_sriov_cleanup(adapter);
 288 }
 289
 290 void qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 291 {
 292         if (!test_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state))
 293                 return;
 294
 295         qlcnic_sriov_free_vlans(adapter);
 296
 297         if (qlcnic_sriov_pf_check(adapter))
 298                 qlcnic_sriov_pf_cleanup(adapter);
 299
 300         if (qlcnic_sriov_vf_check(adapter))
 301                 qlcnic_sriov_vf_cleanup(adapter);
 302 }
 303
 304 static int qlcnic_sriov_post_bc_msg(struct qlcnic_adapter *adapter, u32 *hdr,
 305                                     u32 *pay, u8 pci_func, u8 size)
 306 {
 307         struct qlcnic_hardware_context *ahw = adapter->ahw;
 308         struct qlcnic_mailbox *mbx = ahw->mailbox;
 309         struct qlcnic_cmd_args cmd;
 310         unsigned long timeout;
 311         int err;
 312
 313         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
 314         cmd.hdr = hdr;
 315         cmd.pay = pay;
 316         cmd.pay_size = size;
 317         cmd.func_num = pci_func;
 318         cmd.op_type = QLC_83XX_MBX_POST_BC_OP;
 319         cmd.cmd_op = ((struct qlcnic_bc_hdr *)hdr)->cmd_op;
 320
 321         err = mbx->ops->enqueue_cmd(adapter, &cmd, &timeout);
 322         if (err) {
 323                 dev_err(&adapter->pdev->dev,
 324                         "%s: Mailbox not available, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
 325                         __func__, cmd.cmd_op, cmd.type, ahw->pci_func,
 326                         ahw->op_mode);
 327                 return err;
 328         }
 329
 330         if (!wait_for_completion_timeout(&cmd.completion, timeout)) {
 331                 dev_err(&adapter->pdev->dev,
 332                         "%s: Mailbox command timed out, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
 333                         __func__, cmd.cmd_op, cmd.type, ahw->pci_func,
 334                         ahw->op_mode);
 335                 flush_workqueue(mbx->work_q);
 336         }
 337
 338         return cmd.rsp_opcode;
 339 }
 340
 341 static void qlcnic_sriov_vf_cfg_buff_desc(struct qlcnic_adapter *adapter)
 342 {
 343         adapter->num_rxd = QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF;
 344         adapter->max_rxd = MAX_RCV_DESCRIPTORS_10G;
 345         adapter->num_jumbo_rxd = QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF;
 346         adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G;
 347         adapter->num_txd = MAX_CMD_DESCRIPTORS;
 348         adapter->max_rds_rings = MAX_RDS_RINGS;
 349 }
 350
 351 int qlcnic_sriov_get_vf_vport_info(struct qlcnic_adapter *adapter,
 352                                    struct qlcnic_info *npar_info, u16 vport_id)
 353 {
 354         struct device *dev = &adapter->pdev->dev;
 355         struct qlcnic_cmd_args cmd;
 356         int err;
 357         u32 status;
 358
 359         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_NIC_INFO);
 360         if (err)
 361                 return err;
 362
 363         cmd.req.arg[1] = vport_id << 16 | 0x1;
 364         err = qlcnic_issue_cmd(adapter, &cmd);
 365         if (err) {
 366                 dev_err(&adapter->pdev->dev,
 367                         "Failed to get vport info, err=%d\n", err);
 368                 qlcnic_free_mbx_args(&cmd);
 369                 return err;
 370         }
 371
 372         status = cmd.rsp.arg[2] & 0xffff;
 373         if (status & BIT_0)
 374                 npar_info->min_tx_bw = MSW(cmd.rsp.arg[2]);
 375         if (status & BIT_1)
 376                 npar_info->max_tx_bw = LSW(cmd.rsp.arg[3]);
 377         if (status & BIT_2)
 378                 npar_info->max_tx_ques = MSW(cmd.rsp.arg[3]);
 379         if (status & BIT_3)
 380                 npar_info->max_tx_mac_filters = LSW(cmd.rsp.arg[4]);
 381         if (status & BIT_4)
 382                 npar_info->max_rx_mcast_mac_filters = MSW(cmd.rsp.arg[4]);
 383         if (status & BIT_5)
 384                 npar_info->max_rx_ucast_mac_filters = LSW(cmd.rsp.arg[5]);
 385         if (status & BIT_6)
 386                 npar_info->max_rx_ip_addr = MSW(cmd.rsp.arg[5]);
 387         if (status & BIT_7)
 388                 npar_info->max_rx_lro_flow = LSW(cmd.rsp.arg[6]);
 389         if (status & BIT_8)
 390                 npar_info->max_rx_status_rings = MSW(cmd.rsp.arg[6]);
 391         if (status & BIT_9)
 392                 npar_info->max_rx_buf_rings = LSW(cmd.rsp.arg[7]);
 393
 394         npar_info->max_rx_ques = MSW(cmd.rsp.arg[7]);
 395         npar_info->max_tx_vlan_keys = LSW(cmd.rsp.arg[8]);
 396         npar_info->max_local_ipv6_addrs = MSW(cmd.rsp.arg[8]);
 397         npar_info->max_remote_ipv6_addrs = LSW(cmd.rsp.arg[9]);
 398
 399         dev_info(dev, "\n\tmin_tx_bw: %d, max_tx_bw: %d max_tx_ques: %d,\n"
 400                  "\tmax_tx_mac_filters: %d max_rx_mcast_mac_filters: %d,\n"
 401                  "\tmax_rx_ucast_mac_filters: 0x%x, max_rx_ip_addr: %d,\n"
 402                  "\tmax_rx_lro_flow: %d max_rx_status_rings: %d,\n"
 403                  "\tmax_rx_buf_rings: %d, max_rx_ques: %d, max_tx_vlan_keys %d\n"
 404                  "\tlocal_ipv6_addr: %d, remote_ipv6_addr: %d\n",
 405                  npar_info->min_tx_bw, npar_info->max_tx_bw,
 406                  npar_info->max_tx_ques, npar_info->max_tx_mac_filters,
 407                  npar_info->max_rx_mcast_mac_filters,
 408                  npar_info->max_rx_ucast_mac_filters, npar_info->max_rx_ip_addr,
 409                  npar_info->max_rx_lro_flow, npar_info->max_rx_status_rings,
 410                  npar_info->max_rx_buf_rings, npar_info->max_rx_ques,
 411                  npar_info->max_tx_vlan_keys, npar_info->max_local_ipv6_addrs,
 412                  npar_info->max_remote_ipv6_addrs);
 413
 414         qlcnic_free_mbx_args(&cmd);
 415         return err;
 416 }
 417
 418 static int qlcnic_sriov_set_pvid_mode(struct qlcnic_adapter *adapter,
 419                                       struct qlcnic_cmd_args *cmd)
 420 {
 421         adapter->rx_pvid = MSW(cmd->rsp.arg[1]) & 0xffff;
 422         adapter->flags &= ~QLCNIC_TAGGING_ENABLED;
 423         return 0;
 424 }
 425
 426 static int qlcnic_sriov_set_guest_vlan_mode(struct qlcnic_adapter *adapter,
 427                                             struct qlcnic_cmd_args *cmd)
 428 {
 429         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 430         int i, num_vlans;
 431         u16 *vlans;
 432
 433         if (sriov->allowed_vlans)
 434                 return 0;
 435
 436         sriov->any_vlan = cmd->rsp.arg[2] & 0xf;
 437         sriov->num_allowed_vlans = cmd->rsp.arg[2] >> 16;
 438         dev_info(&adapter->pdev->dev, "Number of allowed Guest VLANs = %d\n",
 439                  sriov->num_allowed_vlans);
 440
 441         qlcnic_sriov_alloc_vlans(adapter);
 442
 443         if (!sriov->any_vlan)
 444                 return 0;
 445
 446         num_vlans = sriov->num_allowed_vlans;
 447         sriov->allowed_vlans = kzalloc(sizeof(u16) * num_vlans, GFP_KERNEL);
 448         if (!sriov->allowed_vlans)
 449                 return -ENOMEM;
 450
 451         vlans = (u16 *)&cmd->rsp.arg[3];
 452         for (i = 0; i < num_vlans; i++)
 453                 sriov->allowed_vlans[i] = vlans[i];
 454
 455         return 0;
 456 }
 457
 458 static int qlcnic_sriov_get_vf_acl(struct qlcnic_adapter *adapter)
 459 {
 460         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 461         struct qlcnic_cmd_args cmd;
 462         int ret = 0;
 463
 464         memset(&cmd, 0, sizeof(cmd));
 465         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd, QLCNIC_BC_CMD_GET_ACL);
 466         if (ret)
 467                 return ret;
 468
 469         ret = qlcnic_issue_cmd(adapter, &cmd);
 470         if (ret) {
 471                 dev_err(&adapter->pdev->dev, "Failed to get ACL, err=%d\n",
 472                         ret);
 473         } else {
 474                 sriov->vlan_mode = cmd.rsp.arg[1] & 0x3;
 475                 switch (sriov->vlan_mode) {
 476                 case QLC_GUEST_VLAN_MODE:
 477                         ret = qlcnic_sriov_set_guest_vlan_mode(adapter, &cmd);
 478                         break;
 479                 case QLC_PVID_MODE:
 480                         ret = qlcnic_sriov_set_pvid_mode(adapter, &cmd);
 481                         break;
 482                 }
 483         }
 484
 485         qlcnic_free_mbx_args(&cmd);
 486         return ret;
 487 }
 488
 489 static int qlcnic_sriov_vf_init_driver(struct qlcnic_adapter *adapter)
 490 {
 491         struct qlcnic_hardware_context *ahw = adapter->ahw;
 492         struct qlcnic_info nic_info;
 493         int err;
 494
 495         err = qlcnic_sriov_get_vf_vport_info(adapter, &nic_info, 0);
 496         if (err)
 497                 return err;
 498
 499         ahw->max_mc_count = nic_info.max_rx_mcast_mac_filters;
 500
 501         err = qlcnic_get_nic_info(adapter, &nic_info, ahw->pci_func);
 502         if (err)
 503                 return -EIO;
 504
 505         if (qlcnic_83xx_get_port_info(adapter))
 506                 return -EIO;
 507
 508         qlcnic_sriov_vf_cfg_buff_desc(adapter);
 509         adapter->flags |= QLCNIC_ADAPTER_INITIALIZED;
 510         dev_info(&adapter->pdev->dev, "HAL Version: %d\n",
 511                  adapter->ahw->fw_hal_version);
 512
 513         ahw->physical_port = (u8) nic_info.phys_port;
 514         ahw->switch_mode = nic_info.switch_mode;
 515         ahw->max_mtu = nic_info.max_mtu;
 516         ahw->op_mode = nic_info.op_mode;
 517         ahw->capabilities = nic_info.capabilities;
 518         return 0;
 519 }
 520
 521 static int qlcnic_sriov_setup_vf(struct qlcnic_adapter *adapter,
 522                                  int pci_using_dac)
 523 {
 524         int err;
 525
 526         adapter->flags |= QLCNIC_VLAN_FILTERING;
 527         adapter->ahw->total_nic_func = 1;
 528         INIT_LIST_HEAD(&adapter->vf_mc_list);
 529         if (!qlcnic_use_msi_x && !!qlcnic_use_msi)
 530                 dev_warn(&adapter->pdev->dev,
 531                          "Device does not support MSI interrupts\n");
 532
 533         /* compute and set default and max tx/sds rings */
 534         qlcnic_set_tx_ring_count(adapter, QLCNIC_SINGLE_RING);
 535         qlcnic_set_sds_ring_count(adapter, QLCNIC_SINGLE_RING);
 536
 537         err = qlcnic_setup_intr(adapter);
 538         if (err) {
 539                 dev_err(&adapter->pdev->dev, "Failed to setup interrupt\n");
 540                 goto err_out_disable_msi;
 541         }
 542
 543         err = qlcnic_83xx_setup_mbx_intr(adapter);
 544         if (err)
 545                 goto err_out_disable_msi;
 546
 547         err = qlcnic_sriov_init(adapter, 1);
 548         if (err)
 549                 goto err_out_disable_mbx_intr;
 550
 551         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
 552         if (err)
 553                 goto err_out_cleanup_sriov;
 554
 555         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
 556         if (err)
 557                 goto err_out_disable_bc_intr;
 558
 559         err = qlcnic_sriov_vf_init_driver(adapter);
 560         if (err)
 561                 goto err_out_send_channel_term;
 562
 563         err = qlcnic_sriov_get_vf_acl(adapter);
 564         if (err)
 565                 goto err_out_send_channel_term;
 566
 567         err = qlcnic_setup_netdev(adapter, adapter->netdev, pci_using_dac);
 568         if (err)
 569                 goto err_out_send_channel_term;
 570
 571         pci_set_drvdata(adapter->pdev, adapter);
 572         dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n",
 573                  adapter->netdev->name);
 574
 575         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
 576                              adapter->ahw->idc.delay);
 577         return 0;
 578
 579 err_out_send_channel_term:
 580         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 581
 582 err_out_disable_bc_intr:
 583         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 584
 585 err_out_cleanup_sriov:
 586         __qlcnic_sriov_cleanup(adapter);
 587
 588 err_out_disable_mbx_intr:
 589         qlcnic_83xx_free_mbx_intr(adapter);
 590
 591 err_out_disable_msi:
 592         qlcnic_teardown_intr(adapter);
 593         return err;
 594 }
 595
 596 static int qlcnic_sriov_check_dev_ready(struct qlcnic_adapter *adapter)
 597 {
 598         u32 state;
 599
 600         do {
 601                 msleep(20);
 602                 if (++adapter->fw_fail_cnt > QLC_BC_CMD_MAX_RETRY_CNT)
 603                         return -EIO;
 604                 state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
 605         } while (state != QLC_83XX_IDC_DEV_READY);
 606
 607         return 0;
 608 }
 609
 610 int qlcnic_sriov_vf_init(struct qlcnic_adapter *adapter, int pci_using_dac)
 611 {
 612         struct qlcnic_hardware_context *ahw = adapter->ahw;
 613         int err;
 614
 615         set_bit(QLC_83XX_MODULE_LOADED, &ahw->idc.status);
 616         ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
 617         ahw->reset_context = 0;
 618         adapter->fw_fail_cnt = 0;
 619         ahw->msix_supported = 1;
 620         adapter->need_fw_reset = 0;
 621         adapter->flags |= QLCNIC_TX_INTR_SHARED;
 622
 623         err = qlcnic_sriov_check_dev_ready(adapter);
 624         if (err)
 625                 return err;
 626
 627         err = qlcnic_sriov_setup_vf(adapter, pci_using_dac);
 628         if (err)
 629                 return err;
 630
 631         if (qlcnic_read_mac_addr(adapter))
 632                 dev_warn(&adapter->pdev->dev, "failed to read mac addr\n");
 633
 634         INIT_DELAYED_WORK(&adapter->idc_aen_work, qlcnic_83xx_idc_aen_work);
 635
 636         clear_bit(__QLCNIC_RESETTING, &adapter->state);
 637         return 0;
 638 }
 639
 640 void qlcnic_sriov_vf_set_ops(struct qlcnic_adapter *adapter)
 641 {
 642         struct qlcnic_hardware_context *ahw = adapter->ahw;
 643
 644         ahw->op_mode = QLCNIC_SRIOV_VF_FUNC;
 645         dev_info(&adapter->pdev->dev,
 646                  "HAL Version: %d Non Privileged SRIOV function\n",
 647                  ahw->fw_hal_version);
 648         adapter->nic_ops = &qlcnic_sriov_vf_ops;
 649         set_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state);
 650         return;
 651 }
 652
 653 void qlcnic_sriov_vf_register_map(struct qlcnic_hardware_context *ahw)
 654 {
 655         ahw->hw_ops             = &qlcnic_sriov_vf_hw_ops;
 656         ahw->reg_tbl            = (u32 *)qlcnic_83xx_reg_tbl;
 657         ahw->ext_reg_tbl        = (u32 *)qlcnic_83xx_ext_reg_tbl;
 658 }
 659
 660 static u32 qlcnic_sriov_get_bc_paysize(u32 real_pay_size, u8 curr_frag)
 661 {
 662         u32 pay_size;
 663
 664         pay_size = real_pay_size / ((curr_frag + 1) * QLC_BC_PAYLOAD_SZ);
 665
 666         if (pay_size)
 667                 pay_size = QLC_BC_PAYLOAD_SZ;
 668         else
 669                 pay_size = real_pay_size % QLC_BC_PAYLOAD_SZ;
 670
 671         return pay_size;
 672 }
 673
 674 int qlcnic_sriov_func_to_index(struct qlcnic_adapter *adapter, u8 pci_func)
 675 {
 676         struct qlcnic_vf_info *vf_info = adapter->ahw->sriov->vf_info;
 677         u8 i;
 678
 679         if (qlcnic_sriov_vf_check(adapter))
 680                 return 0;
 681
 682         for (i = 0; i < adapter->ahw->sriov->num_vfs; i++) {
 683                 if (vf_info[i].pci_func == pci_func)
 684                         return i;
 685         }
 686
 687         return -EINVAL;
 688 }
 689
 690 static inline int qlcnic_sriov_alloc_bc_trans(struct qlcnic_bc_trans **trans)
 691 {
 692         *trans = kzalloc(sizeof(struct qlcnic_bc_trans), GFP_ATOMIC);
 693         if (!*trans)
 694                 return -ENOMEM;
 695
 696         init_completion(&(*trans)->resp_cmpl);
 697         return 0;
 698 }
 699
 700 static inline int qlcnic_sriov_alloc_bc_msg(struct qlcnic_bc_hdr **hdr,
 701                                             u32 size)
 702 {
 703         *hdr = kzalloc(sizeof(struct qlcnic_bc_hdr) * size, GFP_ATOMIC);
 704         if (!*hdr)
 705                 return -ENOMEM;
 706
 707         return 0;
 708 }
 709
 710 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *mbx, u32 type)
 711 {
 712         const struct qlcnic_mailbox_metadata *mbx_tbl;
 713         int i, size;
 714
 715         mbx_tbl = qlcnic_sriov_bc_mbx_tbl;
 716         size = ARRAY_SIZE(qlcnic_sriov_bc_mbx_tbl);
 717
 718         for (i = 0; i < size; i++) {
 719                 if (type == mbx_tbl[i].cmd) {
 720                         mbx->op_type = QLC_BC_CMD;
 721                         mbx->req.num = mbx_tbl[i].in_args;
 722                         mbx->rsp.num = mbx_tbl[i].out_args;
 723                         mbx->req.arg = kcalloc(mbx->req.num, sizeof(u32),
 724                                                GFP_ATOMIC);
 725                         if (!mbx->req.arg)
 726                                 return -ENOMEM;
 727                         mbx->rsp.arg = kcalloc(mbx->rsp.num, sizeof(u32),
 728                                                GFP_ATOMIC);
 729                         if (!mbx->rsp.arg) {
 730                                 kfree(mbx->req.arg);
 731                                 mbx->req.arg = NULL;
 732                                 return -ENOMEM;
 733                         }
 734                         mbx->req.arg[0] = (type | (mbx->req.num << 16) |
 735                                            (3 << 29));
 736                         mbx->rsp.arg[0] = (type & 0xffff) | mbx->rsp.num << 16;
 737                         return 0;
 738                 }
 739         }
 740         return -EINVAL;
 741 }
 742
 743 static int qlcnic_sriov_prepare_bc_hdr(struct qlcnic_bc_trans *trans,
 744                                        struct qlcnic_cmd_args *cmd,
 745                                        u16 seq, u8 msg_type)
 746 {
 747         struct qlcnic_bc_hdr *hdr;
 748         int i;
 749         u32 num_regs, bc_pay_sz;
 750         u16 remainder;
 751         u8 cmd_op, num_frags, t_num_frags;
 752
 753         bc_pay_sz = QLC_BC_PAYLOAD_SZ;
 754         if (msg_type == QLC_BC_COMMAND) {
 755                 trans->req_pay = (struct qlcnic_bc_payload *)cmd->req.arg;
 756                 trans->rsp_pay = (struct qlcnic_bc_payload *)cmd->rsp.arg;
 757                 num_regs = cmd->req.num;
 758                 trans->req_pay_size = (num_regs * 4);
 759                 num_regs = cmd->rsp.num;
 760                 trans->rsp_pay_size = (num_regs * 4);
 761                 cmd_op = cmd->req.arg[0] & 0xff;
 762                 remainder = (trans->req_pay_size) % (bc_pay_sz);
 763                 num_frags = (trans->req_pay_size) / (bc_pay_sz);
 764                 if (remainder)
 765                         num_frags++;
 766                 t_num_frags = num_frags;
 767                 if (qlcnic_sriov_alloc_bc_msg(&trans->req_hdr, num_frags))
 768                         return -ENOMEM;
 769                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 770                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 771                 if (remainder)
 772                         num_frags++;
 773                 if (qlcnic_sriov_alloc_bc_msg(&trans->rsp_hdr, num_frags))
 774                         return -ENOMEM;
 775                 num_frags  = t_num_frags;
 776                 hdr = trans->req_hdr;
 777         }  else {
 778                 cmd->req.arg = (u32 *)trans->req_pay;
 779                 cmd->rsp.arg = (u32 *)trans->rsp_pay;
 780                 cmd_op = cmd->req.arg[0] & 0xff;
 781                 cmd->cmd_op = cmd_op;
 782                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 783                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 784                 if (remainder)
 785                         num_frags++;
 786                 cmd->req.num = trans->req_pay_size / 4;
 787                 cmd->rsp.num = trans->rsp_pay_size / 4;
 788                 hdr = trans->rsp_hdr;
 789                 cmd->op_type = trans->req_hdr->op_type;
 790         }
 791
 792         trans->trans_id = seq;
 793         trans->cmd_id = cmd_op;
 794         for (i = 0; i < num_frags; i++) {
 795                 hdr[i].version = 2;
 796                 hdr[i].msg_type = msg_type;
 797                 hdr[i].op_type = cmd->op_type;
 798                 hdr[i].num_cmds = 1;
 799                 hdr[i].num_frags = num_frags;
 800                 hdr[i].frag_num = i + 1;
 801                 hdr[i].cmd_op = cmd_op;
 802                 hdr[i].seq_id = seq;
 803         }
 804         return 0;
 805 }
 806
 807 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *trans)
 808 {
 809         if (!trans)
 810                 return;
 811         kfree(trans->req_hdr);
 812         kfree(trans->rsp_hdr);
 813         kfree(trans);
 814 }
 815
 816 static int qlcnic_sriov_clear_trans(struct qlcnic_vf_info *vf,
 817                                     struct qlcnic_bc_trans *trans, u8 type)
 818 {
 819         struct qlcnic_trans_list *t_list;
 820         unsigned long flags;
 821         int ret = 0;
 822
 823         if (type == QLC_BC_RESPONSE) {
 824                 t_list = &vf->rcv_act;
 825                 spin_lock_irqsave(&t_list->lock, flags);
 826                 t_list->count--;
 827                 list_del(&trans->list);
 828                 if (t_list->count > 0)
 829                         ret = 1;
 830                 spin_unlock_irqrestore(&t_list->lock, flags);
 831         }
 832         if (type == QLC_BC_COMMAND) {
 833                 while (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
 834                         msleep(100);
 835                 vf->send_cmd = NULL;
 836                 clear_bit(QLC_BC_VF_SEND, &vf->state);
 837         }
 838         return ret;
 839 }
 840
 841 static void qlcnic_sriov_schedule_bc_cmd(struct qlcnic_sriov *sriov,
 842                                          struct qlcnic_vf_info *vf,
 843                                          work_func_t func)
 844 {
 845         if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 846             vf->adapter->need_fw_reset)
 847                 return;
 848
 849         queue_work(sriov->bc.bc_trans_wq, &vf->trans_work);
 850 }
 851
 852 static inline void qlcnic_sriov_wait_for_resp(struct qlcnic_bc_trans *trans)
 853 {
 854         struct completion *cmpl = &trans->resp_cmpl;
 855
 856         if (wait_for_completion_timeout(cmpl, QLC_MBOX_RESP_TIMEOUT))
 857                 trans->trans_state = QLC_END;
 858         else
 859                 trans->trans_state = QLC_ABORT;
 860
 861         return;
 862 }
 863
 864 static void qlcnic_sriov_handle_multi_frags(struct qlcnic_bc_trans *trans,
 865                                             u8 type)
 866 {
 867         if (type == QLC_BC_RESPONSE) {
 868                 trans->curr_rsp_frag++;
 869                 if (trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
 870                         trans->trans_state = QLC_INIT;
 871                 else
 872                         trans->trans_state = QLC_END;
 873         } else {
 874                 trans->curr_req_frag++;
 875                 if (trans->curr_req_frag < trans->req_hdr->num_frags)
 876                         trans->trans_state = QLC_INIT;
 877                 else
 878                         trans->trans_state = QLC_WAIT_FOR_RESP;
 879         }
 880 }
 881
 882 static void qlcnic_sriov_wait_for_channel_free(struct qlcnic_bc_trans *trans,
 883                                                u8 type)
 884 {
 885         struct qlcnic_vf_info *vf = trans->vf;
 886         struct completion *cmpl = &vf->ch_free_cmpl;
 887
 888         if (!wait_for_completion_timeout(cmpl, QLC_MBOX_CH_FREE_TIMEOUT)) {
 889                 trans->trans_state = QLC_ABORT;
 890                 return;
 891         }
 892
 893         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 894         qlcnic_sriov_handle_multi_frags(trans, type);
 895 }
 896
 897 static void qlcnic_sriov_pull_bc_msg(struct qlcnic_adapter *adapter,
 898                                      u32 *hdr, u32 *pay, u32 size)
 899 {
 900         struct qlcnic_hardware_context *ahw = adapter->ahw;
 901         u32 fw_mbx;
 902         u8 i, max = 2, hdr_size, j;
 903
 904         hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 905         max = (size / sizeof(u32)) + hdr_size;
 906
 907         fw_mbx = readl(QLCNIC_MBX_FW(ahw, 0));
 908         for (i = 2, j = 0; j < hdr_size; i++, j++)
 909                 *(hdr++) = readl(QLCNIC_MBX_FW(ahw, i));
 910         for (; j < max; i++, j++)
 911                 *(pay++) = readl(QLCNIC_MBX_FW(ahw, i));
 912 }
 913
 914 static int __qlcnic_sriov_issue_bc_post(struct qlcnic_vf_info *vf)
 915 {
 916         int ret = -EBUSY;
 917         u32 timeout = 10000;
 918
 919         do {
 920                 if (!test_and_set_bit(QLC_BC_VF_CHANNEL, &vf->state)) {
 921                         ret = 0;
 922                         break;
 923                 }
 924                 mdelay(1);
 925         } while (--timeout);
 926
 927         return ret;
 928 }
 929
 930 static int qlcnic_sriov_issue_bc_post(struct qlcnic_bc_trans *trans, u8 type)
 931 {
 932         struct qlcnic_vf_info *vf = trans->vf;
 933         u32 pay_size, hdr_size;
 934         u32 *hdr, *pay;
 935         int ret;
 936         u8 pci_func = trans->func_id;
 937
 938         if (__qlcnic_sriov_issue_bc_post(vf))
 939                 return -EBUSY;
 940
 941         if (type == QLC_BC_COMMAND) {
 942                 hdr = (u32 *)(trans->req_hdr + trans->curr_req_frag);
 943                 pay = (u32 *)(trans->req_pay + trans->curr_req_frag);
 944                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 945                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
 946                                                        trans->curr_req_frag);
 947                 pay_size = (pay_size / sizeof(u32));
 948         } else {
 949                 hdr = (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag);
 950                 pay = (u32 *)(trans->rsp_pay + trans->curr_rsp_frag);
 951                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 952                 pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
 953                                                        trans->curr_rsp_frag);
 954                 pay_size = (pay_size / sizeof(u32));
 955         }
 956
 957         ret = qlcnic_sriov_post_bc_msg(vf->adapter, hdr, pay,
 958                                        pci_func, pay_size);
 959         return ret;
 960 }
 961
 962 static int __qlcnic_sriov_send_bc_msg(struct qlcnic_bc_trans *trans,
 963                                       struct qlcnic_vf_info *vf, u8 type)
 964 {
 965         bool flag = true;
 966         int err = -EIO;
 967
 968         while (flag) {
 969                 if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 970                     vf->adapter->need_fw_reset)
 971                         trans->trans_state = QLC_ABORT;
 972
 973                 switch (trans->trans_state) {
 974                 case QLC_INIT:
 975                         trans->trans_state = QLC_WAIT_FOR_CHANNEL_FREE;
 976                         if (qlcnic_sriov_issue_bc_post(trans, type))
 977                                 trans->trans_state = QLC_ABORT;
 978                         break;
 979                 case QLC_WAIT_FOR_CHANNEL_FREE:
 980                         qlcnic_sriov_wait_for_channel_free(trans, type);
 981                         break;
 982                 case QLC_WAIT_FOR_RESP:
 983                         qlcnic_sriov_wait_for_resp(trans);
 984                         break;
 985                 case QLC_END:
 986                         err = 0;
 987                         flag = false;
 988                         break;
 989                 case QLC_ABORT:
 990                         err = -EIO;
 991                         flag = false;
 992                         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 993                         break;
 994                 default:
 995                         err = -EIO;
 996                         flag = false;
 997                 }
 998         }
 999         return err;
1000 }
1001
1002 static int qlcnic_sriov_send_bc_cmd(struct qlcnic_adapter *adapter,
1003                                     struct qlcnic_bc_trans *trans, int pci_func)
1004 {
1005         struct qlcnic_vf_info *vf;
1006         int err, index = qlcnic_sriov_func_to_index(adapter, pci_func);
1007
1008         if (index < 0)
1009                 return -EIO;
1010
1011         vf = &adapter->ahw->sriov->vf_info[index];
1012         trans->vf = vf;
1013         trans->func_id = pci_func;
1014
1015         if (!test_bit(QLC_BC_VF_STATE, &vf->state)) {
1016                 if (qlcnic_sriov_pf_check(adapter))
1017                         return -EIO;
1018                 if (qlcnic_sriov_vf_check(adapter) &&
1019                     trans->cmd_id != QLCNIC_BC_CMD_CHANNEL_INIT)
1020                         return -EIO;
1021         }
1022
1023         mutex_lock(&vf->send_cmd_lock);
1024         vf->send_cmd = trans;
1025         err = __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_COMMAND);
1026         qlcnic_sriov_clear_trans(vf, trans, QLC_BC_COMMAND);
1027         mutex_unlock(&vf->send_cmd_lock);
1028         return err;
1029 }
1030
1031 static void __qlcnic_sriov_process_bc_cmd(struct qlcnic_adapter *adapter,
1032                                           struct qlcnic_bc_trans *trans,
1033                                           struct qlcnic_cmd_args *cmd)
1034 {
1035 #ifdef CONFIG_QLCNIC_SRIOV
1036         if (qlcnic_sriov_pf_check(adapter)) {
1037                 qlcnic_sriov_pf_process_bc_cmd(adapter, trans, cmd);
1038                 return;
1039         }
1040 #endif
1041         cmd->rsp.arg[0] |= (0x9 << 25);
1042         return;
1043 }
1044
1045 static void qlcnic_sriov_process_bc_cmd(struct work_struct *work)
1046 {
1047         struct qlcnic_vf_info *vf = container_of(work, struct qlcnic_vf_info,
1048                                                  trans_work);
1049         struct qlcnic_bc_trans *trans = NULL;
1050         struct qlcnic_adapter *adapter  = vf->adapter;
1051         struct qlcnic_cmd_args cmd;
1052         u8 req;
1053
1054         if (adapter->need_fw_reset)
1055                 return;
1056
1057         if (test_bit(QLC_BC_VF_FLR, &vf->state))
1058                 return;
1059
1060         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
1061         trans = list_first_entry(&vf->rcv_act.wait_list,
1062                                  struct qlcnic_bc_trans, list);
1063         adapter = vf->adapter;
1064
1065         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, trans->req_hdr->seq_id,
1066                                         QLC_BC_RESPONSE))
1067                 goto cleanup_trans;
1068
1069         __qlcnic_sriov_process_bc_cmd(adapter, trans, &cmd);
1070         trans->trans_state = QLC_INIT;
1071         __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_RESPONSE);
1072
1073 cleanup_trans:
1074         qlcnic_free_mbx_args(&cmd);
1075         req = qlcnic_sriov_clear_trans(vf, trans, QLC_BC_RESPONSE);
1076         qlcnic_sriov_cleanup_transaction(trans);
1077         if (req)
1078                 qlcnic_sriov_schedule_bc_cmd(adapter->ahw->sriov, vf,
1079                                              qlcnic_sriov_process_bc_cmd);
1080 }
1081
1082 static void qlcnic_sriov_handle_bc_resp(struct qlcnic_bc_hdr *hdr,
1083                                         struct qlcnic_vf_info *vf)
1084 {
1085         struct qlcnic_bc_trans *trans;
1086         u32 pay_size;
1087
1088         if (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
1089                 return;
1090
1091         trans = vf->send_cmd;
1092
1093         if (trans == NULL)
1094                 goto clear_send;
1095
1096         if (trans->trans_id != hdr->seq_id)
1097                 goto clear_send;
1098
1099         pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
1100                                                trans->curr_rsp_frag);
1101         qlcnic_sriov_pull_bc_msg(vf->adapter,
1102                                  (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag),
1103                                  (u32 *)(trans->rsp_pay + trans->curr_rsp_frag),
1104                                  pay_size);
1105         if (++trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
1106                 goto clear_send;
1107
1108         complete(&trans->resp_cmpl);
1109
1110 clear_send:
1111         clear_bit(QLC_BC_VF_SEND, &vf->state);
1112 }
1113
1114 int __qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1115                                 struct qlcnic_vf_info *vf,
1116                                 struct qlcnic_bc_trans *trans)
1117 {
1118         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1119
1120         t_list->count++;
1121         list_add_tail(&trans->list, &t_list->wait_list);
1122         if (t_list->count == 1)
1123                 qlcnic_sriov_schedule_bc_cmd(sriov, vf,
1124                                              qlcnic_sriov_process_bc_cmd);
1125         return 0;
1126 }
1127
1128 static int qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1129                                      struct qlcnic_vf_info *vf,
1130                                      struct qlcnic_bc_trans *trans)
1131 {
1132         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1133
1134         spin_lock(&t_list->lock);
1135
1136         __qlcnic_sriov_add_act_list(sriov, vf, trans);
1137
1138         spin_unlock(&t_list->lock);
1139         return 0;
1140 }
1141
1142 static void qlcnic_sriov_handle_pending_trans(struct qlcnic_sriov *sriov,
1143                                               struct qlcnic_vf_info *vf,
1144                                               struct qlcnic_bc_hdr *hdr)
1145 {
1146         struct qlcnic_bc_trans *trans = NULL;
1147         struct list_head *node;
1148         u32 pay_size, curr_frag;
1149         u8 found = 0, active = 0;
1150
1151         spin_lock(&vf->rcv_pend.lock);
1152         if (vf->rcv_pend.count > 0) {
1153                 list_for_each(node, &vf->rcv_pend.wait_list) {
1154                         trans = list_entry(node, struct qlcnic_bc_trans, list);
1155                         if (trans->trans_id == hdr->seq_id) {
1156                                 found = 1;
1157                                 break;
1158                         }
1159                 }
1160         }
1161
1162         if (found) {
1163                 curr_frag = trans->curr_req_frag;
1164                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1165                                                        curr_frag);
1166                 qlcnic_sriov_pull_bc_msg(vf->adapter,
1167                                          (u32 *)(trans->req_hdr + curr_frag),
1168                                          (u32 *)(trans->req_pay + curr_frag),
1169                                          pay_size);
1170                 trans->curr_req_frag++;
1171                 if (trans->curr_req_frag >= hdr->num_frags) {
1172                         vf->rcv_pend.count--;
1173                         list_del(&trans->list);
1174                         active = 1;
1175                 }
1176         }
1177         spin_unlock(&vf->rcv_pend.lock);
1178
1179         if (active)
1180                 if (qlcnic_sriov_add_act_list(sriov, vf, trans))
1181                         qlcnic_sriov_cleanup_transaction(trans);
1182
1183         return;
1184 }
1185
1186 static void qlcnic_sriov_handle_bc_cmd(struct qlcnic_sriov *sriov,
1187                                        struct qlcnic_bc_hdr *hdr,
1188                                        struct qlcnic_vf_info *vf)
1189 {
1190         struct qlcnic_bc_trans *trans;
1191         struct qlcnic_adapter *adapter = vf->adapter;
1192         struct qlcnic_cmd_args cmd;
1193         u32 pay_size;
1194         int err;
1195         u8 cmd_op;
1196
1197         if (adapter->need_fw_reset)
1198                 return;
1199
1200         if (!test_bit(QLC_BC_VF_STATE, &vf->state) &&
1201             hdr->op_type != QLC_BC_CMD &&
1202             hdr->cmd_op != QLCNIC_BC_CMD_CHANNEL_INIT)
1203                 return;
1204
1205         if (hdr->frag_num > 1) {
1206                 qlcnic_sriov_handle_pending_trans(sriov, vf, hdr);
1207                 return;
1208         }
1209
1210         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
1211         cmd_op = hdr->cmd_op;
1212         if (qlcnic_sriov_alloc_bc_trans(&trans))
1213                 return;
1214
1215         if (hdr->op_type == QLC_BC_CMD)
1216                 err = qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op);
1217         else
1218                 err = qlcnic_alloc_mbx_args(&cmd, adapter, cmd_op);
1219
1220         if (err) {
1221                 qlcnic_sriov_cleanup_transaction(trans);
1222                 return;
1223         }
1224
1225         cmd.op_type = hdr->op_type;
1226         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, hdr->seq_id,
1227                                         QLC_BC_COMMAND)) {
1228                 qlcnic_free_mbx_args(&cmd);
1229                 qlcnic_sriov_cleanup_transaction(trans);
1230                 return;
1231         }
1232
1233         pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1234                                          trans->curr_req_frag);
1235         qlcnic_sriov_pull_bc_msg(vf->adapter,
1236                                  (u32 *)(trans->req_hdr + trans->curr_req_frag),
1237                                  (u32 *)(trans->req_pay + trans->curr_req_frag),
1238                                  pay_size);
1239         trans->func_id = vf->pci_func;
1240         trans->vf = vf;
1241         trans->trans_id = hdr->seq_id;
1242         trans->curr_req_frag++;
1243
1244         if (qlcnic_sriov_soft_flr_check(adapter, trans, vf))
1245                 return;
1246
1247         if (trans->curr_req_frag == trans->req_hdr->num_frags) {
1248                 if (qlcnic_sriov_add_act_list(sriov, vf, trans)) {
1249                         qlcnic_free_mbx_args(&cmd);
1250                         qlcnic_sriov_cleanup_transaction(trans);
1251                 }
1252         } else {
1253                 spin_lock(&vf->rcv_pend.lock);
1254                 list_add_tail(&trans->list, &vf->rcv_pend.wait_list);
1255                 vf->rcv_pend.count++;
1256                 spin_unlock(&vf->rcv_pend.lock);
1257         }
1258 }
1259
1260 static void qlcnic_sriov_handle_msg_event(struct qlcnic_sriov *sriov,
1261                                           struct qlcnic_vf_info *vf)
1262 {
1263         struct qlcnic_bc_hdr hdr;
1264         u32 *ptr = (u32 *)&hdr;
1265         u8 msg_type, i;
1266
1267         for (i = 2; i < 6; i++)
1268                 ptr[i - 2] = readl(QLCNIC_MBX_FW(vf->adapter->ahw, i));
1269         msg_type = hdr.msg_type;
1270
1271         switch (msg_type) {
1272         case QLC_BC_COMMAND:
1273                 qlcnic_sriov_handle_bc_cmd(sriov, &hdr, vf);
1274                 break;
1275         case QLC_BC_RESPONSE:
1276                 qlcnic_sriov_handle_bc_resp(&hdr, vf);
1277                 break;
1278         }
1279 }
1280
1281 static void qlcnic_sriov_handle_flr_event(struct qlcnic_sriov *sriov,
1282                                           struct qlcnic_vf_info *vf)
1283 {
1284         struct qlcnic_adapter *adapter = vf->adapter;
1285
1286         if (qlcnic_sriov_pf_check(adapter))
1287                 qlcnic_sriov_pf_handle_flr(sriov, vf);
1288         else
1289                 dev_err(&adapter->pdev->dev,
1290                         "Invalid event to VF. VF should not get FLR event\n");
1291 }
1292
1293 void qlcnic_sriov_handle_bc_event(struct qlcnic_adapter *adapter, u32 event)
1294 {
1295         struct qlcnic_vf_info *vf;
1296         struct qlcnic_sriov *sriov;
1297         int index;
1298         u8 pci_func;
1299
1300         sriov = adapter->ahw->sriov;
1301         pci_func = qlcnic_sriov_target_func_id(event);
1302         index = qlcnic_sriov_func_to_index(adapter, pci_func);
1303
1304         if (index < 0)
1305                 return;
1306
1307         vf = &sriov->vf_info[index];
1308         vf->pci_func = pci_func;
1309
1310         if (qlcnic_sriov_channel_free_check(event))
1311                 complete(&vf->ch_free_cmpl);
1312
1313         if (qlcnic_sriov_flr_check(event)) {
1314                 qlcnic_sriov_handle_flr_event(sriov, vf);
1315                 return;
1316         }
1317
1318         if (qlcnic_sriov_bc_msg_check(event))
1319                 qlcnic_sriov_handle_msg_event(sriov, vf);
1320 }
1321
1322 int qlcnic_sriov_cfg_bc_intr(struct qlcnic_adapter *adapter, u8 enable)
1323 {
1324         struct qlcnic_cmd_args cmd;
1325         int err;
1326
1327         if (!test_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state))
1328                 return 0;
1329
1330         if (qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_BC_EVENT_SETUP))
1331                 return -ENOMEM;
1332
1333         if (enable)
1334                 cmd.req.arg[1] = (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7);
1335
1336         err = qlcnic_83xx_issue_cmd(adapter, &cmd);
1337
1338         if (err != QLCNIC_RCODE_SUCCESS) {
1339                 dev_err(&adapter->pdev->dev,
1340                         "Failed to %s bc events, err=%d\n",
1341                         (enable ? "enable" : "disable"), err);
1342         }
1343
1344         qlcnic_free_mbx_args(&cmd);
1345         return err;
1346 }
1347
1348 static int qlcnic_sriov_retry_bc_cmd(struct qlcnic_adapter *adapter,
1349                                      struct qlcnic_bc_trans *trans)
1350 {
1351         u8 max = QLC_BC_CMD_MAX_RETRY_CNT;
1352         u32 state;
1353
1354         state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1355         if (state == QLC_83XX_IDC_DEV_READY) {
1356                 msleep(20);
1357                 clear_bit(QLC_BC_VF_CHANNEL, &trans->vf->state);
1358                 trans->trans_state = QLC_INIT;
1359                 if (++adapter->fw_fail_cnt > max)
1360                         return -EIO;
1361                 else
1362                         return 0;
1363         }
1364
1365         return -EIO;
1366 }
1367
1368 static int __qlcnic_sriov_issue_cmd(struct qlcnic_adapter *adapter,
1369                                   struct qlcnic_cmd_args *cmd)
1370 {
1371         struct qlcnic_hardware_context *ahw = adapter->ahw;
1372         struct qlcnic_mailbox *mbx = ahw->mailbox;
1373         struct device *dev = &adapter->pdev->dev;
1374         struct qlcnic_bc_trans *trans;
1375         int err;
1376         u32 rsp_data, opcode, mbx_err_code, rsp;
1377         u16 seq = ++adapter->ahw->sriov->bc.trans_counter;
1378         u8 func = ahw->pci_func;
1379
1380         rsp = qlcnic_sriov_alloc_bc_trans(&trans);
1381         if (rsp)
1382                 goto free_cmd;
1383
1384         rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND);
1385         if (rsp)
1386                 goto cleanup_transaction;
1387
1388 retry:
1389         if (!test_bit(QLC_83XX_MBX_READY, &mbx->status)) {
1390                 rsp = -EIO;
1391                 QLCDB(adapter, DRV, "MBX not Ready!(cmd 0x%x) for VF 0x%x\n",
1392                       QLCNIC_MBX_RSP(cmd->req.arg[0]), func);
1393                 goto err_out;
1394         }
1395
1396         err = qlcnic_sriov_send_bc_cmd(adapter, trans, func);
1397         if (err) {
1398                 dev_err(dev, "MBX command 0x%x timed out for VF %d\n",
1399                         (cmd->req.arg[0] & 0xffff), func);
1400                 rsp = QLCNIC_RCODE_TIMEOUT;
1401
1402                 /* After adapter reset PF driver may take some time to
1403                  * respond to VF's request. Retry request till maximum retries.
1404                  */
1405                 if ((trans->req_hdr->cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT) &&
1406                     !qlcnic_sriov_retry_bc_cmd(adapter, trans))
1407                         goto retry;
1408
1409                 goto err_out;
1410         }
1411
1412         rsp_data = cmd->rsp.arg[0];
1413         mbx_err_code = QLCNIC_MBX_STATUS(rsp_data);
1414         opcode = QLCNIC_MBX_RSP(cmd->req.arg[0]);
1415
1416         if ((mbx_err_code == QLCNIC_MBX_RSP_OK) ||
1417             (mbx_err_code == QLCNIC_MBX_PORT_RSP_OK)) {
1418                 rsp = QLCNIC_RCODE_SUCCESS;
1419         } else {
1420                 if (cmd->type == QLC_83XX_MBX_CMD_NO_WAIT) {
1421                         rsp = QLCNIC_RCODE_SUCCESS;
1422                 } else {
1423                         rsp = mbx_err_code;
1424                         if (!rsp)
1425                                 rsp = 1;
1426
1427                         dev_err(dev,
1428                                 "MBX command 0x%x failed with err:0x%x for VF %d\n",
1429                                 opcode, mbx_err_code, func);
1430                 }
1431         }
1432
1433 err_out:
1434         if (rsp == QLCNIC_RCODE_TIMEOUT) {
1435                 ahw->reset_context = 1;
1436                 adapter->need_fw_reset = 1;
1437                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1438         }
1439
1440 cleanup_transaction:
1441         qlcnic_sriov_cleanup_transaction(trans);
1442
1443 free_cmd:
1444         if (cmd->type == QLC_83XX_MBX_CMD_NO_WAIT) {
1445                 qlcnic_free_mbx_args(cmd);
1446                 kfree(cmd);
1447         }
1448
1449         return rsp;
1450 }
1451
1452
1453 static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *adapter,
1454                                   struct qlcnic_cmd_args *cmd)
1455 {
1456         if (cmd->type == QLC_83XX_MBX_CMD_NO_WAIT)
1457                 return qlcnic_sriov_async_issue_cmd(adapter, cmd);
1458         else
1459                 return __qlcnic_sriov_issue_cmd(adapter, cmd);
1460 }
1461
1462 static int qlcnic_sriov_channel_cfg_cmd(struct qlcnic_adapter *adapter, u8 cmd_op)
1463 {
1464         struct qlcnic_cmd_args cmd;
1465         struct qlcnic_vf_info *vf = &adapter->ahw->sriov->vf_info[0];
1466         int ret;
1467
1468         memset(&cmd, 0, sizeof(cmd));
1469         if (qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op))
1470                 return -ENOMEM;
1471
1472         ret = qlcnic_issue_cmd(adapter, &cmd);
1473         if (ret) {
1474                 dev_err(&adapter->pdev->dev,
1475                         "Failed bc channel %s %d\n", cmd_op ? "term" : "init",
1476                         ret);
1477                 goto out;
1478         }
1479
1480         cmd_op = (cmd.rsp.arg[0] & 0xff);
1481         if (cmd.rsp.arg[0] >> 25 == 2)
1482                 return 2;
1483         if (cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT)
1484                 set_bit(QLC_BC_VF_STATE, &vf->state);
1485         else
1486                 clear_bit(QLC_BC_VF_STATE, &vf->state);
1487
1488 out:
1489         qlcnic_free_mbx_args(&cmd);
1490         return ret;
1491 }
1492
1493 static void qlcnic_vf_add_mc_list(struct net_device *netdev, const u8 *mac,
1494                                   enum qlcnic_mac_type mac_type)
1495 {
1496         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1497         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
1498         struct qlcnic_vf_info *vf;
1499         u16 vlan_id;
1500         int i;
1501
1502         vf = &adapter->ahw->sriov->vf_info[0];
1503
1504         if (!qlcnic_sriov_check_any_vlan(vf)) {
1505                 qlcnic_nic_add_mac(adapter, mac, 0, mac_type);
1506         } else {
1507                 spin_lock(&vf->vlan_list_lock);
1508                 for (i = 0; i < sriov->num_allowed_vlans; i++) {
1509                         vlan_id = vf->sriov_vlans[i];
1510                         if (vlan_id)
1511                                 qlcnic_nic_add_mac(adapter, mac, vlan_id,
1512                                                    mac_type);
1513                 }
1514                 spin_unlock(&vf->vlan_list_lock);
1515                 if (qlcnic_84xx_check(adapter))
1516                         qlcnic_nic_add_mac(adapter, mac, 0, mac_type);
1517         }
1518 }
1519
1520 void qlcnic_sriov_cleanup_async_list(struct qlcnic_back_channel *bc)
1521 {
1522         struct list_head *head = &bc->async_list;
1523         struct qlcnic_async_work_list *entry;
1524
1525         flush_workqueue(bc->bc_async_wq);
1526         while (!list_empty(head)) {
1527                 entry = list_entry(head->next, struct qlcnic_async_work_list,
1528                                    list);
1529                 cancel_work_sync(&entry->work);
1530                 list_del(&entry->list);
1531                 kfree(entry);
1532         }
1533 }
1534
1535 void qlcnic_sriov_vf_set_multi(struct net_device *netdev)
1536 {
1537         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1538         struct qlcnic_hardware_context *ahw = adapter->ahw;
1539         static const u8 bcast_addr[ETH_ALEN] = {
1540                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
1541         };
1542         struct netdev_hw_addr *ha;
1543         u32 mode = VPORT_MISS_MODE_DROP;
1544
1545         if (!test_bit(__QLCNIC_FW_ATTACHED, &adapter->state))
1546                 return;
1547
1548         if (netdev->flags & IFF_PROMISC) {
1549                 if (!(adapter->flags & QLCNIC_PROMISC_DISABLED))
1550                         mode = VPORT_MISS_MODE_ACCEPT_ALL;
1551         } else if ((netdev->flags & IFF_ALLMULTI) ||
1552                    (netdev_mc_count(netdev) > ahw->max_mc_count)) {
1553                 mode = VPORT_MISS_MODE_ACCEPT_MULTI;
1554         } else {
1555                 qlcnic_vf_add_mc_list(netdev, bcast_addr, QLCNIC_BROADCAST_MAC);
1556                 if (!netdev_mc_empty(netdev)) {
1557                         qlcnic_flush_mcast_mac(adapter);
1558                         netdev_for_each_mc_addr(ha, netdev)
1559                                 qlcnic_vf_add_mc_list(netdev, ha->addr,
1560                                                       QLCNIC_MULTICAST_MAC);
1561                 }
1562         }
1563
1564         /* configure unicast MAC address, if there is not sufficient space
1565          * to store all the unicast addresses then enable promiscuous mode
1566          */
1567         if (netdev_uc_count(netdev) > ahw->max_uc_count) {
1568                 mode = VPORT_MISS_MODE_ACCEPT_ALL;
1569         } else if (!netdev_uc_empty(netdev)) {
1570                 netdev_for_each_uc_addr(ha, netdev)
1571                         qlcnic_vf_add_mc_list(netdev, ha->addr,
1572                                               QLCNIC_UNICAST_MAC);
1573         }
1574
1575         if (adapter->pdev->is_virtfn) {
1576                 if (mode == VPORT_MISS_MODE_ACCEPT_ALL &&
1577                     !adapter->fdb_mac_learn) {
1578                         qlcnic_alloc_lb_filters_mem(adapter);
1579                         adapter->drv_mac_learn = 1;
1580                         adapter->rx_mac_learn = true;
1581                 } else {
1582                         adapter->drv_mac_learn = 0;
1583                         adapter->rx_mac_learn = false;
1584                 }
1585         }
1586
1587         qlcnic_nic_set_promisc(adapter, mode);
1588 }
1589
1590 static void qlcnic_sriov_handle_async_issue_cmd(struct work_struct *work)
1591 {
1592         struct qlcnic_async_work_list *entry;
1593         struct qlcnic_adapter *adapter;
1594         struct qlcnic_cmd_args *cmd;
1595
1596         entry = container_of(work, struct qlcnic_async_work_list, work);
1597         adapter = entry->ptr;
1598         cmd = entry->cmd;
1599         __qlcnic_sriov_issue_cmd(adapter, cmd);
1600         return;
1601 }
1602
1603 static struct qlcnic_async_work_list *
1604 qlcnic_sriov_get_free_node_async_work(struct qlcnic_back_channel *bc)
1605 {
1606         struct list_head *node;
1607         struct qlcnic_async_work_list *entry = NULL;
1608         u8 empty = 0;
1609
1610         list_for_each(node, &bc->async_list) {
1611                 entry = list_entry(node, struct qlcnic_async_work_list, list);
1612                 if (!work_pending(&entry->work)) {
1613                         empty = 1;
1614                         break;
1615                 }
1616         }
1617
1618         if (!empty) {
1619                 entry = kzalloc(sizeof(struct qlcnic_async_work_list),
1620                                 GFP_ATOMIC);
1621                 if (entry == NULL)
1622                         return NULL;
1623                 list_add_tail(&entry->list, &bc->async_list);
1624         }
1625
1626         return entry;
1627 }
1628
1629 static void qlcnic_sriov_schedule_async_cmd(struct qlcnic_back_channel *bc,
1630                                             work_func_t func, void *data,
1631                                             struct qlcnic_cmd_args *cmd)
1632 {
1633         struct qlcnic_async_work_list *entry = NULL;
1634
1635         entry = qlcnic_sriov_get_free_node_async_work(bc);
1636         if (!entry)
1637                 return;
1638
1639         entry->ptr = data;
1640         entry->cmd = cmd;
1641         INIT_WORK(&entry->work, func);
1642         queue_work(bc->bc_async_wq, &entry->work);
1643 }
1644
1645 static int qlcnic_sriov_async_issue_cmd(struct qlcnic_adapter *adapter,
1646                                         struct qlcnic_cmd_args *cmd)
1647 {
1648
1649         struct qlcnic_back_channel *bc = &adapter->ahw->sriov->bc;
1650
1651         if (adapter->need_fw_reset)
1652                 return -EIO;
1653
1654         qlcnic_sriov_schedule_async_cmd(bc, qlcnic_sriov_handle_async_issue_cmd,
1655                                         adapter, cmd);
1656         return 0;
1657 }
1658
1659 static int qlcnic_sriov_vf_reinit_driver(struct qlcnic_adapter *adapter)
1660 {
1661         int err;
1662
1663         adapter->need_fw_reset = 0;
1664         qlcnic_83xx_reinit_mbx_work(adapter->ahw->mailbox);
1665         qlcnic_83xx_enable_mbx_interrupt(adapter);
1666
1667         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
1668         if (err)
1669                 return err;
1670
1671         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
1672         if (err)
1673                 goto err_out_cleanup_bc_intr;
1674
1675         err = qlcnic_sriov_vf_init_driver(adapter);
1676         if (err)
1677                 goto err_out_term_channel;
1678
1679         return 0;
1680
1681 err_out_term_channel:
1682         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
1683
1684 err_out_cleanup_bc_intr:
1685         qlcnic_sriov_cfg_bc_intr(adapter, 0);
1686         return err;
1687 }
1688
1689 static void qlcnic_sriov_vf_attach(struct qlcnic_adapter *adapter)
1690 {
1691         struct net_device *netdev = adapter->netdev;
1692
1693         if (netif_running(netdev)) {
1694                 if (!qlcnic_up(adapter, netdev))
1695                         qlcnic_restore_indev_addr(netdev, NETDEV_UP);
1696         }
1697
1698         netif_device_attach(netdev);
1699 }
1700
1701 static void qlcnic_sriov_vf_detach(struct qlcnic_adapter *adapter)
1702 {
1703         struct qlcnic_hardware_context *ahw = adapter->ahw;
1704         struct qlcnic_intrpt_config *intr_tbl = ahw->intr_tbl;
1705         struct net_device *netdev = adapter->netdev;
1706         u8 i, max_ints = ahw->num_msix - 1;
1707
1708         netif_device_detach(netdev);
1709         qlcnic_83xx_detach_mailbox_work(adapter);
1710         qlcnic_83xx_disable_mbx_intr(adapter);
1711
1712         if (netif_running(netdev))
1713                 qlcnic_down(adapter, netdev);
1714
1715         for (i = 0; i < max_ints; i++) {
1716                 intr_tbl[i].id = i;
1717                 intr_tbl[i].enabled = 0;
1718                 intr_tbl[i].src = 0;
1719         }
1720         ahw->reset_context = 0;
1721 }
1722
1723 static int qlcnic_sriov_vf_handle_dev_ready(struct qlcnic_adapter *adapter)
1724 {
1725         struct qlcnic_hardware_context *ahw = adapter->ahw;
1726         struct device *dev = &adapter->pdev->dev;
1727         struct qlc_83xx_idc *idc = &ahw->idc;
1728         u8 func = ahw->pci_func;
1729         u32 state;
1730
1731         if ((idc->prev_state == QLC_83XX_IDC_DEV_NEED_RESET) ||
1732             (idc->prev_state == QLC_83XX_IDC_DEV_INIT)) {
1733                 if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1734                         qlcnic_sriov_vf_attach(adapter);
1735                         adapter->fw_fail_cnt = 0;
1736                         dev_info(dev,
1737                                  "%s: Reinitialization of VF 0x%x done after FW reset\n",
1738                                  __func__, func);
1739                 } else {
1740                         dev_err(dev,
1741                                 "%s: Reinitialization of VF 0x%x failed after FW reset\n",
1742                                 __func__, func);
1743                         state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1744                         dev_info(dev, "Current state 0x%x after FW reset\n",
1745                                  state);
1746                 }
1747         }
1748
1749         return 0;
1750 }
1751
1752 static int qlcnic_sriov_vf_handle_context_reset(struct qlcnic_adapter *adapter)
1753 {
1754         struct qlcnic_hardware_context *ahw = adapter->ahw;
1755         struct qlcnic_mailbox *mbx = ahw->mailbox;
1756         struct device *dev = &adapter->pdev->dev;
1757         struct qlc_83xx_idc *idc = &ahw->idc;
1758         u8 func = ahw->pci_func;
1759         u32 state;
1760
1761         adapter->reset_ctx_cnt++;
1762
1763         /* Skip the context reset and check if FW is hung */
1764         if (adapter->reset_ctx_cnt < 3) {
1765                 adapter->need_fw_reset = 1;
1766                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1767                 dev_info(dev,
1768                          "Resetting context, wait here to check if FW is in failed state\n");
1769                 return 0;
1770         }
1771
1772         /* Check if number of resets exceed the threshold.
1773          * If it exceeds the threshold just fail the VF.
1774          */
1775         if (adapter->reset_ctx_cnt > QLC_83XX_VF_RESET_FAIL_THRESH) {
1776                 clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1777                 adapter->tx_timeo_cnt = 0;
1778                 adapter->fw_fail_cnt = 0;
1779                 adapter->reset_ctx_cnt = 0;
1780                 qlcnic_sriov_vf_detach(adapter);
1781                 dev_err(dev,
1782                         "Device context resets have exceeded the threshold, device interface will be shutdown\n");
1783                 return -EIO;
1784         }
1785
1786         dev_info(dev, "Resetting context of VF 0x%x\n", func);
1787         dev_info(dev, "%s: Context reset count %d for VF 0x%x\n",
1788                  __func__, adapter->reset_ctx_cnt, func);
1789         set_bit(__QLCNIC_RESETTING, &adapter->state);
1790         adapter->need_fw_reset = 1;
1791         clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1792         qlcnic_sriov_vf_detach(adapter);
1793         adapter->need_fw_reset = 0;
1794
1795         if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1796                 qlcnic_sriov_vf_attach(adapter);
1797                 adapter->tx_timeo_cnt = 0;
1798                 adapter->reset_ctx_cnt = 0;
1799                 adapter->fw_fail_cnt = 0;
1800                 dev_info(dev, "Done resetting context for VF 0x%x\n", func);
1801         } else {
1802                 dev_err(dev, "%s: Reinitialization of VF 0x%x failed\n",
1803                         __func__, func);
1804                 state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1805                 dev_info(dev, "%s: Current state 0x%x\n", __func__, state);
1806         }
1807
1808         return 0;
1809 }
1810
1811 static int qlcnic_sriov_vf_idc_ready_state(struct qlcnic_adapter *adapter)
1812 {
1813         struct qlcnic_hardware_context *ahw = adapter->ahw;
1814         int ret = 0;
1815
1816         if (ahw->idc.prev_state != QLC_83XX_IDC_DEV_READY)
1817                 ret = qlcnic_sriov_vf_handle_dev_ready(adapter);
1818         else if (ahw->reset_context)
1819                 ret = qlcnic_sriov_vf_handle_context_reset(adapter);
1820
1821         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1822         return ret;
1823 }
1824
1825 static int qlcnic_sriov_vf_idc_failed_state(struct qlcnic_adapter *adapter)
1826 {
1827         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1828
1829         dev_err(&adapter->pdev->dev, "Device is in failed state\n");
1830         if (idc->prev_state == QLC_83XX_IDC_DEV_READY)
1831                 qlcnic_sriov_vf_detach(adapter);
1832
1833         clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1834         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1835         return -EIO;
1836 }
1837
1838 static int
1839 qlcnic_sriov_vf_idc_need_quiescent_state(struct qlcnic_adapter *adapter)
1840 {
1841         struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
1842         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1843
1844         dev_info(&adapter->pdev->dev, "Device is in quiescent state\n");
1845         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1846                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1847                 adapter->tx_timeo_cnt = 0;
1848                 adapter->reset_ctx_cnt = 0;
1849                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1850                 qlcnic_sriov_vf_detach(adapter);
1851         }
1852
1853         return 0;
1854 }
1855
1856 static int qlcnic_sriov_vf_idc_init_reset_state(struct qlcnic_adapter *adapter)
1857 {
1858         struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
1859         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1860         u8 func = adapter->ahw->pci_func;
1861
1862         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1863                 dev_err(&adapter->pdev->dev,
1864                         "Firmware hang detected by VF 0x%x\n", func);
1865                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1866                 adapter->tx_timeo_cnt = 0;
1867                 adapter->reset_ctx_cnt = 0;
1868                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1869                 qlcnic_sriov_vf_detach(adapter);
1870         }
1871         return 0;
1872 }
1873
1874 static int qlcnic_sriov_vf_idc_unknown_state(struct qlcnic_adapter *adapter)
1875 {
1876         dev_err(&adapter->pdev->dev, "%s: Device in unknown state\n", __func__);
1877         return 0;
1878 }
1879
1880 static void qlcnic_sriov_vf_periodic_tasks(struct qlcnic_adapter *adapter)
1881 {
1882         if (adapter->fhash.fnum)
1883                 qlcnic_prune_lb_filters(adapter);
1884 }
1885
1886 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *work)
1887 {
1888         struct qlcnic_adapter *adapter;
1889         struct qlc_83xx_idc *idc;
1890         int ret = 0;
1891
1892         adapter = container_of(work, struct qlcnic_adapter, fw_work.work);
1893         idc = &adapter->ahw->idc;
1894         idc->curr_state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1895
1896         switch (idc->curr_state) {
1897         case QLC_83XX_IDC_DEV_READY:
1898                 ret = qlcnic_sriov_vf_idc_ready_state(adapter);
1899                 break;
1900         case QLC_83XX_IDC_DEV_NEED_RESET:
1901         case QLC_83XX_IDC_DEV_INIT:
1902                 ret = qlcnic_sriov_vf_idc_init_reset_state(adapter);
1903                 break;
1904         case QLC_83XX_IDC_DEV_NEED_QUISCENT:
1905                 ret = qlcnic_sriov_vf_idc_need_quiescent_state(adapter);
1906                 break;
1907         case QLC_83XX_IDC_DEV_FAILED:
1908                 ret = qlcnic_sriov_vf_idc_failed_state(adapter);
1909                 break;
1910         case QLC_83XX_IDC_DEV_QUISCENT:
1911                 break;
1912         default:
1913                 ret = qlcnic_sriov_vf_idc_unknown_state(adapter);
1914         }
1915
1916         idc->prev_state = idc->curr_state;
1917         qlcnic_sriov_vf_periodic_tasks(adapter);
1918
1919         if (!ret && test_bit(QLC_83XX_MODULE_LOADED, &idc->status))
1920                 qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
1921                                      idc->delay);
1922 }
1923
1924 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *adapter)
1925 {
1926         while (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
1927                 msleep(20);
1928
1929         clear_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
1930         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1931         cancel_delayed_work_sync(&adapter->fw_work);
1932 }
1933
1934 static int qlcnic_sriov_check_vlan_id(struct qlcnic_sriov *sriov,
1935                                       struct qlcnic_vf_info *vf, u16 vlan_id)
1936 {
1937         int i, err = -EINVAL;
1938
1939         if (!vf->sriov_vlans)
1940                 return err;
1941
1942         spin_lock_bh(&vf->vlan_list_lock);
1943
1944         for (i = 0; i < sriov->num_allowed_vlans; i++) {
1945                 if (vf->sriov_vlans[i] == vlan_id) {
1946                         err = 0;
1947                         break;
1948                 }
1949         }
1950
1951         spin_unlock_bh(&vf->vlan_list_lock);
1952         return err;
1953 }
1954
1955 static int qlcnic_sriov_validate_num_vlans(struct qlcnic_sriov *sriov,
1956                                            struct qlcnic_vf_info *vf)
1957 {
1958         int err = 0;
1959
1960         spin_lock_bh(&vf->vlan_list_lock);
1961
1962         if (vf->num_vlan >= sriov->num_allowed_vlans)
1963                 err = -EINVAL;
1964
1965         spin_unlock_bh(&vf->vlan_list_lock);
1966         return err;
1967 }
1968
1969 static int qlcnic_sriov_validate_vlan_cfg(struct qlcnic_adapter *adapter,
1970                                           u16 vid, u8 enable)
1971 {
1972         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
1973         struct qlcnic_vf_info *vf;
1974         bool vlan_exist;
1975         u8 allowed = 0;
1976         int i;
1977
1978         vf = &adapter->ahw->sriov->vf_info[0];
1979         vlan_exist = qlcnic_sriov_check_any_vlan(vf);
1980         if (sriov->vlan_mode != QLC_GUEST_VLAN_MODE)
1981                 return -EINVAL;
1982
1983         if (enable) {
1984                 if (qlcnic_83xx_vf_check(adapter) && vlan_exist)
1985                         return -EINVAL;
1986
1987                 if (qlcnic_sriov_validate_num_vlans(sriov, vf))
1988                         return -EINVAL;
1989
1990                 if (sriov->any_vlan) {
1991                         for (i = 0; i < sriov->num_allowed_vlans; i++) {
1992                                 if (sriov->allowed_vlans[i] == vid)
1993                                         allowed = 1;
1994                         }
1995
1996                         if (!allowed)
1997                                 return -EINVAL;
1998                 }
1999         } else {
2000                 if (!vlan_exist || qlcnic_sriov_check_vlan_id(sriov, vf, vid))
2001                         return -EINVAL;
2002         }
2003
2004         return 0;
2005 }
2006
2007 static void qlcnic_sriov_vlan_operation(struct qlcnic_vf_info *vf, u16 vlan_id,
2008                                         enum qlcnic_vlan_operations opcode)
2009 {
2010         struct qlcnic_adapter *adapter = vf->adapter;
2011         struct qlcnic_sriov *sriov;
2012
2013         sriov = adapter->ahw->sriov;
2014
2015         if (!vf->sriov_vlans)
2016                 return;
2017
2018         spin_lock_bh(&vf->vlan_list_lock);
2019
2020         switch (opcode) {
2021         case QLC_VLAN_ADD:
2022                 qlcnic_sriov_add_vlan_id(sriov, vf, vlan_id);
2023                 break;
2024         case QLC_VLAN_DELETE:
2025                 qlcnic_sriov_del_vlan_id(sriov, vf, vlan_id);
2026                 break;
2027         default:
2028                 netdev_err(adapter->netdev, "Invalid VLAN operation\n");
2029         }
2030
2031         spin_unlock_bh(&vf->vlan_list_lock);
2032         return;
2033 }
2034
2035 int qlcnic_sriov_cfg_vf_guest_vlan(struct qlcnic_adapter *adapter,
2036                                    u16 vid, u8 enable)
2037 {
2038         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
2039         struct net_device *netdev = adapter->netdev;
2040         struct qlcnic_vf_info *vf;
2041         struct qlcnic_cmd_args cmd;
2042         int ret;
2043
2044         memset(&cmd, 0, sizeof(cmd));
2045         if (vid == 0)
2046                 return 0;
2047
2048         vf = &adapter->ahw->sriov->vf_info[0];
2049         ret = qlcnic_sriov_validate_vlan_cfg(adapter, vid, enable);
2050         if (ret)
2051                 return ret;
2052
2053         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd,
2054                                              QLCNIC_BC_CMD_CFG_GUEST_VLAN);
2055         if (ret)
2056                 return ret;
2057
2058         cmd.req.arg[1] = (enable & 1) | vid << 16;
2059
2060         qlcnic_sriov_cleanup_async_list(&sriov->bc);
2061         ret = qlcnic_issue_cmd(adapter, &cmd);
2062         if (ret) {
2063                 dev_err(&adapter->pdev->dev,
2064                         "Failed to configure guest VLAN, err=%d\n", ret);
2065         } else {
2066                 netif_addr_lock_bh(netdev);
2067                 qlcnic_free_mac_list(adapter);
2068                 netif_addr_unlock_bh(netdev);
2069
2070                 if (enable)
2071                         qlcnic_sriov_vlan_operation(vf, vid, QLC_VLAN_ADD);
2072                 else
2073                         qlcnic_sriov_vlan_operation(vf, vid, QLC_VLAN_DELETE);
2074
2075                 netif_addr_lock_bh(netdev);
2076                 qlcnic_set_multi(netdev);
2077                 netif_addr_unlock_bh(netdev);
2078         }
2079
2080         qlcnic_free_mbx_args(&cmd);
2081         return ret;
2082 }
2083
2084 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *adapter)
2085 {
2086         struct list_head *head = &adapter->mac_list;
2087         struct qlcnic_mac_vlan_list *cur;
2088
2089         while (!list_empty(head)) {
2090                 cur = list_entry(head->next, struct qlcnic_mac_vlan_list, list);
2091                 qlcnic_sre_macaddr_change(adapter, cur->mac_addr, cur->vlan_id,
2092                                           QLCNIC_MAC_DEL);
2093                 list_del(&cur->list);
2094                 kfree(cur);
2095         }
2096 }
2097
2098
2099 static int qlcnic_sriov_vf_shutdown(struct pci_dev *pdev)
2100 {
2101         struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
2102         struct net_device *netdev = adapter->netdev;
2103         int retval;
2104
2105         netif_device_detach(netdev);
2106         qlcnic_cancel_idc_work(adapter);
2107
2108         if (netif_running(netdev))
2109                 qlcnic_down(adapter, netdev);
2110
2111         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
2112         qlcnic_sriov_cfg_bc_intr(adapter, 0);
2113         qlcnic_83xx_disable_mbx_intr(adapter);
2114         cancel_delayed_work_sync(&adapter->idc_aen_work);
2115
2116         retval = pci_save_state(pdev);
2117         if (retval)
2118                 return retval;
2119
2120         return 0;
2121 }
2122
2123 static int qlcnic_sriov_vf_resume(struct qlcnic_adapter *adapter)
2124 {
2125         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
2126         struct net_device *netdev = adapter->netdev;
2127         int err;
2128
2129         set_bit(QLC_83XX_MODULE_LOADED, &idc->status);
2130         qlcnic_83xx_enable_mbx_interrupt(adapter);
2131         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
2132         if (err)
2133                 return err;
2134
2135         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
2136         if (!err) {
2137                 if (netif_running(netdev)) {
2138                         err = qlcnic_up(adapter, netdev);
2139                         if (!err)
2140                                 qlcnic_restore_indev_addr(netdev, NETDEV_UP);
2141                 }
2142         }
2143
2144         netif_device_attach(netdev);
2145         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
2146                              idc->delay);
2147         return err;
2148 }
2149
2150 void qlcnic_sriov_alloc_vlans(struct qlcnic_adapter *adapter)
2151 {
2152         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
2153         struct qlcnic_vf_info *vf;
2154         int i;
2155
2156         for (i = 0; i < sriov->num_vfs; i++) {
2157                 vf = &sriov->vf_info[i];
2158                 vf->sriov_vlans = kcalloc(sriov->num_allowed_vlans,
2159                                           sizeof(*vf->sriov_vlans), GFP_KERNEL);
2160         }
2161 }
2162
2163 void qlcnic_sriov_free_vlans(struct qlcnic_adapter *adapter)
2164 {
2165         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
2166         struct qlcnic_vf_info *vf;
2167         int i;
2168
2169         for (i = 0; i < sriov->num_vfs; i++) {
2170                 vf = &sriov->vf_info[i];
2171                 kfree(vf->sriov_vlans);
2172                 vf->sriov_vlans = NULL;
2173         }
2174 }
2175
2176 void qlcnic_sriov_add_vlan_id(struct qlcnic_sriov *sriov,
2177                               struct qlcnic_vf_info *vf, u16 vlan_id)
2178 {
2179         int i;
2180
2181         for (i = 0; i < sriov->num_allowed_vlans; i++) {
2182                 if (!vf->sriov_vlans[i]) {
2183                         vf->sriov_vlans[i] = vlan_id;
2184                         vf->num_vlan++;
2185                         return;
2186                 }
2187         }
2188 }
2189
2190 void qlcnic_sriov_del_vlan_id(struct qlcnic_sriov *sriov,
2191                               struct qlcnic_vf_info *vf, u16 vlan_id)
2192 {
2193         int i;
2194
2195         for (i = 0; i < sriov->num_allowed_vlans; i++) {
2196                 if (vf->sriov_vlans[i] == vlan_id) {
2197                         vf->sriov_vlans[i] = 0;
2198                         vf->num_vlan--;
2199                         return;
2200                 }
2201         }
2202 }
2203
2204 bool qlcnic_sriov_check_any_vlan(struct qlcnic_vf_info *vf)
2205 {
2206         bool err = false;
2207
2208         spin_lock_bh(&vf->vlan_list_lock);
2209
2210         if (vf->num_vlan)
2211                 err = true;
2212
2213         spin_unlock_bh(&vf->vlan_list_lock);
2214         return err;
2215 }