1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
30 #include "workarounds.h"
32 /**************************************************************************
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int ef4_loopback_mode_max = LOOPBACK_MAX;
41 const char *const ef4_loopback_mode_names[] = {
42 [LOOPBACK_NONE] = "NONE",
43 [LOOPBACK_DATA] = "DATAPATH",
44 [LOOPBACK_GMAC] = "GMAC",
45 [LOOPBACK_XGMII] = "XGMII",
46 [LOOPBACK_XGXS] = "XGXS",
47 [LOOPBACK_XAUI] = "XAUI",
48 [LOOPBACK_GMII] = "GMII",
49 [LOOPBACK_SGMII] = "SGMII",
50 [LOOPBACK_XGBR] = "XGBR",
51 [LOOPBACK_XFI] = "XFI",
52 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR] = "XFI_FAR",
56 [LOOPBACK_GPHY] = "GPHY",
57 [LOOPBACK_PHYXS] = "PHYXS",
58 [LOOPBACK_PCS] = "PCS",
59 [LOOPBACK_PMAPMD] = "PMA/PMD",
60 [LOOPBACK_XPORT] = "XPORT",
61 [LOOPBACK_XGMII_WS] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS] = "GMII_WS",
66 [LOOPBACK_XFI_WS] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 const unsigned int ef4_reset_type_max = RESET_TYPE_MAX;
72 const char *const ef4_reset_type_names[] = {
73 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
74 [RESET_TYPE_ALL] = "ALL",
75 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
76 [RESET_TYPE_WORLD] = "WORLD",
77 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
78 [RESET_TYPE_DATAPATH] = "DATAPATH",
79 [RESET_TYPE_DISABLE] = "DISABLE",
80 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
81 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
82 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
83 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
84 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
87 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
88 * queued onto this work queue. This is not a per-nic work queue, because
89 * ef4_reset_work() acquires the rtnl lock, so resets are naturally serialised.
91 static struct workqueue_struct *reset_workqueue;
93 /* How often and how many times to poll for a reset while waiting for a
94 * BIST that another function started to complete.
96 #define BIST_WAIT_DELAY_MS 100
97 #define BIST_WAIT_DELAY_COUNT 100
99 /**************************************************************************
101 * Configurable values
103 *************************************************************************/
106 * Use separate channels for TX and RX events
108 * Set this to 1 to use separate channels for TX and RX. It allows us
109 * to control interrupt affinity separately for TX and RX.
111 * This is only used in MSI-X interrupt mode
113 bool ef4_separate_tx_channels;
114 module_param(ef4_separate_tx_channels, bool, 0444);
115 MODULE_PARM_DESC(ef4_separate_tx_channels,
116 "Use separate channels for TX and RX");
118 /* This is the weight assigned to each of the (per-channel) virtual
121 static int napi_weight = 64;
123 /* This is the time (in jiffies) between invocations of the hardware
125 * On Falcon-based NICs, this will:
126 * - Check the on-board hardware monitor;
127 * - Poll the link state and reconfigure the hardware as necessary.
128 * On Siena-based NICs for power systems with EEH support, this will give EEH a
131 static unsigned int ef4_monitor_interval = 1 * HZ;
133 /* Initial interrupt moderation settings. They can be modified after
134 * module load with ethtool.
136 * The default for RX should strike a balance between increasing the
137 * round-trip latency and reducing overhead.
139 static unsigned int rx_irq_mod_usec = 60;
141 /* Initial interrupt moderation settings. They can be modified after
142 * module load with ethtool.
144 * This default is chosen to ensure that a 10G link does not go idle
145 * while a TX queue is stopped after it has become full. A queue is
146 * restarted when it drops below half full. The time this takes (assuming
147 * worst case 3 descriptors per packet and 1024 descriptors) is
148 * 512 / 3 * 1.2 = 205 usec.
150 static unsigned int tx_irq_mod_usec = 150;
152 /* This is the first interrupt mode to try out of:
157 static unsigned int interrupt_mode;
159 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
160 * i.e. the number of CPUs among which we may distribute simultaneous
161 * interrupt handling.
163 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
164 * The default (0) means to assign an interrupt to each core.
166 static unsigned int rss_cpus;
167 module_param(rss_cpus, uint, 0444);
168 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
170 static bool phy_flash_cfg;
171 module_param(phy_flash_cfg, bool, 0644);
172 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
174 static unsigned irq_adapt_low_thresh = 8000;
175 module_param(irq_adapt_low_thresh, uint, 0644);
176 MODULE_PARM_DESC(irq_adapt_low_thresh,
177 "Threshold score for reducing IRQ moderation");
179 static unsigned irq_adapt_high_thresh = 16000;
180 module_param(irq_adapt_high_thresh, uint, 0644);
181 MODULE_PARM_DESC(irq_adapt_high_thresh,
182 "Threshold score for increasing IRQ moderation");
184 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
185 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
186 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
187 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
188 module_param(debug, uint, 0);
189 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
191 /**************************************************************************
193 * Utility functions and prototypes
195 *************************************************************************/
197 static int ef4_soft_enable_interrupts(struct ef4_nic *efx);
198 static void ef4_soft_disable_interrupts(struct ef4_nic *efx);
199 static void ef4_remove_channel(struct ef4_channel *channel);
200 static void ef4_remove_channels(struct ef4_nic *efx);
201 static const struct ef4_channel_type ef4_default_channel_type;
202 static void ef4_remove_port(struct ef4_nic *efx);
203 static void ef4_init_napi_channel(struct ef4_channel *channel);
204 static void ef4_fini_napi(struct ef4_nic *efx);
205 static void ef4_fini_napi_channel(struct ef4_channel *channel);
206 static void ef4_fini_struct(struct ef4_nic *efx);
207 static void ef4_start_all(struct ef4_nic *efx);
208 static void ef4_stop_all(struct ef4_nic *efx);
210 #define EF4_ASSERT_RESET_SERIALISED(efx) \
212 if ((efx->state == STATE_READY) || \
213 (efx->state == STATE_RECOVERY) || \
214 (efx->state == STATE_DISABLED)) \
218 static int ef4_check_disabled(struct ef4_nic *efx)
220 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
221 netif_err(efx, drv, efx->net_dev,
222 "device is disabled due to earlier errors\n");
228 /**************************************************************************
230 * Event queue processing
232 *************************************************************************/
234 /* Process channel's event queue
236 * This function is responsible for processing the event queue of a
237 * single channel. The caller must guarantee that this function will
238 * never be concurrently called more than once on the same channel,
239 * though different channels may be being processed concurrently.
241 static int ef4_process_channel(struct ef4_channel *channel, int budget)
243 struct ef4_tx_queue *tx_queue;
246 if (unlikely(!channel->enabled))
249 ef4_for_each_channel_tx_queue(tx_queue, channel) {
250 tx_queue->pkts_compl = 0;
251 tx_queue->bytes_compl = 0;
254 spent = ef4_nic_process_eventq(channel, budget);
255 if (spent && ef4_channel_has_rx_queue(channel)) {
256 struct ef4_rx_queue *rx_queue =
257 ef4_channel_get_rx_queue(channel);
259 ef4_rx_flush_packet(channel);
260 ef4_fast_push_rx_descriptors(rx_queue, true);
264 ef4_for_each_channel_tx_queue(tx_queue, channel) {
265 if (tx_queue->bytes_compl) {
266 netdev_tx_completed_queue(tx_queue->core_txq,
267 tx_queue->pkts_compl, tx_queue->bytes_compl);
276 * NAPI guarantees serialisation of polls of the same device, which
277 * provides the guarantee required by ef4_process_channel().
279 static void ef4_update_irq_mod(struct ef4_nic *efx, struct ef4_channel *channel)
281 int step = efx->irq_mod_step_us;
283 if (channel->irq_mod_score < irq_adapt_low_thresh) {
284 if (channel->irq_moderation_us > step) {
285 channel->irq_moderation_us -= step;
286 efx->type->push_irq_moderation(channel);
288 } else if (channel->irq_mod_score > irq_adapt_high_thresh) {
289 if (channel->irq_moderation_us <
290 efx->irq_rx_moderation_us) {
291 channel->irq_moderation_us += step;
292 efx->type->push_irq_moderation(channel);
296 channel->irq_count = 0;
297 channel->irq_mod_score = 0;
300 static int ef4_poll(struct napi_struct *napi, int budget)
302 struct ef4_channel *channel =
303 container_of(napi, struct ef4_channel, napi_str);
304 struct ef4_nic *efx = channel->efx;
307 netif_vdbg(efx, intr, efx->net_dev,
308 "channel %d NAPI poll executing on CPU %d\n",
309 channel->channel, raw_smp_processor_id());
311 spent = ef4_process_channel(channel, budget);
313 if (spent < budget) {
314 if (ef4_channel_has_rx_queue(channel) &&
315 efx->irq_rx_adaptive &&
316 unlikely(++channel->irq_count == 1000)) {
317 ef4_update_irq_mod(efx, channel);
320 ef4_filter_rfs_expire(channel);
322 /* There is no race here; although napi_disable() will
323 * only wait for napi_complete(), this isn't a problem
324 * since ef4_nic_eventq_read_ack() will have no effect if
325 * interrupts have already been disabled.
327 napi_complete_done(napi, spent);
328 ef4_nic_eventq_read_ack(channel);
334 /* Create event queue
335 * Event queue memory allocations are done only once. If the channel
336 * is reset, the memory buffer will be reused; this guards against
337 * errors during channel reset and also simplifies interrupt handling.
339 static int ef4_probe_eventq(struct ef4_channel *channel)
341 struct ef4_nic *efx = channel->efx;
342 unsigned long entries;
344 netif_dbg(efx, probe, efx->net_dev,
345 "chan %d create event queue\n", channel->channel);
347 /* Build an event queue with room for one event per tx and rx buffer,
348 * plus some extra for link state events and MCDI completions. */
349 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
350 EF4_BUG_ON_PARANOID(entries > EF4_MAX_EVQ_SIZE);
351 channel->eventq_mask = max(entries, EF4_MIN_EVQ_SIZE) - 1;
353 return ef4_nic_probe_eventq(channel);
356 /* Prepare channel's event queue */
357 static int ef4_init_eventq(struct ef4_channel *channel)
359 struct ef4_nic *efx = channel->efx;
362 EF4_WARN_ON_PARANOID(channel->eventq_init);
364 netif_dbg(efx, drv, efx->net_dev,
365 "chan %d init event queue\n", channel->channel);
367 rc = ef4_nic_init_eventq(channel);
369 efx->type->push_irq_moderation(channel);
370 channel->eventq_read_ptr = 0;
371 channel->eventq_init = true;
376 /* Enable event queue processing and NAPI */
377 void ef4_start_eventq(struct ef4_channel *channel)
379 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
380 "chan %d start event queue\n", channel->channel);
382 /* Make sure the NAPI handler sees the enabled flag set */
383 channel->enabled = true;
386 napi_enable(&channel->napi_str);
387 ef4_nic_eventq_read_ack(channel);
390 /* Disable event queue processing and NAPI */
391 void ef4_stop_eventq(struct ef4_channel *channel)
393 if (!channel->enabled)
396 napi_disable(&channel->napi_str);
397 channel->enabled = false;
400 static void ef4_fini_eventq(struct ef4_channel *channel)
402 if (!channel->eventq_init)
405 netif_dbg(channel->efx, drv, channel->efx->net_dev,
406 "chan %d fini event queue\n", channel->channel);
408 ef4_nic_fini_eventq(channel);
409 channel->eventq_init = false;
412 static void ef4_remove_eventq(struct ef4_channel *channel)
414 netif_dbg(channel->efx, drv, channel->efx->net_dev,
415 "chan %d remove event queue\n", channel->channel);
417 ef4_nic_remove_eventq(channel);
420 /**************************************************************************
424 *************************************************************************/
426 /* Allocate and initialise a channel structure. */
427 static struct ef4_channel *
428 ef4_alloc_channel(struct ef4_nic *efx, int i, struct ef4_channel *old_channel)
430 struct ef4_channel *channel;
431 struct ef4_rx_queue *rx_queue;
432 struct ef4_tx_queue *tx_queue;
435 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
440 channel->channel = i;
441 channel->type = &ef4_default_channel_type;
443 for (j = 0; j < EF4_TXQ_TYPES; j++) {
444 tx_queue = &channel->tx_queue[j];
446 tx_queue->queue = i * EF4_TXQ_TYPES + j;
447 tx_queue->channel = channel;
450 rx_queue = &channel->rx_queue;
452 timer_setup(&rx_queue->slow_fill, ef4_rx_slow_fill, 0);
457 /* Allocate and initialise a channel structure, copying parameters
458 * (but not resources) from an old channel structure.
460 static struct ef4_channel *
461 ef4_copy_channel(const struct ef4_channel *old_channel)
463 struct ef4_channel *channel;
464 struct ef4_rx_queue *rx_queue;
465 struct ef4_tx_queue *tx_queue;
468 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
472 *channel = *old_channel;
474 channel->napi_dev = NULL;
475 INIT_HLIST_NODE(&channel->napi_str.napi_hash_node);
476 channel->napi_str.napi_id = 0;
477 channel->napi_str.state = 0;
478 memset(&channel->eventq, 0, sizeof(channel->eventq));
480 for (j = 0; j < EF4_TXQ_TYPES; j++) {
481 tx_queue = &channel->tx_queue[j];
482 if (tx_queue->channel)
483 tx_queue->channel = channel;
484 tx_queue->buffer = NULL;
485 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
488 rx_queue = &channel->rx_queue;
489 rx_queue->buffer = NULL;
490 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
491 timer_setup(&rx_queue->slow_fill, ef4_rx_slow_fill, 0);
496 static int ef4_probe_channel(struct ef4_channel *channel)
498 struct ef4_tx_queue *tx_queue;
499 struct ef4_rx_queue *rx_queue;
502 netif_dbg(channel->efx, probe, channel->efx->net_dev,
503 "creating channel %d\n", channel->channel);
505 rc = channel->type->pre_probe(channel);
509 rc = ef4_probe_eventq(channel);
513 ef4_for_each_channel_tx_queue(tx_queue, channel) {
514 rc = ef4_probe_tx_queue(tx_queue);
519 ef4_for_each_channel_rx_queue(rx_queue, channel) {
520 rc = ef4_probe_rx_queue(rx_queue);
528 ef4_remove_channel(channel);
533 ef4_get_channel_name(struct ef4_channel *channel, char *buf, size_t len)
535 struct ef4_nic *efx = channel->efx;
539 number = channel->channel;
540 if (efx->tx_channel_offset == 0) {
542 } else if (channel->channel < efx->tx_channel_offset) {
546 number -= efx->tx_channel_offset;
548 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
551 static void ef4_set_channel_names(struct ef4_nic *efx)
553 struct ef4_channel *channel;
555 ef4_for_each_channel(channel, efx)
556 channel->type->get_name(channel,
557 efx->msi_context[channel->channel].name,
558 sizeof(efx->msi_context[0].name));
561 static int ef4_probe_channels(struct ef4_nic *efx)
563 struct ef4_channel *channel;
566 /* Restart special buffer allocation */
567 efx->next_buffer_table = 0;
569 /* Probe channels in reverse, so that any 'extra' channels
570 * use the start of the buffer table. This allows the traffic
571 * channels to be resized without moving them or wasting the
572 * entries before them.
574 ef4_for_each_channel_rev(channel, efx) {
575 rc = ef4_probe_channel(channel);
577 netif_err(efx, probe, efx->net_dev,
578 "failed to create channel %d\n",
583 ef4_set_channel_names(efx);
588 ef4_remove_channels(efx);
592 /* Channels are shutdown and reinitialised whilst the NIC is running
593 * to propagate configuration changes (mtu, checksum offload), or
594 * to clear hardware error conditions
596 static void ef4_start_datapath(struct ef4_nic *efx)
598 netdev_features_t old_features = efx->net_dev->features;
599 bool old_rx_scatter = efx->rx_scatter;
600 struct ef4_tx_queue *tx_queue;
601 struct ef4_rx_queue *rx_queue;
602 struct ef4_channel *channel;
605 /* Calculate the rx buffer allocation parameters required to
606 * support the current MTU, including padding for header
607 * alignment and overruns.
609 efx->rx_dma_len = (efx->rx_prefix_size +
610 EF4_MAX_FRAME_LEN(efx->net_dev->mtu) +
611 efx->type->rx_buffer_padding);
612 rx_buf_len = (sizeof(struct ef4_rx_page_state) +
613 efx->rx_ip_align + efx->rx_dma_len);
614 if (rx_buf_len <= PAGE_SIZE) {
615 efx->rx_scatter = efx->type->always_rx_scatter;
616 efx->rx_buffer_order = 0;
617 } else if (efx->type->can_rx_scatter) {
618 BUILD_BUG_ON(EF4_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
619 BUILD_BUG_ON(sizeof(struct ef4_rx_page_state) +
620 2 * ALIGN(NET_IP_ALIGN + EF4_RX_USR_BUF_SIZE,
621 EF4_RX_BUF_ALIGNMENT) >
623 efx->rx_scatter = true;
624 efx->rx_dma_len = EF4_RX_USR_BUF_SIZE;
625 efx->rx_buffer_order = 0;
627 efx->rx_scatter = false;
628 efx->rx_buffer_order = get_order(rx_buf_len);
631 ef4_rx_config_page_split(efx);
632 if (efx->rx_buffer_order)
633 netif_dbg(efx, drv, efx->net_dev,
634 "RX buf len=%u; page order=%u batch=%u\n",
635 efx->rx_dma_len, efx->rx_buffer_order,
636 efx->rx_pages_per_batch);
638 netif_dbg(efx, drv, efx->net_dev,
639 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
640 efx->rx_dma_len, efx->rx_page_buf_step,
641 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
643 /* Restore previously fixed features in hw_features and remove
644 * features which are fixed now
646 efx->net_dev->hw_features |= efx->net_dev->features;
647 efx->net_dev->hw_features &= ~efx->fixed_features;
648 efx->net_dev->features |= efx->fixed_features;
649 if (efx->net_dev->features != old_features)
650 netdev_features_change(efx->net_dev);
652 /* RX filters may also have scatter-enabled flags */
653 if (efx->rx_scatter != old_rx_scatter)
654 efx->type->filter_update_rx_scatter(efx);
656 /* We must keep at least one descriptor in a TX ring empty.
657 * We could avoid this when the queue size does not exactly
658 * match the hardware ring size, but it's not that important.
659 * Therefore we stop the queue when one more skb might fill
660 * the ring completely. We wake it when half way back to
663 efx->txq_stop_thresh = efx->txq_entries - ef4_tx_max_skb_descs(efx);
664 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
666 /* Initialise the channels */
667 ef4_for_each_channel(channel, efx) {
668 ef4_for_each_channel_tx_queue(tx_queue, channel) {
669 ef4_init_tx_queue(tx_queue);
670 atomic_inc(&efx->active_queues);
673 ef4_for_each_channel_rx_queue(rx_queue, channel) {
674 ef4_init_rx_queue(rx_queue);
675 atomic_inc(&efx->active_queues);
676 ef4_stop_eventq(channel);
677 ef4_fast_push_rx_descriptors(rx_queue, false);
678 ef4_start_eventq(channel);
681 WARN_ON(channel->rx_pkt_n_frags);
684 if (netif_device_present(efx->net_dev))
685 netif_tx_wake_all_queues(efx->net_dev);
688 static void ef4_stop_datapath(struct ef4_nic *efx)
690 struct ef4_channel *channel;
691 struct ef4_tx_queue *tx_queue;
692 struct ef4_rx_queue *rx_queue;
695 EF4_ASSERT_RESET_SERIALISED(efx);
696 BUG_ON(efx->port_enabled);
699 ef4_for_each_channel(channel, efx) {
700 ef4_for_each_channel_rx_queue(rx_queue, channel)
701 rx_queue->refill_enabled = false;
704 ef4_for_each_channel(channel, efx) {
705 /* RX packet processing is pipelined, so wait for the
706 * NAPI handler to complete. At least event queue 0
707 * might be kept active by non-data events, so don't
708 * use napi_synchronize() but actually disable NAPI
711 if (ef4_channel_has_rx_queue(channel)) {
712 ef4_stop_eventq(channel);
713 ef4_start_eventq(channel);
717 rc = efx->type->fini_dmaq(efx);
718 if (rc && EF4_WORKAROUND_7803(efx)) {
719 /* Schedule a reset to recover from the flush failure. The
720 * descriptor caches reference memory we're about to free,
721 * but falcon_reconfigure_mac_wrapper() won't reconnect
722 * the MACs because of the pending reset.
724 netif_err(efx, drv, efx->net_dev,
725 "Resetting to recover from flush failure\n");
726 ef4_schedule_reset(efx, RESET_TYPE_ALL);
728 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
730 netif_dbg(efx, drv, efx->net_dev,
731 "successfully flushed all queues\n");
734 ef4_for_each_channel(channel, efx) {
735 ef4_for_each_channel_rx_queue(rx_queue, channel)
736 ef4_fini_rx_queue(rx_queue);
737 ef4_for_each_possible_channel_tx_queue(tx_queue, channel)
738 ef4_fini_tx_queue(tx_queue);
742 static void ef4_remove_channel(struct ef4_channel *channel)
744 struct ef4_tx_queue *tx_queue;
745 struct ef4_rx_queue *rx_queue;
747 netif_dbg(channel->efx, drv, channel->efx->net_dev,
748 "destroy chan %d\n", channel->channel);
750 ef4_for_each_channel_rx_queue(rx_queue, channel)
751 ef4_remove_rx_queue(rx_queue);
752 ef4_for_each_possible_channel_tx_queue(tx_queue, channel)
753 ef4_remove_tx_queue(tx_queue);
754 ef4_remove_eventq(channel);
755 channel->type->post_remove(channel);
758 static void ef4_remove_channels(struct ef4_nic *efx)
760 struct ef4_channel *channel;
762 ef4_for_each_channel(channel, efx)
763 ef4_remove_channel(channel);
767 ef4_realloc_channels(struct ef4_nic *efx, u32 rxq_entries, u32 txq_entries)
769 struct ef4_channel *other_channel[EF4_MAX_CHANNELS], *channel;
770 u32 old_rxq_entries, old_txq_entries;
771 unsigned i, next_buffer_table = 0;
774 rc = ef4_check_disabled(efx);
778 /* Not all channels should be reallocated. We must avoid
779 * reallocating their buffer table entries.
781 ef4_for_each_channel(channel, efx) {
782 struct ef4_rx_queue *rx_queue;
783 struct ef4_tx_queue *tx_queue;
785 if (channel->type->copy)
787 next_buffer_table = max(next_buffer_table,
788 channel->eventq.index +
789 channel->eventq.entries);
790 ef4_for_each_channel_rx_queue(rx_queue, channel)
791 next_buffer_table = max(next_buffer_table,
792 rx_queue->rxd.index +
793 rx_queue->rxd.entries);
794 ef4_for_each_channel_tx_queue(tx_queue, channel)
795 next_buffer_table = max(next_buffer_table,
796 tx_queue->txd.index +
797 tx_queue->txd.entries);
800 ef4_device_detach_sync(efx);
802 ef4_soft_disable_interrupts(efx);
804 /* Clone channels (where possible) */
805 memset(other_channel, 0, sizeof(other_channel));
806 for (i = 0; i < efx->n_channels; i++) {
807 channel = efx->channel[i];
808 if (channel->type->copy)
809 channel = channel->type->copy(channel);
814 other_channel[i] = channel;
817 /* Swap entry counts and channel pointers */
818 old_rxq_entries = efx->rxq_entries;
819 old_txq_entries = efx->txq_entries;
820 efx->rxq_entries = rxq_entries;
821 efx->txq_entries = txq_entries;
822 for (i = 0; i < efx->n_channels; i++) {
823 channel = efx->channel[i];
824 efx->channel[i] = other_channel[i];
825 other_channel[i] = channel;
828 /* Restart buffer table allocation */
829 efx->next_buffer_table = next_buffer_table;
831 for (i = 0; i < efx->n_channels; i++) {
832 channel = efx->channel[i];
833 if (!channel->type->copy)
835 rc = ef4_probe_channel(channel);
838 ef4_init_napi_channel(efx->channel[i]);
842 /* Destroy unused channel structures */
843 for (i = 0; i < efx->n_channels; i++) {
844 channel = other_channel[i];
845 if (channel && channel->type->copy) {
846 ef4_fini_napi_channel(channel);
847 ef4_remove_channel(channel);
852 rc2 = ef4_soft_enable_interrupts(efx);
855 netif_err(efx, drv, efx->net_dev,
856 "unable to restart interrupts on channel reallocation\n");
857 ef4_schedule_reset(efx, RESET_TYPE_DISABLE);
860 netif_device_attach(efx->net_dev);
866 efx->rxq_entries = old_rxq_entries;
867 efx->txq_entries = old_txq_entries;
868 for (i = 0; i < efx->n_channels; i++) {
869 channel = efx->channel[i];
870 efx->channel[i] = other_channel[i];
871 other_channel[i] = channel;
876 void ef4_schedule_slow_fill(struct ef4_rx_queue *rx_queue)
878 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
881 static const struct ef4_channel_type ef4_default_channel_type = {
882 .pre_probe = ef4_channel_dummy_op_int,
883 .post_remove = ef4_channel_dummy_op_void,
884 .get_name = ef4_get_channel_name,
885 .copy = ef4_copy_channel,
886 .keep_eventq = false,
889 int ef4_channel_dummy_op_int(struct ef4_channel *channel)
894 void ef4_channel_dummy_op_void(struct ef4_channel *channel)
898 /**************************************************************************
902 **************************************************************************/
904 /* This ensures that the kernel is kept informed (via
905 * netif_carrier_on/off) of the link status, and also maintains the
906 * link status's stop on the port's TX queue.
908 void ef4_link_status_changed(struct ef4_nic *efx)
910 struct ef4_link_state *link_state = &efx->link_state;
912 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
913 * that no events are triggered between unregister_netdev() and the
914 * driver unloading. A more general condition is that NETDEV_CHANGE
915 * can only be generated between NETDEV_UP and NETDEV_DOWN */
916 if (!netif_running(efx->net_dev))
919 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
920 efx->n_link_state_changes++;
923 netif_carrier_on(efx->net_dev);
925 netif_carrier_off(efx->net_dev);
928 /* Status message for kernel log */
930 netif_info(efx, link, efx->net_dev,
931 "link up at %uMbps %s-duplex (MTU %d)\n",
932 link_state->speed, link_state->fd ? "full" : "half",
935 netif_info(efx, link, efx->net_dev, "link down\n");
938 void ef4_link_set_advertising(struct ef4_nic *efx, u32 advertising)
940 efx->link_advertising = advertising;
942 if (advertising & ADVERTISED_Pause)
943 efx->wanted_fc |= (EF4_FC_TX | EF4_FC_RX);
945 efx->wanted_fc &= ~(EF4_FC_TX | EF4_FC_RX);
946 if (advertising & ADVERTISED_Asym_Pause)
947 efx->wanted_fc ^= EF4_FC_TX;
951 void ef4_link_set_wanted_fc(struct ef4_nic *efx, u8 wanted_fc)
953 efx->wanted_fc = wanted_fc;
954 if (efx->link_advertising) {
955 if (wanted_fc & EF4_FC_RX)
956 efx->link_advertising |= (ADVERTISED_Pause |
957 ADVERTISED_Asym_Pause);
959 efx->link_advertising &= ~(ADVERTISED_Pause |
960 ADVERTISED_Asym_Pause);
961 if (wanted_fc & EF4_FC_TX)
962 efx->link_advertising ^= ADVERTISED_Asym_Pause;
966 static void ef4_fini_port(struct ef4_nic *efx);
968 /* We assume that efx->type->reconfigure_mac will always try to sync RX
969 * filters and therefore needs to read-lock the filter table against freeing
971 void ef4_mac_reconfigure(struct ef4_nic *efx)
973 down_read(&efx->filter_sem);
974 efx->type->reconfigure_mac(efx);
975 up_read(&efx->filter_sem);
978 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
979 * the MAC appropriately. All other PHY configuration changes are pushed
980 * through phy_op->set_link_ksettings(), and pushed asynchronously to the MAC
981 * through ef4_monitor().
983 * Callers must hold the mac_lock
985 int __ef4_reconfigure_port(struct ef4_nic *efx)
987 enum ef4_phy_mode phy_mode;
990 WARN_ON(!mutex_is_locked(&efx->mac_lock));
992 /* Disable PHY transmit in mac level loopbacks */
993 phy_mode = efx->phy_mode;
994 if (LOOPBACK_INTERNAL(efx))
995 efx->phy_mode |= PHY_MODE_TX_DISABLED;
997 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
999 rc = efx->type->reconfigure_port(efx);
1002 efx->phy_mode = phy_mode;
1007 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
1009 int ef4_reconfigure_port(struct ef4_nic *efx)
1013 EF4_ASSERT_RESET_SERIALISED(efx);
1015 mutex_lock(&efx->mac_lock);
1016 rc = __ef4_reconfigure_port(efx);
1017 mutex_unlock(&efx->mac_lock);
1022 /* Asynchronous work item for changing MAC promiscuity and multicast
1023 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
1025 static void ef4_mac_work(struct work_struct *data)
1027 struct ef4_nic *efx = container_of(data, struct ef4_nic, mac_work);
1029 mutex_lock(&efx->mac_lock);
1030 if (efx->port_enabled)
1031 ef4_mac_reconfigure(efx);
1032 mutex_unlock(&efx->mac_lock);
1035 static int ef4_probe_port(struct ef4_nic *efx)
1039 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1042 efx->phy_mode = PHY_MODE_SPECIAL;
1044 /* Connect up MAC/PHY operations table */
1045 rc = efx->type->probe_port(efx);
1049 /* Initialise MAC address to permanent address */
1050 ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr);
1055 static int ef4_init_port(struct ef4_nic *efx)
1059 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1061 mutex_lock(&efx->mac_lock);
1063 rc = efx->phy_op->init(efx);
1067 efx->port_initialized = true;
1069 /* Reconfigure the MAC before creating dma queues (required for
1070 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1071 ef4_mac_reconfigure(efx);
1073 /* Ensure the PHY advertises the correct flow control settings */
1074 rc = efx->phy_op->reconfigure(efx);
1075 if (rc && rc != -EPERM)
1078 mutex_unlock(&efx->mac_lock);
1082 efx->phy_op->fini(efx);
1084 mutex_unlock(&efx->mac_lock);
1088 static void ef4_start_port(struct ef4_nic *efx)
1090 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1091 BUG_ON(efx->port_enabled);
1093 mutex_lock(&efx->mac_lock);
1094 efx->port_enabled = true;
1096 /* Ensure MAC ingress/egress is enabled */
1097 ef4_mac_reconfigure(efx);
1099 mutex_unlock(&efx->mac_lock);
1102 /* Cancel work for MAC reconfiguration, periodic hardware monitoring
1103 * and the async self-test, wait for them to finish and prevent them
1104 * being scheduled again. This doesn't cover online resets, which
1105 * should only be cancelled when removing the device.
1107 static void ef4_stop_port(struct ef4_nic *efx)
1109 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1111 EF4_ASSERT_RESET_SERIALISED(efx);
1113 mutex_lock(&efx->mac_lock);
1114 efx->port_enabled = false;
1115 mutex_unlock(&efx->mac_lock);
1117 /* Serialise against ef4_set_multicast_list() */
1118 netif_addr_lock_bh(efx->net_dev);
1119 netif_addr_unlock_bh(efx->net_dev);
1121 cancel_delayed_work_sync(&efx->monitor_work);
1122 ef4_selftest_async_cancel(efx);
1123 cancel_work_sync(&efx->mac_work);
1126 static void ef4_fini_port(struct ef4_nic *efx)
1128 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1130 if (!efx->port_initialized)
1133 efx->phy_op->fini(efx);
1134 efx->port_initialized = false;
1136 efx->link_state.up = false;
1137 ef4_link_status_changed(efx);
1140 static void ef4_remove_port(struct ef4_nic *efx)
1142 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1144 efx->type->remove_port(efx);
1147 /**************************************************************************
1151 **************************************************************************/
1153 static LIST_HEAD(ef4_primary_list);
1154 static LIST_HEAD(ef4_unassociated_list);
1156 static bool ef4_same_controller(struct ef4_nic *left, struct ef4_nic *right)
1158 return left->type == right->type &&
1159 left->vpd_sn && right->vpd_sn &&
1160 !strcmp(left->vpd_sn, right->vpd_sn);
1163 static void ef4_associate(struct ef4_nic *efx)
1165 struct ef4_nic *other, *next;
1167 if (efx->primary == efx) {
1168 /* Adding primary function; look for secondaries */
1170 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n");
1171 list_add_tail(&efx->node, &ef4_primary_list);
1173 list_for_each_entry_safe(other, next, &ef4_unassociated_list,
1175 if (ef4_same_controller(efx, other)) {
1176 list_del(&other->node);
1177 netif_dbg(other, probe, other->net_dev,
1178 "moving to secondary list of %s %s\n",
1179 pci_name(efx->pci_dev),
1180 efx->net_dev->name);
1181 list_add_tail(&other->node,
1182 &efx->secondary_list);
1183 other->primary = efx;
1187 /* Adding secondary function; look for primary */
1189 list_for_each_entry(other, &ef4_primary_list, node) {
1190 if (ef4_same_controller(efx, other)) {
1191 netif_dbg(efx, probe, efx->net_dev,
1192 "adding to secondary list of %s %s\n",
1193 pci_name(other->pci_dev),
1194 other->net_dev->name);
1195 list_add_tail(&efx->node,
1196 &other->secondary_list);
1197 efx->primary = other;
1202 netif_dbg(efx, probe, efx->net_dev,
1203 "adding to unassociated list\n");
1204 list_add_tail(&efx->node, &ef4_unassociated_list);
1208 static void ef4_dissociate(struct ef4_nic *efx)
1210 struct ef4_nic *other, *next;
1212 list_del(&efx->node);
1213 efx->primary = NULL;
1215 list_for_each_entry_safe(other, next, &efx->secondary_list, node) {
1216 list_del(&other->node);
1217 netif_dbg(other, probe, other->net_dev,
1218 "moving to unassociated list\n");
1219 list_add_tail(&other->node, &ef4_unassociated_list);
1220 other->primary = NULL;
1224 /* This configures the PCI device to enable I/O and DMA. */
1225 static int ef4_init_io(struct ef4_nic *efx)
1227 struct pci_dev *pci_dev = efx->pci_dev;
1228 dma_addr_t dma_mask = efx->type->max_dma_mask;
1229 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1232 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1234 bar = efx->type->mem_bar;
1236 rc = pci_enable_device(pci_dev);
1238 netif_err(efx, probe, efx->net_dev,
1239 "failed to enable PCI device\n");
1243 pci_set_master(pci_dev);
1245 /* Set the PCI DMA mask. Try all possibilities from our genuine mask
1246 * down to 32 bits, because some architectures will allow 40 bit
1247 * masks event though they reject 46 bit masks.
1249 while (dma_mask > 0x7fffffffUL) {
1250 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1256 netif_err(efx, probe, efx->net_dev,
1257 "could not find a suitable DMA mask\n");
1260 netif_dbg(efx, probe, efx->net_dev,
1261 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1263 efx->membase_phys = pci_resource_start(efx->pci_dev, bar);
1264 rc = pci_request_region(pci_dev, bar, "sfc");
1266 netif_err(efx, probe, efx->net_dev,
1267 "request for memory BAR failed\n");
1271 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1272 if (!efx->membase) {
1273 netif_err(efx, probe, efx->net_dev,
1274 "could not map memory BAR at %llx+%x\n",
1275 (unsigned long long)efx->membase_phys, mem_map_size);
1279 netif_dbg(efx, probe, efx->net_dev,
1280 "memory BAR at %llx+%x (virtual %p)\n",
1281 (unsigned long long)efx->membase_phys, mem_map_size,
1287 pci_release_region(efx->pci_dev, bar);
1289 efx->membase_phys = 0;
1291 pci_disable_device(efx->pci_dev);
1296 static void ef4_fini_io(struct ef4_nic *efx)
1300 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1303 iounmap(efx->membase);
1304 efx->membase = NULL;
1307 if (efx->membase_phys) {
1308 bar = efx->type->mem_bar;
1309 pci_release_region(efx->pci_dev, bar);
1310 efx->membase_phys = 0;
1313 /* Don't disable bus-mastering if VFs are assigned */
1314 if (!pci_vfs_assigned(efx->pci_dev))
1315 pci_disable_device(efx->pci_dev);
1318 void ef4_set_default_rx_indir_table(struct ef4_nic *efx)
1322 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1323 efx->rx_indir_table[i] =
1324 ethtool_rxfh_indir_default(i, efx->rss_spread);
1327 static unsigned int ef4_wanted_parallelism(struct ef4_nic *efx)
1329 cpumask_var_t thread_mask;
1336 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1337 netif_warn(efx, probe, efx->net_dev,
1338 "RSS disabled due to allocation failure\n");
1343 for_each_online_cpu(cpu) {
1344 if (!cpumask_test_cpu(cpu, thread_mask)) {
1346 cpumask_or(thread_mask, thread_mask,
1347 topology_sibling_cpumask(cpu));
1351 free_cpumask_var(thread_mask);
1354 if (count > EF4_MAX_RX_QUEUES) {
1355 netif_cond_dbg(efx, probe, efx->net_dev, !rss_cpus, warn,
1356 "Reducing number of rx queues from %u to %u.\n",
1357 count, EF4_MAX_RX_QUEUES);
1358 count = EF4_MAX_RX_QUEUES;
1364 /* Probe the number and type of interrupts we are able to obtain, and
1365 * the resulting numbers of channels and RX queues.
1367 static int ef4_probe_interrupts(struct ef4_nic *efx)
1369 unsigned int extra_channels = 0;
1373 for (i = 0; i < EF4_MAX_EXTRA_CHANNELS; i++)
1374 if (efx->extra_channel_type[i])
1377 if (efx->interrupt_mode == EF4_INT_MODE_MSIX) {
1378 struct msix_entry xentries[EF4_MAX_CHANNELS];
1379 unsigned int n_channels;
1381 n_channels = ef4_wanted_parallelism(efx);
1382 if (ef4_separate_tx_channels)
1384 n_channels += extra_channels;
1385 n_channels = min(n_channels, efx->max_channels);
1387 for (i = 0; i < n_channels; i++)
1388 xentries[i].entry = i;
1389 rc = pci_enable_msix_range(efx->pci_dev,
1390 xentries, 1, n_channels);
1392 /* Fall back to single channel MSI */
1393 efx->interrupt_mode = EF4_INT_MODE_MSI;
1394 netif_err(efx, drv, efx->net_dev,
1395 "could not enable MSI-X\n");
1396 } else if (rc < n_channels) {
1397 netif_err(efx, drv, efx->net_dev,
1398 "WARNING: Insufficient MSI-X vectors"
1399 " available (%d < %u).\n", rc, n_channels);
1400 netif_err(efx, drv, efx->net_dev,
1401 "WARNING: Performance may be reduced.\n");
1406 efx->n_channels = n_channels;
1407 if (n_channels > extra_channels)
1408 n_channels -= extra_channels;
1409 if (ef4_separate_tx_channels) {
1410 efx->n_tx_channels = min(max(n_channels / 2,
1412 efx->max_tx_channels);
1413 efx->n_rx_channels = max(n_channels -
1417 efx->n_tx_channels = min(n_channels,
1418 efx->max_tx_channels);
1419 efx->n_rx_channels = n_channels;
1421 for (i = 0; i < efx->n_channels; i++)
1422 ef4_get_channel(efx, i)->irq =
1427 /* Try single interrupt MSI */
1428 if (efx->interrupt_mode == EF4_INT_MODE_MSI) {
1429 efx->n_channels = 1;
1430 efx->n_rx_channels = 1;
1431 efx->n_tx_channels = 1;
1432 rc = pci_enable_msi(efx->pci_dev);
1434 ef4_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1436 netif_err(efx, drv, efx->net_dev,
1437 "could not enable MSI\n");
1438 efx->interrupt_mode = EF4_INT_MODE_LEGACY;
1442 /* Assume legacy interrupts */
1443 if (efx->interrupt_mode == EF4_INT_MODE_LEGACY) {
1444 efx->n_channels = 1 + (ef4_separate_tx_channels ? 1 : 0);
1445 efx->n_rx_channels = 1;
1446 efx->n_tx_channels = 1;
1447 efx->legacy_irq = efx->pci_dev->irq;
1450 /* Assign extra channels if possible */
1451 j = efx->n_channels;
1452 for (i = 0; i < EF4_MAX_EXTRA_CHANNELS; i++) {
1453 if (!efx->extra_channel_type[i])
1455 if (efx->interrupt_mode != EF4_INT_MODE_MSIX ||
1456 efx->n_channels <= extra_channels) {
1457 efx->extra_channel_type[i]->handle_no_channel(efx);
1460 ef4_get_channel(efx, j)->type =
1461 efx->extra_channel_type[i];
1465 efx->rss_spread = efx->n_rx_channels;
1470 static int ef4_soft_enable_interrupts(struct ef4_nic *efx)
1472 struct ef4_channel *channel, *end_channel;
1475 BUG_ON(efx->state == STATE_DISABLED);
1477 efx->irq_soft_enabled = true;
1480 ef4_for_each_channel(channel, efx) {
1481 if (!channel->type->keep_eventq) {
1482 rc = ef4_init_eventq(channel);
1486 ef4_start_eventq(channel);
1491 end_channel = channel;
1492 ef4_for_each_channel(channel, efx) {
1493 if (channel == end_channel)
1495 ef4_stop_eventq(channel);
1496 if (!channel->type->keep_eventq)
1497 ef4_fini_eventq(channel);
1503 static void ef4_soft_disable_interrupts(struct ef4_nic *efx)
1505 struct ef4_channel *channel;
1507 if (efx->state == STATE_DISABLED)
1510 efx->irq_soft_enabled = false;
1513 if (efx->legacy_irq)
1514 synchronize_irq(efx->legacy_irq);
1516 ef4_for_each_channel(channel, efx) {
1518 synchronize_irq(channel->irq);
1520 ef4_stop_eventq(channel);
1521 if (!channel->type->keep_eventq)
1522 ef4_fini_eventq(channel);
1526 static int ef4_enable_interrupts(struct ef4_nic *efx)
1528 struct ef4_channel *channel, *end_channel;
1531 BUG_ON(efx->state == STATE_DISABLED);
1533 if (efx->eeh_disabled_legacy_irq) {
1534 enable_irq(efx->legacy_irq);
1535 efx->eeh_disabled_legacy_irq = false;
1538 efx->type->irq_enable_master(efx);
1540 ef4_for_each_channel(channel, efx) {
1541 if (channel->type->keep_eventq) {
1542 rc = ef4_init_eventq(channel);
1548 rc = ef4_soft_enable_interrupts(efx);
1555 end_channel = channel;
1556 ef4_for_each_channel(channel, efx) {
1557 if (channel == end_channel)
1559 if (channel->type->keep_eventq)
1560 ef4_fini_eventq(channel);
1563 efx->type->irq_disable_non_ev(efx);
1568 static void ef4_disable_interrupts(struct ef4_nic *efx)
1570 struct ef4_channel *channel;
1572 ef4_soft_disable_interrupts(efx);
1574 ef4_for_each_channel(channel, efx) {
1575 if (channel->type->keep_eventq)
1576 ef4_fini_eventq(channel);
1579 efx->type->irq_disable_non_ev(efx);
1582 static void ef4_remove_interrupts(struct ef4_nic *efx)
1584 struct ef4_channel *channel;
1586 /* Remove MSI/MSI-X interrupts */
1587 ef4_for_each_channel(channel, efx)
1589 pci_disable_msi(efx->pci_dev);
1590 pci_disable_msix(efx->pci_dev);
1592 /* Remove legacy interrupt */
1593 efx->legacy_irq = 0;
1596 static void ef4_set_channels(struct ef4_nic *efx)
1598 struct ef4_channel *channel;
1599 struct ef4_tx_queue *tx_queue;
1601 efx->tx_channel_offset =
1602 ef4_separate_tx_channels ?
1603 efx->n_channels - efx->n_tx_channels : 0;
1605 /* We need to mark which channels really have RX and TX
1606 * queues, and adjust the TX queue numbers if we have separate
1607 * RX-only and TX-only channels.
1609 ef4_for_each_channel(channel, efx) {
1610 if (channel->channel < efx->n_rx_channels)
1611 channel->rx_queue.core_index = channel->channel;
1613 channel->rx_queue.core_index = -1;
1615 ef4_for_each_channel_tx_queue(tx_queue, channel)
1616 tx_queue->queue -= (efx->tx_channel_offset *
1621 static int ef4_probe_nic(struct ef4_nic *efx)
1625 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1627 /* Carry out hardware-type specific initialisation */
1628 rc = efx->type->probe(efx);
1633 if (!efx->max_channels || !efx->max_tx_channels) {
1634 netif_err(efx, drv, efx->net_dev,
1635 "Insufficient resources to allocate"
1641 /* Determine the number of channels and queues by trying
1642 * to hook in MSI-X interrupts.
1644 rc = ef4_probe_interrupts(efx);
1648 ef4_set_channels(efx);
1650 /* dimension_resources can fail with EAGAIN */
1651 rc = efx->type->dimension_resources(efx);
1652 if (rc != 0 && rc != -EAGAIN)
1656 /* try again with new max_channels */
1657 ef4_remove_interrupts(efx);
1659 } while (rc == -EAGAIN);
1661 if (efx->n_channels > 1)
1662 netdev_rss_key_fill(&efx->rx_hash_key,
1663 sizeof(efx->rx_hash_key));
1664 ef4_set_default_rx_indir_table(efx);
1666 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1667 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1669 /* Initialise the interrupt moderation settings */
1670 efx->irq_mod_step_us = DIV_ROUND_UP(efx->timer_quantum_ns, 1000);
1671 ef4_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1677 ef4_remove_interrupts(efx);
1679 efx->type->remove(efx);
1683 static void ef4_remove_nic(struct ef4_nic *efx)
1685 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1687 ef4_remove_interrupts(efx);
1688 efx->type->remove(efx);
1691 static int ef4_probe_filters(struct ef4_nic *efx)
1695 spin_lock_init(&efx->filter_lock);
1696 init_rwsem(&efx->filter_sem);
1697 mutex_lock(&efx->mac_lock);
1698 down_write(&efx->filter_sem);
1699 rc = efx->type->filter_table_probe(efx);
1703 #ifdef CONFIG_RFS_ACCEL
1704 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1705 struct ef4_channel *channel;
1708 ef4_for_each_channel(channel, efx) {
1709 channel->rps_flow_id =
1710 kcalloc(efx->type->max_rx_ip_filters,
1711 sizeof(*channel->rps_flow_id),
1713 if (!channel->rps_flow_id)
1717 i < efx->type->max_rx_ip_filters;
1719 channel->rps_flow_id[i] =
1720 RPS_FLOW_ID_INVALID;
1724 ef4_for_each_channel(channel, efx)
1725 kfree(channel->rps_flow_id);
1726 efx->type->filter_table_remove(efx);
1731 efx->rps_expire_index = efx->rps_expire_channel = 0;
1735 up_write(&efx->filter_sem);
1736 mutex_unlock(&efx->mac_lock);
1740 static void ef4_remove_filters(struct ef4_nic *efx)
1742 #ifdef CONFIG_RFS_ACCEL
1743 struct ef4_channel *channel;
1745 ef4_for_each_channel(channel, efx)
1746 kfree(channel->rps_flow_id);
1748 down_write(&efx->filter_sem);
1749 efx->type->filter_table_remove(efx);
1750 up_write(&efx->filter_sem);
1753 static void ef4_restore_filters(struct ef4_nic *efx)
1755 down_read(&efx->filter_sem);
1756 efx->type->filter_table_restore(efx);
1757 up_read(&efx->filter_sem);
1760 /**************************************************************************
1762 * NIC startup/shutdown
1764 *************************************************************************/
1766 static int ef4_probe_all(struct ef4_nic *efx)
1770 rc = ef4_probe_nic(efx);
1772 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1776 rc = ef4_probe_port(efx);
1778 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1782 BUILD_BUG_ON(EF4_DEFAULT_DMAQ_SIZE < EF4_RXQ_MIN_ENT);
1783 if (WARN_ON(EF4_DEFAULT_DMAQ_SIZE < EF4_TXQ_MIN_ENT(efx))) {
1787 efx->rxq_entries = efx->txq_entries = EF4_DEFAULT_DMAQ_SIZE;
1789 rc = ef4_probe_filters(efx);
1791 netif_err(efx, probe, efx->net_dev,
1792 "failed to create filter tables\n");
1796 rc = ef4_probe_channels(efx);
1803 ef4_remove_filters(efx);
1806 ef4_remove_port(efx);
1808 ef4_remove_nic(efx);
1813 /* If the interface is supposed to be running but is not, start
1814 * the hardware and software data path, regular activity for the port
1815 * (MAC statistics, link polling, etc.) and schedule the port to be
1816 * reconfigured. Interrupts must already be enabled. This function
1817 * is safe to call multiple times, so long as the NIC is not disabled.
1818 * Requires the RTNL lock.
1820 static void ef4_start_all(struct ef4_nic *efx)
1822 EF4_ASSERT_RESET_SERIALISED(efx);
1823 BUG_ON(efx->state == STATE_DISABLED);
1825 /* Check that it is appropriate to restart the interface. All
1826 * of these flags are safe to read under just the rtnl lock */
1827 if (efx->port_enabled || !netif_running(efx->net_dev) ||
1831 ef4_start_port(efx);
1832 ef4_start_datapath(efx);
1834 /* Start the hardware monitor if there is one */
1835 if (efx->type->monitor != NULL)
1836 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1837 ef4_monitor_interval);
1839 efx->type->start_stats(efx);
1840 efx->type->pull_stats(efx);
1841 spin_lock_bh(&efx->stats_lock);
1842 efx->type->update_stats(efx, NULL, NULL);
1843 spin_unlock_bh(&efx->stats_lock);
1846 /* Quiesce the hardware and software data path, and regular activity
1847 * for the port without bringing the link down. Safe to call multiple
1848 * times with the NIC in almost any state, but interrupts should be
1849 * enabled. Requires the RTNL lock.
1851 static void ef4_stop_all(struct ef4_nic *efx)
1853 EF4_ASSERT_RESET_SERIALISED(efx);
1855 /* port_enabled can be read safely under the rtnl lock */
1856 if (!efx->port_enabled)
1859 /* update stats before we go down so we can accurately count
1862 efx->type->pull_stats(efx);
1863 spin_lock_bh(&efx->stats_lock);
1864 efx->type->update_stats(efx, NULL, NULL);
1865 spin_unlock_bh(&efx->stats_lock);
1866 efx->type->stop_stats(efx);
1869 /* Stop the kernel transmit interface. This is only valid if
1870 * the device is stopped or detached; otherwise the watchdog
1871 * may fire immediately.
1873 WARN_ON(netif_running(efx->net_dev) &&
1874 netif_device_present(efx->net_dev));
1875 netif_tx_disable(efx->net_dev);
1877 ef4_stop_datapath(efx);
1880 static void ef4_remove_all(struct ef4_nic *efx)
1882 ef4_remove_channels(efx);
1883 ef4_remove_filters(efx);
1884 ef4_remove_port(efx);
1885 ef4_remove_nic(efx);
1888 /**************************************************************************
1890 * Interrupt moderation
1892 **************************************************************************/
1893 unsigned int ef4_usecs_to_ticks(struct ef4_nic *efx, unsigned int usecs)
1897 if (usecs * 1000 < efx->timer_quantum_ns)
1898 return 1; /* never round down to 0 */
1899 return usecs * 1000 / efx->timer_quantum_ns;
1902 unsigned int ef4_ticks_to_usecs(struct ef4_nic *efx, unsigned int ticks)
1904 /* We must round up when converting ticks to microseconds
1905 * because we round down when converting the other way.
1907 return DIV_ROUND_UP(ticks * efx->timer_quantum_ns, 1000);
1910 /* Set interrupt moderation parameters */
1911 int ef4_init_irq_moderation(struct ef4_nic *efx, unsigned int tx_usecs,
1912 unsigned int rx_usecs, bool rx_adaptive,
1913 bool rx_may_override_tx)
1915 struct ef4_channel *channel;
1916 unsigned int timer_max_us;
1918 EF4_ASSERT_RESET_SERIALISED(efx);
1920 timer_max_us = efx->timer_max_ns / 1000;
1922 if (tx_usecs > timer_max_us || rx_usecs > timer_max_us)
1925 if (tx_usecs != rx_usecs && efx->tx_channel_offset == 0 &&
1926 !rx_may_override_tx) {
1927 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1928 "RX and TX IRQ moderation must be equal\n");
1932 efx->irq_rx_adaptive = rx_adaptive;
1933 efx->irq_rx_moderation_us = rx_usecs;
1934 ef4_for_each_channel(channel, efx) {
1935 if (ef4_channel_has_rx_queue(channel))
1936 channel->irq_moderation_us = rx_usecs;
1937 else if (ef4_channel_has_tx_queues(channel))
1938 channel->irq_moderation_us = tx_usecs;
1944 void ef4_get_irq_moderation(struct ef4_nic *efx, unsigned int *tx_usecs,
1945 unsigned int *rx_usecs, bool *rx_adaptive)
1947 *rx_adaptive = efx->irq_rx_adaptive;
1948 *rx_usecs = efx->irq_rx_moderation_us;
1950 /* If channels are shared between RX and TX, so is IRQ
1951 * moderation. Otherwise, IRQ moderation is the same for all
1952 * TX channels and is not adaptive.
1954 if (efx->tx_channel_offset == 0) {
1955 *tx_usecs = *rx_usecs;
1957 struct ef4_channel *tx_channel;
1959 tx_channel = efx->channel[efx->tx_channel_offset];
1960 *tx_usecs = tx_channel->irq_moderation_us;
1964 /**************************************************************************
1968 **************************************************************************/
1970 /* Run periodically off the general workqueue */
1971 static void ef4_monitor(struct work_struct *data)
1973 struct ef4_nic *efx = container_of(data, struct ef4_nic,
1976 netif_vdbg(efx, timer, efx->net_dev,
1977 "hardware monitor executing on CPU %d\n",
1978 raw_smp_processor_id());
1979 BUG_ON(efx->type->monitor == NULL);
1981 /* If the mac_lock is already held then it is likely a port
1982 * reconfiguration is already in place, which will likely do
1983 * most of the work of monitor() anyway. */
1984 if (mutex_trylock(&efx->mac_lock)) {
1985 if (efx->port_enabled)
1986 efx->type->monitor(efx);
1987 mutex_unlock(&efx->mac_lock);
1990 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1991 ef4_monitor_interval);
1994 /**************************************************************************
1998 *************************************************************************/
2001 * Context: process, rtnl_lock() held.
2003 static int ef4_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
2005 struct ef4_nic *efx = netdev_priv(net_dev);
2006 struct mii_ioctl_data *data = if_mii(ifr);
2008 /* Convert phy_id from older PRTAD/DEVAD format */
2009 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
2010 (data->phy_id & 0xfc00) == 0x0400)
2011 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
2013 return mdio_mii_ioctl(&efx->mdio, data, cmd);
2016 /**************************************************************************
2020 **************************************************************************/
2022 static void ef4_init_napi_channel(struct ef4_channel *channel)
2024 struct ef4_nic *efx = channel->efx;
2026 channel->napi_dev = efx->net_dev;
2027 netif_napi_add(channel->napi_dev, &channel->napi_str,
2028 ef4_poll, napi_weight);
2031 static void ef4_init_napi(struct ef4_nic *efx)
2033 struct ef4_channel *channel;
2035 ef4_for_each_channel(channel, efx)
2036 ef4_init_napi_channel(channel);
2039 static void ef4_fini_napi_channel(struct ef4_channel *channel)
2041 if (channel->napi_dev)
2042 netif_napi_del(&channel->napi_str);
2044 channel->napi_dev = NULL;
2047 static void ef4_fini_napi(struct ef4_nic *efx)
2049 struct ef4_channel *channel;
2051 ef4_for_each_channel(channel, efx)
2052 ef4_fini_napi_channel(channel);
2055 /**************************************************************************
2057 * Kernel net device interface
2059 *************************************************************************/
2061 /* Context: process, rtnl_lock() held. */
2062 int ef4_net_open(struct net_device *net_dev)
2064 struct ef4_nic *efx = netdev_priv(net_dev);
2067 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
2068 raw_smp_processor_id());
2070 rc = ef4_check_disabled(efx);
2073 if (efx->phy_mode & PHY_MODE_SPECIAL)
2076 /* Notify the kernel of the link state polled during driver load,
2077 * before the monitor starts running */
2078 ef4_link_status_changed(efx);
2081 ef4_selftest_async_start(efx);
2085 /* Context: process, rtnl_lock() held.
2086 * Note that the kernel will ignore our return code; this method
2087 * should really be a void.
2089 int ef4_net_stop(struct net_device *net_dev)
2091 struct ef4_nic *efx = netdev_priv(net_dev);
2093 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
2094 raw_smp_processor_id());
2096 /* Stop the device and flush all the channels */
2102 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
2103 static void ef4_net_stats(struct net_device *net_dev,
2104 struct rtnl_link_stats64 *stats)
2106 struct ef4_nic *efx = netdev_priv(net_dev);
2108 spin_lock_bh(&efx->stats_lock);
2109 efx->type->update_stats(efx, NULL, stats);
2110 spin_unlock_bh(&efx->stats_lock);
2113 /* Context: netif_tx_lock held, BHs disabled. */
2114 static void ef4_watchdog(struct net_device *net_dev)
2116 struct ef4_nic *efx = netdev_priv(net_dev);
2118 netif_err(efx, tx_err, efx->net_dev,
2119 "TX stuck with port_enabled=%d: resetting channels\n",
2122 ef4_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2126 /* Context: process, rtnl_lock() held. */
2127 static int ef4_change_mtu(struct net_device *net_dev, int new_mtu)
2129 struct ef4_nic *efx = netdev_priv(net_dev);
2132 rc = ef4_check_disabled(efx);
2136 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2138 ef4_device_detach_sync(efx);
2141 mutex_lock(&efx->mac_lock);
2142 net_dev->mtu = new_mtu;
2143 ef4_mac_reconfigure(efx);
2144 mutex_unlock(&efx->mac_lock);
2147 netif_device_attach(efx->net_dev);
2151 static int ef4_set_mac_address(struct net_device *net_dev, void *data)
2153 struct ef4_nic *efx = netdev_priv(net_dev);
2154 struct sockaddr *addr = data;
2155 u8 *new_addr = addr->sa_data;
2159 if (!is_valid_ether_addr(new_addr)) {
2160 netif_err(efx, drv, efx->net_dev,
2161 "invalid ethernet MAC address requested: %pM\n",
2163 return -EADDRNOTAVAIL;
2166 /* save old address */
2167 ether_addr_copy(old_addr, net_dev->dev_addr);
2168 ether_addr_copy(net_dev->dev_addr, new_addr);
2169 if (efx->type->set_mac_address) {
2170 rc = efx->type->set_mac_address(efx);
2172 ether_addr_copy(net_dev->dev_addr, old_addr);
2177 /* Reconfigure the MAC */
2178 mutex_lock(&efx->mac_lock);
2179 ef4_mac_reconfigure(efx);
2180 mutex_unlock(&efx->mac_lock);
2185 /* Context: netif_addr_lock held, BHs disabled. */
2186 static void ef4_set_rx_mode(struct net_device *net_dev)
2188 struct ef4_nic *efx = netdev_priv(net_dev);
2190 if (efx->port_enabled)
2191 queue_work(efx->workqueue, &efx->mac_work);
2192 /* Otherwise ef4_start_port() will do this */
2195 static int ef4_set_features(struct net_device *net_dev, netdev_features_t data)
2197 struct ef4_nic *efx = netdev_priv(net_dev);
2200 /* If disabling RX n-tuple filtering, clear existing filters */
2201 if (net_dev->features & ~data & NETIF_F_NTUPLE) {
2202 rc = efx->type->filter_clear_rx(efx, EF4_FILTER_PRI_MANUAL);
2207 /* If Rx VLAN filter is changed, update filters via mac_reconfigure */
2208 if ((net_dev->features ^ data) & NETIF_F_HW_VLAN_CTAG_FILTER) {
2209 /* ef4_set_rx_mode() will schedule MAC work to update filters
2210 * when a new features are finally set in net_dev.
2212 ef4_set_rx_mode(net_dev);
2218 static const struct net_device_ops ef4_netdev_ops = {
2219 .ndo_open = ef4_net_open,
2220 .ndo_stop = ef4_net_stop,
2221 .ndo_get_stats64 = ef4_net_stats,
2222 .ndo_tx_timeout = ef4_watchdog,
2223 .ndo_start_xmit = ef4_hard_start_xmit,
2224 .ndo_validate_addr = eth_validate_addr,
2225 .ndo_do_ioctl = ef4_ioctl,
2226 .ndo_change_mtu = ef4_change_mtu,
2227 .ndo_set_mac_address = ef4_set_mac_address,
2228 .ndo_set_rx_mode = ef4_set_rx_mode,
2229 .ndo_set_features = ef4_set_features,
2230 .ndo_setup_tc = ef4_setup_tc,
2231 #ifdef CONFIG_RFS_ACCEL
2232 .ndo_rx_flow_steer = ef4_filter_rfs,
2236 static void ef4_update_name(struct ef4_nic *efx)
2238 strcpy(efx->name, efx->net_dev->name);
2239 ef4_mtd_rename(efx);
2240 ef4_set_channel_names(efx);
2243 static int ef4_netdev_event(struct notifier_block *this,
2244 unsigned long event, void *ptr)
2246 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2248 if ((net_dev->netdev_ops == &ef4_netdev_ops) &&
2249 event == NETDEV_CHANGENAME)
2250 ef4_update_name(netdev_priv(net_dev));
2255 static struct notifier_block ef4_netdev_notifier = {
2256 .notifier_call = ef4_netdev_event,
2260 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2262 struct ef4_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2263 return sprintf(buf, "%d\n", efx->phy_type);
2265 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2267 static int ef4_register_netdev(struct ef4_nic *efx)
2269 struct net_device *net_dev = efx->net_dev;
2270 struct ef4_channel *channel;
2273 net_dev->watchdog_timeo = 5 * HZ;
2274 net_dev->irq = efx->pci_dev->irq;
2275 net_dev->netdev_ops = &ef4_netdev_ops;
2276 net_dev->ethtool_ops = &ef4_ethtool_ops;
2277 net_dev->gso_max_segs = EF4_TSO_MAX_SEGS;
2278 net_dev->min_mtu = EF4_MIN_MTU;
2279 net_dev->max_mtu = EF4_MAX_MTU;
2283 /* Enable resets to be scheduled and check whether any were
2284 * already requested. If so, the NIC is probably hosed so we
2287 efx->state = STATE_READY;
2288 smp_mb(); /* ensure we change state before checking reset_pending */
2289 if (efx->reset_pending) {
2290 netif_err(efx, probe, efx->net_dev,
2291 "aborting probe due to scheduled reset\n");
2296 rc = dev_alloc_name(net_dev, net_dev->name);
2299 ef4_update_name(efx);
2301 /* Always start with carrier off; PHY events will detect the link */
2302 netif_carrier_off(net_dev);
2304 rc = register_netdevice(net_dev);
2308 ef4_for_each_channel(channel, efx) {
2309 struct ef4_tx_queue *tx_queue;
2310 ef4_for_each_channel_tx_queue(tx_queue, channel)
2311 ef4_init_tx_queue_core_txq(tx_queue);
2318 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2320 netif_err(efx, drv, efx->net_dev,
2321 "failed to init net dev attributes\n");
2322 goto fail_registered;
2328 ef4_dissociate(efx);
2329 unregister_netdevice(net_dev);
2331 efx->state = STATE_UNINIT;
2333 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2337 static void ef4_unregister_netdev(struct ef4_nic *efx)
2342 BUG_ON(netdev_priv(efx->net_dev) != efx);
2344 if (ef4_dev_registered(efx)) {
2345 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2346 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2347 unregister_netdev(efx->net_dev);
2351 /**************************************************************************
2353 * Device reset and suspend
2355 **************************************************************************/
2357 /* Tears down the entire software state and most of the hardware state
2359 void ef4_reset_down(struct ef4_nic *efx, enum reset_type method)
2361 EF4_ASSERT_RESET_SERIALISED(efx);
2364 ef4_disable_interrupts(efx);
2366 mutex_lock(&efx->mac_lock);
2367 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2368 method != RESET_TYPE_DATAPATH)
2369 efx->phy_op->fini(efx);
2370 efx->type->fini(efx);
2373 /* This function will always ensure that the locks acquired in
2374 * ef4_reset_down() are released. A failure return code indicates
2375 * that we were unable to reinitialise the hardware, and the
2376 * driver should be disabled. If ok is false, then the rx and tx
2377 * engines are not restarted, pending a RESET_DISABLE. */
2378 int ef4_reset_up(struct ef4_nic *efx, enum reset_type method, bool ok)
2382 EF4_ASSERT_RESET_SERIALISED(efx);
2384 /* Ensure that SRAM is initialised even if we're disabling the device */
2385 rc = efx->type->init(efx);
2387 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2394 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2395 method != RESET_TYPE_DATAPATH) {
2396 rc = efx->phy_op->init(efx);
2399 rc = efx->phy_op->reconfigure(efx);
2400 if (rc && rc != -EPERM)
2401 netif_err(efx, drv, efx->net_dev,
2402 "could not restore PHY settings\n");
2405 rc = ef4_enable_interrupts(efx);
2409 down_read(&efx->filter_sem);
2410 ef4_restore_filters(efx);
2411 up_read(&efx->filter_sem);
2413 mutex_unlock(&efx->mac_lock);
2420 efx->port_initialized = false;
2422 mutex_unlock(&efx->mac_lock);
2427 /* Reset the NIC using the specified method. Note that the reset may
2428 * fail, in which case the card will be left in an unusable state.
2430 * Caller must hold the rtnl_lock.
2432 int ef4_reset(struct ef4_nic *efx, enum reset_type method)
2437 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2438 RESET_TYPE(method));
2440 ef4_device_detach_sync(efx);
2441 ef4_reset_down(efx, method);
2443 rc = efx->type->reset(efx, method);
2445 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2449 /* Clear flags for the scopes we covered. We assume the NIC and
2450 * driver are now quiescent so that there is no race here.
2452 if (method < RESET_TYPE_MAX_METHOD)
2453 efx->reset_pending &= -(1 << (method + 1));
2454 else /* it doesn't fit into the well-ordered scope hierarchy */
2455 __clear_bit(method, &efx->reset_pending);
2457 /* Reinitialise bus-mastering, which may have been turned off before
2458 * the reset was scheduled. This is still appropriate, even in the
2459 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2460 * can respond to requests. */
2461 pci_set_master(efx->pci_dev);
2464 /* Leave device stopped if necessary */
2466 method == RESET_TYPE_DISABLE ||
2467 method == RESET_TYPE_RECOVER_OR_DISABLE;
2468 rc2 = ef4_reset_up(efx, method, !disabled);
2476 dev_close(efx->net_dev);
2477 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2478 efx->state = STATE_DISABLED;
2480 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2481 netif_device_attach(efx->net_dev);
2486 /* Try recovery mechanisms.
2487 * For now only EEH is supported.
2488 * Returns 0 if the recovery mechanisms are unsuccessful.
2489 * Returns a non-zero value otherwise.
2491 int ef4_try_recovery(struct ef4_nic *efx)
2494 /* A PCI error can occur and not be seen by EEH because nothing
2495 * happens on the PCI bus. In this case the driver may fail and
2496 * schedule a 'recover or reset', leading to this recovery handler.
2497 * Manually call the eeh failure check function.
2499 struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev);
2500 if (eeh_dev_check_failure(eehdev)) {
2501 /* The EEH mechanisms will handle the error and reset the
2502 * device if necessary.
2510 /* The worker thread exists so that code that cannot sleep can
2511 * schedule a reset for later.
2513 static void ef4_reset_work(struct work_struct *data)
2515 struct ef4_nic *efx = container_of(data, struct ef4_nic, reset_work);
2516 unsigned long pending;
2517 enum reset_type method;
2519 pending = READ_ONCE(efx->reset_pending);
2520 method = fls(pending) - 1;
2522 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2523 method == RESET_TYPE_RECOVER_OR_ALL) &&
2524 ef4_try_recovery(efx))
2532 /* We checked the state in ef4_schedule_reset() but it may
2533 * have changed by now. Now that we have the RTNL lock,
2534 * it cannot change again.
2536 if (efx->state == STATE_READY)
2537 (void)ef4_reset(efx, method);
2542 void ef4_schedule_reset(struct ef4_nic *efx, enum reset_type type)
2544 enum reset_type method;
2546 if (efx->state == STATE_RECOVERY) {
2547 netif_dbg(efx, drv, efx->net_dev,
2548 "recovering: skip scheduling %s reset\n",
2554 case RESET_TYPE_INVISIBLE:
2555 case RESET_TYPE_ALL:
2556 case RESET_TYPE_RECOVER_OR_ALL:
2557 case RESET_TYPE_WORLD:
2558 case RESET_TYPE_DISABLE:
2559 case RESET_TYPE_RECOVER_OR_DISABLE:
2560 case RESET_TYPE_DATAPATH:
2562 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2563 RESET_TYPE(method));
2566 method = efx->type->map_reset_reason(type);
2567 netif_dbg(efx, drv, efx->net_dev,
2568 "scheduling %s reset for %s\n",
2569 RESET_TYPE(method), RESET_TYPE(type));
2573 set_bit(method, &efx->reset_pending);
2574 smp_mb(); /* ensure we change reset_pending before checking state */
2576 /* If we're not READY then just leave the flags set as the cue
2577 * to abort probing or reschedule the reset later.
2579 if (READ_ONCE(efx->state) != STATE_READY)
2582 queue_work(reset_workqueue, &efx->reset_work);
2585 /**************************************************************************
2587 * List of NICs we support
2589 **************************************************************************/
2591 /* PCI device ID table */
2592 static const struct pci_device_id ef4_pci_table[] = {
2593 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2594 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2595 .driver_data = (unsigned long) &falcon_a1_nic_type},
2596 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2597 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2598 .driver_data = (unsigned long) &falcon_b0_nic_type},
2599 {0} /* end of list */
2602 /**************************************************************************
2604 * Dummy PHY/MAC operations
2606 * Can be used for some unimplemented operations
2607 * Needed so all function pointers are valid and do not have to be tested
2610 **************************************************************************/
2611 int ef4_port_dummy_op_int(struct ef4_nic *efx)
2615 void ef4_port_dummy_op_void(struct ef4_nic *efx) {}
2617 static bool ef4_port_dummy_op_poll(struct ef4_nic *efx)
2622 static const struct ef4_phy_operations ef4_dummy_phy_operations = {
2623 .init = ef4_port_dummy_op_int,
2624 .reconfigure = ef4_port_dummy_op_int,
2625 .poll = ef4_port_dummy_op_poll,
2626 .fini = ef4_port_dummy_op_void,
2629 /**************************************************************************
2633 **************************************************************************/
2635 /* This zeroes out and then fills in the invariants in a struct
2636 * ef4_nic (including all sub-structures).
2638 static int ef4_init_struct(struct ef4_nic *efx,
2639 struct pci_dev *pci_dev, struct net_device *net_dev)
2643 /* Initialise common structures */
2644 INIT_LIST_HEAD(&efx->node);
2645 INIT_LIST_HEAD(&efx->secondary_list);
2646 spin_lock_init(&efx->biu_lock);
2647 #ifdef CONFIG_SFC_FALCON_MTD
2648 INIT_LIST_HEAD(&efx->mtd_list);
2650 INIT_WORK(&efx->reset_work, ef4_reset_work);
2651 INIT_DELAYED_WORK(&efx->monitor_work, ef4_monitor);
2652 INIT_DELAYED_WORK(&efx->selftest_work, ef4_selftest_async_work);
2653 efx->pci_dev = pci_dev;
2654 efx->msg_enable = debug;
2655 efx->state = STATE_UNINIT;
2656 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2658 efx->net_dev = net_dev;
2659 efx->rx_prefix_size = efx->type->rx_prefix_size;
2661 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
2662 efx->rx_packet_hash_offset =
2663 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2664 efx->rx_packet_ts_offset =
2665 efx->type->rx_ts_offset - efx->type->rx_prefix_size;
2666 spin_lock_init(&efx->stats_lock);
2667 mutex_init(&efx->mac_lock);
2668 efx->phy_op = &ef4_dummy_phy_operations;
2669 efx->mdio.dev = net_dev;
2670 INIT_WORK(&efx->mac_work, ef4_mac_work);
2671 init_waitqueue_head(&efx->flush_wq);
2673 for (i = 0; i < EF4_MAX_CHANNELS; i++) {
2674 efx->channel[i] = ef4_alloc_channel(efx, i, NULL);
2675 if (!efx->channel[i])
2677 efx->msi_context[i].efx = efx;
2678 efx->msi_context[i].index = i;
2681 /* Higher numbered interrupt modes are less capable! */
2682 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2685 /* Would be good to use the net_dev name, but we're too early */
2686 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2688 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2689 if (!efx->workqueue)
2695 ef4_fini_struct(efx);
2699 static void ef4_fini_struct(struct ef4_nic *efx)
2703 for (i = 0; i < EF4_MAX_CHANNELS; i++)
2704 kfree(efx->channel[i]);
2708 if (efx->workqueue) {
2709 destroy_workqueue(efx->workqueue);
2710 efx->workqueue = NULL;
2714 void ef4_update_sw_stats(struct ef4_nic *efx, u64 *stats)
2716 u64 n_rx_nodesc_trunc = 0;
2717 struct ef4_channel *channel;
2719 ef4_for_each_channel(channel, efx)
2720 n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc;
2721 stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc;
2722 stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops);
2725 /**************************************************************************
2729 **************************************************************************/
2731 /* Main body of final NIC shutdown code
2732 * This is called only at module unload (or hotplug removal).
2734 static void ef4_pci_remove_main(struct ef4_nic *efx)
2736 /* Flush reset_work. It can no longer be scheduled since we
2739 BUG_ON(efx->state == STATE_READY);
2740 cancel_work_sync(&efx->reset_work);
2742 ef4_disable_interrupts(efx);
2743 ef4_nic_fini_interrupt(efx);
2745 efx->type->fini(efx);
2747 ef4_remove_all(efx);
2750 /* Final NIC shutdown
2751 * This is called only at module unload (or hotplug removal). A PF can call
2752 * this on its VFs to ensure they are unbound first.
2754 static void ef4_pci_remove(struct pci_dev *pci_dev)
2756 struct ef4_nic *efx;
2758 efx = pci_get_drvdata(pci_dev);
2762 /* Mark the NIC as fini, then stop the interface */
2764 ef4_dissociate(efx);
2765 dev_close(efx->net_dev);
2766 ef4_disable_interrupts(efx);
2767 efx->state = STATE_UNINIT;
2770 ef4_unregister_netdev(efx);
2772 ef4_mtd_remove(efx);
2774 ef4_pci_remove_main(efx);
2777 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2779 ef4_fini_struct(efx);
2780 free_netdev(efx->net_dev);
2782 pci_disable_pcie_error_reporting(pci_dev);
2785 /* NIC VPD information
2786 * Called during probe to display the part number of the
2787 * installed NIC. VPD is potentially very large but this should
2788 * always appear within the first 512 bytes.
2790 #define SFC_VPD_LEN 512
2791 static void ef4_probe_vpd_strings(struct ef4_nic *efx)
2793 struct pci_dev *dev = efx->pci_dev;
2794 char vpd_data[SFC_VPD_LEN];
2796 int ro_start, ro_size, i, j;
2798 /* Get the vpd data from the device */
2799 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2800 if (vpd_size <= 0) {
2801 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2805 /* Get the Read only section */
2806 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2808 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2812 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
2814 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
2815 if (i + j > vpd_size)
2818 /* Get the Part number */
2819 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2821 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2825 j = pci_vpd_info_field_size(&vpd_data[i]);
2826 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2827 if (i + j > vpd_size) {
2828 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2832 netif_info(efx, drv, efx->net_dev,
2833 "Part Number : %.*s\n", j, &vpd_data[i]);
2835 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
2837 i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN");
2839 netif_err(efx, drv, efx->net_dev, "Serial number not found\n");
2843 j = pci_vpd_info_field_size(&vpd_data[i]);
2844 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2845 if (i + j > vpd_size) {
2846 netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n");
2850 efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL);
2854 snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]);
2858 /* Main body of NIC initialisation
2859 * This is called at module load (or hotplug insertion, theoretically).
2861 static int ef4_pci_probe_main(struct ef4_nic *efx)
2865 /* Do start-of-day initialisation */
2866 rc = ef4_probe_all(efx);
2872 rc = efx->type->init(efx);
2874 netif_err(efx, probe, efx->net_dev,
2875 "failed to initialise NIC\n");
2879 rc = ef4_init_port(efx);
2881 netif_err(efx, probe, efx->net_dev,
2882 "failed to initialise port\n");
2886 rc = ef4_nic_init_interrupt(efx);
2889 rc = ef4_enable_interrupts(efx);
2896 ef4_nic_fini_interrupt(efx);
2900 efx->type->fini(efx);
2903 ef4_remove_all(efx);
2908 /* NIC initialisation
2910 * This is called at module load (or hotplug insertion,
2911 * theoretically). It sets up PCI mappings, resets the NIC,
2912 * sets up and registers the network devices with the kernel and hooks
2913 * the interrupt service routine. It does not prepare the device for
2914 * transmission; this is left to the first time one of the network
2915 * interfaces is brought up (i.e. ef4_net_open).
2917 static int ef4_pci_probe(struct pci_dev *pci_dev,
2918 const struct pci_device_id *entry)
2920 struct net_device *net_dev;
2921 struct ef4_nic *efx;
2924 /* Allocate and initialise a struct net_device and struct ef4_nic */
2925 net_dev = alloc_etherdev_mqs(sizeof(*efx), EF4_MAX_CORE_TX_QUEUES,
2929 efx = netdev_priv(net_dev);
2930 efx->type = (const struct ef4_nic_type *) entry->driver_data;
2931 efx->fixed_features |= NETIF_F_HIGHDMA;
2933 pci_set_drvdata(pci_dev, efx);
2934 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2935 rc = ef4_init_struct(efx, pci_dev, net_dev);
2939 netif_info(efx, probe, efx->net_dev,
2940 "Solarflare NIC detected\n");
2942 ef4_probe_vpd_strings(efx);
2944 /* Set up basic I/O (BAR mappings etc) */
2945 rc = ef4_init_io(efx);
2949 rc = ef4_pci_probe_main(efx);
2953 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
2955 /* Mask for features that also apply to VLAN devices */
2956 net_dev->vlan_features |= (NETIF_F_HW_CSUM | NETIF_F_SG |
2957 NETIF_F_HIGHDMA | NETIF_F_RXCSUM);
2959 net_dev->hw_features = net_dev->features & ~efx->fixed_features;
2961 /* Disable VLAN filtering by default. It may be enforced if
2962 * the feature is fixed (i.e. VLAN filters are required to
2963 * receive VLAN tagged packets due to vPort restrictions).
2965 net_dev->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
2966 net_dev->features |= efx->fixed_features;
2968 rc = ef4_register_netdev(efx);
2972 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2974 /* Try to create MTDs, but allow this to fail */
2976 rc = ef4_mtd_probe(efx);
2978 if (rc && rc != -EPERM)
2979 netif_warn(efx, probe, efx->net_dev,
2980 "failed to create MTDs (%d)\n", rc);
2982 rc = pci_enable_pcie_error_reporting(pci_dev);
2983 if (rc && rc != -EINVAL)
2984 netif_notice(efx, probe, efx->net_dev,
2985 "PCIE error reporting unavailable (%d).\n",
2991 ef4_pci_remove_main(efx);
2995 ef4_fini_struct(efx);
2998 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2999 free_netdev(net_dev);
3003 static int ef4_pm_freeze(struct device *dev)
3005 struct ef4_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3009 if (efx->state != STATE_DISABLED) {
3010 efx->state = STATE_UNINIT;
3012 ef4_device_detach_sync(efx);
3015 ef4_disable_interrupts(efx);
3023 static int ef4_pm_thaw(struct device *dev)
3026 struct ef4_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3030 if (efx->state != STATE_DISABLED) {
3031 rc = ef4_enable_interrupts(efx);
3035 mutex_lock(&efx->mac_lock);
3036 efx->phy_op->reconfigure(efx);
3037 mutex_unlock(&efx->mac_lock);
3041 netif_device_attach(efx->net_dev);
3043 efx->state = STATE_READY;
3045 efx->type->resume_wol(efx);
3050 /* Reschedule any quenched resets scheduled during ef4_pm_freeze() */
3051 queue_work(reset_workqueue, &efx->reset_work);
3061 static int ef4_pm_poweroff(struct device *dev)
3063 struct pci_dev *pci_dev = to_pci_dev(dev);
3064 struct ef4_nic *efx = pci_get_drvdata(pci_dev);
3066 efx->type->fini(efx);
3068 efx->reset_pending = 0;
3070 pci_save_state(pci_dev);
3071 return pci_set_power_state(pci_dev, PCI_D3hot);
3074 /* Used for both resume and restore */
3075 static int ef4_pm_resume(struct device *dev)
3077 struct pci_dev *pci_dev = to_pci_dev(dev);
3078 struct ef4_nic *efx = pci_get_drvdata(pci_dev);
3081 rc = pci_set_power_state(pci_dev, PCI_D0);
3084 pci_restore_state(pci_dev);
3085 rc = pci_enable_device(pci_dev);
3088 pci_set_master(efx->pci_dev);
3089 rc = efx->type->reset(efx, RESET_TYPE_ALL);
3092 rc = efx->type->init(efx);
3095 rc = ef4_pm_thaw(dev);
3099 static int ef4_pm_suspend(struct device *dev)
3104 rc = ef4_pm_poweroff(dev);
3110 static const struct dev_pm_ops ef4_pm_ops = {
3111 .suspend = ef4_pm_suspend,
3112 .resume = ef4_pm_resume,
3113 .freeze = ef4_pm_freeze,
3114 .thaw = ef4_pm_thaw,
3115 .poweroff = ef4_pm_poweroff,
3116 .restore = ef4_pm_resume,
3119 /* A PCI error affecting this device was detected.
3120 * At this point MMIO and DMA may be disabled.
3121 * Stop the software path and request a slot reset.
3123 static pci_ers_result_t ef4_io_error_detected(struct pci_dev *pdev,
3124 enum pci_channel_state state)
3126 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3127 struct ef4_nic *efx = pci_get_drvdata(pdev);
3129 if (state == pci_channel_io_perm_failure)
3130 return PCI_ERS_RESULT_DISCONNECT;
3134 if (efx->state != STATE_DISABLED) {
3135 efx->state = STATE_RECOVERY;
3136 efx->reset_pending = 0;
3138 ef4_device_detach_sync(efx);
3141 ef4_disable_interrupts(efx);
3143 status = PCI_ERS_RESULT_NEED_RESET;
3145 /* If the interface is disabled we don't want to do anything
3148 status = PCI_ERS_RESULT_RECOVERED;
3153 pci_disable_device(pdev);
3158 /* Fake a successful reset, which will be performed later in ef4_io_resume. */
3159 static pci_ers_result_t ef4_io_slot_reset(struct pci_dev *pdev)
3161 struct ef4_nic *efx = pci_get_drvdata(pdev);
3162 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3165 if (pci_enable_device(pdev)) {
3166 netif_err(efx, hw, efx->net_dev,
3167 "Cannot re-enable PCI device after reset.\n");
3168 status = PCI_ERS_RESULT_DISCONNECT;
3171 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
3173 netif_err(efx, hw, efx->net_dev,
3174 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3175 /* Non-fatal error. Continue. */
3181 /* Perform the actual reset and resume I/O operations. */
3182 static void ef4_io_resume(struct pci_dev *pdev)
3184 struct ef4_nic *efx = pci_get_drvdata(pdev);
3189 if (efx->state == STATE_DISABLED)
3192 rc = ef4_reset(efx, RESET_TYPE_ALL);
3194 netif_err(efx, hw, efx->net_dev,
3195 "ef4_reset failed after PCI error (%d)\n", rc);
3197 efx->state = STATE_READY;
3198 netif_dbg(efx, hw, efx->net_dev,
3199 "Done resetting and resuming IO after PCI error.\n");
3206 /* For simplicity and reliability, we always require a slot reset and try to
3207 * reset the hardware when a pci error affecting the device is detected.
3208 * We leave both the link_reset and mmio_enabled callback unimplemented:
3209 * with our request for slot reset the mmio_enabled callback will never be
3210 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3212 static const struct pci_error_handlers ef4_err_handlers = {
3213 .error_detected = ef4_io_error_detected,
3214 .slot_reset = ef4_io_slot_reset,
3215 .resume = ef4_io_resume,
3218 static struct pci_driver ef4_pci_driver = {
3219 .name = KBUILD_MODNAME,
3220 .id_table = ef4_pci_table,
3221 .probe = ef4_pci_probe,
3222 .remove = ef4_pci_remove,
3223 .driver.pm = &ef4_pm_ops,
3224 .err_handler = &ef4_err_handlers,
3227 /**************************************************************************
3229 * Kernel module interface
3231 *************************************************************************/
3233 module_param(interrupt_mode, uint, 0444);
3234 MODULE_PARM_DESC(interrupt_mode,
3235 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3237 static int __init ef4_init_module(void)
3241 printk(KERN_INFO "Solarflare Falcon driver v" EF4_DRIVER_VERSION "\n");
3243 rc = register_netdevice_notifier(&ef4_netdev_notifier);
3247 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3248 if (!reset_workqueue) {
3253 rc = pci_register_driver(&ef4_pci_driver);
3260 destroy_workqueue(reset_workqueue);
3262 unregister_netdevice_notifier(&ef4_netdev_notifier);
3267 static void __exit ef4_exit_module(void)
3269 printk(KERN_INFO "Solarflare Falcon driver unloading\n");
3271 pci_unregister_driver(&ef4_pci_driver);
3272 destroy_workqueue(reset_workqueue);
3273 unregister_netdevice_notifier(&ef4_netdev_notifier);
3277 module_init(ef4_init_module);
3278 module_exit(ef4_exit_module);
3280 MODULE_AUTHOR("Solarflare Communications and "
3281 "Michael Brown <mbrown@fensystems.co.uk>");
3282 MODULE_DESCRIPTION("Solarflare Falcon network driver");
3283 MODULE_LICENSE("GPL");
3284 MODULE_DEVICE_TABLE(pci, ef4_pci_table);
3285 MODULE_VERSION(EF4_DRIVER_VERSION);
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