2 * drivers/net/phy/marvell.c
4 * Driver for Marvell PHYs
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/ctype.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/hwmon.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/spinlock.h>
32 #include <linux/module.h>
33 #include <linux/mii.h>
34 #include <linux/ethtool.h>
35 #include <linux/phy.h>
36 #include <linux/marvell_phy.h>
41 #include <linux/uaccess.h>
43 #define MII_MARVELL_PHY_PAGE 22
44 #define MII_MARVELL_COPPER_PAGE 0x00
45 #define MII_MARVELL_FIBER_PAGE 0x01
46 #define MII_MARVELL_MSCR_PAGE 0x02
47 #define MII_MARVELL_LED_PAGE 0x03
48 #define MII_MARVELL_MISC_TEST_PAGE 0x06
49 #define MII_MARVELL_WOL_PAGE 0x11
51 #define MII_M1011_IEVENT 0x13
52 #define MII_M1011_IEVENT_CLEAR 0x0000
54 #define MII_M1011_IMASK 0x12
55 #define MII_M1011_IMASK_INIT 0x6400
56 #define MII_M1011_IMASK_CLEAR 0x0000
58 #define MII_M1011_PHY_SCR 0x10
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
66 #define MII_M1111_PHY_LED_CONTROL 0x18
67 #define MII_M1111_PHY_LED_DIRECT 0x4100
68 #define MII_M1111_PHY_LED_COMBINE 0x411c
69 #define MII_M1111_PHY_EXT_CR 0x14
70 #define MII_M1111_RGMII_RX_DELAY BIT(7)
71 #define MII_M1111_RGMII_TX_DELAY BIT(1)
72 #define MII_M1111_PHY_EXT_SR 0x1b
74 #define MII_M1111_HWCFG_MODE_MASK 0xf
75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
77 #define MII_M1111_HWCFG_MODE_RTBI 0x7
78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
83 #define MII_88E1121_PHY_MSCR_REG 21
84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
88 #define MII_88E1121_MISC_TEST 0x1a
89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
96 #define MII_88E1510_TEMP_SENSOR 0x1b
97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
99 #define MII_88E6390_MISC_TEST 0x1b
100 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0
101 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
102 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
103 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
104 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
106 #define MII_88E6390_TEMP_SENSOR 0x1c
107 #define MII_88E6390_TEMP_SENSOR_MASK 0xff
108 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
110 #define MII_88E1318S_PHY_MSCR1_REG 16
111 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
113 /* Copper Specific Interrupt Enable Register */
114 #define MII_88E1318S_PHY_CSIER 0x12
115 /* WOL Event Interrupt Enable */
116 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
118 /* LED Timer Control Register */
119 #define MII_88E1318S_PHY_LED_TCR 0x12
120 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
121 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
122 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
124 /* Magic Packet MAC address registers */
125 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
126 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
127 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
129 #define MII_88E1318S_PHY_WOL_CTRL 0x10
130 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
131 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
133 #define MII_PHY_LED_CTRL 16
134 #define MII_88E1121_PHY_LED_DEF 0x0030
135 #define MII_88E1510_PHY_LED_DEF 0x1177
137 #define MII_M1011_PHY_STATUS 0x11
138 #define MII_M1011_PHY_STATUS_1000 0x8000
139 #define MII_M1011_PHY_STATUS_100 0x4000
140 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
141 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
142 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
143 #define MII_M1011_PHY_STATUS_LINK 0x0400
145 #define MII_88E3016_PHY_SPEC_CTRL 0x10
146 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
147 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
149 #define MII_88E1510_GEN_CTRL_REG_1 0x14
150 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
151 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
152 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
154 #define LPA_FIBER_1000HALF 0x40
155 #define LPA_FIBER_1000FULL 0x20
157 #define LPA_PAUSE_FIBER 0x180
158 #define LPA_PAUSE_ASYM_FIBER 0x100
160 #define ADVERTISE_FIBER_1000HALF 0x40
161 #define ADVERTISE_FIBER_1000FULL 0x20
163 #define ADVERTISE_PAUSE_FIBER 0x180
164 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
166 #define REGISTER_LINK_STATUS 0x400
167 #define NB_FIBER_STATS 1
169 MODULE_DESCRIPTION("Marvell PHY driver");
170 MODULE_AUTHOR("Andy Fleming");
171 MODULE_LICENSE("GPL");
173 struct marvell_hw_stat {
180 static struct marvell_hw_stat marvell_hw_stats[] = {
181 { "phy_receive_errors_copper", 0, 21, 16},
182 { "phy_idle_errors", 0, 10, 8 },
183 { "phy_receive_errors_fiber", 1, 21, 16},
186 struct marvell_priv {
187 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
189 struct device *hwmon_dev;
192 static int marvell_read_page(struct phy_device *phydev)
194 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
197 static int marvell_write_page(struct phy_device *phydev, int page)
199 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
202 static int marvell_set_page(struct phy_device *phydev, int page)
204 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
207 static int marvell_ack_interrupt(struct phy_device *phydev)
211 /* Clear the interrupts by reading the reg */
212 err = phy_read(phydev, MII_M1011_IEVENT);
220 static int marvell_config_intr(struct phy_device *phydev)
224 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
225 err = phy_write(phydev, MII_M1011_IMASK,
226 MII_M1011_IMASK_INIT);
228 err = phy_write(phydev, MII_M1011_IMASK,
229 MII_M1011_IMASK_CLEAR);
234 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
240 /* get the current settings */
241 reg = phy_read(phydev, MII_M1011_PHY_SCR);
246 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
249 val |= MII_M1011_PHY_SCR_MDI;
252 val |= MII_M1011_PHY_SCR_MDI_X;
254 case ETH_TP_MDI_AUTO:
255 case ETH_TP_MDI_INVALID:
257 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
262 /* Set the new polarity value in the register */
263 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
271 static int marvell_set_downshift(struct phy_device *phydev, bool enable,
276 reg = phy_read(phydev, MII_M1011_PHY_SCR);
280 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
281 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
283 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
285 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
288 static int marvell_config_aneg(struct phy_device *phydev)
292 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
296 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
297 MII_M1111_PHY_LED_DIRECT);
301 err = genphy_config_aneg(phydev);
305 if (phydev->autoneg != AUTONEG_ENABLE) {
306 /* A write to speed/duplex bits (that is performed by
307 * genphy_config_aneg() call above) must be followed by
308 * a software reset. Otherwise, the write has no effect.
310 err = genphy_soft_reset(phydev);
318 static int m88e1101_config_aneg(struct phy_device *phydev)
322 /* This Marvell PHY has an errata which requires
323 * that certain registers get written in order
324 * to restart autonegotiation
326 err = genphy_soft_reset(phydev);
330 err = phy_write(phydev, 0x1d, 0x1f);
334 err = phy_write(phydev, 0x1e, 0x200c);
338 err = phy_write(phydev, 0x1d, 0x5);
342 err = phy_write(phydev, 0x1e, 0);
346 err = phy_write(phydev, 0x1e, 0x100);
350 return marvell_config_aneg(phydev);
353 static int m88e1111_config_aneg(struct phy_device *phydev)
357 /* The Marvell PHY has an errata which requires
358 * that certain registers get written in order
359 * to restart autonegotiation
361 err = genphy_soft_reset(phydev);
363 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
367 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
368 MII_M1111_PHY_LED_DIRECT);
372 err = genphy_config_aneg(phydev);
376 if (phydev->autoneg != AUTONEG_ENABLE) {
377 /* A write to speed/duplex bits (that is performed by
378 * genphy_config_aneg() call above) must be followed by
379 * a software reset. Otherwise, the write has no effect.
381 err = genphy_soft_reset(phydev);
389 #ifdef CONFIG_OF_MDIO
390 /* Set and/or override some configuration registers based on the
391 * marvell,reg-init property stored in the of_node for the phydev.
393 * marvell,reg-init = <reg-page reg mask value>,...;
395 * There may be one or more sets of <reg-page reg mask value>:
397 * reg-page: which register bank to use.
399 * mask: if non-zero, ANDed with existing register value.
400 * value: ORed with the masked value and written to the regiser.
403 static int marvell_of_reg_init(struct phy_device *phydev)
406 int len, i, saved_page, current_page, ret = 0;
408 if (!phydev->mdio.dev.of_node)
411 paddr = of_get_property(phydev->mdio.dev.of_node,
412 "marvell,reg-init", &len);
413 if (!paddr || len < (4 * sizeof(*paddr)))
416 saved_page = phy_save_page(phydev);
419 current_page = saved_page;
421 len /= sizeof(*paddr);
422 for (i = 0; i < len - 3; i += 4) {
423 u16 page = be32_to_cpup(paddr + i);
424 u16 reg = be32_to_cpup(paddr + i + 1);
425 u16 mask = be32_to_cpup(paddr + i + 2);
426 u16 val_bits = be32_to_cpup(paddr + i + 3);
429 if (page != current_page) {
431 ret = marvell_write_page(phydev, page);
438 val = __phy_read(phydev, reg);
447 ret = __phy_write(phydev, reg, val);
452 return phy_restore_page(phydev, saved_page, ret);
455 static int marvell_of_reg_init(struct phy_device *phydev)
459 #endif /* CONFIG_OF_MDIO */
461 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
465 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
466 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
467 MII_88E1121_PHY_MSCR_TX_DELAY;
468 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
469 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
470 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
471 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
475 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
476 MII_88E1121_PHY_MSCR_REG,
477 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
480 static int m88e1121_config_aneg(struct phy_device *phydev)
484 if (phy_interface_is_rgmii(phydev)) {
485 err = m88e1121_config_aneg_rgmii_delays(phydev);
490 err = genphy_soft_reset(phydev);
494 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
498 return genphy_config_aneg(phydev);
501 static int m88e1318_config_aneg(struct phy_device *phydev)
505 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
506 MII_88E1318S_PHY_MSCR1_REG,
507 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
511 return m88e1121_config_aneg(phydev);
515 * ethtool_adv_to_fiber_adv_t
516 * @ethadv: the ethtool advertisement settings
518 * A small helper function that translates ethtool advertisement
519 * settings to phy autonegotiation advertisements for the
520 * MII_ADV register for fiber link.
522 static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
526 if (ethadv & ADVERTISED_1000baseT_Half)
527 result |= ADVERTISE_FIBER_1000HALF;
528 if (ethadv & ADVERTISED_1000baseT_Full)
529 result |= ADVERTISE_FIBER_1000FULL;
531 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
532 result |= LPA_PAUSE_ASYM_FIBER;
533 else if (ethadv & ADVERTISE_PAUSE_CAP)
534 result |= (ADVERTISE_PAUSE_FIBER
535 & (~ADVERTISE_PAUSE_ASYM_FIBER));
541 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
542 * @phydev: target phy_device struct
544 * Description: If auto-negotiation is enabled, we configure the
545 * advertising, and then restart auto-negotiation. If it is not
546 * enabled, then we write the BMCR. Adapted for fiber link in
547 * some Marvell's devices.
549 static int marvell_config_aneg_fiber(struct phy_device *phydev)
556 if (phydev->autoneg != AUTONEG_ENABLE)
557 return genphy_setup_forced(phydev);
559 /* Only allow advertising what this PHY supports */
560 phydev->advertising &= phydev->supported;
561 advertise = phydev->advertising;
563 /* Setup fiber advertisement */
564 adv = phy_read(phydev, MII_ADVERTISE);
569 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
571 adv |= ethtool_adv_to_fiber_adv_t(advertise);
574 err = phy_write(phydev, MII_ADVERTISE, adv);
582 /* Advertisement hasn't changed, but maybe aneg was never on to
583 * begin with? Or maybe phy was isolated?
585 int ctl = phy_read(phydev, MII_BMCR);
590 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
591 changed = 1; /* do restart aneg */
594 /* Only restart aneg if we are advertising something different
595 * than we were before.
598 changed = genphy_restart_aneg(phydev);
603 static int m88e1510_config_aneg(struct phy_device *phydev)
607 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
611 /* Configure the copper link first */
612 err = m88e1318_config_aneg(phydev);
616 /* Do not touch the fiber page if we're in copper->sgmii mode */
617 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
620 /* Then the fiber link */
621 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
625 err = marvell_config_aneg_fiber(phydev);
629 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
632 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
636 static void marvell_config_led(struct phy_device *phydev)
641 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
642 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
643 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
644 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
645 def_config = MII_88E1121_PHY_LED_DEF;
647 /* Default PHY LED config:
648 * LED[0] .. 1000Mbps Link
649 * LED[1] .. 100Mbps Link
650 * LED[2] .. Blink, Activity
652 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
653 def_config = MII_88E1510_PHY_LED_DEF;
659 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
662 pr_warn("Fail to config marvell phy LED.\n");
665 static int marvell_config_init(struct phy_device *phydev)
667 /* Set defalut LED */
668 marvell_config_led(phydev);
670 /* Set registers from marvell,reg-init DT property */
671 return marvell_of_reg_init(phydev);
674 static int m88e1116r_config_init(struct phy_device *phydev)
678 err = genphy_soft_reset(phydev);
684 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
688 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
692 err = marvell_set_downshift(phydev, true, 8);
696 if (phy_interface_is_rgmii(phydev)) {
697 err = m88e1121_config_aneg_rgmii_delays(phydev);
702 err = genphy_soft_reset(phydev);
706 return marvell_config_init(phydev);
709 static int m88e3016_config_init(struct phy_device *phydev)
713 /* Enable Scrambler and Auto-Crossover */
714 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
715 MII_88E3016_DISABLE_SCRAMBLER,
716 MII_88E3016_AUTO_MDIX_CROSSOVER);
720 return marvell_config_init(phydev);
723 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
725 int fibre_copper_auto)
727 if (fibre_copper_auto)
728 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
730 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
731 MII_M1111_HWCFG_MODE_MASK |
732 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
733 MII_M1111_HWCFG_FIBER_COPPER_RES,
737 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
741 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
742 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
743 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
744 delay = MII_M1111_RGMII_RX_DELAY;
745 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
746 delay = MII_M1111_RGMII_TX_DELAY;
751 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
752 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
756 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
761 err = m88e1111_config_init_rgmii_delays(phydev);
765 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
769 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
771 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
772 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
774 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
776 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
779 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
783 err = m88e1111_config_init_hwcfg_mode(
785 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
786 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
790 /* make sure copper is selected */
791 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
794 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
798 err = m88e1111_config_init_rgmii_delays(phydev);
802 err = m88e1111_config_init_hwcfg_mode(
804 MII_M1111_HWCFG_MODE_RTBI,
805 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
810 err = genphy_soft_reset(phydev);
814 return m88e1111_config_init_hwcfg_mode(
816 MII_M1111_HWCFG_MODE_RTBI,
817 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
820 static int m88e1111_config_init(struct phy_device *phydev)
824 if (phy_interface_is_rgmii(phydev)) {
825 err = m88e1111_config_init_rgmii(phydev);
830 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
831 err = m88e1111_config_init_sgmii(phydev);
836 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
837 err = m88e1111_config_init_rtbi(phydev);
842 err = marvell_of_reg_init(phydev);
846 return genphy_soft_reset(phydev);
849 static int m88e1318_config_init(struct phy_device *phydev)
851 if (phy_interrupt_is_valid(phydev)) {
852 int err = phy_modify_paged(
853 phydev, MII_MARVELL_LED_PAGE,
854 MII_88E1318S_PHY_LED_TCR,
855 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
856 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
857 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
862 return marvell_config_init(phydev);
865 static int m88e1510_config_init(struct phy_device *phydev)
869 /* SGMII-to-Copper mode initialization */
870 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
872 err = marvell_set_page(phydev, 18);
876 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
877 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
878 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
879 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
883 /* PHY reset is necessary after changing MODE[2:0] */
884 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
885 MII_88E1510_GEN_CTRL_REG_1_RESET);
889 /* Reset page selection */
890 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
895 return m88e1318_config_init(phydev);
898 static int m88e1118_config_aneg(struct phy_device *phydev)
902 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
906 err = genphy_config_aneg(phydev);
910 return genphy_soft_reset(phydev);
913 static int m88e1118_config_init(struct phy_device *phydev)
918 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
922 /* Enable 1000 Mbit */
923 err = phy_write(phydev, 0x15, 0x1070);
928 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
932 if (phy_interface_is_rgmii(phydev)) {
933 err = m88e1121_config_aneg_rgmii_delays(phydev);
938 /* Adjust LED Control */
939 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
940 err = phy_write(phydev, 0x10, 0x1100);
942 err = phy_write(phydev, 0x10, 0x021e);
946 err = marvell_of_reg_init(phydev);
951 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
955 return genphy_soft_reset(phydev);
958 static int m88e1149_config_init(struct phy_device *phydev)
963 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
967 /* Enable 1000 Mbit */
968 err = phy_write(phydev, 0x15, 0x1048);
972 err = marvell_of_reg_init(phydev);
977 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
981 return genphy_soft_reset(phydev);
984 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
988 err = m88e1111_config_init_rgmii_delays(phydev);
992 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
993 err = phy_write(phydev, 0x1d, 0x0012);
997 err = phy_modify(phydev, 0x1e, 0x0fc0,
998 2 << 9 | /* 36 ohm */
999 2 << 6); /* 39 ohm */
1003 err = phy_write(phydev, 0x1d, 0x3);
1007 err = phy_write(phydev, 0x1e, 0x8000);
1012 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1014 return m88e1111_config_init_hwcfg_mode(
1015 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1016 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1019 static int m88e1145_config_init(struct phy_device *phydev)
1023 /* Take care of errata E0 & E1 */
1024 err = phy_write(phydev, 0x1d, 0x001b);
1028 err = phy_write(phydev, 0x1e, 0x418f);
1032 err = phy_write(phydev, 0x1d, 0x0016);
1036 err = phy_write(phydev, 0x1e, 0xa2da);
1040 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1041 err = m88e1145_config_init_rgmii(phydev);
1046 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1047 err = m88e1145_config_init_sgmii(phydev);
1052 err = marvell_of_reg_init(phydev);
1059 /* The VOD can be out of specification on link up. Poke an
1060 * undocumented register, in an undocumented page, with a magic value
1063 static int m88e6390_errata(struct phy_device *phydev)
1067 err = phy_write(phydev, MII_BMCR,
1068 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1072 usleep_range(300, 400);
1074 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1078 return genphy_soft_reset(phydev);
1081 static int m88e6390_config_aneg(struct phy_device *phydev)
1085 err = m88e6390_errata(phydev);
1089 return m88e1510_config_aneg(phydev);
1093 * fiber_lpa_to_ethtool_lpa_t
1094 * @lpa: value of the MII_LPA register for fiber link
1096 * A small helper function that translates MII_LPA
1097 * bits to ethtool LP advertisement settings.
1099 static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1103 if (lpa & LPA_FIBER_1000HALF)
1104 result |= ADVERTISED_1000baseT_Half;
1105 if (lpa & LPA_FIBER_1000FULL)
1106 result |= ADVERTISED_1000baseT_Full;
1112 * marvell_update_link - update link status in real time in @phydev
1113 * @phydev: target phy_device struct
1115 * Description: Update the value in phydev->link to reflect the
1116 * current link value.
1118 static int marvell_update_link(struct phy_device *phydev, int fiber)
1122 /* Use the generic register for copper link, or specific
1123 * register for fiber case
1126 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1130 if ((status & REGISTER_LINK_STATUS) == 0)
1135 return genphy_update_link(phydev);
1141 static int marvell_read_status_page_an(struct phy_device *phydev,
1148 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1152 lpa = phy_read(phydev, MII_LPA);
1156 lpagb = phy_read(phydev, MII_STAT1000);
1160 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1161 phydev->duplex = DUPLEX_FULL;
1163 phydev->duplex = DUPLEX_HALF;
1165 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1167 phydev->asym_pause = 0;
1170 case MII_M1011_PHY_STATUS_1000:
1171 phydev->speed = SPEED_1000;
1174 case MII_M1011_PHY_STATUS_100:
1175 phydev->speed = SPEED_100;
1179 phydev->speed = SPEED_10;
1184 phydev->lp_advertising =
1185 mii_stat1000_to_ethtool_lpa_t(lpagb) |
1186 mii_lpa_to_ethtool_lpa_t(lpa);
1188 if (phydev->duplex == DUPLEX_FULL) {
1189 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1190 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1193 /* The fiber link is only 1000M capable */
1194 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1196 if (phydev->duplex == DUPLEX_FULL) {
1197 if (!(lpa & LPA_PAUSE_FIBER)) {
1199 phydev->asym_pause = 0;
1200 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1202 phydev->asym_pause = 1;
1205 phydev->asym_pause = 0;
1212 static int marvell_read_status_page_fixed(struct phy_device *phydev)
1214 int bmcr = phy_read(phydev, MII_BMCR);
1219 if (bmcr & BMCR_FULLDPLX)
1220 phydev->duplex = DUPLEX_FULL;
1222 phydev->duplex = DUPLEX_HALF;
1224 if (bmcr & BMCR_SPEED1000)
1225 phydev->speed = SPEED_1000;
1226 else if (bmcr & BMCR_SPEED100)
1227 phydev->speed = SPEED_100;
1229 phydev->speed = SPEED_10;
1232 phydev->asym_pause = 0;
1233 phydev->lp_advertising = 0;
1238 /* marvell_read_status_page
1241 * Check the link, then figure out the current state
1242 * by comparing what we advertise with what the link partner
1243 * advertises. Start by checking the gigabit possibilities,
1244 * then move on to 10/100.
1246 static int marvell_read_status_page(struct phy_device *phydev, int page)
1251 /* Detect and update the link, but return if there
1254 if (page == MII_MARVELL_FIBER_PAGE)
1259 err = marvell_update_link(phydev, fiber);
1263 if (phydev->autoneg == AUTONEG_ENABLE)
1264 err = marvell_read_status_page_an(phydev, fiber);
1266 err = marvell_read_status_page_fixed(phydev);
1271 /* marvell_read_status
1273 * Some Marvell's phys have two modes: fiber and copper.
1274 * Both need status checked.
1276 * First, check the fiber link and status.
1277 * If the fiber link is down, check the copper link and status which
1278 * will be the default value if both link are down.
1280 static int marvell_read_status(struct phy_device *phydev)
1284 /* Check the fiber mode first */
1285 if (phydev->supported & SUPPORTED_FIBRE &&
1286 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1287 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1291 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1295 /* If the fiber link is up, it is the selected and
1296 * used link. In this case, we need to stay in the
1297 * fiber page. Please to be careful about that, avoid
1298 * to restore Copper page in other functions which
1299 * could break the behaviour for some fiber phy like
1305 /* If fiber link is down, check and save copper mode state */
1306 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1311 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1314 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1320 * Some Marvell's phys have two modes: fiber and copper.
1321 * Both need to be suspended
1323 static int marvell_suspend(struct phy_device *phydev)
1327 /* Suspend the fiber mode first */
1328 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1329 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1333 /* With the page set, use the generic suspend */
1334 err = genphy_suspend(phydev);
1338 /* Then, the copper link */
1339 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1344 /* With the page set, use the generic suspend */
1345 return genphy_suspend(phydev);
1348 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1354 * Some Marvell's phys have two modes: fiber and copper.
1355 * Both need to be resumed
1357 static int marvell_resume(struct phy_device *phydev)
1361 /* Resume the fiber mode first */
1362 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1363 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1367 /* With the page set, use the generic resume */
1368 err = genphy_resume(phydev);
1372 /* Then, the copper link */
1373 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1378 /* With the page set, use the generic resume */
1379 return genphy_resume(phydev);
1382 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1386 static int marvell_aneg_done(struct phy_device *phydev)
1388 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1390 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1393 static int m88e1121_did_interrupt(struct phy_device *phydev)
1397 imask = phy_read(phydev, MII_M1011_IEVENT);
1399 if (imask & MII_M1011_IMASK_INIT)
1405 static void m88e1318_get_wol(struct phy_device *phydev,
1406 struct ethtool_wolinfo *wol)
1408 int oldpage, ret = 0;
1410 wol->supported = WAKE_MAGIC;
1413 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1417 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1418 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1419 wol->wolopts |= WAKE_MAGIC;
1422 phy_restore_page(phydev, oldpage, ret);
1425 static int m88e1318_set_wol(struct phy_device *phydev,
1426 struct ethtool_wolinfo *wol)
1428 int err = 0, oldpage;
1430 oldpage = phy_save_page(phydev);
1434 if (wol->wolopts & WAKE_MAGIC) {
1435 /* Explicitly switch to page 0x00, just to be sure */
1436 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1440 /* If WOL event happened once, the LED[2] interrupt pin
1441 * will not be cleared unless we reading the interrupt status
1442 * register. If interrupts are in use, the normal interrupt
1443 * handling will clear the WOL event. Clear the WOL event
1444 * before enabling it if !phy_interrupt_is_valid()
1446 if (!phy_interrupt_is_valid(phydev))
1447 __phy_read(phydev, MII_M1011_IEVENT);
1449 /* Enable the WOL interrupt */
1450 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1451 MII_88E1318S_PHY_CSIER_WOL_EIE);
1455 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1459 /* Setup LED[2] as interrupt pin (active low) */
1460 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1461 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1462 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1463 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1467 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1471 /* Store the device address for the magic packet */
1472 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1473 ((phydev->attached_dev->dev_addr[5] << 8) |
1474 phydev->attached_dev->dev_addr[4]));
1477 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1478 ((phydev->attached_dev->dev_addr[3] << 8) |
1479 phydev->attached_dev->dev_addr[2]));
1482 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1483 ((phydev->attached_dev->dev_addr[1] << 8) |
1484 phydev->attached_dev->dev_addr[0]));
1488 /* Clear WOL status and enable magic packet matching */
1489 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1490 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1491 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1495 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1499 /* Clear WOL status and disable magic packet matching */
1500 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1501 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1502 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1508 return phy_restore_page(phydev, oldpage, err);
1511 static int marvell_get_sset_count(struct phy_device *phydev)
1513 if (phydev->supported & SUPPORTED_FIBRE)
1514 return ARRAY_SIZE(marvell_hw_stats);
1516 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1519 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1521 int count = marvell_get_sset_count(phydev);
1524 for (i = 0; i < count; i++) {
1525 strlcpy(data + i * ETH_GSTRING_LEN,
1526 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1530 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1532 struct marvell_hw_stat stat = marvell_hw_stats[i];
1533 struct marvell_priv *priv = phydev->priv;
1537 val = phy_read_paged(phydev, stat.page, stat.reg);
1541 val = val & ((1 << stat.bits) - 1);
1542 priv->stats[i] += val;
1543 ret = priv->stats[i];
1549 static void marvell_get_stats(struct phy_device *phydev,
1550 struct ethtool_stats *stats, u64 *data)
1552 int count = marvell_get_sset_count(phydev);
1555 for (i = 0; i < count; i++)
1556 data[i] = marvell_get_stat(phydev, i);
1560 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1568 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1572 /* Enable temperature sensor */
1573 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
1577 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1578 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1582 /* Wait for temperature to stabilize */
1583 usleep_range(10000, 12000);
1585 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
1591 /* Disable temperature sensor */
1592 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1593 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1597 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1600 return phy_restore_page(phydev, oldpage, ret);
1603 static int m88e1121_hwmon_read(struct device *dev,
1604 enum hwmon_sensor_types type,
1605 u32 attr, int channel, long *temp)
1607 struct phy_device *phydev = dev_get_drvdata(dev);
1611 case hwmon_temp_input:
1612 err = m88e1121_get_temp(phydev, temp);
1621 static umode_t m88e1121_hwmon_is_visible(const void *data,
1622 enum hwmon_sensor_types type,
1623 u32 attr, int channel)
1625 if (type != hwmon_temp)
1629 case hwmon_temp_input:
1636 static u32 m88e1121_hwmon_chip_config[] = {
1637 HWMON_C_REGISTER_TZ,
1641 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1643 .config = m88e1121_hwmon_chip_config,
1646 static u32 m88e1121_hwmon_temp_config[] = {
1651 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1653 .config = m88e1121_hwmon_temp_config,
1656 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1657 &m88e1121_hwmon_chip,
1658 &m88e1121_hwmon_temp,
1662 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1663 .is_visible = m88e1121_hwmon_is_visible,
1664 .read = m88e1121_hwmon_read,
1667 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1668 .ops = &m88e1121_hwmon_hwmon_ops,
1669 .info = m88e1121_hwmon_info,
1672 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1678 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1679 MII_88E1510_TEMP_SENSOR);
1683 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1688 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1694 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1695 MII_88E1121_MISC_TEST);
1699 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1700 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1707 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1710 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1712 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1713 MII_88E1121_MISC_TEST,
1714 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1715 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
1718 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1724 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1725 MII_88E1121_MISC_TEST);
1729 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1734 static int m88e1510_hwmon_read(struct device *dev,
1735 enum hwmon_sensor_types type,
1736 u32 attr, int channel, long *temp)
1738 struct phy_device *phydev = dev_get_drvdata(dev);
1742 case hwmon_temp_input:
1743 err = m88e1510_get_temp(phydev, temp);
1745 case hwmon_temp_crit:
1746 err = m88e1510_get_temp_critical(phydev, temp);
1748 case hwmon_temp_max_alarm:
1749 err = m88e1510_get_temp_alarm(phydev, temp);
1758 static int m88e1510_hwmon_write(struct device *dev,
1759 enum hwmon_sensor_types type,
1760 u32 attr, int channel, long temp)
1762 struct phy_device *phydev = dev_get_drvdata(dev);
1766 case hwmon_temp_crit:
1767 err = m88e1510_set_temp_critical(phydev, temp);
1775 static umode_t m88e1510_hwmon_is_visible(const void *data,
1776 enum hwmon_sensor_types type,
1777 u32 attr, int channel)
1779 if (type != hwmon_temp)
1783 case hwmon_temp_input:
1784 case hwmon_temp_max_alarm:
1786 case hwmon_temp_crit:
1793 static u32 m88e1510_hwmon_temp_config[] = {
1794 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1798 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1800 .config = m88e1510_hwmon_temp_config,
1803 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1804 &m88e1121_hwmon_chip,
1805 &m88e1510_hwmon_temp,
1809 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1810 .is_visible = m88e1510_hwmon_is_visible,
1811 .read = m88e1510_hwmon_read,
1812 .write = m88e1510_hwmon_write,
1815 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1816 .ops = &m88e1510_hwmon_hwmon_ops,
1817 .info = m88e1510_hwmon_info,
1820 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
1829 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1833 /* Enable temperature sensor */
1834 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1838 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1839 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
1840 MII_88E6390_MISC_TEST_SAMPLE_1S;
1842 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1846 /* Wait for temperature to stabilize */
1847 usleep_range(10000, 12000);
1849 /* Reading the temperature sense has an errata. You need to read
1850 * a number of times and take an average.
1852 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
1853 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
1856 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
1859 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
1860 *temp = (sum - 75) * 1000;
1862 /* Disable temperature sensor */
1863 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1867 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1868 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
1870 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1873 phy_restore_page(phydev, oldpage, ret);
1878 static int m88e6390_hwmon_read(struct device *dev,
1879 enum hwmon_sensor_types type,
1880 u32 attr, int channel, long *temp)
1882 struct phy_device *phydev = dev_get_drvdata(dev);
1886 case hwmon_temp_input:
1887 err = m88e6390_get_temp(phydev, temp);
1896 static umode_t m88e6390_hwmon_is_visible(const void *data,
1897 enum hwmon_sensor_types type,
1898 u32 attr, int channel)
1900 if (type != hwmon_temp)
1904 case hwmon_temp_input:
1911 static u32 m88e6390_hwmon_temp_config[] = {
1916 static const struct hwmon_channel_info m88e6390_hwmon_temp = {
1918 .config = m88e6390_hwmon_temp_config,
1921 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
1922 &m88e1121_hwmon_chip,
1923 &m88e6390_hwmon_temp,
1927 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
1928 .is_visible = m88e6390_hwmon_is_visible,
1929 .read = m88e6390_hwmon_read,
1932 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
1933 .ops = &m88e6390_hwmon_hwmon_ops,
1934 .info = m88e6390_hwmon_info,
1937 static int marvell_hwmon_name(struct phy_device *phydev)
1939 struct marvell_priv *priv = phydev->priv;
1940 struct device *dev = &phydev->mdio.dev;
1941 const char *devname = dev_name(dev);
1942 size_t len = strlen(devname);
1945 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1946 if (!priv->hwmon_name)
1949 for (i = j = 0; i < len && devname[i]; i++) {
1950 if (isalnum(devname[i]))
1951 priv->hwmon_name[j++] = devname[i];
1957 static int marvell_hwmon_probe(struct phy_device *phydev,
1958 const struct hwmon_chip_info *chip)
1960 struct marvell_priv *priv = phydev->priv;
1961 struct device *dev = &phydev->mdio.dev;
1964 err = marvell_hwmon_name(phydev);
1968 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1969 dev, priv->hwmon_name, phydev, chip, NULL);
1971 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1974 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1976 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1979 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1981 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1984 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1986 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
1989 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1994 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1999 static int m88e6390_hwmon_probe(struct phy_device *phydev)
2005 static int marvell_probe(struct phy_device *phydev)
2007 struct marvell_priv *priv;
2009 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2013 phydev->priv = priv;
2018 static int m88e1121_probe(struct phy_device *phydev)
2022 err = marvell_probe(phydev);
2026 return m88e1121_hwmon_probe(phydev);
2029 static int m88e1510_probe(struct phy_device *phydev)
2033 err = marvell_probe(phydev);
2037 return m88e1510_hwmon_probe(phydev);
2040 static int m88e6390_probe(struct phy_device *phydev)
2044 err = marvell_probe(phydev);
2048 return m88e6390_hwmon_probe(phydev);
2051 static struct phy_driver marvell_drivers[] = {
2053 .phy_id = MARVELL_PHY_ID_88E1101,
2054 .phy_id_mask = MARVELL_PHY_ID_MASK,
2055 .name = "Marvell 88E1101",
2056 .features = PHY_GBIT_FEATURES,
2057 .flags = PHY_HAS_INTERRUPT,
2058 .probe = marvell_probe,
2059 .config_init = &marvell_config_init,
2060 .config_aneg = &m88e1101_config_aneg,
2061 .ack_interrupt = &marvell_ack_interrupt,
2062 .config_intr = &marvell_config_intr,
2063 .resume = &genphy_resume,
2064 .suspend = &genphy_suspend,
2065 .read_page = marvell_read_page,
2066 .write_page = marvell_write_page,
2067 .get_sset_count = marvell_get_sset_count,
2068 .get_strings = marvell_get_strings,
2069 .get_stats = marvell_get_stats,
2072 .phy_id = MARVELL_PHY_ID_88E1112,
2073 .phy_id_mask = MARVELL_PHY_ID_MASK,
2074 .name = "Marvell 88E1112",
2075 .features = PHY_GBIT_FEATURES,
2076 .flags = PHY_HAS_INTERRUPT,
2077 .probe = marvell_probe,
2078 .config_init = &m88e1111_config_init,
2079 .config_aneg = &marvell_config_aneg,
2080 .ack_interrupt = &marvell_ack_interrupt,
2081 .config_intr = &marvell_config_intr,
2082 .resume = &genphy_resume,
2083 .suspend = &genphy_suspend,
2084 .read_page = marvell_read_page,
2085 .write_page = marvell_write_page,
2086 .get_sset_count = marvell_get_sset_count,
2087 .get_strings = marvell_get_strings,
2088 .get_stats = marvell_get_stats,
2091 .phy_id = MARVELL_PHY_ID_88E1111,
2092 .phy_id_mask = MARVELL_PHY_ID_MASK,
2093 .name = "Marvell 88E1111",
2094 .features = PHY_GBIT_FEATURES,
2095 .flags = PHY_HAS_INTERRUPT,
2096 .probe = marvell_probe,
2097 .config_init = &m88e1111_config_init,
2098 .config_aneg = &m88e1111_config_aneg,
2099 .read_status = &marvell_read_status,
2100 .ack_interrupt = &marvell_ack_interrupt,
2101 .config_intr = &marvell_config_intr,
2102 .resume = &genphy_resume,
2103 .suspend = &genphy_suspend,
2104 .read_page = marvell_read_page,
2105 .write_page = marvell_write_page,
2106 .get_sset_count = marvell_get_sset_count,
2107 .get_strings = marvell_get_strings,
2108 .get_stats = marvell_get_stats,
2111 .phy_id = MARVELL_PHY_ID_88E1118,
2112 .phy_id_mask = MARVELL_PHY_ID_MASK,
2113 .name = "Marvell 88E1118",
2114 .features = PHY_GBIT_FEATURES,
2115 .flags = PHY_HAS_INTERRUPT,
2116 .probe = marvell_probe,
2117 .config_init = &m88e1118_config_init,
2118 .config_aneg = &m88e1118_config_aneg,
2119 .ack_interrupt = &marvell_ack_interrupt,
2120 .config_intr = &marvell_config_intr,
2121 .resume = &genphy_resume,
2122 .suspend = &genphy_suspend,
2123 .read_page = marvell_read_page,
2124 .write_page = marvell_write_page,
2125 .get_sset_count = marvell_get_sset_count,
2126 .get_strings = marvell_get_strings,
2127 .get_stats = marvell_get_stats,
2130 .phy_id = MARVELL_PHY_ID_88E1121R,
2131 .phy_id_mask = MARVELL_PHY_ID_MASK,
2132 .name = "Marvell 88E1121R",
2133 .features = PHY_GBIT_FEATURES,
2134 .flags = PHY_HAS_INTERRUPT,
2135 .probe = &m88e1121_probe,
2136 .config_init = &marvell_config_init,
2137 .config_aneg = &m88e1121_config_aneg,
2138 .read_status = &marvell_read_status,
2139 .ack_interrupt = &marvell_ack_interrupt,
2140 .config_intr = &marvell_config_intr,
2141 .did_interrupt = &m88e1121_did_interrupt,
2142 .resume = &genphy_resume,
2143 .suspend = &genphy_suspend,
2144 .read_page = marvell_read_page,
2145 .write_page = marvell_write_page,
2146 .get_sset_count = marvell_get_sset_count,
2147 .get_strings = marvell_get_strings,
2148 .get_stats = marvell_get_stats,
2151 .phy_id = MARVELL_PHY_ID_88E1318S,
2152 .phy_id_mask = MARVELL_PHY_ID_MASK,
2153 .name = "Marvell 88E1318S",
2154 .features = PHY_GBIT_FEATURES,
2155 .flags = PHY_HAS_INTERRUPT,
2156 .probe = marvell_probe,
2157 .config_init = &m88e1318_config_init,
2158 .config_aneg = &m88e1318_config_aneg,
2159 .read_status = &marvell_read_status,
2160 .ack_interrupt = &marvell_ack_interrupt,
2161 .config_intr = &marvell_config_intr,
2162 .did_interrupt = &m88e1121_did_interrupt,
2163 .get_wol = &m88e1318_get_wol,
2164 .set_wol = &m88e1318_set_wol,
2165 .resume = &genphy_resume,
2166 .suspend = &genphy_suspend,
2167 .read_page = marvell_read_page,
2168 .write_page = marvell_write_page,
2169 .get_sset_count = marvell_get_sset_count,
2170 .get_strings = marvell_get_strings,
2171 .get_stats = marvell_get_stats,
2174 .phy_id = MARVELL_PHY_ID_88E1145,
2175 .phy_id_mask = MARVELL_PHY_ID_MASK,
2176 .name = "Marvell 88E1145",
2177 .features = PHY_GBIT_FEATURES,
2178 .flags = PHY_HAS_INTERRUPT,
2179 .probe = marvell_probe,
2180 .config_init = &m88e1145_config_init,
2181 .config_aneg = &m88e1101_config_aneg,
2182 .read_status = &genphy_read_status,
2183 .ack_interrupt = &marvell_ack_interrupt,
2184 .config_intr = &marvell_config_intr,
2185 .resume = &genphy_resume,
2186 .suspend = &genphy_suspend,
2187 .read_page = marvell_read_page,
2188 .write_page = marvell_write_page,
2189 .get_sset_count = marvell_get_sset_count,
2190 .get_strings = marvell_get_strings,
2191 .get_stats = marvell_get_stats,
2194 .phy_id = MARVELL_PHY_ID_88E1149R,
2195 .phy_id_mask = MARVELL_PHY_ID_MASK,
2196 .name = "Marvell 88E1149R",
2197 .features = PHY_GBIT_FEATURES,
2198 .flags = PHY_HAS_INTERRUPT,
2199 .probe = marvell_probe,
2200 .config_init = &m88e1149_config_init,
2201 .config_aneg = &m88e1118_config_aneg,
2202 .ack_interrupt = &marvell_ack_interrupt,
2203 .config_intr = &marvell_config_intr,
2204 .resume = &genphy_resume,
2205 .suspend = &genphy_suspend,
2206 .read_page = marvell_read_page,
2207 .write_page = marvell_write_page,
2208 .get_sset_count = marvell_get_sset_count,
2209 .get_strings = marvell_get_strings,
2210 .get_stats = marvell_get_stats,
2213 .phy_id = MARVELL_PHY_ID_88E1240,
2214 .phy_id_mask = MARVELL_PHY_ID_MASK,
2215 .name = "Marvell 88E1240",
2216 .features = PHY_GBIT_FEATURES,
2217 .flags = PHY_HAS_INTERRUPT,
2218 .probe = marvell_probe,
2219 .config_init = &m88e1111_config_init,
2220 .config_aneg = &marvell_config_aneg,
2221 .ack_interrupt = &marvell_ack_interrupt,
2222 .config_intr = &marvell_config_intr,
2223 .resume = &genphy_resume,
2224 .suspend = &genphy_suspend,
2225 .read_page = marvell_read_page,
2226 .write_page = marvell_write_page,
2227 .get_sset_count = marvell_get_sset_count,
2228 .get_strings = marvell_get_strings,
2229 .get_stats = marvell_get_stats,
2232 .phy_id = MARVELL_PHY_ID_88E1116R,
2233 .phy_id_mask = MARVELL_PHY_ID_MASK,
2234 .name = "Marvell 88E1116R",
2235 .features = PHY_GBIT_FEATURES,
2236 .flags = PHY_HAS_INTERRUPT,
2237 .probe = marvell_probe,
2238 .config_init = &m88e1116r_config_init,
2239 .ack_interrupt = &marvell_ack_interrupt,
2240 .config_intr = &marvell_config_intr,
2241 .resume = &genphy_resume,
2242 .suspend = &genphy_suspend,
2243 .read_page = marvell_read_page,
2244 .write_page = marvell_write_page,
2245 .get_sset_count = marvell_get_sset_count,
2246 .get_strings = marvell_get_strings,
2247 .get_stats = marvell_get_stats,
2250 .phy_id = MARVELL_PHY_ID_88E1510,
2251 .phy_id_mask = MARVELL_PHY_ID_MASK,
2252 .name = "Marvell 88E1510",
2253 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
2254 .flags = PHY_HAS_INTERRUPT,
2255 .probe = &m88e1510_probe,
2256 .config_init = &m88e1510_config_init,
2257 .config_aneg = &m88e1510_config_aneg,
2258 .read_status = &marvell_read_status,
2259 .ack_interrupt = &marvell_ack_interrupt,
2260 .config_intr = &marvell_config_intr,
2261 .did_interrupt = &m88e1121_did_interrupt,
2262 .get_wol = &m88e1318_get_wol,
2263 .set_wol = &m88e1318_set_wol,
2264 .resume = &marvell_resume,
2265 .suspend = &marvell_suspend,
2266 .read_page = marvell_read_page,
2267 .write_page = marvell_write_page,
2268 .get_sset_count = marvell_get_sset_count,
2269 .get_strings = marvell_get_strings,
2270 .get_stats = marvell_get_stats,
2271 .set_loopback = genphy_loopback,
2274 .phy_id = MARVELL_PHY_ID_88E1540,
2275 .phy_id_mask = MARVELL_PHY_ID_MASK,
2276 .name = "Marvell 88E1540",
2277 .features = PHY_GBIT_FEATURES,
2278 .flags = PHY_HAS_INTERRUPT,
2279 .probe = m88e1510_probe,
2280 .config_init = &marvell_config_init,
2281 .config_aneg = &m88e1510_config_aneg,
2282 .read_status = &marvell_read_status,
2283 .ack_interrupt = &marvell_ack_interrupt,
2284 .config_intr = &marvell_config_intr,
2285 .did_interrupt = &m88e1121_did_interrupt,
2286 .resume = &genphy_resume,
2287 .suspend = &genphy_suspend,
2288 .read_page = marvell_read_page,
2289 .write_page = marvell_write_page,
2290 .get_sset_count = marvell_get_sset_count,
2291 .get_strings = marvell_get_strings,
2292 .get_stats = marvell_get_stats,
2295 .phy_id = MARVELL_PHY_ID_88E1545,
2296 .phy_id_mask = MARVELL_PHY_ID_MASK,
2297 .name = "Marvell 88E1545",
2298 .probe = m88e1510_probe,
2299 .features = PHY_GBIT_FEATURES,
2300 .flags = PHY_HAS_INTERRUPT,
2301 .config_init = &marvell_config_init,
2302 .config_aneg = &m88e1510_config_aneg,
2303 .read_status = &marvell_read_status,
2304 .ack_interrupt = &marvell_ack_interrupt,
2305 .config_intr = &marvell_config_intr,
2306 .did_interrupt = &m88e1121_did_interrupt,
2307 .resume = &genphy_resume,
2308 .suspend = &genphy_suspend,
2309 .read_page = marvell_read_page,
2310 .write_page = marvell_write_page,
2311 .get_sset_count = marvell_get_sset_count,
2312 .get_strings = marvell_get_strings,
2313 .get_stats = marvell_get_stats,
2316 .phy_id = MARVELL_PHY_ID_88E3016,
2317 .phy_id_mask = MARVELL_PHY_ID_MASK,
2318 .name = "Marvell 88E3016",
2319 .features = PHY_BASIC_FEATURES,
2320 .flags = PHY_HAS_INTERRUPT,
2321 .probe = marvell_probe,
2322 .config_init = &m88e3016_config_init,
2323 .aneg_done = &marvell_aneg_done,
2324 .read_status = &marvell_read_status,
2325 .ack_interrupt = &marvell_ack_interrupt,
2326 .config_intr = &marvell_config_intr,
2327 .did_interrupt = &m88e1121_did_interrupt,
2328 .resume = &genphy_resume,
2329 .suspend = &genphy_suspend,
2330 .read_page = marvell_read_page,
2331 .write_page = marvell_write_page,
2332 .get_sset_count = marvell_get_sset_count,
2333 .get_strings = marvell_get_strings,
2334 .get_stats = marvell_get_stats,
2337 .phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
2338 .phy_id_mask = MARVELL_PHY_ID_MASK,
2339 .name = "Marvell 88E6341 Family",
2340 .features = PHY_GBIT_FEATURES,
2341 .flags = PHY_HAS_INTERRUPT,
2342 .probe = m88e1510_probe,
2343 .config_init = &marvell_config_init,
2344 .config_aneg = &m88e6390_config_aneg,
2345 .read_status = &marvell_read_status,
2346 .ack_interrupt = &marvell_ack_interrupt,
2347 .config_intr = &marvell_config_intr,
2348 .did_interrupt = &m88e1121_did_interrupt,
2349 .resume = &genphy_resume,
2350 .suspend = &genphy_suspend,
2351 .read_page = marvell_read_page,
2352 .write_page = marvell_write_page,
2353 .get_sset_count = marvell_get_sset_count,
2354 .get_strings = marvell_get_strings,
2355 .get_stats = marvell_get_stats,
2358 .phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
2359 .phy_id_mask = MARVELL_PHY_ID_MASK,
2360 .name = "Marvell 88E6390 Family",
2361 .features = PHY_GBIT_FEATURES,
2362 .flags = PHY_HAS_INTERRUPT,
2363 .probe = m88e6390_probe,
2364 .config_init = &marvell_config_init,
2365 .config_aneg = &m88e6390_config_aneg,
2366 .read_status = &marvell_read_status,
2367 .ack_interrupt = &marvell_ack_interrupt,
2368 .config_intr = &marvell_config_intr,
2369 .did_interrupt = &m88e1121_did_interrupt,
2370 .resume = &genphy_resume,
2371 .suspend = &genphy_suspend,
2372 .read_page = marvell_read_page,
2373 .write_page = marvell_write_page,
2374 .get_sset_count = marvell_get_sset_count,
2375 .get_strings = marvell_get_strings,
2376 .get_stats = marvell_get_stats,
2380 module_phy_driver(marvell_drivers);
2382 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2383 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2384 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2385 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2386 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2387 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2388 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2389 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2390 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2391 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2392 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2393 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2394 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2395 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2396 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2397 { MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
2398 { MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
2402 MODULE_DEVICE_TABLE(mdio, marvell_tbl);