GNU Linux-libre 4.9.309-gnu1
[releases.git] / drivers / net / usb / r8152.c
1 /*
2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * version 2 as published by the Free Software Foundation.
7  *
8  */
9
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
22 #include <linux/ip.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29 #include <linux/acpi.h>
30
31 /* Information for net-next */
32 #define NETNEXT_VERSION         "08"
33
34 /* Information for net */
35 #define NET_VERSION             "9"
36
37 #define DRIVER_VERSION          "v1." NETNEXT_VERSION "." NET_VERSION
38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
40 #define MODULENAME "r8152"
41
42 #define R8152_PHY_ID            32
43
44 #define PLA_IDR                 0xc000
45 #define PLA_RCR                 0xc010
46 #define PLA_RMS                 0xc016
47 #define PLA_RXFIFO_CTRL0        0xc0a0
48 #define PLA_RXFIFO_CTRL1        0xc0a4
49 #define PLA_RXFIFO_CTRL2        0xc0a8
50 #define PLA_DMY_REG0            0xc0b0
51 #define PLA_FMC                 0xc0b4
52 #define PLA_CFG_WOL             0xc0b6
53 #define PLA_TEREDO_CFG          0xc0bc
54 #define PLA_MAR                 0xcd00
55 #define PLA_BACKUP              0xd000
56 #define PAL_BDC_CR              0xd1a0
57 #define PLA_TEREDO_TIMER        0xd2cc
58 #define PLA_REALWOW_TIMER       0xd2e8
59 #define PLA_LEDSEL              0xdd90
60 #define PLA_LED_FEATURE         0xdd92
61 #define PLA_PHYAR               0xde00
62 #define PLA_BOOT_CTRL           0xe004
63 #define PLA_GPHY_INTR_IMR       0xe022
64 #define PLA_EEE_CR              0xe040
65 #define PLA_EEEP_CR             0xe080
66 #define PLA_MAC_PWR_CTRL        0xe0c0
67 #define PLA_MAC_PWR_CTRL2       0xe0ca
68 #define PLA_MAC_PWR_CTRL3       0xe0cc
69 #define PLA_MAC_PWR_CTRL4       0xe0ce
70 #define PLA_WDT6_CTRL           0xe428
71 #define PLA_TCR0                0xe610
72 #define PLA_TCR1                0xe612
73 #define PLA_MTPS                0xe615
74 #define PLA_TXFIFO_CTRL         0xe618
75 #define PLA_RSTTALLY            0xe800
76 #define PLA_CR                  0xe813
77 #define PLA_CRWECR              0xe81c
78 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
79 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
80 #define PLA_CONFIG5             0xe822
81 #define PLA_PHY_PWR             0xe84c
82 #define PLA_OOB_CTRL            0xe84f
83 #define PLA_CPCR                0xe854
84 #define PLA_MISC_0              0xe858
85 #define PLA_MISC_1              0xe85a
86 #define PLA_OCP_GPHY_BASE       0xe86c
87 #define PLA_TALLYCNT            0xe890
88 #define PLA_SFF_STS_7           0xe8de
89 #define PLA_PHYSTATUS           0xe908
90 #define PLA_BP_BA               0xfc26
91 #define PLA_BP_0                0xfc28
92 #define PLA_BP_1                0xfc2a
93 #define PLA_BP_2                0xfc2c
94 #define PLA_BP_3                0xfc2e
95 #define PLA_BP_4                0xfc30
96 #define PLA_BP_5                0xfc32
97 #define PLA_BP_6                0xfc34
98 #define PLA_BP_7                0xfc36
99 #define PLA_BP_EN               0xfc38
100
101 #define USB_USB2PHY             0xb41e
102 #define USB_SSPHYLINK2          0xb428
103 #define USB_U2P3_CTRL           0xb460
104 #define USB_CSR_DUMMY1          0xb464
105 #define USB_CSR_DUMMY2          0xb466
106 #define USB_DEV_STAT            0xb808
107 #define USB_CONNECT_TIMER       0xcbf8
108 #define USB_BURST_SIZE          0xcfc0
109 #define USB_USB_CTRL            0xd406
110 #define USB_PHY_CTRL            0xd408
111 #define USB_TX_AGG              0xd40a
112 #define USB_RX_BUF_TH           0xd40c
113 #define USB_USB_TIMER           0xd428
114 #define USB_RX_EARLY_TIMEOUT    0xd42c
115 #define USB_RX_EARLY_SIZE       0xd42e
116 #define USB_PM_CTRL_STATUS      0xd432
117 #define USB_TX_DMA              0xd434
118 #define USB_TOLERANCE           0xd490
119 #define USB_LPM_CTRL            0xd41a
120 #define USB_BMU_RESET           0xd4b0
121 #define USB_UPS_CTRL            0xd800
122 #define USB_MISC_0              0xd81a
123 #define USB_POWER_CUT           0xd80a
124 #define USB_AFE_CTRL2           0xd824
125 #define USB_WDT11_CTRL          0xe43c
126 #define USB_BP_BA               0xfc26
127 #define USB_BP_0                0xfc28
128 #define USB_BP_1                0xfc2a
129 #define USB_BP_2                0xfc2c
130 #define USB_BP_3                0xfc2e
131 #define USB_BP_4                0xfc30
132 #define USB_BP_5                0xfc32
133 #define USB_BP_6                0xfc34
134 #define USB_BP_7                0xfc36
135 #define USB_BP_EN               0xfc38
136
137 /* OCP Registers */
138 #define OCP_ALDPS_CONFIG        0x2010
139 #define OCP_EEE_CONFIG1         0x2080
140 #define OCP_EEE_CONFIG2         0x2092
141 #define OCP_EEE_CONFIG3         0x2094
142 #define OCP_BASE_MII            0xa400
143 #define OCP_EEE_AR              0xa41a
144 #define OCP_EEE_DATA            0xa41c
145 #define OCP_PHY_STATUS          0xa420
146 #define OCP_POWER_CFG           0xa430
147 #define OCP_EEE_CFG             0xa432
148 #define OCP_SRAM_ADDR           0xa436
149 #define OCP_SRAM_DATA           0xa438
150 #define OCP_DOWN_SPEED          0xa442
151 #define OCP_EEE_ABLE            0xa5c4
152 #define OCP_EEE_ADV             0xa5d0
153 #define OCP_EEE_LPABLE          0xa5d2
154 #define OCP_PHY_STATE           0xa708          /* nway state for 8153 */
155 #define OCP_ADC_CFG             0xbc06
156
157 /* SRAM Register */
158 #define SRAM_LPF_CFG            0x8012
159 #define SRAM_10M_AMP1           0x8080
160 #define SRAM_10M_AMP2           0x8082
161 #define SRAM_IMPEDANCE          0x8084
162
163 /* PLA_RCR */
164 #define RCR_AAP                 0x00000001
165 #define RCR_APM                 0x00000002
166 #define RCR_AM                  0x00000004
167 #define RCR_AB                  0x00000008
168 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
169
170 /* PLA_RXFIFO_CTRL0 */
171 #define RXFIFO_THR1_NORMAL      0x00080002
172 #define RXFIFO_THR1_OOB         0x01800003
173
174 /* PLA_RXFIFO_CTRL1 */
175 #define RXFIFO_THR2_FULL        0x00000060
176 #define RXFIFO_THR2_HIGH        0x00000038
177 #define RXFIFO_THR2_OOB         0x0000004a
178 #define RXFIFO_THR2_NORMAL      0x00a0
179
180 /* PLA_RXFIFO_CTRL2 */
181 #define RXFIFO_THR3_FULL        0x00000078
182 #define RXFIFO_THR3_HIGH        0x00000048
183 #define RXFIFO_THR3_OOB         0x0000005a
184 #define RXFIFO_THR3_NORMAL      0x0110
185
186 /* PLA_TXFIFO_CTRL */
187 #define TXFIFO_THR_NORMAL       0x00400008
188 #define TXFIFO_THR_NORMAL2      0x01000008
189
190 /* PLA_DMY_REG0 */
191 #define ECM_ALDPS               0x0002
192
193 /* PLA_FMC */
194 #define FMC_FCR_MCU_EN          0x0001
195
196 /* PLA_EEEP_CR */
197 #define EEEP_CR_EEEP_TX         0x0002
198
199 /* PLA_WDT6_CTRL */
200 #define WDT6_SET_MODE           0x0010
201
202 /* PLA_TCR0 */
203 #define TCR0_TX_EMPTY           0x0800
204 #define TCR0_AUTO_FIFO          0x0080
205
206 /* PLA_TCR1 */
207 #define VERSION_MASK            0x7cf0
208
209 /* PLA_MTPS */
210 #define MTPS_JUMBO              (12 * 1024 / 64)
211 #define MTPS_DEFAULT            (6 * 1024 / 64)
212
213 /* PLA_RSTTALLY */
214 #define TALLY_RESET             0x0001
215
216 /* PLA_CR */
217 #define CR_RST                  0x10
218 #define CR_RE                   0x08
219 #define CR_TE                   0x04
220
221 /* PLA_CRWECR */
222 #define CRWECR_NORAML           0x00
223 #define CRWECR_CONFIG           0xc0
224
225 /* PLA_OOB_CTRL */
226 #define NOW_IS_OOB              0x80
227 #define TXFIFO_EMPTY            0x20
228 #define RXFIFO_EMPTY            0x10
229 #define LINK_LIST_READY         0x02
230 #define DIS_MCU_CLROOB          0x01
231 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
232
233 /* PLA_MISC_1 */
234 #define RXDY_GATED_EN           0x0008
235
236 /* PLA_SFF_STS_7 */
237 #define RE_INIT_LL              0x8000
238 #define MCU_BORW_EN             0x4000
239
240 /* PLA_CPCR */
241 #define CPCR_RX_VLAN            0x0040
242
243 /* PLA_CFG_WOL */
244 #define MAGIC_EN                0x0001
245
246 /* PLA_TEREDO_CFG */
247 #define TEREDO_SEL              0x8000
248 #define TEREDO_WAKE_MASK        0x7f00
249 #define TEREDO_RS_EVENT_MASK    0x00fe
250 #define OOB_TEREDO_EN           0x0001
251
252 /* PAL_BDC_CR */
253 #define ALDPS_PROXY_MODE        0x0001
254
255 /* PLA_CONFIG34 */
256 #define LINK_ON_WAKE_EN         0x0010
257 #define LINK_OFF_WAKE_EN        0x0008
258
259 /* PLA_CONFIG5 */
260 #define BWF_EN                  0x0040
261 #define MWF_EN                  0x0020
262 #define UWF_EN                  0x0010
263 #define LAN_WAKE_EN             0x0002
264
265 /* PLA_LED_FEATURE */
266 #define LED_MODE_MASK           0x0700
267
268 /* PLA_PHY_PWR */
269 #define TX_10M_IDLE_EN          0x0080
270 #define PFM_PWM_SWITCH          0x0040
271
272 /* PLA_MAC_PWR_CTRL */
273 #define D3_CLK_GATED_EN         0x00004000
274 #define MCU_CLK_RATIO           0x07010f07
275 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
276 #define ALDPS_SPDWN_RATIO       0x0f87
277
278 /* PLA_MAC_PWR_CTRL2 */
279 #define EEE_SPDWN_RATIO         0x8007
280
281 /* PLA_MAC_PWR_CTRL3 */
282 #define PKT_AVAIL_SPDWN_EN      0x0100
283 #define SUSPEND_SPDWN_EN        0x0004
284 #define U1U2_SPDWN_EN           0x0002
285 #define L1_SPDWN_EN             0x0001
286
287 /* PLA_MAC_PWR_CTRL4 */
288 #define PWRSAVE_SPDWN_EN        0x1000
289 #define RXDV_SPDWN_EN           0x0800
290 #define TX10MIDLE_EN            0x0100
291 #define TP100_SPDWN_EN          0x0020
292 #define TP500_SPDWN_EN          0x0010
293 #define TP1000_SPDWN_EN         0x0008
294 #define EEE_SPDWN_EN            0x0001
295
296 /* PLA_GPHY_INTR_IMR */
297 #define GPHY_STS_MSK            0x0001
298 #define SPEED_DOWN_MSK          0x0002
299 #define SPDWN_RXDV_MSK          0x0004
300 #define SPDWN_LINKCHG_MSK       0x0008
301
302 /* PLA_PHYAR */
303 #define PHYAR_FLAG              0x80000000
304
305 /* PLA_EEE_CR */
306 #define EEE_RX_EN               0x0001
307 #define EEE_TX_EN               0x0002
308
309 /* PLA_BOOT_CTRL */
310 #define AUTOLOAD_DONE           0x0002
311
312 /* USB_USB2PHY */
313 #define USB2PHY_SUSPEND         0x0001
314 #define USB2PHY_L1              0x0002
315
316 /* USB_SSPHYLINK2 */
317 #define pwd_dn_scale_mask       0x3ffe
318 #define pwd_dn_scale(x)         ((x) << 1)
319
320 /* USB_CSR_DUMMY1 */
321 #define DYNAMIC_BURST           0x0001
322
323 /* USB_CSR_DUMMY2 */
324 #define EP4_FULL_FC             0x0001
325
326 /* USB_DEV_STAT */
327 #define STAT_SPEED_MASK         0x0006
328 #define STAT_SPEED_HIGH         0x0000
329 #define STAT_SPEED_FULL         0x0002
330
331 /* USB_TX_AGG */
332 #define TX_AGG_MAX_THRESHOLD    0x03
333
334 /* USB_RX_BUF_TH */
335 #define RX_THR_SUPPER           0x0c350180
336 #define RX_THR_HIGH             0x7a120180
337 #define RX_THR_SLOW             0xffff0180
338
339 /* USB_TX_DMA */
340 #define TEST_MODE_DISABLE       0x00000001
341 #define TX_SIZE_ADJUST1         0x00000100
342
343 /* USB_BMU_RESET */
344 #define BMU_RESET_EP_IN         0x01
345 #define BMU_RESET_EP_OUT        0x02
346
347 /* USB_UPS_CTRL */
348 #define POWER_CUT               0x0100
349
350 /* USB_PM_CTRL_STATUS */
351 #define RESUME_INDICATE         0x0001
352
353 /* USB_USB_CTRL */
354 #define RX_AGG_DISABLE          0x0010
355 #define RX_ZERO_EN              0x0080
356
357 /* USB_U2P3_CTRL */
358 #define U2P3_ENABLE             0x0001
359
360 /* USB_POWER_CUT */
361 #define PWR_EN                  0x0001
362 #define PHASE2_EN               0x0008
363
364 /* USB_MISC_0 */
365 #define PCUT_STATUS             0x0001
366
367 /* USB_RX_EARLY_TIMEOUT */
368 #define COALESCE_SUPER           85000U
369 #define COALESCE_HIGH           250000U
370 #define COALESCE_SLOW           524280U
371
372 /* USB_WDT11_CTRL */
373 #define TIMER11_EN              0x0001
374
375 /* USB_LPM_CTRL */
376 /* bit 4 ~ 5: fifo empty boundary */
377 #define FIFO_EMPTY_1FB          0x30    /* 0x1fb * 64 = 32448 bytes */
378 /* bit 2 ~ 3: LMP timer */
379 #define LPM_TIMER_MASK          0x0c
380 #define LPM_TIMER_500MS         0x04    /* 500 ms */
381 #define LPM_TIMER_500US         0x0c    /* 500 us */
382 #define ROK_EXIT_LPM            0x02
383
384 /* USB_AFE_CTRL2 */
385 #define SEN_VAL_MASK            0xf800
386 #define SEN_VAL_NORMAL          0xa000
387 #define SEL_RXIDLE              0x0100
388
389 /* OCP_ALDPS_CONFIG */
390 #define ENPWRSAVE               0x8000
391 #define ENPDNPS                 0x0200
392 #define LINKENA                 0x0100
393 #define DIS_SDSAVE              0x0010
394
395 /* OCP_PHY_STATUS */
396 #define PHY_STAT_MASK           0x0007
397 #define PHY_STAT_LAN_ON         3
398 #define PHY_STAT_PWRDN          5
399
400 /* OCP_POWER_CFG */
401 #define EEE_CLKDIV_EN           0x8000
402 #define EN_ALDPS                0x0004
403 #define EN_10M_PLLOFF           0x0001
404
405 /* OCP_EEE_CONFIG1 */
406 #define RG_TXLPI_MSK_HFDUP      0x8000
407 #define RG_MATCLR_EN            0x4000
408 #define EEE_10_CAP              0x2000
409 #define EEE_NWAY_EN             0x1000
410 #define TX_QUIET_EN             0x0200
411 #define RX_QUIET_EN             0x0100
412 #define sd_rise_time_mask       0x0070
413 #define sd_rise_time(x)         (min(x, 7) << 4)        /* bit 4 ~ 6 */
414 #define RG_RXLPI_MSK_HFDUP      0x0008
415 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
416
417 /* OCP_EEE_CONFIG2 */
418 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
419 #define RG_DACQUIET_EN          0x0400
420 #define RG_LDVQUIET_EN          0x0200
421 #define RG_CKRSEL               0x0020
422 #define RG_EEEPRG_EN            0x0010
423
424 /* OCP_EEE_CONFIG3 */
425 #define fast_snr_mask           0xff80
426 #define fast_snr(x)             (min(x, 0x1ff) << 7)    /* bit 7 ~ 15 */
427 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
428 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
429
430 /* OCP_EEE_AR */
431 /* bit[15:14] function */
432 #define FUN_ADDR                0x0000
433 #define FUN_DATA                0x4000
434 /* bit[4:0] device addr */
435
436 /* OCP_EEE_CFG */
437 #define CTAP_SHORT_EN           0x0040
438 #define EEE10_EN                0x0010
439
440 /* OCP_DOWN_SPEED */
441 #define EN_10M_BGOFF            0x0080
442
443 /* OCP_PHY_STATE */
444 #define TXDIS_STATE             0x01
445 #define ABD_STATE               0x02
446
447 /* OCP_ADC_CFG */
448 #define CKADSEL_L               0x0100
449 #define ADC_EN                  0x0080
450 #define EN_EMI_L                0x0040
451
452 /* SRAM_LPF_CFG */
453 #define LPF_AUTO_TUNE           0x8000
454
455 /* SRAM_10M_AMP1 */
456 #define GDAC_IB_UPALL           0x0008
457
458 /* SRAM_10M_AMP2 */
459 #define AMP_DN                  0x0200
460
461 /* SRAM_IMPEDANCE */
462 #define RX_DRIVING_MASK         0x6000
463
464 /* MAC PASSTHRU */
465 #define AD_MASK                 0xfee0
466 #define EFUSE                   0xcfdb
467 #define PASS_THRU_MASK          0x1
468
469 enum rtl_register_content {
470         _1000bps        = 0x10,
471         _100bps         = 0x08,
472         _10bps          = 0x04,
473         LINK_STATUS     = 0x02,
474         FULL_DUP        = 0x01,
475 };
476
477 #define RTL8152_MAX_TX          4
478 #define RTL8152_MAX_RX          10
479 #define INTBUFSIZE              2
480 #define CRC_SIZE                4
481 #define TX_ALIGN                4
482 #define RX_ALIGN                8
483
484 #define INTR_LINK               0x0004
485
486 #define RTL8152_REQT_READ       0xc0
487 #define RTL8152_REQT_WRITE      0x40
488 #define RTL8152_REQ_GET_REGS    0x05
489 #define RTL8152_REQ_SET_REGS    0x05
490
491 #define BYTE_EN_DWORD           0xff
492 #define BYTE_EN_WORD            0x33
493 #define BYTE_EN_BYTE            0x11
494 #define BYTE_EN_SIX_BYTES       0x3f
495 #define BYTE_EN_START_MASK      0x0f
496 #define BYTE_EN_END_MASK        0xf0
497
498 #define RTL8153_MAX_PACKET      9216 /* 9K */
499 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
500 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
501 #define RTL8153_RMS             RTL8153_MAX_PACKET
502 #define RTL8152_TX_TIMEOUT      (5 * HZ)
503 #define RTL8152_NAPI_WEIGHT     64
504 #define rx_reserved_size(x)     ((x) + VLAN_ETH_HLEN + CRC_SIZE + \
505                                  sizeof(struct rx_desc) + RX_ALIGN)
506
507 /* rtl8152 flags */
508 enum rtl8152_flags {
509         RTL8152_UNPLUG = 0,
510         RTL8152_SET_RX_MODE,
511         WORK_ENABLE,
512         RTL8152_LINK_CHG,
513         SELECTIVE_SUSPEND,
514         PHY_RESET,
515         SCHEDULE_NAPI,
516 };
517
518 /* Define these values to match your device */
519 #define VENDOR_ID_REALTEK               0x0bda
520 #define VENDOR_ID_SAMSUNG               0x04e8
521 #define VENDOR_ID_LENOVO                0x17ef
522 #define VENDOR_ID_LINKSYS               0x13b1
523 #define VENDOR_ID_NVIDIA                0x0955
524
525 #define MCU_TYPE_PLA                    0x0100
526 #define MCU_TYPE_USB                    0x0000
527
528 struct tally_counter {
529         __le64  tx_packets;
530         __le64  rx_packets;
531         __le64  tx_errors;
532         __le32  rx_errors;
533         __le16  rx_missed;
534         __le16  align_errors;
535         __le32  tx_one_collision;
536         __le32  tx_multi_collision;
537         __le64  rx_unicast;
538         __le64  rx_broadcast;
539         __le32  rx_multicast;
540         __le16  tx_aborted;
541         __le16  tx_underrun;
542 };
543
544 struct rx_desc {
545         __le32 opts1;
546 #define RX_LEN_MASK                     0x7fff
547
548         __le32 opts2;
549 #define RD_UDP_CS                       BIT(23)
550 #define RD_TCP_CS                       BIT(22)
551 #define RD_IPV6_CS                      BIT(20)
552 #define RD_IPV4_CS                      BIT(19)
553
554         __le32 opts3;
555 #define IPF                             BIT(23) /* IP checksum fail */
556 #define UDPF                            BIT(22) /* UDP checksum fail */
557 #define TCPF                            BIT(21) /* TCP checksum fail */
558 #define RX_VLAN_TAG                     BIT(16)
559
560         __le32 opts4;
561         __le32 opts5;
562         __le32 opts6;
563 };
564
565 struct tx_desc {
566         __le32 opts1;
567 #define TX_FS                   BIT(31) /* First segment of a packet */
568 #define TX_LS                   BIT(30) /* Final segment of a packet */
569 #define GTSENDV4                BIT(28)
570 #define GTSENDV6                BIT(27)
571 #define GTTCPHO_SHIFT           18
572 #define GTTCPHO_MAX             0x7fU
573 #define TX_LEN_MAX              0x3ffffU
574
575         __le32 opts2;
576 #define UDP_CS                  BIT(31) /* Calculate UDP/IP checksum */
577 #define TCP_CS                  BIT(30) /* Calculate TCP/IP checksum */
578 #define IPV4_CS                 BIT(29) /* Calculate IPv4 checksum */
579 #define IPV6_CS                 BIT(28) /* Calculate IPv6 checksum */
580 #define MSS_SHIFT               17
581 #define MSS_MAX                 0x7ffU
582 #define TCPHO_SHIFT             17
583 #define TCPHO_MAX               0x7ffU
584 #define TX_VLAN_TAG             BIT(16)
585 };
586
587 struct r8152;
588
589 struct rx_agg {
590         struct list_head list;
591         struct urb *urb;
592         struct r8152 *context;
593         void *buffer;
594         void *head;
595 };
596
597 struct tx_agg {
598         struct list_head list;
599         struct urb *urb;
600         struct r8152 *context;
601         void *buffer;
602         void *head;
603         u32 skb_num;
604         u32 skb_len;
605 };
606
607 struct r8152 {
608         unsigned long flags;
609         struct usb_device *udev;
610         struct napi_struct napi;
611         struct usb_interface *intf;
612         struct net_device *netdev;
613         struct urb *intr_urb;
614         struct tx_agg tx_info[RTL8152_MAX_TX];
615         struct rx_agg rx_info[RTL8152_MAX_RX];
616         struct list_head rx_done, tx_free;
617         struct sk_buff_head tx_queue, rx_queue;
618         spinlock_t rx_lock, tx_lock;
619         struct delayed_work schedule, hw_phy_work;
620         struct mii_if_info mii;
621         struct mutex control;   /* use for hw setting */
622 #ifdef CONFIG_PM_SLEEP
623         struct notifier_block pm_notifier;
624 #endif
625
626         struct rtl_ops {
627                 void (*init)(struct r8152 *);
628                 int (*enable)(struct r8152 *);
629                 void (*disable)(struct r8152 *);
630                 void (*up)(struct r8152 *);
631                 void (*down)(struct r8152 *);
632                 void (*unload)(struct r8152 *);
633                 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
634                 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
635                 bool (*in_nway)(struct r8152 *);
636                 void (*hw_phy_cfg)(struct r8152 *);
637                 void (*autosuspend_en)(struct r8152 *tp, bool enable);
638         } rtl_ops;
639
640         int intr_interval;
641         u32 saved_wolopts;
642         u32 msg_enable;
643         u32 tx_qlen;
644         u32 coalesce;
645         u16 ocp_base;
646         u16 speed;
647         u8 *intr_buff;
648         u8 version;
649         u8 duplex;
650         u8 autoneg;
651 };
652
653 enum rtl_version {
654         RTL_VER_UNKNOWN = 0,
655         RTL_VER_01,
656         RTL_VER_02,
657         RTL_VER_03,
658         RTL_VER_04,
659         RTL_VER_05,
660         RTL_VER_06,
661         RTL_VER_MAX
662 };
663
664 enum tx_csum_stat {
665         TX_CSUM_SUCCESS = 0,
666         TX_CSUM_TSO,
667         TX_CSUM_NONE
668 };
669
670 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
671  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
672  */
673 static const int multicast_filter_limit = 32;
674 static unsigned int agg_buf_sz = 16384;
675
676 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
677                                  VLAN_ETH_HLEN - VLAN_HLEN)
678
679 static
680 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
681 {
682         int ret;
683         void *tmp;
684
685         tmp = kmalloc(size, GFP_KERNEL);
686         if (!tmp)
687                 return -ENOMEM;
688
689         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
690                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
691                               value, index, tmp, size, 500);
692         if (ret < 0)
693                 memset(data, 0xff, size);
694         else
695                 memcpy(data, tmp, size);
696
697         kfree(tmp);
698
699         return ret;
700 }
701
702 static
703 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
704 {
705         int ret;
706         void *tmp;
707
708         tmp = kmemdup(data, size, GFP_KERNEL);
709         if (!tmp)
710                 return -ENOMEM;
711
712         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
713                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
714                               value, index, tmp, size, 500);
715
716         kfree(tmp);
717
718         return ret;
719 }
720
721 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
722                             void *data, u16 type)
723 {
724         u16 limit = 64;
725         int ret = 0;
726
727         if (test_bit(RTL8152_UNPLUG, &tp->flags))
728                 return -ENODEV;
729
730         /* both size and indix must be 4 bytes align */
731         if ((size & 3) || !size || (index & 3) || !data)
732                 return -EPERM;
733
734         if ((u32)index + (u32)size > 0xffff)
735                 return -EPERM;
736
737         while (size) {
738                 if (size > limit) {
739                         ret = get_registers(tp, index, type, limit, data);
740                         if (ret < 0)
741                                 break;
742
743                         index += limit;
744                         data += limit;
745                         size -= limit;
746                 } else {
747                         ret = get_registers(tp, index, type, size, data);
748                         if (ret < 0)
749                                 break;
750
751                         index += size;
752                         data += size;
753                         size = 0;
754                         break;
755                 }
756         }
757
758         if (ret == -ENODEV)
759                 set_bit(RTL8152_UNPLUG, &tp->flags);
760
761         return ret;
762 }
763
764 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
765                              u16 size, void *data, u16 type)
766 {
767         int ret;
768         u16 byteen_start, byteen_end, byen;
769         u16 limit = 512;
770
771         if (test_bit(RTL8152_UNPLUG, &tp->flags))
772                 return -ENODEV;
773
774         /* both size and indix must be 4 bytes align */
775         if ((size & 3) || !size || (index & 3) || !data)
776                 return -EPERM;
777
778         if ((u32)index + (u32)size > 0xffff)
779                 return -EPERM;
780
781         byteen_start = byteen & BYTE_EN_START_MASK;
782         byteen_end = byteen & BYTE_EN_END_MASK;
783
784         byen = byteen_start | (byteen_start << 4);
785         ret = set_registers(tp, index, type | byen, 4, data);
786         if (ret < 0)
787                 goto error1;
788
789         index += 4;
790         data += 4;
791         size -= 4;
792
793         if (size) {
794                 size -= 4;
795
796                 while (size) {
797                         if (size > limit) {
798                                 ret = set_registers(tp, index,
799                                                     type | BYTE_EN_DWORD,
800                                                     limit, data);
801                                 if (ret < 0)
802                                         goto error1;
803
804                                 index += limit;
805                                 data += limit;
806                                 size -= limit;
807                         } else {
808                                 ret = set_registers(tp, index,
809                                                     type | BYTE_EN_DWORD,
810                                                     size, data);
811                                 if (ret < 0)
812                                         goto error1;
813
814                                 index += size;
815                                 data += size;
816                                 size = 0;
817                                 break;
818                         }
819                 }
820
821                 byen = byteen_end | (byteen_end >> 4);
822                 ret = set_registers(tp, index, type | byen, 4, data);
823                 if (ret < 0)
824                         goto error1;
825         }
826
827 error1:
828         if (ret == -ENODEV)
829                 set_bit(RTL8152_UNPLUG, &tp->flags);
830
831         return ret;
832 }
833
834 static inline
835 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
836 {
837         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
838 }
839
840 static inline
841 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
842 {
843         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
844 }
845
846 static inline
847 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
848 {
849         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
850 }
851
852 static inline
853 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
854 {
855         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
856 }
857
858 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
859 {
860         __le32 data;
861
862         generic_ocp_read(tp, index, sizeof(data), &data, type);
863
864         return __le32_to_cpu(data);
865 }
866
867 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
868 {
869         __le32 tmp = __cpu_to_le32(data);
870
871         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
872 }
873
874 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
875 {
876         u32 data;
877         __le32 tmp;
878         u8 shift = index & 2;
879
880         index &= ~3;
881
882         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
883
884         data = __le32_to_cpu(tmp);
885         data >>= (shift * 8);
886         data &= 0xffff;
887
888         return (u16)data;
889 }
890
891 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
892 {
893         u32 mask = 0xffff;
894         __le32 tmp;
895         u16 byen = BYTE_EN_WORD;
896         u8 shift = index & 2;
897
898         data &= mask;
899
900         if (index & 2) {
901                 byen <<= shift;
902                 mask <<= (shift * 8);
903                 data <<= (shift * 8);
904                 index &= ~3;
905         }
906
907         tmp = __cpu_to_le32(data);
908
909         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
910 }
911
912 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
913 {
914         u32 data;
915         __le32 tmp;
916         u8 shift = index & 3;
917
918         index &= ~3;
919
920         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
921
922         data = __le32_to_cpu(tmp);
923         data >>= (shift * 8);
924         data &= 0xff;
925
926         return (u8)data;
927 }
928
929 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
930 {
931         u32 mask = 0xff;
932         __le32 tmp;
933         u16 byen = BYTE_EN_BYTE;
934         u8 shift = index & 3;
935
936         data &= mask;
937
938         if (index & 3) {
939                 byen <<= shift;
940                 mask <<= (shift * 8);
941                 data <<= (shift * 8);
942                 index &= ~3;
943         }
944
945         tmp = __cpu_to_le32(data);
946
947         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
948 }
949
950 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
951 {
952         u16 ocp_base, ocp_index;
953
954         ocp_base = addr & 0xf000;
955         if (ocp_base != tp->ocp_base) {
956                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
957                 tp->ocp_base = ocp_base;
958         }
959
960         ocp_index = (addr & 0x0fff) | 0xb000;
961         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
962 }
963
964 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
965 {
966         u16 ocp_base, ocp_index;
967
968         ocp_base = addr & 0xf000;
969         if (ocp_base != tp->ocp_base) {
970                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
971                 tp->ocp_base = ocp_base;
972         }
973
974         ocp_index = (addr & 0x0fff) | 0xb000;
975         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
976 }
977
978 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
979 {
980         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
981 }
982
983 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
984 {
985         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
986 }
987
988 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
989 {
990         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
991         ocp_reg_write(tp, OCP_SRAM_DATA, data);
992 }
993
994 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
995 {
996         struct r8152 *tp = netdev_priv(netdev);
997         int ret;
998
999         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1000                 return -ENODEV;
1001
1002         if (phy_id != R8152_PHY_ID)
1003                 return -EINVAL;
1004
1005         ret = r8152_mdio_read(tp, reg);
1006
1007         return ret;
1008 }
1009
1010 static
1011 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
1012 {
1013         struct r8152 *tp = netdev_priv(netdev);
1014
1015         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1016                 return;
1017
1018         if (phy_id != R8152_PHY_ID)
1019                 return;
1020
1021         r8152_mdio_write(tp, reg, val);
1022 }
1023
1024 static int
1025 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1026
1027 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1028 {
1029         struct r8152 *tp = netdev_priv(netdev);
1030         struct sockaddr *addr = p;
1031         int ret = -EADDRNOTAVAIL;
1032
1033         if (!is_valid_ether_addr(addr->sa_data))
1034                 goto out1;
1035
1036         ret = usb_autopm_get_interface(tp->intf);
1037         if (ret < 0)
1038                 goto out1;
1039
1040         mutex_lock(&tp->control);
1041
1042         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1043
1044         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1045         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1046         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1047
1048         mutex_unlock(&tp->control);
1049
1050         usb_autopm_put_interface(tp->intf);
1051 out1:
1052         return ret;
1053 }
1054
1055 /* Devices containing RTL8153-AD can support a persistent
1056  * host system provided MAC address.
1057  * Examples of this are Dell TB15 and Dell WD15 docks
1058  */
1059 static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)
1060 {
1061         acpi_status status;
1062         struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1063         union acpi_object *obj;
1064         int ret = -EINVAL;
1065         u32 ocp_data;
1066         unsigned char buf[6];
1067
1068         /* test for -AD variant of RTL8153 */
1069         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
1070         if ((ocp_data & AD_MASK) != 0x1000)
1071                 return -ENODEV;
1072
1073         /* test for MAC address pass-through bit */
1074         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, EFUSE);
1075         if ((ocp_data & PASS_THRU_MASK) != 1)
1076                 return -ENODEV;
1077
1078         /* returns _AUXMAC_#AABBCCDDEEFF# */
1079         status = acpi_evaluate_object(NULL, "\\_SB.AMAC", NULL, &buffer);
1080         obj = (union acpi_object *)buffer.pointer;
1081         if (!ACPI_SUCCESS(status))
1082                 return -ENODEV;
1083         if (obj->type != ACPI_TYPE_BUFFER || obj->string.length != 0x17) {
1084                 netif_warn(tp, probe, tp->netdev,
1085                            "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1086                            obj->type, obj->string.length);
1087                 goto amacout;
1088         }
1089         if (strncmp(obj->string.pointer, "_AUXMAC_#", 9) != 0 ||
1090             strncmp(obj->string.pointer + 0x15, "#", 1) != 0) {
1091                 netif_warn(tp, probe, tp->netdev,
1092                            "Invalid header when reading pass-thru MAC addr\n");
1093                 goto amacout;
1094         }
1095         ret = hex2bin(buf, obj->string.pointer + 9, 6);
1096         if (!(ret == 0 && is_valid_ether_addr(buf))) {
1097                 netif_warn(tp, probe, tp->netdev,
1098                            "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1099                            ret, buf);
1100                 ret = -EINVAL;
1101                 goto amacout;
1102         }
1103         memcpy(sa->sa_data, buf, 6);
1104         ether_addr_copy(tp->netdev->dev_addr, sa->sa_data);
1105         netif_info(tp, probe, tp->netdev,
1106                    "Using pass-thru MAC addr %pM\n", sa->sa_data);
1107
1108 amacout:
1109         kfree(obj);
1110         return ret;
1111 }
1112
1113 static int set_ethernet_addr(struct r8152 *tp)
1114 {
1115         struct net_device *dev = tp->netdev;
1116         struct sockaddr sa;
1117         int ret;
1118
1119         if (tp->version == RTL_VER_01) {
1120                 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1121         } else {
1122                 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1123                  * or system doesn't provide valid _SB.AMAC this will be
1124                  * be expected to non-zero
1125                  */
1126                 ret = vendor_mac_passthru_addr_read(tp, &sa);
1127                 if (ret < 0)
1128                         ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1129         }
1130
1131         if (ret < 0) {
1132                 netif_err(tp, probe, dev, "Get ether addr fail\n");
1133         } else if (!is_valid_ether_addr(sa.sa_data)) {
1134                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1135                           sa.sa_data);
1136                 eth_hw_addr_random(dev);
1137                 ether_addr_copy(sa.sa_data, dev->dev_addr);
1138                 ret = rtl8152_set_mac_address(dev, &sa);
1139                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1140                            sa.sa_data);
1141         } else {
1142                 if (tp->version == RTL_VER_01)
1143                         ether_addr_copy(dev->dev_addr, sa.sa_data);
1144                 else
1145                         ret = rtl8152_set_mac_address(dev, &sa);
1146         }
1147
1148         return ret;
1149 }
1150
1151 static void read_bulk_callback(struct urb *urb)
1152 {
1153         struct net_device *netdev;
1154         int status = urb->status;
1155         struct rx_agg *agg;
1156         struct r8152 *tp;
1157
1158         agg = urb->context;
1159         if (!agg)
1160                 return;
1161
1162         tp = agg->context;
1163         if (!tp)
1164                 return;
1165
1166         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1167                 return;
1168
1169         if (!test_bit(WORK_ENABLE, &tp->flags))
1170                 return;
1171
1172         netdev = tp->netdev;
1173
1174         /* When link down, the driver would cancel all bulks. */
1175         /* This avoid the re-submitting bulk */
1176         if (!netif_carrier_ok(netdev))
1177                 return;
1178
1179         usb_mark_last_busy(tp->udev);
1180
1181         switch (status) {
1182         case 0:
1183                 if (urb->actual_length < ETH_ZLEN)
1184                         break;
1185
1186                 spin_lock(&tp->rx_lock);
1187                 list_add_tail(&agg->list, &tp->rx_done);
1188                 spin_unlock(&tp->rx_lock);
1189                 napi_schedule(&tp->napi);
1190                 return;
1191         case -ESHUTDOWN:
1192                 set_bit(RTL8152_UNPLUG, &tp->flags);
1193                 netif_device_detach(tp->netdev);
1194                 return;
1195         case -ENOENT:
1196                 return; /* the urb is in unlink state */
1197         case -ETIME:
1198                 if (net_ratelimit())
1199                         netdev_warn(netdev, "maybe reset is needed?\n");
1200                 break;
1201         default:
1202                 if (net_ratelimit())
1203                         netdev_warn(netdev, "Rx status %d\n", status);
1204                 break;
1205         }
1206
1207         r8152_submit_rx(tp, agg, GFP_ATOMIC);
1208 }
1209
1210 static void write_bulk_callback(struct urb *urb)
1211 {
1212         struct net_device_stats *stats;
1213         struct net_device *netdev;
1214         struct tx_agg *agg;
1215         struct r8152 *tp;
1216         int status = urb->status;
1217
1218         agg = urb->context;
1219         if (!agg)
1220                 return;
1221
1222         tp = agg->context;
1223         if (!tp)
1224                 return;
1225
1226         netdev = tp->netdev;
1227         stats = &netdev->stats;
1228         if (status) {
1229                 if (net_ratelimit())
1230                         netdev_warn(netdev, "Tx status %d\n", status);
1231                 stats->tx_errors += agg->skb_num;
1232         } else {
1233                 stats->tx_packets += agg->skb_num;
1234                 stats->tx_bytes += agg->skb_len;
1235         }
1236
1237         spin_lock(&tp->tx_lock);
1238         list_add_tail(&agg->list, &tp->tx_free);
1239         spin_unlock(&tp->tx_lock);
1240
1241         usb_autopm_put_interface_async(tp->intf);
1242
1243         if (!netif_carrier_ok(netdev))
1244                 return;
1245
1246         if (!test_bit(WORK_ENABLE, &tp->flags))
1247                 return;
1248
1249         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1250                 return;
1251
1252         if (!skb_queue_empty(&tp->tx_queue))
1253                 napi_schedule(&tp->napi);
1254 }
1255
1256 static void intr_callback(struct urb *urb)
1257 {
1258         struct r8152 *tp;
1259         __le16 *d;
1260         int status = urb->status;
1261         int res;
1262
1263         tp = urb->context;
1264         if (!tp)
1265                 return;
1266
1267         if (!test_bit(WORK_ENABLE, &tp->flags))
1268                 return;
1269
1270         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1271                 return;
1272
1273         switch (status) {
1274         case 0:                 /* success */
1275                 break;
1276         case -ECONNRESET:       /* unlink */
1277         case -ESHUTDOWN:
1278                 netif_device_detach(tp->netdev);
1279         case -ENOENT:
1280         case -EPROTO:
1281                 netif_info(tp, intr, tp->netdev,
1282                            "Stop submitting intr, status %d\n", status);
1283                 return;
1284         case -EOVERFLOW:
1285                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1286                 goto resubmit;
1287         /* -EPIPE:  should clear the halt */
1288         default:
1289                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1290                 goto resubmit;
1291         }
1292
1293         d = urb->transfer_buffer;
1294         if (INTR_LINK & __le16_to_cpu(d[0])) {
1295                 if (!netif_carrier_ok(tp->netdev)) {
1296                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1297                         schedule_delayed_work(&tp->schedule, 0);
1298                 }
1299         } else {
1300                 if (netif_carrier_ok(tp->netdev)) {
1301                         netif_stop_queue(tp->netdev);
1302                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1303                         schedule_delayed_work(&tp->schedule, 0);
1304                 }
1305         }
1306
1307 resubmit:
1308         res = usb_submit_urb(urb, GFP_ATOMIC);
1309         if (res == -ENODEV) {
1310                 set_bit(RTL8152_UNPLUG, &tp->flags);
1311                 netif_device_detach(tp->netdev);
1312         } else if (res) {
1313                 netif_err(tp, intr, tp->netdev,
1314                           "can't resubmit intr, status %d\n", res);
1315         }
1316 }
1317
1318 static inline void *rx_agg_align(void *data)
1319 {
1320         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1321 }
1322
1323 static inline void *tx_agg_align(void *data)
1324 {
1325         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1326 }
1327
1328 static void free_all_mem(struct r8152 *tp)
1329 {
1330         int i;
1331
1332         for (i = 0; i < RTL8152_MAX_RX; i++) {
1333                 usb_free_urb(tp->rx_info[i].urb);
1334                 tp->rx_info[i].urb = NULL;
1335
1336                 kfree(tp->rx_info[i].buffer);
1337                 tp->rx_info[i].buffer = NULL;
1338                 tp->rx_info[i].head = NULL;
1339         }
1340
1341         for (i = 0; i < RTL8152_MAX_TX; i++) {
1342                 usb_free_urb(tp->tx_info[i].urb);
1343                 tp->tx_info[i].urb = NULL;
1344
1345                 kfree(tp->tx_info[i].buffer);
1346                 tp->tx_info[i].buffer = NULL;
1347                 tp->tx_info[i].head = NULL;
1348         }
1349
1350         usb_free_urb(tp->intr_urb);
1351         tp->intr_urb = NULL;
1352
1353         kfree(tp->intr_buff);
1354         tp->intr_buff = NULL;
1355 }
1356
1357 static int alloc_all_mem(struct r8152 *tp)
1358 {
1359         struct net_device *netdev = tp->netdev;
1360         struct usb_interface *intf = tp->intf;
1361         struct usb_host_interface *alt = intf->cur_altsetting;
1362         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1363         struct urb *urb;
1364         int node, i;
1365         u8 *buf;
1366
1367         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1368
1369         spin_lock_init(&tp->rx_lock);
1370         spin_lock_init(&tp->tx_lock);
1371         INIT_LIST_HEAD(&tp->tx_free);
1372         INIT_LIST_HEAD(&tp->rx_done);
1373         skb_queue_head_init(&tp->tx_queue);
1374         skb_queue_head_init(&tp->rx_queue);
1375
1376         for (i = 0; i < RTL8152_MAX_RX; i++) {
1377                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1378                 if (!buf)
1379                         goto err1;
1380
1381                 if (buf != rx_agg_align(buf)) {
1382                         kfree(buf);
1383                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1384                                            node);
1385                         if (!buf)
1386                                 goto err1;
1387                 }
1388
1389                 urb = usb_alloc_urb(0, GFP_KERNEL);
1390                 if (!urb) {
1391                         kfree(buf);
1392                         goto err1;
1393                 }
1394
1395                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1396                 tp->rx_info[i].context = tp;
1397                 tp->rx_info[i].urb = urb;
1398                 tp->rx_info[i].buffer = buf;
1399                 tp->rx_info[i].head = rx_agg_align(buf);
1400         }
1401
1402         for (i = 0; i < RTL8152_MAX_TX; i++) {
1403                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1404                 if (!buf)
1405                         goto err1;
1406
1407                 if (buf != tx_agg_align(buf)) {
1408                         kfree(buf);
1409                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1410                                            node);
1411                         if (!buf)
1412                                 goto err1;
1413                 }
1414
1415                 urb = usb_alloc_urb(0, GFP_KERNEL);
1416                 if (!urb) {
1417                         kfree(buf);
1418                         goto err1;
1419                 }
1420
1421                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1422                 tp->tx_info[i].context = tp;
1423                 tp->tx_info[i].urb = urb;
1424                 tp->tx_info[i].buffer = buf;
1425                 tp->tx_info[i].head = tx_agg_align(buf);
1426
1427                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1428         }
1429
1430         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1431         if (!tp->intr_urb)
1432                 goto err1;
1433
1434         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1435         if (!tp->intr_buff)
1436                 goto err1;
1437
1438         tp->intr_interval = (int)ep_intr->desc.bInterval;
1439         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1440                          tp->intr_buff, INTBUFSIZE, intr_callback,
1441                          tp, tp->intr_interval);
1442
1443         return 0;
1444
1445 err1:
1446         free_all_mem(tp);
1447         return -ENOMEM;
1448 }
1449
1450 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1451 {
1452         struct tx_agg *agg = NULL;
1453         unsigned long flags;
1454
1455         if (list_empty(&tp->tx_free))
1456                 return NULL;
1457
1458         spin_lock_irqsave(&tp->tx_lock, flags);
1459         if (!list_empty(&tp->tx_free)) {
1460                 struct list_head *cursor;
1461
1462                 cursor = tp->tx_free.next;
1463                 list_del_init(cursor);
1464                 agg = list_entry(cursor, struct tx_agg, list);
1465         }
1466         spin_unlock_irqrestore(&tp->tx_lock, flags);
1467
1468         return agg;
1469 }
1470
1471 /* r8152_csum_workaround()
1472  * The hw limites the value the transport offset. When the offset is out of the
1473  * range, calculate the checksum by sw.
1474  */
1475 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1476                                   struct sk_buff_head *list)
1477 {
1478         if (skb_shinfo(skb)->gso_size) {
1479                 netdev_features_t features = tp->netdev->features;
1480                 struct sk_buff_head seg_list;
1481                 struct sk_buff *segs, *nskb;
1482
1483                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1484                 segs = skb_gso_segment(skb, features);
1485                 if (IS_ERR(segs) || !segs)
1486                         goto drop;
1487
1488                 __skb_queue_head_init(&seg_list);
1489
1490                 do {
1491                         nskb = segs;
1492                         segs = segs->next;
1493                         nskb->next = NULL;
1494                         __skb_queue_tail(&seg_list, nskb);
1495                 } while (segs);
1496
1497                 skb_queue_splice(&seg_list, list);
1498                 dev_kfree_skb(skb);
1499         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1500                 if (skb_checksum_help(skb) < 0)
1501                         goto drop;
1502
1503                 __skb_queue_head(list, skb);
1504         } else {
1505                 struct net_device_stats *stats;
1506
1507 drop:
1508                 stats = &tp->netdev->stats;
1509                 stats->tx_dropped++;
1510                 dev_kfree_skb(skb);
1511         }
1512 }
1513
1514 /* msdn_giant_send_check()
1515  * According to the document of microsoft, the TCP Pseudo Header excludes the
1516  * packet length for IPv6 TCP large packets.
1517  */
1518 static int msdn_giant_send_check(struct sk_buff *skb)
1519 {
1520         const struct ipv6hdr *ipv6h;
1521         struct tcphdr *th;
1522         int ret;
1523
1524         ret = skb_cow_head(skb, 0);
1525         if (ret)
1526                 return ret;
1527
1528         ipv6h = ipv6_hdr(skb);
1529         th = tcp_hdr(skb);
1530
1531         th->check = 0;
1532         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1533
1534         return ret;
1535 }
1536
1537 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1538 {
1539         if (skb_vlan_tag_present(skb)) {
1540                 u32 opts2;
1541
1542                 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1543                 desc->opts2 |= cpu_to_le32(opts2);
1544         }
1545 }
1546
1547 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1548 {
1549         u32 opts2 = le32_to_cpu(desc->opts2);
1550
1551         if (opts2 & RX_VLAN_TAG)
1552                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1553                                        swab16(opts2 & 0xffff));
1554 }
1555
1556 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1557                          struct sk_buff *skb, u32 len, u32 transport_offset)
1558 {
1559         u32 mss = skb_shinfo(skb)->gso_size;
1560         u32 opts1, opts2 = 0;
1561         int ret = TX_CSUM_SUCCESS;
1562
1563         WARN_ON_ONCE(len > TX_LEN_MAX);
1564
1565         opts1 = len | TX_FS | TX_LS;
1566
1567         if (mss) {
1568                 if (transport_offset > GTTCPHO_MAX) {
1569                         netif_warn(tp, tx_err, tp->netdev,
1570                                    "Invalid transport offset 0x%x for TSO\n",
1571                                    transport_offset);
1572                         ret = TX_CSUM_TSO;
1573                         goto unavailable;
1574                 }
1575
1576                 switch (vlan_get_protocol(skb)) {
1577                 case htons(ETH_P_IP):
1578                         opts1 |= GTSENDV4;
1579                         break;
1580
1581                 case htons(ETH_P_IPV6):
1582                         if (msdn_giant_send_check(skb)) {
1583                                 ret = TX_CSUM_TSO;
1584                                 goto unavailable;
1585                         }
1586                         opts1 |= GTSENDV6;
1587                         break;
1588
1589                 default:
1590                         WARN_ON_ONCE(1);
1591                         break;
1592                 }
1593
1594                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1595                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1596         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1597                 u8 ip_protocol;
1598
1599                 if (transport_offset > TCPHO_MAX) {
1600                         netif_warn(tp, tx_err, tp->netdev,
1601                                    "Invalid transport offset 0x%x\n",
1602                                    transport_offset);
1603                         ret = TX_CSUM_NONE;
1604                         goto unavailable;
1605                 }
1606
1607                 switch (vlan_get_protocol(skb)) {
1608                 case htons(ETH_P_IP):
1609                         opts2 |= IPV4_CS;
1610                         ip_protocol = ip_hdr(skb)->protocol;
1611                         break;
1612
1613                 case htons(ETH_P_IPV6):
1614                         opts2 |= IPV6_CS;
1615                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1616                         break;
1617
1618                 default:
1619                         ip_protocol = IPPROTO_RAW;
1620                         break;
1621                 }
1622
1623                 if (ip_protocol == IPPROTO_TCP)
1624                         opts2 |= TCP_CS;
1625                 else if (ip_protocol == IPPROTO_UDP)
1626                         opts2 |= UDP_CS;
1627                 else
1628                         WARN_ON_ONCE(1);
1629
1630                 opts2 |= transport_offset << TCPHO_SHIFT;
1631         }
1632
1633         desc->opts2 = cpu_to_le32(opts2);
1634         desc->opts1 = cpu_to_le32(opts1);
1635
1636 unavailable:
1637         return ret;
1638 }
1639
1640 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1641 {
1642         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1643         int remain, ret;
1644         u8 *tx_data;
1645
1646         __skb_queue_head_init(&skb_head);
1647         spin_lock(&tx_queue->lock);
1648         skb_queue_splice_init(tx_queue, &skb_head);
1649         spin_unlock(&tx_queue->lock);
1650
1651         tx_data = agg->head;
1652         agg->skb_num = 0;
1653         agg->skb_len = 0;
1654         remain = agg_buf_sz;
1655
1656         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1657                 struct tx_desc *tx_desc;
1658                 struct sk_buff *skb;
1659                 unsigned int len;
1660                 u32 offset;
1661
1662                 skb = __skb_dequeue(&skb_head);
1663                 if (!skb)
1664                         break;
1665
1666                 len = skb->len + sizeof(*tx_desc);
1667
1668                 if (len > remain) {
1669                         __skb_queue_head(&skb_head, skb);
1670                         break;
1671                 }
1672
1673                 tx_data = tx_agg_align(tx_data);
1674                 tx_desc = (struct tx_desc *)tx_data;
1675
1676                 offset = (u32)skb_transport_offset(skb);
1677
1678                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1679                         r8152_csum_workaround(tp, skb, &skb_head);
1680                         continue;
1681                 }
1682
1683                 rtl_tx_vlan_tag(tx_desc, skb);
1684
1685                 tx_data += sizeof(*tx_desc);
1686
1687                 len = skb->len;
1688                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1689                         struct net_device_stats *stats = &tp->netdev->stats;
1690
1691                         stats->tx_dropped++;
1692                         dev_kfree_skb_any(skb);
1693                         tx_data -= sizeof(*tx_desc);
1694                         continue;
1695                 }
1696
1697                 tx_data += len;
1698                 agg->skb_len += len;
1699                 agg->skb_num += skb_shinfo(skb)->gso_segs ?: 1;
1700
1701                 dev_kfree_skb_any(skb);
1702
1703                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1704         }
1705
1706         if (!skb_queue_empty(&skb_head)) {
1707                 spin_lock(&tx_queue->lock);
1708                 skb_queue_splice(&skb_head, tx_queue);
1709                 spin_unlock(&tx_queue->lock);
1710         }
1711
1712         netif_tx_lock(tp->netdev);
1713
1714         if (netif_queue_stopped(tp->netdev) &&
1715             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1716                 netif_wake_queue(tp->netdev);
1717
1718         netif_tx_unlock(tp->netdev);
1719
1720         ret = usb_autopm_get_interface_async(tp->intf);
1721         if (ret < 0)
1722                 goto out_tx_fill;
1723
1724         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1725                           agg->head, (int)(tx_data - (u8 *)agg->head),
1726                           (usb_complete_t)write_bulk_callback, agg);
1727
1728         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1729         if (ret < 0)
1730                 usb_autopm_put_interface_async(tp->intf);
1731
1732 out_tx_fill:
1733         return ret;
1734 }
1735
1736 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1737 {
1738         u8 checksum = CHECKSUM_NONE;
1739         u32 opts2, opts3;
1740
1741         if (!(tp->netdev->features & NETIF_F_RXCSUM))
1742                 goto return_result;
1743
1744         opts2 = le32_to_cpu(rx_desc->opts2);
1745         opts3 = le32_to_cpu(rx_desc->opts3);
1746
1747         if (opts2 & RD_IPV4_CS) {
1748                 if (opts3 & IPF)
1749                         checksum = CHECKSUM_NONE;
1750                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1751                         checksum = CHECKSUM_NONE;
1752                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1753                         checksum = CHECKSUM_NONE;
1754                 else
1755                         checksum = CHECKSUM_UNNECESSARY;
1756         } else if (opts2 & RD_IPV6_CS) {
1757                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1758                         checksum = CHECKSUM_UNNECESSARY;
1759                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1760                         checksum = CHECKSUM_UNNECESSARY;
1761         }
1762
1763 return_result:
1764         return checksum;
1765 }
1766
1767 static int rx_bottom(struct r8152 *tp, int budget)
1768 {
1769         unsigned long flags;
1770         struct list_head *cursor, *next, rx_queue;
1771         int ret = 0, work_done = 0;
1772
1773         if (!skb_queue_empty(&tp->rx_queue)) {
1774                 while (work_done < budget) {
1775                         struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1776                         struct net_device *netdev = tp->netdev;
1777                         struct net_device_stats *stats = &netdev->stats;
1778                         unsigned int pkt_len;
1779
1780                         if (!skb)
1781                                 break;
1782
1783                         pkt_len = skb->len;
1784                         napi_gro_receive(&tp->napi, skb);
1785                         work_done++;
1786                         stats->rx_packets++;
1787                         stats->rx_bytes += pkt_len;
1788                 }
1789         }
1790
1791         if (list_empty(&tp->rx_done))
1792                 goto out1;
1793
1794         INIT_LIST_HEAD(&rx_queue);
1795         spin_lock_irqsave(&tp->rx_lock, flags);
1796         list_splice_init(&tp->rx_done, &rx_queue);
1797         spin_unlock_irqrestore(&tp->rx_lock, flags);
1798
1799         list_for_each_safe(cursor, next, &rx_queue) {
1800                 struct rx_desc *rx_desc;
1801                 struct rx_agg *agg;
1802                 int len_used = 0;
1803                 struct urb *urb;
1804                 u8 *rx_data;
1805
1806                 list_del_init(cursor);
1807
1808                 agg = list_entry(cursor, struct rx_agg, list);
1809                 urb = agg->urb;
1810                 if (urb->actual_length < ETH_ZLEN)
1811                         goto submit;
1812
1813                 rx_desc = agg->head;
1814                 rx_data = agg->head;
1815                 len_used += sizeof(struct rx_desc);
1816
1817                 while (urb->actual_length > len_used) {
1818                         struct net_device *netdev = tp->netdev;
1819                         struct net_device_stats *stats = &netdev->stats;
1820                         unsigned int pkt_len;
1821                         struct sk_buff *skb;
1822
1823                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1824                         if (pkt_len < ETH_ZLEN)
1825                                 break;
1826
1827                         len_used += pkt_len;
1828                         if (urb->actual_length < len_used)
1829                                 break;
1830
1831                         pkt_len -= CRC_SIZE;
1832                         rx_data += sizeof(struct rx_desc);
1833
1834                         skb = napi_alloc_skb(&tp->napi, pkt_len);
1835                         if (!skb) {
1836                                 stats->rx_dropped++;
1837                                 goto find_next_rx;
1838                         }
1839
1840                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1841                         memcpy(skb->data, rx_data, pkt_len);
1842                         skb_put(skb, pkt_len);
1843                         skb->protocol = eth_type_trans(skb, netdev);
1844                         rtl_rx_vlan_tag(rx_desc, skb);
1845                         if (work_done < budget) {
1846                                 napi_gro_receive(&tp->napi, skb);
1847                                 work_done++;
1848                                 stats->rx_packets++;
1849                                 stats->rx_bytes += pkt_len;
1850                         } else {
1851                                 __skb_queue_tail(&tp->rx_queue, skb);
1852                         }
1853
1854 find_next_rx:
1855                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1856                         rx_desc = (struct rx_desc *)rx_data;
1857                         len_used = (int)(rx_data - (u8 *)agg->head);
1858                         len_used += sizeof(struct rx_desc);
1859                 }
1860
1861 submit:
1862                 if (!ret) {
1863                         ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1864                 } else {
1865                         urb->actual_length = 0;
1866                         list_add_tail(&agg->list, next);
1867                 }
1868         }
1869
1870         if (!list_empty(&rx_queue)) {
1871                 spin_lock_irqsave(&tp->rx_lock, flags);
1872                 list_splice_tail(&rx_queue, &tp->rx_done);
1873                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1874         }
1875
1876 out1:
1877         return work_done;
1878 }
1879
1880 static void tx_bottom(struct r8152 *tp)
1881 {
1882         int res;
1883
1884         do {
1885                 struct tx_agg *agg;
1886
1887                 if (skb_queue_empty(&tp->tx_queue))
1888                         break;
1889
1890                 agg = r8152_get_tx_agg(tp);
1891                 if (!agg)
1892                         break;
1893
1894                 res = r8152_tx_agg_fill(tp, agg);
1895                 if (res) {
1896                         struct net_device *netdev = tp->netdev;
1897
1898                         if (res == -ENODEV) {
1899                                 set_bit(RTL8152_UNPLUG, &tp->flags);
1900                                 netif_device_detach(netdev);
1901                         } else {
1902                                 struct net_device_stats *stats = &netdev->stats;
1903                                 unsigned long flags;
1904
1905                                 netif_warn(tp, tx_err, netdev,
1906                                            "failed tx_urb %d\n", res);
1907                                 stats->tx_dropped += agg->skb_num;
1908
1909                                 spin_lock_irqsave(&tp->tx_lock, flags);
1910                                 list_add_tail(&agg->list, &tp->tx_free);
1911                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1912                         }
1913                 }
1914         } while (res == 0);
1915 }
1916
1917 static void bottom_half(struct r8152 *tp)
1918 {
1919         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1920                 return;
1921
1922         if (!test_bit(WORK_ENABLE, &tp->flags))
1923                 return;
1924
1925         /* When link down, the driver would cancel all bulks. */
1926         /* This avoid the re-submitting bulk */
1927         if (!netif_carrier_ok(tp->netdev))
1928                 return;
1929
1930         clear_bit(SCHEDULE_NAPI, &tp->flags);
1931
1932         tx_bottom(tp);
1933 }
1934
1935 static int r8152_poll(struct napi_struct *napi, int budget)
1936 {
1937         struct r8152 *tp = container_of(napi, struct r8152, napi);
1938         int work_done;
1939
1940         work_done = rx_bottom(tp, budget);
1941         bottom_half(tp);
1942
1943         if (work_done < budget) {
1944                 napi_complete(napi);
1945                 if (!list_empty(&tp->rx_done))
1946                         napi_schedule(napi);
1947                 else if (!skb_queue_empty(&tp->tx_queue) &&
1948                          !list_empty(&tp->tx_free))
1949                         napi_schedule(napi);
1950         }
1951
1952         return work_done;
1953 }
1954
1955 static
1956 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1957 {
1958         int ret;
1959
1960         /* The rx would be stopped, so skip submitting */
1961         if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1962             !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1963                 return 0;
1964
1965         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1966                           agg->head, agg_buf_sz,
1967                           (usb_complete_t)read_bulk_callback, agg);
1968
1969         ret = usb_submit_urb(agg->urb, mem_flags);
1970         if (ret == -ENODEV) {
1971                 set_bit(RTL8152_UNPLUG, &tp->flags);
1972                 netif_device_detach(tp->netdev);
1973         } else if (ret) {
1974                 struct urb *urb = agg->urb;
1975                 unsigned long flags;
1976
1977                 urb->actual_length = 0;
1978                 spin_lock_irqsave(&tp->rx_lock, flags);
1979                 list_add_tail(&agg->list, &tp->rx_done);
1980                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1981
1982                 netif_err(tp, rx_err, tp->netdev,
1983                           "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1984
1985                 napi_schedule(&tp->napi);
1986         }
1987
1988         return ret;
1989 }
1990
1991 static void rtl_drop_queued_tx(struct r8152 *tp)
1992 {
1993         struct net_device_stats *stats = &tp->netdev->stats;
1994         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1995         struct sk_buff *skb;
1996
1997         if (skb_queue_empty(tx_queue))
1998                 return;
1999
2000         __skb_queue_head_init(&skb_head);
2001         spin_lock_bh(&tx_queue->lock);
2002         skb_queue_splice_init(tx_queue, &skb_head);
2003         spin_unlock_bh(&tx_queue->lock);
2004
2005         while ((skb = __skb_dequeue(&skb_head))) {
2006                 dev_kfree_skb(skb);
2007                 stats->tx_dropped++;
2008         }
2009 }
2010
2011 static void rtl8152_tx_timeout(struct net_device *netdev)
2012 {
2013         struct r8152 *tp = netdev_priv(netdev);
2014
2015         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
2016
2017         usb_queue_reset_device(tp->intf);
2018 }
2019
2020 static void rtl8152_set_rx_mode(struct net_device *netdev)
2021 {
2022         struct r8152 *tp = netdev_priv(netdev);
2023
2024         if (netif_carrier_ok(netdev)) {
2025                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2026                 schedule_delayed_work(&tp->schedule, 0);
2027         }
2028 }
2029
2030 static void _rtl8152_set_rx_mode(struct net_device *netdev)
2031 {
2032         struct r8152 *tp = netdev_priv(netdev);
2033         u32 mc_filter[2];       /* Multicast hash filter */
2034         __le32 tmp[2];
2035         u32 ocp_data;
2036
2037         netif_stop_queue(netdev);
2038         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2039         ocp_data &= ~RCR_ACPT_ALL;
2040         ocp_data |= RCR_AB | RCR_APM;
2041
2042         if (netdev->flags & IFF_PROMISC) {
2043                 /* Unconditionally log net taps. */
2044                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
2045                 ocp_data |= RCR_AM | RCR_AAP;
2046                 mc_filter[1] = 0xffffffff;
2047                 mc_filter[0] = 0xffffffff;
2048         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
2049                    (netdev->flags & IFF_ALLMULTI)) {
2050                 /* Too many to filter perfectly -- accept all multicasts. */
2051                 ocp_data |= RCR_AM;
2052                 mc_filter[1] = 0xffffffff;
2053                 mc_filter[0] = 0xffffffff;
2054         } else {
2055                 struct netdev_hw_addr *ha;
2056
2057                 mc_filter[1] = 0;
2058                 mc_filter[0] = 0;
2059                 netdev_for_each_mc_addr(ha, netdev) {
2060                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
2061
2062                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2063                         ocp_data |= RCR_AM;
2064                 }
2065         }
2066
2067         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
2068         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
2069
2070         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
2071         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2072         netif_wake_queue(netdev);
2073 }
2074
2075 static netdev_features_t
2076 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
2077                        netdev_features_t features)
2078 {
2079         u32 mss = skb_shinfo(skb)->gso_size;
2080         int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
2081         int offset = skb_transport_offset(skb);
2082
2083         if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2084                 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2085         else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2086                 features &= ~NETIF_F_GSO_MASK;
2087
2088         return features;
2089 }
2090
2091 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2092                                       struct net_device *netdev)
2093 {
2094         struct r8152 *tp = netdev_priv(netdev);
2095
2096         skb_tx_timestamp(skb);
2097
2098         skb_queue_tail(&tp->tx_queue, skb);
2099
2100         if (!list_empty(&tp->tx_free)) {
2101                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2102                         set_bit(SCHEDULE_NAPI, &tp->flags);
2103                         schedule_delayed_work(&tp->schedule, 0);
2104                 } else {
2105                         usb_mark_last_busy(tp->udev);
2106                         napi_schedule(&tp->napi);
2107                 }
2108         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2109                 netif_stop_queue(netdev);
2110         }
2111
2112         return NETDEV_TX_OK;
2113 }
2114
2115 static void r8152b_reset_packet_filter(struct r8152 *tp)
2116 {
2117         u32     ocp_data;
2118
2119         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2120         ocp_data &= ~FMC_FCR_MCU_EN;
2121         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2122         ocp_data |= FMC_FCR_MCU_EN;
2123         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2124 }
2125
2126 static void rtl8152_nic_reset(struct r8152 *tp)
2127 {
2128         int     i;
2129
2130         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2131
2132         for (i = 0; i < 1000; i++) {
2133                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2134                         break;
2135                 usleep_range(100, 400);
2136         }
2137 }
2138
2139 static void set_tx_qlen(struct r8152 *tp)
2140 {
2141         struct net_device *netdev = tp->netdev;
2142
2143         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2144                                     sizeof(struct tx_desc));
2145 }
2146
2147 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2148 {
2149         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2150 }
2151
2152 static void rtl_set_eee_plus(struct r8152 *tp)
2153 {
2154         u32 ocp_data;
2155         u8 speed;
2156
2157         speed = rtl8152_get_speed(tp);
2158         if (speed & _10bps) {
2159                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2160                 ocp_data |= EEEP_CR_EEEP_TX;
2161                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2162         } else {
2163                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2164                 ocp_data &= ~EEEP_CR_EEEP_TX;
2165                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2166         }
2167 }
2168
2169 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2170 {
2171         u32 ocp_data;
2172
2173         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2174         if (enable)
2175                 ocp_data |= RXDY_GATED_EN;
2176         else
2177                 ocp_data &= ~RXDY_GATED_EN;
2178         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2179 }
2180
2181 static int rtl_start_rx(struct r8152 *tp)
2182 {
2183         int i, ret = 0;
2184
2185         INIT_LIST_HEAD(&tp->rx_done);
2186         for (i = 0; i < RTL8152_MAX_RX; i++) {
2187                 INIT_LIST_HEAD(&tp->rx_info[i].list);
2188                 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2189                 if (ret)
2190                         break;
2191         }
2192
2193         if (ret && ++i < RTL8152_MAX_RX) {
2194                 struct list_head rx_queue;
2195                 unsigned long flags;
2196
2197                 INIT_LIST_HEAD(&rx_queue);
2198
2199                 do {
2200                         struct rx_agg *agg = &tp->rx_info[i++];
2201                         struct urb *urb = agg->urb;
2202
2203                         urb->actual_length = 0;
2204                         list_add_tail(&agg->list, &rx_queue);
2205                 } while (i < RTL8152_MAX_RX);
2206
2207                 spin_lock_irqsave(&tp->rx_lock, flags);
2208                 list_splice_tail(&rx_queue, &tp->rx_done);
2209                 spin_unlock_irqrestore(&tp->rx_lock, flags);
2210         }
2211
2212         return ret;
2213 }
2214
2215 static int rtl_stop_rx(struct r8152 *tp)
2216 {
2217         int i;
2218
2219         for (i = 0; i < RTL8152_MAX_RX; i++)
2220                 usb_kill_urb(tp->rx_info[i].urb);
2221
2222         while (!skb_queue_empty(&tp->rx_queue))
2223                 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2224
2225         return 0;
2226 }
2227
2228 static int rtl_enable(struct r8152 *tp)
2229 {
2230         u32 ocp_data;
2231
2232         r8152b_reset_packet_filter(tp);
2233
2234         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2235         ocp_data |= CR_RE | CR_TE;
2236         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2237
2238         rxdy_gated_en(tp, false);
2239
2240         return 0;
2241 }
2242
2243 static int rtl8152_enable(struct r8152 *tp)
2244 {
2245         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2246                 return -ENODEV;
2247
2248         set_tx_qlen(tp);
2249         rtl_set_eee_plus(tp);
2250
2251         return rtl_enable(tp);
2252 }
2253
2254 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2255 {
2256         u32 ocp_data = tp->coalesce / 8;
2257
2258         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2259 }
2260
2261 static void r8153_set_rx_early_size(struct r8152 *tp)
2262 {
2263         u32 ocp_data = (agg_buf_sz - rx_reserved_size(tp->netdev->mtu)) / 4;
2264
2265         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2266 }
2267
2268 static int rtl8153_enable(struct r8152 *tp)
2269 {
2270         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2271                 return -ENODEV;
2272
2273         usb_disable_lpm(tp->udev);
2274         set_tx_qlen(tp);
2275         rtl_set_eee_plus(tp);
2276         r8153_set_rx_early_timeout(tp);
2277         r8153_set_rx_early_size(tp);
2278
2279         return rtl_enable(tp);
2280 }
2281
2282 static void rtl_disable(struct r8152 *tp)
2283 {
2284         u32 ocp_data;
2285         int i;
2286
2287         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2288                 rtl_drop_queued_tx(tp);
2289                 return;
2290         }
2291
2292         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2293         ocp_data &= ~RCR_ACPT_ALL;
2294         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2295
2296         rtl_drop_queued_tx(tp);
2297
2298         for (i = 0; i < RTL8152_MAX_TX; i++)
2299                 usb_kill_urb(tp->tx_info[i].urb);
2300
2301         rxdy_gated_en(tp, true);
2302
2303         for (i = 0; i < 1000; i++) {
2304                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2305                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2306                         break;
2307                 usleep_range(1000, 2000);
2308         }
2309
2310         for (i = 0; i < 1000; i++) {
2311                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2312                         break;
2313                 usleep_range(1000, 2000);
2314         }
2315
2316         rtl_stop_rx(tp);
2317
2318         rtl8152_nic_reset(tp);
2319 }
2320
2321 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2322 {
2323         u32 ocp_data;
2324
2325         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2326         if (enable)
2327                 ocp_data |= POWER_CUT;
2328         else
2329                 ocp_data &= ~POWER_CUT;
2330         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2331
2332         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2333         ocp_data &= ~RESUME_INDICATE;
2334         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2335 }
2336
2337 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2338 {
2339         u32 ocp_data;
2340
2341         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2342         if (enable)
2343                 ocp_data |= CPCR_RX_VLAN;
2344         else
2345                 ocp_data &= ~CPCR_RX_VLAN;
2346         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2347 }
2348
2349 static int rtl8152_set_features(struct net_device *dev,
2350                                 netdev_features_t features)
2351 {
2352         netdev_features_t changed = features ^ dev->features;
2353         struct r8152 *tp = netdev_priv(dev);
2354         int ret;
2355
2356         ret = usb_autopm_get_interface(tp->intf);
2357         if (ret < 0)
2358                 goto out;
2359
2360         mutex_lock(&tp->control);
2361
2362         if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2363                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2364                         rtl_rx_vlan_en(tp, true);
2365                 else
2366                         rtl_rx_vlan_en(tp, false);
2367         }
2368
2369         mutex_unlock(&tp->control);
2370
2371         usb_autopm_put_interface(tp->intf);
2372
2373 out:
2374         return ret;
2375 }
2376
2377 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2378
2379 static u32 __rtl_get_wol(struct r8152 *tp)
2380 {
2381         u32 ocp_data;
2382         u32 wolopts = 0;
2383
2384         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2385         if (ocp_data & LINK_ON_WAKE_EN)
2386                 wolopts |= WAKE_PHY;
2387
2388         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2389         if (ocp_data & UWF_EN)
2390                 wolopts |= WAKE_UCAST;
2391         if (ocp_data & BWF_EN)
2392                 wolopts |= WAKE_BCAST;
2393         if (ocp_data & MWF_EN)
2394                 wolopts |= WAKE_MCAST;
2395
2396         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2397         if (ocp_data & MAGIC_EN)
2398                 wolopts |= WAKE_MAGIC;
2399
2400         return wolopts;
2401 }
2402
2403 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2404 {
2405         u32 ocp_data;
2406
2407         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2408
2409         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2410         ocp_data &= ~LINK_ON_WAKE_EN;
2411         if (wolopts & WAKE_PHY)
2412                 ocp_data |= LINK_ON_WAKE_EN;
2413         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2414
2415         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2416         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN);
2417         if (wolopts & WAKE_UCAST)
2418                 ocp_data |= UWF_EN;
2419         if (wolopts & WAKE_BCAST)
2420                 ocp_data |= BWF_EN;
2421         if (wolopts & WAKE_MCAST)
2422                 ocp_data |= MWF_EN;
2423         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2424
2425         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2426
2427         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2428         ocp_data &= ~MAGIC_EN;
2429         if (wolopts & WAKE_MAGIC)
2430                 ocp_data |= MAGIC_EN;
2431         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2432
2433         if (wolopts & WAKE_ANY)
2434                 device_set_wakeup_enable(&tp->udev->dev, true);
2435         else
2436                 device_set_wakeup_enable(&tp->udev->dev, false);
2437 }
2438
2439 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2440 {
2441         u8 u1u2[8];
2442
2443         if (enable)
2444                 memset(u1u2, 0xff, sizeof(u1u2));
2445         else
2446                 memset(u1u2, 0x00, sizeof(u1u2));
2447
2448         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2449 }
2450
2451 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2452 {
2453         u32 ocp_data;
2454
2455         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2456         if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2457                 ocp_data |= U2P3_ENABLE;
2458         else
2459                 ocp_data &= ~U2P3_ENABLE;
2460         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2461 }
2462
2463 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2464 {
2465         u32 ocp_data;
2466
2467         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2468         if (enable)
2469                 ocp_data |= PWR_EN | PHASE2_EN;
2470         else
2471                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2472         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2473
2474         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2475         ocp_data &= ~PCUT_STATUS;
2476         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2477 }
2478
2479 static bool rtl_can_wakeup(struct r8152 *tp)
2480 {
2481         struct usb_device *udev = tp->udev;
2482
2483         return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2484 }
2485
2486 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2487 {
2488         if (enable) {
2489                 u32 ocp_data;
2490
2491                 __rtl_set_wol(tp, WAKE_ANY);
2492
2493                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2494
2495                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2496                 ocp_data |= LINK_OFF_WAKE_EN;
2497                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2498
2499                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2500         } else {
2501                 u32 ocp_data;
2502
2503                 __rtl_set_wol(tp, tp->saved_wolopts);
2504
2505                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2506
2507                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2508                 ocp_data &= ~LINK_OFF_WAKE_EN;
2509                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2510
2511                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2512         }
2513 }
2514
2515 static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
2516 {
2517         rtl_runtime_suspend_enable(tp, enable);
2518
2519         if (enable) {
2520                 r8153_u1u2en(tp, false);
2521                 r8153_u2p3en(tp, false);
2522         } else {
2523                 r8153_u2p3en(tp, true);
2524                 r8153_u1u2en(tp, true);
2525         }
2526 }
2527
2528 static void r8153_teredo_off(struct r8152 *tp)
2529 {
2530         u32 ocp_data;
2531
2532         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2533         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2534         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2535
2536         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2537         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2538         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2539 }
2540
2541 static void rtl_reset_bmu(struct r8152 *tp)
2542 {
2543         u32 ocp_data;
2544
2545         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
2546         ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
2547         ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2548         ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
2549         ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2550 }
2551
2552 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2553 {
2554         if (enable) {
2555                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2556                                                     LINKENA | DIS_SDSAVE);
2557         } else {
2558                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2559                                                     DIS_SDSAVE);
2560                 msleep(20);
2561         }
2562 }
2563
2564 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
2565 {
2566         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
2567         ocp_reg_write(tp, OCP_EEE_DATA, reg);
2568         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
2569 }
2570
2571 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
2572 {
2573         u16 data;
2574
2575         r8152_mmd_indirect(tp, dev, reg);
2576         data = ocp_reg_read(tp, OCP_EEE_DATA);
2577         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2578
2579         return data;
2580 }
2581
2582 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
2583 {
2584         r8152_mmd_indirect(tp, dev, reg);
2585         ocp_reg_write(tp, OCP_EEE_DATA, data);
2586         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2587 }
2588
2589 static void r8152_eee_en(struct r8152 *tp, bool enable)
2590 {
2591         u16 config1, config2, config3;
2592         u32 ocp_data;
2593
2594         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2595         config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
2596         config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
2597         config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
2598
2599         if (enable) {
2600                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2601                 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
2602                 config1 |= sd_rise_time(1);
2603                 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
2604                 config3 |= fast_snr(42);
2605         } else {
2606                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2607                 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
2608                              RX_QUIET_EN);
2609                 config1 |= sd_rise_time(7);
2610                 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
2611                 config3 |= fast_snr(511);
2612         }
2613
2614         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2615         ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
2616         ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
2617         ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
2618 }
2619
2620 static void r8152b_enable_eee(struct r8152 *tp)
2621 {
2622         r8152_eee_en(tp, true);
2623         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
2624 }
2625
2626 static void r8152b_enable_fc(struct r8152 *tp)
2627 {
2628         u16 anar;
2629
2630         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2631         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
2632         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2633 }
2634
2635 static void rtl8152_disable(struct r8152 *tp)
2636 {
2637         r8152_aldps_en(tp, false);
2638         rtl_disable(tp);
2639         r8152_aldps_en(tp, true);
2640 }
2641
2642 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2643 {
2644         r8152b_enable_eee(tp);
2645         r8152_aldps_en(tp, true);
2646         r8152b_enable_fc(tp);
2647
2648         set_bit(PHY_RESET, &tp->flags);
2649 }
2650
2651 static void r8152b_exit_oob(struct r8152 *tp)
2652 {
2653         u32 ocp_data;
2654         int i;
2655
2656         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2657         ocp_data &= ~RCR_ACPT_ALL;
2658         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2659
2660         rxdy_gated_en(tp, true);
2661         r8153_teredo_off(tp);
2662         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2663         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2664
2665         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2666         ocp_data &= ~NOW_IS_OOB;
2667         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2668
2669         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2670         ocp_data &= ~MCU_BORW_EN;
2671         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2672
2673         for (i = 0; i < 1000; i++) {
2674                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2675                 if (ocp_data & LINK_LIST_READY)
2676                         break;
2677                 usleep_range(1000, 2000);
2678         }
2679
2680         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2681         ocp_data |= RE_INIT_LL;
2682         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2683
2684         for (i = 0; i < 1000; i++) {
2685                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2686                 if (ocp_data & LINK_LIST_READY)
2687                         break;
2688                 usleep_range(1000, 2000);
2689         }
2690
2691         rtl8152_nic_reset(tp);
2692
2693         /* rx share fifo credit full threshold */
2694         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2695
2696         if (tp->udev->speed == USB_SPEED_FULL ||
2697             tp->udev->speed == USB_SPEED_LOW) {
2698                 /* rx share fifo credit near full threshold */
2699                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2700                                 RXFIFO_THR2_FULL);
2701                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2702                                 RXFIFO_THR3_FULL);
2703         } else {
2704                 /* rx share fifo credit near full threshold */
2705                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2706                                 RXFIFO_THR2_HIGH);
2707                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2708                                 RXFIFO_THR3_HIGH);
2709         }
2710
2711         /* TX share fifo free credit full threshold */
2712         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2713
2714         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2715         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2716         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2717                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2718
2719         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2720
2721         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2722
2723         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2724         ocp_data |= TCR0_AUTO_FIFO;
2725         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2726 }
2727
2728 static void r8152b_enter_oob(struct r8152 *tp)
2729 {
2730         u32 ocp_data;
2731         int i;
2732
2733         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2734         ocp_data &= ~NOW_IS_OOB;
2735         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2736
2737         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2738         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2739         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2740
2741         rtl_disable(tp);
2742
2743         for (i = 0; i < 1000; i++) {
2744                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2745                 if (ocp_data & LINK_LIST_READY)
2746                         break;
2747                 usleep_range(1000, 2000);
2748         }
2749
2750         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2751         ocp_data |= RE_INIT_LL;
2752         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2753
2754         for (i = 0; i < 1000; i++) {
2755                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2756                 if (ocp_data & LINK_LIST_READY)
2757                         break;
2758                 usleep_range(1000, 2000);
2759         }
2760
2761         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2762
2763         rtl_rx_vlan_en(tp, true);
2764
2765         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2766         ocp_data |= ALDPS_PROXY_MODE;
2767         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2768
2769         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2770         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2771         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2772
2773         rxdy_gated_en(tp, false);
2774
2775         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2776         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2777         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2778 }
2779
2780 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2781 {
2782         u16 data;
2783
2784         data = ocp_reg_read(tp, OCP_POWER_CFG);
2785         if (enable) {
2786                 data |= EN_ALDPS;
2787                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2788         } else {
2789                 data &= ~EN_ALDPS;
2790                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2791                 msleep(20);
2792         }
2793 }
2794
2795 static void r8153_eee_en(struct r8152 *tp, bool enable)
2796 {
2797         u32 ocp_data;
2798         u16 config;
2799
2800         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2801         config = ocp_reg_read(tp, OCP_EEE_CFG);
2802
2803         if (enable) {
2804                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2805                 config |= EEE10_EN;
2806         } else {
2807                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2808                 config &= ~EEE10_EN;
2809         }
2810
2811         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2812         ocp_reg_write(tp, OCP_EEE_CFG, config);
2813 }
2814
2815 static void r8153_hw_phy_cfg(struct r8152 *tp)
2816 {
2817         u32 ocp_data;
2818         u16 data;
2819
2820         /* disable ALDPS before updating the PHY parameters */
2821         r8153_aldps_en(tp, false);
2822
2823         /* disable EEE before updating the PHY parameters */
2824         r8153_eee_en(tp, false);
2825         ocp_reg_write(tp, OCP_EEE_ADV, 0);
2826
2827         if (tp->version == RTL_VER_03) {
2828                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2829                 data &= ~CTAP_SHORT_EN;
2830                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2831         }
2832
2833         data = ocp_reg_read(tp, OCP_POWER_CFG);
2834         data |= EEE_CLKDIV_EN;
2835         ocp_reg_write(tp, OCP_POWER_CFG, data);
2836
2837         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2838         data |= EN_10M_BGOFF;
2839         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2840         data = ocp_reg_read(tp, OCP_POWER_CFG);
2841         data |= EN_10M_PLLOFF;
2842         ocp_reg_write(tp, OCP_POWER_CFG, data);
2843         sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2844
2845         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2846         ocp_data |= PFM_PWM_SWITCH;
2847         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2848
2849         /* Enable LPF corner auto tune */
2850         sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2851
2852         /* Adjust 10M Amplitude */
2853         sram_write(tp, SRAM_10M_AMP1, 0x00af);
2854         sram_write(tp, SRAM_10M_AMP2, 0x0208);
2855
2856         r8153_eee_en(tp, true);
2857         ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
2858
2859         r8153_aldps_en(tp, true);
2860         r8152b_enable_fc(tp);
2861
2862         set_bit(PHY_RESET, &tp->flags);
2863 }
2864
2865 static void r8153_first_init(struct r8152 *tp)
2866 {
2867         u32 ocp_data;
2868         int i;
2869
2870         rxdy_gated_en(tp, true);
2871         r8153_teredo_off(tp);
2872
2873         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2874         ocp_data &= ~RCR_ACPT_ALL;
2875         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2876
2877         rtl8152_nic_reset(tp);
2878         rtl_reset_bmu(tp);
2879
2880         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2881         ocp_data &= ~NOW_IS_OOB;
2882         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2883
2884         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2885         ocp_data &= ~MCU_BORW_EN;
2886         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2887
2888         for (i = 0; i < 1000; i++) {
2889                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2890                 if (ocp_data & LINK_LIST_READY)
2891                         break;
2892                 usleep_range(1000, 2000);
2893         }
2894
2895         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2896         ocp_data |= RE_INIT_LL;
2897         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2898
2899         for (i = 0; i < 1000; i++) {
2900                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2901                 if (ocp_data & LINK_LIST_READY)
2902                         break;
2903                 usleep_range(1000, 2000);
2904         }
2905
2906         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2907
2908         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2909         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2910
2911         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2912         ocp_data |= TCR0_AUTO_FIFO;
2913         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2914
2915         rtl8152_nic_reset(tp);
2916
2917         /* rx share fifo credit full threshold */
2918         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2919         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2920         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2921         /* TX share fifo free credit full threshold */
2922         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2923
2924         /* rx aggregation */
2925         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2926         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2927         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2928 }
2929
2930 static void r8153_enter_oob(struct r8152 *tp)
2931 {
2932         u32 ocp_data;
2933         int i;
2934
2935         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2936         ocp_data &= ~NOW_IS_OOB;
2937         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2938
2939         rtl_disable(tp);
2940         rtl_reset_bmu(tp);
2941
2942         for (i = 0; i < 1000; i++) {
2943                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2944                 if (ocp_data & LINK_LIST_READY)
2945                         break;
2946                 usleep_range(1000, 2000);
2947         }
2948
2949         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2950         ocp_data |= RE_INIT_LL;
2951         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2952
2953         for (i = 0; i < 1000; i++) {
2954                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2955                 if (ocp_data & LINK_LIST_READY)
2956                         break;
2957                 usleep_range(1000, 2000);
2958         }
2959
2960         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2961
2962         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2963         ocp_data &= ~TEREDO_WAKE_MASK;
2964         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2965
2966         rtl_rx_vlan_en(tp, true);
2967
2968         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2969         ocp_data |= ALDPS_PROXY_MODE;
2970         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2971
2972         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2973         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2974         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2975
2976         rxdy_gated_en(tp, false);
2977
2978         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2979         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2980         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2981 }
2982
2983 static void rtl8153_disable(struct r8152 *tp)
2984 {
2985         r8153_aldps_en(tp, false);
2986         rtl_disable(tp);
2987         rtl_reset_bmu(tp);
2988         r8153_aldps_en(tp, true);
2989         usb_enable_lpm(tp->udev);
2990 }
2991
2992 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2993 {
2994         u16 bmcr, anar, gbcr;
2995         int ret = 0;
2996
2997         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2998         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2999                   ADVERTISE_100HALF | ADVERTISE_100FULL);
3000         if (tp->mii.supports_gmii) {
3001                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
3002                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
3003         } else {
3004                 gbcr = 0;
3005         }
3006
3007         if (autoneg == AUTONEG_DISABLE) {
3008                 if (speed == SPEED_10) {
3009                         bmcr = 0;
3010                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3011                 } else if (speed == SPEED_100) {
3012                         bmcr = BMCR_SPEED100;
3013                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3014                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3015                         bmcr = BMCR_SPEED1000;
3016                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3017                 } else {
3018                         ret = -EINVAL;
3019                         goto out;
3020                 }
3021
3022                 if (duplex == DUPLEX_FULL)
3023                         bmcr |= BMCR_FULLDPLX;
3024         } else {
3025                 if (speed == SPEED_10) {
3026                         if (duplex == DUPLEX_FULL)
3027                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3028                         else
3029                                 anar |= ADVERTISE_10HALF;
3030                 } else if (speed == SPEED_100) {
3031                         if (duplex == DUPLEX_FULL) {
3032                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3033                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3034                         } else {
3035                                 anar |= ADVERTISE_10HALF;
3036                                 anar |= ADVERTISE_100HALF;
3037                         }
3038                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3039                         if (duplex == DUPLEX_FULL) {
3040                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3041                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3042                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3043                         } else {
3044                                 anar |= ADVERTISE_10HALF;
3045                                 anar |= ADVERTISE_100HALF;
3046                                 gbcr |= ADVERTISE_1000HALF;
3047                         }
3048                 } else {
3049                         ret = -EINVAL;
3050                         goto out;
3051                 }
3052
3053                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
3054         }
3055
3056         if (test_and_clear_bit(PHY_RESET, &tp->flags))
3057                 bmcr |= BMCR_RESET;
3058
3059         if (tp->mii.supports_gmii)
3060                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
3061
3062         r8152_mdio_write(tp, MII_ADVERTISE, anar);
3063         r8152_mdio_write(tp, MII_BMCR, bmcr);
3064
3065         if (bmcr & BMCR_RESET) {
3066                 int i;
3067
3068                 for (i = 0; i < 50; i++) {
3069                         msleep(20);
3070                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
3071                                 break;
3072                 }
3073         }
3074
3075 out:
3076         return ret;
3077 }
3078
3079 static void rtl8152_up(struct r8152 *tp)
3080 {
3081         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3082                 return;
3083
3084         r8152_aldps_en(tp, false);
3085         r8152b_exit_oob(tp);
3086         r8152_aldps_en(tp, true);
3087 }
3088
3089 static void rtl8152_down(struct r8152 *tp)
3090 {
3091         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3092                 rtl_drop_queued_tx(tp);
3093                 return;
3094         }
3095
3096         r8152_power_cut_en(tp, false);
3097         r8152_aldps_en(tp, false);
3098         r8152b_enter_oob(tp);
3099         r8152_aldps_en(tp, true);
3100 }
3101
3102 static void rtl8153_up(struct r8152 *tp)
3103 {
3104         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3105                 return;
3106
3107         r8153_u1u2en(tp, false);
3108         r8153_aldps_en(tp, false);
3109         r8153_first_init(tp);
3110         r8153_aldps_en(tp, true);
3111         r8153_u2p3en(tp, true);
3112         r8153_u1u2en(tp, true);
3113         usb_enable_lpm(tp->udev);
3114 }
3115
3116 static void rtl8153_down(struct r8152 *tp)
3117 {
3118         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3119                 rtl_drop_queued_tx(tp);
3120                 return;
3121         }
3122
3123         r8153_u1u2en(tp, false);
3124         r8153_u2p3en(tp, false);
3125         r8153_power_cut_en(tp, false);
3126         r8153_aldps_en(tp, false);
3127         r8153_enter_oob(tp);
3128         r8153_aldps_en(tp, true);
3129 }
3130
3131 static bool rtl8152_in_nway(struct r8152 *tp)
3132 {
3133         u16 nway_state;
3134
3135         ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
3136         tp->ocp_base = 0x2000;
3137         ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c);         /* phy state */
3138         nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
3139
3140         /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3141         if (nway_state & 0xc000)
3142                 return false;
3143         else
3144                 return true;
3145 }
3146
3147 static bool rtl8153_in_nway(struct r8152 *tp)
3148 {
3149         u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
3150
3151         if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
3152                 return false;
3153         else
3154                 return true;
3155 }
3156
3157 static void set_carrier(struct r8152 *tp)
3158 {
3159         struct net_device *netdev = tp->netdev;
3160         u8 speed;
3161
3162         speed = rtl8152_get_speed(tp);
3163
3164         if (speed & LINK_STATUS) {
3165                 if (!netif_carrier_ok(netdev)) {
3166                         tp->rtl_ops.enable(tp);
3167                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
3168                         netif_stop_queue(netdev);
3169                         napi_disable(&tp->napi);
3170                         netif_carrier_on(netdev);
3171                         rtl_start_rx(tp);
3172                         napi_enable(&tp->napi);
3173                         netif_wake_queue(netdev);
3174                         netif_info(tp, link, netdev, "carrier on\n");
3175                 } else if (netif_queue_stopped(netdev) &&
3176                            skb_queue_len(&tp->tx_queue) < tp->tx_qlen) {
3177                         netif_wake_queue(netdev);
3178                 }
3179         } else {
3180                 if (netif_carrier_ok(netdev)) {
3181                         netif_carrier_off(netdev);
3182                         napi_disable(&tp->napi);
3183                         tp->rtl_ops.disable(tp);
3184                         napi_enable(&tp->napi);
3185                         netif_info(tp, link, netdev, "carrier off\n");
3186                 }
3187         }
3188 }
3189
3190 static void rtl_work_func_t(struct work_struct *work)
3191 {
3192         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3193
3194         /* If the device is unplugged or !netif_running(), the workqueue
3195          * doesn't need to wake the device, and could return directly.
3196          */
3197         if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3198                 return;
3199
3200         if (usb_autopm_get_interface(tp->intf) < 0)
3201                 return;
3202
3203         if (!test_bit(WORK_ENABLE, &tp->flags))
3204                 goto out1;
3205
3206         if (!mutex_trylock(&tp->control)) {
3207                 schedule_delayed_work(&tp->schedule, 0);
3208                 goto out1;
3209         }
3210
3211         if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3212                 set_carrier(tp);
3213
3214         if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3215                 _rtl8152_set_rx_mode(tp->netdev);
3216
3217         /* don't schedule napi before linking */
3218         if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3219             netif_carrier_ok(tp->netdev))
3220                 napi_schedule(&tp->napi);
3221
3222         mutex_unlock(&tp->control);
3223
3224 out1:
3225         usb_autopm_put_interface(tp->intf);
3226 }
3227
3228 static void rtl_hw_phy_work_func_t(struct work_struct *work)
3229 {
3230         struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
3231
3232         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3233                 return;
3234
3235         if (usb_autopm_get_interface(tp->intf) < 0)
3236                 return;
3237
3238         mutex_lock(&tp->control);
3239
3240         tp->rtl_ops.hw_phy_cfg(tp);
3241
3242         rtl8152_set_speed(tp, tp->autoneg, tp->speed, tp->duplex);
3243
3244         mutex_unlock(&tp->control);
3245
3246         usb_autopm_put_interface(tp->intf);
3247 }
3248
3249 #ifdef CONFIG_PM_SLEEP
3250 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3251                         void *data)
3252 {
3253         struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3254
3255         switch (action) {
3256         case PM_HIBERNATION_PREPARE:
3257         case PM_SUSPEND_PREPARE:
3258                 usb_autopm_get_interface(tp->intf);
3259                 break;
3260
3261         case PM_POST_HIBERNATION:
3262         case PM_POST_SUSPEND:
3263                 usb_autopm_put_interface(tp->intf);
3264                 break;
3265
3266         case PM_POST_RESTORE:
3267         case PM_RESTORE_PREPARE:
3268         default:
3269                 break;
3270         }
3271
3272         return NOTIFY_DONE;
3273 }
3274 #endif
3275
3276 static int rtl8152_open(struct net_device *netdev)
3277 {
3278         struct r8152 *tp = netdev_priv(netdev);
3279         int res = 0;
3280
3281         res = alloc_all_mem(tp);
3282         if (res)
3283                 goto out;
3284
3285         res = usb_autopm_get_interface(tp->intf);
3286         if (res < 0)
3287                 goto out_free;
3288
3289         mutex_lock(&tp->control);
3290
3291         tp->rtl_ops.up(tp);
3292
3293         netif_carrier_off(netdev);
3294         netif_start_queue(netdev);
3295         set_bit(WORK_ENABLE, &tp->flags);
3296
3297         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3298         if (res) {
3299                 if (res == -ENODEV)
3300                         netif_device_detach(tp->netdev);
3301                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3302                            res);
3303                 goto out_unlock;
3304         }
3305         napi_enable(&tp->napi);
3306
3307         mutex_unlock(&tp->control);
3308
3309         usb_autopm_put_interface(tp->intf);
3310 #ifdef CONFIG_PM_SLEEP
3311         tp->pm_notifier.notifier_call = rtl_notifier;
3312         register_pm_notifier(&tp->pm_notifier);
3313 #endif
3314         return 0;
3315
3316 out_unlock:
3317         mutex_unlock(&tp->control);
3318         usb_autopm_put_interface(tp->intf);
3319 out_free:
3320         free_all_mem(tp);
3321 out:
3322         return res;
3323 }
3324
3325 static int rtl8152_close(struct net_device *netdev)
3326 {
3327         struct r8152 *tp = netdev_priv(netdev);
3328         int res = 0;
3329
3330 #ifdef CONFIG_PM_SLEEP
3331         unregister_pm_notifier(&tp->pm_notifier);
3332 #endif
3333         if (!test_bit(RTL8152_UNPLUG, &tp->flags))
3334                 napi_disable(&tp->napi);
3335         clear_bit(WORK_ENABLE, &tp->flags);
3336         usb_kill_urb(tp->intr_urb);
3337         cancel_delayed_work_sync(&tp->schedule);
3338         netif_stop_queue(netdev);
3339
3340         res = usb_autopm_get_interface(tp->intf);
3341         if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3342                 rtl_drop_queued_tx(tp);
3343                 rtl_stop_rx(tp);
3344         } else {
3345                 mutex_lock(&tp->control);
3346
3347                 tp->rtl_ops.down(tp);
3348
3349                 mutex_unlock(&tp->control);
3350         }
3351
3352         if (!res)
3353                 usb_autopm_put_interface(tp->intf);
3354
3355         free_all_mem(tp);
3356
3357         return res;
3358 }
3359
3360 static void rtl_tally_reset(struct r8152 *tp)
3361 {
3362         u32 ocp_data;
3363
3364         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3365         ocp_data |= TALLY_RESET;
3366         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3367 }
3368
3369 static void r8152b_init(struct r8152 *tp)
3370 {
3371         u32 ocp_data;
3372         u16 data;
3373
3374         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3375                 return;
3376
3377         data = r8152_mdio_read(tp, MII_BMCR);
3378         if (data & BMCR_PDOWN) {
3379                 data &= ~BMCR_PDOWN;
3380                 r8152_mdio_write(tp, MII_BMCR, data);
3381         }
3382
3383         r8152_aldps_en(tp, false);
3384
3385         if (tp->version == RTL_VER_01) {
3386                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3387                 ocp_data &= ~LED_MODE_MASK;
3388                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3389         }
3390
3391         r8152_power_cut_en(tp, false);
3392
3393         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3394         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3395         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3396         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3397         ocp_data &= ~MCU_CLK_RATIO_MASK;
3398         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3399         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3400         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3401                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3402         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3403
3404         rtl_tally_reset(tp);
3405
3406         /* enable rx aggregation */
3407         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3408         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3409         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3410 }
3411
3412 static void r8153_init(struct r8152 *tp)
3413 {
3414         u32 ocp_data;
3415         u16 data;
3416         int i;
3417
3418         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3419                 return;
3420
3421         r8153_u1u2en(tp, false);
3422
3423         for (i = 0; i < 500; i++) {
3424                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3425                     AUTOLOAD_DONE)
3426                         break;
3427
3428                 msleep(20);
3429                 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3430                         break;
3431         }
3432
3433         for (i = 0; i < 500; i++) {
3434                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3435                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3436                         break;
3437                 msleep(20);
3438         }
3439
3440         if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
3441             tp->version == RTL_VER_05)
3442                 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
3443
3444         data = r8152_mdio_read(tp, MII_BMCR);
3445         if (data & BMCR_PDOWN) {
3446                 data &= ~BMCR_PDOWN;
3447                 r8152_mdio_write(tp, MII_BMCR, data);
3448         }
3449
3450         for (i = 0; i < 500; i++) {
3451                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3452                 if (ocp_data == PHY_STAT_LAN_ON)
3453                         break;
3454
3455                 msleep(20);
3456                 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3457                         break;
3458         }
3459
3460         usb_disable_lpm(tp->udev);
3461         r8153_u2p3en(tp, false);
3462
3463         if (tp->version == RTL_VER_04) {
3464                 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3465                 ocp_data &= ~pwd_dn_scale_mask;
3466                 ocp_data |= pwd_dn_scale(96);
3467                 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3468
3469                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3470                 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3471                 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3472         } else if (tp->version == RTL_VER_05) {
3473                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3474                 ocp_data &= ~ECM_ALDPS;
3475                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3476
3477                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3478                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3479                         ocp_data &= ~DYNAMIC_BURST;
3480                 else
3481                         ocp_data |= DYNAMIC_BURST;
3482                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3483         } else if (tp->version == RTL_VER_06) {
3484                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3485                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3486                         ocp_data &= ~DYNAMIC_BURST;
3487                 else
3488                         ocp_data |= DYNAMIC_BURST;
3489                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3490         }
3491
3492         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3493         ocp_data |= EP4_FULL_FC;
3494         ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3495
3496         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3497         ocp_data &= ~TIMER11_EN;
3498         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3499
3500         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3501         ocp_data &= ~LED_MODE_MASK;
3502         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3503
3504         ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3505         if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3506                 ocp_data |= LPM_TIMER_500MS;
3507         else
3508                 ocp_data |= LPM_TIMER_500US;
3509         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3510
3511         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3512         ocp_data &= ~SEN_VAL_MASK;
3513         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3514         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3515
3516         ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3517
3518         r8153_power_cut_en(tp, false);
3519         r8153_u1u2en(tp, true);
3520
3521         /* MAC clock speed down */
3522         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
3523         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
3524         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
3525         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
3526
3527         rtl_tally_reset(tp);
3528         r8153_u2p3en(tp, true);
3529 }
3530
3531 static int rtl8152_pre_reset(struct usb_interface *intf)
3532 {
3533         struct r8152 *tp = usb_get_intfdata(intf);
3534         struct net_device *netdev;
3535
3536         if (!tp)
3537                 return 0;
3538
3539         netdev = tp->netdev;
3540         if (!netif_running(netdev))
3541                 return 0;
3542
3543         netif_stop_queue(netdev);
3544         napi_disable(&tp->napi);
3545         clear_bit(WORK_ENABLE, &tp->flags);
3546         usb_kill_urb(tp->intr_urb);
3547         cancel_delayed_work_sync(&tp->schedule);
3548         if (netif_carrier_ok(netdev)) {
3549                 mutex_lock(&tp->control);
3550                 tp->rtl_ops.disable(tp);
3551                 mutex_unlock(&tp->control);
3552         }
3553
3554         return 0;
3555 }
3556
3557 static int rtl8152_post_reset(struct usb_interface *intf)
3558 {
3559         struct r8152 *tp = usb_get_intfdata(intf);
3560         struct net_device *netdev;
3561
3562         if (!tp)
3563                 return 0;
3564
3565         netdev = tp->netdev;
3566         if (!netif_running(netdev))
3567                 return 0;
3568
3569         set_bit(WORK_ENABLE, &tp->flags);
3570         if (netif_carrier_ok(netdev)) {
3571                 mutex_lock(&tp->control);
3572                 tp->rtl_ops.enable(tp);
3573                 rtl_start_rx(tp);
3574                 rtl8152_set_rx_mode(netdev);
3575                 mutex_unlock(&tp->control);
3576         }
3577
3578         napi_enable(&tp->napi);
3579         netif_wake_queue(netdev);
3580         usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3581
3582         if (!list_empty(&tp->rx_done))
3583                 napi_schedule(&tp->napi);
3584
3585         return 0;
3586 }
3587
3588 static bool delay_autosuspend(struct r8152 *tp)
3589 {
3590         bool sw_linking = !!netif_carrier_ok(tp->netdev);
3591         bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3592
3593         /* This means a linking change occurs and the driver doesn't detect it,
3594          * yet. If the driver has disabled tx/rx and hw is linking on, the
3595          * device wouldn't wake up by receiving any packet.
3596          */
3597         if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3598                 return true;
3599
3600         /* If the linking down is occurred by nway, the device may miss the
3601          * linking change event. And it wouldn't wake when linking on.
3602          */
3603         if (!sw_linking && tp->rtl_ops.in_nway(tp))
3604                 return true;
3605         else if (!skb_queue_empty(&tp->tx_queue))
3606                 return true;
3607         else
3608                 return false;
3609 }
3610
3611 static int rtl8152_rumtime_suspend(struct r8152 *tp)
3612 {
3613         struct net_device *netdev = tp->netdev;
3614         int ret = 0;
3615
3616         set_bit(SELECTIVE_SUSPEND, &tp->flags);
3617         smp_mb__after_atomic();
3618
3619         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3620                 u32 rcr = 0;
3621
3622                 if (delay_autosuspend(tp)) {
3623                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3624                         smp_mb__after_atomic();
3625                         ret = -EBUSY;
3626                         goto out1;
3627                 }
3628
3629                 if (netif_carrier_ok(netdev)) {
3630                         u32 ocp_data;
3631
3632                         rcr = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3633                         ocp_data = rcr & ~RCR_ACPT_ALL;
3634                         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3635                         rxdy_gated_en(tp, true);
3636                         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA,
3637                                                  PLA_OOB_CTRL);
3638                         if (!(ocp_data & RXFIFO_EMPTY)) {
3639                                 rxdy_gated_en(tp, false);
3640                                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3641                                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3642                                 smp_mb__after_atomic();
3643                                 ret = -EBUSY;
3644                                 goto out1;
3645                         }
3646                 }
3647
3648                 clear_bit(WORK_ENABLE, &tp->flags);
3649                 usb_kill_urb(tp->intr_urb);
3650
3651                 tp->rtl_ops.autosuspend_en(tp, true);
3652
3653                 if (netif_carrier_ok(netdev)) {
3654                         napi_disable(&tp->napi);
3655                         rtl_stop_rx(tp);
3656                         rxdy_gated_en(tp, false);
3657                         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3658                         napi_enable(&tp->napi);
3659                 }
3660         }
3661
3662 out1:
3663         return ret;
3664 }
3665
3666 static int rtl8152_system_suspend(struct r8152 *tp)
3667 {
3668         struct net_device *netdev = tp->netdev;
3669         int ret = 0;
3670
3671         netif_device_detach(netdev);
3672
3673         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3674                 clear_bit(WORK_ENABLE, &tp->flags);
3675                 usb_kill_urb(tp->intr_urb);
3676                 napi_disable(&tp->napi);
3677                 cancel_delayed_work_sync(&tp->schedule);
3678                 tp->rtl_ops.down(tp);
3679                 napi_enable(&tp->napi);
3680         }
3681
3682         return ret;
3683 }
3684
3685 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3686 {
3687         struct r8152 *tp = usb_get_intfdata(intf);
3688         int ret;
3689
3690         mutex_lock(&tp->control);
3691
3692         if (PMSG_IS_AUTO(message))
3693                 ret = rtl8152_rumtime_suspend(tp);
3694         else
3695                 ret = rtl8152_system_suspend(tp);
3696
3697         mutex_unlock(&tp->control);
3698
3699         return ret;
3700 }
3701
3702 static int rtl8152_resume(struct usb_interface *intf)
3703 {
3704         struct r8152 *tp = usb_get_intfdata(intf);
3705
3706         mutex_lock(&tp->control);
3707
3708         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3709                 tp->rtl_ops.init(tp);
3710                 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
3711                 netif_device_attach(tp->netdev);
3712         }
3713
3714         if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3715                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3716                         tp->rtl_ops.autosuspend_en(tp, false);
3717                         napi_disable(&tp->napi);
3718                         set_bit(WORK_ENABLE, &tp->flags);
3719
3720                         if (netif_carrier_ok(tp->netdev)) {
3721                                 if (rtl8152_get_speed(tp) & LINK_STATUS) {
3722                                         rtl_start_rx(tp);
3723                                 } else {
3724                                         netif_carrier_off(tp->netdev);
3725                                         tp->rtl_ops.disable(tp);
3726                                         netif_info(tp, link, tp->netdev,
3727                                                    "linking down\n");
3728                                 }
3729                         }
3730
3731                         napi_enable(&tp->napi);
3732                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3733                         smp_mb__after_atomic();
3734                         if (!list_empty(&tp->rx_done))
3735                                 napi_schedule(&tp->napi);
3736                 } else {
3737                         tp->rtl_ops.up(tp);
3738                         netif_carrier_off(tp->netdev);
3739                         set_bit(WORK_ENABLE, &tp->flags);
3740                 }
3741                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3742         } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3743                 if (tp->netdev->flags & IFF_UP)
3744                         tp->rtl_ops.autosuspend_en(tp, false);
3745                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3746         }
3747
3748         mutex_unlock(&tp->control);
3749
3750         return 0;
3751 }
3752
3753 static int rtl8152_reset_resume(struct usb_interface *intf)
3754 {
3755         struct r8152 *tp = usb_get_intfdata(intf);
3756
3757         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3758         return rtl8152_resume(intf);
3759 }
3760
3761 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3762 {
3763         struct r8152 *tp = netdev_priv(dev);
3764
3765         if (usb_autopm_get_interface(tp->intf) < 0)
3766                 return;
3767
3768         if (!rtl_can_wakeup(tp)) {
3769                 wol->supported = 0;
3770                 wol->wolopts = 0;
3771         } else {
3772                 mutex_lock(&tp->control);
3773                 wol->supported = WAKE_ANY;
3774                 wol->wolopts = __rtl_get_wol(tp);
3775                 mutex_unlock(&tp->control);
3776         }
3777
3778         usb_autopm_put_interface(tp->intf);
3779 }
3780
3781 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3782 {
3783         struct r8152 *tp = netdev_priv(dev);
3784         int ret;
3785
3786         if (!rtl_can_wakeup(tp))
3787                 return -EOPNOTSUPP;
3788
3789         if (wol->wolopts & ~WAKE_ANY)
3790                 return -EINVAL;
3791
3792         ret = usb_autopm_get_interface(tp->intf);
3793         if (ret < 0)
3794                 goto out_set_wol;
3795
3796         mutex_lock(&tp->control);
3797
3798         __rtl_set_wol(tp, wol->wolopts);
3799         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3800
3801         mutex_unlock(&tp->control);
3802
3803         usb_autopm_put_interface(tp->intf);
3804
3805 out_set_wol:
3806         return ret;
3807 }
3808
3809 static u32 rtl8152_get_msglevel(struct net_device *dev)
3810 {
3811         struct r8152 *tp = netdev_priv(dev);
3812
3813         return tp->msg_enable;
3814 }
3815
3816 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3817 {
3818         struct r8152 *tp = netdev_priv(dev);
3819
3820         tp->msg_enable = value;
3821 }
3822
3823 static void rtl8152_get_drvinfo(struct net_device *netdev,
3824                                 struct ethtool_drvinfo *info)
3825 {
3826         struct r8152 *tp = netdev_priv(netdev);
3827
3828         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3829         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3830         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3831 }
3832
3833 static
3834 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3835 {
3836         struct r8152 *tp = netdev_priv(netdev);
3837         int ret;
3838
3839         if (!tp->mii.mdio_read)
3840                 return -EOPNOTSUPP;
3841
3842         ret = usb_autopm_get_interface(tp->intf);
3843         if (ret < 0)
3844                 goto out;
3845
3846         mutex_lock(&tp->control);
3847
3848         ret = mii_ethtool_gset(&tp->mii, cmd);
3849
3850         mutex_unlock(&tp->control);
3851
3852         usb_autopm_put_interface(tp->intf);
3853
3854 out:
3855         return ret;
3856 }
3857
3858 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3859 {
3860         struct r8152 *tp = netdev_priv(dev);
3861         int ret;
3862
3863         ret = usb_autopm_get_interface(tp->intf);
3864         if (ret < 0)
3865                 goto out;
3866
3867         mutex_lock(&tp->control);
3868
3869         ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3870         if (!ret) {
3871                 tp->autoneg = cmd->autoneg;
3872                 tp->speed = cmd->speed;
3873                 tp->duplex = cmd->duplex;
3874         }
3875
3876         mutex_unlock(&tp->control);
3877
3878         usb_autopm_put_interface(tp->intf);
3879
3880 out:
3881         return ret;
3882 }
3883
3884 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3885         "tx_packets",
3886         "rx_packets",
3887         "tx_errors",
3888         "rx_errors",
3889         "rx_missed",
3890         "align_errors",
3891         "tx_single_collisions",
3892         "tx_multi_collisions",
3893         "rx_unicast",
3894         "rx_broadcast",
3895         "rx_multicast",
3896         "tx_aborted",
3897         "tx_underrun",
3898 };
3899
3900 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3901 {
3902         switch (sset) {
3903         case ETH_SS_STATS:
3904                 return ARRAY_SIZE(rtl8152_gstrings);
3905         default:
3906                 return -EOPNOTSUPP;
3907         }
3908 }
3909
3910 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3911                                       struct ethtool_stats *stats, u64 *data)
3912 {
3913         struct r8152 *tp = netdev_priv(dev);
3914         struct tally_counter tally;
3915
3916         if (usb_autopm_get_interface(tp->intf) < 0)
3917                 return;
3918
3919         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3920
3921         usb_autopm_put_interface(tp->intf);
3922
3923         data[0] = le64_to_cpu(tally.tx_packets);
3924         data[1] = le64_to_cpu(tally.rx_packets);
3925         data[2] = le64_to_cpu(tally.tx_errors);
3926         data[3] = le32_to_cpu(tally.rx_errors);
3927         data[4] = le16_to_cpu(tally.rx_missed);
3928         data[5] = le16_to_cpu(tally.align_errors);
3929         data[6] = le32_to_cpu(tally.tx_one_collision);
3930         data[7] = le32_to_cpu(tally.tx_multi_collision);
3931         data[8] = le64_to_cpu(tally.rx_unicast);
3932         data[9] = le64_to_cpu(tally.rx_broadcast);
3933         data[10] = le32_to_cpu(tally.rx_multicast);
3934         data[11] = le16_to_cpu(tally.tx_aborted);
3935         data[12] = le16_to_cpu(tally.tx_underrun);
3936 }
3937
3938 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3939 {
3940         switch (stringset) {
3941         case ETH_SS_STATS:
3942                 memcpy(data, rtl8152_gstrings, sizeof(rtl8152_gstrings));
3943                 break;
3944         }
3945 }
3946
3947 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3948 {
3949         u32 ocp_data, lp, adv, supported = 0;
3950         u16 val;
3951
3952         val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3953         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3954
3955         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3956         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3957
3958         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3959         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3960
3961         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3962         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3963
3964         eee->eee_enabled = !!ocp_data;
3965         eee->eee_active = !!(supported & adv & lp);
3966         eee->supported = supported;
3967         eee->advertised = adv;
3968         eee->lp_advertised = lp;
3969
3970         return 0;
3971 }
3972
3973 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3974 {
3975         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3976
3977         r8152_eee_en(tp, eee->eee_enabled);
3978
3979         if (!eee->eee_enabled)
3980                 val = 0;
3981
3982         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3983
3984         return 0;
3985 }
3986
3987 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3988 {
3989         u32 ocp_data, lp, adv, supported = 0;
3990         u16 val;
3991
3992         val = ocp_reg_read(tp, OCP_EEE_ABLE);
3993         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3994
3995         val = ocp_reg_read(tp, OCP_EEE_ADV);
3996         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3997
3998         val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3999         lp = mmd_eee_adv_to_ethtool_adv_t(val);
4000
4001         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
4002         ocp_data &= EEE_RX_EN | EEE_TX_EN;
4003
4004         eee->eee_enabled = !!ocp_data;
4005         eee->eee_active = !!(supported & adv & lp);
4006         eee->supported = supported;
4007         eee->advertised = adv;
4008         eee->lp_advertised = lp;
4009
4010         return 0;
4011 }
4012
4013 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4014 {
4015         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4016
4017         r8153_eee_en(tp, eee->eee_enabled);
4018
4019         if (!eee->eee_enabled)
4020                 val = 0;
4021
4022         ocp_reg_write(tp, OCP_EEE_ADV, val);
4023
4024         return 0;
4025 }
4026
4027 static int
4028 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
4029 {
4030         struct r8152 *tp = netdev_priv(net);
4031         int ret;
4032
4033         ret = usb_autopm_get_interface(tp->intf);
4034         if (ret < 0)
4035                 goto out;
4036
4037         mutex_lock(&tp->control);
4038
4039         ret = tp->rtl_ops.eee_get(tp, edata);
4040
4041         mutex_unlock(&tp->control);
4042
4043         usb_autopm_put_interface(tp->intf);
4044
4045 out:
4046         return ret;
4047 }
4048
4049 static int
4050 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
4051 {
4052         struct r8152 *tp = netdev_priv(net);
4053         int ret;
4054
4055         ret = usb_autopm_get_interface(tp->intf);
4056         if (ret < 0)
4057                 goto out;
4058
4059         mutex_lock(&tp->control);
4060
4061         ret = tp->rtl_ops.eee_set(tp, edata);
4062         if (!ret)
4063                 ret = mii_nway_restart(&tp->mii);
4064
4065         mutex_unlock(&tp->control);
4066
4067         usb_autopm_put_interface(tp->intf);
4068
4069 out:
4070         return ret;
4071 }
4072
4073 static int rtl8152_nway_reset(struct net_device *dev)
4074 {
4075         struct r8152 *tp = netdev_priv(dev);
4076         int ret;
4077
4078         ret = usb_autopm_get_interface(tp->intf);
4079         if (ret < 0)
4080                 goto out;
4081
4082         mutex_lock(&tp->control);
4083
4084         ret = mii_nway_restart(&tp->mii);
4085
4086         mutex_unlock(&tp->control);
4087
4088         usb_autopm_put_interface(tp->intf);
4089
4090 out:
4091         return ret;
4092 }
4093
4094 static int rtl8152_get_coalesce(struct net_device *netdev,
4095                                 struct ethtool_coalesce *coalesce)
4096 {
4097         struct r8152 *tp = netdev_priv(netdev);
4098
4099         switch (tp->version) {
4100         case RTL_VER_01:
4101         case RTL_VER_02:
4102                 return -EOPNOTSUPP;
4103         default:
4104                 break;
4105         }
4106
4107         coalesce->rx_coalesce_usecs = tp->coalesce;
4108
4109         return 0;
4110 }
4111
4112 static int rtl8152_set_coalesce(struct net_device *netdev,
4113                                 struct ethtool_coalesce *coalesce)
4114 {
4115         struct r8152 *tp = netdev_priv(netdev);
4116         int ret;
4117
4118         switch (tp->version) {
4119         case RTL_VER_01:
4120         case RTL_VER_02:
4121                 return -EOPNOTSUPP;
4122         default:
4123                 break;
4124         }
4125
4126         if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
4127                 return -EINVAL;
4128
4129         ret = usb_autopm_get_interface(tp->intf);
4130         if (ret < 0)
4131                 return ret;
4132
4133         mutex_lock(&tp->control);
4134
4135         if (tp->coalesce != coalesce->rx_coalesce_usecs) {
4136                 tp->coalesce = coalesce->rx_coalesce_usecs;
4137
4138                 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
4139                         r8153_set_rx_early_timeout(tp);
4140         }
4141
4142         mutex_unlock(&tp->control);
4143
4144         usb_autopm_put_interface(tp->intf);
4145
4146         return ret;
4147 }
4148
4149 static const struct ethtool_ops ops = {
4150         .get_drvinfo = rtl8152_get_drvinfo,
4151         .get_settings = rtl8152_get_settings,
4152         .set_settings = rtl8152_set_settings,
4153         .get_link = ethtool_op_get_link,
4154         .nway_reset = rtl8152_nway_reset,
4155         .get_msglevel = rtl8152_get_msglevel,
4156         .set_msglevel = rtl8152_set_msglevel,
4157         .get_wol = rtl8152_get_wol,
4158         .set_wol = rtl8152_set_wol,
4159         .get_strings = rtl8152_get_strings,
4160         .get_sset_count = rtl8152_get_sset_count,
4161         .get_ethtool_stats = rtl8152_get_ethtool_stats,
4162         .get_coalesce = rtl8152_get_coalesce,
4163         .set_coalesce = rtl8152_set_coalesce,
4164         .get_eee = rtl_ethtool_get_eee,
4165         .set_eee = rtl_ethtool_set_eee,
4166 };
4167
4168 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
4169 {
4170         struct r8152 *tp = netdev_priv(netdev);
4171         struct mii_ioctl_data *data = if_mii(rq);
4172         int res;
4173
4174         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4175                 return -ENODEV;
4176
4177         res = usb_autopm_get_interface(tp->intf);
4178         if (res < 0)
4179                 goto out;
4180
4181         switch (cmd) {
4182         case SIOCGMIIPHY:
4183                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4184                 break;
4185
4186         case SIOCGMIIREG:
4187                 mutex_lock(&tp->control);
4188                 data->val_out = r8152_mdio_read(tp, data->reg_num);
4189                 mutex_unlock(&tp->control);
4190                 break;
4191
4192         case SIOCSMIIREG:
4193                 if (!capable(CAP_NET_ADMIN)) {
4194                         res = -EPERM;
4195                         break;
4196                 }
4197                 mutex_lock(&tp->control);
4198                 r8152_mdio_write(tp, data->reg_num, data->val_in);
4199                 mutex_unlock(&tp->control);
4200                 break;
4201
4202         default:
4203                 res = -EOPNOTSUPP;
4204         }
4205
4206         usb_autopm_put_interface(tp->intf);
4207
4208 out:
4209         return res;
4210 }
4211
4212 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4213 {
4214         struct r8152 *tp = netdev_priv(dev);
4215         int ret;
4216
4217         switch (tp->version) {
4218         case RTL_VER_01:
4219         case RTL_VER_02:
4220                 return eth_change_mtu(dev, new_mtu);
4221         default:
4222                 break;
4223         }
4224
4225         if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
4226                 return -EINVAL;
4227
4228         ret = usb_autopm_get_interface(tp->intf);
4229         if (ret < 0)
4230                 return ret;
4231
4232         mutex_lock(&tp->control);
4233
4234         dev->mtu = new_mtu;
4235
4236         if (netif_running(dev) && netif_carrier_ok(dev))
4237                 r8153_set_rx_early_size(tp);
4238
4239         mutex_unlock(&tp->control);
4240
4241         usb_autopm_put_interface(tp->intf);
4242
4243         return ret;
4244 }
4245
4246 static const struct net_device_ops rtl8152_netdev_ops = {
4247         .ndo_open               = rtl8152_open,
4248         .ndo_stop               = rtl8152_close,
4249         .ndo_do_ioctl           = rtl8152_ioctl,
4250         .ndo_start_xmit         = rtl8152_start_xmit,
4251         .ndo_tx_timeout         = rtl8152_tx_timeout,
4252         .ndo_set_features       = rtl8152_set_features,
4253         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
4254         .ndo_set_mac_address    = rtl8152_set_mac_address,
4255         .ndo_change_mtu         = rtl8152_change_mtu,
4256         .ndo_validate_addr      = eth_validate_addr,
4257         .ndo_features_check     = rtl8152_features_check,
4258 };
4259
4260 static void r8152b_get_version(struct r8152 *tp)
4261 {
4262         u32     ocp_data;
4263         u16     version;
4264
4265         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4266         version = (u16)(ocp_data & VERSION_MASK);
4267
4268         switch (version) {
4269         case 0x4c00:
4270                 tp->version = RTL_VER_01;
4271                 break;
4272         case 0x4c10:
4273                 tp->version = RTL_VER_02;
4274                 break;
4275         case 0x5c00:
4276                 tp->version = RTL_VER_03;
4277                 tp->mii.supports_gmii = 1;
4278                 break;
4279         case 0x5c10:
4280                 tp->version = RTL_VER_04;
4281                 tp->mii.supports_gmii = 1;
4282                 break;
4283         case 0x5c20:
4284                 tp->version = RTL_VER_05;
4285                 tp->mii.supports_gmii = 1;
4286                 break;
4287         case 0x5c30:
4288                 tp->version = RTL_VER_06;
4289                 tp->mii.supports_gmii = 1;
4290                 break;
4291         default:
4292                 netif_info(tp, probe, tp->netdev,
4293                            "Unknown version 0x%04x\n", version);
4294                 break;
4295         }
4296 }
4297
4298 static void rtl8152_unload(struct r8152 *tp)
4299 {
4300         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4301                 return;
4302
4303         if (tp->version != RTL_VER_01)
4304                 r8152_power_cut_en(tp, true);
4305 }
4306
4307 static void rtl8153_unload(struct r8152 *tp)
4308 {
4309         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4310                 return;
4311
4312         r8153_power_cut_en(tp, false);
4313 }
4314
4315 static int rtl_ops_init(struct r8152 *tp)
4316 {
4317         struct rtl_ops *ops = &tp->rtl_ops;
4318         int ret = 0;
4319
4320         switch (tp->version) {
4321         case RTL_VER_01:
4322         case RTL_VER_02:
4323                 ops->init               = r8152b_init;
4324                 ops->enable             = rtl8152_enable;
4325                 ops->disable            = rtl8152_disable;
4326                 ops->up                 = rtl8152_up;
4327                 ops->down               = rtl8152_down;
4328                 ops->unload             = rtl8152_unload;
4329                 ops->eee_get            = r8152_get_eee;
4330                 ops->eee_set            = r8152_set_eee;
4331                 ops->in_nway            = rtl8152_in_nway;
4332                 ops->hw_phy_cfg         = r8152b_hw_phy_cfg;
4333                 ops->autosuspend_en     = rtl_runtime_suspend_enable;
4334                 break;
4335
4336         case RTL_VER_03:
4337         case RTL_VER_04:
4338         case RTL_VER_05:
4339         case RTL_VER_06:
4340                 ops->init               = r8153_init;
4341                 ops->enable             = rtl8153_enable;
4342                 ops->disable            = rtl8153_disable;
4343                 ops->up                 = rtl8153_up;
4344                 ops->down               = rtl8153_down;
4345                 ops->unload             = rtl8153_unload;
4346                 ops->eee_get            = r8153_get_eee;
4347                 ops->eee_set            = r8153_set_eee;
4348                 ops->in_nway            = rtl8153_in_nway;
4349                 ops->hw_phy_cfg         = r8153_hw_phy_cfg;
4350                 ops->autosuspend_en     = rtl8153_runtime_enable;
4351                 break;
4352
4353         default:
4354                 ret = -ENODEV;
4355                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4356                 break;
4357         }
4358
4359         return ret;
4360 }
4361
4362 static int rtl8152_probe(struct usb_interface *intf,
4363                          const struct usb_device_id *id)
4364 {
4365         struct usb_device *udev = interface_to_usbdev(intf);
4366         struct r8152 *tp;
4367         struct net_device *netdev;
4368         int ret;
4369
4370         if (udev->actconfig->desc.bConfigurationValue != 1) {
4371                 usb_driver_set_configuration(udev, 1);
4372                 return -ENODEV;
4373         }
4374
4375         if (intf->cur_altsetting->desc.bNumEndpoints < 3)
4376                 return -ENODEV;
4377
4378         usb_reset_device(udev);
4379         netdev = alloc_etherdev(sizeof(struct r8152));
4380         if (!netdev) {
4381                 dev_err(&intf->dev, "Out of memory\n");
4382                 return -ENOMEM;
4383         }
4384
4385         SET_NETDEV_DEV(netdev, &intf->dev);
4386         tp = netdev_priv(netdev);
4387         tp->msg_enable = 0x7FFF;
4388
4389         tp->udev = udev;
4390         tp->netdev = netdev;
4391         tp->intf = intf;
4392
4393         r8152b_get_version(tp);
4394         ret = rtl_ops_init(tp);
4395         if (ret)
4396                 goto out;
4397
4398         mutex_init(&tp->control);
4399         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4400         INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
4401
4402         netdev->netdev_ops = &rtl8152_netdev_ops;
4403         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4404
4405         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4406                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4407                             NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4408                             NETIF_F_HW_VLAN_CTAG_TX;
4409         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4410                               NETIF_F_TSO | NETIF_F_FRAGLIST |
4411                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4412                               NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4413         netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4414                                 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4415                                 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4416
4417         if (tp->version == RTL_VER_01) {
4418                 netdev->features &= ~NETIF_F_RXCSUM;
4419                 netdev->hw_features &= ~NETIF_F_RXCSUM;
4420         }
4421
4422         netdev->ethtool_ops = &ops;
4423         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4424
4425         tp->mii.dev = netdev;
4426         tp->mii.mdio_read = read_mii_word;
4427         tp->mii.mdio_write = write_mii_word;
4428         tp->mii.phy_id_mask = 0x3f;
4429         tp->mii.reg_num_mask = 0x1f;
4430         tp->mii.phy_id = R8152_PHY_ID;
4431
4432         switch (udev->speed) {
4433         case USB_SPEED_SUPER:
4434         case USB_SPEED_SUPER_PLUS:
4435                 tp->coalesce = COALESCE_SUPER;
4436                 break;
4437         case USB_SPEED_HIGH:
4438                 tp->coalesce = COALESCE_HIGH;
4439                 break;
4440         default:
4441                 tp->coalesce = COALESCE_SLOW;
4442                 break;
4443         }
4444
4445         tp->autoneg = AUTONEG_ENABLE;
4446         tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
4447         tp->duplex = DUPLEX_FULL;
4448
4449         intf->needs_remote_wakeup = 1;
4450
4451         if (!rtl_can_wakeup(tp))
4452                 __rtl_set_wol(tp, 0);
4453         else
4454                 tp->saved_wolopts = __rtl_get_wol(tp);
4455
4456         tp->rtl_ops.init(tp);
4457         queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4458         set_ethernet_addr(tp);
4459
4460         usb_set_intfdata(intf, tp);
4461         netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4462
4463         ret = register_netdev(netdev);
4464         if (ret != 0) {
4465                 netif_err(tp, probe, netdev, "couldn't register the device\n");
4466                 goto out1;
4467         }
4468
4469         if (tp->saved_wolopts)
4470                 device_set_wakeup_enable(&udev->dev, true);
4471         else
4472                 device_set_wakeup_enable(&udev->dev, false);
4473
4474         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4475
4476         return 0;
4477
4478 out1:
4479         netif_napi_del(&tp->napi);
4480         usb_set_intfdata(intf, NULL);
4481 out:
4482         free_netdev(netdev);
4483         return ret;
4484 }
4485
4486 static void rtl8152_disconnect(struct usb_interface *intf)
4487 {
4488         struct r8152 *tp = usb_get_intfdata(intf);
4489
4490         usb_set_intfdata(intf, NULL);
4491         if (tp) {
4492                 struct usb_device *udev = tp->udev;
4493
4494                 if (udev->state == USB_STATE_NOTATTACHED)
4495                         set_bit(RTL8152_UNPLUG, &tp->flags);
4496
4497                 netif_napi_del(&tp->napi);
4498                 unregister_netdev(tp->netdev);
4499                 cancel_delayed_work_sync(&tp->hw_phy_work);
4500                 tp->rtl_ops.unload(tp);
4501                 free_netdev(tp->netdev);
4502         }
4503 }
4504
4505 #define REALTEK_USB_DEVICE(vend, prod)  \
4506         .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4507                        USB_DEVICE_ID_MATCH_INT_CLASS, \
4508         .idVendor = (vend), \
4509         .idProduct = (prod), \
4510         .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4511 }, \
4512 { \
4513         .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4514                        USB_DEVICE_ID_MATCH_DEVICE, \
4515         .idVendor = (vend), \
4516         .idProduct = (prod), \
4517         .bInterfaceClass = USB_CLASS_COMM, \
4518         .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4519         .bInterfaceProtocol = USB_CDC_PROTO_NONE
4520
4521 /* table of devices that work with this driver */
4522 static struct usb_device_id rtl8152_table[] = {
4523         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4524         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4525         {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4526         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x7205)},
4527         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x304f)},
4528         {REALTEK_USB_DEVICE(VENDOR_ID_LINKSYS, 0x0041)},
4529         {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA,  0x09ff)},
4530         {}
4531 };
4532
4533 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4534
4535 static struct usb_driver rtl8152_driver = {
4536         .name =         MODULENAME,
4537         .id_table =     rtl8152_table,
4538         .probe =        rtl8152_probe,
4539         .disconnect =   rtl8152_disconnect,
4540         .suspend =      rtl8152_suspend,
4541         .resume =       rtl8152_resume,
4542         .reset_resume = rtl8152_reset_resume,
4543         .pre_reset =    rtl8152_pre_reset,
4544         .post_reset =   rtl8152_post_reset,
4545         .supports_autosuspend = 1,
4546         .disable_hub_initiated_lpm = 1,
4547 };
4548
4549 module_usb_driver(rtl8152_driver);
4550
4551 MODULE_AUTHOR(DRIVER_AUTHOR);
4552 MODULE_DESCRIPTION(DRIVER_DESC);
4553 MODULE_LICENSE("GPL");
4554 MODULE_VERSION(DRIVER_VERSION);