drivers/net/vmxnet3/vmxnet3_drv.c

   1 /*
   2  * Linux driver for VMware's vmxnet3 ethernet NIC.
   3  *
   4  * Copyright (C) 2008-2016, VMware, Inc. All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License as published by the
   8  * Free Software Foundation; version 2 of the License and no later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  * NON INFRINGEMENT. See the GNU General Public License for more
  14  * details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * The full GNU General Public License is included in this distribution in
  21  * the file called "COPYING".
  22  *
  23  * Maintained by: pv-drivers@vmware.com
  24  *
  25  */
  26
  27 #include <linux/module.h>
  28 #include <net/ip6_checksum.h>
  29
  30 #include "vmxnet3_int.h"
  31
  32 char vmxnet3_driver_name[] = "vmxnet3";
  33 #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver"
  34
  35 /*
  36  * PCI Device ID Table
  37  * Last entry must be all 0s
  38  */
  39 static const struct pci_device_id vmxnet3_pciid_table[] = {
  40         {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)},
  41         {0}
  42 };
  43
  44 MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table);
  45
  46 static int enable_mq = 1;
  47
  48 static void
  49 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac);
  50
  51 /*
  52  *    Enable/Disable the given intr
  53  */
  54 static void
  55 vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
  56 {
  57         VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0);
  58 }
  59
  60
  61 static void
  62 vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
  63 {
  64         VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1);
  65 }
  66
  67
  68 /*
  69  *    Enable/Disable all intrs used by the device
  70  */
  71 static void
  72 vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter)
  73 {
  74         int i;
  75
  76         for (i = 0; i < adapter->intr.num_intrs; i++)
  77                 vmxnet3_enable_intr(adapter, i);
  78         adapter->shared->devRead.intrConf.intrCtrl &=
  79                                         cpu_to_le32(~VMXNET3_IC_DISABLE_ALL);
  80 }
  81
  82
  83 static void
  84 vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter)
  85 {
  86         int i;
  87
  88         adapter->shared->devRead.intrConf.intrCtrl |=
  89                                         cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
  90         for (i = 0; i < adapter->intr.num_intrs; i++)
  91                 vmxnet3_disable_intr(adapter, i);
  92 }
  93
  94
  95 static void
  96 vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events)
  97 {
  98         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events);
  99 }
 100
 101
 102 static bool
 103 vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
 104 {
 105         return tq->stopped;
 106 }
 107
 108
 109 static void
 110 vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
 111 {
 112         tq->stopped = false;
 113         netif_start_subqueue(adapter->netdev, tq - adapter->tx_queue);
 114 }
 115
 116
 117 static void
 118 vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
 119 {
 120         tq->stopped = false;
 121         netif_wake_subqueue(adapter->netdev, (tq - adapter->tx_queue));
 122 }
 123
 124
 125 static void
 126 vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
 127 {
 128         tq->stopped = true;
 129         tq->num_stop++;
 130         netif_stop_subqueue(adapter->netdev, (tq - adapter->tx_queue));
 131 }
 132
 133
 134 /*
 135  * Check the link state. This may start or stop the tx queue.
 136  */
 137 static void
 138 vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue)
 139 {
 140         u32 ret;
 141         int i;
 142         unsigned long flags;
 143
 144         spin_lock_irqsave(&adapter->cmd_lock, flags);
 145         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
 146         ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
 147         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 148
 149         adapter->link_speed = ret >> 16;
 150         if (ret & 1) { /* Link is up. */
 151                 netdev_info(adapter->netdev, "NIC Link is Up %d Mbps\n",
 152                             adapter->link_speed);
 153                 netif_carrier_on(adapter->netdev);
 154
 155                 if (affectTxQueue) {
 156                         for (i = 0; i < adapter->num_tx_queues; i++)
 157                                 vmxnet3_tq_start(&adapter->tx_queue[i],
 158                                                  adapter);
 159                 }
 160         } else {
 161                 netdev_info(adapter->netdev, "NIC Link is Down\n");
 162                 netif_carrier_off(adapter->netdev);
 163
 164                 if (affectTxQueue) {
 165                         for (i = 0; i < adapter->num_tx_queues; i++)
 166                                 vmxnet3_tq_stop(&adapter->tx_queue[i], adapter);
 167                 }
 168         }
 169 }
 170
 171 static void
 172 vmxnet3_process_events(struct vmxnet3_adapter *adapter)
 173 {
 174         int i;
 175         unsigned long flags;
 176         u32 events = le32_to_cpu(adapter->shared->ecr);
 177         if (!events)
 178                 return;
 179
 180         vmxnet3_ack_events(adapter, events);
 181
 182         /* Check if link state has changed */
 183         if (events & VMXNET3_ECR_LINK)
 184                 vmxnet3_check_link(adapter, true);
 185
 186         /* Check if there is an error on xmit/recv queues */
 187         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
 188                 spin_lock_irqsave(&adapter->cmd_lock, flags);
 189                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
 190                                        VMXNET3_CMD_GET_QUEUE_STATUS);
 191                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 192
 193                 for (i = 0; i < adapter->num_tx_queues; i++)
 194                         if (adapter->tqd_start[i].status.stopped)
 195                                 dev_err(&adapter->netdev->dev,
 196                                         "%s: tq[%d] error 0x%x\n",
 197                                         adapter->netdev->name, i, le32_to_cpu(
 198                                         adapter->tqd_start[i].status.error));
 199                 for (i = 0; i < adapter->num_rx_queues; i++)
 200                         if (adapter->rqd_start[i].status.stopped)
 201                                 dev_err(&adapter->netdev->dev,
 202                                         "%s: rq[%d] error 0x%x\n",
 203                                         adapter->netdev->name, i,
 204                                         adapter->rqd_start[i].status.error);
 205
 206                 schedule_work(&adapter->work);
 207         }
 208 }
 209
 210 #ifdef __BIG_ENDIAN_BITFIELD
 211 /*
 212  * The device expects the bitfields in shared structures to be written in
 213  * little endian. When CPU is big endian, the following routines are used to
 214  * correctly read and write into ABI.
 215  * The general technique used here is : double word bitfields are defined in
 216  * opposite order for big endian architecture. Then before reading them in
 217  * driver the complete double word is translated using le32_to_cpu. Similarly
 218  * After the driver writes into bitfields, cpu_to_le32 is used to translate the
 219  * double words into required format.
 220  * In order to avoid touching bits in shared structure more than once, temporary
 221  * descriptors are used. These are passed as srcDesc to following functions.
 222  */
 223 static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc,
 224                                 struct Vmxnet3_RxDesc *dstDesc)
 225 {
 226         u32 *src = (u32 *)srcDesc + 2;
 227         u32 *dst = (u32 *)dstDesc + 2;
 228         dstDesc->addr = le64_to_cpu(srcDesc->addr);
 229         *dst = le32_to_cpu(*src);
 230         dstDesc->ext1 = le32_to_cpu(srcDesc->ext1);
 231 }
 232
 233 static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc,
 234                                struct Vmxnet3_TxDesc *dstDesc)
 235 {
 236         int i;
 237         u32 *src = (u32 *)(srcDesc + 1);
 238         u32 *dst = (u32 *)(dstDesc + 1);
 239
 240         /* Working backwards so that the gen bit is set at the end. */
 241         for (i = 2; i > 0; i--) {
 242                 src--;
 243                 dst--;
 244                 *dst = cpu_to_le32(*src);
 245         }
 246 }
 247
 248
 249 static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc,
 250                                 struct Vmxnet3_RxCompDesc *dstDesc)
 251 {
 252         int i = 0;
 253         u32 *src = (u32 *)srcDesc;
 254         u32 *dst = (u32 *)dstDesc;
 255         for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) {
 256                 *dst = le32_to_cpu(*src);
 257                 src++;
 258                 dst++;
 259         }
 260 }
 261
 262
 263 /* Used to read bitfield values from double words. */
 264 static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size)
 265 {
 266         u32 temp = le32_to_cpu(*bitfield);
 267         u32 mask = ((1 << size) - 1) << pos;
 268         temp &= mask;
 269         temp >>= pos;
 270         return temp;
 271 }
 272
 273
 274
 275 #endif  /* __BIG_ENDIAN_BITFIELD */
 276
 277 #ifdef __BIG_ENDIAN_BITFIELD
 278
 279 #   define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \
 280                         txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \
 281                         VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE)
 282 #   define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \
 283                         txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \
 284                         VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE)
 285 #   define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \
 286                         VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \
 287                         VMXNET3_TCD_GEN_SIZE)
 288 #   define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \
 289                         VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE)
 290 #   define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \
 291                         (dstrcd) = (tmp); \
 292                         vmxnet3_RxCompToCPU((rcd), (tmp)); \
 293                 } while (0)
 294 #   define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \
 295                         (dstrxd) = (tmp); \
 296                         vmxnet3_RxDescToCPU((rxd), (tmp)); \
 297                 } while (0)
 298
 299 #else
 300
 301 #   define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen)
 302 #   define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop)
 303 #   define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen)
 304 #   define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx)
 305 #   define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd)
 306 #   define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd)
 307
 308 #endif /* __BIG_ENDIAN_BITFIELD  */
 309
 310
 311 static void
 312 vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi,
 313                      struct pci_dev *pdev)
 314 {
 315         if (tbi->map_type == VMXNET3_MAP_SINGLE)
 316                 dma_unmap_single(&pdev->dev, tbi->dma_addr, tbi->len,
 317                                  PCI_DMA_TODEVICE);
 318         else if (tbi->map_type == VMXNET3_MAP_PAGE)
 319                 dma_unmap_page(&pdev->dev, tbi->dma_addr, tbi->len,
 320                                PCI_DMA_TODEVICE);
 321         else
 322                 BUG_ON(tbi->map_type != VMXNET3_MAP_NONE);
 323
 324         tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */
 325 }
 326
 327
 328 static int
 329 vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq,
 330                   struct pci_dev *pdev, struct vmxnet3_adapter *adapter)
 331 {
 332         struct sk_buff *skb;
 333         int entries = 0;
 334
 335         /* no out of order completion */
 336         BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp);
 337         BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1);
 338
 339         skb = tq->buf_info[eop_idx].skb;
 340         BUG_ON(skb == NULL);
 341         tq->buf_info[eop_idx].skb = NULL;
 342
 343         VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size);
 344
 345         while (tq->tx_ring.next2comp != eop_idx) {
 346                 vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp,
 347                                      pdev);
 348
 349                 /* update next2comp w/o tx_lock. Since we are marking more,
 350                  * instead of less, tx ring entries avail, the worst case is
 351                  * that the tx routine incorrectly re-queues a pkt due to
 352                  * insufficient tx ring entries.
 353                  */
 354                 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
 355                 entries++;
 356         }
 357
 358         dev_kfree_skb_any(skb);
 359         return entries;
 360 }
 361
 362
 363 static int
 364 vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq,
 365                         struct vmxnet3_adapter *adapter)
 366 {
 367         int completed = 0;
 368         union Vmxnet3_GenericDesc *gdesc;
 369
 370         gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
 371         while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) {
 372                 /* Prevent any &gdesc->tcd field from being (speculatively)
 373                  * read before (&gdesc->tcd)->gen is read.
 374                  */
 375                 dma_rmb();
 376
 377                 completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX(
 378                                                &gdesc->tcd), tq, adapter->pdev,
 379                                                adapter);
 380
 381                 vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring);
 382                 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
 383         }
 384
 385         if (completed) {
 386                 spin_lock(&tq->tx_lock);
 387                 if (unlikely(vmxnet3_tq_stopped(tq, adapter) &&
 388                              vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) >
 389                              VMXNET3_WAKE_QUEUE_THRESHOLD(tq) &&
 390                              netif_carrier_ok(adapter->netdev))) {
 391                         vmxnet3_tq_wake(tq, adapter);
 392                 }
 393                 spin_unlock(&tq->tx_lock);
 394         }
 395         return completed;
 396 }
 397
 398
 399 static void
 400 vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq,
 401                    struct vmxnet3_adapter *adapter)
 402 {
 403         int i;
 404
 405         while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) {
 406                 struct vmxnet3_tx_buf_info *tbi;
 407
 408                 tbi = tq->buf_info + tq->tx_ring.next2comp;
 409
 410                 vmxnet3_unmap_tx_buf(tbi, adapter->pdev);
 411                 if (tbi->skb) {
 412                         dev_kfree_skb_any(tbi->skb);
 413                         tbi->skb = NULL;
 414                 }
 415                 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
 416         }
 417
 418         /* sanity check, verify all buffers are indeed unmapped and freed */
 419         for (i = 0; i < tq->tx_ring.size; i++) {
 420                 BUG_ON(tq->buf_info[i].skb != NULL ||
 421                        tq->buf_info[i].map_type != VMXNET3_MAP_NONE);
 422         }
 423
 424         tq->tx_ring.gen = VMXNET3_INIT_GEN;
 425         tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
 426
 427         tq->comp_ring.gen = VMXNET3_INIT_GEN;
 428         tq->comp_ring.next2proc = 0;
 429 }
 430
 431
 432 static void
 433 vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq,
 434                    struct vmxnet3_adapter *adapter)
 435 {
 436         if (tq->tx_ring.base) {
 437                 dma_free_coherent(&adapter->pdev->dev, tq->tx_ring.size *
 438                                   sizeof(struct Vmxnet3_TxDesc),
 439                                   tq->tx_ring.base, tq->tx_ring.basePA);
 440                 tq->tx_ring.base = NULL;
 441         }
 442         if (tq->data_ring.base) {
 443                 dma_free_coherent(&adapter->pdev->dev,
 444                                   tq->data_ring.size * tq->txdata_desc_size,
 445                                   tq->data_ring.base, tq->data_ring.basePA);
 446                 tq->data_ring.base = NULL;
 447         }
 448         if (tq->comp_ring.base) {
 449                 dma_free_coherent(&adapter->pdev->dev, tq->comp_ring.size *
 450                                   sizeof(struct Vmxnet3_TxCompDesc),
 451                                   tq->comp_ring.base, tq->comp_ring.basePA);
 452                 tq->comp_ring.base = NULL;
 453         }
 454         if (tq->buf_info) {
 455                 dma_free_coherent(&adapter->pdev->dev,
 456                                   tq->tx_ring.size * sizeof(tq->buf_info[0]),
 457                                   tq->buf_info, tq->buf_info_pa);
 458                 tq->buf_info = NULL;
 459         }
 460 }
 461
 462
 463 /* Destroy all tx queues */
 464 void
 465 vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter)
 466 {
 467         int i;
 468
 469         for (i = 0; i < adapter->num_tx_queues; i++)
 470                 vmxnet3_tq_destroy(&adapter->tx_queue[i], adapter);
 471 }
 472
 473
 474 static void
 475 vmxnet3_tq_init(struct vmxnet3_tx_queue *tq,
 476                 struct vmxnet3_adapter *adapter)
 477 {
 478         int i;
 479
 480         /* reset the tx ring contents to 0 and reset the tx ring states */
 481         memset(tq->tx_ring.base, 0, tq->tx_ring.size *
 482                sizeof(struct Vmxnet3_TxDesc));
 483         tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
 484         tq->tx_ring.gen = VMXNET3_INIT_GEN;
 485
 486         memset(tq->data_ring.base, 0,
 487                tq->data_ring.size * tq->txdata_desc_size);
 488
 489         /* reset the tx comp ring contents to 0 and reset comp ring states */
 490         memset(tq->comp_ring.base, 0, tq->comp_ring.size *
 491                sizeof(struct Vmxnet3_TxCompDesc));
 492         tq->comp_ring.next2proc = 0;
 493         tq->comp_ring.gen = VMXNET3_INIT_GEN;
 494
 495         /* reset the bookkeeping data */
 496         memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size);
 497         for (i = 0; i < tq->tx_ring.size; i++)
 498                 tq->buf_info[i].map_type = VMXNET3_MAP_NONE;
 499
 500         /* stats are not reset */
 501 }
 502
 503
 504 static int
 505 vmxnet3_tq_create(struct vmxnet3_tx_queue *tq,
 506                   struct vmxnet3_adapter *adapter)
 507 {
 508         size_t sz;
 509
 510         BUG_ON(tq->tx_ring.base || tq->data_ring.base ||
 511                tq->comp_ring.base || tq->buf_info);
 512
 513         tq->tx_ring.base = dma_alloc_coherent(&adapter->pdev->dev,
 514                         tq->tx_ring.size * sizeof(struct Vmxnet3_TxDesc),
 515                         &tq->tx_ring.basePA, GFP_KERNEL);
 516         if (!tq->tx_ring.base) {
 517                 netdev_err(adapter->netdev, "failed to allocate tx ring\n");
 518                 goto err;
 519         }
 520
 521         tq->data_ring.base = dma_alloc_coherent(&adapter->pdev->dev,
 522                         tq->data_ring.size * tq->txdata_desc_size,
 523                         &tq->data_ring.basePA, GFP_KERNEL);
 524         if (!tq->data_ring.base) {
 525                 netdev_err(adapter->netdev, "failed to allocate tx data ring\n");
 526                 goto err;
 527         }
 528
 529         tq->comp_ring.base = dma_alloc_coherent(&adapter->pdev->dev,
 530                         tq->comp_ring.size * sizeof(struct Vmxnet3_TxCompDesc),
 531                         &tq->comp_ring.basePA, GFP_KERNEL);
 532         if (!tq->comp_ring.base) {
 533                 netdev_err(adapter->netdev, "failed to allocate tx comp ring\n");
 534                 goto err;
 535         }
 536
 537         sz = tq->tx_ring.size * sizeof(tq->buf_info[0]);
 538         tq->buf_info = dma_zalloc_coherent(&adapter->pdev->dev, sz,
 539                                            &tq->buf_info_pa, GFP_KERNEL);
 540         if (!tq->buf_info)
 541                 goto err;
 542
 543         return 0;
 544
 545 err:
 546         vmxnet3_tq_destroy(tq, adapter);
 547         return -ENOMEM;
 548 }
 549
 550 static void
 551 vmxnet3_tq_cleanup_all(struct vmxnet3_adapter *adapter)
 552 {
 553         int i;
 554
 555         for (i = 0; i < adapter->num_tx_queues; i++)
 556                 vmxnet3_tq_cleanup(&adapter->tx_queue[i], adapter);
 557 }
 558
 559 /*
 560  *    starting from ring->next2fill, allocate rx buffers for the given ring
 561  *    of the rx queue and update the rx desc. stop after @num_to_alloc buffers
 562  *    are allocated or allocation fails
 563  */
 564
 565 static int
 566 vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx,
 567                         int num_to_alloc, struct vmxnet3_adapter *adapter)
 568 {
 569         int num_allocated = 0;
 570         struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx];
 571         struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx];
 572         u32 val;
 573
 574         while (num_allocated <= num_to_alloc) {
 575                 struct vmxnet3_rx_buf_info *rbi;
 576                 union Vmxnet3_GenericDesc *gd;
 577
 578                 rbi = rbi_base + ring->next2fill;
 579                 gd = ring->base + ring->next2fill;
 580
 581                 if (rbi->buf_type == VMXNET3_RX_BUF_SKB) {
 582                         if (rbi->skb == NULL) {
 583                                 rbi->skb = __netdev_alloc_skb_ip_align(adapter->netdev,
 584                                                                        rbi->len,
 585                                                                        GFP_KERNEL);
 586                                 if (unlikely(rbi->skb == NULL)) {
 587                                         rq->stats.rx_buf_alloc_failure++;
 588                                         break;
 589                                 }
 590
 591                                 rbi->dma_addr = dma_map_single(
 592                                                 &adapter->pdev->dev,
 593                                                 rbi->skb->data, rbi->len,
 594                                                 PCI_DMA_FROMDEVICE);
 595                                 if (dma_mapping_error(&adapter->pdev->dev,
 596                                                       rbi->dma_addr)) {
 597                                         dev_kfree_skb_any(rbi->skb);
 598                                         rbi->skb = NULL;
 599                                         rq->stats.rx_buf_alloc_failure++;
 600                                         break;
 601                                 }
 602                         } else {
 603                                 /* rx buffer skipped by the device */
 604                         }
 605                         val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT;
 606                 } else {
 607                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE ||
 608                                rbi->len  != PAGE_SIZE);
 609
 610                         if (rbi->page == NULL) {
 611                                 rbi->page = alloc_page(GFP_ATOMIC);
 612                                 if (unlikely(rbi->page == NULL)) {
 613                                         rq->stats.rx_buf_alloc_failure++;
 614                                         break;
 615                                 }
 616                                 rbi->dma_addr = dma_map_page(
 617                                                 &adapter->pdev->dev,
 618                                                 rbi->page, 0, PAGE_SIZE,
 619                                                 PCI_DMA_FROMDEVICE);
 620                                 if (dma_mapping_error(&adapter->pdev->dev,
 621                                                       rbi->dma_addr)) {
 622                                         put_page(rbi->page);
 623                                         rbi->page = NULL;
 624                                         rq->stats.rx_buf_alloc_failure++;
 625                                         break;
 626                                 }
 627                         } else {
 628                                 /* rx buffers skipped by the device */
 629                         }
 630                         val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT;
 631                 }
 632
 633                 gd->rxd.addr = cpu_to_le64(rbi->dma_addr);
 634                 gd->dword[2] = cpu_to_le32((!ring->gen << VMXNET3_RXD_GEN_SHIFT)
 635                                            | val | rbi->len);
 636
 637                 /* Fill the last buffer but dont mark it ready, or else the
 638                  * device will think that the queue is full */
 639                 if (num_allocated == num_to_alloc)
 640                         break;
 641
 642                 gd->dword[2] |= cpu_to_le32(ring->gen << VMXNET3_RXD_GEN_SHIFT);
 643                 num_allocated++;
 644                 vmxnet3_cmd_ring_adv_next2fill(ring);
 645         }
 646
 647         netdev_dbg(adapter->netdev,
 648                 "alloc_rx_buf: %d allocated, next2fill %u, next2comp %u\n",
 649                 num_allocated, ring->next2fill, ring->next2comp);
 650
 651         /* so that the device can distinguish a full ring and an empty ring */
 652         BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp);
 653
 654         return num_allocated;
 655 }
 656
 657
 658 static void
 659 vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd,
 660                     struct vmxnet3_rx_buf_info *rbi)
 661 {
 662         struct skb_frag_struct *frag = skb_shinfo(skb)->frags +
 663                 skb_shinfo(skb)->nr_frags;
 664
 665         BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS);
 666
 667         __skb_frag_set_page(frag, rbi->page);
 668         frag->page_offset = 0;
 669         skb_frag_size_set(frag, rcd->len);
 670         skb->data_len += rcd->len;
 671         skb->truesize += PAGE_SIZE;
 672         skb_shinfo(skb)->nr_frags++;
 673 }
 674
 675
 676 static int
 677 vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx,
 678                 struct vmxnet3_tx_queue *tq, struct pci_dev *pdev,
 679                 struct vmxnet3_adapter *adapter)
 680 {
 681         u32 dw2, len;
 682         unsigned long buf_offset;
 683         int i;
 684         union Vmxnet3_GenericDesc *gdesc;
 685         struct vmxnet3_tx_buf_info *tbi = NULL;
 686
 687         BUG_ON(ctx->copy_size > skb_headlen(skb));
 688
 689         /* use the previous gen bit for the SOP desc */
 690         dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT;
 691
 692         ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill;
 693         gdesc = ctx->sop_txd; /* both loops below can be skipped */
 694
 695         /* no need to map the buffer if headers are copied */
 696         if (ctx->copy_size) {
 697                 ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA +
 698                                         tq->tx_ring.next2fill *
 699                                         tq->txdata_desc_size);
 700                 ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size);
 701                 ctx->sop_txd->dword[3] = 0;
 702
 703                 tbi = tq->buf_info + tq->tx_ring.next2fill;
 704                 tbi->map_type = VMXNET3_MAP_NONE;
 705
 706                 netdev_dbg(adapter->netdev,
 707                         "txd[%u]: 0x%Lx 0x%x 0x%x\n",
 708                         tq->tx_ring.next2fill,
 709                         le64_to_cpu(ctx->sop_txd->txd.addr),
 710                         ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]);
 711                 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
 712
 713                 /* use the right gen for non-SOP desc */
 714                 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
 715         }
 716
 717         /* linear part can use multiple tx desc if it's big */
 718         len = skb_headlen(skb) - ctx->copy_size;
 719         buf_offset = ctx->copy_size;
 720         while (len) {
 721                 u32 buf_size;
 722
 723                 if (len < VMXNET3_MAX_TX_BUF_SIZE) {
 724                         buf_size = len;
 725                         dw2 |= len;
 726                 } else {
 727                         buf_size = VMXNET3_MAX_TX_BUF_SIZE;
 728                         /* spec says that for TxDesc.len, 0 == 2^14 */
 729                 }
 730
 731                 tbi = tq->buf_info + tq->tx_ring.next2fill;
 732                 tbi->map_type = VMXNET3_MAP_SINGLE;
 733                 tbi->dma_addr = dma_map_single(&adapter->pdev->dev,
 734                                 skb->data + buf_offset, buf_size,
 735                                 PCI_DMA_TODEVICE);
 736                 if (dma_mapping_error(&adapter->pdev->dev, tbi->dma_addr))
 737                         return -EFAULT;
 738
 739                 tbi->len = buf_size;
 740
 741                 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
 742                 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
 743
 744                 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
 745                 gdesc->dword[2] = cpu_to_le32(dw2);
 746                 gdesc->dword[3] = 0;
 747
 748                 netdev_dbg(adapter->netdev,
 749                         "txd[%u]: 0x%Lx 0x%x 0x%x\n",
 750                         tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
 751                         le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
 752                 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
 753                 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
 754
 755                 len -= buf_size;
 756                 buf_offset += buf_size;
 757         }
 758
 759         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
 760                 const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
 761                 u32 buf_size;
 762
 763                 buf_offset = 0;
 764                 len = skb_frag_size(frag);
 765                 while (len) {
 766                         tbi = tq->buf_info + tq->tx_ring.next2fill;
 767                         if (len < VMXNET3_MAX_TX_BUF_SIZE) {
 768                                 buf_size = len;
 769                                 dw2 |= len;
 770                         } else {
 771                                 buf_size = VMXNET3_MAX_TX_BUF_SIZE;
 772                                 /* spec says that for TxDesc.len, 0 == 2^14 */
 773                         }
 774                         tbi->map_type = VMXNET3_MAP_PAGE;
 775                         tbi->dma_addr = skb_frag_dma_map(&adapter->pdev->dev, frag,
 776                                                          buf_offset, buf_size,
 777                                                          DMA_TO_DEVICE);
 778                         if (dma_mapping_error(&adapter->pdev->dev, tbi->dma_addr))
 779                                 return -EFAULT;
 780
 781                         tbi->len = buf_size;
 782
 783                         gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
 784                         BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
 785
 786                         gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
 787                         gdesc->dword[2] = cpu_to_le32(dw2);
 788                         gdesc->dword[3] = 0;
 789
 790                         netdev_dbg(adapter->netdev,
 791                                 "txd[%u]: 0x%llx %u %u\n",
 792                                 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
 793                                 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
 794                         vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
 795                         dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
 796
 797                         len -= buf_size;
 798                         buf_offset += buf_size;
 799                 }
 800         }
 801
 802         ctx->eop_txd = gdesc;
 803
 804         /* set the last buf_info for the pkt */
 805         tbi->skb = skb;
 806         tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base;
 807
 808         return 0;
 809 }
 810
 811
 812 /* Init all tx queues */
 813 static void
 814 vmxnet3_tq_init_all(struct vmxnet3_adapter *adapter)
 815 {
 816         int i;
 817
 818         for (i = 0; i < adapter->num_tx_queues; i++)
 819                 vmxnet3_tq_init(&adapter->tx_queue[i], adapter);
 820 }
 821
 822
 823 /*
 824  *    parse relevant protocol headers:
 825  *      For a tso pkt, relevant headers are L2/3/4 including options
 826  *      For a pkt requesting csum offloading, they are L2/3 and may include L4
 827  *      if it's a TCP/UDP pkt
 828  *
 829  * Returns:
 830  *    -1:  error happens during parsing
 831  *     0:  protocol headers parsed, but too big to be copied
 832  *     1:  protocol headers parsed and copied
 833  *
 834  * Other effects:
 835  *    1. related *ctx fields are updated.
 836  *    2. ctx->copy_size is # of bytes copied
 837  *    3. the portion to be copied is guaranteed to be in the linear part
 838  *
 839  */
 840 static int
 841 vmxnet3_parse_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
 842                   struct vmxnet3_tx_ctx *ctx,
 843                   struct vmxnet3_adapter *adapter)
 844 {
 845         u8 protocol = 0;
 846
 847         if (ctx->mss) { /* TSO */
 848                 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
 849                 ctx->l4_hdr_size = tcp_hdrlen(skb);
 850                 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size;
 851         } else {
 852                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
 853                         ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb);
 854
 855                         if (ctx->ipv4) {
 856                                 const struct iphdr *iph = ip_hdr(skb);
 857
 858                                 protocol = iph->protocol;
 859                         } else if (ctx->ipv6) {
 860                                 const struct ipv6hdr *ipv6h = ipv6_hdr(skb);
 861
 862                                 protocol = ipv6h->nexthdr;
 863                         }
 864
 865                         switch (protocol) {
 866                         case IPPROTO_TCP:
 867                                 ctx->l4_hdr_size = tcp_hdrlen(skb);
 868                                 break;
 869                         case IPPROTO_UDP:
 870                                 ctx->l4_hdr_size = sizeof(struct udphdr);
 871                                 break;
 872                         default:
 873                                 ctx->l4_hdr_size = 0;
 874                                 break;
 875                         }
 876
 877                         ctx->copy_size = min(ctx->eth_ip_hdr_size +
 878                                          ctx->l4_hdr_size, skb->len);
 879                 } else {
 880                         ctx->eth_ip_hdr_size = 0;
 881                         ctx->l4_hdr_size = 0;
 882                         /* copy as much as allowed */
 883                         ctx->copy_size = min_t(unsigned int,
 884                                                tq->txdata_desc_size,
 885                                                skb_headlen(skb));
 886                 }
 887
 888                 if (skb->len <= VMXNET3_HDR_COPY_SIZE)
 889                         ctx->copy_size = skb->len;
 890
 891                 /* make sure headers are accessible directly */
 892                 if (unlikely(!pskb_may_pull(skb, ctx->copy_size)))
 893                         goto err;
 894         }
 895
 896         if (unlikely(ctx->copy_size > tq->txdata_desc_size)) {
 897                 tq->stats.oversized_hdr++;
 898                 ctx->copy_size = 0;
 899                 return 0;
 900         }
 901
 902         return 1;
 903 err:
 904         return -1;
 905 }
 906
 907 /*
 908  *    copy relevant protocol headers to the transmit ring:
 909  *      For a tso pkt, relevant headers are L2/3/4 including options
 910  *      For a pkt requesting csum offloading, they are L2/3 and may include L4
 911  *      if it's a TCP/UDP pkt
 912  *
 913  *
 914  *    Note that this requires that vmxnet3_parse_hdr be called first to set the
 915  *      appropriate bits in ctx first
 916  */
 917 static void
 918 vmxnet3_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
 919                  struct vmxnet3_tx_ctx *ctx,
 920                  struct vmxnet3_adapter *adapter)
 921 {
 922         struct Vmxnet3_TxDataDesc *tdd;
 923
 924         tdd = (struct Vmxnet3_TxDataDesc *)((u8 *)tq->data_ring.base +
 925                                             tq->tx_ring.next2fill *
 926                                             tq->txdata_desc_size);
 927
 928         memcpy(tdd->data, skb->data, ctx->copy_size);
 929         netdev_dbg(adapter->netdev,
 930                 "copy %u bytes to dataRing[%u]\n",
 931                 ctx->copy_size, tq->tx_ring.next2fill);
 932 }
 933
 934
 935 static void
 936 vmxnet3_prepare_tso(struct sk_buff *skb,
 937                     struct vmxnet3_tx_ctx *ctx)
 938 {
 939         struct tcphdr *tcph = tcp_hdr(skb);
 940
 941         if (ctx->ipv4) {
 942                 struct iphdr *iph = ip_hdr(skb);
 943
 944                 iph->check = 0;
 945                 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0,
 946                                                  IPPROTO_TCP, 0);
 947         } else if (ctx->ipv6) {
 948                 struct ipv6hdr *iph = ipv6_hdr(skb);
 949
 950                 tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0,
 951                                                IPPROTO_TCP, 0);
 952         }
 953 }
 954
 955 static int txd_estimate(const struct sk_buff *skb)
 956 {
 957         int count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
 958         int i;
 959
 960         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
 961                 const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
 962
 963                 count += VMXNET3_TXD_NEEDED(skb_frag_size(frag));
 964         }
 965         return count;
 966 }
 967
 968 /*
 969  * Transmits a pkt thru a given tq
 970  * Returns:
 971  *    NETDEV_TX_OK:      descriptors are setup successfully
 972  *    NETDEV_TX_OK:      error occurred, the pkt is dropped
 973  *    NETDEV_TX_BUSY:    tx ring is full, queue is stopped
 974  *
 975  * Side-effects:
 976  *    1. tx ring may be changed
 977  *    2. tq stats may be updated accordingly
 978  *    3. shared->txNumDeferred may be updated
 979  */
 980
 981 static int
 982 vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
 983                 struct vmxnet3_adapter *adapter, struct net_device *netdev)
 984 {
 985         int ret;
 986         u32 count;
 987         int num_pkts;
 988         int tx_num_deferred;
 989         unsigned long flags;
 990         struct vmxnet3_tx_ctx ctx;
 991         union Vmxnet3_GenericDesc *gdesc;
 992 #ifdef __BIG_ENDIAN_BITFIELD
 993         /* Use temporary descriptor to avoid touching bits multiple times */
 994         union Vmxnet3_GenericDesc tempTxDesc;
 995 #endif
 996
 997         count = txd_estimate(skb);
 998
 999         ctx.ipv4 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IP));
1000         ctx.ipv6 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IPV6));
1001
1002         ctx.mss = skb_shinfo(skb)->gso_size;
1003         if (ctx.mss) {
1004                 if (skb_header_cloned(skb)) {
1005                         if (unlikely(pskb_expand_head(skb, 0, 0,
1006                                                       GFP_ATOMIC) != 0)) {
1007                                 tq->stats.drop_tso++;
1008                                 goto drop_pkt;
1009                         }
1010                         tq->stats.copy_skb_header++;
1011                 }
1012                 vmxnet3_prepare_tso(skb, &ctx);
1013         } else {
1014                 if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) {
1015
1016                         /* non-tso pkts must not use more than
1017                          * VMXNET3_MAX_TXD_PER_PKT entries
1018                          */
1019                         if (skb_linearize(skb) != 0) {
1020                                 tq->stats.drop_too_many_frags++;
1021                                 goto drop_pkt;
1022                         }
1023                         tq->stats.linearized++;
1024
1025                         /* recalculate the # of descriptors to use */
1026                         count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
1027                 }
1028         }
1029
1030         ret = vmxnet3_parse_hdr(skb, tq, &ctx, adapter);
1031         if (ret >= 0) {
1032                 BUG_ON(ret <= 0 && ctx.copy_size != 0);
1033                 /* hdrs parsed, check against other limits */
1034                 if (ctx.mss) {
1035                         if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size >
1036                                      VMXNET3_MAX_TX_BUF_SIZE)) {
1037                                 tq->stats.drop_oversized_hdr++;
1038                                 goto drop_pkt;
1039                         }
1040                 } else {
1041                         if (skb->ip_summed == CHECKSUM_PARTIAL) {
1042                                 if (unlikely(ctx.eth_ip_hdr_size +
1043                                              skb->csum_offset >
1044                                              VMXNET3_MAX_CSUM_OFFSET)) {
1045                                         tq->stats.drop_oversized_hdr++;
1046                                         goto drop_pkt;
1047                                 }
1048                         }
1049                 }
1050         } else {
1051                 tq->stats.drop_hdr_inspect_err++;
1052                 goto drop_pkt;
1053         }
1054
1055         spin_lock_irqsave(&tq->tx_lock, flags);
1056
1057         if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) {
1058                 tq->stats.tx_ring_full++;
1059                 netdev_dbg(adapter->netdev,
1060                         "tx queue stopped on %s, next2comp %u"
1061                         " next2fill %u\n", adapter->netdev->name,
1062                         tq->tx_ring.next2comp, tq->tx_ring.next2fill);
1063
1064                 vmxnet3_tq_stop(tq, adapter);
1065                 spin_unlock_irqrestore(&tq->tx_lock, flags);
1066                 return NETDEV_TX_BUSY;
1067         }
1068
1069
1070         vmxnet3_copy_hdr(skb, tq, &ctx, adapter);
1071
1072         /* fill tx descs related to addr & len */
1073         if (vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter))
1074                 goto unlock_drop_pkt;
1075
1076         /* setup the EOP desc */
1077         ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP);
1078
1079         /* setup the SOP desc */
1080 #ifdef __BIG_ENDIAN_BITFIELD
1081         gdesc = &tempTxDesc;
1082         gdesc->dword[2] = ctx.sop_txd->dword[2];
1083         gdesc->dword[3] = ctx.sop_txd->dword[3];
1084 #else
1085         gdesc = ctx.sop_txd;
1086 #endif
1087         tx_num_deferred = le32_to_cpu(tq->shared->txNumDeferred);
1088         if (ctx.mss) {
1089                 gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size;
1090                 gdesc->txd.om = VMXNET3_OM_TSO;
1091                 gdesc->txd.msscof = ctx.mss;
1092                 num_pkts = (skb->len - gdesc->txd.hlen + ctx.mss - 1) / ctx.mss;
1093         } else {
1094                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1095                         gdesc->txd.hlen = ctx.eth_ip_hdr_size;
1096                         gdesc->txd.om = VMXNET3_OM_CSUM;
1097                         gdesc->txd.msscof = ctx.eth_ip_hdr_size +
1098                                             skb->csum_offset;
1099                 } else {
1100                         gdesc->txd.om = 0;
1101                         gdesc->txd.msscof = 0;
1102                 }
1103                 num_pkts = 1;
1104         }
1105         le32_add_cpu(&tq->shared->txNumDeferred, num_pkts);
1106         tx_num_deferred += num_pkts;
1107
1108         if (skb_vlan_tag_present(skb)) {
1109                 gdesc->txd.ti = 1;
1110                 gdesc->txd.tci = skb_vlan_tag_get(skb);
1111         }
1112
1113         /* Ensure that the write to (&gdesc->txd)->gen will be observed after
1114          * all other writes to &gdesc->txd.
1115          */
1116         dma_wmb();
1117
1118         /* finally flips the GEN bit of the SOP desc. */
1119         gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^
1120                                                   VMXNET3_TXD_GEN);
1121 #ifdef __BIG_ENDIAN_BITFIELD
1122         /* Finished updating in bitfields of Tx Desc, so write them in original
1123          * place.
1124          */
1125         vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc,
1126                            (struct Vmxnet3_TxDesc *)ctx.sop_txd);
1127         gdesc = ctx.sop_txd;
1128 #endif
1129         netdev_dbg(adapter->netdev,
1130                 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n",
1131                 (u32)(ctx.sop_txd -
1132                 tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr),
1133                 le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3]));
1134
1135         spin_unlock_irqrestore(&tq->tx_lock, flags);
1136
1137         if (tx_num_deferred >= le32_to_cpu(tq->shared->txThreshold)) {
1138                 tq->shared->txNumDeferred = 0;
1139                 VMXNET3_WRITE_BAR0_REG(adapter,
1140                                        VMXNET3_REG_TXPROD + tq->qid * 8,
1141                                        tq->tx_ring.next2fill);
1142         }
1143
1144         return NETDEV_TX_OK;
1145
1146 unlock_drop_pkt:
1147         spin_unlock_irqrestore(&tq->tx_lock, flags);
1148 drop_pkt:
1149         tq->stats.drop_total++;
1150         dev_kfree_skb_any(skb);
1151         return NETDEV_TX_OK;
1152 }
1153
1154
1155 static netdev_tx_t
1156 vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1157 {
1158         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1159
1160         BUG_ON(skb->queue_mapping > adapter->num_tx_queues);
1161         return vmxnet3_tq_xmit(skb,
1162                                &adapter->tx_queue[skb->queue_mapping],
1163                                adapter, netdev);
1164 }
1165
1166
1167 static void
1168 vmxnet3_rx_csum(struct vmxnet3_adapter *adapter,
1169                 struct sk_buff *skb,
1170                 union Vmxnet3_GenericDesc *gdesc)
1171 {
1172         if (!gdesc->rcd.cnc && adapter->netdev->features & NETIF_F_RXCSUM) {
1173                 if (gdesc->rcd.v4 &&
1174                     (le32_to_cpu(gdesc->dword[3]) &
1175                      VMXNET3_RCD_CSUM_OK) == VMXNET3_RCD_CSUM_OK) {
1176                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1177                         BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp));
1178                         BUG_ON(gdesc->rcd.frg);
1179                 } else if (gdesc->rcd.v6 && (le32_to_cpu(gdesc->dword[3]) &
1180                                              (1 << VMXNET3_RCD_TUC_SHIFT))) {
1181                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1182                         BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp));
1183                         BUG_ON(gdesc->rcd.frg);
1184                 } else {
1185                         if (gdesc->rcd.csum) {
1186                                 skb->csum = htons(gdesc->rcd.csum);
1187                                 skb->ip_summed = CHECKSUM_PARTIAL;
1188                         } else {
1189                                 skb_checksum_none_assert(skb);
1190                         }
1191                 }
1192         } else {
1193                 skb_checksum_none_assert(skb);
1194         }
1195 }
1196
1197
1198 static void
1199 vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd,
1200                  struct vmxnet3_rx_ctx *ctx,  struct vmxnet3_adapter *adapter)
1201 {
1202         rq->stats.drop_err++;
1203         if (!rcd->fcs)
1204                 rq->stats.drop_fcs++;
1205
1206         rq->stats.drop_total++;
1207
1208         /*
1209          * We do not unmap and chain the rx buffer to the skb.
1210          * We basically pretend this buffer is not used and will be recycled
1211          * by vmxnet3_rq_alloc_rx_buf()
1212          */
1213
1214         /*
1215          * ctx->skb may be NULL if this is the first and the only one
1216          * desc for the pkt
1217          */
1218         if (ctx->skb)
1219                 dev_kfree_skb_irq(ctx->skb);
1220
1221         ctx->skb = NULL;
1222 }
1223
1224
1225 static u32
1226 vmxnet3_get_hdr_len(struct vmxnet3_adapter *adapter, struct sk_buff *skb,
1227                     union Vmxnet3_GenericDesc *gdesc)
1228 {
1229         u32 hlen, maplen;
1230         union {
1231                 void *ptr;
1232                 struct ethhdr *eth;
1233                 struct vlan_ethhdr *veth;
1234                 struct iphdr *ipv4;
1235                 struct ipv6hdr *ipv6;
1236                 struct tcphdr *tcp;
1237         } hdr;
1238         BUG_ON(gdesc->rcd.tcp == 0);
1239
1240         maplen = skb_headlen(skb);
1241         if (unlikely(sizeof(struct iphdr) + sizeof(struct tcphdr) > maplen))
1242                 return 0;
1243
1244         if (skb->protocol == cpu_to_be16(ETH_P_8021Q) ||
1245             skb->protocol == cpu_to_be16(ETH_P_8021AD))
1246                 hlen = sizeof(struct vlan_ethhdr);
1247         else
1248                 hlen = sizeof(struct ethhdr);
1249
1250         hdr.eth = eth_hdr(skb);
1251         if (gdesc->rcd.v4) {
1252                 BUG_ON(hdr.eth->h_proto != htons(ETH_P_IP) &&
1253                        hdr.veth->h_vlan_encapsulated_proto != htons(ETH_P_IP));
1254                 hdr.ptr += hlen;
1255                 BUG_ON(hdr.ipv4->protocol != IPPROTO_TCP);
1256                 hlen = hdr.ipv4->ihl << 2;
1257                 hdr.ptr += hdr.ipv4->ihl << 2;
1258         } else if (gdesc->rcd.v6) {
1259                 BUG_ON(hdr.eth->h_proto != htons(ETH_P_IPV6) &&
1260                        hdr.veth->h_vlan_encapsulated_proto != htons(ETH_P_IPV6));
1261                 hdr.ptr += hlen;
1262                 /* Use an estimated value, since we also need to handle
1263                  * TSO case.
1264                  */
1265                 if (hdr.ipv6->nexthdr != IPPROTO_TCP)
1266                         return sizeof(struct ipv6hdr) + sizeof(struct tcphdr);
1267                 hlen = sizeof(struct ipv6hdr);
1268                 hdr.ptr += sizeof(struct ipv6hdr);
1269         } else {
1270                 /* Non-IP pkt, dont estimate header length */
1271                 return 0;
1272         }
1273
1274         if (hlen + sizeof(struct tcphdr) > maplen)
1275                 return 0;
1276
1277         return (hlen + (hdr.tcp->doff << 2));
1278 }
1279
1280 static int
1281 vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1282                        struct vmxnet3_adapter *adapter, int quota)
1283 {
1284         static const u32 rxprod_reg[2] = {
1285                 VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2
1286         };
1287         u32 num_pkts = 0;
1288         bool skip_page_frags = false;
1289         struct Vmxnet3_RxCompDesc *rcd;
1290         struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx;
1291         u16 segCnt = 0, mss = 0;
1292 #ifdef __BIG_ENDIAN_BITFIELD
1293         struct Vmxnet3_RxDesc rxCmdDesc;
1294         struct Vmxnet3_RxCompDesc rxComp;
1295 #endif
1296         vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd,
1297                           &rxComp);
1298         while (rcd->gen == rq->comp_ring.gen) {
1299                 struct vmxnet3_rx_buf_info *rbi;
1300                 struct sk_buff *skb, *new_skb = NULL;
1301                 struct page *new_page = NULL;
1302                 dma_addr_t new_dma_addr;
1303                 int num_to_alloc;
1304                 struct Vmxnet3_RxDesc *rxd;
1305                 u32 idx, ring_idx;
1306                 struct vmxnet3_cmd_ring *ring = NULL;
1307                 if (num_pkts >= quota) {
1308                         /* we may stop even before we see the EOP desc of
1309                          * the current pkt
1310                          */
1311                         break;
1312                 }
1313
1314                 /* Prevent any rcd field from being (speculatively) read before
1315                  * rcd->gen is read.
1316                  */
1317                 dma_rmb();
1318
1319                 BUG_ON(rcd->rqID != rq->qid && rcd->rqID != rq->qid2 &&
1320                        rcd->rqID != rq->dataRingQid);
1321                 idx = rcd->rxdIdx;
1322                 ring_idx = VMXNET3_GET_RING_IDX(adapter, rcd->rqID);
1323                 ring = rq->rx_ring + ring_idx;
1324                 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd,
1325                                   &rxCmdDesc);
1326                 rbi = rq->buf_info[ring_idx] + idx;
1327
1328                 BUG_ON(rxd->addr != rbi->dma_addr ||
1329                        rxd->len != rbi->len);
1330
1331                 if (unlikely(rcd->eop && rcd->err)) {
1332                         vmxnet3_rx_error(rq, rcd, ctx, adapter);
1333                         goto rcd_done;
1334                 }
1335
1336                 if (rcd->sop) { /* first buf of the pkt */
1337                         bool rxDataRingUsed;
1338                         u16 len;
1339
1340                         BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD ||
1341                                (rcd->rqID != rq->qid &&
1342                                 rcd->rqID != rq->dataRingQid));
1343
1344                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB);
1345                         BUG_ON(ctx->skb != NULL || rbi->skb == NULL);
1346
1347                         if (unlikely(rcd->len == 0)) {
1348                                 /* Pretend the rx buffer is skipped. */
1349                                 BUG_ON(!(rcd->sop && rcd->eop));
1350                                 netdev_dbg(adapter->netdev,
1351                                         "rxRing[%u][%u] 0 length\n",
1352                                         ring_idx, idx);
1353                                 goto rcd_done;
1354                         }
1355
1356                         skip_page_frags = false;
1357                         ctx->skb = rbi->skb;
1358
1359                         rxDataRingUsed =
1360                                 VMXNET3_RX_DATA_RING(adapter, rcd->rqID);
1361                         len = rxDataRingUsed ? rcd->len : rbi->len;
1362                         new_skb = netdev_alloc_skb_ip_align(adapter->netdev,
1363                                                             len);
1364                         if (new_skb == NULL) {
1365                                 /* Skb allocation failed, do not handover this
1366                                  * skb to stack. Reuse it. Drop the existing pkt
1367                                  */
1368                                 rq->stats.rx_buf_alloc_failure++;
1369                                 ctx->skb = NULL;
1370                                 rq->stats.drop_total++;
1371                                 skip_page_frags = true;
1372                                 goto rcd_done;
1373                         }
1374
1375                         if (rxDataRingUsed) {
1376                                 size_t sz;
1377
1378                                 BUG_ON(rcd->len > rq->data_ring.desc_size);
1379
1380                                 ctx->skb = new_skb;
1381                                 sz = rcd->rxdIdx * rq->data_ring.desc_size;
1382                                 memcpy(new_skb->data,
1383                                        &rq->data_ring.base[sz], rcd->len);
1384                         } else {
1385                                 ctx->skb = rbi->skb;
1386
1387                                 new_dma_addr =
1388                                         dma_map_single(&adapter->pdev->dev,
1389                                                        new_skb->data, rbi->len,
1390                                                        PCI_DMA_FROMDEVICE);
1391                                 if (dma_mapping_error(&adapter->pdev->dev,
1392                                                       new_dma_addr)) {
1393                                         dev_kfree_skb(new_skb);
1394                                         /* Skb allocation failed, do not
1395                                          * handover this skb to stack. Reuse
1396                                          * it. Drop the existing pkt.
1397                                          */
1398                                         rq->stats.rx_buf_alloc_failure++;
1399                                         ctx->skb = NULL;
1400                                         rq->stats.drop_total++;
1401                                         skip_page_frags = true;
1402                                         goto rcd_done;
1403                                 }
1404
1405                                 dma_unmap_single(&adapter->pdev->dev,
1406                                                  rbi->dma_addr,
1407                                                  rbi->len,
1408                                                  PCI_DMA_FROMDEVICE);
1409
1410                                 /* Immediate refill */
1411                                 rbi->skb = new_skb;
1412                                 rbi->dma_addr = new_dma_addr;
1413                                 rxd->addr = cpu_to_le64(rbi->dma_addr);
1414                                 rxd->len = rbi->len;
1415                         }
1416
1417 #ifdef VMXNET3_RSS
1418                         if (rcd->rssType != VMXNET3_RCD_RSS_TYPE_NONE &&
1419                             (adapter->netdev->features & NETIF_F_RXHASH))
1420                                 skb_set_hash(ctx->skb,
1421                                              le32_to_cpu(rcd->rssHash),
1422                                              PKT_HASH_TYPE_L3);
1423 #endif
1424                         skb_put(ctx->skb, rcd->len);
1425
1426                         if (VMXNET3_VERSION_GE_2(adapter) &&
1427                             rcd->type == VMXNET3_CDTYPE_RXCOMP_LRO) {
1428                                 struct Vmxnet3_RxCompDescExt *rcdlro;
1429                                 rcdlro = (struct Vmxnet3_RxCompDescExt *)rcd;
1430
1431                                 segCnt = rcdlro->segCnt;
1432                                 WARN_ON_ONCE(segCnt == 0);
1433                                 mss = rcdlro->mss;
1434                                 if (unlikely(segCnt <= 1))
1435                                         segCnt = 0;
1436                         } else {
1437                                 segCnt = 0;
1438                         }
1439                 } else {
1440                         BUG_ON(ctx->skb == NULL && !skip_page_frags);
1441
1442                         /* non SOP buffer must be type 1 in most cases */
1443                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE);
1444                         BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY);
1445
1446                         /* If an sop buffer was dropped, skip all
1447                          * following non-sop fragments. They will be reused.
1448                          */
1449                         if (skip_page_frags)
1450                                 goto rcd_done;
1451
1452                         if (rcd->len) {
1453                                 new_page = alloc_page(GFP_ATOMIC);
1454                                 /* Replacement page frag could not be allocated.
1455                                  * Reuse this page. Drop the pkt and free the
1456                                  * skb which contained this page as a frag. Skip
1457                                  * processing all the following non-sop frags.
1458                                  */
1459                                 if (unlikely(!new_page)) {
1460                                         rq->stats.rx_buf_alloc_failure++;
1461                                         dev_kfree_skb(ctx->skb);
1462                                         ctx->skb = NULL;
1463                                         skip_page_frags = true;
1464                                         goto rcd_done;
1465                                 }
1466                                 new_dma_addr = dma_map_page(&adapter->pdev->dev,
1467                                                             new_page,
1468                                                             0, PAGE_SIZE,
1469                                                             PCI_DMA_FROMDEVICE);
1470                                 if (dma_mapping_error(&adapter->pdev->dev,
1471                                                       new_dma_addr)) {
1472                                         put_page(new_page);
1473                                         rq->stats.rx_buf_alloc_failure++;
1474                                         dev_kfree_skb(ctx->skb);
1475                                         ctx->skb = NULL;
1476                                         skip_page_frags = true;
1477                                         goto rcd_done;
1478                                 }
1479
1480                                 dma_unmap_page(&adapter->pdev->dev,
1481                                                rbi->dma_addr, rbi->len,
1482                                                PCI_DMA_FROMDEVICE);
1483
1484                                 vmxnet3_append_frag(ctx->skb, rcd, rbi);
1485
1486                                 /* Immediate refill */
1487                                 rbi->page = new_page;
1488                                 rbi->dma_addr = new_dma_addr;
1489                                 rxd->addr = cpu_to_le64(rbi->dma_addr);
1490                                 rxd->len = rbi->len;
1491                         }
1492                 }
1493
1494
1495                 skb = ctx->skb;
1496                 if (rcd->eop) {
1497                         u32 mtu = adapter->netdev->mtu;
1498                         skb->len += skb->data_len;
1499
1500                         vmxnet3_rx_csum(adapter, skb,
1501                                         (union Vmxnet3_GenericDesc *)rcd);
1502                         skb->protocol = eth_type_trans(skb, adapter->netdev);
1503                         if (!rcd->tcp ||
1504                             !(adapter->netdev->features & NETIF_F_LRO))
1505                                 goto not_lro;
1506
1507                         if (segCnt != 0 && mss != 0) {
1508                                 skb_shinfo(skb)->gso_type = rcd->v4 ?
1509                                         SKB_GSO_TCPV4 : SKB_GSO_TCPV6;
1510                                 skb_shinfo(skb)->gso_size = mss;
1511                                 skb_shinfo(skb)->gso_segs = segCnt;
1512                         } else if (segCnt != 0 || skb->len > mtu) {
1513                                 u32 hlen;
1514
1515                                 hlen = vmxnet3_get_hdr_len(adapter, skb,
1516                                         (union Vmxnet3_GenericDesc *)rcd);
1517                                 if (hlen == 0)
1518                                         goto not_lro;
1519
1520                                 skb_shinfo(skb)->gso_type =
1521                                         rcd->v4 ? SKB_GSO_TCPV4 : SKB_GSO_TCPV6;
1522                                 if (segCnt != 0) {
1523                                         skb_shinfo(skb)->gso_segs = segCnt;
1524                                         skb_shinfo(skb)->gso_size =
1525                                                 DIV_ROUND_UP(skb->len -
1526                                                         hlen, segCnt);
1527                                 } else {
1528                                         skb_shinfo(skb)->gso_size = mtu - hlen;
1529                                 }
1530                         }
1531 not_lro:
1532                         if (unlikely(rcd->ts))
1533                                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), rcd->tci);
1534
1535                         if (adapter->netdev->features & NETIF_F_LRO)
1536                                 netif_receive_skb(skb);
1537                         else
1538                                 napi_gro_receive(&rq->napi, skb);
1539
1540                         ctx->skb = NULL;
1541                         num_pkts++;
1542                 }
1543
1544 rcd_done:
1545                 /* device may have skipped some rx descs */
1546                 ring->next2comp = idx;
1547                 num_to_alloc = vmxnet3_cmd_ring_desc_avail(ring);
1548                 ring = rq->rx_ring + ring_idx;
1549
1550                 /* Ensure that the writes to rxd->gen bits will be observed
1551                  * after all other writes to rxd objects.
1552                  */
1553                 dma_wmb();
1554
1555                 while (num_to_alloc) {
1556                         vmxnet3_getRxDesc(rxd, &ring->base[ring->next2fill].rxd,
1557                                           &rxCmdDesc);
1558                         BUG_ON(!rxd->addr);
1559
1560                         /* Recv desc is ready to be used by the device */
1561                         rxd->gen = ring->gen;
1562                         vmxnet3_cmd_ring_adv_next2fill(ring);
1563                         num_to_alloc--;
1564                 }
1565
1566                 /* if needed, update the register */
1567                 if (unlikely(rq->shared->updateRxProd)) {
1568                         VMXNET3_WRITE_BAR0_REG(adapter,
1569                                                rxprod_reg[ring_idx] + rq->qid * 8,
1570                                                ring->next2fill);
1571                 }
1572
1573                 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring);
1574                 vmxnet3_getRxComp(rcd,
1575                                   &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp);
1576         }
1577
1578         return num_pkts;
1579 }
1580
1581
1582 static void
1583 vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq,
1584                    struct vmxnet3_adapter *adapter)
1585 {
1586         u32 i, ring_idx;
1587         struct Vmxnet3_RxDesc *rxd;
1588
1589         /* ring has already been cleaned up */
1590         if (!rq->rx_ring[0].base)
1591                 return;
1592
1593         for (ring_idx = 0; ring_idx < 2; ring_idx++) {
1594                 for (i = 0; i < rq->rx_ring[ring_idx].size; i++) {
1595 #ifdef __BIG_ENDIAN_BITFIELD
1596                         struct Vmxnet3_RxDesc rxDesc;
1597 #endif
1598                         vmxnet3_getRxDesc(rxd,
1599                                 &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc);
1600
1601                         if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD &&
1602                                         rq->buf_info[ring_idx][i].skb) {
1603                                 dma_unmap_single(&adapter->pdev->dev, rxd->addr,
1604                                                  rxd->len, PCI_DMA_FROMDEVICE);
1605                                 dev_kfree_skb(rq->buf_info[ring_idx][i].skb);
1606                                 rq->buf_info[ring_idx][i].skb = NULL;
1607                         } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY &&
1608                                         rq->buf_info[ring_idx][i].page) {
1609                                 dma_unmap_page(&adapter->pdev->dev, rxd->addr,
1610                                                rxd->len, PCI_DMA_FROMDEVICE);
1611                                 put_page(rq->buf_info[ring_idx][i].page);
1612                                 rq->buf_info[ring_idx][i].page = NULL;
1613                         }
1614                 }
1615
1616                 rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN;
1617                 rq->rx_ring[ring_idx].next2fill =
1618                                         rq->rx_ring[ring_idx].next2comp = 0;
1619         }
1620
1621         rq->comp_ring.gen = VMXNET3_INIT_GEN;
1622         rq->comp_ring.next2proc = 0;
1623 }
1624
1625
1626 static void
1627 vmxnet3_rq_cleanup_all(struct vmxnet3_adapter *adapter)
1628 {
1629         int i;
1630
1631         for (i = 0; i < adapter->num_rx_queues; i++)
1632                 vmxnet3_rq_cleanup(&adapter->rx_queue[i], adapter);
1633 }
1634
1635
1636 static void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq,
1637                                struct vmxnet3_adapter *adapter)
1638 {
1639         int i;
1640         int j;
1641
1642         /* all rx buffers must have already been freed */
1643         for (i = 0; i < 2; i++) {
1644                 if (rq->buf_info[i]) {
1645                         for (j = 0; j < rq->rx_ring[i].size; j++)
1646                                 BUG_ON(rq->buf_info[i][j].page != NULL);
1647                 }
1648         }
1649
1650
1651         for (i = 0; i < 2; i++) {
1652                 if (rq->rx_ring[i].base) {
1653                         dma_free_coherent(&adapter->pdev->dev,
1654                                           rq->rx_ring[i].size
1655                                           * sizeof(struct Vmxnet3_RxDesc),
1656                                           rq->rx_ring[i].base,
1657                                           rq->rx_ring[i].basePA);
1658                         rq->rx_ring[i].base = NULL;
1659                 }
1660         }
1661
1662         if (rq->data_ring.base) {
1663                 dma_free_coherent(&adapter->pdev->dev,
1664                                   rq->rx_ring[0].size * rq->data_ring.desc_size,
1665                                   rq->data_ring.base, rq->data_ring.basePA);
1666                 rq->data_ring.base = NULL;
1667         }
1668
1669         if (rq->comp_ring.base) {
1670                 dma_free_coherent(&adapter->pdev->dev, rq->comp_ring.size
1671                                   * sizeof(struct Vmxnet3_RxCompDesc),
1672                                   rq->comp_ring.base, rq->comp_ring.basePA);
1673                 rq->comp_ring.base = NULL;
1674         }
1675
1676         if (rq->buf_info[0]) {
1677                 size_t sz = sizeof(struct vmxnet3_rx_buf_info) *
1678                         (rq->rx_ring[0].size + rq->rx_ring[1].size);
1679                 dma_free_coherent(&adapter->pdev->dev, sz, rq->buf_info[0],
1680                                   rq->buf_info_pa);
1681                 rq->buf_info[0] = rq->buf_info[1] = NULL;
1682         }
1683 }
1684
1685 static void
1686 vmxnet3_rq_destroy_all_rxdataring(struct vmxnet3_adapter *adapter)
1687 {
1688         int i;
1689
1690         for (i = 0; i < adapter->num_rx_queues; i++) {
1691                 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
1692
1693                 if (rq->data_ring.base) {
1694                         dma_free_coherent(&adapter->pdev->dev,
1695                                           (rq->rx_ring[0].size *
1696                                           rq->data_ring.desc_size),
1697                                           rq->data_ring.base,
1698                                           rq->data_ring.basePA);
1699                         rq->data_ring.base = NULL;
1700                         rq->data_ring.desc_size = 0;
1701                 }
1702         }
1703 }
1704
1705 static int
1706 vmxnet3_rq_init(struct vmxnet3_rx_queue *rq,
1707                 struct vmxnet3_adapter  *adapter)
1708 {
1709         int i;
1710
1711         /* initialize buf_info */
1712         for (i = 0; i < rq->rx_ring[0].size; i++) {
1713
1714                 /* 1st buf for a pkt is skbuff */
1715                 if (i % adapter->rx_buf_per_pkt == 0) {
1716                         rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB;
1717                         rq->buf_info[0][i].len = adapter->skb_buf_size;
1718                 } else { /* subsequent bufs for a pkt is frag */
1719                         rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE;
1720                         rq->buf_info[0][i].len = PAGE_SIZE;
1721                 }
1722         }
1723         for (i = 0; i < rq->rx_ring[1].size; i++) {
1724                 rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE;
1725                 rq->buf_info[1][i].len = PAGE_SIZE;
1726         }
1727
1728         /* reset internal state and allocate buffers for both rings */
1729         for (i = 0; i < 2; i++) {
1730                 rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0;
1731
1732                 memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size *
1733                        sizeof(struct Vmxnet3_RxDesc));
1734                 rq->rx_ring[i].gen = VMXNET3_INIT_GEN;
1735         }
1736         if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1,
1737                                     adapter) == 0) {
1738                 /* at least has 1 rx buffer for the 1st ring */
1739                 return -ENOMEM;
1740         }
1741         vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter);
1742
1743         /* reset the comp ring */
1744         rq->comp_ring.next2proc = 0;
1745         memset(rq->comp_ring.base, 0, rq->comp_ring.size *
1746                sizeof(struct Vmxnet3_RxCompDesc));
1747         rq->comp_ring.gen = VMXNET3_INIT_GEN;
1748
1749         /* reset rxctx */
1750         rq->rx_ctx.skb = NULL;
1751
1752         /* stats are not reset */
1753         return 0;
1754 }
1755
1756
1757 static int
1758 vmxnet3_rq_init_all(struct vmxnet3_adapter *adapter)
1759 {
1760         int i, err = 0;
1761
1762         for (i = 0; i < adapter->num_rx_queues; i++) {
1763                 err = vmxnet3_rq_init(&adapter->rx_queue[i], adapter);
1764                 if (unlikely(err)) {
1765                         dev_err(&adapter->netdev->dev, "%s: failed to "
1766                                 "initialize rx queue%i\n",
1767                                 adapter->netdev->name, i);
1768                         break;
1769                 }
1770         }
1771         return err;
1772
1773 }
1774
1775
1776 static int
1777 vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter)
1778 {
1779         int i;
1780         size_t sz;
1781         struct vmxnet3_rx_buf_info *bi;
1782
1783         for (i = 0; i < 2; i++) {
1784
1785                 sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc);
1786                 rq->rx_ring[i].base = dma_alloc_coherent(
1787                                                 &adapter->pdev->dev, sz,
1788                                                 &rq->rx_ring[i].basePA,
1789                                                 GFP_KERNEL);
1790                 if (!rq->rx_ring[i].base) {
1791                         netdev_err(adapter->netdev,
1792                                    "failed to allocate rx ring %d\n", i);
1793                         goto err;
1794                 }
1795         }
1796
1797         if ((adapter->rxdataring_enabled) && (rq->data_ring.desc_size != 0)) {
1798                 sz = rq->rx_ring[0].size * rq->data_ring.desc_size;
1799                 rq->data_ring.base =
1800                         dma_alloc_coherent(&adapter->pdev->dev, sz,
1801                                            &rq->data_ring.basePA,
1802                                            GFP_KERNEL);
1803                 if (!rq->data_ring.base) {
1804                         netdev_err(adapter->netdev,
1805                                    "rx data ring will be disabled\n");
1806                         adapter->rxdataring_enabled = false;
1807                 }
1808         } else {
1809                 rq->data_ring.base = NULL;
1810                 rq->data_ring.desc_size = 0;
1811         }
1812
1813         sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc);
1814         rq->comp_ring.base = dma_alloc_coherent(&adapter->pdev->dev, sz,
1815                                                 &rq->comp_ring.basePA,
1816                                                 GFP_KERNEL);
1817         if (!rq->comp_ring.base) {
1818                 netdev_err(adapter->netdev, "failed to allocate rx comp ring\n");
1819                 goto err;
1820         }
1821
1822         sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size +
1823                                                    rq->rx_ring[1].size);
1824         bi = dma_zalloc_coherent(&adapter->pdev->dev, sz, &rq->buf_info_pa,
1825                                  GFP_KERNEL);
1826         if (!bi)
1827                 goto err;
1828
1829         rq->buf_info[0] = bi;
1830         rq->buf_info[1] = bi + rq->rx_ring[0].size;
1831
1832         return 0;
1833
1834 err:
1835         vmxnet3_rq_destroy(rq, adapter);
1836         return -ENOMEM;
1837 }
1838
1839
1840 static int
1841 vmxnet3_rq_create_all(struct vmxnet3_adapter *adapter)
1842 {
1843         int i, err = 0;
1844
1845         adapter->rxdataring_enabled = VMXNET3_VERSION_GE_3(adapter);
1846
1847         for (i = 0; i < adapter->num_rx_queues; i++) {
1848                 err = vmxnet3_rq_create(&adapter->rx_queue[i], adapter);
1849                 if (unlikely(err)) {
1850                         dev_err(&adapter->netdev->dev,
1851                                 "%s: failed to create rx queue%i\n",
1852                                 adapter->netdev->name, i);
1853                         goto err_out;
1854                 }
1855         }
1856
1857         if (!adapter->rxdataring_enabled)
1858                 vmxnet3_rq_destroy_all_rxdataring(adapter);
1859
1860         return err;
1861 err_out:
1862         vmxnet3_rq_destroy_all(adapter);
1863         return err;
1864
1865 }
1866
1867 /* Multiple queue aware polling function for tx and rx */
1868
1869 static int
1870 vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget)
1871 {
1872         int rcd_done = 0, i;
1873         if (unlikely(adapter->shared->ecr))
1874                 vmxnet3_process_events(adapter);
1875         for (i = 0; i < adapter->num_tx_queues; i++)
1876                 vmxnet3_tq_tx_complete(&adapter->tx_queue[i], adapter);
1877
1878         for (i = 0; i < adapter->num_rx_queues; i++)
1879                 rcd_done += vmxnet3_rq_rx_complete(&adapter->rx_queue[i],
1880                                                    adapter, budget);
1881         return rcd_done;
1882 }
1883
1884
1885 static int
1886 vmxnet3_poll(struct napi_struct *napi, int budget)
1887 {
1888         struct vmxnet3_rx_queue *rx_queue = container_of(napi,
1889                                           struct vmxnet3_rx_queue, napi);
1890         int rxd_done;
1891
1892         rxd_done = vmxnet3_do_poll(rx_queue->adapter, budget);
1893
1894         if (rxd_done < budget) {
1895                 napi_complete_done(napi, rxd_done);
1896                 vmxnet3_enable_all_intrs(rx_queue->adapter);
1897         }
1898         return rxd_done;
1899 }
1900
1901 /*
1902  * NAPI polling function for MSI-X mode with multiple Rx queues
1903  * Returns the # of the NAPI credit consumed (# of rx descriptors processed)
1904  */
1905
1906 static int
1907 vmxnet3_poll_rx_only(struct napi_struct *napi, int budget)
1908 {
1909         struct vmxnet3_rx_queue *rq = container_of(napi,
1910                                                 struct vmxnet3_rx_queue, napi);
1911         struct vmxnet3_adapter *adapter = rq->adapter;
1912         int rxd_done;
1913
1914         /* When sharing interrupt with corresponding tx queue, process
1915          * tx completions in that queue as well
1916          */
1917         if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) {
1918                 struct vmxnet3_tx_queue *tq =
1919                                 &adapter->tx_queue[rq - adapter->rx_queue];
1920                 vmxnet3_tq_tx_complete(tq, adapter);
1921         }
1922
1923         rxd_done = vmxnet3_rq_rx_complete(rq, adapter, budget);
1924
1925         if (rxd_done < budget) {
1926                 napi_complete_done(napi, rxd_done);
1927                 vmxnet3_enable_intr(adapter, rq->comp_ring.intr_idx);
1928         }
1929         return rxd_done;
1930 }
1931
1932
1933 #ifdef CONFIG_PCI_MSI
1934
1935 /*
1936  * Handle completion interrupts on tx queues
1937  * Returns whether or not the intr is handled
1938  */
1939
1940 static irqreturn_t
1941 vmxnet3_msix_tx(int irq, void *data)
1942 {
1943         struct vmxnet3_tx_queue *tq = data;
1944         struct vmxnet3_adapter *adapter = tq->adapter;
1945
1946         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1947                 vmxnet3_disable_intr(adapter, tq->comp_ring.intr_idx);
1948
1949         /* Handle the case where only one irq is allocate for all tx queues */
1950         if (adapter->share_intr == VMXNET3_INTR_TXSHARE) {
1951                 int i;
1952                 for (i = 0; i < adapter->num_tx_queues; i++) {
1953                         struct vmxnet3_tx_queue *txq = &adapter->tx_queue[i];
1954                         vmxnet3_tq_tx_complete(txq, adapter);
1955                 }
1956         } else {
1957                 vmxnet3_tq_tx_complete(tq, adapter);
1958         }
1959         vmxnet3_enable_intr(adapter, tq->comp_ring.intr_idx);
1960
1961         return IRQ_HANDLED;
1962 }
1963
1964
1965 /*
1966  * Handle completion interrupts on rx queues. Returns whether or not the
1967  * intr is handled
1968  */
1969
1970 static irqreturn_t
1971 vmxnet3_msix_rx(int irq, void *data)
1972 {
1973         struct vmxnet3_rx_queue *rq = data;
1974         struct vmxnet3_adapter *adapter = rq->adapter;
1975
1976         /* disable intr if needed */
1977         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1978                 vmxnet3_disable_intr(adapter, rq->comp_ring.intr_idx);
1979         napi_schedule(&rq->napi);
1980
1981         return IRQ_HANDLED;
1982 }
1983
1984 /*
1985  *----------------------------------------------------------------------------
1986  *
1987  * vmxnet3_msix_event --
1988  *
1989  *    vmxnet3 msix event intr handler
1990  *
1991  * Result:
1992  *    whether or not the intr is handled
1993  *
1994  *----------------------------------------------------------------------------
1995  */
1996
1997 static irqreturn_t
1998 vmxnet3_msix_event(int irq, void *data)
1999 {
2000         struct net_device *dev = data;
2001         struct vmxnet3_adapter *adapter = netdev_priv(dev);
2002
2003         /* disable intr if needed */
2004         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
2005                 vmxnet3_disable_intr(adapter, adapter->intr.event_intr_idx);
2006
2007         if (adapter->shared->ecr)
2008                 vmxnet3_process_events(adapter);
2009
2010         vmxnet3_enable_intr(adapter, adapter->intr.event_intr_idx);
2011
2012         return IRQ_HANDLED;
2013 }
2014
2015 #endif /* CONFIG_PCI_MSI  */
2016
2017
2018 /* Interrupt handler for vmxnet3  */
2019 static irqreturn_t
2020 vmxnet3_intr(int irq, void *dev_id)
2021 {
2022         struct net_device *dev = dev_id;
2023         struct vmxnet3_adapter *adapter = netdev_priv(dev);
2024
2025         if (adapter->intr.type == VMXNET3_IT_INTX) {
2026                 u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR);
2027                 if (unlikely(icr == 0))
2028                         /* not ours */
2029                         return IRQ_NONE;
2030         }
2031
2032
2033         /* disable intr if needed */
2034         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
2035                 vmxnet3_disable_all_intrs(adapter);
2036
2037         napi_schedule(&adapter->rx_queue[0].napi);
2038
2039         return IRQ_HANDLED;
2040 }
2041
2042 #ifdef CONFIG_NET_POLL_CONTROLLER
2043
2044 /* netpoll callback. */
2045 static void
2046 vmxnet3_netpoll(struct net_device *netdev)
2047 {
2048         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2049
2050         switch (adapter->intr.type) {
2051 #ifdef CONFIG_PCI_MSI
2052         case VMXNET3_IT_MSIX: {
2053                 int i;
2054                 for (i = 0; i < adapter->num_rx_queues; i++)
2055                         vmxnet3_msix_rx(0, &adapter->rx_queue[i]);
2056                 break;
2057         }
2058 #endif
2059         case VMXNET3_IT_MSI:
2060         default:
2061                 vmxnet3_intr(0, adapter->netdev);
2062                 break;
2063         }
2064
2065 }
2066 #endif  /* CONFIG_NET_POLL_CONTROLLER */
2067
2068 static int
2069 vmxnet3_request_irqs(struct vmxnet3_adapter *adapter)
2070 {
2071         struct vmxnet3_intr *intr = &adapter->intr;
2072         int err = 0, i;
2073         int vector = 0;
2074
2075 #ifdef CONFIG_PCI_MSI
2076         if (adapter->intr.type == VMXNET3_IT_MSIX) {
2077                 for (i = 0; i < adapter->num_tx_queues; i++) {
2078                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) {
2079                                 sprintf(adapter->tx_queue[i].name, "%s-tx-%d",
2080                                         adapter->netdev->name, vector);
2081                                 err = request_irq(
2082                                               intr->msix_entries[vector].vector,
2083                                               vmxnet3_msix_tx, 0,
2084                                               adapter->tx_queue[i].name,
2085                                               &adapter->tx_queue[i]);
2086                         } else {
2087                                 sprintf(adapter->tx_queue[i].name, "%s-rxtx-%d",
2088                                         adapter->netdev->name, vector);
2089                         }
2090                         if (err) {
2091                                 dev_err(&adapter->netdev->dev,
2092                                         "Failed to request irq for MSIX, %s, "
2093                                         "error %d\n",
2094                                         adapter->tx_queue[i].name, err);
2095                                 return err;
2096                         }
2097
2098                         /* Handle the case where only 1 MSIx was allocated for
2099                          * all tx queues */
2100                         if (adapter->share_intr == VMXNET3_INTR_TXSHARE) {
2101                                 for (; i < adapter->num_tx_queues; i++)
2102                                         adapter->tx_queue[i].comp_ring.intr_idx
2103                                                                 = vector;
2104                                 vector++;
2105                                 break;
2106                         } else {
2107                                 adapter->tx_queue[i].comp_ring.intr_idx
2108                                                                 = vector++;
2109                         }
2110                 }
2111                 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE)
2112                         vector = 0;
2113
2114                 for (i = 0; i < adapter->num_rx_queues; i++) {
2115                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE)
2116                                 sprintf(adapter->rx_queue[i].name, "%s-rx-%d",
2117                                         adapter->netdev->name, vector);
2118                         else
2119                                 sprintf(adapter->rx_queue[i].name, "%s-rxtx-%d",
2120                                         adapter->netdev->name, vector);
2121                         err = request_irq(intr->msix_entries[vector].vector,
2122                                           vmxnet3_msix_rx, 0,
2123                                           adapter->rx_queue[i].name,
2124                                           &(adapter->rx_queue[i]));
2125                         if (err) {
2126                                 netdev_err(adapter->netdev,
2127                                            "Failed to request irq for MSIX, "
2128                                            "%s, error %d\n",
2129                                            adapter->rx_queue[i].name, err);
2130                                 return err;
2131                         }
2132
2133                         adapter->rx_queue[i].comp_ring.intr_idx = vector++;
2134                 }
2135
2136                 sprintf(intr->event_msi_vector_name, "%s-event-%d",
2137                         adapter->netdev->name, vector);
2138                 err = request_irq(intr->msix_entries[vector].vector,
2139                                   vmxnet3_msix_event, 0,
2140                                   intr->event_msi_vector_name, adapter->netdev);
2141                 intr->event_intr_idx = vector;
2142
2143         } else if (intr->type == VMXNET3_IT_MSI) {
2144                 adapter->num_rx_queues = 1;
2145                 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0,
2146                                   adapter->netdev->name, adapter->netdev);
2147         } else {
2148 #endif
2149                 adapter->num_rx_queues = 1;
2150                 err = request_irq(adapter->pdev->irq, vmxnet3_intr,
2151                                   IRQF_SHARED, adapter->netdev->name,
2152                                   adapter->netdev);
2153 #ifdef CONFIG_PCI_MSI
2154         }
2155 #endif
2156         intr->num_intrs = vector + 1;
2157         if (err) {
2158                 netdev_err(adapter->netdev,
2159                            "Failed to request irq (intr type:%d), error %d\n",
2160                            intr->type, err);
2161         } else {
2162                 /* Number of rx queues will not change after this */
2163                 for (i = 0; i < adapter->num_rx_queues; i++) {
2164                         struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2165                         rq->qid = i;
2166                         rq->qid2 = i + adapter->num_rx_queues;
2167                         rq->dataRingQid = i + 2 * adapter->num_rx_queues;
2168                 }
2169
2170                 /* init our intr settings */
2171                 for (i = 0; i < intr->num_intrs; i++)
2172                         intr->mod_levels[i] = UPT1_IML_ADAPTIVE;
2173                 if (adapter->intr.type != VMXNET3_IT_MSIX) {
2174                         adapter->intr.event_intr_idx = 0;
2175                         for (i = 0; i < adapter->num_tx_queues; i++)
2176                                 adapter->tx_queue[i].comp_ring.intr_idx = 0;
2177                         adapter->rx_queue[0].comp_ring.intr_idx = 0;
2178                 }
2179
2180                 netdev_info(adapter->netdev,
2181                             "intr type %u, mode %u, %u vectors allocated\n",
2182                             intr->type, intr->mask_mode, intr->num_intrs);
2183         }
2184
2185         return err;
2186 }
2187
2188
2189 static void
2190 vmxnet3_free_irqs(struct vmxnet3_adapter *adapter)
2191 {
2192         struct vmxnet3_intr *intr = &adapter->intr;
2193         BUG_ON(intr->type == VMXNET3_IT_AUTO || intr->num_intrs <= 0);
2194
2195         switch (intr->type) {
2196 #ifdef CONFIG_PCI_MSI
2197         case VMXNET3_IT_MSIX:
2198         {
2199                 int i, vector = 0;
2200
2201                 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) {
2202                         for (i = 0; i < adapter->num_tx_queues; i++) {
2203                                 free_irq(intr->msix_entries[vector++].vector,
2204                                          &(adapter->tx_queue[i]));
2205                                 if (adapter->share_intr == VMXNET3_INTR_TXSHARE)
2206                                         break;
2207                         }
2208                 }
2209
2210                 for (i = 0; i < adapter->num_rx_queues; i++) {
2211                         free_irq(intr->msix_entries[vector++].vector,
2212                                  &(adapter->rx_queue[i]));
2213                 }
2214
2215                 free_irq(intr->msix_entries[vector].vector,
2216                          adapter->netdev);
2217                 BUG_ON(vector >= intr->num_intrs);
2218                 break;
2219         }
2220 #endif
2221         case VMXNET3_IT_MSI:
2222                 free_irq(adapter->pdev->irq, adapter->netdev);
2223                 break;
2224         case VMXNET3_IT_INTX:
2225                 free_irq(adapter->pdev->irq, adapter->netdev);
2226                 break;
2227         default:
2228                 BUG();
2229         }
2230 }
2231
2232
2233 static void
2234 vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter)
2235 {
2236         u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2237         u16 vid;
2238
2239         /* allow untagged pkts */
2240         VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
2241
2242         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2243                 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
2244 }
2245
2246
2247 static int
2248 vmxnet3_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
2249 {
2250         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2251
2252         if (!(netdev->flags & IFF_PROMISC)) {
2253                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2254                 unsigned long flags;
2255
2256                 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
2257                 spin_lock_irqsave(&adapter->cmd_lock, flags);
2258                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2259                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
2260                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2261         }
2262
2263         set_bit(vid, adapter->active_vlans);
2264
2265         return 0;
2266 }
2267
2268
2269 static int
2270 vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
2271 {
2272         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2273
2274         if (!(netdev->flags & IFF_PROMISC)) {
2275                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2276                 unsigned long flags;
2277
2278                 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid);
2279                 spin_lock_irqsave(&adapter->cmd_lock, flags);
2280                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2281                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
2282                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2283         }
2284
2285         clear_bit(vid, adapter->active_vlans);
2286
2287         return 0;
2288 }
2289
2290
2291 static u8 *
2292 vmxnet3_copy_mc(struct net_device *netdev)
2293 {
2294         u8 *buf = NULL;
2295         u32 sz = netdev_mc_count(netdev) * ETH_ALEN;
2296
2297         /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */
2298         if (sz <= 0xffff) {
2299                 /* We may be called with BH disabled */
2300                 buf = kmalloc(sz, GFP_ATOMIC);
2301                 if (buf) {
2302                         struct netdev_hw_addr *ha;
2303                         int i = 0;
2304
2305                         netdev_for_each_mc_addr(ha, netdev)
2306                                 memcpy(buf + i++ * ETH_ALEN, ha->addr,
2307                                        ETH_ALEN);
2308                 }
2309         }
2310         return buf;
2311 }
2312
2313
2314 static void
2315 vmxnet3_set_mc(struct net_device *netdev)
2316 {
2317         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2318         unsigned long flags;
2319         struct Vmxnet3_RxFilterConf *rxConf =
2320                                         &adapter->shared->devRead.rxFilterConf;
2321         u8 *new_table = NULL;
2322         dma_addr_t new_table_pa = 0;
2323         bool new_table_pa_valid = false;
2324         u32 new_mode = VMXNET3_RXM_UCAST;
2325
2326         if (netdev->flags & IFF_PROMISC) {
2327                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2328                 memset(vfTable, 0, VMXNET3_VFT_SIZE * sizeof(*vfTable));
2329
2330                 new_mode |= VMXNET3_RXM_PROMISC;
2331         } else {
2332                 vmxnet3_restore_vlan(adapter);
2333         }
2334
2335         if (netdev->flags & IFF_BROADCAST)
2336                 new_mode |= VMXNET3_RXM_BCAST;
2337
2338         if (netdev->flags & IFF_ALLMULTI)
2339                 new_mode |= VMXNET3_RXM_ALL_MULTI;
2340         else
2341                 if (!netdev_mc_empty(netdev)) {
2342                         new_table = vmxnet3_copy_mc(netdev);
2343                         if (new_table) {
2344                                 size_t sz = netdev_mc_count(netdev) * ETH_ALEN;
2345
2346                                 rxConf->mfTableLen = cpu_to_le16(sz);
2347                                 new_table_pa = dma_map_single(
2348                                                         &adapter->pdev->dev,
2349                                                         new_table,
2350                                                         sz,
2351                                                         PCI_DMA_TODEVICE);
2352                                 if (!dma_mapping_error(&adapter->pdev->dev,
2353                                                        new_table_pa)) {
2354                                         new_mode |= VMXNET3_RXM_MCAST;
2355                                         new_table_pa_valid = true;
2356                                         rxConf->mfTablePA = cpu_to_le64(
2357                                                                 new_table_pa);
2358                                 }
2359                         }
2360                         if (!new_table_pa_valid) {
2361                                 netdev_info(netdev,
2362                                             "failed to copy mcast list, setting ALL_MULTI\n");
2363                                 new_mode |= VMXNET3_RXM_ALL_MULTI;
2364                         }
2365                 }
2366
2367         if (!(new_mode & VMXNET3_RXM_MCAST)) {
2368                 rxConf->mfTableLen = 0;
2369                 rxConf->mfTablePA = 0;
2370         }
2371
2372         spin_lock_irqsave(&adapter->cmd_lock, flags);
2373         if (new_mode != rxConf->rxMode) {
2374                 rxConf->rxMode = cpu_to_le32(new_mode);
2375                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2376                                        VMXNET3_CMD_UPDATE_RX_MODE);
2377                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2378                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
2379         }
2380
2381         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2382                                VMXNET3_CMD_UPDATE_MAC_FILTERS);
2383         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2384
2385         if (new_table_pa_valid)
2386                 dma_unmap_single(&adapter->pdev->dev, new_table_pa,
2387                                  rxConf->mfTableLen, PCI_DMA_TODEVICE);
2388         kfree(new_table);
2389 }
2390
2391 void
2392 vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter)
2393 {
2394         int i;
2395
2396         for (i = 0; i < adapter->num_rx_queues; i++)
2397                 vmxnet3_rq_destroy(&adapter->rx_queue[i], adapter);
2398 }
2399
2400
2401 /*
2402  *   Set up driver_shared based on settings in adapter.
2403  */
2404
2405 static void
2406 vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
2407 {
2408         struct Vmxnet3_DriverShared *shared = adapter->shared;
2409         struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
2410         struct Vmxnet3_TxQueueConf *tqc;
2411         struct Vmxnet3_RxQueueConf *rqc;
2412         int i;
2413
2414         memset(shared, 0, sizeof(*shared));
2415
2416         /* driver settings */
2417         shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC);
2418         devRead->misc.driverInfo.version = cpu_to_le32(
2419                                                 VMXNET3_DRIVER_VERSION_NUM);
2420         devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ?
2421                                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64);
2422         devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
2423         *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32(
2424                                 *((u32 *)&devRead->misc.driverInfo.gos));
2425         devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1);
2426         devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1);
2427
2428         devRead->misc.ddPA = cpu_to_le64(adapter->adapter_pa);
2429         devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter));
2430
2431         /* set up feature flags */
2432         if (adapter->netdev->features & NETIF_F_RXCSUM)
2433                 devRead->misc.uptFeatures |= UPT1_F_RXCSUM;
2434
2435         if (adapter->netdev->features & NETIF_F_LRO) {
2436                 devRead->misc.uptFeatures |= UPT1_F_LRO;
2437                 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS);
2438         }
2439         if (adapter->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
2440                 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
2441
2442         devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu);
2443         devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa);
2444         devRead->misc.queueDescLen = cpu_to_le32(
2445                 adapter->num_tx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
2446                 adapter->num_rx_queues * sizeof(struct Vmxnet3_RxQueueDesc));
2447
2448         /* tx queue settings */
2449         devRead->misc.numTxQueues =  adapter->num_tx_queues;
2450         for (i = 0; i < adapter->num_tx_queues; i++) {
2451                 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
2452                 BUG_ON(adapter->tx_queue[i].tx_ring.base == NULL);
2453                 tqc = &adapter->tqd_start[i].conf;
2454                 tqc->txRingBasePA   = cpu_to_le64(tq->tx_ring.basePA);
2455                 tqc->dataRingBasePA = cpu_to_le64(tq->data_ring.basePA);
2456                 tqc->compRingBasePA = cpu_to_le64(tq->comp_ring.basePA);
2457                 tqc->ddPA           = cpu_to_le64(tq->buf_info_pa);
2458                 tqc->txRingSize     = cpu_to_le32(tq->tx_ring.size);
2459                 tqc->dataRingSize   = cpu_to_le32(tq->data_ring.size);
2460                 tqc->txDataRingDescSize = cpu_to_le32(tq->txdata_desc_size);
2461                 tqc->compRingSize   = cpu_to_le32(tq->comp_ring.size);
2462                 tqc->ddLen          = cpu_to_le32(
2463                                         sizeof(struct vmxnet3_tx_buf_info) *
2464                                         tqc->txRingSize);
2465                 tqc->intrIdx        = tq->comp_ring.intr_idx;
2466         }
2467
2468         /* rx queue settings */
2469         devRead->misc.numRxQueues = adapter->num_rx_queues;
2470         for (i = 0; i < adapter->num_rx_queues; i++) {
2471                 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2472                 rqc = &adapter->rqd_start[i].conf;
2473                 rqc->rxRingBasePA[0] = cpu_to_le64(rq->rx_ring[0].basePA);
2474                 rqc->rxRingBasePA[1] = cpu_to_le64(rq->rx_ring[1].basePA);
2475                 rqc->compRingBasePA  = cpu_to_le64(rq->comp_ring.basePA);
2476                 rqc->ddPA            = cpu_to_le64(rq->buf_info_pa);
2477                 rqc->rxRingSize[0]   = cpu_to_le32(rq->rx_ring[0].size);
2478                 rqc->rxRingSize[1]   = cpu_to_le32(rq->rx_ring[1].size);
2479                 rqc->compRingSize    = cpu_to_le32(rq->comp_ring.size);
2480                 rqc->ddLen           = cpu_to_le32(
2481                                         sizeof(struct vmxnet3_rx_buf_info) *
2482                                         (rqc->rxRingSize[0] +
2483                                          rqc->rxRingSize[1]));
2484                 rqc->intrIdx         = rq->comp_ring.intr_idx;
2485                 if (VMXNET3_VERSION_GE_3(adapter)) {
2486                         rqc->rxDataRingBasePA =
2487                                 cpu_to_le64(rq->data_ring.basePA);
2488                         rqc->rxDataRingDescSize =
2489                                 cpu_to_le16(rq->data_ring.desc_size);
2490                 }
2491         }
2492
2493 #ifdef VMXNET3_RSS
2494         memset(adapter->rss_conf, 0, sizeof(*adapter->rss_conf));
2495
2496         if (adapter->rss) {
2497                 struct UPT1_RSSConf *rssConf = adapter->rss_conf;
2498
2499                 devRead->misc.uptFeatures |= UPT1_F_RSS;
2500                 devRead->misc.numRxQueues = adapter->num_rx_queues;
2501                 rssConf->hashType = UPT1_RSS_HASH_TYPE_TCP_IPV4 |
2502                                     UPT1_RSS_HASH_TYPE_IPV4 |
2503                                     UPT1_RSS_HASH_TYPE_TCP_IPV6 |
2504                                     UPT1_RSS_HASH_TYPE_IPV6;
2505                 rssConf->hashFunc = UPT1_RSS_HASH_FUNC_TOEPLITZ;
2506                 rssConf->hashKeySize = UPT1_RSS_MAX_KEY_SIZE;
2507                 rssConf->indTableSize = VMXNET3_RSS_IND_TABLE_SIZE;
2508                 netdev_rss_key_fill(rssConf->hashKey, sizeof(rssConf->hashKey));
2509
2510                 for (i = 0; i < rssConf->indTableSize; i++)
2511                         rssConf->indTable[i] = ethtool_rxfh_indir_default(
2512                                 i, adapter->num_rx_queues);
2513
2514                 devRead->rssConfDesc.confVer = 1;
2515                 devRead->rssConfDesc.confLen = cpu_to_le32(sizeof(*rssConf));
2516                 devRead->rssConfDesc.confPA =
2517                         cpu_to_le64(adapter->rss_conf_pa);
2518         }
2519
2520 #endif /* VMXNET3_RSS */
2521
2522         /* intr settings */
2523         devRead->intrConf.autoMask = adapter->intr.mask_mode ==
2524                                      VMXNET3_IMM_AUTO;
2525         devRead->intrConf.numIntrs = adapter->intr.num_intrs;
2526         for (i = 0; i < adapter->intr.num_intrs; i++)
2527                 devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i];
2528
2529         devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx;
2530         devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
2531
2532         /* rx filter settings */
2533         devRead->rxFilterConf.rxMode = 0;
2534         vmxnet3_restore_vlan(adapter);
2535         vmxnet3_write_mac_addr(adapter, adapter->netdev->dev_addr);
2536
2537         /* the rest are already zeroed */
2538 }
2539
2540 static void
2541 vmxnet3_init_coalesce(struct vmxnet3_adapter *adapter)
2542 {
2543         struct Vmxnet3_DriverShared *shared = adapter->shared;
2544         union Vmxnet3_CmdInfo *cmdInfo = &shared->cu.cmdInfo;
2545         unsigned long flags;
2546
2547         if (!VMXNET3_VERSION_GE_3(adapter))
2548                 return;
2549
2550         spin_lock_irqsave(&adapter->cmd_lock, flags);
2551         cmdInfo->varConf.confVer = 1;
2552         cmdInfo->varConf.confLen =
2553                 cpu_to_le32(sizeof(*adapter->coal_conf));
2554         cmdInfo->varConf.confPA  = cpu_to_le64(adapter->coal_conf_pa);
2555
2556         if (adapter->default_coal_mode) {
2557                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2558                                        VMXNET3_CMD_GET_COALESCE);
2559         } else {
2560                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2561                                        VMXNET3_CMD_SET_COALESCE);
2562         }
2563
2564         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2565 }
2566
2567 int
2568 vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
2569 {
2570         int err, i;
2571         u32 ret;
2572         unsigned long flags;
2573
2574         netdev_dbg(adapter->netdev, "%s: skb_buf_size %d, rx_buf_per_pkt %d,"
2575                 " ring sizes %u %u %u\n", adapter->netdev->name,
2576                 adapter->skb_buf_size, adapter->rx_buf_per_pkt,
2577                 adapter->tx_queue[0].tx_ring.size,
2578                 adapter->rx_queue[0].rx_ring[0].size,
2579                 adapter->rx_queue[0].rx_ring[1].size);
2580
2581         vmxnet3_tq_init_all(adapter);
2582         err = vmxnet3_rq_init_all(adapter);
2583         if (err) {
2584                 netdev_err(adapter->netdev,
2585                            "Failed to init rx queue error %d\n", err);
2586                 goto rq_err;
2587         }
2588
2589         err = vmxnet3_request_irqs(adapter);
2590         if (err) {
2591                 netdev_err(adapter->netdev,
2592                            "Failed to setup irq for error %d\n", err);
2593                 goto irq_err;
2594         }
2595
2596         vmxnet3_setup_driver_shared(adapter);
2597
2598         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO(
2599                                adapter->shared_pa));
2600         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
2601                                adapter->shared_pa));
2602         spin_lock_irqsave(&adapter->cmd_lock, flags);
2603         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2604                                VMXNET3_CMD_ACTIVATE_DEV);
2605         ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2606         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2607
2608         if (ret != 0) {
2609                 netdev_err(adapter->netdev,
2610                            "Failed to activate dev: error %u\n", ret);
2611                 err = -EINVAL;
2612                 goto activate_err;
2613         }
2614
2615         vmxnet3_init_coalesce(adapter);
2616
2617         for (i = 0; i < adapter->num_rx_queues; i++) {
2618                 VMXNET3_WRITE_BAR0_REG(adapter,
2619                                 VMXNET3_REG_RXPROD + i * VMXNET3_REG_ALIGN,
2620                                 adapter->rx_queue[i].rx_ring[0].next2fill);
2621                 VMXNET3_WRITE_BAR0_REG(adapter, (VMXNET3_REG_RXPROD2 +
2622                                 (i * VMXNET3_REG_ALIGN)),
2623                                 adapter->rx_queue[i].rx_ring[1].next2fill);
2624         }
2625
2626         /* Apply the rx filter settins last. */
2627         vmxnet3_set_mc(adapter->netdev);
2628
2629         /*
2630          * Check link state when first activating device. It will start the
2631          * tx queue if the link is up.
2632          */
2633         vmxnet3_check_link(adapter, true);
2634         for (i = 0; i < adapter->num_rx_queues; i++)
2635                 napi_enable(&adapter->rx_queue[i].napi);
2636         vmxnet3_enable_all_intrs(adapter);
2637         clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
2638         return 0;
2639
2640 activate_err:
2641         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0);
2642         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0);
2643         vmxnet3_free_irqs(adapter);
2644 irq_err:
2645 rq_err:
2646         /* free up buffers we allocated */
2647         vmxnet3_rq_cleanup_all(adapter);
2648         return err;
2649 }
2650
2651
2652 void
2653 vmxnet3_reset_dev(struct vmxnet3_adapter *adapter)
2654 {
2655         unsigned long flags;
2656         spin_lock_irqsave(&adapter->cmd_lock, flags);
2657         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
2658         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2659 }
2660
2661
2662 int
2663 vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter)
2664 {
2665         int i;
2666         unsigned long flags;
2667         if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state))
2668                 return 0;
2669
2670
2671         spin_lock_irqsave(&adapter->cmd_lock, flags);
2672         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2673                                VMXNET3_CMD_QUIESCE_DEV);
2674         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2675         vmxnet3_disable_all_intrs(adapter);
2676
2677         for (i = 0; i < adapter->num_rx_queues; i++)
2678                 napi_disable(&adapter->rx_queue[i].napi);
2679         netif_tx_disable(adapter->netdev);
2680         adapter->link_speed = 0;
2681         netif_carrier_off(adapter->netdev);
2682
2683         vmxnet3_tq_cleanup_all(adapter);
2684         vmxnet3_rq_cleanup_all(adapter);
2685         vmxnet3_free_irqs(adapter);
2686         return 0;
2687 }
2688
2689
2690 static void
2691 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2692 {
2693         u32 tmp;
2694
2695         tmp = *(u32 *)mac;
2696         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp);
2697
2698         tmp = (mac[5] << 8) | mac[4];
2699         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp);
2700 }
2701
2702
2703 static int
2704 vmxnet3_set_mac_addr(struct net_device *netdev, void *p)
2705 {
2706         struct sockaddr *addr = p;
2707         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2708
2709         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2710         vmxnet3_write_mac_addr(adapter, addr->sa_data);
2711
2712         return 0;
2713 }
2714
2715
2716 /* ==================== initialization and cleanup routines ============ */
2717
2718 static int
2719 vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter)
2720 {
2721         int err;
2722         unsigned long mmio_start, mmio_len;
2723         struct pci_dev *pdev = adapter->pdev;
2724
2725         err = pci_enable_device(pdev);
2726         if (err) {
2727                 dev_err(&pdev->dev, "Failed to enable adapter: error %d\n", err);
2728                 return err;
2729         }
2730
2731         err = pci_request_selected_regions(pdev, (1 << 2) - 1,
2732                                            vmxnet3_driver_name);
2733         if (err) {
2734                 dev_err(&pdev->dev,
2735                         "Failed to request region for adapter: error %d\n", err);
2736                 goto err_enable_device;
2737         }
2738
2739         pci_set_master(pdev);
2740
2741         mmio_start = pci_resource_start(pdev, 0);
2742         mmio_len = pci_resource_len(pdev, 0);
2743         adapter->hw_addr0 = ioremap(mmio_start, mmio_len);
2744         if (!adapter->hw_addr0) {
2745                 dev_err(&pdev->dev, "Failed to map bar0\n");
2746                 err = -EIO;
2747                 goto err_ioremap;
2748         }
2749
2750         mmio_start = pci_resource_start(pdev, 1);
2751         mmio_len = pci_resource_len(pdev, 1);
2752         adapter->hw_addr1 = ioremap(mmio_start, mmio_len);
2753         if (!adapter->hw_addr1) {
2754                 dev_err(&pdev->dev, "Failed to map bar1\n");
2755                 err = -EIO;
2756                 goto err_bar1;
2757         }
2758         return 0;
2759
2760 err_bar1:
2761         iounmap(adapter->hw_addr0);
2762 err_ioremap:
2763         pci_release_selected_regions(pdev, (1 << 2) - 1);
2764 err_enable_device:
2765         pci_disable_device(pdev);
2766         return err;
2767 }
2768
2769
2770 static void
2771 vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter)
2772 {
2773         BUG_ON(!adapter->pdev);
2774
2775         iounmap(adapter->hw_addr0);
2776         iounmap(adapter->hw_addr1);
2777         pci_release_selected_regions(adapter->pdev, (1 << 2) - 1);
2778         pci_disable_device(adapter->pdev);
2779 }
2780
2781
2782 static void
2783 vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter)
2784 {
2785         size_t sz, i, ring0_size, ring1_size, comp_size;
2786         if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE -
2787                                     VMXNET3_MAX_ETH_HDR_SIZE) {
2788                 adapter->skb_buf_size = adapter->netdev->mtu +
2789                                         VMXNET3_MAX_ETH_HDR_SIZE;
2790                 if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE)
2791                         adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE;
2792
2793                 adapter->rx_buf_per_pkt = 1;
2794         } else {
2795                 adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE;
2796                 sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE +
2797                                             VMXNET3_MAX_ETH_HDR_SIZE;
2798                 adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE;
2799         }
2800
2801         /*
2802          * for simplicity, force the ring0 size to be a multiple of
2803          * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN
2804          */
2805         sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
2806         ring0_size = adapter->rx_queue[0].rx_ring[0].size;
2807         ring0_size = (ring0_size + sz - 1) / sz * sz;
2808         ring0_size = min_t(u32, ring0_size, VMXNET3_RX_RING_MAX_SIZE /
2809                            sz * sz);
2810         ring1_size = adapter->rx_queue[0].rx_ring[1].size;
2811         ring1_size = (ring1_size + sz - 1) / sz * sz;
2812         ring1_size = min_t(u32, ring1_size, VMXNET3_RX_RING2_MAX_SIZE /
2813                            sz * sz);
2814         comp_size = ring0_size + ring1_size;
2815
2816         for (i = 0; i < adapter->num_rx_queues; i++) {
2817                 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2818
2819                 rq->rx_ring[0].size = ring0_size;
2820                 rq->rx_ring[1].size = ring1_size;
2821                 rq->comp_ring.size = comp_size;
2822         }
2823 }
2824
2825
2826 int
2827 vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size,
2828                       u32 rx_ring_size, u32 rx_ring2_size,
2829                       u16 txdata_desc_size, u16 rxdata_desc_size)
2830 {
2831         int err = 0, i;
2832
2833         for (i = 0; i < adapter->num_tx_queues; i++) {
2834                 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
2835                 tq->tx_ring.size   = tx_ring_size;
2836                 tq->data_ring.size = tx_ring_size;
2837                 tq->comp_ring.size = tx_ring_size;
2838                 tq->txdata_desc_size = txdata_desc_size;
2839                 tq->shared = &adapter->tqd_start[i].ctrl;
2840                 tq->stopped = true;
2841                 tq->adapter = adapter;
2842                 tq->qid = i;
2843                 err = vmxnet3_tq_create(tq, adapter);
2844                 /*
2845                  * Too late to change num_tx_queues. We cannot do away with
2846                  * lesser number of queues than what we asked for
2847                  */
2848                 if (err)
2849                         goto queue_err;
2850         }
2851
2852         adapter->rx_queue[0].rx_ring[0].size = rx_ring_size;
2853         adapter->rx_queue[0].rx_ring[1].size = rx_ring2_size;
2854         vmxnet3_adjust_rx_ring_size(adapter);
2855
2856         adapter->rxdataring_enabled = VMXNET3_VERSION_GE_3(adapter);
2857         for (i = 0; i < adapter->num_rx_queues; i++) {
2858                 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2859                 /* qid and qid2 for rx queues will be assigned later when num
2860                  * of rx queues is finalized after allocating intrs */
2861                 rq->shared = &adapter->rqd_start[i].ctrl;
2862                 rq->adapter = adapter;
2863                 rq->data_ring.desc_size = rxdata_desc_size;
2864                 err = vmxnet3_rq_create(rq, adapter);
2865                 if (err) {
2866                         if (i == 0) {
2867                                 netdev_err(adapter->netdev,
2868                                            "Could not allocate any rx queues. "
2869                                            "Aborting.\n");
2870                                 goto queue_err;
2871                         } else {
2872                                 netdev_info(adapter->netdev,
2873                                             "Number of rx queues changed "
2874                                             "to : %d.\n", i);
2875                                 adapter->num_rx_queues = i;
2876                                 err = 0;
2877                                 break;
2878                         }
2879                 }
2880         }
2881
2882         if (!adapter->rxdataring_enabled)
2883                 vmxnet3_rq_destroy_all_rxdataring(adapter);
2884
2885         return err;
2886 queue_err:
2887         vmxnet3_tq_destroy_all(adapter);
2888         return err;
2889 }
2890
2891 static int
2892 vmxnet3_open(struct net_device *netdev)
2893 {
2894         struct vmxnet3_adapter *adapter;
2895         int err, i;
2896
2897         adapter = netdev_priv(netdev);
2898
2899         for (i = 0; i < adapter->num_tx_queues; i++)
2900                 spin_lock_init(&adapter->tx_queue[i].tx_lock);
2901
2902         if (VMXNET3_VERSION_GE_3(adapter)) {
2903                 unsigned long flags;
2904                 u16 txdata_desc_size;
2905
2906                 spin_lock_irqsave(&adapter->cmd_lock, flags);
2907                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2908                                        VMXNET3_CMD_GET_TXDATA_DESC_SIZE);
2909                 txdata_desc_size = VMXNET3_READ_BAR1_REG(adapter,
2910                                                          VMXNET3_REG_CMD);
2911                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2912
2913                 if ((txdata_desc_size < VMXNET3_TXDATA_DESC_MIN_SIZE) ||
2914                     (txdata_desc_size > VMXNET3_TXDATA_DESC_MAX_SIZE) ||
2915                     (txdata_desc_size & VMXNET3_TXDATA_DESC_SIZE_MASK)) {
2916                         adapter->txdata_desc_size =
2917                                 sizeof(struct Vmxnet3_TxDataDesc);
2918                 } else {
2919                         adapter->txdata_desc_size = txdata_desc_size;
2920                 }
2921         } else {
2922                 adapter->txdata_desc_size = sizeof(struct Vmxnet3_TxDataDesc);
2923         }
2924
2925         err = vmxnet3_create_queues(adapter,
2926                                     adapter->tx_ring_size,
2927                                     adapter->rx_ring_size,
2928                                     adapter->rx_ring2_size,
2929                                     adapter->txdata_desc_size,
2930                                     adapter->rxdata_desc_size);
2931         if (err)
2932                 goto queue_err;
2933
2934         err = vmxnet3_activate_dev(adapter);
2935         if (err)
2936                 goto activate_err;
2937
2938         return 0;
2939
2940 activate_err:
2941         vmxnet3_rq_destroy_all(adapter);
2942         vmxnet3_tq_destroy_all(adapter);
2943 queue_err:
2944         return err;
2945 }
2946
2947
2948 static int
2949 vmxnet3_close(struct net_device *netdev)
2950 {
2951         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2952
2953         /*
2954          * Reset_work may be in the middle of resetting the device, wait for its
2955          * completion.
2956          */
2957         while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2958                 usleep_range(1000, 2000);
2959
2960         vmxnet3_quiesce_dev(adapter);
2961
2962         vmxnet3_rq_destroy_all(adapter);
2963         vmxnet3_tq_destroy_all(adapter);
2964
2965         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2966
2967
2968         return 0;
2969 }
2970
2971
2972 void
2973 vmxnet3_force_close(struct vmxnet3_adapter *adapter)
2974 {
2975         int i;
2976
2977         /*
2978          * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise
2979          * vmxnet3_close() will deadlock.
2980          */
2981         BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state));
2982
2983         /* we need to enable NAPI, otherwise dev_close will deadlock */
2984         for (i = 0; i < adapter->num_rx_queues; i++)
2985                 napi_enable(&adapter->rx_queue[i].napi);
2986         /*
2987          * Need to clear the quiesce bit to ensure that vmxnet3_close
2988          * can quiesce the device properly
2989          */
2990         clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
2991         dev_close(adapter->netdev);
2992 }
2993
2994
2995 static int
2996 vmxnet3_change_mtu(struct net_device *netdev, int new_mtu)
2997 {
2998         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2999         int err = 0;
3000
3001         netdev->mtu = new_mtu;
3002
3003         /*
3004          * Reset_work may be in the middle of resetting the device, wait for its
3005          * completion.
3006          */
3007         while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
3008                 usleep_range(1000, 2000);
3009
3010         if (netif_running(netdev)) {
3011                 vmxnet3_quiesce_dev(adapter);
3012                 vmxnet3_reset_dev(adapter);
3013
3014                 /* we need to re-create the rx queue based on the new mtu */
3015                 vmxnet3_rq_destroy_all(adapter);
3016                 vmxnet3_adjust_rx_ring_size(adapter);
3017                 err = vmxnet3_rq_create_all(adapter);
3018                 if (err) {
3019                         netdev_err(netdev,
3020                                    "failed to re-create rx queues, "
3021                                    " error %d. Closing it.\n", err);
3022                         goto out;
3023                 }
3024
3025                 err = vmxnet3_activate_dev(adapter);
3026                 if (err) {
3027                         netdev_err(netdev,
3028                                    "failed to re-activate, error %d. "
3029                                    "Closing it\n", err);
3030                         goto out;
3031                 }
3032         }
3033
3034 out:
3035         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
3036         if (err)
3037                 vmxnet3_force_close(adapter);
3038
3039         return err;
3040 }
3041
3042
3043 static void
3044 vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64)
3045 {
3046         struct net_device *netdev = adapter->netdev;
3047
3048         netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM |
3049                 NETIF_F_HW_CSUM | NETIF_F_HW_VLAN_CTAG_TX |
3050                 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_TSO | NETIF_F_TSO6 |
3051                 NETIF_F_LRO;
3052         if (dma64)
3053                 netdev->hw_features |= NETIF_F_HIGHDMA;
3054         netdev->vlan_features = netdev->hw_features &
3055                                 ~(NETIF_F_HW_VLAN_CTAG_TX |
3056                                   NETIF_F_HW_VLAN_CTAG_RX);
3057         netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
3058 }
3059
3060
3061 static void
3062 vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
3063 {
3064         u32 tmp;
3065
3066         tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL);
3067         *(u32 *)mac = tmp;
3068
3069         tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH);
3070         mac[4] = tmp & 0xff;
3071         mac[5] = (tmp >> 8) & 0xff;
3072 }
3073
3074 #ifdef CONFIG_PCI_MSI
3075
3076 /*
3077  * Enable MSIx vectors.
3078  * Returns :
3079  *      VMXNET3_LINUX_MIN_MSIX_VECT when only minimum number of vectors required
3080  *       were enabled.
3081  *      number of vectors which were enabled otherwise (this number is greater
3082  *       than VMXNET3_LINUX_MIN_MSIX_VECT)
3083  */
3084
3085 static int
3086 vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter *adapter, int nvec)
3087 {
3088         int ret = pci_enable_msix_range(adapter->pdev,
3089                                         adapter->intr.msix_entries, nvec, nvec);
3090
3091         if (ret == -ENOSPC && nvec > VMXNET3_LINUX_MIN_MSIX_VECT) {
3092                 dev_err(&adapter->netdev->dev,
3093                         "Failed to enable %d MSI-X, trying %d\n",
3094                         nvec, VMXNET3_LINUX_MIN_MSIX_VECT);
3095
3096                 ret = pci_enable_msix_range(adapter->pdev,
3097                                             adapter->intr.msix_entries,
3098                                             VMXNET3_LINUX_MIN_MSIX_VECT,
3099                                             VMXNET3_LINUX_MIN_MSIX_VECT);
3100         }
3101
3102         if (ret < 0) {
3103                 dev_err(&adapter->netdev->dev,
3104                         "Failed to enable MSI-X, error: %d\n", ret);
3105         }
3106
3107         return ret;
3108 }
3109
3110
3111 #endif /* CONFIG_PCI_MSI */
3112
3113 static void
3114 vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
3115 {
3116         u32 cfg;
3117         unsigned long flags;
3118
3119         /* intr settings */
3120         spin_lock_irqsave(&adapter->cmd_lock, flags);
3121         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3122                                VMXNET3_CMD_GET_CONF_INTR);
3123         cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
3124         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3125         adapter->intr.type = cfg & 0x3;
3126         adapter->intr.mask_mode = (cfg >> 2) & 0x3;
3127
3128         if (adapter->intr.type == VMXNET3_IT_AUTO) {
3129                 adapter->intr.type = VMXNET3_IT_MSIX;
3130         }
3131
3132 #ifdef CONFIG_PCI_MSI
3133         if (adapter->intr.type == VMXNET3_IT_MSIX) {
3134                 int i, nvec;
3135
3136                 nvec  = adapter->share_intr == VMXNET3_INTR_TXSHARE ?
3137                         1 : adapter->num_tx_queues;
3138                 nvec += adapter->share_intr == VMXNET3_INTR_BUDDYSHARE ?
3139                         0 : adapter->num_rx_queues;
3140                 nvec += 1;      /* for link event */
3141                 nvec = nvec > VMXNET3_LINUX_MIN_MSIX_VECT ?
3142                        nvec : VMXNET3_LINUX_MIN_MSIX_VECT;
3143
3144                 for (i = 0; i < nvec; i++)
3145                         adapter->intr.msix_entries[i].entry = i;
3146
3147                 nvec = vmxnet3_acquire_msix_vectors(adapter, nvec);
3148                 if (nvec < 0)
3149                         goto msix_err;
3150
3151                 /* If we cannot allocate one MSIx vector per queue
3152                  * then limit the number of rx queues to 1
3153                  */
3154                 if (nvec == VMXNET3_LINUX_MIN_MSIX_VECT) {
3155                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE
3156                             || adapter->num_rx_queues != 1) {
3157                                 adapter->share_intr = VMXNET3_INTR_TXSHARE;
3158                                 netdev_err(adapter->netdev,
3159                                            "Number of rx queues : 1\n");
3160                                 adapter->num_rx_queues = 1;
3161                         }
3162                 }
3163
3164                 adapter->intr.num_intrs = nvec;
3165                 return;
3166
3167 msix_err:
3168                 /* If we cannot allocate MSIx vectors use only one rx queue */
3169                 dev_info(&adapter->pdev->dev,
3170                          "Failed to enable MSI-X, error %d. "
3171                          "Limiting #rx queues to 1, try MSI.\n", nvec);
3172
3173                 adapter->intr.type = VMXNET3_IT_MSI;
3174         }
3175
3176         if (adapter->intr.type == VMXNET3_IT_MSI) {
3177                 if (!pci_enable_msi(adapter->pdev)) {
3178                         adapter->num_rx_queues = 1;
3179                         adapter->intr.num_intrs = 1;
3180                         return;
3181                 }
3182         }
3183 #endif /* CONFIG_PCI_MSI */
3184
3185         adapter->num_rx_queues = 1;
3186         dev_info(&adapter->netdev->dev,
3187                  "Using INTx interrupt, #Rx queues: 1.\n");
3188         adapter->intr.type = VMXNET3_IT_INTX;
3189
3190         /* INT-X related setting */
3191         adapter->intr.num_intrs = 1;
3192 }
3193
3194
3195 static void
3196 vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter)
3197 {
3198         if (adapter->intr.type == VMXNET3_IT_MSIX)
3199                 pci_disable_msix(adapter->pdev);
3200         else if (adapter->intr.type == VMXNET3_IT_MSI)
3201                 pci_disable_msi(adapter->pdev);
3202         else
3203                 BUG_ON(adapter->intr.type != VMXNET3_IT_INTX);
3204 }
3205
3206
3207 static void
3208 vmxnet3_tx_timeout(struct net_device *netdev)
3209 {
3210         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3211         adapter->tx_timeout_count++;
3212
3213         netdev_err(adapter->netdev, "tx hang\n");
3214         schedule_work(&adapter->work);
3215 }
3216
3217
3218 static void
3219 vmxnet3_reset_work(struct work_struct *data)
3220 {
3221         struct vmxnet3_adapter *adapter;
3222
3223         adapter = container_of(data, struct vmxnet3_adapter, work);
3224
3225         /* if another thread is resetting the device, no need to proceed */
3226         if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
3227                 return;
3228
3229         /* if the device is closed, we must leave it alone */
3230         rtnl_lock();
3231         if (netif_running(adapter->netdev)) {
3232                 netdev_notice(adapter->netdev, "resetting\n");
3233                 vmxnet3_quiesce_dev(adapter);
3234                 vmxnet3_reset_dev(adapter);
3235                 vmxnet3_activate_dev(adapter);
3236         } else {
3237                 netdev_info(adapter->netdev, "already closed\n");
3238         }
3239         rtnl_unlock();
3240
3241         netif_wake_queue(adapter->netdev);
3242         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
3243 }
3244
3245
3246 static int
3247 vmxnet3_probe_device(struct pci_dev *pdev,
3248                      const struct pci_device_id *id)
3249 {
3250         static const struct net_device_ops vmxnet3_netdev_ops = {
3251                 .ndo_open = vmxnet3_open,
3252                 .ndo_stop = vmxnet3_close,
3253                 .ndo_start_xmit = vmxnet3_xmit_frame,
3254                 .ndo_set_mac_address = vmxnet3_set_mac_addr,
3255                 .ndo_change_mtu = vmxnet3_change_mtu,
3256                 .ndo_set_features = vmxnet3_set_features,
3257                 .ndo_get_stats64 = vmxnet3_get_stats64,
3258                 .ndo_tx_timeout = vmxnet3_tx_timeout,
3259                 .ndo_set_rx_mode = vmxnet3_set_mc,
3260                 .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid,
3261                 .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid,
3262 #ifdef CONFIG_NET_POLL_CONTROLLER
3263                 .ndo_poll_controller = vmxnet3_netpoll,
3264 #endif
3265         };
3266         int err;
3267         bool dma64;
3268         u32 ver;
3269         struct net_device *netdev;
3270         struct vmxnet3_adapter *adapter;
3271         u8 mac[ETH_ALEN];
3272         int size;
3273         int num_tx_queues;
3274         int num_rx_queues;
3275
3276         if (!pci_msi_enabled())
3277                 enable_mq = 0;
3278
3279 #ifdef VMXNET3_RSS
3280         if (enable_mq)
3281                 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES,
3282                                     (int)num_online_cpus());
3283         else
3284 #endif
3285                 num_rx_queues = 1;
3286         num_rx_queues = rounddown_pow_of_two(num_rx_queues);
3287
3288         if (enable_mq)
3289                 num_tx_queues = min(VMXNET3_DEVICE_MAX_TX_QUEUES,
3290                                     (int)num_online_cpus());
3291         else
3292                 num_tx_queues = 1;
3293
3294         num_tx_queues = rounddown_pow_of_two(num_tx_queues);
3295         netdev = alloc_etherdev_mq(sizeof(struct vmxnet3_adapter),
3296                                    max(num_tx_queues, num_rx_queues));
3297         dev_info(&pdev->dev,
3298                  "# of Tx queues : %d, # of Rx queues : %d\n",
3299                  num_tx_queues, num_rx_queues);
3300
3301         if (!netdev)
3302                 return -ENOMEM;
3303
3304         pci_set_drvdata(pdev, netdev);
3305         adapter = netdev_priv(netdev);
3306         adapter->netdev = netdev;
3307         adapter->pdev = pdev;
3308
3309         adapter->tx_ring_size = VMXNET3_DEF_TX_RING_SIZE;
3310         adapter->rx_ring_size = VMXNET3_DEF_RX_RING_SIZE;
3311         adapter->rx_ring2_size = VMXNET3_DEF_RX_RING2_SIZE;
3312
3313         if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
3314                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
3315                         dev_err(&pdev->dev,
3316                                 "pci_set_consistent_dma_mask failed\n");
3317                         err = -EIO;
3318                         goto err_set_mask;
3319                 }
3320                 dma64 = true;
3321         } else {
3322                 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
3323                         dev_err(&pdev->dev,
3324                                 "pci_set_dma_mask failed\n");
3325                         err = -EIO;
3326                         goto err_set_mask;
3327                 }
3328                 dma64 = false;
3329         }
3330
3331         spin_lock_init(&adapter->cmd_lock);
3332         adapter->adapter_pa = dma_map_single(&adapter->pdev->dev, adapter,
3333                                              sizeof(struct vmxnet3_adapter),
3334                                              PCI_DMA_TODEVICE);
3335         if (dma_mapping_error(&adapter->pdev->dev, adapter->adapter_pa)) {
3336                 dev_err(&pdev->dev, "Failed to map dma\n");
3337                 err = -EFAULT;
3338                 goto err_set_mask;
3339         }
3340         adapter->shared = dma_alloc_coherent(
3341                                 &adapter->pdev->dev,
3342                                 sizeof(struct Vmxnet3_DriverShared),
3343                                 &adapter->shared_pa, GFP_KERNEL);
3344         if (!adapter->shared) {
3345                 dev_err(&pdev->dev, "Failed to allocate memory\n");
3346                 err = -ENOMEM;
3347                 goto err_alloc_shared;
3348         }
3349
3350         adapter->num_rx_queues = num_rx_queues;
3351         adapter->num_tx_queues = num_tx_queues;
3352         adapter->rx_buf_per_pkt = 1;
3353
3354         size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues;
3355         size += sizeof(struct Vmxnet3_RxQueueDesc) * adapter->num_rx_queues;
3356         adapter->tqd_start = dma_alloc_coherent(&adapter->pdev->dev, size,
3357                                                 &adapter->queue_desc_pa,
3358                                                 GFP_KERNEL);
3359
3360         if (!adapter->tqd_start) {
3361                 dev_err(&pdev->dev, "Failed to allocate memory\n");
3362                 err = -ENOMEM;
3363                 goto err_alloc_queue_desc;
3364         }
3365         adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start +
3366                                                             adapter->num_tx_queues);
3367
3368         adapter->pm_conf = dma_alloc_coherent(&adapter->pdev->dev,
3369                                               sizeof(struct Vmxnet3_PMConf),
3370                                               &adapter->pm_conf_pa,
3371                                               GFP_KERNEL);
3372         if (adapter->pm_conf == NULL) {
3373                 err = -ENOMEM;
3374                 goto err_alloc_pm;
3375         }
3376
3377 #ifdef VMXNET3_RSS
3378
3379         adapter->rss_conf = dma_alloc_coherent(&adapter->pdev->dev,
3380                                                sizeof(struct UPT1_RSSConf),
3381                                                &adapter->rss_conf_pa,
3382                                                GFP_KERNEL);
3383         if (adapter->rss_conf == NULL) {
3384                 err = -ENOMEM;
3385                 goto err_alloc_rss;
3386         }
3387 #endif /* VMXNET3_RSS */
3388
3389         err = vmxnet3_alloc_pci_resources(adapter);
3390         if (err < 0)
3391                 goto err_alloc_pci;
3392
3393         ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS);
3394         if (ver & (1 << VMXNET3_REV_3)) {
3395                 VMXNET3_WRITE_BAR1_REG(adapter,
3396                                        VMXNET3_REG_VRRS,
3397                                        1 << VMXNET3_REV_3);
3398                 adapter->version = VMXNET3_REV_3 + 1;
3399         } else if (ver & (1 << VMXNET3_REV_2)) {
3400                 VMXNET3_WRITE_BAR1_REG(adapter,
3401                                        VMXNET3_REG_VRRS,
3402                                        1 << VMXNET3_REV_2);
3403                 adapter->version = VMXNET3_REV_2 + 1;
3404         } else if (ver & (1 << VMXNET3_REV_1)) {
3405                 VMXNET3_WRITE_BAR1_REG(adapter,
3406                                        VMXNET3_REG_VRRS,
3407                                        1 << VMXNET3_REV_1);
3408                 adapter->version = VMXNET3_REV_1 + 1;
3409         } else {
3410                 dev_err(&pdev->dev,
3411                         "Incompatible h/w version (0x%x) for adapter\n", ver);
3412                 err = -EBUSY;
3413                 goto err_ver;
3414         }
3415         dev_dbg(&pdev->dev, "Using device version %d\n", adapter->version);
3416
3417         ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS);
3418         if (ver & 1) {
3419                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1);
3420         } else {
3421                 dev_err(&pdev->dev,
3422                         "Incompatible upt version (0x%x) for adapter\n", ver);
3423                 err = -EBUSY;
3424                 goto err_ver;
3425         }
3426
3427         if (VMXNET3_VERSION_GE_3(adapter)) {
3428                 adapter->coal_conf =
3429                         dma_alloc_coherent(&adapter->pdev->dev,
3430                                            sizeof(struct Vmxnet3_CoalesceScheme)
3431                                            ,
3432                                            &adapter->coal_conf_pa,
3433                                            GFP_KERNEL);
3434                 if (!adapter->coal_conf) {
3435                         err = -ENOMEM;
3436                         goto err_ver;
3437                 }
3438                 memset(adapter->coal_conf, 0, sizeof(*adapter->coal_conf));
3439                 adapter->coal_conf->coalMode = VMXNET3_COALESCE_DISABLED;
3440                 adapter->default_coal_mode = true;
3441         }
3442
3443         SET_NETDEV_DEV(netdev, &pdev->dev);
3444         vmxnet3_declare_features(adapter, dma64);
3445
3446         adapter->rxdata_desc_size = VMXNET3_VERSION_GE_3(adapter) ?
3447                 VMXNET3_DEF_RXDATA_DESC_SIZE : 0;
3448
3449         if (adapter->num_tx_queues == adapter->num_rx_queues)
3450                 adapter->share_intr = VMXNET3_INTR_BUDDYSHARE;
3451         else
3452                 adapter->share_intr = VMXNET3_INTR_DONTSHARE;
3453
3454         vmxnet3_alloc_intr_resources(adapter);
3455
3456 #ifdef VMXNET3_RSS
3457         if (adapter->num_rx_queues > 1 &&
3458             adapter->intr.type == VMXNET3_IT_MSIX) {
3459                 adapter->rss = true;
3460                 netdev->hw_features |= NETIF_F_RXHASH;
3461                 netdev->features |= NETIF_F_RXHASH;
3462                 dev_dbg(&pdev->dev, "RSS is enabled.\n");
3463         } else {
3464                 adapter->rss = false;
3465         }
3466 #endif
3467
3468         vmxnet3_read_mac_addr(adapter, mac);
3469         memcpy(netdev->dev_addr,  mac, netdev->addr_len);
3470
3471         netdev->netdev_ops = &vmxnet3_netdev_ops;
3472         vmxnet3_set_ethtool_ops(netdev);
3473         netdev->watchdog_timeo = 5 * HZ;
3474
3475         /* MTU range: 60 - 9000 */
3476         netdev->min_mtu = VMXNET3_MIN_MTU;
3477         netdev->max_mtu = VMXNET3_MAX_MTU;
3478
3479         INIT_WORK(&adapter->work, vmxnet3_reset_work);
3480         set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
3481
3482         if (adapter->intr.type == VMXNET3_IT_MSIX) {
3483                 int i;
3484                 for (i = 0; i < adapter->num_rx_queues; i++) {
3485                         netif_napi_add(adapter->netdev,
3486                                        &adapter->rx_queue[i].napi,
3487                                        vmxnet3_poll_rx_only, 64);
3488                 }
3489         } else {
3490                 netif_napi_add(adapter->netdev, &adapter->rx_queue[0].napi,
3491                                vmxnet3_poll, 64);
3492         }
3493
3494         netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues);
3495         netif_set_real_num_rx_queues(adapter->netdev, adapter->num_rx_queues);
3496
3497         netif_carrier_off(netdev);
3498         err = register_netdev(netdev);
3499
3500         if (err) {
3501                 dev_err(&pdev->dev, "Failed to register adapter\n");
3502                 goto err_register;
3503         }
3504
3505         vmxnet3_check_link(adapter, false);
3506         return 0;
3507
3508 err_register:
3509         if (VMXNET3_VERSION_GE_3(adapter)) {
3510                 dma_free_coherent(&adapter->pdev->dev,
3511                                   sizeof(struct Vmxnet3_CoalesceScheme),
3512                                   adapter->coal_conf, adapter->coal_conf_pa);
3513         }
3514         vmxnet3_free_intr_resources(adapter);
3515 err_ver:
3516         vmxnet3_free_pci_resources(adapter);
3517 err_alloc_pci:
3518 #ifdef VMXNET3_RSS
3519         dma_free_coherent(&adapter->pdev->dev, sizeof(struct UPT1_RSSConf),
3520                           adapter->rss_conf, adapter->rss_conf_pa);
3521 err_alloc_rss:
3522 #endif
3523         dma_free_coherent(&adapter->pdev->dev, sizeof(struct Vmxnet3_PMConf),
3524                           adapter->pm_conf, adapter->pm_conf_pa);
3525 err_alloc_pm:
3526         dma_free_coherent(&adapter->pdev->dev, size, adapter->tqd_start,
3527                           adapter->queue_desc_pa);
3528 err_alloc_queue_desc:
3529         dma_free_coherent(&adapter->pdev->dev,
3530                           sizeof(struct Vmxnet3_DriverShared),
3531                           adapter->shared, adapter->shared_pa);
3532 err_alloc_shared:
3533         dma_unmap_single(&adapter->pdev->dev, adapter->adapter_pa,
3534                          sizeof(struct vmxnet3_adapter), PCI_DMA_TODEVICE);
3535 err_set_mask:
3536         free_netdev(netdev);
3537         return err;
3538 }
3539
3540
3541 static void
3542 vmxnet3_remove_device(struct pci_dev *pdev)
3543 {
3544         struct net_device *netdev = pci_get_drvdata(pdev);
3545         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3546         int size = 0;
3547         int num_rx_queues;
3548
3549 #ifdef VMXNET3_RSS
3550         if (enable_mq)
3551                 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES,
3552                                     (int)num_online_cpus());
3553         else
3554 #endif
3555                 num_rx_queues = 1;
3556         num_rx_queues = rounddown_pow_of_two(num_rx_queues);
3557
3558         cancel_work_sync(&adapter->work);
3559
3560         unregister_netdev(netdev);
3561
3562         vmxnet3_free_intr_resources(adapter);
3563         vmxnet3_free_pci_resources(adapter);
3564         if (VMXNET3_VERSION_GE_3(adapter)) {
3565                 dma_free_coherent(&adapter->pdev->dev,
3566                                   sizeof(struct Vmxnet3_CoalesceScheme),
3567                                   adapter->coal_conf, adapter->coal_conf_pa);
3568         }
3569 #ifdef VMXNET3_RSS
3570         dma_free_coherent(&adapter->pdev->dev, sizeof(struct UPT1_RSSConf),
3571                           adapter->rss_conf, adapter->rss_conf_pa);
3572 #endif
3573         dma_free_coherent(&adapter->pdev->dev, sizeof(struct Vmxnet3_PMConf),
3574                           adapter->pm_conf, adapter->pm_conf_pa);
3575
3576         size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues;
3577         size += sizeof(struct Vmxnet3_RxQueueDesc) * num_rx_queues;
3578         dma_free_coherent(&adapter->pdev->dev, size, adapter->tqd_start,
3579                           adapter->queue_desc_pa);
3580         dma_free_coherent(&adapter->pdev->dev,
3581                           sizeof(struct Vmxnet3_DriverShared),
3582                           adapter->shared, adapter->shared_pa);
3583         dma_unmap_single(&adapter->pdev->dev, adapter->adapter_pa,
3584                          sizeof(struct vmxnet3_adapter), PCI_DMA_TODEVICE);
3585         free_netdev(netdev);
3586 }
3587
3588 static void vmxnet3_shutdown_device(struct pci_dev *pdev)
3589 {
3590         struct net_device *netdev = pci_get_drvdata(pdev);
3591         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3592         unsigned long flags;
3593
3594         /* Reset_work may be in the middle of resetting the device, wait for its
3595          * completion.
3596          */
3597         while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
3598                 usleep_range(1000, 2000);
3599
3600         if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED,
3601                              &adapter->state)) {
3602                 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
3603                 return;
3604         }
3605         spin_lock_irqsave(&adapter->cmd_lock, flags);
3606         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3607                                VMXNET3_CMD_QUIESCE_DEV);
3608         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3609         vmxnet3_disable_all_intrs(adapter);
3610
3611         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
3612 }
3613
3614
3615 #ifdef CONFIG_PM
3616
3617 static int
3618 vmxnet3_suspend(struct device *device)
3619 {
3620         struct pci_dev *pdev = to_pci_dev(device);
3621         struct net_device *netdev = pci_get_drvdata(pdev);
3622         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3623         struct Vmxnet3_PMConf *pmConf;
3624         struct ethhdr *ehdr;
3625         struct arphdr *ahdr;
3626         u8 *arpreq;
3627         struct in_device *in_dev;
3628         struct in_ifaddr *ifa;
3629         unsigned long flags;
3630         int i = 0;
3631
3632         if (!netif_running(netdev))
3633                 return 0;
3634
3635         for (i = 0; i < adapter->num_rx_queues; i++)
3636                 napi_disable(&adapter->rx_queue[i].napi);
3637
3638         vmxnet3_disable_all_intrs(adapter);
3639         vmxnet3_free_irqs(adapter);
3640         vmxnet3_free_intr_resources(adapter);
3641
3642         netif_device_detach(netdev);
3643
3644         /* Create wake-up filters. */
3645         pmConf = adapter->pm_conf;
3646         memset(pmConf, 0, sizeof(*pmConf));
3647
3648         if (adapter->wol & WAKE_UCAST) {
3649                 pmConf->filters[i].patternSize = ETH_ALEN;
3650                 pmConf->filters[i].maskSize = 1;
3651                 memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN);
3652                 pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */
3653
3654                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
3655                 i++;
3656         }
3657
3658         if (adapter->wol & WAKE_ARP) {
3659                 in_dev = in_dev_get(netdev);
3660                 if (!in_dev)
3661                         goto skip_arp;
3662
3663                 ifa = (struct in_ifaddr *)in_dev->ifa_list;
3664                 if (!ifa)
3665                         goto skip_arp;
3666
3667                 pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/
3668                         sizeof(struct arphdr) +         /* ARP header */
3669                         2 * ETH_ALEN +          /* 2 Ethernet addresses*/
3670                         2 * sizeof(u32);        /*2 IPv4 addresses */
3671                 pmConf->filters[i].maskSize =
3672                         (pmConf->filters[i].patternSize - 1) / 8 + 1;
3673
3674                 /* ETH_P_ARP in Ethernet header. */
3675                 ehdr = (struct ethhdr *)pmConf->filters[i].pattern;
3676                 ehdr->h_proto = htons(ETH_P_ARP);
3677
3678                 /* ARPOP_REQUEST in ARP header. */
3679                 ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN];
3680                 ahdr->ar_op = htons(ARPOP_REQUEST);
3681                 arpreq = (u8 *)(ahdr + 1);
3682
3683                 /* The Unicast IPv4 address in 'tip' field. */
3684                 arpreq += 2 * ETH_ALEN + sizeof(u32);
3685                 *(u32 *)arpreq = ifa->ifa_address;
3686
3687                 /* The mask for the relevant bits. */
3688                 pmConf->filters[i].mask[0] = 0x00;
3689                 pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */
3690                 pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */
3691                 pmConf->filters[i].mask[3] = 0x00;
3692                 pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */
3693                 pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */
3694                 in_dev_put(in_dev);
3695
3696                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
3697                 i++;
3698         }
3699
3700 skip_arp:
3701         if (adapter->wol & WAKE_MAGIC)
3702                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_MAGIC;
3703
3704         pmConf->numFilters = i;
3705
3706         adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
3707         adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
3708                                                                   *pmConf));
3709         adapter->shared->devRead.pmConfDesc.confPA =
3710                 cpu_to_le64(adapter->pm_conf_pa);
3711
3712         spin_lock_irqsave(&adapter->cmd_lock, flags);
3713         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3714                                VMXNET3_CMD_UPDATE_PMCFG);
3715         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3716
3717         pci_save_state(pdev);
3718         pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND),
3719                         adapter->wol);
3720         pci_disable_device(pdev);
3721         pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND));
3722
3723         return 0;
3724 }
3725
3726
3727 static int
3728 vmxnet3_resume(struct device *device)
3729 {
3730         int err;
3731         unsigned long flags;
3732         struct pci_dev *pdev = to_pci_dev(device);
3733         struct net_device *netdev = pci_get_drvdata(pdev);
3734         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3735
3736         if (!netif_running(netdev))
3737                 return 0;
3738
3739         pci_set_power_state(pdev, PCI_D0);
3740         pci_restore_state(pdev);
3741         err = pci_enable_device_mem(pdev);
3742         if (err != 0)
3743                 return err;
3744
3745         pci_enable_wake(pdev, PCI_D0, 0);
3746
3747         vmxnet3_alloc_intr_resources(adapter);
3748
3749         /* During hibernate and suspend, device has to be reinitialized as the
3750          * device state need not be preserved.
3751          */
3752
3753         /* Need not check adapter state as other reset tasks cannot run during
3754          * device resume.
3755          */
3756         spin_lock_irqsave(&adapter->cmd_lock, flags);
3757         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3758                                VMXNET3_CMD_QUIESCE_DEV);
3759         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3760         vmxnet3_tq_cleanup_all(adapter);
3761         vmxnet3_rq_cleanup_all(adapter);
3762
3763         vmxnet3_reset_dev(adapter);
3764         err = vmxnet3_activate_dev(adapter);
3765         if (err != 0) {
3766                 netdev_err(netdev,
3767                            "failed to re-activate on resume, error: %d", err);
3768                 vmxnet3_force_close(adapter);
3769                 return err;
3770         }
3771         netif_device_attach(netdev);
3772
3773         return 0;
3774 }
3775
3776 static const struct dev_pm_ops vmxnet3_pm_ops = {
3777         .suspend = vmxnet3_suspend,
3778         .resume = vmxnet3_resume,
3779         .freeze = vmxnet3_suspend,
3780         .restore = vmxnet3_resume,
3781 };
3782 #endif
3783
3784 static struct pci_driver vmxnet3_driver = {
3785         .name           = vmxnet3_driver_name,
3786         .id_table       = vmxnet3_pciid_table,
3787         .probe          = vmxnet3_probe_device,
3788         .remove         = vmxnet3_remove_device,
3789         .shutdown       = vmxnet3_shutdown_device,
3790 #ifdef CONFIG_PM
3791         .driver.pm      = &vmxnet3_pm_ops,
3792 #endif
3793 };
3794
3795
3796 static int __init
3797 vmxnet3_init_module(void)
3798 {
3799         pr_info("%s - version %s\n", VMXNET3_DRIVER_DESC,
3800                 VMXNET3_DRIVER_VERSION_REPORT);
3801         return pci_register_driver(&vmxnet3_driver);
3802 }
3803
3804 module_init(vmxnet3_init_module);
3805
3806
3807 static void
3808 vmxnet3_exit_module(void)
3809 {
3810         pci_unregister_driver(&vmxnet3_driver);
3811 }
3812
3813 module_exit(vmxnet3_exit_module);
3814
3815 MODULE_AUTHOR("VMware, Inc.");
3816 MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC);
3817 MODULE_LICENSE("GPL v2");
3818 MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING);