drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
  58                                      bool sw_pending)
  59 {
  60         bool pending = false;
  61
  62         spin_lock_bh(&txq->axq_lock);
  63
  64         if (txq->axq_depth) {
  65                 pending = true;
  66                 goto out;
  67         }
  68
  69         if (!sw_pending)
  70                 goto out;
  71
  72         if (txq->mac80211_qnum >= 0) {
  73                 struct list_head *list;
  74
  75                 list = &sc->cur_chan->acq[txq->mac80211_qnum];
  76                 if (!list_empty(list))
  77                         pending = true;
  78         }
  79 out:
  80         spin_unlock_bh(&txq->axq_lock);
  81         return pending;
  82 }
  83
  84 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  85 {
  86         unsigned long flags;
  87         bool ret;
  88
  89         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  90         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  91         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  92
  93         return ret;
  94 }
  95
  96 void ath_ps_full_sleep(unsigned long data)
  97 {
  98         struct ath_softc *sc = (struct ath_softc *) data;
  99         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 100         bool reset;
 101
 102         spin_lock(&common->cc_lock);
 103         ath_hw_cycle_counters_update(common);
 104         spin_unlock(&common->cc_lock);
 105
 106         ath9k_hw_setrxabort(sc->sc_ah, 1);
 107         ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 108
 109         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 110 }
 111
 112 void ath9k_ps_wakeup(struct ath_softc *sc)
 113 {
 114         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 115         unsigned long flags;
 116         enum ath9k_power_mode power_mode;
 117
 118         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 119         if (++sc->ps_usecount != 1)
 120                 goto unlock;
 121
 122         del_timer_sync(&sc->sleep_timer);
 123         power_mode = sc->sc_ah->power_mode;
 124         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 125
 126         /*
 127          * While the hardware is asleep, the cycle counters contain no
 128          * useful data. Better clear them now so that they don't mess up
 129          * survey data results.
 130          */
 131         if (power_mode != ATH9K_PM_AWAKE) {
 132                 spin_lock(&common->cc_lock);
 133                 ath_hw_cycle_counters_update(common);
 134                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 135                 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
 136                 spin_unlock(&common->cc_lock);
 137         }
 138
 139  unlock:
 140         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 141 }
 142
 143 void ath9k_ps_restore(struct ath_softc *sc)
 144 {
 145         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 146         enum ath9k_power_mode mode;
 147         unsigned long flags;
 148
 149         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 150         if (--sc->ps_usecount != 0)
 151                 goto unlock;
 152
 153         if (sc->ps_idle) {
 154                 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 155                 goto unlock;
 156         }
 157
 158         if (sc->ps_enabled &&
 159                    !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 160                                      PS_WAIT_FOR_CAB |
 161                                      PS_WAIT_FOR_PSPOLL_DATA |
 162                                      PS_WAIT_FOR_TX_ACK |
 163                                      PS_WAIT_FOR_ANI))) {
 164                 mode = ATH9K_PM_NETWORK_SLEEP;
 165                 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
 166                         ath9k_btcoex_stop_gen_timer(sc);
 167         } else {
 168                 goto unlock;
 169         }
 170
 171         spin_lock(&common->cc_lock);
 172         ath_hw_cycle_counters_update(common);
 173         spin_unlock(&common->cc_lock);
 174
 175         ath9k_hw_setpower(sc->sc_ah, mode);
 176
 177  unlock:
 178         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 179 }
 180
 181 static void __ath_cancel_work(struct ath_softc *sc)
 182 {
 183         cancel_work_sync(&sc->paprd_work);
 184         cancel_delayed_work_sync(&sc->tx_complete_work);
 185         cancel_delayed_work_sync(&sc->hw_pll_work);
 186
 187 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 188         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
 189                 cancel_work_sync(&sc->mci_work);
 190 #endif
 191 }
 192
 193 void ath_cancel_work(struct ath_softc *sc)
 194 {
 195         __ath_cancel_work(sc);
 196         cancel_work_sync(&sc->hw_reset_work);
 197 }
 198
 199 void ath_restart_work(struct ath_softc *sc)
 200 {
 201         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 202
 203         if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
 204                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 205                                      msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 206
 207         ath_start_ani(sc);
 208 }
 209
 210 static bool ath_prepare_reset(struct ath_softc *sc)
 211 {
 212         struct ath_hw *ah = sc->sc_ah;
 213         bool ret = true;
 214
 215         ieee80211_stop_queues(sc->hw);
 216         ath_stop_ani(sc);
 217         ath9k_hw_disable_interrupts(ah);
 218
 219         if (AR_SREV_9300_20_OR_LATER(ah)) {
 220                 ret &= ath_stoprecv(sc);
 221                 ret &= ath_drain_all_txq(sc);
 222         } else {
 223                 ret &= ath_drain_all_txq(sc);
 224                 ret &= ath_stoprecv(sc);
 225         }
 226
 227         return ret;
 228 }
 229
 230 static bool ath_complete_reset(struct ath_softc *sc, bool start)
 231 {
 232         struct ath_hw *ah = sc->sc_ah;
 233         struct ath_common *common = ath9k_hw_common(ah);
 234         unsigned long flags;
 235
 236         ath9k_calculate_summary_state(sc, sc->cur_chan);
 237         ath_startrecv(sc);
 238         ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
 239                                sc->cur_chan->txpower,
 240                                &sc->cur_chan->cur_txpower);
 241         clear_bit(ATH_OP_HW_RESET, &common->op_flags);
 242
 243         if (!sc->cur_chan->offchannel && start) {
 244                 /* restore per chanctx TSF timer */
 245                 if (sc->cur_chan->tsf_val) {
 246                         u32 offset;
 247
 248                         offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
 249                                                          NULL);
 250                         ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
 251                 }
 252
 253
 254                 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
 255                         goto work;
 256
 257                 if (ah->opmode == NL80211_IFTYPE_STATION &&
 258                     test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
 259                         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 260                         sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 261                         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 262                 } else {
 263                         ath9k_set_beacon(sc);
 264                 }
 265         work:
 266                 ath_restart_work(sc);
 267                 ath_txq_schedule_all(sc);
 268         }
 269
 270         sc->gtt_cnt = 0;
 271
 272         ath9k_hw_set_interrupts(ah);
 273         ath9k_hw_enable_interrupts(ah);
 274         ieee80211_wake_queues(sc->hw);
 275         ath9k_p2p_ps_timer(sc);
 276
 277         return true;
 278 }
 279
 280 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 281 {
 282         struct ath_hw *ah = sc->sc_ah;
 283         struct ath_common *common = ath9k_hw_common(ah);
 284         struct ath9k_hw_cal_data *caldata = NULL;
 285         bool fastcc = true;
 286         int r;
 287
 288         __ath_cancel_work(sc);
 289
 290         disable_irq(sc->irq);
 291         tasklet_disable(&sc->intr_tq);
 292         tasklet_disable(&sc->bcon_tasklet);
 293         spin_lock_bh(&sc->sc_pcu_lock);
 294
 295         if (!sc->cur_chan->offchannel) {
 296                 fastcc = false;
 297                 caldata = &sc->cur_chan->caldata;
 298         }
 299
 300         if (!hchan) {
 301                 fastcc = false;
 302                 hchan = ah->curchan;
 303         }
 304
 305         if (!hchan) {
 306                 fastcc = false;
 307                 hchan = ath9k_cmn_get_channel(sc->hw, ah, &sc->cur_chan->chandef);
 308         }
 309
 310         if (!ath_prepare_reset(sc))
 311                 fastcc = false;
 312
 313         if (ath9k_is_chanctx_enabled())
 314                 fastcc = false;
 315
 316         spin_lock_bh(&sc->chan_lock);
 317         sc->cur_chandef = sc->cur_chan->chandef;
 318         spin_unlock_bh(&sc->chan_lock);
 319
 320         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 321                 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 322
 323         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 324         if (r) {
 325                 ath_err(common,
 326                         "Unable to reset channel, reset status %d\n", r);
 327
 328                 ath9k_hw_enable_interrupts(ah);
 329                 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
 330
 331                 goto out;
 332         }
 333
 334         if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
 335             sc->cur_chan->offchannel)
 336                 ath9k_mci_set_txpower(sc, true, false);
 337
 338         if (!ath_complete_reset(sc, true))
 339                 r = -EIO;
 340
 341 out:
 342         enable_irq(sc->irq);
 343         spin_unlock_bh(&sc->sc_pcu_lock);
 344         tasklet_enable(&sc->bcon_tasklet);
 345         tasklet_enable(&sc->intr_tq);
 346
 347         return r;
 348 }
 349
 350 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 351                             struct ieee80211_vif *vif)
 352 {
 353         struct ath_node *an;
 354         an = (struct ath_node *)sta->drv_priv;
 355
 356         an->sc = sc;
 357         an->sta = sta;
 358         an->vif = vif;
 359         memset(&an->key_idx, 0, sizeof(an->key_idx));
 360
 361         ath_tx_node_init(sc, an);
 362
 363         ath_dynack_node_init(sc->sc_ah, an);
 364 }
 365
 366 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 367 {
 368         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 369         ath_tx_node_cleanup(sc, an);
 370
 371         ath_dynack_node_deinit(sc->sc_ah, an);
 372 }
 373
 374 void ath9k_tasklet(unsigned long data)
 375 {
 376         struct ath_softc *sc = (struct ath_softc *)data;
 377         struct ath_hw *ah = sc->sc_ah;
 378         struct ath_common *common = ath9k_hw_common(ah);
 379         enum ath_reset_type type;
 380         unsigned long flags;
 381         u32 status;
 382         u32 rxmask;
 383
 384         spin_lock_irqsave(&sc->intr_lock, flags);
 385         status = sc->intrstatus;
 386         sc->intrstatus = 0;
 387         spin_unlock_irqrestore(&sc->intr_lock, flags);
 388
 389         ath9k_ps_wakeup(sc);
 390         spin_lock(&sc->sc_pcu_lock);
 391
 392         if (status & ATH9K_INT_FATAL) {
 393                 type = RESET_TYPE_FATAL_INT;
 394                 ath9k_queue_reset(sc, type);
 395                 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
 396                 goto out;
 397         }
 398
 399         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 400             (status & ATH9K_INT_BB_WATCHDOG)) {
 401                 spin_lock(&common->cc_lock);
 402                 ath_hw_cycle_counters_update(common);
 403                 ar9003_hw_bb_watchdog_dbg_info(ah);
 404                 spin_unlock(&common->cc_lock);
 405
 406                 if (ar9003_hw_bb_watchdog_check(ah)) {
 407                         type = RESET_TYPE_BB_WATCHDOG;
 408                         ath9k_queue_reset(sc, type);
 409
 410                         ath_dbg(common, RESET,
 411                                 "BB_WATCHDOG: Skipping interrupts\n");
 412                         goto out;
 413                 }
 414         }
 415
 416         if (status & ATH9K_INT_GTT) {
 417                 sc->gtt_cnt++;
 418
 419                 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
 420                         type = RESET_TYPE_TX_GTT;
 421                         ath9k_queue_reset(sc, type);
 422                         ath_dbg(common, RESET,
 423                                 "GTT: Skipping interrupts\n");
 424                         goto out;
 425                 }
 426         }
 427
 428         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 429         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 430                 /*
 431                  * TSF sync does not look correct; remain awake to sync with
 432                  * the next Beacon.
 433                  */
 434                 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 435                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 436         }
 437         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 438
 439         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 440                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 441                           ATH9K_INT_RXORN);
 442         else
 443                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 444
 445         if (status & rxmask) {
 446                 /* Check for high priority Rx first */
 447                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 448                     (status & ATH9K_INT_RXHP))
 449                         ath_rx_tasklet(sc, 0, true);
 450
 451                 ath_rx_tasklet(sc, 0, false);
 452         }
 453
 454         if (status & ATH9K_INT_TX) {
 455                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 456                         /*
 457                          * For EDMA chips, TX completion is enabled for the
 458                          * beacon queue, so if a beacon has been transmitted
 459                          * successfully after a GTT interrupt, the GTT counter
 460                          * gets reset to zero here.
 461                          */
 462                         sc->gtt_cnt = 0;
 463
 464                         ath_tx_edma_tasklet(sc);
 465                 } else {
 466                         ath_tx_tasklet(sc);
 467                 }
 468
 469                 wake_up(&sc->tx_wait);
 470         }
 471
 472         if (status & ATH9K_INT_GENTIMER)
 473                 ath_gen_timer_isr(sc->sc_ah);
 474
 475         ath9k_btcoex_handle_interrupt(sc, status);
 476
 477         /* re-enable hardware interrupt */
 478         ath9k_hw_resume_interrupts(ah);
 479 out:
 480         spin_unlock(&sc->sc_pcu_lock);
 481         ath9k_ps_restore(sc);
 482 }
 483
 484 irqreturn_t ath_isr(int irq, void *dev)
 485 {
 486 #define SCHED_INTR (                            \
 487                 ATH9K_INT_FATAL |               \
 488                 ATH9K_INT_BB_WATCHDOG |         \
 489                 ATH9K_INT_RXORN |               \
 490                 ATH9K_INT_RXEOL |               \
 491                 ATH9K_INT_RX |                  \
 492                 ATH9K_INT_RXLP |                \
 493                 ATH9K_INT_RXHP |                \
 494                 ATH9K_INT_TX |                  \
 495                 ATH9K_INT_BMISS |               \
 496                 ATH9K_INT_CST |                 \
 497                 ATH9K_INT_GTT |                 \
 498                 ATH9K_INT_TSFOOR |              \
 499                 ATH9K_INT_GENTIMER |            \
 500                 ATH9K_INT_MCI)
 501
 502         struct ath_softc *sc = dev;
 503         struct ath_hw *ah = sc->sc_ah;
 504         struct ath_common *common = ath9k_hw_common(ah);
 505         enum ath9k_int status;
 506         u32 sync_cause = 0;
 507         bool sched = false;
 508
 509         /*
 510          * The hardware is not ready/present, don't
 511          * touch anything. Note this can happen early
 512          * on if the IRQ is shared.
 513          */
 514         if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
 515                 return IRQ_NONE;
 516
 517         /* shared irq, not for us */
 518         if (!ath9k_hw_intrpend(ah))
 519                 return IRQ_NONE;
 520
 521         /*
 522          * Figure out the reason(s) for the interrupt.  Note
 523          * that the hal returns a pseudo-ISR that may include
 524          * bits we haven't explicitly enabled so we mask the
 525          * value to insure we only process bits we requested.
 526          */
 527         ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
 528         ath9k_debug_sync_cause(sc, sync_cause);
 529         status &= ah->imask;    /* discard unasked-for bits */
 530
 531         if (test_bit(ATH_OP_HW_RESET, &common->op_flags))
 532                 return IRQ_HANDLED;
 533
 534         /*
 535          * If there are no status bits set, then this interrupt was not
 536          * for me (should have been caught above).
 537          */
 538         if (!status)
 539                 return IRQ_NONE;
 540
 541         /* Cache the status */
 542         spin_lock(&sc->intr_lock);
 543         sc->intrstatus |= status;
 544         spin_unlock(&sc->intr_lock);
 545
 546         if (status & SCHED_INTR)
 547                 sched = true;
 548
 549         /*
 550          * If a FATAL interrupt is received, we have to reset the chip
 551          * immediately.
 552          */
 553         if (status & ATH9K_INT_FATAL)
 554                 goto chip_reset;
 555
 556         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 557             (status & ATH9K_INT_BB_WATCHDOG))
 558                 goto chip_reset;
 559
 560         if (status & ATH9K_INT_SWBA)
 561                 tasklet_schedule(&sc->bcon_tasklet);
 562
 563         if (status & ATH9K_INT_TXURN)
 564                 ath9k_hw_updatetxtriglevel(ah, true);
 565
 566         if (status & ATH9K_INT_RXEOL) {
 567                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 568                 ath9k_hw_set_interrupts(ah);
 569         }
 570
 571         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 572                 if (status & ATH9K_INT_TIM_TIMER) {
 573                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 574                                 goto chip_reset;
 575                         /* Clear RxAbort bit so that we can
 576                          * receive frames */
 577                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 578                         spin_lock(&sc->sc_pm_lock);
 579                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 580                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 581                         spin_unlock(&sc->sc_pm_lock);
 582                 }
 583
 584 chip_reset:
 585
 586         ath_debug_stat_interrupt(sc, status);
 587
 588         if (sched) {
 589                 /* turn off every interrupt */
 590                 ath9k_hw_kill_interrupts(ah);
 591                 tasklet_schedule(&sc->intr_tq);
 592         }
 593
 594         return IRQ_HANDLED;
 595
 596 #undef SCHED_INTR
 597 }
 598
 599 /*
 600  * This function is called when a HW reset cannot be deferred
 601  * and has to be immediate.
 602  */
 603 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
 604 {
 605         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 606         int r;
 607
 608         ath9k_hw_kill_interrupts(sc->sc_ah);
 609         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 610
 611         ath9k_ps_wakeup(sc);
 612         r = ath_reset_internal(sc, hchan);
 613         ath9k_ps_restore(sc);
 614
 615         return r;
 616 }
 617
 618 /*
 619  * When a HW reset can be deferred, it is added to the
 620  * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
 621  * queueing.
 622  */
 623 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
 624 {
 625         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 626 #ifdef CONFIG_ATH9K_DEBUGFS
 627         RESET_STAT_INC(sc, type);
 628 #endif
 629         ath9k_hw_kill_interrupts(sc->sc_ah);
 630         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 631         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 632 }
 633
 634 void ath_reset_work(struct work_struct *work)
 635 {
 636         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 637
 638         ath9k_ps_wakeup(sc);
 639         ath_reset_internal(sc, NULL);
 640         ath9k_ps_restore(sc);
 641 }
 642
 643 /**********************/
 644 /* mac80211 callbacks */
 645 /**********************/
 646
 647 static int ath9k_start(struct ieee80211_hw *hw)
 648 {
 649         struct ath_softc *sc = hw->priv;
 650         struct ath_hw *ah = sc->sc_ah;
 651         struct ath_common *common = ath9k_hw_common(ah);
 652         struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
 653         struct ath_chanctx *ctx = sc->cur_chan;
 654         struct ath9k_channel *init_channel;
 655         int r;
 656
 657         ath_dbg(common, CONFIG,
 658                 "Starting driver with initial channel: %d MHz\n",
 659                 curchan->center_freq);
 660
 661         ath9k_ps_wakeup(sc);
 662         mutex_lock(&sc->mutex);
 663
 664         init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
 665         sc->cur_chandef = hw->conf.chandef;
 666
 667         /* Reset SERDES registers */
 668         ath9k_hw_configpcipowersave(ah, false);
 669
 670         /*
 671          * The basic interface to setting the hardware in a good
 672          * state is ``reset''.  On return the hardware is known to
 673          * be powered up and with interrupts disabled.  This must
 674          * be followed by initialization of the appropriate bits
 675          * and then setup of the interrupt mask.
 676          */
 677         spin_lock_bh(&sc->sc_pcu_lock);
 678
 679         atomic_set(&ah->intr_ref_cnt, -1);
 680
 681         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
 682         if (r) {
 683                 ath_err(common,
 684                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
 685                         r, curchan->center_freq);
 686                 ah->reset_power_on = false;
 687         }
 688
 689         /* Setup our intr mask. */
 690         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 691                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 692                     ATH9K_INT_GLOBAL;
 693
 694         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 695                 ah->imask |= ATH9K_INT_RXHP |
 696                              ATH9K_INT_RXLP;
 697         else
 698                 ah->imask |= ATH9K_INT_RX;
 699
 700         if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
 701                 ah->imask |= ATH9K_INT_BB_WATCHDOG;
 702
 703         /*
 704          * Enable GTT interrupts only for AR9003/AR9004 chips
 705          * for now.
 706          */
 707         if (AR_SREV_9300_20_OR_LATER(ah))
 708                 ah->imask |= ATH9K_INT_GTT;
 709
 710         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 711                 ah->imask |= ATH9K_INT_CST;
 712
 713         ath_mci_enable(sc);
 714
 715         clear_bit(ATH_OP_INVALID, &common->op_flags);
 716         sc->sc_ah->is_monitoring = false;
 717
 718         if (!ath_complete_reset(sc, false))
 719                 ah->reset_power_on = false;
 720
 721         if (ah->led_pin >= 0) {
 722                 ath9k_hw_cfg_output(ah, ah->led_pin,
 723                                     AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 724                 ath9k_hw_set_gpio(ah, ah->led_pin,
 725                                   (ah->config.led_active_high) ? 1 : 0);
 726         }
 727
 728         /*
 729          * Reset key cache to sane defaults (all entries cleared) instead of
 730          * semi-random values after suspend/resume.
 731          */
 732         ath9k_cmn_init_crypto(sc->sc_ah);
 733
 734         ath9k_hw_reset_tsf(ah);
 735
 736         spin_unlock_bh(&sc->sc_pcu_lock);
 737
 738         mutex_unlock(&sc->mutex);
 739
 740         ath9k_ps_restore(sc);
 741
 742         return 0;
 743 }
 744
 745 static void ath9k_tx(struct ieee80211_hw *hw,
 746                      struct ieee80211_tx_control *control,
 747                      struct sk_buff *skb)
 748 {
 749         struct ath_softc *sc = hw->priv;
 750         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 751         struct ath_tx_control txctl;
 752         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 753         unsigned long flags;
 754
 755         if (sc->ps_enabled) {
 756                 /*
 757                  * mac80211 does not set PM field for normal data frames, so we
 758                  * need to update that based on the current PS mode.
 759                  */
 760                 if (ieee80211_is_data(hdr->frame_control) &&
 761                     !ieee80211_is_nullfunc(hdr->frame_control) &&
 762                     !ieee80211_has_pm(hdr->frame_control)) {
 763                         ath_dbg(common, PS,
 764                                 "Add PM=1 for a TX frame while in PS mode\n");
 765                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
 766                 }
 767         }
 768
 769         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
 770                 /*
 771                  * We are using PS-Poll and mac80211 can request TX while in
 772                  * power save mode. Need to wake up hardware for the TX to be
 773                  * completed and if needed, also for RX of buffered frames.
 774                  */
 775                 ath9k_ps_wakeup(sc);
 776                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
 777                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 778                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 779                 if (ieee80211_is_pspoll(hdr->frame_control)) {
 780                         ath_dbg(common, PS,
 781                                 "Sending PS-Poll to pick a buffered frame\n");
 782                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
 783                 } else {
 784                         ath_dbg(common, PS, "Wake up to complete TX\n");
 785                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
 786                 }
 787                 /*
 788                  * The actual restore operation will happen only after
 789                  * the ps_flags bit is cleared. We are just dropping
 790                  * the ps_usecount here.
 791                  */
 792                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 793                 ath9k_ps_restore(sc);
 794         }
 795
 796         /*
 797          * Cannot tx while the hardware is in full sleep, it first needs a full
 798          * chip reset to recover from that
 799          */
 800         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
 801                 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
 802                 goto exit;
 803         }
 804
 805         memset(&txctl, 0, sizeof(struct ath_tx_control));
 806         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
 807         txctl.sta = control->sta;
 808
 809         ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
 810
 811         if (ath_tx_start(hw, skb, &txctl) != 0) {
 812                 ath_dbg(common, XMIT, "TX failed\n");
 813                 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
 814                 goto exit;
 815         }
 816
 817         return;
 818 exit:
 819         ieee80211_free_txskb(hw, skb);
 820 }
 821
 822 static bool ath9k_txq_list_has_key(struct list_head *txq_list, u32 keyix)
 823 {
 824         struct ath_buf *bf;
 825         struct ieee80211_tx_info *txinfo;
 826         struct ath_frame_info *fi;
 827
 828         list_for_each_entry(bf, txq_list, list) {
 829                 if (bf->bf_state.stale || !bf->bf_mpdu)
 830                         continue;
 831
 832                 txinfo = IEEE80211_SKB_CB(bf->bf_mpdu);
 833                 fi = (struct ath_frame_info *)&txinfo->rate_driver_data[0];
 834                 if (fi->keyix == keyix)
 835                         return true;
 836         }
 837
 838         return false;
 839 }
 840
 841 static bool ath9k_txq_has_key(struct ath_softc *sc, u32 keyix)
 842 {
 843         struct ath_hw *ah = sc->sc_ah;
 844         int i;
 845         struct ath_txq *txq;
 846         bool key_in_use = false;
 847
 848         for (i = 0; !key_in_use && i < ATH9K_NUM_TX_QUEUES; i++) {
 849                 if (!ATH_TXQ_SETUP(sc, i))
 850                         continue;
 851                 txq = &sc->tx.txq[i];
 852                 if (!txq->axq_depth)
 853                         continue;
 854                 if (!ath9k_hw_numtxpending(ah, txq->axq_qnum))
 855                         continue;
 856
 857                 ath_txq_lock(sc, txq);
 858                 key_in_use = ath9k_txq_list_has_key(&txq->axq_q, keyix);
 859                 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 860                         int idx = txq->txq_tailidx;
 861
 862                         while (!key_in_use &&
 863                                !list_empty(&txq->txq_fifo[idx])) {
 864                                 key_in_use = ath9k_txq_list_has_key(
 865                                         &txq->txq_fifo[idx], keyix);
 866                                 INCR(idx, ATH_TXFIFO_DEPTH);
 867                         }
 868                 }
 869                 ath_txq_unlock(sc, txq);
 870         }
 871
 872         return key_in_use;
 873 }
 874
 875 static void ath9k_pending_key_del(struct ath_softc *sc, u8 keyix)
 876 {
 877         struct ath_hw *ah = sc->sc_ah;
 878         struct ath_common *common = ath9k_hw_common(ah);
 879
 880         if (!test_bit(keyix, ah->pending_del_keymap) ||
 881             ath9k_txq_has_key(sc, keyix))
 882                 return;
 883
 884         /* No more TXQ frames point to this key cache entry, so delete it. */
 885         clear_bit(keyix, ah->pending_del_keymap);
 886         ath_key_delete(common, keyix);
 887 }
 888
 889 static void ath9k_stop(struct ieee80211_hw *hw)
 890 {
 891         struct ath_softc *sc = hw->priv;
 892         struct ath_hw *ah = sc->sc_ah;
 893         struct ath_common *common = ath9k_hw_common(ah);
 894         bool prev_idle;
 895         int i;
 896
 897         ath9k_deinit_channel_context(sc);
 898
 899         mutex_lock(&sc->mutex);
 900
 901         ath_cancel_work(sc);
 902
 903         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
 904                 ath_dbg(common, ANY, "Device not present\n");
 905                 mutex_unlock(&sc->mutex);
 906                 return;
 907         }
 908
 909         /* Ensure HW is awake when we try to shut it down. */
 910         ath9k_ps_wakeup(sc);
 911
 912         spin_lock_bh(&sc->sc_pcu_lock);
 913
 914         /* prevent tasklets to enable interrupts once we disable them */
 915         ah->imask &= ~ATH9K_INT_GLOBAL;
 916
 917         /* make sure h/w will not generate any interrupt
 918          * before setting the invalid flag. */
 919         ath9k_hw_disable_interrupts(ah);
 920
 921         spin_unlock_bh(&sc->sc_pcu_lock);
 922
 923         /* we can now sync irq and kill any running tasklets, since we already
 924          * disabled interrupts and not holding a spin lock */
 925         synchronize_irq(sc->irq);
 926         tasklet_kill(&sc->intr_tq);
 927         tasklet_kill(&sc->bcon_tasklet);
 928
 929         prev_idle = sc->ps_idle;
 930         sc->ps_idle = true;
 931
 932         spin_lock_bh(&sc->sc_pcu_lock);
 933
 934         if (ah->led_pin >= 0) {
 935                 ath9k_hw_set_gpio(ah, ah->led_pin,
 936                                   (ah->config.led_active_high) ? 0 : 1);
 937                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 938         }
 939
 940         ath_prepare_reset(sc);
 941
 942         if (sc->rx.frag) {
 943                 dev_kfree_skb_any(sc->rx.frag);
 944                 sc->rx.frag = NULL;
 945         }
 946
 947         if (!ah->curchan)
 948                 ah->curchan = ath9k_cmn_get_channel(hw, ah,
 949                                                     &sc->cur_chan->chandef);
 950
 951         ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 952
 953         set_bit(ATH_OP_INVALID, &common->op_flags);
 954
 955         ath9k_hw_phy_disable(ah);
 956
 957         ath9k_hw_configpcipowersave(ah, true);
 958
 959         spin_unlock_bh(&sc->sc_pcu_lock);
 960
 961         for (i = 0; i < ATH_KEYMAX; i++)
 962                 ath9k_pending_key_del(sc, i);
 963
 964         /* Clear key cache entries explicitly to get rid of any potentially
 965          * remaining keys.
 966          */
 967         ath9k_cmn_init_crypto(sc->sc_ah);
 968
 969         ath9k_ps_restore(sc);
 970
 971         sc->ps_idle = prev_idle;
 972
 973         mutex_unlock(&sc->mutex);
 974
 975         ath_dbg(common, CONFIG, "Driver halt\n");
 976 }
 977
 978 static bool ath9k_uses_beacons(int type)
 979 {
 980         switch (type) {
 981         case NL80211_IFTYPE_AP:
 982         case NL80211_IFTYPE_ADHOC:
 983         case NL80211_IFTYPE_MESH_POINT:
 984                 return true;
 985         default:
 986                 return false;
 987         }
 988 }
 989
 990 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
 991                            u8 *mac, struct ieee80211_vif *vif)
 992 {
 993         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
 994         int i;
 995
 996         if (iter_data->has_hw_macaddr) {
 997                 for (i = 0; i < ETH_ALEN; i++)
 998                         iter_data->mask[i] &=
 999                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1000         } else {
1001                 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
1002                 iter_data->has_hw_macaddr = true;
1003         }
1004
1005         if (!vif->bss_conf.use_short_slot)
1006                 iter_data->slottime = ATH9K_SLOT_TIME_20;
1007
1008         switch (vif->type) {
1009         case NL80211_IFTYPE_AP:
1010                 iter_data->naps++;
1011                 break;
1012         case NL80211_IFTYPE_STATION:
1013                 iter_data->nstations++;
1014                 if (avp->assoc && !iter_data->primary_sta)
1015                         iter_data->primary_sta = vif;
1016                 break;
1017         case NL80211_IFTYPE_OCB:
1018                 iter_data->nocbs++;
1019                 break;
1020         case NL80211_IFTYPE_ADHOC:
1021                 iter_data->nadhocs++;
1022                 if (vif->bss_conf.enable_beacon)
1023                         iter_data->beacons = true;
1024                 break;
1025         case NL80211_IFTYPE_MESH_POINT:
1026                 iter_data->nmeshes++;
1027                 if (vif->bss_conf.enable_beacon)
1028                         iter_data->beacons = true;
1029                 break;
1030         case NL80211_IFTYPE_WDS:
1031                 iter_data->nwds++;
1032                 break;
1033         default:
1034                 break;
1035         }
1036 }
1037
1038 static void ath9k_update_bssid_mask(struct ath_softc *sc,
1039                                     struct ath_chanctx *ctx,
1040                                     struct ath9k_vif_iter_data *iter_data)
1041 {
1042         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1043         struct ath_vif *avp;
1044         int i;
1045
1046         if (!ath9k_is_chanctx_enabled())
1047                 return;
1048
1049         list_for_each_entry(avp, &ctx->vifs, list) {
1050                 if (ctx->nvifs_assigned != 1)
1051                         continue;
1052
1053                 if (!avp->vif->p2p || !iter_data->has_hw_macaddr)
1054                         continue;
1055
1056                 ether_addr_copy(common->curbssid, avp->bssid);
1057
1058                 /* perm_addr will be used as the p2p device address. */
1059                 for (i = 0; i < ETH_ALEN; i++)
1060                         iter_data->mask[i] &=
1061                                 ~(iter_data->hw_macaddr[i] ^
1062                                   sc->hw->wiphy->perm_addr[i]);
1063         }
1064 }
1065
1066 /* Called with sc->mutex held. */
1067 void ath9k_calculate_iter_data(struct ath_softc *sc,
1068                                struct ath_chanctx *ctx,
1069                                struct ath9k_vif_iter_data *iter_data)
1070 {
1071         struct ath_vif *avp;
1072
1073         /*
1074          * The hardware will use primary station addr together with the
1075          * BSSID mask when matching addresses.
1076          */
1077         memset(iter_data, 0, sizeof(*iter_data));
1078         eth_broadcast_addr(iter_data->mask);
1079         iter_data->slottime = ATH9K_SLOT_TIME_9;
1080
1081         list_for_each_entry(avp, &ctx->vifs, list)
1082                 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1083
1084         ath9k_update_bssid_mask(sc, ctx, iter_data);
1085 }
1086
1087 static void ath9k_set_assoc_state(struct ath_softc *sc,
1088                                   struct ieee80211_vif *vif, bool changed)
1089 {
1090         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1091         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1092         unsigned long flags;
1093
1094         set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1095
1096         ether_addr_copy(common->curbssid, avp->bssid);
1097         common->curaid = avp->aid;
1098         ath9k_hw_write_associd(sc->sc_ah);
1099
1100         if (changed) {
1101                 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1102                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1103
1104                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1105                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1106                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1107         }
1108
1109         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1110                 ath9k_mci_update_wlan_channels(sc, false);
1111
1112         ath_dbg(common, CONFIG,
1113                 "Primary Station interface: %pM, BSSID: %pM\n",
1114                 vif->addr, common->curbssid);
1115 }
1116
1117 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1118 static void ath9k_set_offchannel_state(struct ath_softc *sc)
1119 {
1120         struct ath_hw *ah = sc->sc_ah;
1121         struct ath_common *common = ath9k_hw_common(ah);
1122         struct ieee80211_vif *vif = NULL;
1123
1124         ath9k_ps_wakeup(sc);
1125
1126         if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1127                 vif = sc->offchannel.scan_vif;
1128         else
1129                 vif = sc->offchannel.roc_vif;
1130
1131         if (WARN_ON(!vif))
1132                 goto exit;
1133
1134         eth_zero_addr(common->curbssid);
1135         eth_broadcast_addr(common->bssidmask);
1136         memcpy(common->macaddr, vif->addr, ETH_ALEN);
1137         common->curaid = 0;
1138         ah->opmode = vif->type;
1139         ah->imask &= ~ATH9K_INT_SWBA;
1140         ah->imask &= ~ATH9K_INT_TSFOOR;
1141         ah->slottime = ATH9K_SLOT_TIME_9;
1142
1143         ath_hw_setbssidmask(common);
1144         ath9k_hw_setopmode(ah);
1145         ath9k_hw_write_associd(sc->sc_ah);
1146         ath9k_hw_set_interrupts(ah);
1147         ath9k_hw_init_global_settings(ah);
1148
1149 exit:
1150         ath9k_ps_restore(sc);
1151 }
1152 #endif
1153
1154 /* Called with sc->mutex held. */
1155 void ath9k_calculate_summary_state(struct ath_softc *sc,
1156                                    struct ath_chanctx *ctx)
1157 {
1158         struct ath_hw *ah = sc->sc_ah;
1159         struct ath_common *common = ath9k_hw_common(ah);
1160         struct ath9k_vif_iter_data iter_data;
1161         struct ath_beacon_config *cur_conf;
1162
1163         ath_chanctx_check_active(sc, ctx);
1164
1165         if (ctx != sc->cur_chan)
1166                 return;
1167
1168 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1169         if (ctx == &sc->offchannel.chan)
1170                 return ath9k_set_offchannel_state(sc);
1171 #endif
1172
1173         ath9k_ps_wakeup(sc);
1174         ath9k_calculate_iter_data(sc, ctx, &iter_data);
1175
1176         if (iter_data.has_hw_macaddr)
1177                 memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1178
1179         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1180         ath_hw_setbssidmask(common);
1181
1182         if (iter_data.naps > 0) {
1183                 cur_conf = &ctx->beacon;
1184                 ath9k_hw_set_tsfadjust(ah, true);
1185                 ah->opmode = NL80211_IFTYPE_AP;
1186                 if (cur_conf->enable_beacon)
1187                         iter_data.beacons = true;
1188         } else {
1189                 ath9k_hw_set_tsfadjust(ah, false);
1190
1191                 if (iter_data.nmeshes)
1192                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1193                 else if (iter_data.nocbs)
1194                         ah->opmode = NL80211_IFTYPE_OCB;
1195                 else if (iter_data.nwds)
1196                         ah->opmode = NL80211_IFTYPE_AP;
1197                 else if (iter_data.nadhocs)
1198                         ah->opmode = NL80211_IFTYPE_ADHOC;
1199                 else
1200                         ah->opmode = NL80211_IFTYPE_STATION;
1201         }
1202
1203         ath9k_hw_setopmode(ah);
1204
1205         ctx->switch_after_beacon = false;
1206         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1207                 ah->imask |= ATH9K_INT_TSFOOR;
1208         else {
1209                 ah->imask &= ~ATH9K_INT_TSFOOR;
1210                 if (iter_data.naps == 1 && iter_data.beacons)
1211                         ctx->switch_after_beacon = true;
1212         }
1213
1214         ah->imask &= ~ATH9K_INT_SWBA;
1215         if (ah->opmode == NL80211_IFTYPE_STATION) {
1216                 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1217
1218                 if (iter_data.primary_sta) {
1219                         iter_data.beacons = true;
1220                         ath9k_set_assoc_state(sc, iter_data.primary_sta,
1221                                               changed);
1222                         ctx->primary_sta = iter_data.primary_sta;
1223                 } else {
1224                         ctx->primary_sta = NULL;
1225                         eth_zero_addr(common->curbssid);
1226                         common->curaid = 0;
1227                         ath9k_hw_write_associd(sc->sc_ah);
1228                         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1229                                 ath9k_mci_update_wlan_channels(sc, true);
1230                 }
1231         } else if (iter_data.beacons) {
1232                 ah->imask |= ATH9K_INT_SWBA;
1233         }
1234         ath9k_hw_set_interrupts(ah);
1235
1236         if (iter_data.beacons)
1237                 set_bit(ATH_OP_BEACONS, &common->op_flags);
1238         else
1239                 clear_bit(ATH_OP_BEACONS, &common->op_flags);
1240
1241         if (ah->slottime != iter_data.slottime) {
1242                 ah->slottime = iter_data.slottime;
1243                 ath9k_hw_init_global_settings(ah);
1244         }
1245
1246         if (iter_data.primary_sta)
1247                 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1248         else
1249                 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1250
1251         ath_dbg(common, CONFIG,
1252                 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1253                 common->macaddr, common->curbssid, common->bssidmask);
1254
1255         ath9k_ps_restore(sc);
1256 }
1257
1258 static void ath9k_tpc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1259 {
1260         int *power = (int *)data;
1261
1262         if (*power < vif->bss_conf.txpower)
1263                 *power = vif->bss_conf.txpower;
1264 }
1265
1266 /* Called with sc->mutex held. */
1267 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif)
1268 {
1269         int power;
1270         struct ath_hw *ah = sc->sc_ah;
1271         struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
1272
1273         ath9k_ps_wakeup(sc);
1274         if (ah->tpc_enabled) {
1275                 power = (vif) ? vif->bss_conf.txpower : -1;
1276                 ieee80211_iterate_active_interfaces_atomic(
1277                                 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1278                                 ath9k_tpc_vif_iter, &power);
1279                 if (power == -1)
1280                         power = sc->hw->conf.power_level;
1281         } else {
1282                 power = sc->hw->conf.power_level;
1283         }
1284         sc->cur_chan->txpower = 2 * power;
1285         ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
1286         sc->cur_chan->cur_txpower = reg->max_power_level;
1287         ath9k_ps_restore(sc);
1288 }
1289
1290 static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1291                                    struct ieee80211_vif *vif)
1292 {
1293         int i;
1294
1295         if (!ath9k_is_chanctx_enabled())
1296                 return;
1297
1298         for (i = 0; i < IEEE80211_NUM_ACS; i++)
1299                 vif->hw_queue[i] = i;
1300
1301         if (vif->type == NL80211_IFTYPE_AP ||
1302             vif->type == NL80211_IFTYPE_MESH_POINT)
1303                 vif->cab_queue = hw->queues - 2;
1304         else
1305                 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1306 }
1307
1308 static int ath9k_add_interface(struct ieee80211_hw *hw,
1309                                struct ieee80211_vif *vif)
1310 {
1311         struct ath_softc *sc = hw->priv;
1312         struct ath_hw *ah = sc->sc_ah;
1313         struct ath_common *common = ath9k_hw_common(ah);
1314         struct ath_vif *avp = (void *)vif->drv_priv;
1315         struct ath_node *an = &avp->mcast_node;
1316
1317         mutex_lock(&sc->mutex);
1318
1319         if (config_enabled(CONFIG_ATH9K_TX99)) {
1320                 if (sc->cur_chan->nvifs >= 1) {
1321                         mutex_unlock(&sc->mutex);
1322                         return -EOPNOTSUPP;
1323                 }
1324                 sc->tx99_vif = vif;
1325         }
1326
1327         ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1328         sc->cur_chan->nvifs++;
1329
1330         if (ath9k_uses_beacons(vif->type))
1331                 ath9k_beacon_assign_slot(sc, vif);
1332
1333         avp->vif = vif;
1334         if (!ath9k_is_chanctx_enabled()) {
1335                 avp->chanctx = sc->cur_chan;
1336                 list_add_tail(&avp->list, &avp->chanctx->vifs);
1337         }
1338
1339         ath9k_calculate_summary_state(sc, avp->chanctx);
1340
1341         ath9k_assign_hw_queues(hw, vif);
1342
1343         ath9k_set_txpower(sc, vif);
1344
1345         an->sc = sc;
1346         an->sta = NULL;
1347         an->vif = vif;
1348         an->no_ps_filter = true;
1349         ath_tx_node_init(sc, an);
1350
1351         mutex_unlock(&sc->mutex);
1352         return 0;
1353 }
1354
1355 static int ath9k_change_interface(struct ieee80211_hw *hw,
1356                                   struct ieee80211_vif *vif,
1357                                   enum nl80211_iftype new_type,
1358                                   bool p2p)
1359 {
1360         struct ath_softc *sc = hw->priv;
1361         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1362         struct ath_vif *avp = (void *)vif->drv_priv;
1363
1364         mutex_lock(&sc->mutex);
1365
1366         if (config_enabled(CONFIG_ATH9K_TX99)) {
1367                 mutex_unlock(&sc->mutex);
1368                 return -EOPNOTSUPP;
1369         }
1370
1371         ath_dbg(common, CONFIG, "Change Interface\n");
1372
1373         if (ath9k_uses_beacons(vif->type))
1374                 ath9k_beacon_remove_slot(sc, vif);
1375
1376         vif->type = new_type;
1377         vif->p2p = p2p;
1378
1379         if (ath9k_uses_beacons(vif->type))
1380                 ath9k_beacon_assign_slot(sc, vif);
1381
1382         ath9k_assign_hw_queues(hw, vif);
1383         ath9k_calculate_summary_state(sc, avp->chanctx);
1384
1385         ath9k_set_txpower(sc, vif);
1386
1387         mutex_unlock(&sc->mutex);
1388         return 0;
1389 }
1390
1391 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1392                                    struct ieee80211_vif *vif)
1393 {
1394         struct ath_softc *sc = hw->priv;
1395         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1396         struct ath_vif *avp = (void *)vif->drv_priv;
1397
1398         ath_dbg(common, CONFIG, "Detach Interface\n");
1399
1400         mutex_lock(&sc->mutex);
1401
1402         ath9k_p2p_remove_vif(sc, vif);
1403
1404         sc->cur_chan->nvifs--;
1405         sc->tx99_vif = NULL;
1406         if (!ath9k_is_chanctx_enabled())
1407                 list_del(&avp->list);
1408
1409         if (ath9k_uses_beacons(vif->type))
1410                 ath9k_beacon_remove_slot(sc, vif);
1411
1412         ath_tx_node_cleanup(sc, &avp->mcast_node);
1413
1414         ath9k_calculate_summary_state(sc, avp->chanctx);
1415
1416         ath9k_set_txpower(sc, NULL);
1417
1418         mutex_unlock(&sc->mutex);
1419 }
1420
1421 static void ath9k_enable_ps(struct ath_softc *sc)
1422 {
1423         struct ath_hw *ah = sc->sc_ah;
1424         struct ath_common *common = ath9k_hw_common(ah);
1425
1426         if (config_enabled(CONFIG_ATH9K_TX99))
1427                 return;
1428
1429         sc->ps_enabled = true;
1430         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1431                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1432                         ah->imask |= ATH9K_INT_TIM_TIMER;
1433                         ath9k_hw_set_interrupts(ah);
1434                 }
1435                 ath9k_hw_setrxabort(ah, 1);
1436         }
1437         ath_dbg(common, PS, "PowerSave enabled\n");
1438 }
1439
1440 static void ath9k_disable_ps(struct ath_softc *sc)
1441 {
1442         struct ath_hw *ah = sc->sc_ah;
1443         struct ath_common *common = ath9k_hw_common(ah);
1444
1445         if (config_enabled(CONFIG_ATH9K_TX99))
1446                 return;
1447
1448         sc->ps_enabled = false;
1449         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1450         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1451                 ath9k_hw_setrxabort(ah, 0);
1452                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1453                                   PS_WAIT_FOR_CAB |
1454                                   PS_WAIT_FOR_PSPOLL_DATA |
1455                                   PS_WAIT_FOR_TX_ACK);
1456                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1457                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1458                         ath9k_hw_set_interrupts(ah);
1459                 }
1460         }
1461         ath_dbg(common, PS, "PowerSave disabled\n");
1462 }
1463
1464 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1465 {
1466         struct ath_softc *sc = hw->priv;
1467         struct ath_hw *ah = sc->sc_ah;
1468         struct ath_common *common = ath9k_hw_common(ah);
1469         struct ieee80211_conf *conf = &hw->conf;
1470         struct ath_chanctx *ctx = sc->cur_chan;
1471
1472         ath9k_ps_wakeup(sc);
1473         mutex_lock(&sc->mutex);
1474
1475         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1476                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1477                 if (sc->ps_idle) {
1478                         ath_cancel_work(sc);
1479                         ath9k_stop_btcoex(sc);
1480                 } else {
1481                         ath9k_start_btcoex(sc);
1482                         /*
1483                          * The chip needs a reset to properly wake up from
1484                          * full sleep
1485                          */
1486                         ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1487                 }
1488         }
1489
1490         /*
1491          * We just prepare to enable PS. We have to wait until our AP has
1492          * ACK'd our null data frame to disable RX otherwise we'll ignore
1493          * those ACKs and end up retransmitting the same null data frames.
1494          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1495          */
1496         if (changed & IEEE80211_CONF_CHANGE_PS) {
1497                 unsigned long flags;
1498                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1499                 if (conf->flags & IEEE80211_CONF_PS)
1500                         ath9k_enable_ps(sc);
1501                 else
1502                         ath9k_disable_ps(sc);
1503                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1504         }
1505
1506         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1507                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1508                         ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1509                         sc->sc_ah->is_monitoring = true;
1510                 } else {
1511                         ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1512                         sc->sc_ah->is_monitoring = false;
1513                 }
1514         }
1515
1516         if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1517                 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1518                 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1519         }
1520
1521         if (changed & IEEE80211_CONF_CHANGE_POWER)
1522                 ath9k_set_txpower(sc, NULL);
1523
1524         mutex_unlock(&sc->mutex);
1525         ath9k_ps_restore(sc);
1526
1527         return 0;
1528 }
1529
1530 #define SUPPORTED_FILTERS                       \
1531         (FIF_ALLMULTI |                         \
1532         FIF_CONTROL |                           \
1533         FIF_PSPOLL |                            \
1534         FIF_OTHER_BSS |                         \
1535         FIF_BCN_PRBRESP_PROMISC |               \
1536         FIF_PROBE_REQ |                         \
1537         FIF_FCSFAIL)
1538
1539 /* FIXME: sc->sc_full_reset ? */
1540 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1541                                    unsigned int changed_flags,
1542                                    unsigned int *total_flags,
1543                                    u64 multicast)
1544 {
1545         struct ath_softc *sc = hw->priv;
1546         struct ath_chanctx *ctx;
1547         u32 rfilt;
1548
1549         changed_flags &= SUPPORTED_FILTERS;
1550         *total_flags &= SUPPORTED_FILTERS;
1551
1552         spin_lock_bh(&sc->chan_lock);
1553         ath_for_each_chanctx(sc, ctx)
1554                 ctx->rxfilter = *total_flags;
1555 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1556         sc->offchannel.chan.rxfilter = *total_flags;
1557 #endif
1558         spin_unlock_bh(&sc->chan_lock);
1559
1560         ath9k_ps_wakeup(sc);
1561         rfilt = ath_calcrxfilter(sc);
1562         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1563         ath9k_ps_restore(sc);
1564
1565         ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1566                 rfilt);
1567 }
1568
1569 static int ath9k_sta_add(struct ieee80211_hw *hw,
1570                          struct ieee80211_vif *vif,
1571                          struct ieee80211_sta *sta)
1572 {
1573         struct ath_softc *sc = hw->priv;
1574         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1575         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1576         struct ieee80211_key_conf ps_key = { };
1577         int key;
1578
1579         ath_node_attach(sc, sta, vif);
1580
1581         if (vif->type != NL80211_IFTYPE_AP &&
1582             vif->type != NL80211_IFTYPE_AP_VLAN)
1583                 return 0;
1584
1585         key = ath_key_config(common, vif, sta, &ps_key);
1586         if (key > 0) {
1587                 an->ps_key = key;
1588                 an->key_idx[0] = key;
1589         }
1590
1591         return 0;
1592 }
1593
1594 static void ath9k_del_ps_key(struct ath_softc *sc,
1595                              struct ieee80211_vif *vif,
1596                              struct ieee80211_sta *sta)
1597 {
1598         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1599         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1600
1601         if (!an->ps_key)
1602             return;
1603
1604         ath_key_delete(common, an->ps_key);
1605         an->ps_key = 0;
1606         an->key_idx[0] = 0;
1607 }
1608
1609 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1610                             struct ieee80211_vif *vif,
1611                             struct ieee80211_sta *sta)
1612 {
1613         struct ath_softc *sc = hw->priv;
1614
1615         ath9k_del_ps_key(sc, vif, sta);
1616         ath_node_detach(sc, sta);
1617
1618         return 0;
1619 }
1620
1621 static int ath9k_sta_state(struct ieee80211_hw *hw,
1622                            struct ieee80211_vif *vif,
1623                            struct ieee80211_sta *sta,
1624                            enum ieee80211_sta_state old_state,
1625                            enum ieee80211_sta_state new_state)
1626 {
1627         struct ath_softc *sc = hw->priv;
1628         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1629         int ret = 0;
1630
1631         if (old_state == IEEE80211_STA_NOTEXIST &&
1632             new_state == IEEE80211_STA_NONE) {
1633                 ret = ath9k_sta_add(hw, vif, sta);
1634                 ath_dbg(common, CONFIG,
1635                         "Add station: %pM\n", sta->addr);
1636         } else if (old_state == IEEE80211_STA_NONE &&
1637                    new_state == IEEE80211_STA_NOTEXIST) {
1638                 ret = ath9k_sta_remove(hw, vif, sta);
1639                 ath_dbg(common, CONFIG,
1640                         "Remove station: %pM\n", sta->addr);
1641         }
1642
1643         if (ath9k_is_chanctx_enabled()) {
1644                 if (vif->type == NL80211_IFTYPE_STATION) {
1645                         if (old_state == IEEE80211_STA_ASSOC &&
1646                             new_state == IEEE80211_STA_AUTHORIZED)
1647                                 ath_chanctx_event(sc, vif,
1648                                                   ATH_CHANCTX_EVENT_AUTHORIZED);
1649                 }
1650         }
1651
1652         return ret;
1653 }
1654
1655 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1656                                     struct ath_node *an,
1657                                     bool set)
1658 {
1659         int i;
1660
1661         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1662                 if (!an->key_idx[i])
1663                         continue;
1664                 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1665         }
1666 }
1667
1668 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1669                          struct ieee80211_vif *vif,
1670                          enum sta_notify_cmd cmd,
1671                          struct ieee80211_sta *sta)
1672 {
1673         struct ath_softc *sc = hw->priv;
1674         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1675
1676         switch (cmd) {
1677         case STA_NOTIFY_SLEEP:
1678                 an->sleeping = true;
1679                 ath_tx_aggr_sleep(sta, sc, an);
1680                 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1681                 break;
1682         case STA_NOTIFY_AWAKE:
1683                 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1684                 an->sleeping = false;
1685                 ath_tx_aggr_wakeup(sc, an);
1686                 break;
1687         }
1688 }
1689
1690 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1691                          struct ieee80211_vif *vif, u16 queue,
1692                          const struct ieee80211_tx_queue_params *params)
1693 {
1694         struct ath_softc *sc = hw->priv;
1695         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1696         struct ath_txq *txq;
1697         struct ath9k_tx_queue_info qi;
1698         int ret = 0;
1699
1700         if (queue >= IEEE80211_NUM_ACS)
1701                 return 0;
1702
1703         txq = sc->tx.txq_map[queue];
1704
1705         ath9k_ps_wakeup(sc);
1706         mutex_lock(&sc->mutex);
1707
1708         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1709
1710         qi.tqi_aifs = params->aifs;
1711         qi.tqi_cwmin = params->cw_min;
1712         qi.tqi_cwmax = params->cw_max;
1713         qi.tqi_burstTime = params->txop * 32;
1714
1715         ath_dbg(common, CONFIG,
1716                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1717                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1718                 params->cw_max, params->txop);
1719
1720         ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1721         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1722         if (ret)
1723                 ath_err(common, "TXQ Update failed\n");
1724
1725         mutex_unlock(&sc->mutex);
1726         ath9k_ps_restore(sc);
1727
1728         return ret;
1729 }
1730
1731 static int ath9k_set_key(struct ieee80211_hw *hw,
1732                          enum set_key_cmd cmd,
1733                          struct ieee80211_vif *vif,
1734                          struct ieee80211_sta *sta,
1735                          struct ieee80211_key_conf *key)
1736 {
1737         struct ath_softc *sc = hw->priv;
1738         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1739         struct ath_node *an = NULL;
1740         int ret = 0, i;
1741
1742         if (ath9k_modparam_nohwcrypt)
1743                 return -ENOSPC;
1744
1745         if ((vif->type == NL80211_IFTYPE_ADHOC ||
1746              vif->type == NL80211_IFTYPE_MESH_POINT) &&
1747             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1748              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1749             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1750                 /*
1751                  * For now, disable hw crypto for the RSN IBSS group keys. This
1752                  * could be optimized in the future to use a modified key cache
1753                  * design to support per-STA RX GTK, but until that gets
1754                  * implemented, use of software crypto for group addressed
1755                  * frames is a acceptable to allow RSN IBSS to be used.
1756                  */
1757                 return -EOPNOTSUPP;
1758         }
1759
1760         mutex_lock(&sc->mutex);
1761         ath9k_ps_wakeup(sc);
1762         ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1763         if (sta)
1764                 an = (struct ath_node *)sta->drv_priv;
1765
1766         /* Delete pending key cache entries if no more frames are pointing to
1767          * them in TXQs.
1768          */
1769         for (i = 0; i < ATH_KEYMAX; i++)
1770                 ath9k_pending_key_del(sc, i);
1771
1772         switch (cmd) {
1773         case SET_KEY:
1774                 if (sta)
1775                         ath9k_del_ps_key(sc, vif, sta);
1776
1777                 key->hw_key_idx = 0;
1778                 ret = ath_key_config(common, vif, sta, key);
1779                 if (ret >= 0) {
1780                         key->hw_key_idx = ret;
1781                         /* push IV and Michael MIC generation to stack */
1782                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1783                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1784                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1785                         if (sc->sc_ah->sw_mgmt_crypto_tx &&
1786                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1787                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1788                         ret = 0;
1789                 }
1790                 if (an && key->hw_key_idx) {
1791                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1792                                 if (an->key_idx[i])
1793                                         continue;
1794                                 an->key_idx[i] = key->hw_key_idx;
1795                                 break;
1796                         }
1797                         WARN_ON(i == ARRAY_SIZE(an->key_idx));
1798                 }
1799                 break;
1800         case DISABLE_KEY:
1801                 if (ath9k_txq_has_key(sc, key->hw_key_idx)) {
1802                         /* Delay key cache entry deletion until there are no
1803                          * remaining TXQ frames pointing to this entry.
1804                          */
1805                         set_bit(key->hw_key_idx, sc->sc_ah->pending_del_keymap);
1806                         ath_hw_keysetmac(common, key->hw_key_idx, NULL);
1807                 } else {
1808                         ath_key_delete(common, key->hw_key_idx);
1809                 }
1810                 if (an) {
1811                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1812                                 if (an->key_idx[i] != key->hw_key_idx)
1813                                         continue;
1814                                 an->key_idx[i] = 0;
1815                                 break;
1816                         }
1817                 }
1818                 key->hw_key_idx = 0;
1819                 break;
1820         default:
1821                 ret = -EINVAL;
1822         }
1823
1824         ath9k_ps_restore(sc);
1825         mutex_unlock(&sc->mutex);
1826
1827         return ret;
1828 }
1829
1830 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1831                                    struct ieee80211_vif *vif,
1832                                    struct ieee80211_bss_conf *bss_conf,
1833                                    u32 changed)
1834 {
1835 #define CHECK_ANI                               \
1836         (BSS_CHANGED_ASSOC |                    \
1837          BSS_CHANGED_IBSS |                     \
1838          BSS_CHANGED_BEACON_ENABLED)
1839
1840         struct ath_softc *sc = hw->priv;
1841         struct ath_hw *ah = sc->sc_ah;
1842         struct ath_common *common = ath9k_hw_common(ah);
1843         struct ath_vif *avp = (void *)vif->drv_priv;
1844         int slottime;
1845
1846         ath9k_ps_wakeup(sc);
1847         mutex_lock(&sc->mutex);
1848
1849         if (changed & BSS_CHANGED_ASSOC) {
1850                 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1851                         bss_conf->bssid, bss_conf->assoc);
1852
1853                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1854                 avp->aid = bss_conf->aid;
1855                 avp->assoc = bss_conf->assoc;
1856
1857                 ath9k_calculate_summary_state(sc, avp->chanctx);
1858         }
1859
1860         if ((changed & BSS_CHANGED_IBSS) ||
1861               (changed & BSS_CHANGED_OCB)) {
1862                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1863                 common->curaid = bss_conf->aid;
1864                 ath9k_hw_write_associd(sc->sc_ah);
1865         }
1866
1867         if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1868             (changed & BSS_CHANGED_BEACON_INT) ||
1869             (changed & BSS_CHANGED_BEACON_INFO)) {
1870                 ath9k_beacon_config(sc, vif, changed);
1871                 if (changed & BSS_CHANGED_BEACON_ENABLED)
1872                         ath9k_calculate_summary_state(sc, avp->chanctx);
1873         }
1874
1875         if ((avp->chanctx == sc->cur_chan) &&
1876             (changed & BSS_CHANGED_ERP_SLOT)) {
1877                 if (bss_conf->use_short_slot)
1878                         slottime = 9;
1879                 else
1880                         slottime = 20;
1881                 if (vif->type == NL80211_IFTYPE_AP) {
1882                         /*
1883                          * Defer update, so that connected stations can adjust
1884                          * their settings at the same time.
1885                          * See beacon.c for more details
1886                          */
1887                         sc->beacon.slottime = slottime;
1888                         sc->beacon.updateslot = UPDATE;
1889                 } else {
1890                         ah->slottime = slottime;
1891                         ath9k_hw_init_global_settings(ah);
1892                 }
1893         }
1894
1895         if (changed & BSS_CHANGED_P2P_PS)
1896                 ath9k_p2p_bss_info_changed(sc, vif);
1897
1898         if (changed & CHECK_ANI)
1899                 ath_check_ani(sc);
1900
1901         if (changed & BSS_CHANGED_TXPOWER) {
1902                 ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n",
1903                         vif->addr, bss_conf->txpower, bss_conf->txpower_type);
1904                 ath9k_set_txpower(sc, vif);
1905         }
1906
1907         mutex_unlock(&sc->mutex);
1908         ath9k_ps_restore(sc);
1909
1910 #undef CHECK_ANI
1911 }
1912
1913 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1914 {
1915         struct ath_softc *sc = hw->priv;
1916         u64 tsf;
1917
1918         mutex_lock(&sc->mutex);
1919         ath9k_ps_wakeup(sc);
1920         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1921         ath9k_ps_restore(sc);
1922         mutex_unlock(&sc->mutex);
1923
1924         return tsf;
1925 }
1926
1927 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1928                           struct ieee80211_vif *vif,
1929                           u64 tsf)
1930 {
1931         struct ath_softc *sc = hw->priv;
1932
1933         mutex_lock(&sc->mutex);
1934         ath9k_ps_wakeup(sc);
1935         ath9k_hw_settsf64(sc->sc_ah, tsf);
1936         ath9k_ps_restore(sc);
1937         mutex_unlock(&sc->mutex);
1938 }
1939
1940 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1941 {
1942         struct ath_softc *sc = hw->priv;
1943
1944         mutex_lock(&sc->mutex);
1945
1946         ath9k_ps_wakeup(sc);
1947         ath9k_hw_reset_tsf(sc->sc_ah);
1948         ath9k_ps_restore(sc);
1949
1950         mutex_unlock(&sc->mutex);
1951 }
1952
1953 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1954                               struct ieee80211_vif *vif,
1955                               struct ieee80211_ampdu_params *params)
1956 {
1957         struct ath_softc *sc = hw->priv;
1958         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1959         bool flush = false;
1960         int ret = 0;
1961         struct ieee80211_sta *sta = params->sta;
1962         enum ieee80211_ampdu_mlme_action action = params->action;
1963         u16 tid = params->tid;
1964         u16 *ssn = &params->ssn;
1965
1966         mutex_lock(&sc->mutex);
1967
1968         switch (action) {
1969         case IEEE80211_AMPDU_RX_START:
1970                 break;
1971         case IEEE80211_AMPDU_RX_STOP:
1972                 break;
1973         case IEEE80211_AMPDU_TX_START:
1974                 if (ath9k_is_chanctx_enabled()) {
1975                         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
1976                                 ret = -EBUSY;
1977                                 break;
1978                         }
1979                 }
1980                 ath9k_ps_wakeup(sc);
1981                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1982                 if (!ret)
1983                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1984                 ath9k_ps_restore(sc);
1985                 break;
1986         case IEEE80211_AMPDU_TX_STOP_FLUSH:
1987         case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1988                 flush = true;
1989         case IEEE80211_AMPDU_TX_STOP_CONT:
1990                 ath9k_ps_wakeup(sc);
1991                 ath_tx_aggr_stop(sc, sta, tid);
1992                 if (!flush)
1993                         ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1994                 ath9k_ps_restore(sc);
1995                 break;
1996         case IEEE80211_AMPDU_TX_OPERATIONAL:
1997                 ath9k_ps_wakeup(sc);
1998                 ath_tx_aggr_resume(sc, sta, tid);
1999                 ath9k_ps_restore(sc);
2000                 break;
2001         default:
2002                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2003         }
2004
2005         mutex_unlock(&sc->mutex);
2006
2007         return ret;
2008 }
2009
2010 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2011                              struct survey_info *survey)
2012 {
2013         struct ath_softc *sc = hw->priv;
2014         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2015         struct ieee80211_supported_band *sband;
2016         struct ieee80211_channel *chan;
2017         int pos;
2018
2019         if (config_enabled(CONFIG_ATH9K_TX99))
2020                 return -EOPNOTSUPP;
2021
2022         spin_lock_bh(&common->cc_lock);
2023         if (idx == 0)
2024                 ath_update_survey_stats(sc);
2025
2026         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2027         if (sband && idx >= sband->n_channels) {
2028                 idx -= sband->n_channels;
2029                 sband = NULL;
2030         }
2031
2032         if (!sband)
2033                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2034
2035         if (!sband || idx >= sband->n_channels) {
2036                 spin_unlock_bh(&common->cc_lock);
2037                 return -ENOENT;
2038         }
2039
2040         chan = &sband->channels[idx];
2041         pos = chan->hw_value;
2042         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2043         survey->channel = chan;
2044         spin_unlock_bh(&common->cc_lock);
2045
2046         return 0;
2047 }
2048
2049 static void ath9k_enable_dynack(struct ath_softc *sc)
2050 {
2051 #ifdef CONFIG_ATH9K_DYNACK
2052         u32 rfilt;
2053         struct ath_hw *ah = sc->sc_ah;
2054
2055         ath_dynack_reset(ah);
2056
2057         ah->dynack.enabled = true;
2058         rfilt = ath_calcrxfilter(sc);
2059         ath9k_hw_setrxfilter(ah, rfilt);
2060 #endif
2061 }
2062
2063 static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
2064                                      s16 coverage_class)
2065 {
2066         struct ath_softc *sc = hw->priv;
2067         struct ath_hw *ah = sc->sc_ah;
2068
2069         if (config_enabled(CONFIG_ATH9K_TX99))
2070                 return;
2071
2072         mutex_lock(&sc->mutex);
2073
2074         if (coverage_class >= 0) {
2075                 ah->coverage_class = coverage_class;
2076                 if (ah->dynack.enabled) {
2077                         u32 rfilt;
2078
2079                         ah->dynack.enabled = false;
2080                         rfilt = ath_calcrxfilter(sc);
2081                         ath9k_hw_setrxfilter(ah, rfilt);
2082                 }
2083                 ath9k_ps_wakeup(sc);
2084                 ath9k_hw_init_global_settings(ah);
2085                 ath9k_ps_restore(sc);
2086         } else if (!ah->dynack.enabled) {
2087                 ath9k_enable_dynack(sc);
2088         }
2089
2090         mutex_unlock(&sc->mutex);
2091 }
2092
2093 static bool ath9k_has_tx_pending(struct ath_softc *sc,
2094                                  bool sw_pending)
2095 {
2096         int i, npend = 0;
2097
2098         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2099                 if (!ATH_TXQ_SETUP(sc, i))
2100                         continue;
2101
2102                 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
2103                                                  sw_pending);
2104                 if (npend)
2105                         break;
2106         }
2107
2108         return !!npend;
2109 }
2110
2111 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2112                         u32 queues, bool drop)
2113 {
2114         struct ath_softc *sc = hw->priv;
2115         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2116
2117         if (ath9k_is_chanctx_enabled()) {
2118                 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2119                         goto flush;
2120
2121                 /*
2122                  * If MCC is active, extend the flush timeout
2123                  * and wait for the HW/SW queues to become
2124                  * empty. This needs to be done outside the
2125                  * sc->mutex lock to allow the channel scheduler
2126                  * to switch channel contexts.
2127                  *
2128                  * The vif queues have been stopped in mac80211,
2129                  * so there won't be any incoming frames.
2130                  */
2131                 __ath9k_flush(hw, queues, drop, true, true);
2132                 return;
2133         }
2134 flush:
2135         mutex_lock(&sc->mutex);
2136         __ath9k_flush(hw, queues, drop, true, false);
2137         mutex_unlock(&sc->mutex);
2138 }
2139
2140 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2141                    bool sw_pending, bool timeout_override)
2142 {
2143         struct ath_softc *sc = hw->priv;
2144         struct ath_hw *ah = sc->sc_ah;
2145         struct ath_common *common = ath9k_hw_common(ah);
2146         int timeout;
2147         bool drain_txq;
2148
2149         cancel_delayed_work_sync(&sc->tx_complete_work);
2150
2151         if (ah->ah_flags & AH_UNPLUGGED) {
2152                 ath_dbg(common, ANY, "Device has been unplugged!\n");
2153                 return;
2154         }
2155
2156         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2157                 ath_dbg(common, ANY, "Device not present\n");
2158                 return;
2159         }
2160
2161         spin_lock_bh(&sc->chan_lock);
2162         if (timeout_override)
2163                 timeout = HZ / 5;
2164         else
2165                 timeout = sc->cur_chan->flush_timeout;
2166         spin_unlock_bh(&sc->chan_lock);
2167
2168         ath_dbg(common, CHAN_CTX,
2169                 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2170
2171         if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2172                                timeout) > 0)
2173                 drop = false;
2174
2175         if (drop) {
2176                 ath9k_ps_wakeup(sc);
2177                 spin_lock_bh(&sc->sc_pcu_lock);
2178                 drain_txq = ath_drain_all_txq(sc);
2179                 spin_unlock_bh(&sc->sc_pcu_lock);
2180
2181                 if (!drain_txq)
2182                         ath_reset(sc, NULL);
2183
2184                 ath9k_ps_restore(sc);
2185         }
2186
2187         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2188 }
2189
2190 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2191 {
2192         struct ath_softc *sc = hw->priv;
2193
2194         return ath9k_has_tx_pending(sc, true);
2195 }
2196
2197 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2198 {
2199         struct ath_softc *sc = hw->priv;
2200         struct ath_hw *ah = sc->sc_ah;
2201         struct ieee80211_vif *vif;
2202         struct ath_vif *avp;
2203         struct ath_buf *bf;
2204         struct ath_tx_status ts;
2205         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2206         int status;
2207
2208         vif = sc->beacon.bslot[0];
2209         if (!vif)
2210                 return 0;
2211
2212         if (!vif->bss_conf.enable_beacon)
2213                 return 0;
2214
2215         avp = (void *)vif->drv_priv;
2216
2217         if (!sc->beacon.tx_processed && !edma) {
2218                 tasklet_disable(&sc->bcon_tasklet);
2219
2220                 bf = avp->av_bcbuf;
2221                 if (!bf || !bf->bf_mpdu)
2222                         goto skip;
2223
2224                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2225                 if (status == -EINPROGRESS)
2226                         goto skip;
2227
2228                 sc->beacon.tx_processed = true;
2229                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2230
2231 skip:
2232                 tasklet_enable(&sc->bcon_tasklet);
2233         }
2234
2235         return sc->beacon.tx_last;
2236 }
2237
2238 static int ath9k_get_stats(struct ieee80211_hw *hw,
2239                            struct ieee80211_low_level_stats *stats)
2240 {
2241         struct ath_softc *sc = hw->priv;
2242         struct ath_hw *ah = sc->sc_ah;
2243         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2244
2245         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2246         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2247         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2248         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2249         return 0;
2250 }
2251
2252 static u32 fill_chainmask(u32 cap, u32 new)
2253 {
2254         u32 filled = 0;
2255         int i;
2256
2257         for (i = 0; cap && new; i++, cap >>= 1) {
2258                 if (!(cap & BIT(0)))
2259                         continue;
2260
2261                 if (new & BIT(0))
2262                         filled |= BIT(i);
2263
2264                 new >>= 1;
2265         }
2266
2267         return filled;
2268 }
2269
2270 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2271 {
2272         if (AR_SREV_9300_20_OR_LATER(ah))
2273                 return true;
2274
2275         switch (val & 0x7) {
2276         case 0x1:
2277         case 0x3:
2278         case 0x7:
2279                 return true;
2280         case 0x2:
2281                 return (ah->caps.rx_chainmask == 1);
2282         default:
2283                 return false;
2284         }
2285 }
2286
2287 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2288 {
2289         struct ath_softc *sc = hw->priv;
2290         struct ath_hw *ah = sc->sc_ah;
2291
2292         if (ah->caps.rx_chainmask != 1)
2293                 rx_ant |= tx_ant;
2294
2295         if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2296                 return -EINVAL;
2297
2298         sc->ant_rx = rx_ant;
2299         sc->ant_tx = tx_ant;
2300
2301         if (ah->caps.rx_chainmask == 1)
2302                 return 0;
2303
2304         /* AR9100 runs into calibration issues if not all rx chains are enabled */
2305         if (AR_SREV_9100(ah))
2306                 ah->rxchainmask = 0x7;
2307         else
2308                 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2309
2310         ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2311         ath9k_cmn_reload_chainmask(ah);
2312
2313         return 0;
2314 }
2315
2316 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2317 {
2318         struct ath_softc *sc = hw->priv;
2319
2320         *tx_ant = sc->ant_tx;
2321         *rx_ant = sc->ant_rx;
2322         return 0;
2323 }
2324
2325 static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2326                                 struct ieee80211_vif *vif,
2327                                 const u8 *mac_addr)
2328 {
2329         struct ath_softc *sc = hw->priv;
2330         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2331         set_bit(ATH_OP_SCANNING, &common->op_flags);
2332 }
2333
2334 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2335                                    struct ieee80211_vif *vif)
2336 {
2337         struct ath_softc *sc = hw->priv;
2338         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2339         clear_bit(ATH_OP_SCANNING, &common->op_flags);
2340 }
2341
2342 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2343
2344 static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2345 {
2346         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2347
2348         if (sc->offchannel.roc_vif) {
2349                 ath_dbg(common, CHAN_CTX,
2350                         "%s: Aborting RoC\n", __func__);
2351
2352                 del_timer_sync(&sc->offchannel.timer);
2353                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2354                         ath_roc_complete(sc, ATH_ROC_COMPLETE_ABORT);
2355         }
2356
2357         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2358                 ath_dbg(common, CHAN_CTX,
2359                         "%s: Aborting HW scan\n", __func__);
2360
2361                 del_timer_sync(&sc->offchannel.timer);
2362                 ath_scan_complete(sc, true);
2363         }
2364 }
2365
2366 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2367                          struct ieee80211_scan_request *hw_req)
2368 {
2369         struct cfg80211_scan_request *req = &hw_req->req;
2370         struct ath_softc *sc = hw->priv;
2371         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2372         int ret = 0;
2373
2374         mutex_lock(&sc->mutex);
2375
2376         if (WARN_ON(sc->offchannel.scan_req)) {
2377                 ret = -EBUSY;
2378                 goto out;
2379         }
2380
2381         ath9k_ps_wakeup(sc);
2382         set_bit(ATH_OP_SCANNING, &common->op_flags);
2383         sc->offchannel.scan_vif = vif;
2384         sc->offchannel.scan_req = req;
2385         sc->offchannel.scan_idx = 0;
2386
2387         ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2388                 vif->addr);
2389
2390         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2391                 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2392                 ath_offchannel_next(sc);
2393         }
2394
2395 out:
2396         mutex_unlock(&sc->mutex);
2397
2398         return ret;
2399 }
2400
2401 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2402                                  struct ieee80211_vif *vif)
2403 {
2404         struct ath_softc *sc = hw->priv;
2405         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2406
2407         ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2408
2409         mutex_lock(&sc->mutex);
2410         del_timer_sync(&sc->offchannel.timer);
2411         ath_scan_complete(sc, true);
2412         mutex_unlock(&sc->mutex);
2413 }
2414
2415 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2416                                    struct ieee80211_vif *vif,
2417                                    struct ieee80211_channel *chan, int duration,
2418                                    enum ieee80211_roc_type type)
2419 {
2420         struct ath_softc *sc = hw->priv;
2421         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2422         int ret = 0;
2423
2424         mutex_lock(&sc->mutex);
2425
2426         if (WARN_ON(sc->offchannel.roc_vif)) {
2427                 ret = -EBUSY;
2428                 goto out;
2429         }
2430
2431         ath9k_ps_wakeup(sc);
2432         sc->offchannel.roc_vif = vif;
2433         sc->offchannel.roc_chan = chan;
2434         sc->offchannel.roc_duration = duration;
2435
2436         ath_dbg(common, CHAN_CTX,
2437                 "RoC request on vif: %pM, type: %d duration: %d\n",
2438                 vif->addr, type, duration);
2439
2440         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2441                 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2442                 ath_offchannel_next(sc);
2443         }
2444
2445 out:
2446         mutex_unlock(&sc->mutex);
2447
2448         return ret;
2449 }
2450
2451 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2452 {
2453         struct ath_softc *sc = hw->priv;
2454         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2455
2456         mutex_lock(&sc->mutex);
2457
2458         ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2459         del_timer_sync(&sc->offchannel.timer);
2460
2461         if (sc->offchannel.roc_vif) {
2462                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2463                         ath_roc_complete(sc, ATH_ROC_COMPLETE_CANCEL);
2464         }
2465
2466         mutex_unlock(&sc->mutex);
2467
2468         return 0;
2469 }
2470
2471 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2472                              struct ieee80211_chanctx_conf *conf)
2473 {
2474         struct ath_softc *sc = hw->priv;
2475         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2476         struct ath_chanctx *ctx, **ptr;
2477         int pos;
2478
2479         mutex_lock(&sc->mutex);
2480
2481         ath_for_each_chanctx(sc, ctx) {
2482                 if (ctx->assigned)
2483                         continue;
2484
2485                 ptr = (void *) conf->drv_priv;
2486                 *ptr = ctx;
2487                 ctx->assigned = true;
2488                 pos = ctx - &sc->chanctx[0];
2489                 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2490
2491                 ath_dbg(common, CHAN_CTX,
2492                         "Add channel context: %d MHz\n",
2493                         conf->def.chan->center_freq);
2494
2495                 ath_chanctx_set_channel(sc, ctx, &conf->def);
2496
2497                 mutex_unlock(&sc->mutex);
2498                 return 0;
2499         }
2500
2501         mutex_unlock(&sc->mutex);
2502         return -ENOSPC;
2503 }
2504
2505
2506 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2507                                  struct ieee80211_chanctx_conf *conf)
2508 {
2509         struct ath_softc *sc = hw->priv;
2510         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2511         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2512
2513         mutex_lock(&sc->mutex);
2514
2515         ath_dbg(common, CHAN_CTX,
2516                 "Remove channel context: %d MHz\n",
2517                 conf->def.chan->center_freq);
2518
2519         ctx->assigned = false;
2520         ctx->hw_queue_base = 0;
2521         ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2522
2523         mutex_unlock(&sc->mutex);
2524 }
2525
2526 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2527                                  struct ieee80211_chanctx_conf *conf,
2528                                  u32 changed)
2529 {
2530         struct ath_softc *sc = hw->priv;
2531         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2532         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2533
2534         mutex_lock(&sc->mutex);
2535         ath_dbg(common, CHAN_CTX,
2536                 "Change channel context: %d MHz\n",
2537                 conf->def.chan->center_freq);
2538         ath_chanctx_set_channel(sc, ctx, &conf->def);
2539         mutex_unlock(&sc->mutex);
2540 }
2541
2542 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2543                                     struct ieee80211_vif *vif,
2544                                     struct ieee80211_chanctx_conf *conf)
2545 {
2546         struct ath_softc *sc = hw->priv;
2547         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2548         struct ath_vif *avp = (void *)vif->drv_priv;
2549         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2550         int i;
2551
2552         ath9k_cancel_pending_offchannel(sc);
2553
2554         mutex_lock(&sc->mutex);
2555
2556         ath_dbg(common, CHAN_CTX,
2557                 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2558                 vif->addr, vif->type, vif->p2p,
2559                 conf->def.chan->center_freq);
2560
2561         avp->chanctx = ctx;
2562         ctx->nvifs_assigned++;
2563         list_add_tail(&avp->list, &ctx->vifs);
2564         ath9k_calculate_summary_state(sc, ctx);
2565         for (i = 0; i < IEEE80211_NUM_ACS; i++)
2566                 vif->hw_queue[i] = ctx->hw_queue_base + i;
2567
2568         mutex_unlock(&sc->mutex);
2569
2570         return 0;
2571 }
2572
2573 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2574                                        struct ieee80211_vif *vif,
2575                                        struct ieee80211_chanctx_conf *conf)
2576 {
2577         struct ath_softc *sc = hw->priv;
2578         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2579         struct ath_vif *avp = (void *)vif->drv_priv;
2580         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2581         int ac;
2582
2583         ath9k_cancel_pending_offchannel(sc);
2584
2585         mutex_lock(&sc->mutex);
2586
2587         ath_dbg(common, CHAN_CTX,
2588                 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2589                 vif->addr, vif->type, vif->p2p,
2590                 conf->def.chan->center_freq);
2591
2592         avp->chanctx = NULL;
2593         ctx->nvifs_assigned--;
2594         list_del(&avp->list);
2595         ath9k_calculate_summary_state(sc, ctx);
2596         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2597                 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2598
2599         mutex_unlock(&sc->mutex);
2600 }
2601
2602 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2603                                  struct ieee80211_vif *vif)
2604 {
2605         struct ath_softc *sc = hw->priv;
2606         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2607         struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2608         struct ath_beacon_config *cur_conf;
2609         struct ath_chanctx *go_ctx;
2610         unsigned long timeout;
2611         bool changed = false;
2612         u32 beacon_int;
2613
2614         if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2615                 return;
2616
2617         if (!avp->chanctx)
2618                 return;
2619
2620         mutex_lock(&sc->mutex);
2621
2622         spin_lock_bh(&sc->chan_lock);
2623         if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2624                 changed = true;
2625         spin_unlock_bh(&sc->chan_lock);
2626
2627         if (!changed)
2628                 goto out;
2629
2630         ath9k_cancel_pending_offchannel(sc);
2631
2632         go_ctx = ath_is_go_chanctx_present(sc);
2633
2634         if (go_ctx) {
2635                 /*
2636                  * Wait till the GO interface gets a chance
2637                  * to send out an NoA.
2638                  */
2639                 spin_lock_bh(&sc->chan_lock);
2640                 sc->sched.mgd_prepare_tx = true;
2641                 cur_conf = &go_ctx->beacon;
2642                 beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2643                 spin_unlock_bh(&sc->chan_lock);
2644
2645                 timeout = usecs_to_jiffies(beacon_int * 2);
2646                 init_completion(&sc->go_beacon);
2647
2648                 mutex_unlock(&sc->mutex);
2649
2650                 if (wait_for_completion_timeout(&sc->go_beacon,
2651                                                 timeout) == 0) {
2652                         ath_dbg(common, CHAN_CTX,
2653                                 "Failed to send new NoA\n");
2654
2655                         spin_lock_bh(&sc->chan_lock);
2656                         sc->sched.mgd_prepare_tx = false;
2657                         spin_unlock_bh(&sc->chan_lock);
2658                 }
2659
2660                 mutex_lock(&sc->mutex);
2661         }
2662
2663         ath_dbg(common, CHAN_CTX,
2664                 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2665                 __func__, vif->addr);
2666
2667         spin_lock_bh(&sc->chan_lock);
2668         sc->next_chan = avp->chanctx;
2669         sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2670         spin_unlock_bh(&sc->chan_lock);
2671
2672         ath_chanctx_set_next(sc, true);
2673 out:
2674         mutex_unlock(&sc->mutex);
2675 }
2676
2677 void ath9k_fill_chanctx_ops(void)
2678 {
2679         if (!ath9k_is_chanctx_enabled())
2680                 return;
2681
2682         ath9k_ops.hw_scan                  = ath9k_hw_scan;
2683         ath9k_ops.cancel_hw_scan           = ath9k_cancel_hw_scan;
2684         ath9k_ops.remain_on_channel        = ath9k_remain_on_channel;
2685         ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2686         ath9k_ops.add_chanctx              = ath9k_add_chanctx;
2687         ath9k_ops.remove_chanctx           = ath9k_remove_chanctx;
2688         ath9k_ops.change_chanctx           = ath9k_change_chanctx;
2689         ath9k_ops.assign_vif_chanctx       = ath9k_assign_vif_chanctx;
2690         ath9k_ops.unassign_vif_chanctx     = ath9k_unassign_vif_chanctx;
2691         ath9k_ops.mgd_prepare_tx           = ath9k_mgd_prepare_tx;
2692 }
2693
2694 #endif
2695
2696 static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2697                              int *dbm)
2698 {
2699         struct ath_softc *sc = hw->priv;
2700         struct ath_vif *avp = (void *)vif->drv_priv;
2701
2702         mutex_lock(&sc->mutex);
2703         if (avp->chanctx)
2704                 *dbm = avp->chanctx->cur_txpower;
2705         else
2706                 *dbm = sc->cur_chan->cur_txpower;
2707         mutex_unlock(&sc->mutex);
2708
2709         *dbm /= 2;
2710
2711         return 0;
2712 }
2713
2714 struct ieee80211_ops ath9k_ops = {
2715         .tx                 = ath9k_tx,
2716         .start              = ath9k_start,
2717         .stop               = ath9k_stop,
2718         .add_interface      = ath9k_add_interface,
2719         .change_interface   = ath9k_change_interface,
2720         .remove_interface   = ath9k_remove_interface,
2721         .config             = ath9k_config,
2722         .configure_filter   = ath9k_configure_filter,
2723         .sta_state          = ath9k_sta_state,
2724         .sta_notify         = ath9k_sta_notify,
2725         .conf_tx            = ath9k_conf_tx,
2726         .bss_info_changed   = ath9k_bss_info_changed,
2727         .set_key            = ath9k_set_key,
2728         .get_tsf            = ath9k_get_tsf,
2729         .set_tsf            = ath9k_set_tsf,
2730         .reset_tsf          = ath9k_reset_tsf,
2731         .ampdu_action       = ath9k_ampdu_action,
2732         .get_survey         = ath9k_get_survey,
2733         .rfkill_poll        = ath9k_rfkill_poll_state,
2734         .set_coverage_class = ath9k_set_coverage_class,
2735         .flush              = ath9k_flush,
2736         .tx_frames_pending  = ath9k_tx_frames_pending,
2737         .tx_last_beacon     = ath9k_tx_last_beacon,
2738         .release_buffered_frames = ath9k_release_buffered_frames,
2739         .get_stats          = ath9k_get_stats,
2740         .set_antenna        = ath9k_set_antenna,
2741         .get_antenna        = ath9k_get_antenna,
2742
2743 #ifdef CONFIG_ATH9K_WOW
2744         .suspend            = ath9k_suspend,
2745         .resume             = ath9k_resume,
2746         .set_wakeup         = ath9k_set_wakeup,
2747 #endif
2748
2749 #ifdef CONFIG_ATH9K_DEBUGFS
2750         .get_et_sset_count  = ath9k_get_et_sset_count,
2751         .get_et_stats       = ath9k_get_et_stats,
2752         .get_et_strings     = ath9k_get_et_strings,
2753 #endif
2754
2755 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2756         .sta_add_debugfs    = ath9k_sta_add_debugfs,
2757 #endif
2758         .sw_scan_start      = ath9k_sw_scan_start,
2759         .sw_scan_complete   = ath9k_sw_scan_complete,
2760         .get_txpower        = ath9k_get_txpower,
2761 };