drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
  58                                      bool sw_pending)
  59 {
  60         bool pending = false;
  61
  62         spin_lock_bh(&txq->axq_lock);
  63
  64         if (txq->axq_depth) {
  65                 pending = true;
  66                 goto out;
  67         }
  68
  69         if (!sw_pending)
  70                 goto out;
  71
  72         if (txq->mac80211_qnum >= 0) {
  73                 struct ath_acq *acq;
  74
  75                 acq = &sc->cur_chan->acq[txq->mac80211_qnum];
  76                 if (!list_empty(&acq->acq_new) || !list_empty(&acq->acq_old))
  77                         pending = true;
  78         }
  79 out:
  80         spin_unlock_bh(&txq->axq_lock);
  81         return pending;
  82 }
  83
  84 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  85 {
  86         unsigned long flags;
  87         bool ret;
  88
  89         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  90         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  91         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  92
  93         return ret;
  94 }
  95
  96 void ath_ps_full_sleep(unsigned long data)
  97 {
  98         struct ath_softc *sc = (struct ath_softc *) data;
  99         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 100         bool reset;
 101
 102         spin_lock(&common->cc_lock);
 103         ath_hw_cycle_counters_update(common);
 104         spin_unlock(&common->cc_lock);
 105
 106         ath9k_hw_setrxabort(sc->sc_ah, 1);
 107         ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 108
 109         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 110 }
 111
 112 void ath9k_ps_wakeup(struct ath_softc *sc)
 113 {
 114         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 115         unsigned long flags;
 116         enum ath9k_power_mode power_mode;
 117
 118         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 119         if (++sc->ps_usecount != 1)
 120                 goto unlock;
 121
 122         del_timer_sync(&sc->sleep_timer);
 123         power_mode = sc->sc_ah->power_mode;
 124         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 125
 126         /*
 127          * While the hardware is asleep, the cycle counters contain no
 128          * useful data. Better clear them now so that they don't mess up
 129          * survey data results.
 130          */
 131         if (power_mode != ATH9K_PM_AWAKE) {
 132                 spin_lock(&common->cc_lock);
 133                 ath_hw_cycle_counters_update(common);
 134                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 135                 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
 136                 spin_unlock(&common->cc_lock);
 137         }
 138
 139  unlock:
 140         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 141 }
 142
 143 void ath9k_ps_restore(struct ath_softc *sc)
 144 {
 145         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 146         enum ath9k_power_mode mode;
 147         unsigned long flags;
 148
 149         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 150         if (--sc->ps_usecount != 0)
 151                 goto unlock;
 152
 153         if (sc->ps_idle) {
 154                 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 155                 goto unlock;
 156         }
 157
 158         if (sc->ps_enabled &&
 159                    !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 160                                      PS_WAIT_FOR_CAB |
 161                                      PS_WAIT_FOR_PSPOLL_DATA |
 162                                      PS_WAIT_FOR_TX_ACK |
 163                                      PS_WAIT_FOR_ANI))) {
 164                 mode = ATH9K_PM_NETWORK_SLEEP;
 165                 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
 166                         ath9k_btcoex_stop_gen_timer(sc);
 167         } else {
 168                 goto unlock;
 169         }
 170
 171         spin_lock(&common->cc_lock);
 172         ath_hw_cycle_counters_update(common);
 173         spin_unlock(&common->cc_lock);
 174
 175         ath9k_hw_setpower(sc->sc_ah, mode);
 176
 177  unlock:
 178         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 179 }
 180
 181 static void __ath_cancel_work(struct ath_softc *sc)
 182 {
 183         cancel_work_sync(&sc->paprd_work);
 184         cancel_delayed_work_sync(&sc->hw_check_work);
 185         cancel_delayed_work_sync(&sc->hw_pll_work);
 186
 187 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 188         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
 189                 cancel_work_sync(&sc->mci_work);
 190 #endif
 191 }
 192
 193 void ath_cancel_work(struct ath_softc *sc)
 194 {
 195         __ath_cancel_work(sc);
 196         cancel_work_sync(&sc->hw_reset_work);
 197 }
 198
 199 void ath_restart_work(struct ath_softc *sc)
 200 {
 201         ieee80211_queue_delayed_work(sc->hw, &sc->hw_check_work,
 202                                      ATH_HW_CHECK_POLL_INT);
 203
 204         if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
 205                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 206                                      msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 207
 208         ath_start_ani(sc);
 209 }
 210
 211 static bool ath_prepare_reset(struct ath_softc *sc)
 212 {
 213         struct ath_hw *ah = sc->sc_ah;
 214         bool ret = true;
 215
 216         ieee80211_stop_queues(sc->hw);
 217         ath_stop_ani(sc);
 218         ath9k_hw_disable_interrupts(ah);
 219
 220         if (AR_SREV_9300_20_OR_LATER(ah)) {
 221                 ret &= ath_stoprecv(sc);
 222                 ret &= ath_drain_all_txq(sc);
 223         } else {
 224                 ret &= ath_drain_all_txq(sc);
 225                 ret &= ath_stoprecv(sc);
 226         }
 227
 228         return ret;
 229 }
 230
 231 static bool ath_complete_reset(struct ath_softc *sc, bool start)
 232 {
 233         struct ath_hw *ah = sc->sc_ah;
 234         struct ath_common *common = ath9k_hw_common(ah);
 235         unsigned long flags;
 236
 237         ath9k_calculate_summary_state(sc, sc->cur_chan);
 238         ath_startrecv(sc);
 239         ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
 240                                sc->cur_chan->txpower,
 241                                &sc->cur_chan->cur_txpower);
 242         clear_bit(ATH_OP_HW_RESET, &common->op_flags);
 243
 244         if (!sc->cur_chan->offchannel && start) {
 245                 /* restore per chanctx TSF timer */
 246                 if (sc->cur_chan->tsf_val) {
 247                         u32 offset;
 248
 249                         offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
 250                                                          NULL);
 251                         ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
 252                 }
 253
 254
 255                 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
 256                         goto work;
 257
 258                 if (ah->opmode == NL80211_IFTYPE_STATION &&
 259                     test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
 260                         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 261                         sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 262                         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 263                 } else {
 264                         ath9k_set_beacon(sc);
 265                 }
 266         work:
 267                 ath_restart_work(sc);
 268                 ath_txq_schedule_all(sc);
 269         }
 270
 271         sc->gtt_cnt = 0;
 272
 273         ath9k_hw_set_interrupts(ah);
 274         ath9k_hw_enable_interrupts(ah);
 275         ieee80211_wake_queues(sc->hw);
 276         ath9k_p2p_ps_timer(sc);
 277
 278         return true;
 279 }
 280
 281 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 282 {
 283         struct ath_hw *ah = sc->sc_ah;
 284         struct ath_common *common = ath9k_hw_common(ah);
 285         struct ath9k_hw_cal_data *caldata = NULL;
 286         bool fastcc = true;
 287         int r;
 288
 289         __ath_cancel_work(sc);
 290
 291         disable_irq(sc->irq);
 292         tasklet_disable(&sc->intr_tq);
 293         tasklet_disable(&sc->bcon_tasklet);
 294         spin_lock_bh(&sc->sc_pcu_lock);
 295
 296         if (!sc->cur_chan->offchannel) {
 297                 fastcc = false;
 298                 caldata = &sc->cur_chan->caldata;
 299         }
 300
 301         if (!hchan) {
 302                 fastcc = false;
 303                 hchan = ah->curchan;
 304         }
 305
 306         if (!hchan) {
 307                 fastcc = false;
 308                 hchan = ath9k_cmn_get_channel(sc->hw, ah, &sc->cur_chan->chandef);
 309         }
 310
 311         if (!ath_prepare_reset(sc))
 312                 fastcc = false;
 313
 314         if (ath9k_is_chanctx_enabled())
 315                 fastcc = false;
 316
 317         spin_lock_bh(&sc->chan_lock);
 318         sc->cur_chandef = sc->cur_chan->chandef;
 319         spin_unlock_bh(&sc->chan_lock);
 320
 321         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 322                 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 323
 324         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 325         if (r) {
 326                 ath_err(common,
 327                         "Unable to reset channel, reset status %d\n", r);
 328
 329                 ath9k_hw_enable_interrupts(ah);
 330                 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
 331
 332                 goto out;
 333         }
 334
 335         if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
 336             sc->cur_chan->offchannel)
 337                 ath9k_mci_set_txpower(sc, true, false);
 338
 339         if (!ath_complete_reset(sc, true))
 340                 r = -EIO;
 341
 342 out:
 343         enable_irq(sc->irq);
 344         spin_unlock_bh(&sc->sc_pcu_lock);
 345         tasklet_enable(&sc->bcon_tasklet);
 346         tasklet_enable(&sc->intr_tq);
 347
 348         return r;
 349 }
 350
 351 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 352                             struct ieee80211_vif *vif)
 353 {
 354         struct ath_node *an;
 355         an = (struct ath_node *)sta->drv_priv;
 356
 357         an->sc = sc;
 358         an->sta = sta;
 359         an->vif = vif;
 360         memset(&an->key_idx, 0, sizeof(an->key_idx));
 361
 362         ath_tx_node_init(sc, an);
 363
 364         ath_dynack_node_init(sc->sc_ah, an);
 365 }
 366
 367 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 368 {
 369         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 370         ath_tx_node_cleanup(sc, an);
 371
 372         ath_dynack_node_deinit(sc->sc_ah, an);
 373 }
 374
 375 void ath9k_tasklet(unsigned long data)
 376 {
 377         struct ath_softc *sc = (struct ath_softc *)data;
 378         struct ath_hw *ah = sc->sc_ah;
 379         struct ath_common *common = ath9k_hw_common(ah);
 380         enum ath_reset_type type;
 381         unsigned long flags;
 382         u32 status;
 383         u32 rxmask;
 384
 385         spin_lock_irqsave(&sc->intr_lock, flags);
 386         status = sc->intrstatus;
 387         sc->intrstatus = 0;
 388         spin_unlock_irqrestore(&sc->intr_lock, flags);
 389
 390         ath9k_ps_wakeup(sc);
 391         spin_lock(&sc->sc_pcu_lock);
 392
 393         if (status & ATH9K_INT_FATAL) {
 394                 type = RESET_TYPE_FATAL_INT;
 395                 ath9k_queue_reset(sc, type);
 396                 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
 397                 goto out;
 398         }
 399
 400         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 401             (status & ATH9K_INT_BB_WATCHDOG)) {
 402                 spin_lock(&common->cc_lock);
 403                 ath_hw_cycle_counters_update(common);
 404                 ar9003_hw_bb_watchdog_dbg_info(ah);
 405                 spin_unlock(&common->cc_lock);
 406
 407                 if (ar9003_hw_bb_watchdog_check(ah)) {
 408                         type = RESET_TYPE_BB_WATCHDOG;
 409                         ath9k_queue_reset(sc, type);
 410
 411                         ath_dbg(common, RESET,
 412                                 "BB_WATCHDOG: Skipping interrupts\n");
 413                         goto out;
 414                 }
 415         }
 416
 417         if (status & ATH9K_INT_GTT) {
 418                 sc->gtt_cnt++;
 419
 420                 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
 421                         type = RESET_TYPE_TX_GTT;
 422                         ath9k_queue_reset(sc, type);
 423                         ath_dbg(common, RESET,
 424                                 "GTT: Skipping interrupts\n");
 425                         goto out;
 426                 }
 427         }
 428
 429         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 430         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 431                 /*
 432                  * TSF sync does not look correct; remain awake to sync with
 433                  * the next Beacon.
 434                  */
 435                 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 436                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 437         }
 438         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 439
 440         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 441                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 442                           ATH9K_INT_RXORN);
 443         else
 444                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 445
 446         if (status & rxmask) {
 447                 /* Check for high priority Rx first */
 448                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 449                     (status & ATH9K_INT_RXHP))
 450                         ath_rx_tasklet(sc, 0, true);
 451
 452                 ath_rx_tasklet(sc, 0, false);
 453         }
 454
 455         if (status & ATH9K_INT_TX) {
 456                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 457                         /*
 458                          * For EDMA chips, TX completion is enabled for the
 459                          * beacon queue, so if a beacon has been transmitted
 460                          * successfully after a GTT interrupt, the GTT counter
 461                          * gets reset to zero here.
 462                          */
 463                         sc->gtt_cnt = 0;
 464
 465                         ath_tx_edma_tasklet(sc);
 466                 } else {
 467                         ath_tx_tasklet(sc);
 468                 }
 469
 470                 wake_up(&sc->tx_wait);
 471         }
 472
 473         if (status & ATH9K_INT_GENTIMER)
 474                 ath_gen_timer_isr(sc->sc_ah);
 475
 476         ath9k_btcoex_handle_interrupt(sc, status);
 477
 478         /* re-enable hardware interrupt */
 479         ath9k_hw_resume_interrupts(ah);
 480 out:
 481         spin_unlock(&sc->sc_pcu_lock);
 482         ath9k_ps_restore(sc);
 483 }
 484
 485 irqreturn_t ath_isr(int irq, void *dev)
 486 {
 487 #define SCHED_INTR (                            \
 488                 ATH9K_INT_FATAL |               \
 489                 ATH9K_INT_BB_WATCHDOG |         \
 490                 ATH9K_INT_RXORN |               \
 491                 ATH9K_INT_RXEOL |               \
 492                 ATH9K_INT_RX |                  \
 493                 ATH9K_INT_RXLP |                \
 494                 ATH9K_INT_RXHP |                \
 495                 ATH9K_INT_TX |                  \
 496                 ATH9K_INT_BMISS |               \
 497                 ATH9K_INT_CST |                 \
 498                 ATH9K_INT_GTT |                 \
 499                 ATH9K_INT_TSFOOR |              \
 500                 ATH9K_INT_GENTIMER |            \
 501                 ATH9K_INT_MCI)
 502
 503         struct ath_softc *sc = dev;
 504         struct ath_hw *ah = sc->sc_ah;
 505         struct ath_common *common = ath9k_hw_common(ah);
 506         enum ath9k_int status;
 507         u32 sync_cause = 0;
 508         bool sched = false;
 509
 510         /*
 511          * The hardware is not ready/present, don't
 512          * touch anything. Note this can happen early
 513          * on if the IRQ is shared.
 514          */
 515         if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
 516                 return IRQ_NONE;
 517
 518         /* shared irq, not for us */
 519         if (!ath9k_hw_intrpend(ah))
 520                 return IRQ_NONE;
 521
 522         /*
 523          * Figure out the reason(s) for the interrupt.  Note
 524          * that the hal returns a pseudo-ISR that may include
 525          * bits we haven't explicitly enabled so we mask the
 526          * value to insure we only process bits we requested.
 527          */
 528         ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
 529         ath9k_debug_sync_cause(sc, sync_cause);
 530         status &= ah->imask;    /* discard unasked-for bits */
 531
 532         if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) {
 533                 ath9k_hw_kill_interrupts(sc->sc_ah);
 534                 return IRQ_HANDLED;
 535         }
 536
 537         /*
 538          * If there are no status bits set, then this interrupt was not
 539          * for me (should have been caught above).
 540          */
 541         if (!status)
 542                 return IRQ_NONE;
 543
 544         /* Cache the status */
 545         spin_lock(&sc->intr_lock);
 546         sc->intrstatus |= status;
 547         spin_unlock(&sc->intr_lock);
 548
 549         if (status & SCHED_INTR)
 550                 sched = true;
 551
 552         /*
 553          * If a FATAL interrupt is received, we have to reset the chip
 554          * immediately.
 555          */
 556         if (status & ATH9K_INT_FATAL)
 557                 goto chip_reset;
 558
 559         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 560             (status & ATH9K_INT_BB_WATCHDOG))
 561                 goto chip_reset;
 562
 563         if (status & ATH9K_INT_SWBA)
 564                 tasklet_schedule(&sc->bcon_tasklet);
 565
 566         if (status & ATH9K_INT_TXURN)
 567                 ath9k_hw_updatetxtriglevel(ah, true);
 568
 569         if (status & ATH9K_INT_RXEOL) {
 570                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 571                 ath9k_hw_set_interrupts(ah);
 572         }
 573
 574         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 575                 if (status & ATH9K_INT_TIM_TIMER) {
 576                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 577                                 goto chip_reset;
 578                         /* Clear RxAbort bit so that we can
 579                          * receive frames */
 580                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 581                         spin_lock(&sc->sc_pm_lock);
 582                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 583                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 584                         spin_unlock(&sc->sc_pm_lock);
 585                 }
 586
 587 chip_reset:
 588
 589         ath_debug_stat_interrupt(sc, status);
 590
 591         if (sched) {
 592                 /* turn off every interrupt */
 593                 ath9k_hw_kill_interrupts(ah);
 594                 tasklet_schedule(&sc->intr_tq);
 595         }
 596
 597         return IRQ_HANDLED;
 598
 599 #undef SCHED_INTR
 600 }
 601
 602 /*
 603  * This function is called when a HW reset cannot be deferred
 604  * and has to be immediate.
 605  */
 606 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
 607 {
 608         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 609         int r;
 610
 611         ath9k_hw_kill_interrupts(sc->sc_ah);
 612         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 613
 614         ath9k_ps_wakeup(sc);
 615         r = ath_reset_internal(sc, hchan);
 616         ath9k_ps_restore(sc);
 617
 618         return r;
 619 }
 620
 621 /*
 622  * When a HW reset can be deferred, it is added to the
 623  * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
 624  * queueing.
 625  */
 626 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
 627 {
 628         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 629 #ifdef CONFIG_ATH9K_DEBUGFS
 630         RESET_STAT_INC(sc, type);
 631 #endif
 632         ath9k_hw_kill_interrupts(sc->sc_ah);
 633         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 634         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 635 }
 636
 637 void ath_reset_work(struct work_struct *work)
 638 {
 639         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 640
 641         ath9k_ps_wakeup(sc);
 642         ath_reset_internal(sc, NULL);
 643         ath9k_ps_restore(sc);
 644 }
 645
 646 /**********************/
 647 /* mac80211 callbacks */
 648 /**********************/
 649
 650 static int ath9k_start(struct ieee80211_hw *hw)
 651 {
 652         struct ath_softc *sc = hw->priv;
 653         struct ath_hw *ah = sc->sc_ah;
 654         struct ath_common *common = ath9k_hw_common(ah);
 655         struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
 656         struct ath_chanctx *ctx = sc->cur_chan;
 657         struct ath9k_channel *init_channel;
 658         int r;
 659
 660         ath_dbg(common, CONFIG,
 661                 "Starting driver with initial channel: %d MHz\n",
 662                 curchan->center_freq);
 663
 664         ath9k_ps_wakeup(sc);
 665         mutex_lock(&sc->mutex);
 666
 667         init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
 668         sc->cur_chandef = hw->conf.chandef;
 669
 670         /* Reset SERDES registers */
 671         ath9k_hw_configpcipowersave(ah, false);
 672
 673         /*
 674          * The basic interface to setting the hardware in a good
 675          * state is ``reset''.  On return the hardware is known to
 676          * be powered up and with interrupts disabled.  This must
 677          * be followed by initialization of the appropriate bits
 678          * and then setup of the interrupt mask.
 679          */
 680         spin_lock_bh(&sc->sc_pcu_lock);
 681
 682         atomic_set(&ah->intr_ref_cnt, -1);
 683
 684         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
 685         if (r) {
 686                 ath_err(common,
 687                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
 688                         r, curchan->center_freq);
 689                 ah->reset_power_on = false;
 690         }
 691
 692         /* Setup our intr mask. */
 693         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 694                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 695                     ATH9K_INT_GLOBAL;
 696
 697         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 698                 ah->imask |= ATH9K_INT_RXHP |
 699                              ATH9K_INT_RXLP;
 700         else
 701                 ah->imask |= ATH9K_INT_RX;
 702
 703         if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
 704                 ah->imask |= ATH9K_INT_BB_WATCHDOG;
 705
 706         /*
 707          * Enable GTT interrupts only for AR9003/AR9004 chips
 708          * for now.
 709          */
 710         if (AR_SREV_9300_20_OR_LATER(ah))
 711                 ah->imask |= ATH9K_INT_GTT;
 712
 713         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 714                 ah->imask |= ATH9K_INT_CST;
 715
 716         ath_mci_enable(sc);
 717
 718         clear_bit(ATH_OP_INVALID, &common->op_flags);
 719         sc->sc_ah->is_monitoring = false;
 720
 721         if (!ath_complete_reset(sc, false))
 722                 ah->reset_power_on = false;
 723
 724         if (ah->led_pin >= 0) {
 725                 ath9k_hw_set_gpio(ah, ah->led_pin,
 726                                   (ah->config.led_active_high) ? 1 : 0);
 727                 ath9k_hw_gpio_request_out(ah, ah->led_pin, NULL,
 728                                           AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 729         }
 730
 731         /*
 732          * Reset key cache to sane defaults (all entries cleared) instead of
 733          * semi-random values after suspend/resume.
 734          */
 735         ath9k_cmn_init_crypto(sc->sc_ah);
 736
 737         ath9k_hw_reset_tsf(ah);
 738
 739         spin_unlock_bh(&sc->sc_pcu_lock);
 740
 741         ath9k_rng_start(sc);
 742
 743         mutex_unlock(&sc->mutex);
 744
 745         ath9k_ps_restore(sc);
 746
 747         return 0;
 748 }
 749
 750 static void ath9k_tx(struct ieee80211_hw *hw,
 751                      struct ieee80211_tx_control *control,
 752                      struct sk_buff *skb)
 753 {
 754         struct ath_softc *sc = hw->priv;
 755         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 756         struct ath_tx_control txctl;
 757         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 758         unsigned long flags;
 759
 760         if (sc->ps_enabled) {
 761                 /*
 762                  * mac80211 does not set PM field for normal data frames, so we
 763                  * need to update that based on the current PS mode.
 764                  */
 765                 if (ieee80211_is_data(hdr->frame_control) &&
 766                     !ieee80211_is_nullfunc(hdr->frame_control) &&
 767                     !ieee80211_has_pm(hdr->frame_control)) {
 768                         ath_dbg(common, PS,
 769                                 "Add PM=1 for a TX frame while in PS mode\n");
 770                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
 771                 }
 772         }
 773
 774         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
 775                 /*
 776                  * We are using PS-Poll and mac80211 can request TX while in
 777                  * power save mode. Need to wake up hardware for the TX to be
 778                  * completed and if needed, also for RX of buffered frames.
 779                  */
 780                 ath9k_ps_wakeup(sc);
 781                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
 782                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 783                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 784                 if (ieee80211_is_pspoll(hdr->frame_control)) {
 785                         ath_dbg(common, PS,
 786                                 "Sending PS-Poll to pick a buffered frame\n");
 787                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
 788                 } else {
 789                         ath_dbg(common, PS, "Wake up to complete TX\n");
 790                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
 791                 }
 792                 /*
 793                  * The actual restore operation will happen only after
 794                  * the ps_flags bit is cleared. We are just dropping
 795                  * the ps_usecount here.
 796                  */
 797                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 798                 ath9k_ps_restore(sc);
 799         }
 800
 801         /*
 802          * Cannot tx while the hardware is in full sleep, it first needs a full
 803          * chip reset to recover from that
 804          */
 805         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
 806                 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
 807                 goto exit;
 808         }
 809
 810         memset(&txctl, 0, sizeof(struct ath_tx_control));
 811         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
 812         txctl.sta = control->sta;
 813
 814         ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
 815
 816         if (ath_tx_start(hw, skb, &txctl) != 0) {
 817                 ath_dbg(common, XMIT, "TX failed\n");
 818                 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
 819                 goto exit;
 820         }
 821
 822         return;
 823 exit:
 824         ieee80211_free_txskb(hw, skb);
 825 }
 826
 827 static bool ath9k_txq_list_has_key(struct list_head *txq_list, u32 keyix)
 828 {
 829         struct ath_buf *bf;
 830         struct ieee80211_tx_info *txinfo;
 831         struct ath_frame_info *fi;
 832
 833         list_for_each_entry(bf, txq_list, list) {
 834                 if (bf->bf_state.stale || !bf->bf_mpdu)
 835                         continue;
 836
 837                 txinfo = IEEE80211_SKB_CB(bf->bf_mpdu);
 838                 fi = (struct ath_frame_info *)&txinfo->rate_driver_data[0];
 839                 if (fi->keyix == keyix)
 840                         return true;
 841         }
 842
 843         return false;
 844 }
 845
 846 static bool ath9k_txq_has_key(struct ath_softc *sc, u32 keyix)
 847 {
 848         struct ath_hw *ah = sc->sc_ah;
 849         int i;
 850         struct ath_txq *txq;
 851         bool key_in_use = false;
 852
 853         for (i = 0; !key_in_use && i < ATH9K_NUM_TX_QUEUES; i++) {
 854                 if (!ATH_TXQ_SETUP(sc, i))
 855                         continue;
 856                 txq = &sc->tx.txq[i];
 857                 if (!txq->axq_depth)
 858                         continue;
 859                 if (!ath9k_hw_numtxpending(ah, txq->axq_qnum))
 860                         continue;
 861
 862                 ath_txq_lock(sc, txq);
 863                 key_in_use = ath9k_txq_list_has_key(&txq->axq_q, keyix);
 864                 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 865                         int idx = txq->txq_tailidx;
 866
 867                         while (!key_in_use &&
 868                                !list_empty(&txq->txq_fifo[idx])) {
 869                                 key_in_use = ath9k_txq_list_has_key(
 870                                         &txq->txq_fifo[idx], keyix);
 871                                 INCR(idx, ATH_TXFIFO_DEPTH);
 872                         }
 873                 }
 874                 ath_txq_unlock(sc, txq);
 875         }
 876
 877         return key_in_use;
 878 }
 879
 880 static void ath9k_pending_key_del(struct ath_softc *sc, u8 keyix)
 881 {
 882         struct ath_hw *ah = sc->sc_ah;
 883         struct ath_common *common = ath9k_hw_common(ah);
 884
 885         if (!test_bit(keyix, ah->pending_del_keymap) ||
 886             ath9k_txq_has_key(sc, keyix))
 887                 return;
 888
 889         /* No more TXQ frames point to this key cache entry, so delete it. */
 890         clear_bit(keyix, ah->pending_del_keymap);
 891         ath_key_delete(common, keyix);
 892 }
 893
 894 static void ath9k_stop(struct ieee80211_hw *hw)
 895 {
 896         struct ath_softc *sc = hw->priv;
 897         struct ath_hw *ah = sc->sc_ah;
 898         struct ath_common *common = ath9k_hw_common(ah);
 899         bool prev_idle;
 900         int i;
 901
 902         ath9k_deinit_channel_context(sc);
 903
 904         mutex_lock(&sc->mutex);
 905
 906         ath9k_rng_stop(sc);
 907
 908         ath_cancel_work(sc);
 909
 910         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
 911                 ath_dbg(common, ANY, "Device not present\n");
 912                 mutex_unlock(&sc->mutex);
 913                 return;
 914         }
 915
 916         /* Ensure HW is awake when we try to shut it down. */
 917         ath9k_ps_wakeup(sc);
 918
 919         spin_lock_bh(&sc->sc_pcu_lock);
 920
 921         /* prevent tasklets to enable interrupts once we disable them */
 922         ah->imask &= ~ATH9K_INT_GLOBAL;
 923
 924         /* make sure h/w will not generate any interrupt
 925          * before setting the invalid flag. */
 926         ath9k_hw_disable_interrupts(ah);
 927
 928         spin_unlock_bh(&sc->sc_pcu_lock);
 929
 930         /* we can now sync irq and kill any running tasklets, since we already
 931          * disabled interrupts and not holding a spin lock */
 932         synchronize_irq(sc->irq);
 933         tasklet_kill(&sc->intr_tq);
 934         tasklet_kill(&sc->bcon_tasklet);
 935
 936         prev_idle = sc->ps_idle;
 937         sc->ps_idle = true;
 938
 939         spin_lock_bh(&sc->sc_pcu_lock);
 940
 941         if (ah->led_pin >= 0) {
 942                 ath9k_hw_set_gpio(ah, ah->led_pin,
 943                                   (ah->config.led_active_high) ? 0 : 1);
 944                 ath9k_hw_gpio_request_in(ah, ah->led_pin, NULL);
 945         }
 946
 947         ath_prepare_reset(sc);
 948
 949         if (sc->rx.frag) {
 950                 dev_kfree_skb_any(sc->rx.frag);
 951                 sc->rx.frag = NULL;
 952         }
 953
 954         if (!ah->curchan)
 955                 ah->curchan = ath9k_cmn_get_channel(hw, ah,
 956                                                     &sc->cur_chan->chandef);
 957
 958         ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 959
 960         set_bit(ATH_OP_INVALID, &common->op_flags);
 961
 962         ath9k_hw_phy_disable(ah);
 963
 964         ath9k_hw_configpcipowersave(ah, true);
 965
 966         spin_unlock_bh(&sc->sc_pcu_lock);
 967
 968         for (i = 0; i < ATH_KEYMAX; i++)
 969                 ath9k_pending_key_del(sc, i);
 970
 971         /* Clear key cache entries explicitly to get rid of any potentially
 972          * remaining keys.
 973          */
 974         ath9k_cmn_init_crypto(sc->sc_ah);
 975
 976         ath9k_ps_restore(sc);
 977
 978         sc->ps_idle = prev_idle;
 979
 980         mutex_unlock(&sc->mutex);
 981
 982         ath_dbg(common, CONFIG, "Driver halt\n");
 983 }
 984
 985 static bool ath9k_uses_beacons(int type)
 986 {
 987         switch (type) {
 988         case NL80211_IFTYPE_AP:
 989         case NL80211_IFTYPE_ADHOC:
 990         case NL80211_IFTYPE_MESH_POINT:
 991                 return true;
 992         default:
 993                 return false;
 994         }
 995 }
 996
 997 static void ath9k_vif_iter_set_beacon(struct ath9k_vif_iter_data *iter_data,
 998                                       struct ieee80211_vif *vif)
 999 {
1000         /* Use the first (configured) interface, but prefering AP interfaces. */
1001         if (!iter_data->primary_beacon_vif) {
1002                 iter_data->primary_beacon_vif = vif;
1003         } else {
1004                 if (iter_data->primary_beacon_vif->type != NL80211_IFTYPE_AP &&
1005                     vif->type == NL80211_IFTYPE_AP)
1006                         iter_data->primary_beacon_vif = vif;
1007         }
1008
1009         iter_data->beacons = true;
1010         iter_data->nbcnvifs += 1;
1011 }
1012
1013 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
1014                            u8 *mac, struct ieee80211_vif *vif)
1015 {
1016         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1017         int i;
1018
1019         if (iter_data->has_hw_macaddr) {
1020                 for (i = 0; i < ETH_ALEN; i++)
1021                         iter_data->mask[i] &=
1022                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1023         } else {
1024                 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
1025                 iter_data->has_hw_macaddr = true;
1026         }
1027
1028         if (!vif->bss_conf.use_short_slot)
1029                 iter_data->slottime = 20;
1030
1031         switch (vif->type) {
1032         case NL80211_IFTYPE_AP:
1033                 iter_data->naps++;
1034                 if (vif->bss_conf.enable_beacon)
1035                         ath9k_vif_iter_set_beacon(iter_data, vif);
1036                 break;
1037         case NL80211_IFTYPE_STATION:
1038                 iter_data->nstations++;
1039                 if (avp->assoc && !iter_data->primary_sta)
1040                         iter_data->primary_sta = vif;
1041                 break;
1042         case NL80211_IFTYPE_OCB:
1043                 iter_data->nocbs++;
1044                 break;
1045         case NL80211_IFTYPE_ADHOC:
1046                 iter_data->nadhocs++;
1047                 if (vif->bss_conf.enable_beacon)
1048                         ath9k_vif_iter_set_beacon(iter_data, vif);
1049                 break;
1050         case NL80211_IFTYPE_MESH_POINT:
1051                 iter_data->nmeshes++;
1052                 if (vif->bss_conf.enable_beacon)
1053                         ath9k_vif_iter_set_beacon(iter_data, vif);
1054                 break;
1055         case NL80211_IFTYPE_WDS:
1056                 iter_data->nwds++;
1057                 break;
1058         default:
1059                 break;
1060         }
1061 }
1062
1063 static void ath9k_update_bssid_mask(struct ath_softc *sc,
1064                                     struct ath_chanctx *ctx,
1065                                     struct ath9k_vif_iter_data *iter_data)
1066 {
1067         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1068         struct ath_vif *avp;
1069         int i;
1070
1071         if (!ath9k_is_chanctx_enabled())
1072                 return;
1073
1074         list_for_each_entry(avp, &ctx->vifs, list) {
1075                 if (ctx->nvifs_assigned != 1)
1076                         continue;
1077
1078                 if (!iter_data->has_hw_macaddr)
1079                         continue;
1080
1081                 ether_addr_copy(common->curbssid, avp->bssid);
1082
1083                 /* perm_addr will be used as the p2p device address. */
1084                 for (i = 0; i < ETH_ALEN; i++)
1085                         iter_data->mask[i] &=
1086                                 ~(iter_data->hw_macaddr[i] ^
1087                                   sc->hw->wiphy->perm_addr[i]);
1088         }
1089 }
1090
1091 /* Called with sc->mutex held. */
1092 void ath9k_calculate_iter_data(struct ath_softc *sc,
1093                                struct ath_chanctx *ctx,
1094                                struct ath9k_vif_iter_data *iter_data)
1095 {
1096         struct ath_vif *avp;
1097
1098         /*
1099          * The hardware will use primary station addr together with the
1100          * BSSID mask when matching addresses.
1101          */
1102         memset(iter_data, 0, sizeof(*iter_data));
1103         eth_broadcast_addr(iter_data->mask);
1104         iter_data->slottime = 9;
1105
1106         list_for_each_entry(avp, &ctx->vifs, list)
1107                 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1108
1109         ath9k_update_bssid_mask(sc, ctx, iter_data);
1110 }
1111
1112 static void ath9k_set_assoc_state(struct ath_softc *sc,
1113                                   struct ieee80211_vif *vif, bool changed)
1114 {
1115         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1116         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1117         unsigned long flags;
1118
1119         set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1120
1121         ether_addr_copy(common->curbssid, avp->bssid);
1122         common->curaid = avp->aid;
1123         ath9k_hw_write_associd(sc->sc_ah);
1124
1125         if (changed) {
1126                 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1127                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1128
1129                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1130                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1131                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1132         }
1133
1134         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1135                 ath9k_mci_update_wlan_channels(sc, false);
1136
1137         ath_dbg(common, CONFIG,
1138                 "Primary Station interface: %pM, BSSID: %pM\n",
1139                 vif->addr, common->curbssid);
1140 }
1141
1142 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1143 static void ath9k_set_offchannel_state(struct ath_softc *sc)
1144 {
1145         struct ath_hw *ah = sc->sc_ah;
1146         struct ath_common *common = ath9k_hw_common(ah);
1147         struct ieee80211_vif *vif = NULL;
1148
1149         ath9k_ps_wakeup(sc);
1150
1151         if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1152                 vif = sc->offchannel.scan_vif;
1153         else
1154                 vif = sc->offchannel.roc_vif;
1155
1156         if (WARN_ON(!vif))
1157                 goto exit;
1158
1159         eth_zero_addr(common->curbssid);
1160         eth_broadcast_addr(common->bssidmask);
1161         memcpy(common->macaddr, vif->addr, ETH_ALEN);
1162         common->curaid = 0;
1163         ah->opmode = vif->type;
1164         ah->imask &= ~ATH9K_INT_SWBA;
1165         ah->imask &= ~ATH9K_INT_TSFOOR;
1166         ah->slottime = 9;
1167
1168         ath_hw_setbssidmask(common);
1169         ath9k_hw_setopmode(ah);
1170         ath9k_hw_write_associd(sc->sc_ah);
1171         ath9k_hw_set_interrupts(ah);
1172         ath9k_hw_init_global_settings(ah);
1173
1174 exit:
1175         ath9k_ps_restore(sc);
1176 }
1177 #endif
1178
1179 /* Called with sc->mutex held. */
1180 void ath9k_calculate_summary_state(struct ath_softc *sc,
1181                                    struct ath_chanctx *ctx)
1182 {
1183         struct ath_hw *ah = sc->sc_ah;
1184         struct ath_common *common = ath9k_hw_common(ah);
1185         struct ath9k_vif_iter_data iter_data;
1186
1187         ath_chanctx_check_active(sc, ctx);
1188
1189         if (ctx != sc->cur_chan)
1190                 return;
1191
1192 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1193         if (ctx == &sc->offchannel.chan)
1194                 return ath9k_set_offchannel_state(sc);
1195 #endif
1196
1197         ath9k_ps_wakeup(sc);
1198         ath9k_calculate_iter_data(sc, ctx, &iter_data);
1199
1200         if (iter_data.has_hw_macaddr)
1201                 memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1202
1203         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1204         ath_hw_setbssidmask(common);
1205
1206         if (iter_data.naps > 0) {
1207                 ath9k_hw_set_tsfadjust(ah, true);
1208                 ah->opmode = NL80211_IFTYPE_AP;
1209         } else {
1210                 ath9k_hw_set_tsfadjust(ah, false);
1211                 if (iter_data.beacons)
1212                         ath9k_beacon_ensure_primary_slot(sc);
1213
1214                 if (iter_data.nmeshes)
1215                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1216                 else if (iter_data.nocbs)
1217                         ah->opmode = NL80211_IFTYPE_OCB;
1218                 else if (iter_data.nwds)
1219                         ah->opmode = NL80211_IFTYPE_AP;
1220                 else if (iter_data.nadhocs)
1221                         ah->opmode = NL80211_IFTYPE_ADHOC;
1222                 else
1223                         ah->opmode = NL80211_IFTYPE_STATION;
1224         }
1225
1226         ath9k_hw_setopmode(ah);
1227
1228         ctx->switch_after_beacon = false;
1229         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1230                 ah->imask |= ATH9K_INT_TSFOOR;
1231         else {
1232                 ah->imask &= ~ATH9K_INT_TSFOOR;
1233                 if (iter_data.naps == 1 && iter_data.beacons)
1234                         ctx->switch_after_beacon = true;
1235         }
1236
1237         if (ah->opmode == NL80211_IFTYPE_STATION) {
1238                 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1239
1240                 if (iter_data.primary_sta) {
1241                         iter_data.primary_beacon_vif = iter_data.primary_sta;
1242                         iter_data.beacons = true;
1243                         ath9k_set_assoc_state(sc, iter_data.primary_sta,
1244                                               changed);
1245                         ctx->primary_sta = iter_data.primary_sta;
1246                 } else {
1247                         ctx->primary_sta = NULL;
1248                         eth_zero_addr(common->curbssid);
1249                         common->curaid = 0;
1250                         ath9k_hw_write_associd(sc->sc_ah);
1251                         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1252                                 ath9k_mci_update_wlan_channels(sc, true);
1253                 }
1254         }
1255         sc->nbcnvifs = iter_data.nbcnvifs;
1256         ath9k_beacon_config(sc, iter_data.primary_beacon_vif,
1257                             iter_data.beacons);
1258         ath9k_hw_set_interrupts(ah);
1259
1260         if (ah->slottime != iter_data.slottime) {
1261                 ah->slottime = iter_data.slottime;
1262                 ath9k_hw_init_global_settings(ah);
1263         }
1264
1265         if (iter_data.primary_sta)
1266                 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1267         else
1268                 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1269
1270         ath_dbg(common, CONFIG,
1271                 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1272                 common->macaddr, common->curbssid, common->bssidmask);
1273
1274         ath9k_ps_restore(sc);
1275 }
1276
1277 static void ath9k_tpc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1278 {
1279         int *power = (int *)data;
1280
1281         if (*power < vif->bss_conf.txpower)
1282                 *power = vif->bss_conf.txpower;
1283 }
1284
1285 /* Called with sc->mutex held. */
1286 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif)
1287 {
1288         int power;
1289         struct ath_hw *ah = sc->sc_ah;
1290         struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
1291
1292         ath9k_ps_wakeup(sc);
1293         if (ah->tpc_enabled) {
1294                 power = (vif) ? vif->bss_conf.txpower : -1;
1295                 ieee80211_iterate_active_interfaces_atomic(
1296                                 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1297                                 ath9k_tpc_vif_iter, &power);
1298                 if (power == -1)
1299                         power = sc->hw->conf.power_level;
1300         } else {
1301                 power = sc->hw->conf.power_level;
1302         }
1303         sc->cur_chan->txpower = 2 * power;
1304         ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
1305         sc->cur_chan->cur_txpower = reg->max_power_level;
1306         ath9k_ps_restore(sc);
1307 }
1308
1309 static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1310                                    struct ieee80211_vif *vif)
1311 {
1312         int i;
1313
1314         if (!ath9k_is_chanctx_enabled())
1315                 return;
1316
1317         for (i = 0; i < IEEE80211_NUM_ACS; i++)
1318                 vif->hw_queue[i] = i;
1319
1320         if (vif->type == NL80211_IFTYPE_AP ||
1321             vif->type == NL80211_IFTYPE_MESH_POINT)
1322                 vif->cab_queue = hw->queues - 2;
1323         else
1324                 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1325 }
1326
1327 static int ath9k_add_interface(struct ieee80211_hw *hw,
1328                                struct ieee80211_vif *vif)
1329 {
1330         struct ath_softc *sc = hw->priv;
1331         struct ath_hw *ah = sc->sc_ah;
1332         struct ath_common *common = ath9k_hw_common(ah);
1333         struct ath_vif *avp = (void *)vif->drv_priv;
1334         struct ath_node *an = &avp->mcast_node;
1335
1336         mutex_lock(&sc->mutex);
1337         if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1338                 if (sc->cur_chan->nvifs >= 1) {
1339                         mutex_unlock(&sc->mutex);
1340                         return -EOPNOTSUPP;
1341                 }
1342                 sc->tx99_vif = vif;
1343         }
1344
1345         ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1346         sc->cur_chan->nvifs++;
1347
1348         if (vif->type == NL80211_IFTYPE_STATION && ath9k_is_chanctx_enabled())
1349                 vif->driver_flags |= IEEE80211_VIF_GET_NOA_UPDATE;
1350
1351         if (ath9k_uses_beacons(vif->type))
1352                 ath9k_beacon_assign_slot(sc, vif);
1353
1354         avp->vif = vif;
1355         if (!ath9k_is_chanctx_enabled()) {
1356                 avp->chanctx = sc->cur_chan;
1357                 list_add_tail(&avp->list, &avp->chanctx->vifs);
1358         }
1359
1360         ath9k_calculate_summary_state(sc, avp->chanctx);
1361
1362         ath9k_assign_hw_queues(hw, vif);
1363
1364         ath9k_set_txpower(sc, vif);
1365
1366         an->sc = sc;
1367         an->sta = NULL;
1368         an->vif = vif;
1369         an->no_ps_filter = true;
1370         ath_tx_node_init(sc, an);
1371
1372         mutex_unlock(&sc->mutex);
1373         return 0;
1374 }
1375
1376 static int ath9k_change_interface(struct ieee80211_hw *hw,
1377                                   struct ieee80211_vif *vif,
1378                                   enum nl80211_iftype new_type,
1379                                   bool p2p)
1380 {
1381         struct ath_softc *sc = hw->priv;
1382         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1383         struct ath_vif *avp = (void *)vif->drv_priv;
1384
1385         mutex_lock(&sc->mutex);
1386
1387         if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1388                 mutex_unlock(&sc->mutex);
1389                 return -EOPNOTSUPP;
1390         }
1391
1392         ath_dbg(common, CONFIG, "Change Interface\n");
1393
1394         if (ath9k_uses_beacons(vif->type))
1395                 ath9k_beacon_remove_slot(sc, vif);
1396
1397         vif->type = new_type;
1398         vif->p2p = p2p;
1399
1400         if (ath9k_uses_beacons(vif->type))
1401                 ath9k_beacon_assign_slot(sc, vif);
1402
1403         ath9k_assign_hw_queues(hw, vif);
1404         ath9k_calculate_summary_state(sc, avp->chanctx);
1405
1406         ath9k_set_txpower(sc, vif);
1407
1408         mutex_unlock(&sc->mutex);
1409         return 0;
1410 }
1411
1412 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1413                                    struct ieee80211_vif *vif)
1414 {
1415         struct ath_softc *sc = hw->priv;
1416         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1417         struct ath_vif *avp = (void *)vif->drv_priv;
1418
1419         ath_dbg(common, CONFIG, "Detach Interface\n");
1420
1421         mutex_lock(&sc->mutex);
1422
1423         ath9k_p2p_remove_vif(sc, vif);
1424
1425         sc->cur_chan->nvifs--;
1426         sc->tx99_vif = NULL;
1427         if (!ath9k_is_chanctx_enabled())
1428                 list_del(&avp->list);
1429
1430         if (ath9k_uses_beacons(vif->type))
1431                 ath9k_beacon_remove_slot(sc, vif);
1432
1433         ath_tx_node_cleanup(sc, &avp->mcast_node);
1434
1435         ath9k_calculate_summary_state(sc, avp->chanctx);
1436
1437         ath9k_set_txpower(sc, NULL);
1438
1439         mutex_unlock(&sc->mutex);
1440 }
1441
1442 static void ath9k_enable_ps(struct ath_softc *sc)
1443 {
1444         struct ath_hw *ah = sc->sc_ah;
1445         struct ath_common *common = ath9k_hw_common(ah);
1446
1447         if (IS_ENABLED(CONFIG_ATH9K_TX99))
1448                 return;
1449
1450         sc->ps_enabled = true;
1451         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1452                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1453                         ah->imask |= ATH9K_INT_TIM_TIMER;
1454                         ath9k_hw_set_interrupts(ah);
1455                 }
1456                 ath9k_hw_setrxabort(ah, 1);
1457         }
1458         ath_dbg(common, PS, "PowerSave enabled\n");
1459 }
1460
1461 static void ath9k_disable_ps(struct ath_softc *sc)
1462 {
1463         struct ath_hw *ah = sc->sc_ah;
1464         struct ath_common *common = ath9k_hw_common(ah);
1465
1466         if (IS_ENABLED(CONFIG_ATH9K_TX99))
1467                 return;
1468
1469         sc->ps_enabled = false;
1470         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1471         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1472                 ath9k_hw_setrxabort(ah, 0);
1473                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1474                                   PS_WAIT_FOR_CAB |
1475                                   PS_WAIT_FOR_PSPOLL_DATA |
1476                                   PS_WAIT_FOR_TX_ACK);
1477                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1478                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1479                         ath9k_hw_set_interrupts(ah);
1480                 }
1481         }
1482         ath_dbg(common, PS, "PowerSave disabled\n");
1483 }
1484
1485 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1486 {
1487         struct ath_softc *sc = hw->priv;
1488         struct ath_hw *ah = sc->sc_ah;
1489         struct ath_common *common = ath9k_hw_common(ah);
1490         struct ieee80211_conf *conf = &hw->conf;
1491         struct ath_chanctx *ctx = sc->cur_chan;
1492
1493         ath9k_ps_wakeup(sc);
1494         mutex_lock(&sc->mutex);
1495
1496         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1497                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1498                 if (sc->ps_idle) {
1499                         ath_cancel_work(sc);
1500                         ath9k_stop_btcoex(sc);
1501                 } else {
1502                         ath9k_start_btcoex(sc);
1503                         /*
1504                          * The chip needs a reset to properly wake up from
1505                          * full sleep
1506                          */
1507                         ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1508                 }
1509         }
1510
1511         /*
1512          * We just prepare to enable PS. We have to wait until our AP has
1513          * ACK'd our null data frame to disable RX otherwise we'll ignore
1514          * those ACKs and end up retransmitting the same null data frames.
1515          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1516          */
1517         if (changed & IEEE80211_CONF_CHANGE_PS) {
1518                 unsigned long flags;
1519                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1520                 if (conf->flags & IEEE80211_CONF_PS)
1521                         ath9k_enable_ps(sc);
1522                 else
1523                         ath9k_disable_ps(sc);
1524                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1525         }
1526
1527         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1528                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1529                         ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1530                         sc->sc_ah->is_monitoring = true;
1531                 } else {
1532                         ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1533                         sc->sc_ah->is_monitoring = false;
1534                 }
1535         }
1536
1537         if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1538                 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1539                 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1540         }
1541
1542         if (changed & IEEE80211_CONF_CHANGE_POWER)
1543                 ath9k_set_txpower(sc, NULL);
1544
1545         mutex_unlock(&sc->mutex);
1546         ath9k_ps_restore(sc);
1547
1548         return 0;
1549 }
1550
1551 #define SUPPORTED_FILTERS                       \
1552         (FIF_ALLMULTI |                         \
1553         FIF_CONTROL |                           \
1554         FIF_PSPOLL |                            \
1555         FIF_OTHER_BSS |                         \
1556         FIF_BCN_PRBRESP_PROMISC |               \
1557         FIF_PROBE_REQ |                         \
1558         FIF_FCSFAIL)
1559
1560 /* FIXME: sc->sc_full_reset ? */
1561 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1562                                    unsigned int changed_flags,
1563                                    unsigned int *total_flags,
1564                                    u64 multicast)
1565 {
1566         struct ath_softc *sc = hw->priv;
1567         struct ath_chanctx *ctx;
1568         u32 rfilt;
1569
1570         changed_flags &= SUPPORTED_FILTERS;
1571         *total_flags &= SUPPORTED_FILTERS;
1572
1573         spin_lock_bh(&sc->chan_lock);
1574         ath_for_each_chanctx(sc, ctx)
1575                 ctx->rxfilter = *total_flags;
1576 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1577         sc->offchannel.chan.rxfilter = *total_flags;
1578 #endif
1579         spin_unlock_bh(&sc->chan_lock);
1580
1581         ath9k_ps_wakeup(sc);
1582         rfilt = ath_calcrxfilter(sc);
1583         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1584         ath9k_ps_restore(sc);
1585
1586         ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1587                 rfilt);
1588 }
1589
1590 static int ath9k_sta_add(struct ieee80211_hw *hw,
1591                          struct ieee80211_vif *vif,
1592                          struct ieee80211_sta *sta)
1593 {
1594         struct ath_softc *sc = hw->priv;
1595         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1596         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1597         struct ieee80211_key_conf ps_key = { };
1598         int key;
1599
1600         ath_node_attach(sc, sta, vif);
1601
1602         if (vif->type != NL80211_IFTYPE_AP &&
1603             vif->type != NL80211_IFTYPE_AP_VLAN)
1604                 return 0;
1605
1606         key = ath_key_config(common, vif, sta, &ps_key);
1607         if (key > 0) {
1608                 an->ps_key = key;
1609                 an->key_idx[0] = key;
1610         }
1611
1612         return 0;
1613 }
1614
1615 static void ath9k_del_ps_key(struct ath_softc *sc,
1616                              struct ieee80211_vif *vif,
1617                              struct ieee80211_sta *sta)
1618 {
1619         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1620         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1621
1622         if (!an->ps_key)
1623             return;
1624
1625         ath_key_delete(common, an->ps_key);
1626         an->ps_key = 0;
1627         an->key_idx[0] = 0;
1628 }
1629
1630 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1631                             struct ieee80211_vif *vif,
1632                             struct ieee80211_sta *sta)
1633 {
1634         struct ath_softc *sc = hw->priv;
1635
1636         ath9k_del_ps_key(sc, vif, sta);
1637         ath_node_detach(sc, sta);
1638
1639         return 0;
1640 }
1641
1642 static int ath9k_sta_state(struct ieee80211_hw *hw,
1643                            struct ieee80211_vif *vif,
1644                            struct ieee80211_sta *sta,
1645                            enum ieee80211_sta_state old_state,
1646                            enum ieee80211_sta_state new_state)
1647 {
1648         struct ath_softc *sc = hw->priv;
1649         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1650         int ret = 0;
1651
1652         if (old_state == IEEE80211_STA_NOTEXIST &&
1653             new_state == IEEE80211_STA_NONE) {
1654                 ret = ath9k_sta_add(hw, vif, sta);
1655                 ath_dbg(common, CONFIG,
1656                         "Add station: %pM\n", sta->addr);
1657         } else if (old_state == IEEE80211_STA_NONE &&
1658                    new_state == IEEE80211_STA_NOTEXIST) {
1659                 ret = ath9k_sta_remove(hw, vif, sta);
1660                 ath_dbg(common, CONFIG,
1661                         "Remove station: %pM\n", sta->addr);
1662         }
1663
1664         if (ath9k_is_chanctx_enabled()) {
1665                 if (vif->type == NL80211_IFTYPE_STATION) {
1666                         if (old_state == IEEE80211_STA_ASSOC &&
1667                             new_state == IEEE80211_STA_AUTHORIZED)
1668                                 ath_chanctx_event(sc, vif,
1669                                                   ATH_CHANCTX_EVENT_AUTHORIZED);
1670                 }
1671         }
1672
1673         return ret;
1674 }
1675
1676 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1677                                     struct ath_node *an,
1678                                     bool set)
1679 {
1680         int i;
1681
1682         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1683                 if (!an->key_idx[i])
1684                         continue;
1685                 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1686         }
1687 }
1688
1689 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1690                          struct ieee80211_vif *vif,
1691                          enum sta_notify_cmd cmd,
1692                          struct ieee80211_sta *sta)
1693 {
1694         struct ath_softc *sc = hw->priv;
1695         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1696
1697         switch (cmd) {
1698         case STA_NOTIFY_SLEEP:
1699                 an->sleeping = true;
1700                 ath_tx_aggr_sleep(sta, sc, an);
1701                 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1702                 break;
1703         case STA_NOTIFY_AWAKE:
1704                 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1705                 an->sleeping = false;
1706                 ath_tx_aggr_wakeup(sc, an);
1707                 break;
1708         }
1709 }
1710
1711 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1712                          struct ieee80211_vif *vif, u16 queue,
1713                          const struct ieee80211_tx_queue_params *params)
1714 {
1715         struct ath_softc *sc = hw->priv;
1716         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1717         struct ath_txq *txq;
1718         struct ath9k_tx_queue_info qi;
1719         int ret = 0;
1720
1721         if (queue >= IEEE80211_NUM_ACS)
1722                 return 0;
1723
1724         txq = sc->tx.txq_map[queue];
1725
1726         ath9k_ps_wakeup(sc);
1727         mutex_lock(&sc->mutex);
1728
1729         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1730
1731         qi.tqi_aifs = params->aifs;
1732         qi.tqi_cwmin = params->cw_min;
1733         qi.tqi_cwmax = params->cw_max;
1734         qi.tqi_burstTime = params->txop * 32;
1735
1736         ath_dbg(common, CONFIG,
1737                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1738                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1739                 params->cw_max, params->txop);
1740
1741         ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1742         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1743         if (ret)
1744                 ath_err(common, "TXQ Update failed\n");
1745
1746         mutex_unlock(&sc->mutex);
1747         ath9k_ps_restore(sc);
1748
1749         return ret;
1750 }
1751
1752 static int ath9k_set_key(struct ieee80211_hw *hw,
1753                          enum set_key_cmd cmd,
1754                          struct ieee80211_vif *vif,
1755                          struct ieee80211_sta *sta,
1756                          struct ieee80211_key_conf *key)
1757 {
1758         struct ath_softc *sc = hw->priv;
1759         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1760         struct ath_node *an = NULL;
1761         int ret = 0, i;
1762
1763         if (ath9k_modparam_nohwcrypt)
1764                 return -ENOSPC;
1765
1766         if ((vif->type == NL80211_IFTYPE_ADHOC ||
1767              vif->type == NL80211_IFTYPE_MESH_POINT) &&
1768             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1769              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1770             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1771                 /*
1772                  * For now, disable hw crypto for the RSN IBSS group keys. This
1773                  * could be optimized in the future to use a modified key cache
1774                  * design to support per-STA RX GTK, but until that gets
1775                  * implemented, use of software crypto for group addressed
1776                  * frames is a acceptable to allow RSN IBSS to be used.
1777                  */
1778                 return -EOPNOTSUPP;
1779         }
1780
1781         mutex_lock(&sc->mutex);
1782         ath9k_ps_wakeup(sc);
1783         ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1784         if (sta)
1785                 an = (struct ath_node *)sta->drv_priv;
1786
1787         /* Delete pending key cache entries if no more frames are pointing to
1788          * them in TXQs.
1789          */
1790         for (i = 0; i < ATH_KEYMAX; i++)
1791                 ath9k_pending_key_del(sc, i);
1792
1793         switch (cmd) {
1794         case SET_KEY:
1795                 if (sta)
1796                         ath9k_del_ps_key(sc, vif, sta);
1797
1798                 key->hw_key_idx = 0;
1799                 ret = ath_key_config(common, vif, sta, key);
1800                 if (ret >= 0) {
1801                         key->hw_key_idx = ret;
1802                         /* push IV and Michael MIC generation to stack */
1803                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1804                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1805                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1806                         if (sc->sc_ah->sw_mgmt_crypto_tx &&
1807                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1808                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1809                         ret = 0;
1810                 }
1811                 if (an && key->hw_key_idx) {
1812                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1813                                 if (an->key_idx[i])
1814                                         continue;
1815                                 an->key_idx[i] = key->hw_key_idx;
1816                                 break;
1817                         }
1818                         WARN_ON(i == ARRAY_SIZE(an->key_idx));
1819                 }
1820                 break;
1821         case DISABLE_KEY:
1822                 if (ath9k_txq_has_key(sc, key->hw_key_idx)) {
1823                         /* Delay key cache entry deletion until there are no
1824                          * remaining TXQ frames pointing to this entry.
1825                          */
1826                         set_bit(key->hw_key_idx, sc->sc_ah->pending_del_keymap);
1827                         ath_hw_keysetmac(common, key->hw_key_idx, NULL);
1828                 } else {
1829                         ath_key_delete(common, key->hw_key_idx);
1830                 }
1831                 if (an) {
1832                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1833                                 if (an->key_idx[i] != key->hw_key_idx)
1834                                         continue;
1835                                 an->key_idx[i] = 0;
1836                                 break;
1837                         }
1838                 }
1839                 key->hw_key_idx = 0;
1840                 break;
1841         default:
1842                 ret = -EINVAL;
1843         }
1844
1845         ath9k_ps_restore(sc);
1846         mutex_unlock(&sc->mutex);
1847
1848         return ret;
1849 }
1850
1851 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1852                                    struct ieee80211_vif *vif,
1853                                    struct ieee80211_bss_conf *bss_conf,
1854                                    u32 changed)
1855 {
1856 #define CHECK_ANI                               \
1857         (BSS_CHANGED_ASSOC |                    \
1858          BSS_CHANGED_IBSS |                     \
1859          BSS_CHANGED_BEACON_ENABLED)
1860
1861         struct ath_softc *sc = hw->priv;
1862         struct ath_hw *ah = sc->sc_ah;
1863         struct ath_common *common = ath9k_hw_common(ah);
1864         struct ath_vif *avp = (void *)vif->drv_priv;
1865         int slottime;
1866
1867         ath9k_ps_wakeup(sc);
1868         mutex_lock(&sc->mutex);
1869
1870         if (changed & BSS_CHANGED_ASSOC) {
1871                 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1872                         bss_conf->bssid, bss_conf->assoc);
1873
1874                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1875                 avp->aid = bss_conf->aid;
1876                 avp->assoc = bss_conf->assoc;
1877
1878                 ath9k_calculate_summary_state(sc, avp->chanctx);
1879         }
1880
1881         if ((changed & BSS_CHANGED_IBSS) ||
1882               (changed & BSS_CHANGED_OCB)) {
1883                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1884                 common->curaid = bss_conf->aid;
1885                 ath9k_hw_write_associd(sc->sc_ah);
1886         }
1887
1888         if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1889             (changed & BSS_CHANGED_BEACON_INT) ||
1890             (changed & BSS_CHANGED_BEACON_INFO)) {
1891                 ath9k_calculate_summary_state(sc, avp->chanctx);
1892         }
1893
1894         if ((avp->chanctx == sc->cur_chan) &&
1895             (changed & BSS_CHANGED_ERP_SLOT)) {
1896                 if (bss_conf->use_short_slot)
1897                         slottime = 9;
1898                 else
1899                         slottime = 20;
1900
1901                 if (vif->type == NL80211_IFTYPE_AP) {
1902                         /*
1903                          * Defer update, so that connected stations can adjust
1904                          * their settings at the same time.
1905                          * See beacon.c for more details
1906                          */
1907                         sc->beacon.slottime = slottime;
1908                         sc->beacon.updateslot = UPDATE;
1909                 } else {
1910                         ah->slottime = slottime;
1911                         ath9k_hw_init_global_settings(ah);
1912                 }
1913         }
1914
1915         if (changed & BSS_CHANGED_P2P_PS)
1916                 ath9k_p2p_bss_info_changed(sc, vif);
1917
1918         if (changed & CHECK_ANI)
1919                 ath_check_ani(sc);
1920
1921         if (changed & BSS_CHANGED_TXPOWER) {
1922                 ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n",
1923                         vif->addr, bss_conf->txpower, bss_conf->txpower_type);
1924                 ath9k_set_txpower(sc, vif);
1925         }
1926
1927         mutex_unlock(&sc->mutex);
1928         ath9k_ps_restore(sc);
1929
1930 #undef CHECK_ANI
1931 }
1932
1933 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1934 {
1935         struct ath_softc *sc = hw->priv;
1936         struct ath_vif *avp = (void *)vif->drv_priv;
1937         u64 tsf;
1938
1939         mutex_lock(&sc->mutex);
1940         ath9k_ps_wakeup(sc);
1941         /* Get current TSF either from HW or kernel time. */
1942         if (sc->cur_chan == avp->chanctx) {
1943                 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1944         } else {
1945                 tsf = sc->cur_chan->tsf_val +
1946                       ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts, NULL);
1947         }
1948         tsf += le64_to_cpu(avp->tsf_adjust);
1949         ath9k_ps_restore(sc);
1950         mutex_unlock(&sc->mutex);
1951
1952         return tsf;
1953 }
1954
1955 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1956                           struct ieee80211_vif *vif,
1957                           u64 tsf)
1958 {
1959         struct ath_softc *sc = hw->priv;
1960         struct ath_vif *avp = (void *)vif->drv_priv;
1961
1962         mutex_lock(&sc->mutex);
1963         ath9k_ps_wakeup(sc);
1964         tsf -= le64_to_cpu(avp->tsf_adjust);
1965         getrawmonotonic(&avp->chanctx->tsf_ts);
1966         if (sc->cur_chan == avp->chanctx)
1967                 ath9k_hw_settsf64(sc->sc_ah, tsf);
1968         avp->chanctx->tsf_val = tsf;
1969         ath9k_ps_restore(sc);
1970         mutex_unlock(&sc->mutex);
1971 }
1972
1973 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1974 {
1975         struct ath_softc *sc = hw->priv;
1976         struct ath_vif *avp = (void *)vif->drv_priv;
1977
1978         mutex_lock(&sc->mutex);
1979
1980         ath9k_ps_wakeup(sc);
1981         getrawmonotonic(&avp->chanctx->tsf_ts);
1982         if (sc->cur_chan == avp->chanctx)
1983                 ath9k_hw_reset_tsf(sc->sc_ah);
1984         avp->chanctx->tsf_val = 0;
1985         ath9k_ps_restore(sc);
1986
1987         mutex_unlock(&sc->mutex);
1988 }
1989
1990 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1991                               struct ieee80211_vif *vif,
1992                               struct ieee80211_ampdu_params *params)
1993 {
1994         struct ath_softc *sc = hw->priv;
1995         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1996         bool flush = false;
1997         int ret = 0;
1998         struct ieee80211_sta *sta = params->sta;
1999         struct ath_node *an = (struct ath_node *)sta->drv_priv;
2000         enum ieee80211_ampdu_mlme_action action = params->action;
2001         u16 tid = params->tid;
2002         u16 *ssn = &params->ssn;
2003         struct ath_atx_tid *atid;
2004
2005         mutex_lock(&sc->mutex);
2006
2007         switch (action) {
2008         case IEEE80211_AMPDU_RX_START:
2009                 break;
2010         case IEEE80211_AMPDU_RX_STOP:
2011                 break;
2012         case IEEE80211_AMPDU_TX_START:
2013                 if (ath9k_is_chanctx_enabled()) {
2014                         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2015                                 ret = -EBUSY;
2016                                 break;
2017                         }
2018                 }
2019                 ath9k_ps_wakeup(sc);
2020                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2021                 if (!ret)
2022                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2023                 ath9k_ps_restore(sc);
2024                 break;
2025         case IEEE80211_AMPDU_TX_STOP_FLUSH:
2026         case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
2027                 flush = true;
2028         case IEEE80211_AMPDU_TX_STOP_CONT:
2029                 ath9k_ps_wakeup(sc);
2030                 ath_tx_aggr_stop(sc, sta, tid);
2031                 if (!flush)
2032                         ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2033                 ath9k_ps_restore(sc);
2034                 break;
2035         case IEEE80211_AMPDU_TX_OPERATIONAL:
2036                 atid = ath_node_to_tid(an, tid);
2037                 atid->baw_size = IEEE80211_MIN_AMPDU_BUF <<
2038                                 sta->ht_cap.ampdu_factor;
2039                 break;
2040         default:
2041                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2042         }
2043
2044         mutex_unlock(&sc->mutex);
2045
2046         return ret;
2047 }
2048
2049 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2050                              struct survey_info *survey)
2051 {
2052         struct ath_softc *sc = hw->priv;
2053         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2054         struct ieee80211_supported_band *sband;
2055         struct ieee80211_channel *chan;
2056         int pos;
2057
2058         if (IS_ENABLED(CONFIG_ATH9K_TX99))
2059                 return -EOPNOTSUPP;
2060
2061         spin_lock_bh(&common->cc_lock);
2062         if (idx == 0)
2063                 ath_update_survey_stats(sc);
2064
2065         sband = hw->wiphy->bands[NL80211_BAND_2GHZ];
2066         if (sband && idx >= sband->n_channels) {
2067                 idx -= sband->n_channels;
2068                 sband = NULL;
2069         }
2070
2071         if (!sband)
2072                 sband = hw->wiphy->bands[NL80211_BAND_5GHZ];
2073
2074         if (!sband || idx >= sband->n_channels) {
2075                 spin_unlock_bh(&common->cc_lock);
2076                 return -ENOENT;
2077         }
2078
2079         chan = &sband->channels[idx];
2080         pos = chan->hw_value;
2081         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2082         survey->channel = chan;
2083         spin_unlock_bh(&common->cc_lock);
2084
2085         return 0;
2086 }
2087
2088 static void ath9k_enable_dynack(struct ath_softc *sc)
2089 {
2090 #ifdef CONFIG_ATH9K_DYNACK
2091         u32 rfilt;
2092         struct ath_hw *ah = sc->sc_ah;
2093
2094         ath_dynack_reset(ah);
2095
2096         ah->dynack.enabled = true;
2097         rfilt = ath_calcrxfilter(sc);
2098         ath9k_hw_setrxfilter(ah, rfilt);
2099 #endif
2100 }
2101
2102 static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
2103                                      s16 coverage_class)
2104 {
2105         struct ath_softc *sc = hw->priv;
2106         struct ath_hw *ah = sc->sc_ah;
2107
2108         if (IS_ENABLED(CONFIG_ATH9K_TX99))
2109                 return;
2110
2111         mutex_lock(&sc->mutex);
2112
2113         if (coverage_class >= 0) {
2114                 ah->coverage_class = coverage_class;
2115                 if (ah->dynack.enabled) {
2116                         u32 rfilt;
2117
2118                         ah->dynack.enabled = false;
2119                         rfilt = ath_calcrxfilter(sc);
2120                         ath9k_hw_setrxfilter(ah, rfilt);
2121                 }
2122                 ath9k_ps_wakeup(sc);
2123                 ath9k_hw_init_global_settings(ah);
2124                 ath9k_ps_restore(sc);
2125         } else if (!ah->dynack.enabled) {
2126                 ath9k_enable_dynack(sc);
2127         }
2128
2129         mutex_unlock(&sc->mutex);
2130 }
2131
2132 static bool ath9k_has_tx_pending(struct ath_softc *sc,
2133                                  bool sw_pending)
2134 {
2135         int i, npend = 0;
2136
2137         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2138                 if (!ATH_TXQ_SETUP(sc, i))
2139                         continue;
2140
2141                 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
2142                                                  sw_pending);
2143                 if (npend)
2144                         break;
2145         }
2146
2147         return !!npend;
2148 }
2149
2150 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2151                         u32 queues, bool drop)
2152 {
2153         struct ath_softc *sc = hw->priv;
2154         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2155
2156         if (ath9k_is_chanctx_enabled()) {
2157                 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2158                         goto flush;
2159
2160                 /*
2161                  * If MCC is active, extend the flush timeout
2162                  * and wait for the HW/SW queues to become
2163                  * empty. This needs to be done outside the
2164                  * sc->mutex lock to allow the channel scheduler
2165                  * to switch channel contexts.
2166                  *
2167                  * The vif queues have been stopped in mac80211,
2168                  * so there won't be any incoming frames.
2169                  */
2170                 __ath9k_flush(hw, queues, drop, true, true);
2171                 return;
2172         }
2173 flush:
2174         mutex_lock(&sc->mutex);
2175         __ath9k_flush(hw, queues, drop, true, false);
2176         mutex_unlock(&sc->mutex);
2177 }
2178
2179 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2180                    bool sw_pending, bool timeout_override)
2181 {
2182         struct ath_softc *sc = hw->priv;
2183         struct ath_hw *ah = sc->sc_ah;
2184         struct ath_common *common = ath9k_hw_common(ah);
2185         int timeout;
2186         bool drain_txq;
2187
2188         cancel_delayed_work_sync(&sc->hw_check_work);
2189
2190         if (ah->ah_flags & AH_UNPLUGGED) {
2191                 ath_dbg(common, ANY, "Device has been unplugged!\n");
2192                 return;
2193         }
2194
2195         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2196                 ath_dbg(common, ANY, "Device not present\n");
2197                 return;
2198         }
2199
2200         spin_lock_bh(&sc->chan_lock);
2201         if (timeout_override)
2202                 timeout = HZ / 5;
2203         else
2204                 timeout = sc->cur_chan->flush_timeout;
2205         spin_unlock_bh(&sc->chan_lock);
2206
2207         ath_dbg(common, CHAN_CTX,
2208                 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2209
2210         if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2211                                timeout) > 0)
2212                 drop = false;
2213
2214         if (drop) {
2215                 ath9k_ps_wakeup(sc);
2216                 spin_lock_bh(&sc->sc_pcu_lock);
2217                 drain_txq = ath_drain_all_txq(sc);
2218                 spin_unlock_bh(&sc->sc_pcu_lock);
2219
2220                 if (!drain_txq)
2221                         ath_reset(sc, NULL);
2222
2223                 ath9k_ps_restore(sc);
2224         }
2225
2226         ieee80211_queue_delayed_work(hw, &sc->hw_check_work,
2227                                      ATH_HW_CHECK_POLL_INT);
2228 }
2229
2230 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2231 {
2232         struct ath_softc *sc = hw->priv;
2233
2234         return ath9k_has_tx_pending(sc, true);
2235 }
2236
2237 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2238 {
2239         struct ath_softc *sc = hw->priv;
2240         struct ath_hw *ah = sc->sc_ah;
2241         struct ieee80211_vif *vif;
2242         struct ath_vif *avp;
2243         struct ath_buf *bf;
2244         struct ath_tx_status ts;
2245         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2246         int status;
2247
2248         vif = sc->beacon.bslot[0];
2249         if (!vif)
2250                 return 0;
2251
2252         if (!vif->bss_conf.enable_beacon)
2253                 return 0;
2254
2255         avp = (void *)vif->drv_priv;
2256
2257         if (!sc->beacon.tx_processed && !edma) {
2258                 tasklet_disable(&sc->bcon_tasklet);
2259
2260                 bf = avp->av_bcbuf;
2261                 if (!bf || !bf->bf_mpdu)
2262                         goto skip;
2263
2264                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2265                 if (status == -EINPROGRESS)
2266                         goto skip;
2267
2268                 sc->beacon.tx_processed = true;
2269                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2270
2271 skip:
2272                 tasklet_enable(&sc->bcon_tasklet);
2273         }
2274
2275         return sc->beacon.tx_last;
2276 }
2277
2278 static int ath9k_get_stats(struct ieee80211_hw *hw,
2279                            struct ieee80211_low_level_stats *stats)
2280 {
2281         struct ath_softc *sc = hw->priv;
2282         struct ath_hw *ah = sc->sc_ah;
2283         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2284
2285         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2286         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2287         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2288         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2289         return 0;
2290 }
2291
2292 static u32 fill_chainmask(u32 cap, u32 new)
2293 {
2294         u32 filled = 0;
2295         int i;
2296
2297         for (i = 0; cap && new; i++, cap >>= 1) {
2298                 if (!(cap & BIT(0)))
2299                         continue;
2300
2301                 if (new & BIT(0))
2302                         filled |= BIT(i);
2303
2304                 new >>= 1;
2305         }
2306
2307         return filled;
2308 }
2309
2310 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2311 {
2312         if (AR_SREV_9300_20_OR_LATER(ah))
2313                 return true;
2314
2315         switch (val & 0x7) {
2316         case 0x1:
2317         case 0x3:
2318         case 0x7:
2319                 return true;
2320         case 0x2:
2321                 return (ah->caps.rx_chainmask == 1);
2322         default:
2323                 return false;
2324         }
2325 }
2326
2327 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2328 {
2329         struct ath_softc *sc = hw->priv;
2330         struct ath_hw *ah = sc->sc_ah;
2331
2332         if (ah->caps.rx_chainmask != 1)
2333                 rx_ant |= tx_ant;
2334
2335         if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2336                 return -EINVAL;
2337
2338         sc->ant_rx = rx_ant;
2339         sc->ant_tx = tx_ant;
2340
2341         if (ah->caps.rx_chainmask == 1)
2342                 return 0;
2343
2344         /* AR9100 runs into calibration issues if not all rx chains are enabled */
2345         if (AR_SREV_9100(ah))
2346                 ah->rxchainmask = 0x7;
2347         else
2348                 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2349
2350         ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2351         ath9k_cmn_reload_chainmask(ah);
2352
2353         return 0;
2354 }
2355
2356 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2357 {
2358         struct ath_softc *sc = hw->priv;
2359
2360         *tx_ant = sc->ant_tx;
2361         *rx_ant = sc->ant_rx;
2362         return 0;
2363 }
2364
2365 static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2366                                 struct ieee80211_vif *vif,
2367                                 const u8 *mac_addr)
2368 {
2369         struct ath_softc *sc = hw->priv;
2370         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2371         set_bit(ATH_OP_SCANNING, &common->op_flags);
2372 }
2373
2374 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2375                                    struct ieee80211_vif *vif)
2376 {
2377         struct ath_softc *sc = hw->priv;
2378         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2379         clear_bit(ATH_OP_SCANNING, &common->op_flags);
2380 }
2381
2382 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2383
2384 static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2385 {
2386         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2387
2388         if (sc->offchannel.roc_vif) {
2389                 ath_dbg(common, CHAN_CTX,
2390                         "%s: Aborting RoC\n", __func__);
2391
2392                 del_timer_sync(&sc->offchannel.timer);
2393                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2394                         ath_roc_complete(sc, ATH_ROC_COMPLETE_ABORT);
2395         }
2396
2397         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2398                 ath_dbg(common, CHAN_CTX,
2399                         "%s: Aborting HW scan\n", __func__);
2400
2401                 del_timer_sync(&sc->offchannel.timer);
2402                 ath_scan_complete(sc, true);
2403         }
2404 }
2405
2406 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2407                          struct ieee80211_scan_request *hw_req)
2408 {
2409         struct cfg80211_scan_request *req = &hw_req->req;
2410         struct ath_softc *sc = hw->priv;
2411         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2412         int ret = 0;
2413
2414         mutex_lock(&sc->mutex);
2415
2416         if (WARN_ON(sc->offchannel.scan_req)) {
2417                 ret = -EBUSY;
2418                 goto out;
2419         }
2420
2421         ath9k_ps_wakeup(sc);
2422         set_bit(ATH_OP_SCANNING, &common->op_flags);
2423         sc->offchannel.scan_vif = vif;
2424         sc->offchannel.scan_req = req;
2425         sc->offchannel.scan_idx = 0;
2426
2427         ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2428                 vif->addr);
2429
2430         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2431                 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2432                 ath_offchannel_next(sc);
2433         }
2434
2435 out:
2436         mutex_unlock(&sc->mutex);
2437
2438         return ret;
2439 }
2440
2441 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2442                                  struct ieee80211_vif *vif)
2443 {
2444         struct ath_softc *sc = hw->priv;
2445         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2446
2447         ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2448
2449         mutex_lock(&sc->mutex);
2450         del_timer_sync(&sc->offchannel.timer);
2451         ath_scan_complete(sc, true);
2452         mutex_unlock(&sc->mutex);
2453 }
2454
2455 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2456                                    struct ieee80211_vif *vif,
2457                                    struct ieee80211_channel *chan, int duration,
2458                                    enum ieee80211_roc_type type)
2459 {
2460         struct ath_softc *sc = hw->priv;
2461         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2462         int ret = 0;
2463
2464         mutex_lock(&sc->mutex);
2465
2466         if (WARN_ON(sc->offchannel.roc_vif)) {
2467                 ret = -EBUSY;
2468                 goto out;
2469         }
2470
2471         ath9k_ps_wakeup(sc);
2472         sc->offchannel.roc_vif = vif;
2473         sc->offchannel.roc_chan = chan;
2474         sc->offchannel.roc_duration = duration;
2475
2476         ath_dbg(common, CHAN_CTX,
2477                 "RoC request on vif: %pM, type: %d duration: %d\n",
2478                 vif->addr, type, duration);
2479
2480         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2481                 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2482                 ath_offchannel_next(sc);
2483         }
2484
2485 out:
2486         mutex_unlock(&sc->mutex);
2487
2488         return ret;
2489 }
2490
2491 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2492 {
2493         struct ath_softc *sc = hw->priv;
2494         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2495
2496         mutex_lock(&sc->mutex);
2497
2498         ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2499         del_timer_sync(&sc->offchannel.timer);
2500
2501         if (sc->offchannel.roc_vif) {
2502                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2503                         ath_roc_complete(sc, ATH_ROC_COMPLETE_CANCEL);
2504         }
2505
2506         mutex_unlock(&sc->mutex);
2507
2508         return 0;
2509 }
2510
2511 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2512                              struct ieee80211_chanctx_conf *conf)
2513 {
2514         struct ath_softc *sc = hw->priv;
2515         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2516         struct ath_chanctx *ctx, **ptr;
2517         int pos;
2518
2519         mutex_lock(&sc->mutex);
2520
2521         ath_for_each_chanctx(sc, ctx) {
2522                 if (ctx->assigned)
2523                         continue;
2524
2525                 ptr = (void *) conf->drv_priv;
2526                 *ptr = ctx;
2527                 ctx->assigned = true;
2528                 pos = ctx - &sc->chanctx[0];
2529                 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2530
2531                 ath_dbg(common, CHAN_CTX,
2532                         "Add channel context: %d MHz\n",
2533                         conf->def.chan->center_freq);
2534
2535                 ath_chanctx_set_channel(sc, ctx, &conf->def);
2536
2537                 mutex_unlock(&sc->mutex);
2538                 return 0;
2539         }
2540
2541         mutex_unlock(&sc->mutex);
2542         return -ENOSPC;
2543 }
2544
2545
2546 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2547                                  struct ieee80211_chanctx_conf *conf)
2548 {
2549         struct ath_softc *sc = hw->priv;
2550         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2551         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2552
2553         mutex_lock(&sc->mutex);
2554
2555         ath_dbg(common, CHAN_CTX,
2556                 "Remove channel context: %d MHz\n",
2557                 conf->def.chan->center_freq);
2558
2559         ctx->assigned = false;
2560         ctx->hw_queue_base = 0;
2561         ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2562
2563         mutex_unlock(&sc->mutex);
2564 }
2565
2566 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2567                                  struct ieee80211_chanctx_conf *conf,
2568                                  u32 changed)
2569 {
2570         struct ath_softc *sc = hw->priv;
2571         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2572         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2573
2574         mutex_lock(&sc->mutex);
2575         ath_dbg(common, CHAN_CTX,
2576                 "Change channel context: %d MHz\n",
2577                 conf->def.chan->center_freq);
2578         ath_chanctx_set_channel(sc, ctx, &conf->def);
2579         mutex_unlock(&sc->mutex);
2580 }
2581
2582 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2583                                     struct ieee80211_vif *vif,
2584                                     struct ieee80211_chanctx_conf *conf)
2585 {
2586         struct ath_softc *sc = hw->priv;
2587         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2588         struct ath_vif *avp = (void *)vif->drv_priv;
2589         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2590         int i;
2591
2592         ath9k_cancel_pending_offchannel(sc);
2593
2594         mutex_lock(&sc->mutex);
2595
2596         ath_dbg(common, CHAN_CTX,
2597                 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2598                 vif->addr, vif->type, vif->p2p,
2599                 conf->def.chan->center_freq);
2600
2601         avp->chanctx = ctx;
2602         ctx->nvifs_assigned++;
2603         list_add_tail(&avp->list, &ctx->vifs);
2604         ath9k_calculate_summary_state(sc, ctx);
2605         for (i = 0; i < IEEE80211_NUM_ACS; i++)
2606                 vif->hw_queue[i] = ctx->hw_queue_base + i;
2607
2608         mutex_unlock(&sc->mutex);
2609
2610         return 0;
2611 }
2612
2613 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2614                                        struct ieee80211_vif *vif,
2615                                        struct ieee80211_chanctx_conf *conf)
2616 {
2617         struct ath_softc *sc = hw->priv;
2618         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2619         struct ath_vif *avp = (void *)vif->drv_priv;
2620         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2621         int ac;
2622
2623         ath9k_cancel_pending_offchannel(sc);
2624
2625         mutex_lock(&sc->mutex);
2626
2627         ath_dbg(common, CHAN_CTX,
2628                 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2629                 vif->addr, vif->type, vif->p2p,
2630                 conf->def.chan->center_freq);
2631
2632         avp->chanctx = NULL;
2633         ctx->nvifs_assigned--;
2634         list_del(&avp->list);
2635         ath9k_calculate_summary_state(sc, ctx);
2636         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2637                 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2638
2639         mutex_unlock(&sc->mutex);
2640 }
2641
2642 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2643                                  struct ieee80211_vif *vif)
2644 {
2645         struct ath_softc *sc = hw->priv;
2646         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2647         struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2648         struct ath_beacon_config *cur_conf;
2649         struct ath_chanctx *go_ctx;
2650         unsigned long timeout;
2651         bool changed = false;
2652         u32 beacon_int;
2653
2654         if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2655                 return;
2656
2657         if (!avp->chanctx)
2658                 return;
2659
2660         mutex_lock(&sc->mutex);
2661
2662         spin_lock_bh(&sc->chan_lock);
2663         if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2664                 changed = true;
2665         spin_unlock_bh(&sc->chan_lock);
2666
2667         if (!changed)
2668                 goto out;
2669
2670         ath9k_cancel_pending_offchannel(sc);
2671
2672         go_ctx = ath_is_go_chanctx_present(sc);
2673
2674         if (go_ctx) {
2675                 /*
2676                  * Wait till the GO interface gets a chance
2677                  * to send out an NoA.
2678                  */
2679                 spin_lock_bh(&sc->chan_lock);
2680                 sc->sched.mgd_prepare_tx = true;
2681                 cur_conf = &go_ctx->beacon;
2682                 beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2683                 spin_unlock_bh(&sc->chan_lock);
2684
2685                 timeout = usecs_to_jiffies(beacon_int * 2);
2686                 init_completion(&sc->go_beacon);
2687
2688                 mutex_unlock(&sc->mutex);
2689
2690                 if (wait_for_completion_timeout(&sc->go_beacon,
2691                                                 timeout) == 0) {
2692                         ath_dbg(common, CHAN_CTX,
2693                                 "Failed to send new NoA\n");
2694
2695                         spin_lock_bh(&sc->chan_lock);
2696                         sc->sched.mgd_prepare_tx = false;
2697                         spin_unlock_bh(&sc->chan_lock);
2698                 }
2699
2700                 mutex_lock(&sc->mutex);
2701         }
2702
2703         ath_dbg(common, CHAN_CTX,
2704                 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2705                 __func__, vif->addr);
2706
2707         spin_lock_bh(&sc->chan_lock);
2708         sc->next_chan = avp->chanctx;
2709         sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2710         spin_unlock_bh(&sc->chan_lock);
2711
2712         ath_chanctx_set_next(sc, true);
2713 out:
2714         mutex_unlock(&sc->mutex);
2715 }
2716
2717 void ath9k_fill_chanctx_ops(void)
2718 {
2719         if (!ath9k_is_chanctx_enabled())
2720                 return;
2721
2722         ath9k_ops.hw_scan                  = ath9k_hw_scan;
2723         ath9k_ops.cancel_hw_scan           = ath9k_cancel_hw_scan;
2724         ath9k_ops.remain_on_channel        = ath9k_remain_on_channel;
2725         ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2726         ath9k_ops.add_chanctx              = ath9k_add_chanctx;
2727         ath9k_ops.remove_chanctx           = ath9k_remove_chanctx;
2728         ath9k_ops.change_chanctx           = ath9k_change_chanctx;
2729         ath9k_ops.assign_vif_chanctx       = ath9k_assign_vif_chanctx;
2730         ath9k_ops.unassign_vif_chanctx     = ath9k_unassign_vif_chanctx;
2731         ath9k_ops.mgd_prepare_tx           = ath9k_mgd_prepare_tx;
2732 }
2733
2734 #endif
2735
2736 static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2737                              int *dbm)
2738 {
2739         struct ath_softc *sc = hw->priv;
2740         struct ath_vif *avp = (void *)vif->drv_priv;
2741
2742         mutex_lock(&sc->mutex);
2743         if (avp->chanctx)
2744                 *dbm = avp->chanctx->cur_txpower;
2745         else
2746                 *dbm = sc->cur_chan->cur_txpower;
2747         mutex_unlock(&sc->mutex);
2748
2749         *dbm /= 2;
2750
2751         return 0;
2752 }
2753
2754 struct ieee80211_ops ath9k_ops = {
2755         .tx                 = ath9k_tx,
2756         .start              = ath9k_start,
2757         .stop               = ath9k_stop,
2758         .add_interface      = ath9k_add_interface,
2759         .change_interface   = ath9k_change_interface,
2760         .remove_interface   = ath9k_remove_interface,
2761         .config             = ath9k_config,
2762         .configure_filter   = ath9k_configure_filter,
2763         .sta_state          = ath9k_sta_state,
2764         .sta_notify         = ath9k_sta_notify,
2765         .conf_tx            = ath9k_conf_tx,
2766         .bss_info_changed   = ath9k_bss_info_changed,
2767         .set_key            = ath9k_set_key,
2768         .get_tsf            = ath9k_get_tsf,
2769         .set_tsf            = ath9k_set_tsf,
2770         .reset_tsf          = ath9k_reset_tsf,
2771         .ampdu_action       = ath9k_ampdu_action,
2772         .get_survey         = ath9k_get_survey,
2773         .rfkill_poll        = ath9k_rfkill_poll_state,
2774         .set_coverage_class = ath9k_set_coverage_class,
2775         .flush              = ath9k_flush,
2776         .tx_frames_pending  = ath9k_tx_frames_pending,
2777         .tx_last_beacon     = ath9k_tx_last_beacon,
2778         .release_buffered_frames = ath9k_release_buffered_frames,
2779         .get_stats          = ath9k_get_stats,
2780         .set_antenna        = ath9k_set_antenna,
2781         .get_antenna        = ath9k_get_antenna,
2782
2783 #ifdef CONFIG_ATH9K_WOW
2784         .suspend            = ath9k_suspend,
2785         .resume             = ath9k_resume,
2786         .set_wakeup         = ath9k_set_wakeup,
2787 #endif
2788
2789 #ifdef CONFIG_ATH9K_DEBUGFS
2790         .get_et_sset_count  = ath9k_get_et_sset_count,
2791         .get_et_stats       = ath9k_get_et_stats,
2792         .get_et_strings     = ath9k_get_et_strings,
2793 #endif
2794
2795 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2796         .sta_add_debugfs    = ath9k_sta_add_debugfs,
2797 #endif
2798         .sw_scan_start      = ath9k_sw_scan_start,
2799         .sw_scan_complete   = ath9k_sw_scan_complete,
2800         .get_txpower        = ath9k_get_txpower,
2801         .wake_tx_queue      = ath9k_wake_tx_queue,
2802 };