GNU Linux-libre 4.9.309-gnu1
[releases.git] / drivers / net / wireless / intel / iwlwifi / mvm / nvm.c
1 /******************************************************************************
2  *
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6  * GPL LICENSE SUMMARY
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8  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10  * Copyright(c) 2016        Intel Deutschland GmbH
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35  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
36  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
37  * Copyright(c) 2016        Intel Deutschland GmbH
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51  *    contributors may be used to endorse or promote products derived
52  *    from this software without specific prior written permission.
53  *
54  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
55  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
56  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
57  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
58  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
59  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
60  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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64  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65  *
66  *****************************************************************************/
67 #include <linux/firmware.h>
68 #include <linux/rtnetlink.h>
69 #include "iwl-trans.h"
70 #include "iwl-csr.h"
71 #include "mvm.h"
72 #include "iwl-eeprom-parse.h"
73 #include "iwl-eeprom-read.h"
74 #include "iwl-nvm-parse.h"
75 #include "iwl-prph.h"
76
77 /* Default NVM size to read */
78 #define IWL_NVM_DEFAULT_CHUNK_SIZE (2*1024)
79 #define IWL_MAX_NVM_SECTION_SIZE        0x1b58
80 #define IWL_MAX_NVM_8000_SECTION_SIZE   0x1ffc
81
82 #define NVM_WRITE_OPCODE 1
83 #define NVM_READ_OPCODE 0
84
85 /* load nvm chunk response */
86 enum {
87         READ_NVM_CHUNK_SUCCEED = 0,
88         READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
89 };
90
91 /*
92  * prepare the NVM host command w/ the pointers to the nvm buffer
93  * and send it to fw
94  */
95 static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
96                                u16 offset, u16 length, const u8 *data)
97 {
98         struct iwl_nvm_access_cmd nvm_access_cmd = {
99                 .offset = cpu_to_le16(offset),
100                 .length = cpu_to_le16(length),
101                 .type = cpu_to_le16(section),
102                 .op_code = NVM_WRITE_OPCODE,
103         };
104         struct iwl_host_cmd cmd = {
105                 .id = NVM_ACCESS_CMD,
106                 .len = { sizeof(struct iwl_nvm_access_cmd), length },
107                 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
108                 .data = { &nvm_access_cmd, data },
109                 /* data may come from vmalloc, so use _DUP */
110                 .dataflags = { 0, IWL_HCMD_DFL_DUP },
111         };
112         struct iwl_rx_packet *pkt;
113         struct iwl_nvm_access_resp *nvm_resp;
114         int ret;
115
116         ret = iwl_mvm_send_cmd(mvm, &cmd);
117         if (ret)
118                 return ret;
119
120         pkt = cmd.resp_pkt;
121         if (!pkt) {
122                 IWL_ERR(mvm, "Error in NVM_ACCESS response\n");
123                 return -EINVAL;
124         }
125         /* Extract & check NVM write response */
126         nvm_resp = (void *)pkt->data;
127         if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) {
128                 IWL_ERR(mvm,
129                         "NVM access write command failed for section %u (status = 0x%x)\n",
130                         section, le16_to_cpu(nvm_resp->status));
131                 ret = -EIO;
132         }
133
134         iwl_free_resp(&cmd);
135         return ret;
136 }
137
138 static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
139                               u16 offset, u16 length, u8 *data)
140 {
141         struct iwl_nvm_access_cmd nvm_access_cmd = {
142                 .offset = cpu_to_le16(offset),
143                 .length = cpu_to_le16(length),
144                 .type = cpu_to_le16(section),
145                 .op_code = NVM_READ_OPCODE,
146         };
147         struct iwl_nvm_access_resp *nvm_resp;
148         struct iwl_rx_packet *pkt;
149         struct iwl_host_cmd cmd = {
150                 .id = NVM_ACCESS_CMD,
151                 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
152                 .data = { &nvm_access_cmd, },
153         };
154         int ret, bytes_read, offset_read;
155         u8 *resp_data;
156
157         cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
158
159         ret = iwl_mvm_send_cmd(mvm, &cmd);
160         if (ret)
161                 return ret;
162
163         pkt = cmd.resp_pkt;
164
165         /* Extract NVM response */
166         nvm_resp = (void *)pkt->data;
167         ret = le16_to_cpu(nvm_resp->status);
168         bytes_read = le16_to_cpu(nvm_resp->length);
169         offset_read = le16_to_cpu(nvm_resp->offset);
170         resp_data = nvm_resp->data;
171         if (ret) {
172                 if ((offset != 0) &&
173                     (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
174                         /*
175                          * meaning of NOT_VALID_ADDRESS:
176                          * driver try to read chunk from address that is
177                          * multiple of 2K and got an error since addr is empty.
178                          * meaning of (offset != 0): driver already
179                          * read valid data from another chunk so this case
180                          * is not an error.
181                          */
182                         IWL_DEBUG_EEPROM(mvm->trans->dev,
183                                          "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
184                                          offset);
185                         ret = 0;
186                 } else {
187                         IWL_DEBUG_EEPROM(mvm->trans->dev,
188                                          "NVM access command failed with status %d (device: %s)\n",
189                                          ret, mvm->cfg->name);
190                         ret = -EIO;
191                 }
192                 goto exit;
193         }
194
195         if (offset_read != offset) {
196                 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
197                         offset_read);
198                 ret = -EINVAL;
199                 goto exit;
200         }
201
202         /* Write data to NVM */
203         memcpy(data + offset, resp_data, bytes_read);
204         ret = bytes_read;
205
206 exit:
207         iwl_free_resp(&cmd);
208         return ret;
209 }
210
211 static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
212                                  const u8 *data, u16 length)
213 {
214         int offset = 0;
215
216         /* copy data in chunks of 2k (and remainder if any) */
217
218         while (offset < length) {
219                 int chunk_size, ret;
220
221                 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
222                                  length - offset);
223
224                 ret = iwl_nvm_write_chunk(mvm, section, offset,
225                                           chunk_size, data + offset);
226                 if (ret < 0)
227                         return ret;
228
229                 offset += chunk_size;
230         }
231
232         return 0;
233 }
234
235 static void iwl_mvm_nvm_fixups(struct iwl_mvm *mvm, unsigned int section,
236                                u8 *data, unsigned int len)
237 {
238 #define IWL_4165_DEVICE_ID      0x5501
239 #define NVM_SKU_CAP_MIMO_DISABLE BIT(5)
240
241         if (section == NVM_SECTION_TYPE_PHY_SKU &&
242             mvm->trans->hw_id == IWL_4165_DEVICE_ID && data && len >= 5 &&
243             (data[4] & NVM_SKU_CAP_MIMO_DISABLE))
244                 /* OTP 0x52 bug work around: it's a 1x1 device */
245                 data[3] = ANT_B | (ANT_B << 4);
246 }
247
248 /*
249  * Reads an NVM section completely.
250  * NICs prior to 7000 family doesn't have a real NVM, but just read
251  * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
252  * by uCode, we need to manually check in this case that we don't
253  * overflow and try to read more than the EEPROM size.
254  * For 7000 family NICs, we supply the maximal size we can read, and
255  * the uCode fills the response with as much data as we can,
256  * without overflowing, so no check is needed.
257  */
258 static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
259                                 u8 *data, u32 size_read)
260 {
261         u16 length, offset = 0;
262         int ret;
263
264         /* Set nvm section read length */
265         length = IWL_NVM_DEFAULT_CHUNK_SIZE;
266
267         ret = length;
268
269         /* Read the NVM until exhausted (reading less than requested) */
270         while (ret == length) {
271                 /* Check no memory assumptions fail and cause an overflow */
272                 if ((size_read + offset + length) >
273                     mvm->cfg->base_params->eeprom_size) {
274                         IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
275                         return -ENOBUFS;
276                 }
277
278                 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
279                 if (ret < 0) {
280                         IWL_DEBUG_EEPROM(mvm->trans->dev,
281                                          "Cannot read NVM from section %d offset %d, length %d\n",
282                                          section, offset, length);
283                         return ret;
284                 }
285                 offset += ret;
286         }
287
288         iwl_mvm_nvm_fixups(mvm, section, data, offset);
289
290         IWL_DEBUG_EEPROM(mvm->trans->dev,
291                          "NVM section %d read completed\n", section);
292         return offset;
293 }
294
295 static struct iwl_nvm_data *
296 iwl_parse_nvm_sections(struct iwl_mvm *mvm)
297 {
298         struct iwl_nvm_section *sections = mvm->nvm_sections;
299         const __le16 *hw, *sw, *calib, *regulatory, *mac_override, *phy_sku;
300         bool lar_enabled;
301
302         /* Checking for required sections */
303         if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
304                 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
305                     !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
306                         IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
307                         return NULL;
308                 }
309         } else {
310                 /* SW and REGULATORY sections are mandatory */
311                 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
312                     !mvm->nvm_sections[NVM_SECTION_TYPE_REGULATORY].data) {
313                         IWL_ERR(mvm,
314                                 "Can't parse empty family 8000 OTP/NVM sections\n");
315                         return NULL;
316                 }
317                 /* MAC_OVERRIDE or at least HW section must exist */
318                 if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
319                     !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
320                         IWL_ERR(mvm,
321                                 "Can't parse mac_address, empty sections\n");
322                         return NULL;
323                 }
324
325                 /* PHY_SKU section is mandatory in B0 */
326                 if (!mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
327                         IWL_ERR(mvm,
328                                 "Can't parse phy_sku in B0, empty sections\n");
329                         return NULL;
330                 }
331         }
332
333         if (WARN_ON(!mvm->cfg))
334                 return NULL;
335
336         hw = (const __le16 *)sections[mvm->cfg->nvm_hw_section_num].data;
337         sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
338         calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
339         regulatory = (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
340         mac_override =
341                 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
342         phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
343
344         lar_enabled = !iwlwifi_mod_params.lar_disable &&
345                       fw_has_capa(&mvm->fw->ucode_capa,
346                                   IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
347
348         return iwl_parse_nvm_data(mvm->trans, mvm->cfg, hw, sw, calib,
349                                   regulatory, mac_override, phy_sku,
350                                   mvm->fw->valid_tx_ant, mvm->fw->valid_rx_ant,
351                                   lar_enabled);
352 }
353
354 #define MAX_NVM_FILE_LEN        16384
355
356 /*
357  * Reads external NVM from a file into mvm->nvm_sections
358  *
359  * HOW TO CREATE THE NVM FILE FORMAT:
360  * ------------------------------
361  * 1. create hex file, format:
362  *      3800 -> header
363  *      0000 -> header
364  *      5a40 -> data
365  *
366  *   rev - 6 bit (word1)
367  *   len - 10 bit (word1)
368  *   id - 4 bit (word2)
369  *   rsv - 12 bit (word2)
370  *
371  * 2. flip 8bits with 8 bits per line to get the right NVM file format
372  *
373  * 3. create binary file from the hex file
374  *
375  * 4. save as "iNVM_xxx.bin" under /lib/firmware
376  */
377 static int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
378 {
379         int ret, section_size;
380         u16 section_id;
381         const struct firmware *fw_entry;
382         const struct {
383                 __le16 word1;
384                 __le16 word2;
385                 u8 data[];
386         } *file_sec;
387         const u8 *eof;
388         u8 *temp;
389         int max_section_size;
390         const __le32 *dword_buff;
391
392 #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
393 #define NVM_WORD2_ID(x) (x >> 12)
394 #define NVM_WORD2_LEN_FAMILY_8000(x) (2 * ((x & 0xFF) << 8 | x >> 8))
395 #define NVM_WORD1_ID_FAMILY_8000(x) (x >> 4)
396 #define NVM_HEADER_0    (0x2A504C54)
397 #define NVM_HEADER_1    (0x4E564D2A)
398 #define NVM_HEADER_SIZE (4 * sizeof(u32))
399
400         IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n");
401
402         /* Maximal size depends on HW family and step */
403         if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
404                 max_section_size = IWL_MAX_NVM_SECTION_SIZE;
405         else
406                 max_section_size = IWL_MAX_NVM_8000_SECTION_SIZE;
407
408         /*
409          * Obtain NVM image via request_firmware. Since we already used
410          * reject_firmware_nowait() for the firmware binary load and only
411          * get here after that we assume the NVM request can be satisfied
412          * synchronously.
413          */
414         ret = reject_firmware(&fw_entry, mvm->nvm_file_name,
415                                mvm->trans->dev);
416         if (ret) {
417                 IWL_ERR(mvm, "ERROR: %s isn't available %d\n",
418                         mvm->nvm_file_name, ret);
419                 return ret;
420         }
421
422         IWL_INFO(mvm, "Loaded NVM file %s (%zu bytes)\n",
423                  mvm->nvm_file_name, fw_entry->size);
424
425         if (fw_entry->size > MAX_NVM_FILE_LEN) {
426                 IWL_ERR(mvm, "NVM file too large\n");
427                 ret = -EINVAL;
428                 goto out;
429         }
430
431         eof = fw_entry->data + fw_entry->size;
432         dword_buff = (__le32 *)fw_entry->data;
433
434         /* some NVM file will contain a header.
435          * The header is identified by 2 dwords header as follow:
436          * dword[0] = 0x2A504C54
437          * dword[1] = 0x4E564D2A
438          *
439          * This header must be skipped when providing the NVM data to the FW.
440          */
441         if (fw_entry->size > NVM_HEADER_SIZE &&
442             dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
443             dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
444                 file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE);
445                 IWL_INFO(mvm, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
446                 IWL_INFO(mvm, "NVM Manufacturing date %08X\n",
447                          le32_to_cpu(dword_buff[3]));
448
449                 /* nvm file validation, dword_buff[2] holds the file version */
450                 if ((CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_C_STEP &&
451                      le32_to_cpu(dword_buff[2]) < 0xE4A) ||
452                     (CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_B_STEP &&
453                      le32_to_cpu(dword_buff[2]) >= 0xE4A)) {
454                         ret = -EFAULT;
455                         goto out;
456                 }
457         } else {
458                 file_sec = (void *)fw_entry->data;
459         }
460
461         while (true) {
462                 if (file_sec->data > eof) {
463                         IWL_ERR(mvm,
464                                 "ERROR - NVM file too short for section header\n");
465                         ret = -EINVAL;
466                         break;
467                 }
468
469                 /* check for EOF marker */
470                 if (!file_sec->word1 && !file_sec->word2) {
471                         ret = 0;
472                         break;
473                 }
474
475                 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
476                         section_size =
477                                 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
478                         section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
479                 } else {
480                         section_size = 2 * NVM_WORD2_LEN_FAMILY_8000(
481                                                 le16_to_cpu(file_sec->word2));
482                         section_id = NVM_WORD1_ID_FAMILY_8000(
483                                                 le16_to_cpu(file_sec->word1));
484                 }
485
486                 if (section_size > max_section_size) {
487                         IWL_ERR(mvm, "ERROR - section too large (%d)\n",
488                                 section_size);
489                         ret = -EINVAL;
490                         break;
491                 }
492
493                 if (!section_size) {
494                         IWL_ERR(mvm, "ERROR - section empty\n");
495                         ret = -EINVAL;
496                         break;
497                 }
498
499                 if (file_sec->data + section_size > eof) {
500                         IWL_ERR(mvm,
501                                 "ERROR - NVM file too short for section (%d bytes)\n",
502                                 section_size);
503                         ret = -EINVAL;
504                         break;
505                 }
506
507                 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
508                          "Invalid NVM section ID %d\n", section_id)) {
509                         ret = -EINVAL;
510                         break;
511                 }
512
513                 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
514                 if (!temp) {
515                         ret = -ENOMEM;
516                         break;
517                 }
518
519                 iwl_mvm_nvm_fixups(mvm, section_id, temp, section_size);
520
521                 kfree(mvm->nvm_sections[section_id].data);
522                 mvm->nvm_sections[section_id].data = temp;
523                 mvm->nvm_sections[section_id].length = section_size;
524
525                 /* advance to the next section */
526                 file_sec = (void *)(file_sec->data + section_size);
527         }
528 out:
529         release_firmware(fw_entry);
530         return ret;
531 }
532
533 /* Loads the NVM data stored in mvm->nvm_sections into the NIC */
534 int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
535 {
536         int i, ret = 0;
537         struct iwl_nvm_section *sections = mvm->nvm_sections;
538
539         IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
540
541         for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
542                 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
543                         continue;
544                 ret = iwl_nvm_write_section(mvm, i, sections[i].data,
545                                             sections[i].length);
546                 if (ret < 0) {
547                         IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
548                         break;
549                 }
550         }
551         return ret;
552 }
553
554 int iwl_nvm_init(struct iwl_mvm *mvm, bool read_nvm_from_nic)
555 {
556         int ret, section;
557         u32 size_read = 0;
558         u8 *nvm_buffer, *temp;
559         const char *nvm_file_B = mvm->cfg->default_nvm_file_B_step;
560         const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step;
561
562         if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
563                 return -EINVAL;
564
565         /* load NVM values from nic */
566         if (read_nvm_from_nic) {
567                 /* Read From FW NVM */
568                 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
569
570                 nvm_buffer = kmalloc(mvm->cfg->base_params->eeprom_size,
571                                      GFP_KERNEL);
572                 if (!nvm_buffer)
573                         return -ENOMEM;
574                 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
575                         /* we override the constness for initial read */
576                         ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
577                                                    size_read);
578                         if (ret < 0)
579                                 continue;
580                         size_read += ret;
581                         temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
582                         if (!temp) {
583                                 ret = -ENOMEM;
584                                 break;
585                         }
586
587                         iwl_mvm_nvm_fixups(mvm, section, temp, ret);
588
589                         mvm->nvm_sections[section].data = temp;
590                         mvm->nvm_sections[section].length = ret;
591
592 #ifdef CONFIG_IWLWIFI_DEBUGFS
593                         switch (section) {
594                         case NVM_SECTION_TYPE_SW:
595                                 mvm->nvm_sw_blob.data = temp;
596                                 mvm->nvm_sw_blob.size  = ret;
597                                 break;
598                         case NVM_SECTION_TYPE_CALIBRATION:
599                                 mvm->nvm_calib_blob.data = temp;
600                                 mvm->nvm_calib_blob.size  = ret;
601                                 break;
602                         case NVM_SECTION_TYPE_PRODUCTION:
603                                 mvm->nvm_prod_blob.data = temp;
604                                 mvm->nvm_prod_blob.size  = ret;
605                                 break;
606                         case NVM_SECTION_TYPE_PHY_SKU:
607                                 mvm->nvm_phy_sku_blob.data = temp;
608                                 mvm->nvm_phy_sku_blob.size  = ret;
609                                 break;
610                         default:
611                                 if (section == mvm->cfg->nvm_hw_section_num) {
612                                         mvm->nvm_hw_blob.data = temp;
613                                         mvm->nvm_hw_blob.size = ret;
614                                         break;
615                                 }
616                         }
617 #endif
618                 }
619                 if (!size_read)
620                         IWL_ERR(mvm, "OTP is blank\n");
621                 kfree(nvm_buffer);
622         }
623
624         /* Only if PNVM selected in the mod param - load external NVM  */
625         if (mvm->nvm_file_name) {
626                 /* read External NVM file from the mod param */
627                 ret = iwl_mvm_read_external_nvm(mvm);
628                 if (ret) {
629                         /* choose the nvm_file name according to the
630                          * HW step
631                          */
632                         if (CSR_HW_REV_STEP(mvm->trans->hw_rev) ==
633                             SILICON_B_STEP)
634                                 mvm->nvm_file_name = nvm_file_B;
635                         else
636                                 mvm->nvm_file_name = nvm_file_C;
637
638                         if ((ret == -EFAULT || ret == -ENOENT) &&
639                             mvm->nvm_file_name) {
640                                 /* in case nvm file was failed try again */
641                                 ret = iwl_mvm_read_external_nvm(mvm);
642                                 if (ret)
643                                         return ret;
644                         } else {
645                                 return ret;
646                         }
647                 }
648         }
649
650         /* parse the relevant nvm sections */
651         mvm->nvm_data = iwl_parse_nvm_sections(mvm);
652         if (!mvm->nvm_data)
653                 return -ENODATA;
654         IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
655                          mvm->nvm_data->nvm_version);
656
657         return 0;
658 }
659
660 struct iwl_mcc_update_resp *
661 iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
662                    enum iwl_mcc_source src_id)
663 {
664         struct iwl_mcc_update_cmd mcc_update_cmd = {
665                 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
666                 .source_id = (u8)src_id,
667         };
668         struct iwl_mcc_update_resp *resp_cp;
669         struct iwl_rx_packet *pkt;
670         struct iwl_host_cmd cmd = {
671                 .id = MCC_UPDATE_CMD,
672                 .flags = CMD_WANT_SKB,
673                 .data = { &mcc_update_cmd },
674         };
675
676         int ret;
677         u32 status;
678         int resp_len, n_channels;
679         u16 mcc;
680         bool resp_v2 = fw_has_capa(&mvm->fw->ucode_capa,
681                                    IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V2);
682
683         if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
684                 return ERR_PTR(-EOPNOTSUPP);
685
686         cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
687         if (!resp_v2)
688                 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd_v1);
689
690         IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
691                       alpha2[0], alpha2[1], src_id);
692
693         ret = iwl_mvm_send_cmd(mvm, &cmd);
694         if (ret)
695                 return ERR_PTR(ret);
696
697         pkt = cmd.resp_pkt;
698
699         /* Extract MCC response */
700         if (resp_v2) {
701                 struct iwl_mcc_update_resp *mcc_resp = (void *)pkt->data;
702
703                 n_channels =  __le32_to_cpu(mcc_resp->n_channels);
704                 resp_len = sizeof(struct iwl_mcc_update_resp) +
705                            n_channels * sizeof(__le32);
706                 resp_cp = kmemdup(mcc_resp, resp_len, GFP_KERNEL);
707         } else {
708                 struct iwl_mcc_update_resp_v1 *mcc_resp_v1 = (void *)pkt->data;
709
710                 n_channels =  __le32_to_cpu(mcc_resp_v1->n_channels);
711                 resp_len = sizeof(struct iwl_mcc_update_resp) +
712                            n_channels * sizeof(__le32);
713                 resp_cp = kzalloc(resp_len, GFP_KERNEL);
714
715                 if (resp_cp) {
716                         resp_cp->status = mcc_resp_v1->status;
717                         resp_cp->mcc = mcc_resp_v1->mcc;
718                         resp_cp->cap = mcc_resp_v1->cap;
719                         resp_cp->source_id = mcc_resp_v1->source_id;
720                         resp_cp->n_channels = mcc_resp_v1->n_channels;
721                         memcpy(resp_cp->channels, mcc_resp_v1->channels,
722                                n_channels * sizeof(__le32));
723                 }
724         }
725
726         if (!resp_cp) {
727                 ret = -ENOMEM;
728                 goto exit;
729         }
730
731         status = le32_to_cpu(resp_cp->status);
732
733         mcc = le16_to_cpu(resp_cp->mcc);
734
735         /* W/A for a FW/NVM issue - returns 0x00 for the world domain */
736         if (mcc == 0) {
737                 mcc = 0x3030;  /* "00" - world */
738                 resp_cp->mcc = cpu_to_le16(mcc);
739         }
740
741         IWL_DEBUG_LAR(mvm,
742                       "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') n_chans: %d\n",
743                       status, mcc, mcc >> 8, mcc & 0xff, n_channels);
744
745 exit:
746         iwl_free_resp(&cmd);
747         if (ret)
748                 return ERR_PTR(ret);
749         return resp_cp;
750 }
751
752 int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
753 {
754         bool tlv_lar;
755         bool nvm_lar;
756         int retval;
757         struct ieee80211_regdomain *regd;
758         char mcc[3];
759
760         if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_8000) {
761                 tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
762                                       IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
763                 nvm_lar = mvm->nvm_data->lar_enabled;
764                 if (tlv_lar != nvm_lar)
765                         IWL_INFO(mvm,
766                                  "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
767                                  tlv_lar ? "enabled" : "disabled",
768                                  nvm_lar ? "enabled" : "disabled");
769         }
770
771         if (!iwl_mvm_is_lar_supported(mvm))
772                 return 0;
773
774         /*
775          * try to replay the last set MCC to FW. If it doesn't exist,
776          * queue an update to cfg80211 to retrieve the default alpha2 from FW.
777          */
778         retval = iwl_mvm_init_fw_regd(mvm);
779         if (retval != -ENOENT)
780                 return retval;
781
782         /*
783          * Driver regulatory hint for initial update, this also informs the
784          * firmware we support wifi location updates.
785          * Disallow scans that might crash the FW while the LAR regdomain
786          * is not set.
787          */
788         mvm->lar_regdom_set = false;
789
790         regd = iwl_mvm_get_current_regdomain(mvm, NULL);
791         if (IS_ERR_OR_NULL(regd))
792                 return -EIO;
793
794         if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
795             !iwl_get_bios_mcc(mvm->dev, mcc)) {
796                 kfree(regd);
797                 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
798                                              MCC_SOURCE_BIOS, NULL);
799                 if (IS_ERR_OR_NULL(regd))
800                         return -EIO;
801         }
802
803         retval = regulatory_set_wiphy_regd_sync_rtnl(mvm->hw->wiphy, regd);
804         kfree(regd);
805         return retval;
806 }
807
808 void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
809                                 struct iwl_rx_cmd_buffer *rxb)
810 {
811         struct iwl_rx_packet *pkt = rxb_addr(rxb);
812         struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
813         enum iwl_mcc_source src;
814         char mcc[3];
815         struct ieee80211_regdomain *regd;
816
817         lockdep_assert_held(&mvm->mutex);
818
819         if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
820                 return;
821
822         mcc[0] = notif->mcc >> 8;
823         mcc[1] = notif->mcc & 0xff;
824         mcc[2] = '\0';
825         src = notif->source_id;
826
827         IWL_DEBUG_LAR(mvm,
828                       "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
829                       mcc, src);
830         regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL);
831         if (IS_ERR_OR_NULL(regd))
832                 return;
833
834         regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
835         kfree(regd);
836 }