2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/kernel.h>
22 #include <linux/spinlock.h>
23 #include <linux/skbuff.h>
24 #include <linux/leds.h>
25 #include <linux/usb.h>
26 #include <net/mac80211.h>
29 #define MT_TX_RING_SIZE 256
30 #define MT_MCU_RING_SIZE 32
31 #define MT_RX_BUF_SIZE 2048
37 u32 (*rr)(struct mt76_dev *dev, u32 offset);
38 void (*wr)(struct mt76_dev *dev, u32 offset, u32 val);
39 u32 (*rmw)(struct mt76_dev *dev, u32 offset, u32 mask, u32 val);
40 void (*copy)(struct mt76_dev *dev, u32 offset, const void *data,
45 MT_TXQ_VO = IEEE80211_AC_VO,
46 MT_TXQ_VI = IEEE80211_AC_VI,
47 MT_TXQ_BE = IEEE80211_AC_BE,
48 MT_TXQ_BK = IEEE80211_AC_BK,
62 struct mt76_queue_buf {
74 struct mt76_queue_entry {
80 struct mt76_txwi_cache *txwi;
81 struct mt76u_buf ubuf;
86 struct mt76_queue_regs {
91 } __packed __aligned(4);
94 struct mt76_queue_regs __iomem *regs;
97 struct mt76_queue_entry *entry;
98 struct mt76_desc *desc;
100 struct list_head swq;
114 struct sk_buff *rx_head;
117 struct mt76_queue_ops {
118 int (*init)(struct mt76_dev *dev);
120 int (*alloc)(struct mt76_dev *dev, struct mt76_queue *q);
122 int (*add_buf)(struct mt76_dev *dev, struct mt76_queue *q,
123 struct mt76_queue_buf *buf, int nbufs, u32 info,
124 struct sk_buff *skb, void *txwi);
126 int (*tx_queue_skb)(struct mt76_dev *dev, struct mt76_queue *q,
127 struct sk_buff *skb, struct mt76_wcid *wcid,
128 struct ieee80211_sta *sta);
130 void *(*dequeue)(struct mt76_dev *dev, struct mt76_queue *q, bool flush,
131 int *len, u32 *info, bool *more);
133 void (*rx_reset)(struct mt76_dev *dev, enum mt76_rxq_id qid);
135 void (*tx_cleanup)(struct mt76_dev *dev, enum mt76_txq_id qid,
138 void (*kick)(struct mt76_dev *dev, struct mt76_queue *q);
141 enum mt76_wcid_flags {
142 MT_WCID_FLAG_CHECK_PS,
147 struct mt76_rx_tid __rcu *aggr[IEEE80211_NUM_TIDS];
149 struct work_struct aggr_work;
159 u8 rx_key_pn[IEEE80211_NUM_TIDS][6];
169 struct list_head list;
170 struct mt76_queue *hwq;
171 struct mt76_wcid *wcid;
173 struct sk_buff_head retry_q;
180 struct mt76_txwi_cache {
183 struct list_head list;
188 struct rcu_head rcu_head;
190 struct mt76_dev *dev;
193 struct delayed_work reorder_work;
199 u8 started:1, stopped:1, timer_pending:1;
201 struct sk_buff *reorder_buf[];
205 MT76_STATE_INITIALIZED,
207 MT76_STATE_MCU_RUNNING,
221 struct mt76_driver_ops {
224 void (*update_survey)(struct mt76_dev *dev);
226 int (*tx_prepare_skb)(struct mt76_dev *dev, void *txwi_ptr,
227 struct sk_buff *skb, struct mt76_queue *q,
228 struct mt76_wcid *wcid,
229 struct ieee80211_sta *sta, u32 *tx_info);
231 void (*tx_complete_skb)(struct mt76_dev *dev, struct mt76_queue *q,
232 struct mt76_queue_entry *e, bool flush);
234 bool (*tx_status_data)(struct mt76_dev *dev, u8 *update);
236 void (*rx_skb)(struct mt76_dev *dev, enum mt76_rxq_id q,
237 struct sk_buff *skb);
239 void (*rx_poll_complete)(struct mt76_dev *dev, enum mt76_rxq_id q);
241 void (*sta_ps)(struct mt76_dev *dev, struct ieee80211_sta *sta,
245 struct mt76_channel_state {
251 struct ieee80211_supported_band sband;
252 struct mt76_channel_state *chan;
256 #define MT_VEND_TYPE_EEPROM BIT(31)
257 #define MT_VEND_TYPE_CFG BIT(30)
258 #define MT_VEND_TYPE_MASK (MT_VEND_TYPE_EEPROM | MT_VEND_TYPE_CFG)
260 #define MT_VEND_ADDR(type, n) (MT_VEND_TYPE_##type | (n))
262 MT_VEND_DEV_MODE = 0x1,
264 MT_VEND_MULTI_WRITE = 0x6,
265 MT_VEND_MULTI_READ = 0x7,
266 MT_VEND_READ_EEPROM = 0x9,
267 MT_VEND_WRITE_FCE = 0x42,
268 MT_VEND_WRITE_CFG = 0x46,
269 MT_VEND_READ_CFG = 0x47,
279 MT_EP_OUT_INBAND_CMD,
288 #define MT_SG_MAX_SIZE 8
289 #define MT_NUM_TX_ENTRIES 256
290 #define MT_NUM_RX_ENTRIES 128
291 #define MCU_RESP_URB_SIZE 1024
293 struct mutex usb_ctrl_mtx;
296 struct tasklet_struct rx_tasklet;
297 struct tasklet_struct tx_tasklet;
298 struct delayed_work stat_work;
300 u8 out_ep[__MT_EP_OUT_MAX];
302 u8 in_ep[__MT_EP_IN_MAX];
307 struct completion cmpl;
308 struct mt76u_buf res;
314 struct ieee80211_hw *hw;
315 struct cfg80211_chan_def chandef;
316 struct ieee80211_channel *main_chan;
320 const struct mt76_bus_ops *bus;
321 const struct mt76_driver_ops *drv;
325 struct net_device napi_dev;
327 struct napi_struct napi[__MT_RXQ_MAX];
328 struct sk_buff_head rx_skb[__MT_RXQ_MAX];
330 struct list_head txwi_cache;
331 struct mt76_queue q_tx[__MT_TXQ_MAX];
332 struct mt76_queue q_rx[__MT_RXQ_MAX];
333 const struct mt76_queue_ops *queue_ops;
335 wait_queue_head_t tx_wait;
337 u8 macaddr[ETH_ALEN];
343 struct mt76_sband sband_2g;
344 struct mt76_sband sband_5g;
345 struct debugfs_blob_wrapper eeprom;
346 struct debugfs_blob_wrapper otp;
347 struct mt76_hw_cap cap;
351 struct led_classdev led_cdev;
367 struct mt76_rate_power {
379 struct mt76_rx_status {
380 struct mt76_wcid *wcid;
382 unsigned long reorder_time;
399 s8 chain_signal[IEEE80211_MAX_CHAINS];
402 #define mt76_rr(dev, ...) (dev)->mt76.bus->rr(&((dev)->mt76), __VA_ARGS__)
403 #define mt76_wr(dev, ...) (dev)->mt76.bus->wr(&((dev)->mt76), __VA_ARGS__)
404 #define mt76_rmw(dev, ...) (dev)->mt76.bus->rmw(&((dev)->mt76), __VA_ARGS__)
405 #define mt76_wr_copy(dev, ...) (dev)->mt76.bus->copy(&((dev)->mt76), __VA_ARGS__)
407 #define mt76_set(dev, offset, val) mt76_rmw(dev, offset, 0, val)
408 #define mt76_clear(dev, offset, val) mt76_rmw(dev, offset, val, 0)
410 #define mt76_get_field(_dev, _reg, _field) \
411 FIELD_GET(_field, mt76_rr(dev, _reg))
413 #define mt76_rmw_field(_dev, _reg, _field, _val) \
414 mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))
416 #define mt76_hw(dev) (dev)->mt76.hw
418 bool __mt76_poll(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
421 #define mt76_poll(dev, ...) __mt76_poll(&((dev)->mt76), __VA_ARGS__)
423 bool __mt76_poll_msec(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
426 #define mt76_poll_msec(dev, ...) __mt76_poll_msec(&((dev)->mt76), __VA_ARGS__)
428 void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs);
430 static inline u16 mt76_chip(struct mt76_dev *dev)
432 return dev->rev >> 16;
435 static inline u16 mt76_rev(struct mt76_dev *dev)
437 return dev->rev & 0xffff;
440 #define mt76xx_chip(dev) mt76_chip(&((dev)->mt76))
441 #define mt76xx_rev(dev) mt76_rev(&((dev)->mt76))
443 #define mt76_init_queues(dev) (dev)->mt76.queue_ops->init(&((dev)->mt76))
444 #define mt76_queue_alloc(dev, ...) (dev)->mt76.queue_ops->alloc(&((dev)->mt76), __VA_ARGS__)
445 #define mt76_queue_add_buf(dev, ...) (dev)->mt76.queue_ops->add_buf(&((dev)->mt76), __VA_ARGS__)
446 #define mt76_queue_rx_reset(dev, ...) (dev)->mt76.queue_ops->rx_reset(&((dev)->mt76), __VA_ARGS__)
447 #define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__)
448 #define mt76_queue_kick(dev, ...) (dev)->mt76.queue_ops->kick(&((dev)->mt76), __VA_ARGS__)
450 static inline struct mt76_channel_state *
451 mt76_channel_state(struct mt76_dev *dev, struct ieee80211_channel *c)
453 struct mt76_sband *msband;
456 if (c->band == NL80211_BAND_2GHZ)
457 msband = &dev->sband_2g;
459 msband = &dev->sband_5g;
461 idx = c - &msband->sband.channels[0];
462 return &msband->chan[idx];
465 struct mt76_dev *mt76_alloc_device(unsigned int size,
466 const struct ieee80211_ops *ops);
467 int mt76_register_device(struct mt76_dev *dev, bool vht,
468 struct ieee80211_rate *rates, int n_rates);
469 void mt76_unregister_device(struct mt76_dev *dev);
471 struct dentry *mt76_register_debugfs(struct mt76_dev *dev);
473 int mt76_eeprom_init(struct mt76_dev *dev, int len);
474 void mt76_eeprom_override(struct mt76_dev *dev);
476 /* increment with wrap-around */
477 static inline int mt76_incr(int val, int size)
479 return (val + 1) & (size - 1);
482 /* decrement with wrap-around */
483 static inline int mt76_decr(int val, int size)
485 return (val - 1) & (size - 1);
488 /* Hardware uses mirrored order of queues with Q3
489 * having the highest priority
491 static inline u8 q2hwq(u8 q)
496 static inline struct ieee80211_txq *
497 mtxq_to_txq(struct mt76_txq *mtxq)
501 return container_of(ptr, struct ieee80211_txq, drv_priv);
504 static inline struct ieee80211_sta *
505 wcid_to_sta(struct mt76_wcid *wcid)
509 if (!wcid || !wcid->sta)
512 return container_of(ptr, struct ieee80211_sta, drv_priv);
515 int mt76_dma_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q,
516 struct sk_buff *skb, struct mt76_wcid *wcid,
517 struct ieee80211_sta *sta);
519 void mt76_rx(struct mt76_dev *dev, enum mt76_rxq_id q, struct sk_buff *skb);
520 void mt76_tx(struct mt76_dev *dev, struct ieee80211_sta *sta,
521 struct mt76_wcid *wcid, struct sk_buff *skb);
522 void mt76_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq);
523 void mt76_txq_remove(struct mt76_dev *dev, struct ieee80211_txq *txq);
524 void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq);
525 void mt76_stop_tx_queues(struct mt76_dev *dev, struct ieee80211_sta *sta,
527 void mt76_txq_schedule(struct mt76_dev *dev, struct mt76_queue *hwq);
528 void mt76_txq_schedule_all(struct mt76_dev *dev);
529 void mt76_release_buffered_frames(struct ieee80211_hw *hw,
530 struct ieee80211_sta *sta,
531 u16 tids, int nframes,
532 enum ieee80211_frame_release_type reason,
534 void mt76_set_channel(struct mt76_dev *dev);
535 int mt76_get_survey(struct ieee80211_hw *hw, int idx,
536 struct survey_info *survey);
537 void mt76_set_stream_caps(struct mt76_dev *dev, bool vht);
539 int mt76_rx_aggr_start(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid,
541 void mt76_rx_aggr_stop(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid);
543 void mt76_wcid_key_setup(struct mt76_dev *dev, struct mt76_wcid *wcid,
544 struct ieee80211_key_conf *key);
547 void mt76_tx_free(struct mt76_dev *dev);
548 struct mt76_txwi_cache *mt76_get_txwi(struct mt76_dev *dev);
549 void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t);
550 void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames,
551 struct napi_struct *napi);
552 void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q,
553 struct napi_struct *napi);
554 void mt76_rx_aggr_reorder(struct sk_buff *skb, struct sk_buff_head *frames);
557 static inline bool mt76u_urb_error(struct urb *urb)
559 return urb->status &&
560 urb->status != -ECONNRESET &&
561 urb->status != -ESHUTDOWN &&
562 urb->status != -ENOENT;
565 /* Map hardware queues to usb endpoints */
566 static inline u8 q2ep(u8 qid)
568 /* TODO: take management packets to queue 5 */
572 static inline bool mt76u_check_sg(struct mt76_dev *dev)
574 struct usb_interface *intf = to_usb_interface(dev->dev);
575 struct usb_device *udev = interface_to_usbdev(intf);
577 return (udev->bus->sg_tablesize > 0 &&
578 (udev->bus->no_sg_constraint ||
579 udev->speed == USB_SPEED_WIRELESS));
582 int mt76u_vendor_request(struct mt76_dev *dev, u8 req,
583 u8 req_type, u16 val, u16 offset,
584 void *buf, size_t len);
585 void mt76u_single_wr(struct mt76_dev *dev, const u8 req,
586 const u16 offset, const u32 val);
587 u32 mt76u_rr(struct mt76_dev *dev, u32 addr);
588 void mt76u_wr(struct mt76_dev *dev, u32 addr, u32 val);
589 int mt76u_init(struct mt76_dev *dev, struct usb_interface *intf);
590 void mt76u_deinit(struct mt76_dev *dev);
591 int mt76u_buf_alloc(struct mt76_dev *dev, struct mt76u_buf *buf,
592 int nsgs, int len, int sglen, gfp_t gfp);
593 void mt76u_buf_free(struct mt76u_buf *buf);
594 int mt76u_submit_buf(struct mt76_dev *dev, int dir, int index,
595 struct mt76u_buf *buf, gfp_t gfp,
596 usb_complete_t complete_fn, void *context);
597 int mt76u_submit_rx_buffers(struct mt76_dev *dev);
598 int mt76u_alloc_queues(struct mt76_dev *dev);
599 void mt76u_stop_queues(struct mt76_dev *dev);
600 void mt76u_stop_stat_wk(struct mt76_dev *dev);
601 void mt76u_queues_deinit(struct mt76_dev *dev);
602 int mt76u_skb_dma_info(struct sk_buff *skb, int port, u32 flags);
604 int mt76u_mcu_fw_send_data(struct mt76_dev *dev, const void *data,
605 int data_len, u32 max_payload, u32 offset);
606 void mt76u_mcu_complete_urb(struct urb *urb);
607 struct sk_buff *mt76u_mcu_msg_alloc(const void *data, int len);
608 int mt76u_mcu_send_msg(struct mt76_dev *dev, struct sk_buff *skb,
609 int cmd, bool wait_resp);
610 void mt76u_mcu_fw_reset(struct mt76_dev *dev);
611 int mt76u_mcu_init_rx(struct mt76_dev *dev);