2 * (c) Copyright 2002-2010, Ralink Technology, Inc.
3 * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
4 * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
5 * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2
9 * as published by the Free Software Foundation
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/kernel.h>
18 #include <linux/firmware.h>
19 #include <linux/delay.h>
20 #include <linux/usb.h>
21 #include <linux/skbuff.h>
29 #define MCU_FW_URB_MAX_PAYLOAD 0x38f8
30 #define MCU_FW_URB_SIZE (MCU_FW_URB_MAX_PAYLOAD + 12)
31 #define MCU_RESP_URB_SIZE 1024
33 static inline int firmware_running(struct mt76x0_dev *dev)
35 return mt76_rr(dev, MT_MCU_COM_REG0) == 1;
38 static inline void skb_put_le32(struct sk_buff *skb, u32 val)
40 put_unaligned_le32(val, skb_put(skb, 4));
43 static inline void mt76x0_dma_skb_wrap_cmd(struct sk_buff *skb,
44 u8 seq, enum mcu_cmd cmd)
46 WARN_ON(mt76x0_dma_skb_wrap(skb, CPU_TX_PORT, DMA_COMMAND,
47 FIELD_PREP(MT_TXD_CMD_SEQ, seq) |
48 FIELD_PREP(MT_TXD_CMD_TYPE, cmd)));
51 static inline void trace_mt76x0_mcu_msg_send_cs(struct mt76_dev *dev,
52 struct sk_buff *skb, bool need_resp)
56 for (i = 0; i < skb->len / 4; i++)
57 csum ^= get_unaligned_le32(skb->data + i * 4);
59 trace_mt76x0_mcu_msg_send(dev, skb, csum, need_resp);
62 static struct sk_buff *
63 mt76x0_mcu_msg_alloc(struct mt76x0_dev *dev, const void *data, int len)
67 WARN_ON(len % 4); /* if length is not divisible by 4 we need to pad */
69 skb = alloc_skb(len + MT_DMA_HDR_LEN + 4, GFP_KERNEL);
71 skb_reserve(skb, MT_DMA_HDR_LEN);
72 memcpy(skb_put(skb, len), data, len);
77 static void mt76x0_read_resp_regs(struct mt76x0_dev *dev, int len)
80 int n = dev->mcu.reg_pairs_len;
81 u8 *buf = dev->mcu.resp.buf;
86 if (dev->mcu.burst_read) {
87 u32 reg = dev->mcu.reg_pairs[0].reg - dev->mcu.reg_base;
89 WARN_ON_ONCE(len/4 != n);
90 for (i = 0; i < n; i++) {
91 u32 val = get_unaligned_le32(buf + 4*i);
93 dev->mcu.reg_pairs[i].reg = reg++;
94 dev->mcu.reg_pairs[i].value = val;
97 WARN_ON_ONCE(len/8 != n);
98 for (i = 0; i < n; i++) {
99 u32 reg = get_unaligned_le32(buf + 8*i) - dev->mcu.reg_base;
100 u32 val = get_unaligned_le32(buf + 8*i + 4);
102 WARN_ON_ONCE(dev->mcu.reg_pairs[i].reg != reg);
103 dev->mcu.reg_pairs[i].value = val;
108 static int mt76x0_mcu_wait_resp(struct mt76x0_dev *dev, u8 seq)
110 struct urb *urb = dev->mcu.resp.urb;
112 int urb_status, ret, try = 5;
115 if (!wait_for_completion_timeout(&dev->mcu.resp_cmpl,
116 msecs_to_jiffies(300))) {
117 dev_warn(dev->mt76.dev, "Warning: %s retrying\n", __func__);
121 /* Make copies of important data before reusing the urb */
122 rxfce = get_unaligned_le32(dev->mcu.resp.buf);
123 urb_status = urb->status * mt76x0_urb_has_error(urb);
125 if (urb_status == 0 && dev->mcu.reg_pairs)
126 mt76x0_read_resp_regs(dev, urb->actual_length);
128 ret = mt76x0_usb_submit_buf(dev, USB_DIR_IN, MT_EP_IN_CMD_RESP,
129 &dev->mcu.resp, GFP_KERNEL,
131 &dev->mcu.resp_cmpl);
136 dev_err(dev->mt76.dev, "Error: MCU resp urb failed:%d\n",
139 if (FIELD_GET(MT_RXD_CMD_INFO_CMD_SEQ, rxfce) == seq &&
140 FIELD_GET(MT_RXD_CMD_INFO_EVT_TYPE, rxfce) == CMD_DONE)
143 dev_err(dev->mt76.dev, "Error: MCU resp evt:%lx seq:%hhx-%lx!\n",
144 FIELD_GET(MT_RXD_CMD_INFO_EVT_TYPE, rxfce),
145 seq, FIELD_GET(MT_RXD_CMD_INFO_CMD_SEQ, rxfce));
148 dev_err(dev->mt76.dev, "Error: %s timed out\n", __func__);
153 __mt76x0_mcu_msg_send(struct mt76x0_dev *dev, struct sk_buff *skb,
154 enum mcu_cmd cmd, bool wait_resp)
156 struct usb_device *usb_dev = mt76x0_to_usb_dev(dev);
157 unsigned cmd_pipe = usb_sndbulkpipe(usb_dev,
158 dev->out_ep[MT_EP_OUT_INBAND_CMD]);
164 seq = ++dev->mcu.msg_seq & 0xf;
166 mt76x0_dma_skb_wrap_cmd(skb, seq, cmd);
168 if (dev->mcu.resp_cmpl.done)
169 dev_err(dev->mt76.dev, "Error: MCU response pre-completed!\n");
171 trace_mt76x0_mcu_msg_send_cs(&dev->mt76, skb, wait_resp);
172 trace_mt76x0_submit_urb_sync(&dev->mt76, cmd_pipe, skb->len);
174 ret = usb_bulk_msg(usb_dev, cmd_pipe, skb->data, skb->len, &sent, 500);
176 dev_err(dev->mt76.dev, "Error: send MCU cmd failed:%d\n", ret);
179 if (sent != skb->len)
180 dev_err(dev->mt76.dev, "Error: %s sent != skb->len\n", __func__);
183 ret = mt76x0_mcu_wait_resp(dev, seq);
190 mt76x0_mcu_msg_send(struct mt76x0_dev *dev, struct sk_buff *skb,
191 enum mcu_cmd cmd, bool wait_resp)
195 if (test_bit(MT76_REMOVED, &dev->mt76.state))
198 mutex_lock(&dev->mcu.mutex);
199 ret = __mt76x0_mcu_msg_send(dev, skb, cmd, wait_resp);
200 mutex_unlock(&dev->mcu.mutex);
207 int mt76x0_mcu_function_select(struct mt76x0_dev *dev,
208 enum mcu_function func, u32 val)
214 } __packed __aligned(4) msg = {
215 .id = cpu_to_le32(func),
216 .value = cpu_to_le32(val),
219 skb = mt76x0_mcu_msg_alloc(dev, &msg, sizeof(msg));
222 return mt76x0_mcu_msg_send(dev, skb, CMD_FUN_SET_OP, func == 5);
226 mt76x0_mcu_calibrate(struct mt76x0_dev *dev, enum mcu_calibrate cal, u32 val)
232 } __packed __aligned(4) msg = {
233 .id = cpu_to_le32(cal),
234 .value = cpu_to_le32(val),
237 skb = mt76x0_mcu_msg_alloc(dev, &msg, sizeof(msg));
240 return mt76x0_mcu_msg_send(dev, skb, CMD_CALIBRATION_OP, true);
243 int mt76x0_write_reg_pairs(struct mt76x0_dev *dev, u32 base,
244 const struct mt76_reg_pair *data, int n)
246 const int max_vals_per_cmd = INBAND_PACKET_MAX_LEN / 8;
253 cnt = min(max_vals_per_cmd, n);
255 skb = alloc_skb(cnt * 8 + MT_DMA_HDR_LEN + 4, GFP_KERNEL);
258 skb_reserve(skb, MT_DMA_HDR_LEN);
260 for (i = 0; i < cnt; i++) {
261 skb_put_le32(skb, base + data[i].reg);
262 skb_put_le32(skb, data[i].value);
265 ret = mt76x0_mcu_msg_send(dev, skb, CMD_RANDOM_WRITE, cnt == n);
269 return mt76x0_write_reg_pairs(dev, base, data + cnt, n - cnt);
272 int mt76x0_read_reg_pairs(struct mt76x0_dev *dev, u32 base,
273 struct mt76_reg_pair *data, int n)
275 const int max_vals_per_cmd = INBAND_PACKET_MAX_LEN / 8;
282 cnt = min(max_vals_per_cmd, n);
286 skb = alloc_skb(cnt * 8 + MT_DMA_HDR_LEN + 4, GFP_KERNEL);
289 skb_reserve(skb, MT_DMA_HDR_LEN);
291 for (i = 0; i < cnt; i++) {
292 skb_put_le32(skb, base + data[i].reg);
293 skb_put_le32(skb, data[i].value);
296 mutex_lock(&dev->mcu.mutex);
298 dev->mcu.reg_pairs = data;
299 dev->mcu.reg_pairs_len = n;
300 dev->mcu.reg_base = base;
301 dev->mcu.burst_read = false;
303 ret = __mt76x0_mcu_msg_send(dev, skb, CMD_RANDOM_READ, true);
305 dev->mcu.reg_pairs = NULL;
307 mutex_unlock(&dev->mcu.mutex);
315 int mt76x0_burst_write_regs(struct mt76x0_dev *dev, u32 offset,
316 const u32 *data, int n)
318 const int max_regs_per_cmd = INBAND_PACKET_MAX_LEN / 4 - 1;
325 cnt = min(max_regs_per_cmd, n);
327 skb = alloc_skb(cnt * 4 + MT_DMA_HDR_LEN + 4, GFP_KERNEL);
330 skb_reserve(skb, MT_DMA_HDR_LEN);
332 skb_put_le32(skb, MT_MCU_MEMMAP_WLAN + offset);
333 for (i = 0; i < cnt; i++)
334 skb_put_le32(skb, data[i]);
336 ret = mt76x0_mcu_msg_send(dev, skb, CMD_BURST_WRITE, cnt == n);
340 return mt76x0_burst_write_regs(dev, offset + cnt * 4,
341 data + cnt, n - cnt);
345 static int mt76x0_burst_read_regs(struct mt76x0_dev *dev, u32 base,
346 struct mt76_reg_pair *data, int n)
348 const int max_vals_per_cmd = INBAND_PACKET_MAX_LEN / 4 - 1;
355 cnt = min(max_vals_per_cmd, n);
359 skb = alloc_skb(cnt * 4 + MT_DMA_HDR_LEN + 4, GFP_KERNEL);
362 skb_reserve(skb, MT_DMA_HDR_LEN);
364 skb_put_le32(skb, base + data[0].reg);
365 skb_put_le32(skb, n);
367 mutex_lock(&dev->mcu.mutex);
369 dev->mcu.reg_pairs = data;
370 dev->mcu.reg_pairs_len = n;
371 dev->mcu.reg_base = base;
372 dev->mcu.burst_read = true;
374 ret = __mt76x0_mcu_msg_send(dev, skb, CMD_BURST_READ, true);
376 dev->mcu.reg_pairs = NULL;
378 mutex_unlock(&dev->mcu.mutex);
386 struct mt76_fw_header {
396 struct mt76_fw_header hdr;
397 u8 ivb[MT_MCU_IVB_SIZE];
401 static int __mt76x0_dma_fw(struct mt76x0_dev *dev,
402 const struct mt76x0_dma_buf *dma_buf,
403 const void *data, u32 len, u32 dst_addr)
405 DECLARE_COMPLETION_ONSTACK(cmpl);
406 struct mt76x0_dma_buf buf = *dma_buf; /* we need to fake length */
411 reg = cpu_to_le32(FIELD_PREP(MT_TXD_INFO_TYPE, DMA_COMMAND) |
412 FIELD_PREP(MT_TXD_INFO_D_PORT, CPU_TX_PORT) |
413 FIELD_PREP(MT_TXD_INFO_LEN, len));
414 memcpy(buf.buf, ®, sizeof(reg));
415 memcpy(buf.buf + sizeof(reg), data, len);
416 memset(buf.buf + sizeof(reg) + len, 0, 8);
418 ret = mt76x0_vendor_single_wr(dev, MT_VEND_WRITE_FCE,
419 MT_FCE_DMA_ADDR, dst_addr);
422 len = roundup(len, 4);
423 ret = mt76x0_vendor_single_wr(dev, MT_VEND_WRITE_FCE,
424 MT_FCE_DMA_LEN, len << 16);
428 buf.len = MT_DMA_HDR_LEN + len + 4;
429 ret = mt76x0_usb_submit_buf(dev, USB_DIR_OUT, MT_EP_OUT_INBAND_CMD,
431 mt76x0_complete_urb, &cmpl);
435 if (!wait_for_completion_timeout(&cmpl, msecs_to_jiffies(1000))) {
436 dev_err(dev->mt76.dev, "Error: firmware upload timed out\n");
437 usb_kill_urb(buf.urb);
440 if (mt76x0_urb_has_error(buf.urb)) {
441 dev_err(dev->mt76.dev, "Error: firmware upload urb failed:%d\n",
443 return buf.urb->status;
446 val = mt76_rr(dev, MT_TX_CPU_FROM_FCE_CPU_DESC_IDX);
448 mt76_wr(dev, MT_TX_CPU_FROM_FCE_CPU_DESC_IDX, val);
456 mt76x0_dma_fw(struct mt76x0_dev *dev, struct mt76x0_dma_buf *dma_buf,
457 const void *data, int len, u32 dst_addr)
464 n = min(MCU_FW_URB_MAX_PAYLOAD, len);
465 ret = __mt76x0_dma_fw(dev, dma_buf, data, n, dst_addr);
470 if (!mt76_poll_msec(dev, MT_MCU_COM_REG1, BIT(31), BIT(31), 500))
474 return mt76x0_dma_fw(dev, dma_buf, data + n, len - n, dst_addr + n);
478 mt76x0_upload_firmware(struct mt76x0_dev *dev, const struct mt76_fw *fw)
480 struct mt76x0_dma_buf dma_buf;
482 u32 ilm_len, dlm_len;
485 ivb = kmemdup(fw->ivb, sizeof(fw->ivb), GFP_KERNEL);
488 if (mt76x0_usb_alloc_buf(dev, MCU_FW_URB_SIZE, &dma_buf)) {
493 ilm_len = le32_to_cpu(fw->hdr.ilm_len) - sizeof(fw->ivb);
494 dev_dbg(dev->mt76.dev, "loading FW - ILM %u + IVB %zu\n",
495 ilm_len, sizeof(fw->ivb));
496 ret = mt76x0_dma_fw(dev, &dma_buf, fw->ilm, ilm_len, sizeof(fw->ivb));
500 dlm_len = le32_to_cpu(fw->hdr.dlm_len);
501 dev_dbg(dev->mt76.dev, "loading FW - DLM %u\n", dlm_len);
502 ret = mt76x0_dma_fw(dev, &dma_buf, fw->ilm + ilm_len,
503 dlm_len, MT_MCU_DLM_OFFSET);
507 ret = mt76x0_vendor_request(dev, MT_VEND_DEV_MODE, USB_DIR_OUT,
508 0x12, 0, ivb, sizeof(fw->ivb));
513 for (i = 100; i && !firmware_running(dev); i--)
520 dev_dbg(dev->mt76.dev, "Firmware running!\n");
523 mt76x0_usb_free_buf(dev, &dma_buf);
528 static int mt76x0_load_firmware(struct mt76x0_dev *dev)
530 const struct firmware *fw;
531 const struct mt76_fw_header *hdr;
535 mt76_wr(dev, MT_USB_DMA_CFG, (MT_USB_DMA_CFG_RX_BULK_EN |
536 MT_USB_DMA_CFG_TX_BULK_EN));
538 if (firmware_running(dev))
541 ret = reject_firmware(&fw, MT7610_FIRMWARE, dev->mt76.dev);
545 if (!fw || !fw->data || fw->size < sizeof(*hdr))
548 hdr = (const struct mt76_fw_header *) fw->data;
550 if (le32_to_cpu(hdr->ilm_len) <= MT_MCU_IVB_SIZE)
554 len += le32_to_cpu(hdr->ilm_len);
555 len += le32_to_cpu(hdr->dlm_len);
560 val = le16_to_cpu(hdr->fw_ver);
561 dev_dbg(dev->mt76.dev,
562 "Firmware Version: %d.%d.%02d Build: %x Build time: %.16s\n",
563 (val >> 12) & 0xf, (val >> 8) & 0xf, val & 0xf,
564 le16_to_cpu(hdr->build_ver), hdr->build_time);
566 len = le32_to_cpu(hdr->ilm_len);
568 mt76_wr(dev, 0x1004, 0x2c);
570 mt76_set(dev, MT_USB_DMA_CFG, (MT_USB_DMA_CFG_RX_BULK_EN |
571 MT_USB_DMA_CFG_TX_BULK_EN) |
572 FIELD_PREP(MT_USB_DMA_CFG_RX_BULK_AGG_TOUT, 0x20));
573 mt76x0_vendor_reset(dev);
576 mt76x0_rmw(dev, MT_PBF_CFG, 0, (MT_PBF_CFG_TX0Q_EN |
579 MT_PBF_CFG_TX3Q_EN));
582 mt76_wr(dev, MT_FCE_PSE_CTRL, 1);
584 /* FCE tx_fs_base_ptr */
585 mt76_wr(dev, MT_TX_CPU_FROM_FCE_BASE_PTR, 0x400230);
586 /* FCE tx_fs_max_cnt */
587 mt76_wr(dev, MT_TX_CPU_FROM_FCE_MAX_COUNT, 1);
588 /* FCE pdma enable */
589 mt76_wr(dev, MT_FCE_PDMA_GLOBAL_CONF, 0x44);
591 mt76_wr(dev, MT_FCE_SKIP_FS, 3);
593 val = mt76_rr(dev, MT_USB_DMA_CFG);
594 val |= MT_USB_DMA_CFG_TX_WL_DROP;
595 mt76_wr(dev, MT_USB_DMA_CFG, val);
596 val &= ~MT_USB_DMA_CFG_TX_WL_DROP;
597 mt76_wr(dev, MT_USB_DMA_CFG, val);
599 ret = mt76x0_upload_firmware(dev, (const struct mt76_fw *)fw->data);
600 release_firmware(fw);
602 mt76_wr(dev, MT_FCE_PSE_CTRL, 1);
607 dev_err(dev->mt76.dev, "Invalid firmware image\n");
608 release_firmware(fw);
612 int mt76x0_mcu_init(struct mt76x0_dev *dev)
616 mutex_init(&dev->mcu.mutex);
618 ret = mt76x0_load_firmware(dev);
622 set_bit(MT76_STATE_MCU_RUNNING, &dev->mt76.state);
627 int mt76x0_mcu_cmd_init(struct mt76x0_dev *dev)
631 ret = mt76x0_mcu_function_select(dev, Q_SELECT, 1);
635 init_completion(&dev->mcu.resp_cmpl);
636 if (mt76x0_usb_alloc_buf(dev, MCU_RESP_URB_SIZE, &dev->mcu.resp)) {
637 mt76x0_usb_free_buf(dev, &dev->mcu.resp);
641 ret = mt76x0_usb_submit_buf(dev, USB_DIR_IN, MT_EP_IN_CMD_RESP,
642 &dev->mcu.resp, GFP_KERNEL,
643 mt76x0_complete_urb, &dev->mcu.resp_cmpl);
645 mt76x0_usb_free_buf(dev, &dev->mcu.resp);
652 void mt76x0_mcu_cmd_deinit(struct mt76x0_dev *dev)
654 usb_kill_urb(dev->mcu.resp.urb);
655 mt76x0_usb_free_buf(dev, &dev->mcu.resp);