drivers/net/wireless/realtek/rtlwifi/pci.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2012  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * The full GNU General Public License is included in this distribution in the
  15  * file called LICENSE.
  16  *
  17  * Contact Information:
  18  * wlanfae <wlanfae@realtek.com>
  19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20  * Hsinchu 300, Taiwan.
  21  *
  22  * Larry Finger <Larry.Finger@lwfinger.net>
  23  *
  24  *****************************************************************************/
  25
  26 #include "wifi.h"
  27 #include "core.h"
  28 #include "pci.h"
  29 #include "base.h"
  30 #include "ps.h"
  31 #include "efuse.h"
  32 #include <linux/interrupt.h>
  33 #include <linux/export.h>
  34 #include <linux/kmemleak.h>
  35 #include <linux/module.h>
  36
  37 MODULE_AUTHOR("lizhaoming       <chaoming_li@realsil.com.cn>");
  38 MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
  39 MODULE_AUTHOR("Larry Finger     <Larry.FInger@lwfinger.net>");
  40 MODULE_LICENSE("GPL");
  41 MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
  42
  43 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  44         INTEL_VENDOR_ID,
  45         ATI_VENDOR_ID,
  46         AMD_VENDOR_ID,
  47         SIS_VENDOR_ID
  48 };
  49
  50 static const u8 ac_to_hwq[] = {
  51         VO_QUEUE,
  52         VI_QUEUE,
  53         BE_QUEUE,
  54         BK_QUEUE
  55 };
  56
  57 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
  58                        struct sk_buff *skb)
  59 {
  60         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  61         __le16 fc = rtl_get_fc(skb);
  62         u8 queue_index = skb_get_queue_mapping(skb);
  63
  64         if (unlikely(ieee80211_is_beacon(fc)))
  65                 return BEACON_QUEUE;
  66         if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  67                 return MGNT_QUEUE;
  68         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  69                 if (ieee80211_is_nullfunc(fc))
  70                         return HIGH_QUEUE;
  71
  72         return ac_to_hwq[queue_index];
  73 }
  74
  75 /* Update PCI dependent default settings*/
  76 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  77 {
  78         struct rtl_priv *rtlpriv = rtl_priv(hw);
  79         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  80         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  81         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  82         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  83         u8 init_aspm;
  84
  85         ppsc->reg_rfps_level = 0;
  86         ppsc->support_aspm = false;
  87
  88         /*Update PCI ASPM setting */
  89         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  90         switch (rtlpci->const_pci_aspm) {
  91         case 0:
  92                 /*No ASPM */
  93                 break;
  94
  95         case 1:
  96                 /*ASPM dynamically enabled/disable. */
  97                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
  98                 break;
  99
 100         case 2:
 101                 /*ASPM with Clock Req dynamically enabled/disable. */
 102                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
 103                                          RT_RF_OFF_LEVL_CLK_REQ);
 104                 break;
 105
 106         case 3:
 107                 /*
 108                  * Always enable ASPM and Clock Req
 109                  * from initialization to halt.
 110                  * */
 111                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 112                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 113                                          RT_RF_OFF_LEVL_CLK_REQ);
 114                 break;
 115
 116         case 4:
 117                 /*
 118                  * Always enable ASPM without Clock Req
 119                  * from initialization to halt.
 120                  * */
 121                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 122                                           RT_RF_OFF_LEVL_CLK_REQ);
 123                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 124                 break;
 125         }
 126
 127         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 128
 129         /*Update Radio OFF setting */
 130         switch (rtlpci->const_hwsw_rfoff_d3) {
 131         case 1:
 132                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 133                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 134                 break;
 135
 136         case 2:
 137                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 138                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 139                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 140                 break;
 141
 142         case 3:
 143                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 144                 break;
 145         }
 146
 147         /*Set HW definition to determine if it supports ASPM. */
 148         switch (rtlpci->const_support_pciaspm) {
 149         case 0:{
 150                         /*Not support ASPM. */
 151                         bool support_aspm = false;
 152                         ppsc->support_aspm = support_aspm;
 153                         break;
 154                 }
 155         case 1:{
 156                         /*Support ASPM. */
 157                         bool support_aspm = true;
 158                         bool support_backdoor = true;
 159                         ppsc->support_aspm = support_aspm;
 160
 161                         /*if (priv->oem_id == RT_CID_TOSHIBA &&
 162                            !priv->ndis_adapter.amd_l1_patch)
 163                            support_backdoor = false; */
 164
 165                         ppsc->support_backdoor = support_backdoor;
 166
 167                         break;
 168                 }
 169         case 2:
 170                 /*ASPM value set by chipset. */
 171                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
 172                         bool support_aspm = true;
 173                         ppsc->support_aspm = support_aspm;
 174                 }
 175                 break;
 176         default:
 177                 pr_err("switch case %#x not processed\n",
 178                        rtlpci->const_support_pciaspm);
 179                 break;
 180         }
 181
 182         /* toshiba aspm issue, toshiba will set aspm selfly
 183          * so we should not set aspm in driver */
 184         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 185         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 186                 init_aspm == 0x43)
 187                 ppsc->support_aspm = false;
 188 }
 189
 190 static bool _rtl_pci_platform_switch_device_pci_aspm(
 191                         struct ieee80211_hw *hw,
 192                         u8 value)
 193 {
 194         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 195         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 196
 197         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 198                 value |= 0x40;
 199
 200         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 201
 202         return false;
 203 }
 204
 205 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 206 static void _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 207 {
 208         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 209         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 210
 211         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 212
 213         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 214                 udelay(100);
 215 }
 216
 217 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 218 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 219 {
 220         struct rtl_priv *rtlpriv = rtl_priv(hw);
 221         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 222         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 223         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 224         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 225         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 226         /*Retrieve original configuration settings. */
 227         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 228         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 229                                 pcibridge_linkctrlreg;
 230         u16 aspmlevel = 0;
 231         u8 tmp_u1b = 0;
 232
 233         if (!ppsc->support_aspm)
 234                 return;
 235
 236         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 237                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 238                          "PCI(Bridge) UNKNOWN\n");
 239
 240                 return;
 241         }
 242
 243         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 244                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 245                 _rtl_pci_switch_clk_req(hw, 0x0);
 246         }
 247
 248         /*for promising device will in L0 state after an I/O. */
 249         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 250
 251         /*Set corresponding value. */
 252         aspmlevel |= BIT(0) | BIT(1);
 253         linkctrl_reg &= ~aspmlevel;
 254         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 255
 256         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 257         udelay(50);
 258
 259         /*4 Disable Pci Bridge ASPM */
 260         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 261                               pcibridge_linkctrlreg);
 262
 263         udelay(50);
 264 }
 265
 266 /*
 267  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 268  *power saving We should follow the sequence to enable
 269  *RTL8192SE first then enable Pci Bridge ASPM
 270  *or the system will show bluescreen.
 271  */
 272 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 273 {
 274         struct rtl_priv *rtlpriv = rtl_priv(hw);
 275         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 276         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 277         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 278         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 279         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 280         u16 aspmlevel;
 281         u8 u_pcibridge_aspmsetting;
 282         u8 u_device_aspmsetting;
 283
 284         if (!ppsc->support_aspm)
 285                 return;
 286
 287         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 288                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 289                          "PCI(Bridge) UNKNOWN\n");
 290                 return;
 291         }
 292
 293         /*4 Enable Pci Bridge ASPM */
 294
 295         u_pcibridge_aspmsetting =
 296             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 297             rtlpci->const_hostpci_aspm_setting;
 298
 299         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 300                 u_pcibridge_aspmsetting &= ~BIT(0);
 301
 302         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 303                               u_pcibridge_aspmsetting);
 304
 305         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 306                  "PlatformEnableASPM(): Write reg[%x] = %x\n",
 307                  (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 308                  u_pcibridge_aspmsetting);
 309
 310         udelay(50);
 311
 312         /*Get ASPM level (with/without Clock Req) */
 313         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 314         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 315
 316         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 317         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 318
 319         u_device_aspmsetting |= aspmlevel;
 320
 321         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 322
 323         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 324                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 325                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 326                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 327         }
 328         udelay(100);
 329 }
 330
 331 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 332 {
 333         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 334
 335         bool status = false;
 336         u8 offset_e0;
 337         unsigned offset_e4;
 338
 339         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 340
 341         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 342
 343         if (offset_e0 == 0xA0) {
 344                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 345                 if (offset_e4 & BIT(23))
 346                         status = true;
 347         }
 348
 349         return status;
 350 }
 351
 352 static bool rtl_pci_check_buddy_priv(struct ieee80211_hw *hw,
 353                                      struct rtl_priv **buddy_priv)
 354 {
 355         struct rtl_priv *rtlpriv = rtl_priv(hw);
 356         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 357         bool find_buddy_priv = false;
 358         struct rtl_priv *tpriv;
 359         struct rtl_pci_priv *tpcipriv = NULL;
 360
 361         if (!list_empty(&rtlpriv->glb_var->glb_priv_list)) {
 362                 list_for_each_entry(tpriv, &rtlpriv->glb_var->glb_priv_list,
 363                                     list) {
 364                         tpcipriv = (struct rtl_pci_priv *)tpriv->priv;
 365                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 366                                  "pcipriv->ndis_adapter.funcnumber %x\n",
 367                                 pcipriv->ndis_adapter.funcnumber);
 368                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 369                                  "tpcipriv->ndis_adapter.funcnumber %x\n",
 370                                 tpcipriv->ndis_adapter.funcnumber);
 371
 372                         if ((pcipriv->ndis_adapter.busnumber ==
 373                              tpcipriv->ndis_adapter.busnumber) &&
 374                             (pcipriv->ndis_adapter.devnumber ==
 375                             tpcipriv->ndis_adapter.devnumber) &&
 376                             (pcipriv->ndis_adapter.funcnumber !=
 377                             tpcipriv->ndis_adapter.funcnumber)) {
 378                                 find_buddy_priv = true;
 379                                 break;
 380                         }
 381                 }
 382         }
 383
 384         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 385                  "find_buddy_priv %d\n", find_buddy_priv);
 386
 387         if (find_buddy_priv)
 388                 *buddy_priv = tpriv;
 389
 390         return find_buddy_priv;
 391 }
 392
 393 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 394 {
 395         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 396         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 397         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 398         u8 linkctrl_reg;
 399         u8 num4bbytes;
 400
 401         num4bbytes = (capabilityoffset + 0x10) / 4;
 402
 403         /*Read  Link Control Register */
 404         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 405
 406         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 407 }
 408
 409 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 410                 struct ieee80211_hw *hw)
 411 {
 412         struct rtl_priv *rtlpriv = rtl_priv(hw);
 413         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 414
 415         u8 tmp;
 416         u16 linkctrl_reg;
 417
 418         /*Link Control Register */
 419         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
 420         pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
 421
 422         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
 423                  pcipriv->ndis_adapter.linkctrl_reg);
 424
 425         pci_read_config_byte(pdev, 0x98, &tmp);
 426         tmp |= BIT(4);
 427         pci_write_config_byte(pdev, 0x98, tmp);
 428
 429         tmp = 0x17;
 430         pci_write_config_byte(pdev, 0x70f, tmp);
 431 }
 432
 433 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 434 {
 435         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 436
 437         _rtl_pci_update_default_setting(hw);
 438
 439         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 440                 /*Always enable ASPM & Clock Req. */
 441                 rtl_pci_enable_aspm(hw);
 442                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 443         }
 444
 445 }
 446
 447 static void _rtl_pci_io_handler_init(struct device *dev,
 448                                      struct ieee80211_hw *hw)
 449 {
 450         struct rtl_priv *rtlpriv = rtl_priv(hw);
 451
 452         rtlpriv->io.dev = dev;
 453
 454         rtlpriv->io.write8_async = pci_write8_async;
 455         rtlpriv->io.write16_async = pci_write16_async;
 456         rtlpriv->io.write32_async = pci_write32_async;
 457
 458         rtlpriv->io.read8_sync = pci_read8_sync;
 459         rtlpriv->io.read16_sync = pci_read16_sync;
 460         rtlpriv->io.read32_sync = pci_read32_sync;
 461
 462 }
 463
 464 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 465                 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
 466 {
 467         struct rtl_priv *rtlpriv = rtl_priv(hw);
 468         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 469         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 470         struct sk_buff *next_skb;
 471         u8 additionlen = FCS_LEN;
 472
 473         /* here open is 4, wep/tkip is 8, aes is 12*/
 474         if (info->control.hw_key)
 475                 additionlen += info->control.hw_key->icv_len;
 476
 477         /* The most skb num is 6 */
 478         tcb_desc->empkt_num = 0;
 479         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 480         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 481                 struct ieee80211_tx_info *next_info;
 482
 483                 next_info = IEEE80211_SKB_CB(next_skb);
 484                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 485                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 486                                 next_skb->len + additionlen;
 487                         tcb_desc->empkt_num++;
 488                 } else {
 489                         break;
 490                 }
 491
 492                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 493                                       next_skb))
 494                         break;
 495
 496                 if (tcb_desc->empkt_num >= rtlhal->max_earlymode_num)
 497                         break;
 498         }
 499         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 500
 501         return true;
 502 }
 503
 504 /* just for early mode now */
 505 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 506 {
 507         struct rtl_priv *rtlpriv = rtl_priv(hw);
 508         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 509         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 510         struct sk_buff *skb = NULL;
 511         struct ieee80211_tx_info *info = NULL;
 512         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 513         int tid;
 514
 515         if (!rtlpriv->rtlhal.earlymode_enable)
 516                 return;
 517
 518         if (rtlpriv->dm.supp_phymode_switch &&
 519             (rtlpriv->easy_concurrent_ctl.switch_in_process ||
 520             (rtlpriv->buddy_priv &&
 521             rtlpriv->buddy_priv->easy_concurrent_ctl.switch_in_process)))
 522                 return;
 523         /* we juse use em for BE/BK/VI/VO */
 524         for (tid = 7; tid >= 0; tid--) {
 525                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(tid)];
 526                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 527                 while (!mac->act_scanning &&
 528                        rtlpriv->psc.rfpwr_state == ERFON) {
 529                         struct rtl_tcb_desc tcb_desc;
 530                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 531
 532                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 533                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 534                             (ring->entries - skb_queue_len(&ring->queue) >
 535                              rtlhal->max_earlymode_num)) {
 536                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 537                         } else {
 538                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 539                                 break;
 540                         }
 541                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 542
 543                         /* Some macaddr can't do early mode. like
 544                          * multicast/broadcast/no_qos data */
 545                         info = IEEE80211_SKB_CB(skb);
 546                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 547                                 _rtl_update_earlymode_info(hw, skb,
 548                                                            &tcb_desc, tid);
 549
 550                         rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
 551                 }
 552         }
 553 }
 554
 555
 556 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 557 {
 558         struct rtl_priv *rtlpriv = rtl_priv(hw);
 559         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 560
 561         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 562
 563         while (skb_queue_len(&ring->queue)) {
 564                 struct sk_buff *skb;
 565                 struct ieee80211_tx_info *info;
 566                 __le16 fc;
 567                 u8 tid;
 568                 u8 *entry;
 569
 570                 if (rtlpriv->use_new_trx_flow)
 571                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
 572                 else
 573                         entry = (u8 *)(&ring->desc[ring->idx]);
 574
 575                 if (rtlpriv->cfg->ops->get_available_desc &&
 576                     rtlpriv->cfg->ops->get_available_desc(hw, prio) <= 1) {
 577                         RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_DMESG,
 578                                  "no available desc!\n");
 579                         return;
 580                 }
 581
 582                 if (!rtlpriv->cfg->ops->is_tx_desc_closed(hw, prio, ring->idx))
 583                         return;
 584                 ring->idx = (ring->idx + 1) % ring->entries;
 585
 586                 skb = __skb_dequeue(&ring->queue);
 587                 pci_unmap_single(rtlpci->pdev,
 588                                  rtlpriv->cfg->ops->
 589                                              get_desc((u8 *)entry, true,
 590                                                       HW_DESC_TXBUFF_ADDR),
 591                                  skb->len, PCI_DMA_TODEVICE);
 592
 593                 /* remove early mode header */
 594                 if (rtlpriv->rtlhal.earlymode_enable)
 595                         skb_pull(skb, EM_HDR_LEN);
 596
 597                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 598                          "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
 599                          ring->idx,
 600                          skb_queue_len(&ring->queue),
 601                          *(u16 *)(skb->data + 22));
 602
 603                 if (prio == TXCMD_QUEUE) {
 604                         dev_kfree_skb(skb);
 605                         goto tx_status_ok;
 606
 607                 }
 608
 609                 /* for sw LPS, just after NULL skb send out, we can
 610                  * sure AP knows we are sleeping, we should not let
 611                  * rf sleep
 612                  */
 613                 fc = rtl_get_fc(skb);
 614                 if (ieee80211_is_nullfunc(fc)) {
 615                         if (ieee80211_has_pm(fc)) {
 616                                 rtlpriv->mac80211.offchan_delay = true;
 617                                 rtlpriv->psc.state_inap = true;
 618                         } else {
 619                                 rtlpriv->psc.state_inap = false;
 620                         }
 621                 }
 622                 if (ieee80211_is_action(fc)) {
 623                         struct ieee80211_mgmt *action_frame =
 624                                 (struct ieee80211_mgmt *)skb->data;
 625                         if (action_frame->u.action.u.ht_smps.action ==
 626                             WLAN_HT_ACTION_SMPS) {
 627                                 dev_kfree_skb(skb);
 628                                 goto tx_status_ok;
 629                         }
 630                 }
 631
 632                 /* update tid tx pkt num */
 633                 tid = rtl_get_tid(skb);
 634                 if (tid <= 7)
 635                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 636
 637                 info = IEEE80211_SKB_CB(skb);
 638                 ieee80211_tx_info_clear_status(info);
 639
 640                 info->flags |= IEEE80211_TX_STAT_ACK;
 641                 /*info->status.rates[0].count = 1; */
 642
 643                 ieee80211_tx_status_irqsafe(hw, skb);
 644
 645                 if ((ring->entries - skb_queue_len(&ring->queue)) <= 4) {
 646
 647                         RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG,
 648                                  "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%x\n",
 649                                  prio, ring->idx,
 650                                  skb_queue_len(&ring->queue));
 651
 652                         ieee80211_wake_queue(hw,
 653                                         skb_get_queue_mapping
 654                                         (skb));
 655                 }
 656 tx_status_ok:
 657                 skb = NULL;
 658         }
 659
 660         if (((rtlpriv->link_info.num_rx_inperiod +
 661               rtlpriv->link_info.num_tx_inperiod) > 8) ||
 662               (rtlpriv->link_info.num_rx_inperiod > 2))
 663                 rtl_lps_leave(hw);
 664 }
 665
 666 static int _rtl_pci_init_one_rxdesc(struct ieee80211_hw *hw,
 667                                     struct sk_buff *new_skb, u8 *entry,
 668                                     int rxring_idx, int desc_idx)
 669 {
 670         struct rtl_priv *rtlpriv = rtl_priv(hw);
 671         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 672         u32 bufferaddress;
 673         u8 tmp_one = 1;
 674         struct sk_buff *skb;
 675
 676         if (likely(new_skb)) {
 677                 skb = new_skb;
 678                 goto remap;
 679         }
 680         skb = dev_alloc_skb(rtlpci->rxbuffersize);
 681         if (!skb)
 682                 return 0;
 683
 684 remap:
 685         /* just set skb->cb to mapping addr for pci_unmap_single use */
 686         *((dma_addr_t *)skb->cb) =
 687                 pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 688                                rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 689         bufferaddress = *((dma_addr_t *)skb->cb);
 690         if (pci_dma_mapping_error(rtlpci->pdev, bufferaddress))
 691                 return 0;
 692         rtlpci->rx_ring[rxring_idx].rx_buf[desc_idx] = skb;
 693         if (rtlpriv->use_new_trx_flow) {
 694                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 695                                             HW_DESC_RX_PREPARE,
 696                                             (u8 *)&bufferaddress);
 697         } else {
 698                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 699                                             HW_DESC_RXBUFF_ADDR,
 700                                             (u8 *)&bufferaddress);
 701                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 702                                             HW_DESC_RXPKT_LEN,
 703                                             (u8 *)&rtlpci->rxbuffersize);
 704                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 705                                             HW_DESC_RXOWN,
 706                                             (u8 *)&tmp_one);
 707         }
 708         return 1;
 709 }
 710
 711 /* inorder to receive 8K AMSDU we have set skb to
 712  * 9100bytes in init rx ring, but if this packet is
 713  * not a AMSDU, this large packet will be sent to
 714  * TCP/IP directly, this cause big packet ping fail
 715  * like: "ping -s 65507", so here we will realloc skb
 716  * based on the true size of packet, Mac80211
 717  * Probably will do it better, but does not yet.
 718  *
 719  * Some platform will fail when alloc skb sometimes.
 720  * in this condition, we will send the old skb to
 721  * mac80211 directly, this will not cause any other
 722  * issues, but only this packet will be lost by TCP/IP
 723  */
 724 static void _rtl_pci_rx_to_mac80211(struct ieee80211_hw *hw,
 725                                     struct sk_buff *skb,
 726                                     struct ieee80211_rx_status rx_status)
 727 {
 728         if (unlikely(!rtl_action_proc(hw, skb, false))) {
 729                 dev_kfree_skb_any(skb);
 730         } else {
 731                 struct sk_buff *uskb = NULL;
 732
 733                 uskb = dev_alloc_skb(skb->len + 128);
 734                 if (likely(uskb)) {
 735                         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status,
 736                                sizeof(rx_status));
 737                         skb_put_data(uskb, skb->data, skb->len);
 738                         dev_kfree_skb_any(skb);
 739                         ieee80211_rx_irqsafe(hw, uskb);
 740                 } else {
 741                         ieee80211_rx_irqsafe(hw, skb);
 742                 }
 743         }
 744 }
 745
 746 /*hsisr interrupt handler*/
 747 static void _rtl_pci_hs_interrupt(struct ieee80211_hw *hw)
 748 {
 749         struct rtl_priv *rtlpriv = rtl_priv(hw);
 750         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 751
 752         rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR],
 753                        rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR]) |
 754                        rtlpci->sys_irq_mask);
 755 }
 756
 757 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 758 {
 759         struct rtl_priv *rtlpriv = rtl_priv(hw);
 760         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 761         int rxring_idx = RTL_PCI_RX_MPDU_QUEUE;
 762         struct ieee80211_rx_status rx_status = { 0 };
 763         unsigned int count = rtlpci->rxringcount;
 764         u8 own;
 765         u8 tmp_one;
 766         bool unicast = false;
 767         u8 hw_queue = 0;
 768         unsigned int rx_remained_cnt;
 769         struct rtl_stats stats = {
 770                 .signal = 0,
 771                 .rate = 0,
 772         };
 773
 774         /*RX NORMAL PKT */
 775         while (count--) {
 776                 struct ieee80211_hdr *hdr;
 777                 __le16 fc;
 778                 u16 len;
 779                 /*rx buffer descriptor */
 780                 struct rtl_rx_buffer_desc *buffer_desc = NULL;
 781                 /*if use new trx flow, it means wifi info */
 782                 struct rtl_rx_desc *pdesc = NULL;
 783                 /*rx pkt */
 784                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[
 785                                       rtlpci->rx_ring[rxring_idx].idx];
 786                 struct sk_buff *new_skb;
 787
 788                 if (rtlpriv->use_new_trx_flow) {
 789                         rx_remained_cnt =
 790                                 rtlpriv->cfg->ops->rx_desc_buff_remained_cnt(hw,
 791                                                                       hw_queue);
 792                         if (rx_remained_cnt == 0)
 793                                 return;
 794                         buffer_desc = &rtlpci->rx_ring[rxring_idx].buffer_desc[
 795                                 rtlpci->rx_ring[rxring_idx].idx];
 796                         pdesc = (struct rtl_rx_desc *)skb->data;
 797                 } else {        /* rx descriptor */
 798                         pdesc = &rtlpci->rx_ring[rxring_idx].desc[
 799                                 rtlpci->rx_ring[rxring_idx].idx];
 800
 801                         own = (u8)rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
 802                                                               false,
 803                                                               HW_DESC_OWN);
 804                         if (own) /* wait data to be filled by hardware */
 805                                 return;
 806                 }
 807
 808                 /* Reaching this point means: data is filled already
 809                  * AAAAAAttention !!!
 810                  * We can NOT access 'skb' before 'pci_unmap_single'
 811                  */
 812                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
 813                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 814
 815                 /* get a new skb - if fail, old one will be reused */
 816                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 817                 if (unlikely(!new_skb))
 818                         goto no_new;
 819                 memset(&rx_status , 0 , sizeof(rx_status));
 820                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 821                                                  &rx_status, (u8 *)pdesc, skb);
 822
 823                 if (rtlpriv->use_new_trx_flow)
 824                         rtlpriv->cfg->ops->rx_check_dma_ok(hw,
 825                                                            (u8 *)buffer_desc,
 826                                                            hw_queue);
 827
 828                 len = rtlpriv->cfg->ops->get_desc((u8 *)pdesc, false,
 829                                                   HW_DESC_RXPKT_LEN);
 830
 831                 if (skb->end - skb->tail > len) {
 832                         skb_put(skb, len);
 833                         if (rtlpriv->use_new_trx_flow)
 834                                 skb_reserve(skb, stats.rx_drvinfo_size +
 835                                             stats.rx_bufshift + 24);
 836                         else
 837                                 skb_reserve(skb, stats.rx_drvinfo_size +
 838                                             stats.rx_bufshift);
 839                 } else {
 840                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 841                                  "skb->end - skb->tail = %d, len is %d\n",
 842                                  skb->end - skb->tail, len);
 843                         dev_kfree_skb_any(skb);
 844                         goto new_trx_end;
 845                 }
 846                 /* handle command packet here */
 847                 if (rtlpriv->cfg->ops->rx_command_packet &&
 848                     rtlpriv->cfg->ops->rx_command_packet(hw, &stats, skb)) {
 849                                 dev_kfree_skb_any(skb);
 850                                 goto new_trx_end;
 851                 }
 852
 853                 /*
 854                  * NOTICE This can not be use for mac80211,
 855                  * this is done in mac80211 code,
 856                  * if done here sec DHCP will fail
 857                  * skb_trim(skb, skb->len - 4);
 858                  */
 859
 860                 hdr = rtl_get_hdr(skb);
 861                 fc = rtl_get_fc(skb);
 862
 863                 if (!stats.crc && !stats.hwerror) {
 864                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
 865                                sizeof(rx_status));
 866
 867                         if (is_broadcast_ether_addr(hdr->addr1)) {
 868                                 ;/*TODO*/
 869                         } else if (is_multicast_ether_addr(hdr->addr1)) {
 870                                 ;/*TODO*/
 871                         } else {
 872                                 unicast = true;
 873                                 rtlpriv->stats.rxbytesunicast += skb->len;
 874                         }
 875                         rtl_is_special_data(hw, skb, false, true);
 876
 877                         if (ieee80211_is_data(fc)) {
 878                                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 879                                 if (unicast)
 880                                         rtlpriv->link_info.num_rx_inperiod++;
 881                         }
 882
 883                         rtl_collect_scan_list(hw, skb);
 884
 885                         /* static bcn for roaming */
 886                         rtl_beacon_statistic(hw, skb);
 887                         rtl_p2p_info(hw, (void *)skb->data, skb->len);
 888                         /* for sw lps */
 889                         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 890                         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 891                         if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
 892                             (rtlpriv->rtlhal.current_bandtype ==
 893                              BAND_ON_2_4G) &&
 894                             (ieee80211_is_beacon(fc) ||
 895                              ieee80211_is_probe_resp(fc))) {
 896                                 dev_kfree_skb_any(skb);
 897                         } else {
 898                                 _rtl_pci_rx_to_mac80211(hw, skb, rx_status);
 899                         }
 900                 } else {
 901                         dev_kfree_skb_any(skb);
 902                 }
 903 new_trx_end:
 904                 if (rtlpriv->use_new_trx_flow) {
 905                         rtlpci->rx_ring[hw_queue].next_rx_rp += 1;
 906                         rtlpci->rx_ring[hw_queue].next_rx_rp %=
 907                                         RTL_PCI_MAX_RX_COUNT;
 908
 909                         rx_remained_cnt--;
 910                         rtl_write_word(rtlpriv, 0x3B4,
 911                                        rtlpci->rx_ring[hw_queue].next_rx_rp);
 912                 }
 913                 if (((rtlpriv->link_info.num_rx_inperiod +
 914                       rtlpriv->link_info.num_tx_inperiod) > 8) ||
 915                       (rtlpriv->link_info.num_rx_inperiod > 2))
 916                         rtl_lps_leave(hw);
 917                 skb = new_skb;
 918 no_new:
 919                 if (rtlpriv->use_new_trx_flow) {
 920                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)buffer_desc,
 921                                                  rxring_idx,
 922                                                  rtlpci->rx_ring[rxring_idx].idx);
 923                 } else {
 924                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)pdesc,
 925                                                  rxring_idx,
 926                                                  rtlpci->rx_ring[rxring_idx].idx);
 927                         if (rtlpci->rx_ring[rxring_idx].idx ==
 928                             rtlpci->rxringcount - 1)
 929                                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc,
 930                                                             false,
 931                                                             HW_DESC_RXERO,
 932                                                             (u8 *)&tmp_one);
 933                 }
 934                 rtlpci->rx_ring[rxring_idx].idx =
 935                                 (rtlpci->rx_ring[rxring_idx].idx + 1) %
 936                                 rtlpci->rxringcount;
 937         }
 938 }
 939
 940 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 941 {
 942         struct ieee80211_hw *hw = dev_id;
 943         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 944         struct rtl_priv *rtlpriv = rtl_priv(hw);
 945         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 946         unsigned long flags;
 947         u32 inta = 0;
 948         u32 intb = 0;
 949         irqreturn_t ret = IRQ_HANDLED;
 950
 951         if (rtlpci->irq_enabled == 0)
 952                 return ret;
 953
 954         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock , flags);
 955         rtlpriv->cfg->ops->disable_interrupt(hw);
 956
 957         /*read ISR: 4/8bytes */
 958         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
 959
 960         /*Shared IRQ or HW disappared */
 961         if (!inta || inta == 0xffff)
 962                 goto done;
 963
 964         /*<1> beacon related */
 965         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
 966                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 967                          "beacon ok interrupt!\n");
 968         }
 969
 970         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
 971                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 972                          "beacon err interrupt!\n");
 973         }
 974
 975         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
 976                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "beacon interrupt!\n");
 977         }
 978
 979         if (inta & rtlpriv->cfg->maps[RTL_IMR_BCNINT]) {
 980                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 981                          "prepare beacon for interrupt!\n");
 982                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 983         }
 984
 985         /*<2> Tx related */
 986         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 987                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "IMR_TXFOVW!\n");
 988
 989         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 990                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 991                          "Manage ok interrupt!\n");
 992                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
 993         }
 994
 995         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
 996                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 997                          "HIGH_QUEUE ok interrupt!\n");
 998                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
 999         }
1000
1001         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
1002                 rtlpriv->link_info.num_tx_inperiod++;
1003
1004                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1005                          "BK Tx OK interrupt!\n");
1006                 _rtl_pci_tx_isr(hw, BK_QUEUE);
1007         }
1008
1009         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
1010                 rtlpriv->link_info.num_tx_inperiod++;
1011
1012                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1013                          "BE TX OK interrupt!\n");
1014                 _rtl_pci_tx_isr(hw, BE_QUEUE);
1015         }
1016
1017         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
1018                 rtlpriv->link_info.num_tx_inperiod++;
1019
1020                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1021                          "VI TX OK interrupt!\n");
1022                 _rtl_pci_tx_isr(hw, VI_QUEUE);
1023         }
1024
1025         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
1026                 rtlpriv->link_info.num_tx_inperiod++;
1027
1028                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1029                          "Vo TX OK interrupt!\n");
1030                 _rtl_pci_tx_isr(hw, VO_QUEUE);
1031         }
1032
1033         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
1034                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
1035                         rtlpriv->link_info.num_tx_inperiod++;
1036
1037                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1038                                  "CMD TX OK interrupt!\n");
1039                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
1040                 }
1041         }
1042
1043         /*<3> Rx related */
1044         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
1045                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "Rx ok interrupt!\n");
1046                 _rtl_pci_rx_interrupt(hw);
1047         }
1048
1049         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
1050                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1051                          "rx descriptor unavailable!\n");
1052                 _rtl_pci_rx_interrupt(hw);
1053         }
1054
1055         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
1056                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "rx overflow !\n");
1057                 _rtl_pci_rx_interrupt(hw);
1058         }
1059
1060         /*<4> fw related*/
1061         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723AE) {
1062                 if (inta & rtlpriv->cfg->maps[RTL_IMR_C2HCMD]) {
1063                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1064                                  "firmware interrupt!\n");
1065                         queue_delayed_work(rtlpriv->works.rtl_wq,
1066                                            &rtlpriv->works.fwevt_wq, 0);
1067                 }
1068         }
1069
1070         /*<5> hsisr related*/
1071         /* Only 8188EE & 8723BE Supported.
1072          * If Other ICs Come in, System will corrupt,
1073          * because maps[RTL_IMR_HSISR_IND] & maps[MAC_HSISR]
1074          * are not initialized
1075          */
1076         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8188EE ||
1077             rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE) {
1078                 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_HSISR_IND])) {
1079                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1080                                  "hsisr interrupt!\n");
1081                         _rtl_pci_hs_interrupt(hw);
1082                 }
1083         }
1084
1085         if (rtlpriv->rtlhal.earlymode_enable)
1086                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
1087
1088 done:
1089         rtlpriv->cfg->ops->enable_interrupt(hw);
1090         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1091         return ret;
1092 }
1093
1094 static void _rtl_pci_irq_tasklet(unsigned long data)
1095 {
1096         struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
1097         _rtl_pci_tx_chk_waitq(hw);
1098 }
1099
1100 static void _rtl_pci_prepare_bcn_tasklet(unsigned long data)
1101 {
1102         struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
1103         struct rtl_priv *rtlpriv = rtl_priv(hw);
1104         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1105         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1106         struct rtl8192_tx_ring *ring = NULL;
1107         struct ieee80211_hdr *hdr = NULL;
1108         struct ieee80211_tx_info *info = NULL;
1109         struct sk_buff *pskb = NULL;
1110         struct rtl_tx_desc *pdesc = NULL;
1111         struct rtl_tcb_desc tcb_desc;
1112         /*This is for new trx flow*/
1113         struct rtl_tx_buffer_desc *pbuffer_desc = NULL;
1114         u8 temp_one = 1;
1115         u8 *entry;
1116
1117         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
1118         ring = &rtlpci->tx_ring[BEACON_QUEUE];
1119         pskb = __skb_dequeue(&ring->queue);
1120         if (rtlpriv->use_new_trx_flow)
1121                 entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1122         else
1123                 entry = (u8 *)(&ring->desc[ring->idx]);
1124         if (pskb) {
1125                 pci_unmap_single(rtlpci->pdev,
1126                                  rtlpriv->cfg->ops->get_desc(
1127                                  (u8 *)entry, true, HW_DESC_TXBUFF_ADDR),
1128                                  pskb->len, PCI_DMA_TODEVICE);
1129                 kfree_skb(pskb);
1130         }
1131
1132         /*NB: the beacon data buffer must be 32-bit aligned. */
1133         pskb = ieee80211_beacon_get(hw, mac->vif);
1134         if (pskb == NULL)
1135                 return;
1136         hdr = rtl_get_hdr(pskb);
1137         info = IEEE80211_SKB_CB(pskb);
1138         pdesc = &ring->desc[0];
1139         if (rtlpriv->use_new_trx_flow)
1140                 pbuffer_desc = &ring->buffer_desc[0];
1141
1142         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1143                                         (u8 *)pbuffer_desc, info, NULL, pskb,
1144                                         BEACON_QUEUE, &tcb_desc);
1145
1146         __skb_queue_tail(&ring->queue, pskb);
1147
1148         if (rtlpriv->use_new_trx_flow) {
1149                 temp_one = 4;
1150                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pbuffer_desc, true,
1151                                             HW_DESC_OWN, (u8 *)&temp_one);
1152         } else {
1153                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, HW_DESC_OWN,
1154                                             &temp_one);
1155         }
1156         return;
1157 }
1158
1159 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
1160 {
1161         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1162         struct rtl_priv *rtlpriv = rtl_priv(hw);
1163         struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1164         u8 i;
1165         u16 desc_num;
1166
1167         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
1168                 desc_num = TX_DESC_NUM_92E;
1169         else
1170                 desc_num = RT_TXDESC_NUM;
1171
1172         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1173                 rtlpci->txringcount[i] = desc_num;
1174
1175         /*
1176          *we just alloc 2 desc for beacon queue,
1177          *because we just need first desc in hw beacon.
1178          */
1179         rtlpci->txringcount[BEACON_QUEUE] = 2;
1180
1181         /*BE queue need more descriptor for performance
1182          *consideration or, No more tx desc will happen,
1183          *and may cause mac80211 mem leakage.
1184          */
1185         if (!rtl_priv(hw)->use_new_trx_flow)
1186                 rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1187
1188         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
1189         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
1190 }
1191
1192 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1193                 struct pci_dev *pdev)
1194 {
1195         struct rtl_priv *rtlpriv = rtl_priv(hw);
1196         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1197         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1198         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1199
1200         rtlpci->up_first_time = true;
1201         rtlpci->being_init_adapter = false;
1202
1203         rtlhal->hw = hw;
1204         rtlpci->pdev = pdev;
1205
1206         /*Tx/Rx related var */
1207         _rtl_pci_init_trx_var(hw);
1208
1209         /*IBSS*/
1210         mac->beacon_interval = 100;
1211
1212         /*AMPDU*/
1213         mac->min_space_cfg = 0;
1214         mac->max_mss_density = 0;
1215         /*set sane AMPDU defaults */
1216         mac->current_ampdu_density = 7;
1217         mac->current_ampdu_factor = 3;
1218
1219         /*Retry Limit*/
1220         mac->retry_short = 7;
1221         mac->retry_long = 7;
1222
1223         /*QOS*/
1224         rtlpci->acm_method = EACMWAY2_SW;
1225
1226         /*task */
1227         tasklet_init(&rtlpriv->works.irq_tasklet,
1228                      _rtl_pci_irq_tasklet,
1229                      (unsigned long)hw);
1230         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1231                      _rtl_pci_prepare_bcn_tasklet,
1232                      (unsigned long)hw);
1233         INIT_WORK(&rtlpriv->works.lps_change_work,
1234                   rtl_lps_change_work_callback);
1235 }
1236
1237 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1238                                  unsigned int prio, unsigned int entries)
1239 {
1240         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1241         struct rtl_priv *rtlpriv = rtl_priv(hw);
1242         struct rtl_tx_buffer_desc *buffer_desc;
1243         struct rtl_tx_desc *desc;
1244         dma_addr_t buffer_desc_dma, desc_dma;
1245         u32 nextdescaddress;
1246         int i;
1247
1248         /* alloc tx buffer desc for new trx flow*/
1249         if (rtlpriv->use_new_trx_flow) {
1250                 buffer_desc =
1251                    pci_zalloc_consistent(rtlpci->pdev,
1252                                          sizeof(*buffer_desc) * entries,
1253                                          &buffer_desc_dma);
1254
1255                 if (!buffer_desc || (unsigned long)buffer_desc & 0xFF) {
1256                         pr_err("Cannot allocate TX ring (prio = %d)\n",
1257                                prio);
1258                         return -ENOMEM;
1259                 }
1260
1261                 rtlpci->tx_ring[prio].buffer_desc = buffer_desc;
1262                 rtlpci->tx_ring[prio].buffer_desc_dma = buffer_desc_dma;
1263
1264                 rtlpci->tx_ring[prio].cur_tx_rp = 0;
1265                 rtlpci->tx_ring[prio].cur_tx_wp = 0;
1266                 rtlpci->tx_ring[prio].avl_desc = entries;
1267         }
1268
1269         /* alloc dma for this ring */
1270         desc = pci_zalloc_consistent(rtlpci->pdev,
1271                                      sizeof(*desc) * entries, &desc_dma);
1272
1273         if (!desc || (unsigned long)desc & 0xFF) {
1274                 pr_err("Cannot allocate TX ring (prio = %d)\n", prio);
1275                 return -ENOMEM;
1276         }
1277
1278         rtlpci->tx_ring[prio].desc = desc;
1279         rtlpci->tx_ring[prio].dma = desc_dma;
1280
1281         rtlpci->tx_ring[prio].idx = 0;
1282         rtlpci->tx_ring[prio].entries = entries;
1283         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1284
1285         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "queue:%d, ring_addr:%p\n",
1286                  prio, desc);
1287
1288         /* init every desc in this ring */
1289         if (!rtlpriv->use_new_trx_flow) {
1290                 for (i = 0; i < entries; i++) {
1291                         nextdescaddress = (u32)desc_dma +
1292                                           ((i + 1) % entries) *
1293                                           sizeof(*desc);
1294
1295                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)&desc[i],
1296                                                     true,
1297                                                     HW_DESC_TX_NEXTDESC_ADDR,
1298                                                     (u8 *)&nextdescaddress);
1299                 }
1300         }
1301         return 0;
1302 }
1303
1304 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1305 {
1306         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1307         struct rtl_priv *rtlpriv = rtl_priv(hw);
1308         int i;
1309
1310         if (rtlpriv->use_new_trx_flow) {
1311                 struct rtl_rx_buffer_desc *entry = NULL;
1312                 /* alloc dma for this ring */
1313                 rtlpci->rx_ring[rxring_idx].buffer_desc =
1314                     pci_zalloc_consistent(rtlpci->pdev,
1315                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1316                                                  buffer_desc) *
1317                                                  rtlpci->rxringcount,
1318                                           &rtlpci->rx_ring[rxring_idx].dma);
1319                 if (!rtlpci->rx_ring[rxring_idx].buffer_desc ||
1320                     (ulong)rtlpci->rx_ring[rxring_idx].buffer_desc & 0xFF) {
1321                         pr_err("Cannot allocate RX ring\n");
1322                         return -ENOMEM;
1323                 }
1324
1325                 /* init every desc in this ring */
1326                 rtlpci->rx_ring[rxring_idx].idx = 0;
1327                 for (i = 0; i < rtlpci->rxringcount; i++) {
1328                         entry = &rtlpci->rx_ring[rxring_idx].buffer_desc[i];
1329                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1330                                                       rxring_idx, i))
1331                                 return -ENOMEM;
1332                 }
1333         } else {
1334                 struct rtl_rx_desc *entry = NULL;
1335                 u8 tmp_one = 1;
1336                 /* alloc dma for this ring */
1337                 rtlpci->rx_ring[rxring_idx].desc =
1338                     pci_zalloc_consistent(rtlpci->pdev,
1339                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1340                                           desc) * rtlpci->rxringcount,
1341                                           &rtlpci->rx_ring[rxring_idx].dma);
1342                 if (!rtlpci->rx_ring[rxring_idx].desc ||
1343                     (unsigned long)rtlpci->rx_ring[rxring_idx].desc & 0xFF) {
1344                         pr_err("Cannot allocate RX ring\n");
1345                         return -ENOMEM;
1346                 }
1347
1348                 /* init every desc in this ring */
1349                 rtlpci->rx_ring[rxring_idx].idx = 0;
1350
1351                 for (i = 0; i < rtlpci->rxringcount; i++) {
1352                         entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1353                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1354                                                       rxring_idx, i))
1355                                 return -ENOMEM;
1356                 }
1357
1358                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1359                                             HW_DESC_RXERO, &tmp_one);
1360         }
1361         return 0;
1362 }
1363
1364 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1365                 unsigned int prio)
1366 {
1367         struct rtl_priv *rtlpriv = rtl_priv(hw);
1368         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1369         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1370
1371         /* free every desc in this ring */
1372         while (skb_queue_len(&ring->queue)) {
1373                 u8 *entry;
1374                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1375
1376                 if (rtlpriv->use_new_trx_flow)
1377                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1378                 else
1379                         entry = (u8 *)(&ring->desc[ring->idx]);
1380
1381                 pci_unmap_single(rtlpci->pdev,
1382                                  rtlpriv->cfg->
1383                                              ops->get_desc((u8 *)entry, true,
1384                                                    HW_DESC_TXBUFF_ADDR),
1385                                  skb->len, PCI_DMA_TODEVICE);
1386                 kfree_skb(skb);
1387                 ring->idx = (ring->idx + 1) % ring->entries;
1388         }
1389
1390         /* free dma of this ring */
1391         pci_free_consistent(rtlpci->pdev,
1392                             sizeof(*ring->desc) * ring->entries,
1393                             ring->desc, ring->dma);
1394         ring->desc = NULL;
1395         if (rtlpriv->use_new_trx_flow) {
1396                 pci_free_consistent(rtlpci->pdev,
1397                                     sizeof(*ring->buffer_desc) * ring->entries,
1398                                     ring->buffer_desc, ring->buffer_desc_dma);
1399                 ring->buffer_desc = NULL;
1400         }
1401 }
1402
1403 static void _rtl_pci_free_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1404 {
1405         struct rtl_priv *rtlpriv = rtl_priv(hw);
1406         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1407         int i;
1408
1409         /* free every desc in this ring */
1410         for (i = 0; i < rtlpci->rxringcount; i++) {
1411                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[i];
1412
1413                 if (!skb)
1414                         continue;
1415                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
1416                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
1417                 kfree_skb(skb);
1418         }
1419
1420         /* free dma of this ring */
1421         if (rtlpriv->use_new_trx_flow) {
1422                 pci_free_consistent(rtlpci->pdev,
1423                                     sizeof(*rtlpci->rx_ring[rxring_idx].
1424                                     buffer_desc) * rtlpci->rxringcount,
1425                                     rtlpci->rx_ring[rxring_idx].buffer_desc,
1426                                     rtlpci->rx_ring[rxring_idx].dma);
1427                 rtlpci->rx_ring[rxring_idx].buffer_desc = NULL;
1428         } else {
1429                 pci_free_consistent(rtlpci->pdev,
1430                                     sizeof(*rtlpci->rx_ring[rxring_idx].desc) *
1431                                     rtlpci->rxringcount,
1432                                     rtlpci->rx_ring[rxring_idx].desc,
1433                                     rtlpci->rx_ring[rxring_idx].dma);
1434                 rtlpci->rx_ring[rxring_idx].desc = NULL;
1435         }
1436 }
1437
1438 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1439 {
1440         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1441         int ret;
1442         int i, rxring_idx;
1443
1444         /* rxring_idx 0:RX_MPDU_QUEUE
1445          * rxring_idx 1:RX_CMD_QUEUE
1446          */
1447         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1448                 ret = _rtl_pci_init_rx_ring(hw, rxring_idx);
1449                 if (ret)
1450                         return ret;
1451         }
1452
1453         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1454                 ret = _rtl_pci_init_tx_ring(hw, i,
1455                                  rtlpci->txringcount[i]);
1456                 if (ret)
1457                         goto err_free_rings;
1458         }
1459
1460         return 0;
1461
1462 err_free_rings:
1463         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1464                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1465
1466         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1467                 if (rtlpci->tx_ring[i].desc ||
1468                     rtlpci->tx_ring[i].buffer_desc)
1469                         _rtl_pci_free_tx_ring(hw, i);
1470
1471         return 1;
1472 }
1473
1474 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1475 {
1476         u32 i, rxring_idx;
1477
1478         /*free rx rings */
1479         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1480                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1481
1482         /*free tx rings */
1483         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1484                 _rtl_pci_free_tx_ring(hw, i);
1485
1486         return 0;
1487 }
1488
1489 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1490 {
1491         struct rtl_priv *rtlpriv = rtl_priv(hw);
1492         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1493         int i, rxring_idx;
1494         unsigned long flags;
1495         u8 tmp_one = 1;
1496         u32 bufferaddress;
1497         /* rxring_idx 0:RX_MPDU_QUEUE */
1498         /* rxring_idx 1:RX_CMD_QUEUE */
1499         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1500                 /* force the rx_ring[RX_MPDU_QUEUE/
1501                  * RX_CMD_QUEUE].idx to the first one
1502                  *new trx flow, do nothing
1503                 */
1504                 if (!rtlpriv->use_new_trx_flow &&
1505                     rtlpci->rx_ring[rxring_idx].desc) {
1506                         struct rtl_rx_desc *entry = NULL;
1507
1508                         rtlpci->rx_ring[rxring_idx].idx = 0;
1509                         for (i = 0; i < rtlpci->rxringcount; i++) {
1510                                 entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1511                                 bufferaddress =
1512                                   rtlpriv->cfg->ops->get_desc((u8 *)entry,
1513                                   false , HW_DESC_RXBUFF_ADDR);
1514                                 memset((u8 *)entry , 0 ,
1515                                        sizeof(*rtlpci->rx_ring
1516                                        [rxring_idx].desc));/*clear one entry*/
1517                                 if (rtlpriv->use_new_trx_flow) {
1518                                         rtlpriv->cfg->ops->set_desc(hw,
1519                                             (u8 *)entry, false,
1520                                             HW_DESC_RX_PREPARE,
1521                                             (u8 *)&bufferaddress);
1522                                 } else {
1523                                         rtlpriv->cfg->ops->set_desc(hw,
1524                                             (u8 *)entry, false,
1525                                             HW_DESC_RXBUFF_ADDR,
1526                                             (u8 *)&bufferaddress);
1527                                         rtlpriv->cfg->ops->set_desc(hw,
1528                                             (u8 *)entry, false,
1529                                             HW_DESC_RXPKT_LEN,
1530                                             (u8 *)&rtlpci->rxbuffersize);
1531                                         rtlpriv->cfg->ops->set_desc(hw,
1532                                             (u8 *)entry, false,
1533                                             HW_DESC_RXOWN,
1534                                             (u8 *)&tmp_one);
1535                                 }
1536                         }
1537                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1538                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1539                 }
1540                 rtlpci->rx_ring[rxring_idx].idx = 0;
1541         }
1542
1543         /*
1544          *after reset, release previous pending packet,
1545          *and force the  tx idx to the first one
1546          */
1547         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1548         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1549                 if (rtlpci->tx_ring[i].desc ||
1550                     rtlpci->tx_ring[i].buffer_desc) {
1551                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1552
1553                         while (skb_queue_len(&ring->queue)) {
1554                                 u8 *entry;
1555                                 struct sk_buff *skb =
1556                                         __skb_dequeue(&ring->queue);
1557                                 if (rtlpriv->use_new_trx_flow)
1558                                         entry = (u8 *)(&ring->buffer_desc
1559                                                                 [ring->idx]);
1560                                 else
1561                                         entry = (u8 *)(&ring->desc[ring->idx]);
1562
1563                                 pci_unmap_single(rtlpci->pdev,
1564                                                  rtlpriv->cfg->ops->
1565                                                          get_desc((u8 *)
1566                                                          entry,
1567                                                          true,
1568                                                          HW_DESC_TXBUFF_ADDR),
1569                                                  skb->len, PCI_DMA_TODEVICE);
1570                                 dev_kfree_skb_irq(skb);
1571                                 ring->idx = (ring->idx + 1) % ring->entries;
1572                         }
1573
1574                         if (rtlpriv->use_new_trx_flow) {
1575                                 rtlpci->tx_ring[i].cur_tx_rp = 0;
1576                                 rtlpci->tx_ring[i].cur_tx_wp = 0;
1577                         }
1578
1579                         ring->idx = 0;
1580                         ring->entries = rtlpci->txringcount[i];
1581                 }
1582         }
1583         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1584
1585         return 0;
1586 }
1587
1588 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1589                                         struct ieee80211_sta *sta,
1590                                         struct sk_buff *skb)
1591 {
1592         struct rtl_priv *rtlpriv = rtl_priv(hw);
1593         struct rtl_sta_info *sta_entry = NULL;
1594         u8 tid = rtl_get_tid(skb);
1595         __le16 fc = rtl_get_fc(skb);
1596
1597         if (!sta)
1598                 return false;
1599         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1600
1601         if (!rtlpriv->rtlhal.earlymode_enable)
1602                 return false;
1603         if (ieee80211_is_nullfunc(fc))
1604                 return false;
1605         if (ieee80211_is_qos_nullfunc(fc))
1606                 return false;
1607         if (ieee80211_is_pspoll(fc))
1608                 return false;
1609         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1610                 return false;
1611         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1612                 return false;
1613         if (tid > 7)
1614                 return false;
1615
1616         /* maybe every tid should be checked */
1617         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1618                 return false;
1619
1620         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1621         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1622         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1623
1624         return true;
1625 }
1626
1627 static int rtl_pci_tx(struct ieee80211_hw *hw,
1628                       struct ieee80211_sta *sta,
1629                       struct sk_buff *skb,
1630                       struct rtl_tcb_desc *ptcb_desc)
1631 {
1632         struct rtl_priv *rtlpriv = rtl_priv(hw);
1633         struct rtl_sta_info *sta_entry = NULL;
1634         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1635         struct rtl8192_tx_ring *ring;
1636         struct rtl_tx_desc *pdesc;
1637         struct rtl_tx_buffer_desc *ptx_bd_desc = NULL;
1638         u16 idx;
1639         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1640         unsigned long flags;
1641         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1642         __le16 fc = rtl_get_fc(skb);
1643         u8 *pda_addr = hdr->addr1;
1644         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1645         /*ssn */
1646         u8 tid = 0;
1647         u16 seq_number = 0;
1648         u8 own;
1649         u8 temp_one = 1;
1650
1651         if (ieee80211_is_mgmt(fc))
1652                 rtl_tx_mgmt_proc(hw, skb);
1653
1654         if (rtlpriv->psc.sw_ps_enabled) {
1655                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1656                         !ieee80211_has_pm(fc))
1657                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1658         }
1659
1660         rtl_action_proc(hw, skb, true);
1661
1662         if (is_multicast_ether_addr(pda_addr))
1663                 rtlpriv->stats.txbytesmulticast += skb->len;
1664         else if (is_broadcast_ether_addr(pda_addr))
1665                 rtlpriv->stats.txbytesbroadcast += skb->len;
1666         else
1667                 rtlpriv->stats.txbytesunicast += skb->len;
1668
1669         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1670         ring = &rtlpci->tx_ring[hw_queue];
1671         if (hw_queue != BEACON_QUEUE) {
1672                 if (rtlpriv->use_new_trx_flow)
1673                         idx = ring->cur_tx_wp;
1674                 else
1675                         idx = (ring->idx + skb_queue_len(&ring->queue)) %
1676                               ring->entries;
1677         } else {
1678                 idx = 0;
1679         }
1680
1681         pdesc = &ring->desc[idx];
1682         if (rtlpriv->use_new_trx_flow) {
1683                 ptx_bd_desc = &ring->buffer_desc[idx];
1684         } else {
1685                 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
1686                                 true, HW_DESC_OWN);
1687
1688                 if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1689                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1690                                  "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1691                                  hw_queue, ring->idx, idx,
1692                                  skb_queue_len(&ring->queue));
1693
1694                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1695                                                flags);
1696                         return skb->len;
1697                 }
1698         }
1699
1700         if (rtlpriv->cfg->ops->get_available_desc &&
1701             rtlpriv->cfg->ops->get_available_desc(hw, hw_queue) == 0) {
1702                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1703                                  "get_available_desc fail\n");
1704                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1705                                                flags);
1706                         return skb->len;
1707         }
1708
1709         if (ieee80211_is_data_qos(fc)) {
1710                 tid = rtl_get_tid(skb);
1711                 if (sta) {
1712                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1713                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1714                                       IEEE80211_SCTL_SEQ) >> 4;
1715                         seq_number += 1;
1716
1717                         if (!ieee80211_has_morefrags(hdr->frame_control))
1718                                 sta_entry->tids[tid].seq_number = seq_number;
1719                 }
1720         }
1721
1722         if (ieee80211_is_data(fc))
1723                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1724
1725         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1726                         (u8 *)ptx_bd_desc, info, sta, skb, hw_queue, ptcb_desc);
1727
1728         __skb_queue_tail(&ring->queue, skb);
1729
1730         if (rtlpriv->use_new_trx_flow) {
1731                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1732                                             HW_DESC_OWN, &hw_queue);
1733         } else {
1734                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1735                                             HW_DESC_OWN, &temp_one);
1736         }
1737
1738         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1739             hw_queue != BEACON_QUEUE) {
1740                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1741                          "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1742                          hw_queue, ring->idx, idx,
1743                          skb_queue_len(&ring->queue));
1744
1745                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1746         }
1747
1748         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1749
1750         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1751
1752         return 0;
1753 }
1754
1755 static void rtl_pci_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1756 {
1757         struct rtl_priv *rtlpriv = rtl_priv(hw);
1758         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1759         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1760         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1761         u16 i = 0;
1762         int queue_id;
1763         struct rtl8192_tx_ring *ring;
1764
1765         if (mac->skip_scan)
1766                 return;
1767
1768         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1769                 u32 queue_len;
1770
1771                 if (((queues >> queue_id) & 0x1) == 0) {
1772                         queue_id--;
1773                         continue;
1774                 }
1775                 ring = &pcipriv->dev.tx_ring[queue_id];
1776                 queue_len = skb_queue_len(&ring->queue);
1777                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1778                         queue_id == TXCMD_QUEUE) {
1779                         queue_id--;
1780                         continue;
1781                 } else {
1782                         msleep(20);
1783                         i++;
1784                 }
1785
1786                 /* we just wait 1s for all queues */
1787                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1788                         is_hal_stop(rtlhal) || i >= 200)
1789                         return;
1790         }
1791 }
1792
1793 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1794 {
1795         struct rtl_priv *rtlpriv = rtl_priv(hw);
1796         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1797
1798         _rtl_pci_deinit_trx_ring(hw);
1799
1800         synchronize_irq(rtlpci->pdev->irq);
1801         tasklet_kill(&rtlpriv->works.irq_tasklet);
1802         cancel_work_sync(&rtlpriv->works.lps_change_work);
1803
1804         flush_workqueue(rtlpriv->works.rtl_wq);
1805         destroy_workqueue(rtlpriv->works.rtl_wq);
1806
1807 }
1808
1809 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1810 {
1811         int err;
1812
1813         _rtl_pci_init_struct(hw, pdev);
1814
1815         err = _rtl_pci_init_trx_ring(hw);
1816         if (err) {
1817                 pr_err("tx ring initialization failed\n");
1818                 return err;
1819         }
1820
1821         return 0;
1822 }
1823
1824 static int rtl_pci_start(struct ieee80211_hw *hw)
1825 {
1826         struct rtl_priv *rtlpriv = rtl_priv(hw);
1827         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1828         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1829         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1830         struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw));
1831
1832         int err;
1833
1834         rtl_pci_reset_trx_ring(hw);
1835
1836         rtlpci->driver_is_goingto_unload = false;
1837         if (rtlpriv->cfg->ops->get_btc_status &&
1838             rtlpriv->cfg->ops->get_btc_status()) {
1839                 rtlpriv->btcoexist.btc_info.ap_num = 36;
1840                 rtlpriv->btcoexist.btc_ops->btc_init_variables(rtlpriv);
1841                 rtlpriv->btcoexist.btc_ops->btc_init_hal_vars(rtlpriv);
1842         }
1843         err = rtlpriv->cfg->ops->hw_init(hw);
1844         if (err) {
1845                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1846                          "Failed to config hardware!\n");
1847                 return err;
1848         }
1849         rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RETRY_LIMIT,
1850                         &rtlmac->retry_long);
1851
1852         rtlpriv->cfg->ops->enable_interrupt(hw);
1853         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "enable_interrupt OK\n");
1854
1855         rtl_init_rx_config(hw);
1856
1857         /*should be after adapter start and interrupt enable. */
1858         set_hal_start(rtlhal);
1859
1860         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1861
1862         rtlpci->up_first_time = false;
1863
1864         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "rtl_pci_start OK\n");
1865         return 0;
1866 }
1867
1868 static void rtl_pci_stop(struct ieee80211_hw *hw)
1869 {
1870         struct rtl_priv *rtlpriv = rtl_priv(hw);
1871         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1872         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1873         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1874         unsigned long flags;
1875         u8 RFInProgressTimeOut = 0;
1876
1877         if (rtlpriv->cfg->ops->get_btc_status())
1878                 rtlpriv->btcoexist.btc_ops->btc_halt_notify();
1879
1880         /*
1881          *should be before disable interrupt&adapter
1882          *and will do it immediately.
1883          */
1884         set_hal_stop(rtlhal);
1885
1886         rtlpci->driver_is_goingto_unload = true;
1887         rtlpriv->cfg->ops->disable_interrupt(hw);
1888         cancel_work_sync(&rtlpriv->works.lps_change_work);
1889
1890         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1891         while (ppsc->rfchange_inprogress) {
1892                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1893                 if (RFInProgressTimeOut > 100) {
1894                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1895                         break;
1896                 }
1897                 mdelay(1);
1898                 RFInProgressTimeOut++;
1899                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1900         }
1901         ppsc->rfchange_inprogress = true;
1902         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1903
1904         rtlpriv->cfg->ops->hw_disable(hw);
1905         /* some things are not needed if firmware not available */
1906         if (!rtlpriv->max_fw_size)
1907                 return;
1908         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1909
1910         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1911         ppsc->rfchange_inprogress = false;
1912         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1913
1914         rtl_pci_enable_aspm(hw);
1915 }
1916
1917 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1918                 struct ieee80211_hw *hw)
1919 {
1920         struct rtl_priv *rtlpriv = rtl_priv(hw);
1921         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1922         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1923         struct pci_dev *bridge_pdev = pdev->bus->self;
1924         u16 venderid;
1925         u16 deviceid;
1926         u8 revisionid;
1927         u16 irqline;
1928         u8 tmp;
1929
1930         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1931         venderid = pdev->vendor;
1932         deviceid = pdev->device;
1933         pci_read_config_byte(pdev, 0x8, &revisionid);
1934         pci_read_config_word(pdev, 0x3C, &irqline);
1935
1936         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1937          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1938          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1939          * the correct driver is r8192e_pci, thus this routine should
1940          * return false.
1941          */
1942         if (deviceid == RTL_PCI_8192SE_DID &&
1943             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1944                 return false;
1945
1946         if (deviceid == RTL_PCI_8192_DID ||
1947             deviceid == RTL_PCI_0044_DID ||
1948             deviceid == RTL_PCI_0047_DID ||
1949             deviceid == RTL_PCI_8192SE_DID ||
1950             deviceid == RTL_PCI_8174_DID ||
1951             deviceid == RTL_PCI_8173_DID ||
1952             deviceid == RTL_PCI_8172_DID ||
1953             deviceid == RTL_PCI_8171_DID) {
1954                 switch (revisionid) {
1955                 case RTL_PCI_REVISION_ID_8192PCIE:
1956                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1957                                  "8192 PCI-E is found - vid/did=%x/%x\n",
1958                                  venderid, deviceid);
1959                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1960                         return false;
1961                 case RTL_PCI_REVISION_ID_8192SE:
1962                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1963                                  "8192SE is found - vid/did=%x/%x\n",
1964                                  venderid, deviceid);
1965                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1966                         break;
1967                 default:
1968                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1969                                  "Err: Unknown device - vid/did=%x/%x\n",
1970                                  venderid, deviceid);
1971                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1972                         break;
1973
1974                 }
1975         } else if (deviceid == RTL_PCI_8723AE_DID) {
1976                 rtlhal->hw_type = HARDWARE_TYPE_RTL8723AE;
1977                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1978                          "8723AE PCI-E is found - "
1979                          "vid/did=%x/%x\n", venderid, deviceid);
1980         } else if (deviceid == RTL_PCI_8192CET_DID ||
1981                    deviceid == RTL_PCI_8192CE_DID ||
1982                    deviceid == RTL_PCI_8191CE_DID ||
1983                    deviceid == RTL_PCI_8188CE_DID) {
1984                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1985                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1986                          "8192C PCI-E is found - vid/did=%x/%x\n",
1987                          venderid, deviceid);
1988         } else if (deviceid == RTL_PCI_8192DE_DID ||
1989                    deviceid == RTL_PCI_8192DE_DID2) {
1990                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1991                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1992                          "8192D PCI-E is found - vid/did=%x/%x\n",
1993                          venderid, deviceid);
1994         } else if (deviceid == RTL_PCI_8188EE_DID) {
1995                 rtlhal->hw_type = HARDWARE_TYPE_RTL8188EE;
1996                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1997                          "Find adapter, Hardware type is 8188EE\n");
1998         } else if (deviceid == RTL_PCI_8723BE_DID) {
1999                         rtlhal->hw_type = HARDWARE_TYPE_RTL8723BE;
2000                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2001                                  "Find adapter, Hardware type is 8723BE\n");
2002         } else if (deviceid == RTL_PCI_8192EE_DID) {
2003                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192EE;
2004                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2005                                  "Find adapter, Hardware type is 8192EE\n");
2006         } else if (deviceid == RTL_PCI_8821AE_DID) {
2007                         rtlhal->hw_type = HARDWARE_TYPE_RTL8821AE;
2008                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2009                                  "Find adapter, Hardware type is 8821AE\n");
2010         } else if (deviceid == RTL_PCI_8812AE_DID) {
2011                         rtlhal->hw_type = HARDWARE_TYPE_RTL8812AE;
2012                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2013                                  "Find adapter, Hardware type is 8812AE\n");
2014         } else {
2015                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
2016                          "Err: Unknown device - vid/did=%x/%x\n",
2017                          venderid, deviceid);
2018
2019                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
2020         }
2021
2022         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
2023                 if (revisionid == 0 || revisionid == 1) {
2024                         if (revisionid == 0) {
2025                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2026                                          "Find 92DE MAC0\n");
2027                                 rtlhal->interfaceindex = 0;
2028                         } else if (revisionid == 1) {
2029                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2030                                          "Find 92DE MAC1\n");
2031                                 rtlhal->interfaceindex = 1;
2032                         }
2033                 } else {
2034                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2035                                  "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
2036                                  venderid, deviceid, revisionid);
2037                         rtlhal->interfaceindex = 0;
2038                 }
2039         }
2040
2041         /* 92ee use new trx flow */
2042         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
2043                 rtlpriv->use_new_trx_flow = true;
2044         else
2045                 rtlpriv->use_new_trx_flow = false;
2046
2047         /*find bus info */
2048         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
2049         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
2050         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
2051
2052         /*find bridge info */
2053         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
2054         /* some ARM have no bridge_pdev and will crash here
2055          * so we should check if bridge_pdev is NULL
2056          */
2057         if (bridge_pdev) {
2058                 /*find bridge info if available */
2059                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
2060                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
2061                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
2062                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
2063                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2064                                          "Pci Bridge Vendor is found index: %d\n",
2065                                          tmp);
2066                                 break;
2067                         }
2068                 }
2069         }
2070
2071         if (pcipriv->ndis_adapter.pcibridge_vendor !=
2072                 PCI_BRIDGE_VENDOR_UNKNOWN) {
2073                 pcipriv->ndis_adapter.pcibridge_busnum =
2074                     bridge_pdev->bus->number;
2075                 pcipriv->ndis_adapter.pcibridge_devnum =
2076                     PCI_SLOT(bridge_pdev->devfn);
2077                 pcipriv->ndis_adapter.pcibridge_funcnum =
2078                     PCI_FUNC(bridge_pdev->devfn);
2079                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
2080                     pci_pcie_cap(bridge_pdev);
2081                 pcipriv->ndis_adapter.num4bytes =
2082                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
2083
2084                 rtl_pci_get_linkcontrol_field(hw);
2085
2086                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
2087                     PCI_BRIDGE_VENDOR_AMD) {
2088                         pcipriv->ndis_adapter.amd_l1_patch =
2089                             rtl_pci_get_amd_l1_patch(hw);
2090                 }
2091         }
2092
2093         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2094                  "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
2095                  pcipriv->ndis_adapter.busnumber,
2096                  pcipriv->ndis_adapter.devnumber,
2097                  pcipriv->ndis_adapter.funcnumber,
2098                  pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg);
2099
2100         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2101                  "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
2102                  pcipriv->ndis_adapter.pcibridge_busnum,
2103                  pcipriv->ndis_adapter.pcibridge_devnum,
2104                  pcipriv->ndis_adapter.pcibridge_funcnum,
2105                  pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
2106                  pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
2107                  pcipriv->ndis_adapter.pcibridge_linkctrlreg,
2108                  pcipriv->ndis_adapter.amd_l1_patch);
2109
2110         rtl_pci_parse_configuration(pdev, hw);
2111         list_add_tail(&rtlpriv->list, &rtlpriv->glb_var->glb_priv_list);
2112
2113         return true;
2114 }
2115
2116 static int rtl_pci_intr_mode_msi(struct ieee80211_hw *hw)
2117 {
2118         struct rtl_priv *rtlpriv = rtl_priv(hw);
2119         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2120         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2121         int ret;
2122
2123         ret = pci_enable_msi(rtlpci->pdev);
2124         if (ret < 0)
2125                 return ret;
2126
2127         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2128                           IRQF_SHARED, KBUILD_MODNAME, hw);
2129         if (ret < 0) {
2130                 pci_disable_msi(rtlpci->pdev);
2131                 return ret;
2132         }
2133
2134         rtlpci->using_msi = true;
2135
2136         RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2137                  "MSI Interrupt Mode!\n");
2138         return 0;
2139 }
2140
2141 static int rtl_pci_intr_mode_legacy(struct ieee80211_hw *hw)
2142 {
2143         struct rtl_priv *rtlpriv = rtl_priv(hw);
2144         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2145         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2146         int ret;
2147
2148         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2149                           IRQF_SHARED, KBUILD_MODNAME, hw);
2150         if (ret < 0)
2151                 return ret;
2152
2153         rtlpci->using_msi = false;
2154         RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2155                  "Pin-based Interrupt Mode!\n");
2156         return 0;
2157 }
2158
2159 static int rtl_pci_intr_mode_decide(struct ieee80211_hw *hw)
2160 {
2161         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2162         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2163         int ret;
2164
2165         if (rtlpci->msi_support) {
2166                 ret = rtl_pci_intr_mode_msi(hw);
2167                 if (ret < 0)
2168                         ret = rtl_pci_intr_mode_legacy(hw);
2169         } else {
2170                 ret = rtl_pci_intr_mode_legacy(hw);
2171         }
2172         return ret;
2173 }
2174
2175 int rtl_pci_probe(struct pci_dev *pdev,
2176                             const struct pci_device_id *id)
2177 {
2178         struct ieee80211_hw *hw = NULL;
2179
2180         struct rtl_priv *rtlpriv = NULL;
2181         struct rtl_pci_priv *pcipriv = NULL;
2182         struct rtl_pci *rtlpci;
2183         unsigned long pmem_start, pmem_len, pmem_flags;
2184         int err;
2185
2186         err = pci_enable_device(pdev);
2187         if (err) {
2188                 WARN_ONCE(true, "%s : Cannot enable new PCI device\n",
2189                           pci_name(pdev));
2190                 return err;
2191         }
2192
2193         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
2194                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
2195                         WARN_ONCE(true,
2196                                   "rtlwifi: Unable to obtain 32bit DMA for consistent allocations\n");
2197                         err = -ENOMEM;
2198                         goto fail1;
2199                 }
2200         }
2201
2202         pci_set_master(pdev);
2203
2204         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
2205                                 sizeof(struct rtl_priv), &rtl_ops);
2206         if (!hw) {
2207                 WARN_ONCE(true,
2208                           "%s : ieee80211 alloc failed\n", pci_name(pdev));
2209                 err = -ENOMEM;
2210                 goto fail1;
2211         }
2212
2213         SET_IEEE80211_DEV(hw, &pdev->dev);
2214         pci_set_drvdata(pdev, hw);
2215
2216         rtlpriv = hw->priv;
2217         rtlpriv->hw = hw;
2218         pcipriv = (void *)rtlpriv->priv;
2219         pcipriv->dev.pdev = pdev;
2220         init_completion(&rtlpriv->firmware_loading_complete);
2221         /*proximity init here*/
2222         rtlpriv->proximity.proxim_on = false;
2223
2224         pcipriv = (void *)rtlpriv->priv;
2225         pcipriv->dev.pdev = pdev;
2226
2227         /* init cfg & intf_ops */
2228         rtlpriv->rtlhal.interface = INTF_PCI;
2229         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
2230         rtlpriv->intf_ops = &rtl_pci_ops;
2231         rtlpriv->glb_var = &rtl_global_var;
2232
2233         /* MEM map */
2234         err = pci_request_regions(pdev, KBUILD_MODNAME);
2235         if (err) {
2236                 WARN_ONCE(true, "rtlwifi: Can't obtain PCI resources\n");
2237                 goto fail1;
2238         }
2239
2240         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
2241         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
2242         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
2243
2244         /*shared mem start */
2245         rtlpriv->io.pci_mem_start =
2246                         (unsigned long)pci_iomap(pdev,
2247                         rtlpriv->cfg->bar_id, pmem_len);
2248         if (rtlpriv->io.pci_mem_start == 0) {
2249                 WARN_ONCE(true, "rtlwifi: Can't map PCI mem\n");
2250                 err = -ENOMEM;
2251                 goto fail2;
2252         }
2253
2254         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2255                  "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
2256                  pmem_start, pmem_len, pmem_flags,
2257                  rtlpriv->io.pci_mem_start);
2258
2259         /* Disable Clk Request */
2260         pci_write_config_byte(pdev, 0x81, 0);
2261         /* leave D3 mode */
2262         pci_write_config_byte(pdev, 0x44, 0);
2263         pci_write_config_byte(pdev, 0x04, 0x06);
2264         pci_write_config_byte(pdev, 0x04, 0x07);
2265
2266         /* find adapter */
2267         if (!_rtl_pci_find_adapter(pdev, hw)) {
2268                 err = -ENODEV;
2269                 goto fail2;
2270         }
2271
2272         /* Init IO handler */
2273         _rtl_pci_io_handler_init(&pdev->dev, hw);
2274
2275         /*like read eeprom and so on */
2276         rtlpriv->cfg->ops->read_eeprom_info(hw);
2277
2278         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
2279                 pr_err("Can't init_sw_vars\n");
2280                 err = -ENODEV;
2281                 goto fail3;
2282         }
2283         rtlpriv->cfg->ops->init_sw_leds(hw);
2284
2285         /*aspm */
2286         rtl_pci_init_aspm(hw);
2287
2288         /* Init mac80211 sw */
2289         err = rtl_init_core(hw);
2290         if (err) {
2291                 pr_err("Can't allocate sw for mac80211\n");
2292                 goto fail3;
2293         }
2294
2295         /* Init PCI sw */
2296         err = rtl_pci_init(hw, pdev);
2297         if (err) {
2298                 pr_err("Failed to init PCI\n");
2299                 goto fail3;
2300         }
2301
2302         err = ieee80211_register_hw(hw);
2303         if (err) {
2304                 pr_err("Can't register mac80211 hw.\n");
2305                 err = -ENODEV;
2306                 goto fail3;
2307         }
2308         rtlpriv->mac80211.mac80211_registered = 1;
2309
2310         /*init rfkill */
2311         rtl_init_rfkill(hw);    /* Init PCI sw */
2312
2313         rtlpci = rtl_pcidev(pcipriv);
2314         err = rtl_pci_intr_mode_decide(hw);
2315         if (err) {
2316                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2317                          "%s: failed to register IRQ handler\n",
2318                          wiphy_name(hw->wiphy));
2319                 goto fail3;
2320         }
2321         rtlpci->irq_alloc = 1;
2322
2323         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2324         return 0;
2325
2326 fail3:
2327         pci_set_drvdata(pdev, NULL);
2328         rtl_deinit_core(hw);
2329
2330 fail2:
2331         if (rtlpriv->io.pci_mem_start != 0)
2332                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2333
2334         pci_release_regions(pdev);
2335         complete(&rtlpriv->firmware_loading_complete);
2336
2337 fail1:
2338         if (hw)
2339                 ieee80211_free_hw(hw);
2340         pci_disable_device(pdev);
2341
2342         return err;
2343
2344 }
2345 EXPORT_SYMBOL(rtl_pci_probe);
2346
2347 void rtl_pci_disconnect(struct pci_dev *pdev)
2348 {
2349         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2350         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2351         struct rtl_priv *rtlpriv = rtl_priv(hw);
2352         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2353         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
2354
2355         /* just in case driver is removed before firmware callback */
2356         wait_for_completion(&rtlpriv->firmware_loading_complete);
2357         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2358
2359         /*ieee80211_unregister_hw will call ops_stop */
2360         if (rtlmac->mac80211_registered == 1) {
2361                 ieee80211_unregister_hw(hw);
2362                 rtlmac->mac80211_registered = 0;
2363         } else {
2364                 rtl_deinit_deferred_work(hw, false);
2365                 rtlpriv->intf_ops->adapter_stop(hw);
2366         }
2367         rtlpriv->cfg->ops->disable_interrupt(hw);
2368
2369         /*deinit rfkill */
2370         rtl_deinit_rfkill(hw);
2371
2372         rtl_pci_deinit(hw);
2373         rtl_deinit_core(hw);
2374         rtlpriv->cfg->ops->deinit_sw_vars(hw);
2375
2376         if (rtlpci->irq_alloc) {
2377                 free_irq(rtlpci->pdev->irq, hw);
2378                 rtlpci->irq_alloc = 0;
2379         }
2380
2381         if (rtlpci->using_msi)
2382                 pci_disable_msi(rtlpci->pdev);
2383
2384         list_del(&rtlpriv->list);
2385         if (rtlpriv->io.pci_mem_start != 0) {
2386                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2387                 pci_release_regions(pdev);
2388         }
2389
2390         pci_disable_device(pdev);
2391
2392         rtl_pci_disable_aspm(hw);
2393
2394         pci_set_drvdata(pdev, NULL);
2395
2396         ieee80211_free_hw(hw);
2397 }
2398 EXPORT_SYMBOL(rtl_pci_disconnect);
2399
2400 #ifdef CONFIG_PM_SLEEP
2401 /***************************************
2402 kernel pci power state define:
2403 PCI_D0         ((pci_power_t __force) 0)
2404 PCI_D1         ((pci_power_t __force) 1)
2405 PCI_D2         ((pci_power_t __force) 2)
2406 PCI_D3hot      ((pci_power_t __force) 3)
2407 PCI_D3cold     ((pci_power_t __force) 4)
2408 PCI_UNKNOWN    ((pci_power_t __force) 5)
2409
2410 This function is called when system
2411 goes into suspend state mac80211 will
2412 call rtl_mac_stop() from the mac80211
2413 suspend function first, So there is
2414 no need to call hw_disable here.
2415 ****************************************/
2416 int rtl_pci_suspend(struct device *dev)
2417 {
2418         struct pci_dev *pdev = to_pci_dev(dev);
2419         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2420         struct rtl_priv *rtlpriv = rtl_priv(hw);
2421
2422         rtlpriv->cfg->ops->hw_suspend(hw);
2423         rtl_deinit_rfkill(hw);
2424
2425         return 0;
2426 }
2427 EXPORT_SYMBOL(rtl_pci_suspend);
2428
2429 int rtl_pci_resume(struct device *dev)
2430 {
2431         struct pci_dev *pdev = to_pci_dev(dev);
2432         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2433         struct rtl_priv *rtlpriv = rtl_priv(hw);
2434
2435         rtlpriv->cfg->ops->hw_resume(hw);
2436         rtl_init_rfkill(hw);
2437         return 0;
2438 }
2439 EXPORT_SYMBOL(rtl_pci_resume);
2440 #endif /* CONFIG_PM_SLEEP */
2441
2442 const struct rtl_intf_ops rtl_pci_ops = {
2443         .read_efuse_byte = read_efuse_byte,
2444         .adapter_start = rtl_pci_start,
2445         .adapter_stop = rtl_pci_stop,
2446         .check_buddy_priv = rtl_pci_check_buddy_priv,
2447         .adapter_tx = rtl_pci_tx,
2448         .flush = rtl_pci_flush,
2449         .reset_trx_ring = rtl_pci_reset_trx_ring,
2450         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2451
2452         .disable_aspm = rtl_pci_disable_aspm,
2453         .enable_aspm = rtl_pci_enable_aspm,
2454 };