drivers/net/wireless/realtek/rtlwifi/rtl8188ee/sw.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2013  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * The full GNU General Public License is included in this distribution in the
  15  * file called LICENSE.
  16  *
  17  * Contact Information:
  18  * wlanfae <wlanfae@realtek.com>
  19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20  * Hsinchu 300, Taiwan.
  21  *
  22  * Larry Finger <Larry.Finger@lwfinger.net>
  23  *
  24  *****************************************************************************/
  25
  26 #include "../wifi.h"
  27 #include "../core.h"
  28 #include "../pci.h"
  29 #include "reg.h"
  30 #include "def.h"
  31 #include "phy.h"
  32 #include "dm.h"
  33 #include "hw.h"
  34 #include "sw.h"
  35 #include "trx.h"
  36 #include "led.h"
  37 #include "table.h"
  38
  39 #include <linux/vmalloc.h>
  40 #include <linux/module.h>
  41
  42 static void rtl88e_init_aspm_vars(struct ieee80211_hw *hw)
  43 {
  44         struct rtl_priv *rtlpriv = rtl_priv(hw);
  45         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  46
  47         /*close ASPM for AMD defaultly */
  48         rtlpci->const_amdpci_aspm = 0;
  49
  50         /* ASPM PS mode.
  51          * 0 - Disable ASPM,
  52          * 1 - Enable ASPM without Clock Req,
  53          * 2 - Enable ASPM with Clock Req,
  54          * 3 - Alwyas Enable ASPM with Clock Req,
  55          * 4 - Always Enable ASPM without Clock Req.
  56          * set defult to RTL8192CE:3 RTL8192E:2
  57          */
  58         rtlpci->const_pci_aspm = 3;
  59
  60         /*Setting for PCI-E device */
  61         rtlpci->const_devicepci_aspm_setting = 0x03;
  62
  63         /*Setting for PCI-E bridge */
  64         rtlpci->const_hostpci_aspm_setting = 0x02;
  65
  66         /* In Hw/Sw Radio Off situation.
  67          * 0 - Default,
  68          * 1 - From ASPM setting without low Mac Pwr,
  69          * 2 - From ASPM setting with low Mac Pwr,
  70          * 3 - Bus D3
  71          * set default to RTL8192CE:0 RTL8192SE:2
  72          */
  73         rtlpci->const_hwsw_rfoff_d3 = 0;
  74
  75         /* This setting works for those device with
  76          * backdoor ASPM setting such as EPHY setting.
  77          * 0 - Not support ASPM,
  78          * 1 - Support ASPM,
  79          * 2 - According to chipset.
  80          */
  81         rtlpci->const_support_pciaspm = rtlpriv->cfg->mod_params->aspm_support;
  82 }
  83
  84 int rtl88e_init_sw_vars(struct ieee80211_hw *hw)
  85 {
  86         int err = 0;
  87         struct rtl_priv *rtlpriv = rtl_priv(hw);
  88         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  89         u8 tid;
  90         char *fw_name;
  91
  92         rtl8188ee_bt_reg_init(hw);
  93         rtlpriv->dm.dm_initialgain_enable = 1;
  94         rtlpriv->dm.dm_flag = 0;
  95         rtlpriv->dm.disable_framebursting = 0;
  96         rtlpriv->dm.thermalvalue = 0;
  97         rtlpci->transmit_config = CFENDFORM | BIT(15);
  98
  99         /* compatible 5G band 88ce just 2.4G band & smsp */
 100         rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G;
 101         rtlpriv->rtlhal.bandset = BAND_ON_2_4G;
 102         rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY;
 103
 104         rtlpci->receive_config = (RCR_APPFCS |
 105                                   RCR_APP_MIC |
 106                                   RCR_APP_ICV |
 107                                   RCR_APP_PHYST_RXFF |
 108                                   RCR_HTC_LOC_CTRL |
 109                                   RCR_AMF |
 110                                   RCR_ACF |
 111                                   RCR_ADF |
 112                                   RCR_AICV |
 113                                   RCR_ACRC32 |
 114                                   RCR_AB |
 115                                   RCR_AM |
 116                                   RCR_APM |
 117                                   0);
 118
 119         rtlpci->irq_mask[0] =
 120                                 (u32)(IMR_PSTIMEOUT     |
 121                                 IMR_HSISR_IND_ON_INT    |
 122                                 IMR_C2HCMD              |
 123                                 IMR_HIGHDOK             |
 124                                 IMR_MGNTDOK             |
 125                                 IMR_BKDOK               |
 126                                 IMR_BEDOK               |
 127                                 IMR_VIDOK               |
 128                                 IMR_VODOK               |
 129                                 IMR_RDU                 |
 130                                 IMR_ROK                 |
 131                                 0);
 132         rtlpci->irq_mask[1] = (u32) (IMR_RXFOVW | 0);
 133         rtlpci->sys_irq_mask = (u32) (HSIMR_PDN_INT_EN | HSIMR_RON_INT_EN);
 134
 135         /* for LPS & IPS */
 136         rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps;
 137         rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps;
 138         rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps;
 139         rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support;
 140         rtlpriv->cfg->mod_params->sw_crypto =
 141                 rtlpriv->cfg->mod_params->sw_crypto;
 142         rtlpriv->cfg->mod_params->disable_watchdog =
 143                 rtlpriv->cfg->mod_params->disable_watchdog;
 144         if (rtlpriv->cfg->mod_params->disable_watchdog)
 145                 pr_info("watchdog disabled\n");
 146         if (!rtlpriv->psc.inactiveps)
 147                 pr_info("rtl8188ee: Power Save off (module option)\n");
 148         if (!rtlpriv->psc.fwctrl_lps)
 149                 pr_info("rtl8188ee: FW Power Save off (module option)\n");
 150         rtlpriv->psc.reg_fwctrl_lps = 3;
 151         rtlpriv->psc.reg_max_lps_awakeintvl = 5;
 152         /* for ASPM, you can close aspm through
 153          * set const_support_pciaspm = 0
 154          */
 155         rtl88e_init_aspm_vars(hw);
 156
 157         if (rtlpriv->psc.reg_fwctrl_lps == 1)
 158                 rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE;
 159         else if (rtlpriv->psc.reg_fwctrl_lps == 2)
 160                 rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE;
 161         else if (rtlpriv->psc.reg_fwctrl_lps == 3)
 162                 rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE;
 163
 164         /* for firmware buf */
 165         rtlpriv->rtlhal.pfirmware = vzalloc(0x8000);
 166         if (!rtlpriv->rtlhal.pfirmware) {
 167                 pr_info("Can't alloc buffer for fw.\n");
 168                 return 1;
 169         }
 170
 171         fw_name = "/*(DEBLOBBED)*/";
 172         rtlpriv->max_fw_size = 0x8000;
 173         pr_info("Using firmware %s\n", fw_name);
 174         err = reject_firmware_nowait(THIS_MODULE, 1, fw_name,
 175                                       rtlpriv->io.dev, GFP_KERNEL, hw,
 176                                       rtl_fw_cb);
 177         if (err) {
 178                 pr_info("Failed to request firmware!\n");
 179                 vfree(rtlpriv->rtlhal.pfirmware);
 180                 rtlpriv->rtlhal.pfirmware = NULL;
 181                 return 1;
 182         }
 183
 184         /* for early mode */
 185         rtlpriv->rtlhal.earlymode_enable = false;
 186         rtlpriv->rtlhal.max_earlymode_num = 10;
 187         for (tid = 0; tid < 8; tid++)
 188                 skb_queue_head_init(&rtlpriv->mac80211.skb_waitq[tid]);
 189
 190         /*low power */
 191         rtlpriv->psc.low_power_enable = false;
 192         if (rtlpriv->psc.low_power_enable) {
 193                 timer_setup(&rtlpriv->works.fw_clockoff_timer,
 194                             rtl88ee_fw_clk_off_timer_callback, 0);
 195         }
 196
 197         timer_setup(&rtlpriv->works.fast_antenna_training_timer,
 198                     rtl88e_dm_fast_antenna_training_callback, 0);
 199         return err;
 200 }
 201
 202 void rtl88e_deinit_sw_vars(struct ieee80211_hw *hw)
 203 {
 204         struct rtl_priv *rtlpriv = rtl_priv(hw);
 205
 206         if (rtlpriv->rtlhal.pfirmware) {
 207                 vfree(rtlpriv->rtlhal.pfirmware);
 208                 rtlpriv->rtlhal.pfirmware = NULL;
 209         }
 210
 211         if (rtlpriv->psc.low_power_enable)
 212                 del_timer_sync(&rtlpriv->works.fw_clockoff_timer);
 213
 214         del_timer_sync(&rtlpriv->works.fast_antenna_training_timer);
 215 }
 216
 217 /* get bt coexist status */
 218 bool rtl88e_get_btc_status(void)
 219 {
 220         return false;
 221 }
 222
 223 static struct rtl_hal_ops rtl8188ee_hal_ops = {
 224         .init_sw_vars = rtl88e_init_sw_vars,
 225         .deinit_sw_vars = rtl88e_deinit_sw_vars,
 226         .read_eeprom_info = rtl88ee_read_eeprom_info,
 227         .interrupt_recognized = rtl88ee_interrupt_recognized,/*need check*/
 228         .hw_init = rtl88ee_hw_init,
 229         .hw_disable = rtl88ee_card_disable,
 230         .hw_suspend = rtl88ee_suspend,
 231         .hw_resume = rtl88ee_resume,
 232         .enable_interrupt = rtl88ee_enable_interrupt,
 233         .disable_interrupt = rtl88ee_disable_interrupt,
 234         .set_network_type = rtl88ee_set_network_type,
 235         .set_chk_bssid = rtl88ee_set_check_bssid,
 236         .set_qos = rtl88ee_set_qos,
 237         .set_bcn_reg = rtl88ee_set_beacon_related_registers,
 238         .set_bcn_intv = rtl88ee_set_beacon_interval,
 239         .update_interrupt_mask = rtl88ee_update_interrupt_mask,
 240         .get_hw_reg = rtl88ee_get_hw_reg,
 241         .set_hw_reg = rtl88ee_set_hw_reg,
 242         .update_rate_tbl = rtl88ee_update_hal_rate_tbl,
 243         .fill_tx_desc = rtl88ee_tx_fill_desc,
 244         .fill_tx_cmddesc = rtl88ee_tx_fill_cmddesc,
 245         .query_rx_desc = rtl88ee_rx_query_desc,
 246         .set_channel_access = rtl88ee_update_channel_access_setting,
 247         .radio_onoff_checking = rtl88ee_gpio_radio_on_off_checking,
 248         .set_bw_mode = rtl88e_phy_set_bw_mode,
 249         .switch_channel = rtl88e_phy_sw_chnl,
 250         .dm_watchdog = rtl88e_dm_watchdog,
 251         .scan_operation_backup = rtl88e_phy_scan_operation_backup,
 252         .set_rf_power_state = rtl88e_phy_set_rf_power_state,
 253         .led_control = rtl88ee_led_control,
 254         .set_desc = rtl88ee_set_desc,
 255         .get_desc = rtl88ee_get_desc,
 256         .is_tx_desc_closed = rtl88ee_is_tx_desc_closed,
 257         .tx_polling = rtl88ee_tx_polling,
 258         .enable_hw_sec = rtl88ee_enable_hw_security_config,
 259         .set_key = rtl88ee_set_key,
 260         .init_sw_leds = rtl88ee_init_sw_leds,
 261         .get_bbreg = rtl88e_phy_query_bb_reg,
 262         .set_bbreg = rtl88e_phy_set_bb_reg,
 263         .get_rfreg = rtl88e_phy_query_rf_reg,
 264         .set_rfreg = rtl88e_phy_set_rf_reg,
 265         .get_btc_status = rtl88e_get_btc_status,
 266 };
 267
 268 static struct rtl_mod_params rtl88ee_mod_params = {
 269         .sw_crypto = false,
 270         .inactiveps = true,
 271         .swctrl_lps = false,
 272         .fwctrl_lps = false,
 273         .msi_support = true,
 274         .aspm_support = 1,
 275         .debug_level = 0,
 276         .debug_mask = 0,
 277 };
 278
 279 static const struct rtl_hal_cfg rtl88ee_hal_cfg = {
 280         .bar_id = 2,
 281         .write_readback = true,
 282         .name = "rtl88e_pci",
 283         .ops = &rtl8188ee_hal_ops,
 284         .mod_params = &rtl88ee_mod_params,
 285
 286         .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL,
 287         .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN,
 288         .maps[SYS_CLK] = REG_SYS_CLKR,
 289         .maps[MAC_RCR_AM] = AM,
 290         .maps[MAC_RCR_AB] = AB,
 291         .maps[MAC_RCR_ACRC32] = ACRC32,
 292         .maps[MAC_RCR_ACF] = ACF,
 293         .maps[MAC_RCR_AAP] = AAP,
 294         .maps[MAC_HIMR] = REG_HIMR,
 295         .maps[MAC_HIMRE] = REG_HIMRE,
 296         .maps[MAC_HSISR] = REG_HSISR,
 297
 298         .maps[EFUSE_ACCESS] = REG_EFUSE_ACCESS,
 299
 300         .maps[EFUSE_TEST] = REG_EFUSE_TEST,
 301         .maps[EFUSE_CTRL] = REG_EFUSE_CTRL,
 302         .maps[EFUSE_CLK] = 0,
 303         .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL,
 304         .maps[EFUSE_PWC_EV12V] = PWC_EV12V,
 305         .maps[EFUSE_FEN_ELDR] = FEN_ELDR,
 306         .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN,
 307         .maps[EFUSE_ANA8M] = ANA8M,
 308         .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE,
 309         .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION,
 310         .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN,
 311         .maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES,
 312
 313         .maps[RWCAM] = REG_CAMCMD,
 314         .maps[WCAMI] = REG_CAMWRITE,
 315         .maps[RCAMO] = REG_CAMREAD,
 316         .maps[CAMDBG] = REG_CAMDBG,
 317         .maps[SECR] = REG_SECCFG,
 318         .maps[SEC_CAM_NONE] = CAM_NONE,
 319         .maps[SEC_CAM_WEP40] = CAM_WEP40,
 320         .maps[SEC_CAM_TKIP] = CAM_TKIP,
 321         .maps[SEC_CAM_AES] = CAM_AES,
 322         .maps[SEC_CAM_WEP104] = CAM_WEP104,
 323
 324         .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6,
 325         .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5,
 326         .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4,
 327         .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3,
 328         .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2,
 329         .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1,
 330 /*      .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8,     */   /*need check*/
 331         .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7,
 332         .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6,
 333         .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5,
 334         .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4,
 335         .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3,
 336         .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2,
 337         .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1,
 338 /*      .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2,*/
 339 /*      .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1,*/
 340
 341         .maps[RTL_IMR_TXFOVW] = IMR_TXFOVW,
 342         .maps[RTL_IMR_PSTIMEOUT] = IMR_PSTIMEOUT,
 343         .maps[RTL_IMR_BCNINT] = IMR_BCNDMAINT0,
 344         .maps[RTL_IMR_RXFOVW] = IMR_RXFOVW,
 345         .maps[RTL_IMR_RDU] = IMR_RDU,
 346         .maps[RTL_IMR_ATIMEND] = IMR_ATIMEND,
 347         .maps[RTL_IMR_BDOK] = IMR_BCNDOK0,
 348         .maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK,
 349         .maps[RTL_IMR_TBDER] = IMR_TBDER,
 350         .maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK,
 351         .maps[RTL_IMR_TBDOK] = IMR_TBDOK,
 352         .maps[RTL_IMR_BKDOK] = IMR_BKDOK,
 353         .maps[RTL_IMR_BEDOK] = IMR_BEDOK,
 354         .maps[RTL_IMR_VIDOK] = IMR_VIDOK,
 355         .maps[RTL_IMR_VODOK] = IMR_VODOK,
 356         .maps[RTL_IMR_ROK] = IMR_ROK,
 357         .maps[RTL_IMR_HSISR_IND] = IMR_HSISR_IND_ON_INT,
 358         .maps[RTL_IBSS_INT_MASKS] = (IMR_BCNDMAINT0 | IMR_TBDOK | IMR_TBDER),
 359
 360         .maps[RTL_RC_CCK_RATE1M] = DESC92C_RATE1M,
 361         .maps[RTL_RC_CCK_RATE2M] = DESC92C_RATE2M,
 362         .maps[RTL_RC_CCK_RATE5_5M] = DESC92C_RATE5_5M,
 363         .maps[RTL_RC_CCK_RATE11M] = DESC92C_RATE11M,
 364         .maps[RTL_RC_OFDM_RATE6M] = DESC92C_RATE6M,
 365         .maps[RTL_RC_OFDM_RATE9M] = DESC92C_RATE9M,
 366         .maps[RTL_RC_OFDM_RATE12M] = DESC92C_RATE12M,
 367         .maps[RTL_RC_OFDM_RATE18M] = DESC92C_RATE18M,
 368         .maps[RTL_RC_OFDM_RATE24M] = DESC92C_RATE24M,
 369         .maps[RTL_RC_OFDM_RATE36M] = DESC92C_RATE36M,
 370         .maps[RTL_RC_OFDM_RATE48M] = DESC92C_RATE48M,
 371         .maps[RTL_RC_OFDM_RATE54M] = DESC92C_RATE54M,
 372
 373         .maps[RTL_RC_HT_RATEMCS7] = DESC92C_RATEMCS7,
 374         .maps[RTL_RC_HT_RATEMCS15] = DESC92C_RATEMCS15,
 375 };
 376
 377 static const struct pci_device_id rtl88ee_pci_ids[] = {
 378         {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8179, rtl88ee_hal_cfg)},
 379         {},
 380 };
 381
 382 MODULE_DEVICE_TABLE(pci, rtl88ee_pci_ids);
 383
 384 MODULE_AUTHOR("zhiyuan_yang     <zhiyuan_yang@realsil.com.cn>");
 385 MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
 386 MODULE_AUTHOR("Larry Finger     <Larry.Finger@lwfinger.net>");
 387 MODULE_LICENSE("GPL");
 388 MODULE_DESCRIPTION("Realtek 8188E 802.11n PCI wireless");
 389 /*(DEBLOBBED)*/
 390
 391 module_param_named(swenc, rtl88ee_mod_params.sw_crypto, bool, 0444);
 392 module_param_named(debug_level, rtl88ee_mod_params.debug_level, int, 0644);
 393 module_param_named(debug_mask, rtl88ee_mod_params.debug_mask, ullong, 0644);
 394 module_param_named(ips, rtl88ee_mod_params.inactiveps, bool, 0444);
 395 module_param_named(swlps, rtl88ee_mod_params.swctrl_lps, bool, 0444);
 396 module_param_named(fwlps, rtl88ee_mod_params.fwctrl_lps, bool, 0444);
 397 module_param_named(msi, rtl88ee_mod_params.msi_support, bool, 0444);
 398 module_param_named(aspm, rtl88ee_mod_params.aspm_support, int, 0444);
 399 module_param_named(disable_watchdog, rtl88ee_mod_params.disable_watchdog,
 400                    bool, 0444);
 401 MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");
 402 MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n");
 403 MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n");
 404 MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n");
 405 MODULE_PARM_DESC(msi, "Set to 1 to use MSI interrupts mode (default 1)\n");
 406 MODULE_PARM_DESC(aspm, "Set to 1 to enable ASPM (default 1)\n");
 407 MODULE_PARM_DESC(debug_level, "Set debug level (0-5) (default 0)");
 408 MODULE_PARM_DESC(debug_mask, "Set debug mask (default 0)");
 409 MODULE_PARM_DESC(disable_watchdog, "Set to 1 to disable the watchdog (default 0)\n");
 410
 411 static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume);
 412
 413 static struct pci_driver rtl88ee_driver = {
 414         .name = KBUILD_MODNAME,
 415         .id_table = rtl88ee_pci_ids,
 416         .probe = rtl_pci_probe,
 417         .remove = rtl_pci_disconnect,
 418         .driver.pm = &rtlwifi_pm_ops,
 419 };
 420
 421 module_pci_driver(rtl88ee_driver);