drivers/net/wireless/realtek/rtlwifi/rtl8192ce/phy.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2012  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * The full GNU General Public License is included in this distribution in the
  15  * file called LICENSE.
  16  *
  17  * Contact Information:
  18  * wlanfae <wlanfae@realtek.com>
  19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20  * Hsinchu 300, Taiwan.
  21  *
  22  * Larry Finger <Larry.Finger@lwfinger.net>
  23  *
  24  *****************************************************************************/
  25
  26 #ifndef __RTL92C_PHY_H__
  27 #define __RTL92C_PHY_H__
  28
  29 #define MAX_PRECMD_CNT                  16
  30 #define MAX_RFDEPENDCMD_CNT             16
  31 #define MAX_POSTCMD_CNT                 16
  32
  33 #define MAX_DOZE_WAITING_TIMES_9x       64
  34
  35 #define RT_CANNOT_IO(hw)                false
  36 #define HIGHPOWER_RADIOA_ARRAYLEN       22
  37
  38 #define MAX_TOLERANCE                   5
  39
  40 #define APK_BB_REG_NUM                  5
  41 #define APK_AFE_REG_NUM                 16
  42 #define APK_CURVE_REG_NUM               4
  43 #define PATH_NUM                        2
  44
  45 #define LOOP_LIMIT                      5
  46 #define MAX_STALL_TIME                  50
  47 #define AntennaDiversityValue           0x80
  48 #define MAX_TXPWR_IDX_NMODE_92S         63
  49 #define Reset_Cnt_Limit                 3
  50
  51 #define IQK_ADDA_REG_NUM                16
  52 #define IQK_MAC_REG_NUM                 4
  53
  54 #define IQK_DELAY_TIME                  1
  55
  56 #define RF90_PATH_MAX                   2
  57
  58 #define CT_OFFSET_MAC_ADDR              0X16
  59
  60 #define CT_OFFSET_CCK_TX_PWR_IDX        0x5A
  61 #define CT_OFFSET_HT401S_TX_PWR_IDX     0x60
  62 #define CT_OFFSET_HT402S_TX_PWR_IDX_DIF 0x66
  63 #define CT_OFFSET_HT20_TX_PWR_IDX_DIFF  0x69
  64 #define CT_OFFSET_OFDM_TX_PWR_IDX_DIFF  0x6C
  65
  66 #define CT_OFFSET_HT40_MAX_PWR_OFFSET   0x6F
  67 #define CT_OFFSET_HT20_MAX_PWR_OFFSET   0x72
  68
  69 #define CT_OFFSET_CHANNEL_PLAH          0x75
  70 #define CT_OFFSET_THERMAL_METER         0x78
  71 #define CT_OFFSET_RF_OPTION             0x79
  72 #define CT_OFFSET_VERSION               0x7E
  73 #define CT_OFFSET_CUSTOMER_ID           0x7F
  74
  75 #define RTL92C_MAX_PATH_NUM             2
  76
  77 bool rtl92c_phy_bb_config(struct ieee80211_hw *hw);
  78 u32 rtl92c_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask);
  79 void rtl92c_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask,
  80                            u32 data);
  81 u32 rtl92c_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
  82                             u32 regaddr, u32 bitmask);
  83 void rtl92ce_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
  84                             u32 regaddr, u32 bitmask, u32 data);
  85 bool rtl92c_phy_mac_config(struct ieee80211_hw *hw);
  86 bool rtl92ce_phy_bb_config(struct ieee80211_hw *hw);
  87 bool rtl92c_phy_rf_config(struct ieee80211_hw *hw);
  88 bool rtl92c_phy_config_rf_with_feaderfile(struct ieee80211_hw *hw,
  89                                           enum radio_path rfpath);
  90 void rtl92c_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
  91 void rtl92c_phy_get_txpower_level(struct ieee80211_hw *hw, long *powerlevel);
  92 void rtl92c_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel);
  93 bool rtl92c_phy_update_txpower_dbm(struct ieee80211_hw *hw,
  94                                           long power_indbm);
  95 void rtl92c_phy_set_bw_mode(struct ieee80211_hw *hw,
  96                             enum nl80211_channel_type ch_type);
  97 void rtl92c_phy_sw_chnl_callback(struct ieee80211_hw *hw);
  98 u8 rtl92c_phy_sw_chnl(struct ieee80211_hw *hw);
  99 void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool b_recovery);
 100 void rtl92c_phy_set_beacon_hw_reg(struct ieee80211_hw *hw, u16 beaconinterval);
 101 void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, s8 delta);
 102 void rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw);
 103 void _rtl92ce_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t);
 104 void rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain);
 105 bool rtl92c_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
 106                                           enum radio_path rfpath);
 107 bool rtl8192_phy_check_is_legal_rfpath(struct ieee80211_hw *hw,
 108                                        u32 rfpath);
 109 bool rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
 110                                     enum rf_pwrstate rfpwr_state);
 111 void rtl92ce_phy_set_rf_on(struct ieee80211_hw *hw);
 112 bool rtl92c_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
 113 void rtl92c_phy_set_io(struct ieee80211_hw *hw);
 114 void rtl92c_bb_block_on(struct ieee80211_hw *hw);
 115 u32 _rtl92c_phy_rf_serial_read(struct ieee80211_hw *hw, enum radio_path rfpath,
 116                                u32 offset);
 117 u32 _rtl92c_phy_fw_rf_serial_read(struct ieee80211_hw *hw,
 118                                   enum radio_path rfpath, u32 offset);
 119 u32 _rtl92c_phy_calculate_bit_shift(u32 bitmask);
 120 void _rtl92c_phy_rf_serial_write(struct ieee80211_hw *hw,
 121                                  enum radio_path rfpath, u32 offset, u32 data);
 122 void _rtl92c_phy_fw_rf_serial_write(struct ieee80211_hw *hw,
 123                                     enum radio_path rfpath, u32 offset,
 124                                     u32 data);
 125 void _rtl92c_store_pwrIndex_diffrate_offset(struct ieee80211_hw *hw,
 126                                             u32 regaddr, u32 bitmask, u32 data);
 127 bool _rtl92ce_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);
 128 void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw);
 129 bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw);
 130 void _rtl92c_phy_set_rf_sleep(struct ieee80211_hw *hw);
 131 bool rtl92c_phy_set_rf_power_state(struct ieee80211_hw *hw,
 132                                    enum rf_pwrstate rfpwr_state);
 133 bool _rtl92ce_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
 134                                             u8 configtype);
 135 bool _rtl92ce_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw,
 136                                               u8 configtype);
 137 void rtl92ce_phy_set_bw_mode_callback(struct ieee80211_hw *hw);
 138
 139 #endif