2 * Copyright (c) 2017 Redpine Signals Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 /* Device Operating modes */
21 #define DEV_OPMODE_WIFI_ALONE 1
22 #define DEV_OPMODE_BT_ALONE 4
23 #define DEV_OPMODE_BT_LE_ALONE 8
24 #define DEV_OPMODE_BT_DUAL 12
25 #define DEV_OPMODE_STA_BT 5
26 #define DEV_OPMODE_STA_BT_LE 9
27 #define DEV_OPMODE_STA_BT_DUAL 13
28 #define DEV_OPMODE_AP_BT 6
29 #define DEV_OPMODE_AP_BT_DUAL 14
31 #define DEV_OPMODE_PARAM_DESC \
32 __stringify(DEV_OPMODE_WIFI_ALONE) "[Wi-Fi alone], " \
33 __stringify(DEV_OPMODE_BT_ALONE) "[BT classic alone], " \
34 __stringify(DEV_OPMODE_BT_LE_ALONE) "[BT LE alone], " \
35 __stringify(DEV_OPMODE_BT_DUAL) "[BT classic + BT LE alone], " \
36 __stringify(DEV_OPMODE_STA_BT) "[Wi-Fi STA + BT classic], " \
37 __stringify(DEV_OPMODE_STA_BT_LE) "[Wi-Fi STA + BT LE], " \
38 __stringify(DEV_OPMODE_STA_BT_DUAL) "[Wi-Fi STA + BT classic + BT LE], " \
39 __stringify(DEV_OPMODE_AP_BT) "[Wi-Fi AP + BT classic], " \
40 __stringify(DEV_OPMODE_AP_BT_DUAL) "[Wi-Fi AP + BT classic + BT LE]"
42 #define FLASH_WRITE_CHUNK_SIZE (4 * 1024)
43 #define FLASH_SECTOR_SIZE (4 * 1024)
45 #define FLASH_SIZE_ADDR 0x04000016
46 #define PING_BUFFER_ADDRESS 0x19000
47 #define PONG_BUFFER_ADDRESS 0x1a000
48 #define SWBL_REGIN 0x41050034
49 #define SWBL_REGOUT 0x4105003c
50 #define PING_WRITE 0x1
51 #define PONG_WRITE 0x2
53 #define BL_CMD_TIMEOUT 2000
54 #define BL_BURN_TIMEOUT (50 * 1000)
56 #define REGIN_VALID 0xA
57 #define REGIN_INPUT 0xA0
58 #define REGOUT_VALID 0xAB
59 #define REGOUT_INVALID (~0xAB)
63 #define LOAD_HOSTED_FW 'A'
64 #define BURN_HOSTED_FW 'B'
65 #define PING_VALID 'I'
66 #define PONG_VALID 'O'
67 #define PING_AVAIL 'I'
68 #define PONG_AVAIL 'O'
69 #define EOF_REACHED 'E'
71 #define POLLING_MODE 'P'
72 #define CONFIG_AUTO_READ_MODE 'R'
73 #define JUMP_TO_ZERO_PC 'J'
74 #define FW_LOADING_SUCCESSFUL 'S'
75 #define LOADING_INITIATED '1'
77 #define RSI_ULP_RESET_REG 0x161
78 #define RSI_WATCH_DOG_TIMER_1 0x16c
79 #define RSI_WATCH_DOG_TIMER_2 0x16d
80 #define RSI_WATCH_DOG_DELAY_TIMER_1 0x16e
81 #define RSI_WATCH_DOG_DELAY_TIMER_2 0x16f
82 #define RSI_WATCH_DOG_TIMER_ENABLE 0x170
84 #define RSI_ULP_WRITE_0 00
85 #define RSI_ULP_WRITE_2 02
86 #define RSI_ULP_WRITE_50 50
88 #define RSI_RESTART_WDT BIT(11)
89 #define RSI_BYPASS_ULP_ON_WDT BIT(1)
91 #define RSI_ULP_TIMER_ENABLE ((0xaa000) | RSI_RESTART_WDT | \
92 RSI_BYPASS_ULP_ON_WDT)
93 #define RSI_RF_SPI_PROG_REG_BASE_ADDR 0x40080000
95 #define RSI_GSPI_CTRL_REG0 (RSI_RF_SPI_PROG_REG_BASE_ADDR)
96 #define RSI_GSPI_CTRL_REG1 (RSI_RF_SPI_PROG_REG_BASE_ADDR + 0x2)
97 #define RSI_GSPI_DATA_REG0 (RSI_RF_SPI_PROG_REG_BASE_ADDR + 0x4)
98 #define RSI_GSPI_DATA_REG1 (RSI_RF_SPI_PROG_REG_BASE_ADDR + 0x6)
99 #define RSI_GSPI_DATA_REG2 (RSI_RF_SPI_PROG_REG_BASE_ADDR + 0x8)
101 #define RSI_GSPI_CTRL_REG0_VALUE 0x340
103 #define RSI_GSPI_DMA_MODE BIT(13)
105 #define RSI_GSPI_2_ULP BIT(12)
106 #define RSI_GSPI_TRIG BIT(7)
107 #define RSI_GSPI_READ BIT(6)
108 #define RSI_GSPI_RF_SPI_ACTIVE BIT(8)
110 /* Boot loader commands */
111 #define SEND_RPS_FILE '2'
113 #define FW_IMAGE_MIN_ADDRESS (68 * 1024)
114 #define MAX_FLASH_FILE_SIZE (400 * 1024) //400K
115 #define FLASH_START_ADDRESS 16
117 #define COMMON_HAL_CARD_READY_IND 0x0
119 #define COMMAN_HAL_WAIT_FOR_CARD_READY 1
121 #define RSI_DEV_OPMODE_WIFI_ALONE 1
122 #define RSI_DEV_COEX_MODE_WIFI_ALONE 1
124 #define BBP_INFO_40MHZ 0x6
126 #define FW_FLASH_OFFSET 0x820
127 #define LMAC_VER_OFFSET (FW_FLASH_OFFSET + 0x200)
128 #define MAX_DWORD_ALIGN_BYTES 64
129 #define RSI_COMMON_REG_SIZE 2
135 __le32 flash_start_address;
141 unsigned int address;
144 struct rsi_mgmt_desc {
158 struct rsi_data_desc {
181 int rsi_hal_device_init(struct rsi_hw *adapter);
182 int rsi_prepare_mgmt_desc(struct rsi_common *common, struct sk_buff *skb);
183 int rsi_prepare_data_desc(struct rsi_common *common, struct sk_buff *skb);
184 int rsi_prepare_beacon(struct rsi_common *common, struct sk_buff *skb);
185 int rsi_send_pkt_to_bus(struct rsi_common *common, struct sk_buff *skb);
186 int rsi_send_bt_pkt(struct rsi_common *common, struct sk_buff *skb);