drivers/nfc/pn544/i2c.c

   1 /*
   2  * I2C Link Layer for PN544 HCI based Driver
   3  *
   4  * Copyright (C) 2012  Intel Corporation. All rights reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, see <http://www.gnu.org/licenses/>.
  17  */
  18
  19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  20
  21 #include <linux/crc-ccitt.h>
  22 #include <linux/module.h>
  23 #include <linux/i2c.h>
  24 #include <linux/gpio.h>
  25 #include <linux/of_gpio.h>
  26 #include <linux/of_irq.h>
  27 #include <linux/acpi.h>
  28 #include <linux/miscdevice.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/delay.h>
  31 #include <linux/nfc.h>
  32 #include <linux/firmware.h>
  33 #include <linux/gpio/consumer.h>
  34 #include <linux/platform_data/pn544.h>
  35 #include <asm/unaligned.h>
  36
  37 #include <net/nfc/hci.h>
  38 #include <net/nfc/llc.h>
  39 #include <net/nfc/nfc.h>
  40
  41 #include "pn544.h"
  42
  43 #define PN544_I2C_FRAME_HEADROOM 1
  44 #define PN544_I2C_FRAME_TAILROOM 2
  45
  46 /* GPIO names */
  47 #define PN544_GPIO_NAME_IRQ "pn544_irq"
  48 #define PN544_GPIO_NAME_FW  "pn544_fw"
  49 #define PN544_GPIO_NAME_EN  "pn544_en"
  50
  51 /* framing in HCI mode */
  52 #define PN544_HCI_I2C_LLC_LEN           1
  53 #define PN544_HCI_I2C_LLC_CRC           2
  54 #define PN544_HCI_I2C_LLC_LEN_CRC       (PN544_HCI_I2C_LLC_LEN + \
  55                                          PN544_HCI_I2C_LLC_CRC)
  56 #define PN544_HCI_I2C_LLC_MIN_SIZE      (1 + PN544_HCI_I2C_LLC_LEN_CRC)
  57 #define PN544_HCI_I2C_LLC_MAX_PAYLOAD   29
  58 #define PN544_HCI_I2C_LLC_MAX_SIZE      (PN544_HCI_I2C_LLC_LEN_CRC + 1 + \
  59                                          PN544_HCI_I2C_LLC_MAX_PAYLOAD)
  60
  61 static struct i2c_device_id pn544_hci_i2c_id_table[] = {
  62         {"pn544", 0},
  63         {}
  64 };
  65
  66 MODULE_DEVICE_TABLE(i2c, pn544_hci_i2c_id_table);
  67
  68 static const struct acpi_device_id pn544_hci_i2c_acpi_match[] = {
  69         {"NXP5440", 0},
  70         {}
  71 };
  72
  73 MODULE_DEVICE_TABLE(acpi, pn544_hci_i2c_acpi_match);
  74
  75 #define PN544_HCI_I2C_DRIVER_NAME "pn544_hci_i2c"
  76
  77 /*
  78  * Exposed through the 4 most significant bytes
  79  * from the HCI SW_VERSION first byte, a.k.a.
  80  * SW RomLib.
  81  */
  82 #define PN544_HW_VARIANT_C2 0xa
  83 #define PN544_HW_VARIANT_C3 0xb
  84
  85 #define PN544_FW_CMD_RESET 0x01
  86 #define PN544_FW_CMD_WRITE 0x08
  87 #define PN544_FW_CMD_CHECK 0x06
  88 #define PN544_FW_CMD_SECURE_WRITE 0x0C
  89 #define PN544_FW_CMD_SECURE_CHUNK_WRITE 0x0D
  90
  91 struct pn544_i2c_fw_frame_write {
  92         u8 cmd;
  93         u16 be_length;
  94         u8 be_dest_addr[3];
  95         u16 be_datalen;
  96         u8 data[];
  97 } __packed;
  98
  99 struct pn544_i2c_fw_frame_check {
 100         u8 cmd;
 101         u16 be_length;
 102         u8 be_start_addr[3];
 103         u16 be_datalen;
 104         u16 be_crc;
 105 } __packed;
 106
 107 struct pn544_i2c_fw_frame_response {
 108         u8 status;
 109         u16 be_length;
 110 } __packed;
 111
 112 struct pn544_i2c_fw_blob {
 113         u32 be_size;
 114         u32 be_destaddr;
 115         u8 data[];
 116 };
 117
 118 struct pn544_i2c_fw_secure_frame {
 119         u8 cmd;
 120         u16 be_datalen;
 121         u8 data[];
 122 } __packed;
 123
 124 struct pn544_i2c_fw_secure_blob {
 125         u64 header;
 126         u8 data[];
 127 };
 128
 129 #define PN544_FW_CMD_RESULT_TIMEOUT 0x01
 130 #define PN544_FW_CMD_RESULT_BAD_CRC 0x02
 131 #define PN544_FW_CMD_RESULT_ACCESS_DENIED 0x08
 132 #define PN544_FW_CMD_RESULT_PROTOCOL_ERROR 0x0B
 133 #define PN544_FW_CMD_RESULT_INVALID_PARAMETER 0x11
 134 #define PN544_FW_CMD_RESULT_UNSUPPORTED_COMMAND 0x13
 135 #define PN544_FW_CMD_RESULT_INVALID_LENGTH 0x18
 136 #define PN544_FW_CMD_RESULT_CRYPTOGRAPHIC_ERROR 0x19
 137 #define PN544_FW_CMD_RESULT_VERSION_CONDITIONS_ERROR 0x1D
 138 #define PN544_FW_CMD_RESULT_MEMORY_ERROR 0x20
 139 #define PN544_FW_CMD_RESULT_CHUNK_OK 0x21
 140 #define PN544_FW_CMD_RESULT_WRITE_FAILED 0x74
 141 #define PN544_FW_CMD_RESULT_COMMAND_REJECTED 0xE0
 142 #define PN544_FW_CMD_RESULT_CHUNK_ERROR 0xE6
 143
 144 #define MIN(X, Y) ((X) < (Y) ? (X) : (Y))
 145
 146 #define PN544_FW_WRITE_BUFFER_MAX_LEN 0x9f7
 147 #define PN544_FW_I2C_MAX_PAYLOAD PN544_HCI_I2C_LLC_MAX_SIZE
 148 #define PN544_FW_I2C_WRITE_FRAME_HEADER_LEN 8
 149 #define PN544_FW_I2C_WRITE_DATA_MAX_LEN MIN((PN544_FW_I2C_MAX_PAYLOAD -\
 150                                          PN544_FW_I2C_WRITE_FRAME_HEADER_LEN),\
 151                                          PN544_FW_WRITE_BUFFER_MAX_LEN)
 152 #define PN544_FW_SECURE_CHUNK_WRITE_HEADER_LEN 3
 153 #define PN544_FW_SECURE_CHUNK_WRITE_DATA_MAX_LEN (PN544_FW_I2C_MAX_PAYLOAD -\
 154                         PN544_FW_SECURE_CHUNK_WRITE_HEADER_LEN)
 155 #define PN544_FW_SECURE_FRAME_HEADER_LEN 3
 156 #define PN544_FW_SECURE_BLOB_HEADER_LEN 8
 157
 158 #define FW_WORK_STATE_IDLE 1
 159 #define FW_WORK_STATE_START 2
 160 #define FW_WORK_STATE_WAIT_WRITE_ANSWER 3
 161 #define FW_WORK_STATE_WAIT_CHECK_ANSWER 4
 162 #define FW_WORK_STATE_WAIT_SECURE_WRITE_ANSWER 5
 163
 164 struct pn544_i2c_phy {
 165         struct i2c_client *i2c_dev;
 166         struct nfc_hci_dev *hdev;
 167
 168         unsigned int gpio_en;
 169         unsigned int gpio_irq;
 170         unsigned int gpio_fw;
 171         unsigned int en_polarity;
 172
 173         u8 hw_variant;
 174
 175         struct work_struct fw_work;
 176         int fw_work_state;
 177         char firmware_name[NFC_FIRMWARE_NAME_MAXSIZE + 1];
 178         const struct firmware *fw;
 179         u32 fw_blob_dest_addr;
 180         size_t fw_blob_size;
 181         const u8 *fw_blob_data;
 182         size_t fw_written;
 183         size_t fw_size;
 184
 185         int fw_cmd_result;
 186
 187         int powered;
 188         int run_mode;
 189
 190         int hard_fault;         /*
 191                                  * < 0 if hardware error occured (e.g. i2c err)
 192                                  * and prevents normal operation.
 193                                  */
 194 };
 195
 196 #define I2C_DUMP_SKB(info, skb)                                 \
 197 do {                                                            \
 198         pr_debug("%s:\n", info);                                \
 199         print_hex_dump(KERN_DEBUG, "i2c: ", DUMP_PREFIX_OFFSET, \
 200                        16, 1, (skb)->data, (skb)->len, 0);      \
 201 } while (0)
 202
 203 static void pn544_hci_i2c_platform_init(struct pn544_i2c_phy *phy)
 204 {
 205         int polarity, retry, ret;
 206         char rset_cmd[] = { 0x05, 0xF9, 0x04, 0x00, 0xC3, 0xE5 };
 207         int count = sizeof(rset_cmd);
 208
 209         nfc_info(&phy->i2c_dev->dev, "Detecting nfc_en polarity\n");
 210
 211         /* Disable fw download */
 212         gpio_set_value_cansleep(phy->gpio_fw, 0);
 213
 214         for (polarity = 0; polarity < 2; polarity++) {
 215                 phy->en_polarity = polarity;
 216                 retry = 3;
 217                 while (retry--) {
 218                         /* power off */
 219                         gpio_set_value_cansleep(phy->gpio_en,
 220                                                 !phy->en_polarity);
 221                         usleep_range(10000, 15000);
 222
 223                         /* power on */
 224                         gpio_set_value_cansleep(phy->gpio_en, phy->en_polarity);
 225                         usleep_range(10000, 15000);
 226
 227                         /* send reset */
 228                         dev_dbg(&phy->i2c_dev->dev, "Sending reset cmd\n");
 229                         ret = i2c_master_send(phy->i2c_dev, rset_cmd, count);
 230                         if (ret == count) {
 231                                 nfc_info(&phy->i2c_dev->dev,
 232                                          "nfc_en polarity : active %s\n",
 233                                          (polarity == 0 ? "low" : "high"));
 234                                 goto out;
 235                         }
 236                 }
 237         }
 238
 239         nfc_err(&phy->i2c_dev->dev,
 240                 "Could not detect nfc_en polarity, fallback to active high\n");
 241
 242 out:
 243         gpio_set_value_cansleep(phy->gpio_en, !phy->en_polarity);
 244         usleep_range(10000, 15000);
 245 }
 246
 247 static void pn544_hci_i2c_enable_mode(struct pn544_i2c_phy *phy, int run_mode)
 248 {
 249         gpio_set_value_cansleep(phy->gpio_fw,
 250                                 run_mode == PN544_FW_MODE ? 1 : 0);
 251         gpio_set_value_cansleep(phy->gpio_en, phy->en_polarity);
 252         usleep_range(10000, 15000);
 253
 254         phy->run_mode = run_mode;
 255 }
 256
 257 static int pn544_hci_i2c_enable(void *phy_id)
 258 {
 259         struct pn544_i2c_phy *phy = phy_id;
 260
 261         pr_info("%s\n", __func__);
 262
 263         pn544_hci_i2c_enable_mode(phy, PN544_HCI_MODE);
 264
 265         phy->powered = 1;
 266
 267         return 0;
 268 }
 269
 270 static void pn544_hci_i2c_disable(void *phy_id)
 271 {
 272         struct pn544_i2c_phy *phy = phy_id;
 273
 274         gpio_set_value_cansleep(phy->gpio_fw, 0);
 275         gpio_set_value_cansleep(phy->gpio_en, !phy->en_polarity);
 276         usleep_range(10000, 15000);
 277
 278         gpio_set_value_cansleep(phy->gpio_en, phy->en_polarity);
 279         usleep_range(10000, 15000);
 280
 281         gpio_set_value_cansleep(phy->gpio_en, !phy->en_polarity);
 282         usleep_range(10000, 15000);
 283
 284         phy->powered = 0;
 285 }
 286
 287 static void pn544_hci_i2c_add_len_crc(struct sk_buff *skb)
 288 {
 289         u16 crc;
 290         int len;
 291
 292         len = skb->len + 2;
 293         *skb_push(skb, 1) = len;
 294
 295         crc = crc_ccitt(0xffff, skb->data, skb->len);
 296         crc = ~crc;
 297         *skb_put(skb, 1) = crc & 0xff;
 298         *skb_put(skb, 1) = crc >> 8;
 299 }
 300
 301 static void pn544_hci_i2c_remove_len_crc(struct sk_buff *skb)
 302 {
 303         skb_pull(skb, PN544_I2C_FRAME_HEADROOM);
 304         skb_trim(skb, PN544_I2C_FRAME_TAILROOM);
 305 }
 306
 307 /*
 308  * Writing a frame must not return the number of written bytes.
 309  * It must return either zero for success, or <0 for error.
 310  * In addition, it must not alter the skb
 311  */
 312 static int pn544_hci_i2c_write(void *phy_id, struct sk_buff *skb)
 313 {
 314         int r;
 315         struct pn544_i2c_phy *phy = phy_id;
 316         struct i2c_client *client = phy->i2c_dev;
 317
 318         if (phy->hard_fault != 0)
 319                 return phy->hard_fault;
 320
 321         usleep_range(3000, 6000);
 322
 323         pn544_hci_i2c_add_len_crc(skb);
 324
 325         I2C_DUMP_SKB("i2c frame written", skb);
 326
 327         r = i2c_master_send(client, skb->data, skb->len);
 328
 329         if (r == -EREMOTEIO) {  /* Retry, chip was in standby */
 330                 usleep_range(6000, 10000);
 331                 r = i2c_master_send(client, skb->data, skb->len);
 332         }
 333
 334         if (r >= 0) {
 335                 if (r != skb->len)
 336                         r = -EREMOTEIO;
 337                 else
 338                         r = 0;
 339         }
 340
 341         pn544_hci_i2c_remove_len_crc(skb);
 342
 343         return r;
 344 }
 345
 346 static int check_crc(u8 *buf, int buflen)
 347 {
 348         int len;
 349         u16 crc;
 350
 351         len = buf[0] + 1;
 352         crc = crc_ccitt(0xffff, buf, len - 2);
 353         crc = ~crc;
 354
 355         if (buf[len - 2] != (crc & 0xff) || buf[len - 1] != (crc >> 8)) {
 356                 pr_err("CRC error 0x%x != 0x%x 0x%x\n",
 357                        crc, buf[len - 1], buf[len - 2]);
 358                 pr_info("%s: BAD CRC\n", __func__);
 359                 print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE,
 360                                16, 2, buf, buflen, false);
 361                 return -EPERM;
 362         }
 363         return 0;
 364 }
 365
 366 /*
 367  * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees
 368  * that i2c bus will be flushed and that next read will start on a new frame.
 369  * returned skb contains only LLC header and payload.
 370  * returns:
 371  * -EREMOTEIO : i2c read error (fatal)
 372  * -EBADMSG : frame was incorrect and discarded
 373  * -ENOMEM : cannot allocate skb, frame dropped
 374  */
 375 static int pn544_hci_i2c_read(struct pn544_i2c_phy *phy, struct sk_buff **skb)
 376 {
 377         int r;
 378         u8 len;
 379         u8 tmp[PN544_HCI_I2C_LLC_MAX_SIZE - 1];
 380         struct i2c_client *client = phy->i2c_dev;
 381
 382         r = i2c_master_recv(client, &len, 1);
 383         if (r != 1) {
 384                 nfc_err(&client->dev, "cannot read len byte\n");
 385                 return -EREMOTEIO;
 386         }
 387
 388         if ((len < (PN544_HCI_I2C_LLC_MIN_SIZE - 1)) ||
 389             (len > (PN544_HCI_I2C_LLC_MAX_SIZE - 1))) {
 390                 nfc_err(&client->dev, "invalid len byte\n");
 391                 r = -EBADMSG;
 392                 goto flush;
 393         }
 394
 395         *skb = alloc_skb(1 + len, GFP_KERNEL);
 396         if (*skb == NULL) {
 397                 r = -ENOMEM;
 398                 goto flush;
 399         }
 400
 401         *skb_put(*skb, 1) = len;
 402
 403         r = i2c_master_recv(client, skb_put(*skb, len), len);
 404         if (r != len) {
 405                 kfree_skb(*skb);
 406                 return -EREMOTEIO;
 407         }
 408
 409         I2C_DUMP_SKB("i2c frame read", *skb);
 410
 411         r = check_crc((*skb)->data, (*skb)->len);
 412         if (r != 0) {
 413                 kfree_skb(*skb);
 414                 r = -EBADMSG;
 415                 goto flush;
 416         }
 417
 418         skb_pull(*skb, 1);
 419         skb_trim(*skb, (*skb)->len - 2);
 420
 421         usleep_range(3000, 6000);
 422
 423         return 0;
 424
 425 flush:
 426         if (i2c_master_recv(client, tmp, sizeof(tmp)) < 0)
 427                 r = -EREMOTEIO;
 428
 429         usleep_range(3000, 6000);
 430
 431         return r;
 432 }
 433
 434 static int pn544_hci_i2c_fw_read_status(struct pn544_i2c_phy *phy)
 435 {
 436         int r;
 437         struct pn544_i2c_fw_frame_response response;
 438         struct i2c_client *client = phy->i2c_dev;
 439
 440         r = i2c_master_recv(client, (char *) &response, sizeof(response));
 441         if (r != sizeof(response)) {
 442                 nfc_err(&client->dev, "cannot read fw status\n");
 443                 return -EIO;
 444         }
 445
 446         usleep_range(3000, 6000);
 447
 448         switch (response.status) {
 449         case 0:
 450                 return 0;
 451         case PN544_FW_CMD_RESULT_CHUNK_OK:
 452                 return response.status;
 453         case PN544_FW_CMD_RESULT_TIMEOUT:
 454                 return -ETIMEDOUT;
 455         case PN544_FW_CMD_RESULT_BAD_CRC:
 456                 return -ENODATA;
 457         case PN544_FW_CMD_RESULT_ACCESS_DENIED:
 458                 return -EACCES;
 459         case PN544_FW_CMD_RESULT_PROTOCOL_ERROR:
 460                 return -EPROTO;
 461         case PN544_FW_CMD_RESULT_INVALID_PARAMETER:
 462                 return -EINVAL;
 463         case PN544_FW_CMD_RESULT_UNSUPPORTED_COMMAND:
 464                 return -ENOTSUPP;
 465         case PN544_FW_CMD_RESULT_INVALID_LENGTH:
 466                 return -EBADMSG;
 467         case PN544_FW_CMD_RESULT_CRYPTOGRAPHIC_ERROR:
 468                 return -ENOKEY;
 469         case PN544_FW_CMD_RESULT_VERSION_CONDITIONS_ERROR:
 470                 return -EINVAL;
 471         case PN544_FW_CMD_RESULT_MEMORY_ERROR:
 472                 return -ENOMEM;
 473         case PN544_FW_CMD_RESULT_COMMAND_REJECTED:
 474                 return -EACCES;
 475         case PN544_FW_CMD_RESULT_WRITE_FAILED:
 476         case PN544_FW_CMD_RESULT_CHUNK_ERROR:
 477                 return -EIO;
 478         default:
 479                 return -EIO;
 480         }
 481 }
 482
 483 /*
 484  * Reads an shdlc frame from the chip. This is not as straightforward as it
 485  * seems. There are cases where we could loose the frame start synchronization.
 486  * The frame format is len-data-crc, and corruption can occur anywhere while
 487  * transiting on i2c bus, such that we could read an invalid len.
 488  * In order to recover synchronization with the next frame, we must be sure
 489  * to read the real amount of data without using the len byte. We do this by
 490  * assuming the following:
 491  * - the chip will always present only one single complete frame on the bus
 492  *   before triggering the interrupt
 493  * - the chip will not present a new frame until we have completely read
 494  *   the previous one (or until we have handled the interrupt).
 495  * The tricky case is when we read a corrupted len that is less than the real
 496  * len. We must detect this here in order to determine that we need to flush
 497  * the bus. This is the reason why we check the crc here.
 498  */
 499 static irqreturn_t pn544_hci_i2c_irq_thread_fn(int irq, void *phy_id)
 500 {
 501         struct pn544_i2c_phy *phy = phy_id;
 502         struct i2c_client *client;
 503         struct sk_buff *skb = NULL;
 504         int r;
 505
 506         if (!phy || irq != phy->i2c_dev->irq) {
 507                 WARN_ON_ONCE(1);
 508                 return IRQ_NONE;
 509         }
 510
 511         client = phy->i2c_dev;
 512         dev_dbg(&client->dev, "IRQ\n");
 513
 514         if (phy->hard_fault != 0)
 515                 return IRQ_HANDLED;
 516
 517         if (phy->run_mode == PN544_FW_MODE) {
 518                 phy->fw_cmd_result = pn544_hci_i2c_fw_read_status(phy);
 519                 schedule_work(&phy->fw_work);
 520         } else {
 521                 r = pn544_hci_i2c_read(phy, &skb);
 522                 if (r == -EREMOTEIO) {
 523                         phy->hard_fault = r;
 524
 525                         nfc_hci_recv_frame(phy->hdev, NULL);
 526
 527                         return IRQ_HANDLED;
 528                 } else if ((r == -ENOMEM) || (r == -EBADMSG)) {
 529                         return IRQ_HANDLED;
 530                 }
 531
 532                 nfc_hci_recv_frame(phy->hdev, skb);
 533         }
 534         return IRQ_HANDLED;
 535 }
 536
 537 static struct nfc_phy_ops i2c_phy_ops = {
 538         .write = pn544_hci_i2c_write,
 539         .enable = pn544_hci_i2c_enable,
 540         .disable = pn544_hci_i2c_disable,
 541 };
 542
 543 static int pn544_hci_i2c_fw_download(void *phy_id, const char *firmware_name,
 544                                         u8 hw_variant)
 545 {
 546         struct pn544_i2c_phy *phy = phy_id;
 547
 548         pr_info("Starting Firmware Download (%s)\n", firmware_name);
 549
 550         strcpy(phy->firmware_name, firmware_name);
 551
 552         phy->hw_variant = hw_variant;
 553         phy->fw_work_state = FW_WORK_STATE_START;
 554
 555         schedule_work(&phy->fw_work);
 556
 557         return 0;
 558 }
 559
 560 static void pn544_hci_i2c_fw_work_complete(struct pn544_i2c_phy *phy,
 561                                            int result)
 562 {
 563         pr_info("Firmware Download Complete, result=%d\n", result);
 564
 565         pn544_hci_i2c_disable(phy);
 566
 567         phy->fw_work_state = FW_WORK_STATE_IDLE;
 568
 569         if (phy->fw) {
 570                 release_firmware(phy->fw);
 571                 phy->fw = NULL;
 572         }
 573
 574         nfc_fw_download_done(phy->hdev->ndev, phy->firmware_name, (u32) -result);
 575 }
 576
 577 static int pn544_hci_i2c_fw_write_cmd(struct i2c_client *client, u32 dest_addr,
 578                                       const u8 *data, u16 datalen)
 579 {
 580         u8 frame[PN544_FW_I2C_MAX_PAYLOAD];
 581         struct pn544_i2c_fw_frame_write *framep;
 582         u16 params_len;
 583         int framelen;
 584         int r;
 585
 586         if (datalen > PN544_FW_I2C_WRITE_DATA_MAX_LEN)
 587                 datalen = PN544_FW_I2C_WRITE_DATA_MAX_LEN;
 588
 589         framep = (struct pn544_i2c_fw_frame_write *) frame;
 590
 591         params_len = sizeof(framep->be_dest_addr) +
 592                      sizeof(framep->be_datalen) + datalen;
 593         framelen = params_len + sizeof(framep->cmd) +
 594                              sizeof(framep->be_length);
 595
 596         framep->cmd = PN544_FW_CMD_WRITE;
 597
 598         put_unaligned_be16(params_len, &framep->be_length);
 599
 600         framep->be_dest_addr[0] = (dest_addr & 0xff0000) >> 16;
 601         framep->be_dest_addr[1] = (dest_addr & 0xff00) >> 8;
 602         framep->be_dest_addr[2] = dest_addr & 0xff;
 603
 604         put_unaligned_be16(datalen, &framep->be_datalen);
 605
 606         memcpy(framep->data, data, datalen);
 607
 608         r = i2c_master_send(client, frame, framelen);
 609
 610         if (r == framelen)
 611                 return datalen;
 612         else if (r < 0)
 613                 return r;
 614         else
 615                 return -EIO;
 616 }
 617
 618 static int pn544_hci_i2c_fw_check_cmd(struct i2c_client *client, u32 start_addr,
 619                                       const u8 *data, u16 datalen)
 620 {
 621         struct pn544_i2c_fw_frame_check frame;
 622         int r;
 623         u16 crc;
 624
 625         /* calculate local crc for the data we want to check */
 626         crc = crc_ccitt(0xffff, data, datalen);
 627
 628         frame.cmd = PN544_FW_CMD_CHECK;
 629
 630         put_unaligned_be16(sizeof(frame.be_start_addr) +
 631                            sizeof(frame.be_datalen) + sizeof(frame.be_crc),
 632                            &frame.be_length);
 633
 634         /* tell the chip the memory region to which our crc applies */
 635         frame.be_start_addr[0] = (start_addr & 0xff0000) >> 16;
 636         frame.be_start_addr[1] = (start_addr & 0xff00) >> 8;
 637         frame.be_start_addr[2] = start_addr & 0xff;
 638
 639         put_unaligned_be16(datalen, &frame.be_datalen);
 640
 641         /*
 642          * and give our local crc. Chip will calculate its own crc for the
 643          * region and compare with ours.
 644          */
 645         put_unaligned_be16(crc, &frame.be_crc);
 646
 647         r = i2c_master_send(client, (const char *) &frame, sizeof(frame));
 648
 649         if (r == sizeof(frame))
 650                 return 0;
 651         else if (r < 0)
 652                 return r;
 653         else
 654                 return -EIO;
 655 }
 656
 657 static int pn544_hci_i2c_fw_write_chunk(struct pn544_i2c_phy *phy)
 658 {
 659         int r;
 660
 661         r = pn544_hci_i2c_fw_write_cmd(phy->i2c_dev,
 662                                        phy->fw_blob_dest_addr + phy->fw_written,
 663                                        phy->fw_blob_data + phy->fw_written,
 664                                        phy->fw_blob_size - phy->fw_written);
 665         if (r < 0)
 666                 return r;
 667
 668         phy->fw_written += r;
 669         phy->fw_work_state = FW_WORK_STATE_WAIT_WRITE_ANSWER;
 670
 671         return 0;
 672 }
 673
 674 static int pn544_hci_i2c_fw_secure_write_frame_cmd(struct pn544_i2c_phy *phy,
 675                                         const u8 *data, u16 datalen)
 676 {
 677         u8 buf[PN544_FW_I2C_MAX_PAYLOAD];
 678         struct pn544_i2c_fw_secure_frame *chunk;
 679         int chunklen;
 680         int r;
 681
 682         if (datalen > PN544_FW_SECURE_CHUNK_WRITE_DATA_MAX_LEN)
 683                 datalen = PN544_FW_SECURE_CHUNK_WRITE_DATA_MAX_LEN;
 684
 685         chunk = (struct pn544_i2c_fw_secure_frame *) buf;
 686
 687         chunk->cmd = PN544_FW_CMD_SECURE_CHUNK_WRITE;
 688
 689         put_unaligned_be16(datalen, &chunk->be_datalen);
 690
 691         memcpy(chunk->data, data, datalen);
 692
 693         chunklen = sizeof(chunk->cmd) + sizeof(chunk->be_datalen) + datalen;
 694
 695         r = i2c_master_send(phy->i2c_dev, buf, chunklen);
 696
 697         if (r == chunklen)
 698                 return datalen;
 699         else if (r < 0)
 700                 return r;
 701         else
 702                 return -EIO;
 703
 704 }
 705
 706 static int pn544_hci_i2c_fw_secure_write_frame(struct pn544_i2c_phy *phy)
 707 {
 708         struct pn544_i2c_fw_secure_frame *framep;
 709         int r;
 710
 711         framep = (struct pn544_i2c_fw_secure_frame *) phy->fw_blob_data;
 712         if (phy->fw_written == 0)
 713                 phy->fw_blob_size = get_unaligned_be16(&framep->be_datalen)
 714                                 + PN544_FW_SECURE_FRAME_HEADER_LEN;
 715
 716         /* Only secure write command can be chunked*/
 717         if (phy->fw_blob_size > PN544_FW_I2C_MAX_PAYLOAD &&
 718                         framep->cmd != PN544_FW_CMD_SECURE_WRITE)
 719                 return -EINVAL;
 720
 721         /* The firmware also have other commands, we just send them directly */
 722         if (phy->fw_blob_size < PN544_FW_I2C_MAX_PAYLOAD) {
 723                 r = i2c_master_send(phy->i2c_dev,
 724                         (const char *) phy->fw_blob_data, phy->fw_blob_size);
 725
 726                 if (r == phy->fw_blob_size)
 727                         goto exit;
 728                 else if (r < 0)
 729                         return r;
 730                 else
 731                         return -EIO;
 732         }
 733
 734         r = pn544_hci_i2c_fw_secure_write_frame_cmd(phy,
 735                                        phy->fw_blob_data + phy->fw_written,
 736                                        phy->fw_blob_size - phy->fw_written);
 737         if (r < 0)
 738                 return r;
 739
 740 exit:
 741         phy->fw_written += r;
 742         phy->fw_work_state = FW_WORK_STATE_WAIT_SECURE_WRITE_ANSWER;
 743
 744         /* SW reset command will not trig any response from PN544 */
 745         if (framep->cmd == PN544_FW_CMD_RESET) {
 746                 pn544_hci_i2c_enable_mode(phy, PN544_FW_MODE);
 747                 phy->fw_cmd_result = 0;
 748                 schedule_work(&phy->fw_work);
 749         }
 750
 751         return 0;
 752 }
 753
 754 static void pn544_hci_i2c_fw_work(struct work_struct *work)
 755 {
 756         struct pn544_i2c_phy *phy = container_of(work, struct pn544_i2c_phy,
 757                                                 fw_work);
 758         int r;
 759         struct pn544_i2c_fw_blob *blob;
 760         struct pn544_i2c_fw_secure_blob *secure_blob;
 761
 762         switch (phy->fw_work_state) {
 763         case FW_WORK_STATE_START:
 764                 pn544_hci_i2c_enable_mode(phy, PN544_FW_MODE);
 765
 766                 r = reject_firmware(&phy->fw, phy->firmware_name,
 767                                      &phy->i2c_dev->dev);
 768                 if (r < 0)
 769                         goto exit_state_start;
 770
 771                 phy->fw_written = 0;
 772
 773                 switch (phy->hw_variant) {
 774                 case PN544_HW_VARIANT_C2:
 775                         blob = (struct pn544_i2c_fw_blob *) phy->fw->data;
 776                         phy->fw_blob_size = get_unaligned_be32(&blob->be_size);
 777                         phy->fw_blob_dest_addr = get_unaligned_be32(
 778                                                         &blob->be_destaddr);
 779                         phy->fw_blob_data = blob->data;
 780
 781                         r = pn544_hci_i2c_fw_write_chunk(phy);
 782                         break;
 783                 case PN544_HW_VARIANT_C3:
 784                         secure_blob = (struct pn544_i2c_fw_secure_blob *)
 785                                                                 phy->fw->data;
 786                         phy->fw_blob_data = secure_blob->data;
 787                         phy->fw_size = phy->fw->size;
 788                         r = pn544_hci_i2c_fw_secure_write_frame(phy);
 789                         break;
 790                 default:
 791                         r = -ENOTSUPP;
 792                         break;
 793                 }
 794
 795 exit_state_start:
 796                 if (r < 0)
 797                         pn544_hci_i2c_fw_work_complete(phy, r);
 798                 break;
 799
 800         case FW_WORK_STATE_WAIT_WRITE_ANSWER:
 801                 r = phy->fw_cmd_result;
 802                 if (r < 0)
 803                         goto exit_state_wait_write_answer;
 804
 805                 if (phy->fw_written == phy->fw_blob_size) {
 806                         r = pn544_hci_i2c_fw_check_cmd(phy->i2c_dev,
 807                                                        phy->fw_blob_dest_addr,
 808                                                        phy->fw_blob_data,
 809                                                        phy->fw_blob_size);
 810                         if (r < 0)
 811                                 goto exit_state_wait_write_answer;
 812                         phy->fw_work_state = FW_WORK_STATE_WAIT_CHECK_ANSWER;
 813                         break;
 814                 }
 815
 816                 r = pn544_hci_i2c_fw_write_chunk(phy);
 817
 818 exit_state_wait_write_answer:
 819                 if (r < 0)
 820                         pn544_hci_i2c_fw_work_complete(phy, r);
 821                 break;
 822
 823         case FW_WORK_STATE_WAIT_CHECK_ANSWER:
 824                 r = phy->fw_cmd_result;
 825                 if (r < 0)
 826                         goto exit_state_wait_check_answer;
 827
 828                 blob = (struct pn544_i2c_fw_blob *) (phy->fw_blob_data +
 829                        phy->fw_blob_size);
 830                 phy->fw_blob_size = get_unaligned_be32(&blob->be_size);
 831                 if (phy->fw_blob_size != 0) {
 832                         phy->fw_blob_dest_addr =
 833                                         get_unaligned_be32(&blob->be_destaddr);
 834                         phy->fw_blob_data = blob->data;
 835
 836                         phy->fw_written = 0;
 837                         r = pn544_hci_i2c_fw_write_chunk(phy);
 838                 }
 839
 840 exit_state_wait_check_answer:
 841                 if (r < 0 || phy->fw_blob_size == 0)
 842                         pn544_hci_i2c_fw_work_complete(phy, r);
 843                 break;
 844
 845         case FW_WORK_STATE_WAIT_SECURE_WRITE_ANSWER:
 846                 r = phy->fw_cmd_result;
 847                 if (r < 0)
 848                         goto exit_state_wait_secure_write_answer;
 849
 850                 if (r == PN544_FW_CMD_RESULT_CHUNK_OK) {
 851                         r = pn544_hci_i2c_fw_secure_write_frame(phy);
 852                         goto exit_state_wait_secure_write_answer;
 853                 }
 854
 855                 if (phy->fw_written == phy->fw_blob_size) {
 856                         secure_blob = (struct pn544_i2c_fw_secure_blob *)
 857                                 (phy->fw_blob_data + phy->fw_blob_size);
 858                         phy->fw_size -= phy->fw_blob_size +
 859                                 PN544_FW_SECURE_BLOB_HEADER_LEN;
 860                         if (phy->fw_size >= PN544_FW_SECURE_BLOB_HEADER_LEN
 861                                         + PN544_FW_SECURE_FRAME_HEADER_LEN) {
 862                                 phy->fw_blob_data = secure_blob->data;
 863
 864                                 phy->fw_written = 0;
 865                                 r = pn544_hci_i2c_fw_secure_write_frame(phy);
 866                         }
 867                 }
 868
 869 exit_state_wait_secure_write_answer:
 870                 if (r < 0 || phy->fw_size == 0)
 871                         pn544_hci_i2c_fw_work_complete(phy, r);
 872                 break;
 873
 874         default:
 875                 break;
 876         }
 877 }
 878
 879 static int pn544_hci_i2c_acpi_request_resources(struct i2c_client *client)
 880 {
 881         struct pn544_i2c_phy *phy = i2c_get_clientdata(client);
 882         const struct acpi_device_id *id;
 883         struct gpio_desc *gpiod_en, *gpiod_irq, *gpiod_fw;
 884         struct device *dev;
 885         int ret;
 886
 887         if (!client)
 888                 return -EINVAL;
 889
 890         dev = &client->dev;
 891
 892         /* Match the struct device against a given list of ACPI IDs */
 893         id = acpi_match_device(dev->driver->acpi_match_table, dev);
 894
 895         if (!id)
 896                 return -ENODEV;
 897
 898         /* Get EN GPIO from ACPI */
 899         gpiod_en = devm_gpiod_get_index(dev, PN544_GPIO_NAME_EN, 1,
 900                                         GPIOD_OUT_LOW);
 901         if (IS_ERR(gpiod_en)) {
 902                 nfc_err(dev, "Unable to get EN GPIO\n");
 903                 return -ENODEV;
 904         }
 905
 906         phy->gpio_en = desc_to_gpio(gpiod_en);
 907
 908         /* Get FW GPIO from ACPI */
 909         gpiod_fw = devm_gpiod_get_index(dev, PN544_GPIO_NAME_FW, 2,
 910                                         GPIOD_OUT_LOW);
 911         if (IS_ERR(gpiod_fw)) {
 912                 nfc_err(dev, "Unable to get FW GPIO\n");
 913                 return -ENODEV;
 914         }
 915
 916         phy->gpio_fw = desc_to_gpio(gpiod_fw);
 917
 918         /* Get IRQ GPIO */
 919         gpiod_irq = devm_gpiod_get_index(dev, PN544_GPIO_NAME_IRQ, 0,
 920                                          GPIOD_IN);
 921         if (IS_ERR(gpiod_irq)) {
 922                 nfc_err(dev, "Unable to get IRQ GPIO\n");
 923                 return -ENODEV;
 924         }
 925
 926         phy->gpio_irq = desc_to_gpio(gpiod_irq);
 927
 928         /* Map the pin to an IRQ */
 929         ret = gpiod_to_irq(gpiod_irq);
 930         if (ret < 0) {
 931                 nfc_err(dev, "Fail pin IRQ mapping\n");
 932                 return ret;
 933         }
 934
 935         nfc_info(dev, "GPIO resource, no:%d irq:%d\n",
 936                  desc_to_gpio(gpiod_irq), ret);
 937         client->irq = ret;
 938
 939         return 0;
 940 }
 941
 942 #ifdef CONFIG_OF
 943
 944 static int pn544_hci_i2c_of_request_resources(struct i2c_client *client)
 945 {
 946         struct pn544_i2c_phy *phy = i2c_get_clientdata(client);
 947         struct device_node *pp;
 948         int ret;
 949
 950         pp = client->dev.of_node;
 951         if (!pp) {
 952                 ret = -ENODEV;
 953                 goto err_dt;
 954         }
 955
 956         /* Obtention of EN GPIO from device tree */
 957         ret = of_get_named_gpio(pp, "enable-gpios", 0);
 958         if (ret < 0) {
 959                 if (ret != -EPROBE_DEFER)
 960                         nfc_err(&client->dev,
 961                                 "Failed to get EN gpio, error: %d\n", ret);
 962                 goto err_dt;
 963         }
 964         phy->gpio_en = ret;
 965
 966         /* Configuration of EN GPIO */
 967         ret = gpio_request(phy->gpio_en, PN544_GPIO_NAME_EN);
 968         if (ret) {
 969                 nfc_err(&client->dev, "Fail EN pin\n");
 970                 goto err_dt;
 971         }
 972         ret = gpio_direction_output(phy->gpio_en, 0);
 973         if (ret) {
 974                 nfc_err(&client->dev, "Fail EN pin direction\n");
 975                 goto err_gpio_en;
 976         }
 977
 978         /* Obtention of FW GPIO from device tree */
 979         ret = of_get_named_gpio(pp, "firmware-gpios", 0);
 980         if (ret < 0) {
 981                 if (ret != -EPROBE_DEFER)
 982                         nfc_err(&client->dev,
 983                                 "Failed to get FW gpio, error: %d\n", ret);
 984                 goto err_gpio_en;
 985         }
 986         phy->gpio_fw = ret;
 987
 988         /* Configuration of FW GPIO */
 989         ret = gpio_request(phy->gpio_fw, PN544_GPIO_NAME_FW);
 990         if (ret) {
 991                 nfc_err(&client->dev, "Fail FW pin\n");
 992                 goto err_gpio_en;
 993         }
 994         ret = gpio_direction_output(phy->gpio_fw, 0);
 995         if (ret) {
 996                 nfc_err(&client->dev, "Fail FW pin direction\n");
 997                 goto err_gpio_fw;
 998         }
 999
1000         /* IRQ */
1001         ret = irq_of_parse_and_map(pp, 0);
1002         if (ret < 0) {
1003                 nfc_err(&client->dev,
1004                         "Unable to get irq, error: %d\n", ret);
1005                 goto err_gpio_fw;
1006         }
1007         client->irq = ret;
1008
1009         return 0;
1010
1011 err_gpio_fw:
1012         gpio_free(phy->gpio_fw);
1013 err_gpio_en:
1014         gpio_free(phy->gpio_en);
1015 err_dt:
1016         return ret;
1017 }
1018
1019 #else
1020
1021 static int pn544_hci_i2c_of_request_resources(struct i2c_client *client)
1022 {
1023         return -ENODEV;
1024 }
1025
1026 #endif
1027
1028 static int pn544_hci_i2c_probe(struct i2c_client *client,
1029                                const struct i2c_device_id *id)
1030 {
1031         struct pn544_i2c_phy *phy;
1032         struct pn544_nfc_platform_data *pdata;
1033         int r = 0;
1034
1035         dev_dbg(&client->dev, "%s\n", __func__);
1036         dev_dbg(&client->dev, "IRQ: %d\n", client->irq);
1037
1038         if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
1039                 nfc_err(&client->dev, "Need I2C_FUNC_I2C\n");
1040                 return -ENODEV;
1041         }
1042
1043         phy = devm_kzalloc(&client->dev, sizeof(struct pn544_i2c_phy),
1044                            GFP_KERNEL);
1045         if (!phy)
1046                 return -ENOMEM;
1047
1048         INIT_WORK(&phy->fw_work, pn544_hci_i2c_fw_work);
1049         phy->fw_work_state = FW_WORK_STATE_IDLE;
1050
1051         phy->i2c_dev = client;
1052         i2c_set_clientdata(client, phy);
1053
1054         pdata = client->dev.platform_data;
1055
1056         /* No platform data, using device tree. */
1057         if (!pdata && client->dev.of_node) {
1058                 r = pn544_hci_i2c_of_request_resources(client);
1059                 if (r) {
1060                         nfc_err(&client->dev, "No DT data\n");
1061                         return r;
1062                 }
1063         /* Using platform data. */
1064         } else if (pdata) {
1065
1066                 if (pdata->request_resources == NULL) {
1067                         nfc_err(&client->dev, "request_resources() missing\n");
1068                         return -EINVAL;
1069                 }
1070
1071                 r = pdata->request_resources(client);
1072                 if (r) {
1073                         nfc_err(&client->dev,
1074                                 "Cannot get platform resources\n");
1075                         return r;
1076                 }
1077
1078                 phy->gpio_en = pdata->get_gpio(NFC_GPIO_ENABLE);
1079                 phy->gpio_fw = pdata->get_gpio(NFC_GPIO_FW_RESET);
1080                 phy->gpio_irq = pdata->get_gpio(NFC_GPIO_IRQ);
1081         /* Using ACPI */
1082         } else if (ACPI_HANDLE(&client->dev)) {
1083                 r = pn544_hci_i2c_acpi_request_resources(client);
1084                 if (r) {
1085                         nfc_err(&client->dev,
1086                                 "Cannot get ACPI data\n");
1087                         return r;
1088                 }
1089         } else {
1090                 nfc_err(&client->dev, "No platform data\n");
1091                 return -EINVAL;
1092         }
1093
1094         pn544_hci_i2c_platform_init(phy);
1095
1096         r = request_threaded_irq(client->irq, NULL, pn544_hci_i2c_irq_thread_fn,
1097                                  IRQF_TRIGGER_RISING | IRQF_ONESHOT,
1098                                  PN544_HCI_I2C_DRIVER_NAME, phy);
1099         if (r < 0) {
1100                 nfc_err(&client->dev, "Unable to register IRQ handler\n");
1101                 goto err_rti;
1102         }
1103
1104         r = pn544_hci_probe(phy, &i2c_phy_ops, LLC_SHDLC_NAME,
1105                             PN544_I2C_FRAME_HEADROOM, PN544_I2C_FRAME_TAILROOM,
1106                             PN544_HCI_I2C_LLC_MAX_PAYLOAD,
1107                             pn544_hci_i2c_fw_download, &phy->hdev);
1108         if (r < 0)
1109                 goto err_hci;
1110
1111         return 0;
1112
1113 err_hci:
1114         free_irq(client->irq, phy);
1115
1116 err_rti:
1117         if (!pdata) {
1118                 gpio_free(phy->gpio_en);
1119                 gpio_free(phy->gpio_fw);
1120         } else if (pdata->free_resources) {
1121                 pdata->free_resources();
1122         }
1123
1124         return r;
1125 }
1126
1127 static int pn544_hci_i2c_remove(struct i2c_client *client)
1128 {
1129         struct pn544_i2c_phy *phy = i2c_get_clientdata(client);
1130         struct pn544_nfc_platform_data *pdata = client->dev.platform_data;
1131
1132         dev_dbg(&client->dev, "%s\n", __func__);
1133
1134         cancel_work_sync(&phy->fw_work);
1135         if (phy->fw_work_state != FW_WORK_STATE_IDLE)
1136                 pn544_hci_i2c_fw_work_complete(phy, -ENODEV);
1137
1138         pn544_hci_remove(phy->hdev);
1139
1140         if (phy->powered)
1141                 pn544_hci_i2c_disable(phy);
1142
1143         free_irq(client->irq, phy);
1144
1145         /* No platform data, GPIOs have been requested by this driver */
1146         if (!pdata) {
1147                 gpio_free(phy->gpio_en);
1148                 gpio_free(phy->gpio_fw);
1149         /* Using platform data */
1150         } else if (pdata->free_resources) {
1151                 pdata->free_resources();
1152         }
1153
1154         return 0;
1155 }
1156
1157 static const struct of_device_id of_pn544_i2c_match[] = {
1158         { .compatible = "nxp,pn544-i2c", },
1159         {},
1160 };
1161 MODULE_DEVICE_TABLE(of, of_pn544_i2c_match);
1162
1163 static struct i2c_driver pn544_hci_i2c_driver = {
1164         .driver = {
1165                    .name = PN544_HCI_I2C_DRIVER_NAME,
1166                    .owner  = THIS_MODULE,
1167                    .of_match_table = of_match_ptr(of_pn544_i2c_match),
1168                    .acpi_match_table = ACPI_PTR(pn544_hci_i2c_acpi_match),
1169                   },
1170         .probe = pn544_hci_i2c_probe,
1171         .id_table = pn544_hci_i2c_id_table,
1172         .remove = pn544_hci_i2c_remove,
1173 };
1174
1175 module_i2c_driver(pn544_hci_i2c_driver);
1176
1177 MODULE_LICENSE("GPL");
1178 MODULE_DESCRIPTION(DRIVER_DESC);