GNU Linux-libre 4.19.286-gnu1
[releases.git] / drivers / nvme / host / nvme.h
1 /*
2  * Copyright (c) 2011-2014, Intel Corporation.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  */
13
14 #ifndef _NVME_H
15 #define _NVME_H
16
17 #include <linux/nvme.h>
18 #include <linux/cdev.h>
19 #include <linux/pci.h>
20 #include <linux/kref.h>
21 #include <linux/blk-mq.h>
22 #include <linux/lightnvm.h>
23 #include <linux/sed-opal.h>
24 #include <linux/fault-inject.h>
25 #include <linux/rcupdate.h>
26
27 extern unsigned int nvme_io_timeout;
28 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
29
30 extern unsigned int admin_timeout;
31 #define ADMIN_TIMEOUT   (admin_timeout * HZ)
32
33 #define NVME_DEFAULT_KATO       5
34 #define NVME_KATO_GRACE         10
35
36 extern struct workqueue_struct *nvme_wq;
37 extern struct workqueue_struct *nvme_reset_wq;
38 extern struct workqueue_struct *nvme_delete_wq;
39
40 enum {
41         NVME_NS_LBA             = 0,
42         NVME_NS_LIGHTNVM        = 1,
43 };
44
45 /*
46  * List of workarounds for devices that required behavior not specified in
47  * the standard.
48  */
49 enum nvme_quirks {
50         /*
51          * Prefers I/O aligned to a stripe size specified in a vendor
52          * specific Identify field.
53          */
54         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
55
56         /*
57          * The controller doesn't handle Identify value others than 0 or 1
58          * correctly.
59          */
60         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
61
62         /*
63          * The controller deterministically returns O's on reads to
64          * logical blocks that deallocate was called on.
65          */
66         NVME_QUIRK_DEALLOCATE_ZEROES            = (1 << 2),
67
68         /*
69          * The controller needs a delay before starts checking the device
70          * readiness, which is done by reading the NVME_CSTS_RDY bit.
71          */
72         NVME_QUIRK_DELAY_BEFORE_CHK_RDY         = (1 << 3),
73
74         /*
75          * APST should not be used.
76          */
77         NVME_QUIRK_NO_APST                      = (1 << 4),
78
79         /*
80          * The deepest sleep state should not be used.
81          */
82         NVME_QUIRK_NO_DEEPEST_PS                = (1 << 5),
83
84         /*
85          * Supports the LighNVM command set if indicated in vs[1].
86          */
87         NVME_QUIRK_LIGHTNVM                     = (1 << 6),
88
89         /*
90          * Set MEDIUM priority on SQ creation
91          */
92         NVME_QUIRK_MEDIUM_PRIO_SQ               = (1 << 7),
93 };
94
95 /*
96  * Common request structure for NVMe passthrough.  All drivers must have
97  * this structure as the first member of their request-private data.
98  */
99 struct nvme_request {
100         struct nvme_command     *cmd;
101         union nvme_result       result;
102         u8                      retries;
103         u8                      flags;
104         u16                     status;
105         struct nvme_ctrl        *ctrl;
106 };
107
108 /*
109  * Mark a bio as coming in through the mpath node.
110  */
111 #define REQ_NVME_MPATH          REQ_DRV
112
113 enum {
114         NVME_REQ_CANCELLED              = (1 << 0),
115         NVME_REQ_USERCMD                = (1 << 1),
116 };
117
118 static inline struct nvme_request *nvme_req(struct request *req)
119 {
120         return blk_mq_rq_to_pdu(req);
121 }
122
123 static inline u16 nvme_req_qid(struct request *req)
124 {
125         if (!req->rq_disk)
126                 return 0;
127         return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1;
128 }
129
130 /* The below value is the specific amount of delay needed before checking
131  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
132  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
133  * found empirically.
134  */
135 #define NVME_QUIRK_DELAY_AMOUNT         2300
136
137 enum nvme_ctrl_state {
138         NVME_CTRL_NEW,
139         NVME_CTRL_LIVE,
140         NVME_CTRL_ADMIN_ONLY,    /* Only admin queue live */
141         NVME_CTRL_RESETTING,
142         NVME_CTRL_CONNECTING,
143         NVME_CTRL_DELETING,
144         NVME_CTRL_DEAD,
145 };
146
147 struct nvme_ctrl {
148         enum nvme_ctrl_state state;
149         bool identified;
150         spinlock_t lock;
151         struct mutex scan_lock;
152         const struct nvme_ctrl_ops *ops;
153         struct request_queue *admin_q;
154         struct request_queue *connect_q;
155         struct device *dev;
156         int instance;
157         struct blk_mq_tag_set *tagset;
158         struct blk_mq_tag_set *admin_tagset;
159         struct list_head namespaces;
160         struct rw_semaphore namespaces_rwsem;
161         struct device ctrl_device;
162         struct device *device;  /* char device */
163         struct cdev cdev;
164         struct work_struct reset_work;
165         struct work_struct delete_work;
166
167         struct nvme_subsystem *subsys;
168         struct list_head subsys_entry;
169
170         struct opal_dev *opal_dev;
171
172         char name[12];
173         u16 cntlid;
174
175         u32 ctrl_config;
176         u16 mtfa;
177         u32 queue_count;
178
179         u64 cap;
180         u32 page_size;
181         u32 max_hw_sectors;
182         u32 max_segments;
183         u16 oncs;
184         u16 oacs;
185         u16 nssa;
186         u16 nr_streams;
187         u32 max_namespaces;
188         atomic_t abort_limit;
189         u8 vwc;
190         u32 vs;
191         u32 sgls;
192         u16 kas;
193         u8 npss;
194         u8 apsta;
195         u32 oaes;
196         u32 aen_result;
197         unsigned int shutdown_timeout;
198         unsigned int kato;
199         bool subsystem;
200         unsigned long quirks;
201         struct nvme_id_power_state psd[32];
202         struct nvme_effects_log *effects;
203         struct work_struct scan_work;
204         struct work_struct async_event_work;
205         struct delayed_work ka_work;
206         struct nvme_command ka_cmd;
207         struct work_struct fw_act_work;
208         unsigned long events;
209         bool created;
210
211 #ifdef CONFIG_NVME_MULTIPATH
212         /* asymmetric namespace access: */
213         u8 anacap;
214         u8 anatt;
215         u32 anagrpmax;
216         u32 nanagrpid;
217         struct mutex ana_lock;
218         struct nvme_ana_rsp_hdr *ana_log_buf;
219         size_t ana_log_size;
220         struct timer_list anatt_timer;
221         struct work_struct ana_work;
222 #endif
223
224         /* Power saving configuration */
225         u64 ps_max_latency_us;
226         bool apst_enabled;
227
228         /* PCIe only: */
229         u32 hmpre;
230         u32 hmmin;
231         u32 hmminds;
232         u16 hmmaxd;
233
234         /* Fabrics only */
235         u16 sqsize;
236         u32 ioccsz;
237         u32 iorcsz;
238         u16 icdoff;
239         u16 maxcmd;
240         int nr_reconnects;
241         struct nvmf_ctrl_options *opts;
242
243         struct page *discard_page;
244         unsigned long discard_page_busy;
245 };
246
247 struct nvme_subsystem {
248         int                     instance;
249         struct device           dev;
250         /*
251          * Because we unregister the device on the last put we need
252          * a separate refcount.
253          */
254         struct kref             ref;
255         struct list_head        entry;
256         struct mutex            lock;
257         struct list_head        ctrls;
258         struct list_head        nsheads;
259         char                    subnqn[NVMF_NQN_SIZE];
260         char                    serial[20];
261         char                    model[40];
262         char                    firmware_rev[8];
263         u8                      cmic;
264         u16                     vendor_id;
265         struct ida              ns_ida;
266 };
267
268 /*
269  * Container structure for uniqueue namespace identifiers.
270  */
271 struct nvme_ns_ids {
272         u8      eui64[8];
273         u8      nguid[16];
274         uuid_t  uuid;
275 };
276
277 /*
278  * Anchor structure for namespaces.  There is one for each namespace in a
279  * NVMe subsystem that any of our controllers can see, and the namespace
280  * structure for each controller is chained of it.  For private namespaces
281  * there is a 1:1 relation to our namespace structures, that is ->list
282  * only ever has a single entry for private namespaces.
283  */
284 struct nvme_ns_head {
285 #ifdef CONFIG_NVME_MULTIPATH
286         struct gendisk          *disk;
287         struct nvme_ns __rcu    *current_path;
288         struct bio_list         requeue_list;
289         spinlock_t              requeue_lock;
290         struct work_struct      requeue_work;
291         struct mutex            lock;
292 #endif
293         struct list_head        list;
294         struct srcu_struct      srcu;
295         struct nvme_subsystem   *subsys;
296         unsigned                ns_id;
297         struct nvme_ns_ids      ids;
298         struct list_head        entry;
299         struct kref             ref;
300         int                     instance;
301 };
302
303 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
304 struct nvme_fault_inject {
305         struct fault_attr attr;
306         struct dentry *parent;
307         bool dont_retry;        /* DNR, do not retry */
308         u16 status;             /* status code */
309 };
310 #endif
311
312 struct nvme_ns {
313         struct list_head list;
314
315         struct nvme_ctrl *ctrl;
316         struct request_queue *queue;
317         struct gendisk *disk;
318 #ifdef CONFIG_NVME_MULTIPATH
319         enum nvme_ana_state ana_state;
320         u32 ana_grpid;
321 #endif
322         struct list_head siblings;
323         struct nvm_dev *ndev;
324         struct kref kref;
325         struct nvme_ns_head *head;
326
327         int lba_shift;
328         u16 ms;
329         u16 sgs;
330         u32 sws;
331         bool ext;
332         u8 pi_type;
333         unsigned long flags;
334 #define NVME_NS_REMOVING        0
335 #define NVME_NS_DEAD            1
336 #define NVME_NS_ANA_PENDING     2
337         u16 noiob;
338
339 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
340         struct nvme_fault_inject fault_inject;
341 #endif
342
343 };
344
345 struct nvme_ctrl_ops {
346         const char *name;
347         struct module *module;
348         unsigned int flags;
349 #define NVME_F_FABRICS                  (1 << 0)
350 #define NVME_F_METADATA_SUPPORTED       (1 << 1)
351         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
352         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
353         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
354         void (*free_ctrl)(struct nvme_ctrl *ctrl);
355         void (*submit_async_event)(struct nvme_ctrl *ctrl);
356         void (*delete_ctrl)(struct nvme_ctrl *ctrl);
357         int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
358         void (*stop_ctrl)(struct nvme_ctrl *ctrl);
359 };
360
361 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
362 void nvme_fault_inject_init(struct nvme_ns *ns);
363 void nvme_fault_inject_fini(struct nvme_ns *ns);
364 void nvme_should_fail(struct request *req);
365 #else
366 static inline void nvme_fault_inject_init(struct nvme_ns *ns) {}
367 static inline void nvme_fault_inject_fini(struct nvme_ns *ns) {}
368 static inline void nvme_should_fail(struct request *req) {}
369 #endif
370
371 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
372 {
373         u32 val = 0;
374
375         if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
376                 return false;
377         return val & NVME_CSTS_RDY;
378 }
379
380 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
381 {
382         if (!ctrl->subsystem)
383                 return -ENOTTY;
384         return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
385 }
386
387 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
388 {
389         return (sector >> (ns->lba_shift - 9));
390 }
391
392 static inline void nvme_end_request(struct request *req, __le16 status,
393                 union nvme_result result)
394 {
395         struct nvme_request *rq = nvme_req(req);
396
397         rq->status = le16_to_cpu(status) >> 1;
398         rq->result = result;
399         /* inject error when permitted by fault injection framework */
400         nvme_should_fail(req);
401         blk_mq_complete_request(req);
402 }
403
404 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
405 {
406         get_device(ctrl->device);
407 }
408
409 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
410 {
411         put_device(ctrl->device);
412 }
413
414 void nvme_complete_rq(struct request *req);
415 void nvme_cancel_request(struct request *req, void *data, bool reserved);
416 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
417                 enum nvme_ctrl_state new_state);
418 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
419 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
420 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
421 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
422                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
423 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
424 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
425 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
426 void nvme_put_ctrl(struct nvme_ctrl *ctrl);
427 int nvme_init_identify(struct nvme_ctrl *ctrl);
428
429 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
430
431 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
432                 bool send);
433
434 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
435                 volatile union nvme_result *res);
436
437 void nvme_stop_queues(struct nvme_ctrl *ctrl);
438 void nvme_start_queues(struct nvme_ctrl *ctrl);
439 void nvme_kill_queues(struct nvme_ctrl *ctrl);
440 void nvme_unfreeze(struct nvme_ctrl *ctrl);
441 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
442 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
443 void nvme_start_freeze(struct nvme_ctrl *ctrl);
444
445 #define NVME_QID_ANY -1
446 struct request *nvme_alloc_request(struct request_queue *q,
447                 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid);
448 void nvme_cleanup_cmd(struct request *req);
449 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
450                 struct nvme_command *cmd);
451 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
452                 void *buf, unsigned bufflen);
453 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
454                 union nvme_result *result, void *buffer, unsigned bufflen,
455                 unsigned timeout, int qid, int at_head,
456                 blk_mq_req_flags_t flags);
457 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
458 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
459 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
460 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
461 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
462 int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl);
463
464 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp,
465                 void *log, size_t size, u64 offset);
466
467 extern const struct attribute_group *nvme_ns_id_attr_groups[];
468 extern const struct block_device_operations nvme_ns_head_ops;
469
470 #ifdef CONFIG_NVME_MULTIPATH
471 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
472 {
473         return ctrl->ana_log_buf != NULL;
474 }
475
476 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
477 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
478 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
479 void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns,
480                         struct nvme_ctrl *ctrl, int *flags);
481 bool nvme_failover_req(struct request *req);
482 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
483 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
484 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id);
485 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
486 int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
487 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
488 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
489
490 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
491 {
492         struct nvme_ns_head *head = ns->head;
493
494         if (head && ns == rcu_access_pointer(head->current_path))
495                 rcu_assign_pointer(head->current_path, NULL);
496 }
497 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
498
499 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
500 {
501         struct nvme_ns_head *head = ns->head;
502
503         if (head->disk && list_empty(&head->list))
504                 kblockd_schedule_work(&head->requeue_work);
505 }
506
507 static inline void nvme_mpath_update_disk_size(struct gendisk *disk)
508 {
509         struct block_device *bdev = bdget_disk(disk, 0);
510
511         if (bdev) {
512                 bd_set_size(bdev, get_capacity(disk) << SECTOR_SHIFT);
513                 bdput(bdev);
514         }
515 }
516
517 extern struct device_attribute dev_attr_ana_grpid;
518 extern struct device_attribute dev_attr_ana_state;
519
520 #else
521 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
522 {
523         return false;
524 }
525 /*
526  * Without the multipath code enabled, multiple controller per subsystems are
527  * visible as devices and thus we cannot use the subsystem instance.
528  */
529 static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns,
530                                       struct nvme_ctrl *ctrl, int *flags)
531 {
532         sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance);
533 }
534
535 static inline bool nvme_failover_req(struct request *req)
536 {
537         return false;
538 }
539 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
540 {
541 }
542 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
543                 struct nvme_ns_head *head)
544 {
545         return 0;
546 }
547 static inline void nvme_mpath_add_disk(struct nvme_ns *ns,
548                 struct nvme_id_ns *id)
549 {
550 }
551 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
552 {
553 }
554 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
555 {
556 }
557 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
558 {
559 }
560 static inline int nvme_mpath_init(struct nvme_ctrl *ctrl,
561                 struct nvme_id_ctrl *id)
562 {
563         if (ctrl->subsys->cmic & (1 << 3))
564                 dev_warn(ctrl->device,
565 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
566         return 0;
567 }
568 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
569 {
570 }
571 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
572 {
573 }
574 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
575 {
576 }
577 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
578 {
579 }
580 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
581 {
582 }
583 static inline void nvme_mpath_update_disk_size(struct gendisk *disk)
584 {
585 }
586 #endif /* CONFIG_NVME_MULTIPATH */
587
588 #ifdef CONFIG_NVM
589 void nvme_nvm_update_nvm_info(struct nvme_ns *ns);
590 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
591 void nvme_nvm_unregister(struct nvme_ns *ns);
592 extern const struct attribute_group nvme_nvm_attr_group;
593 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
594 #else
595 static inline void nvme_nvm_update_nvm_info(struct nvme_ns *ns) {};
596 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
597                                     int node)
598 {
599         return 0;
600 }
601
602 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
603 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
604                                                         unsigned long arg)
605 {
606         return -ENOTTY;
607 }
608 #endif /* CONFIG_NVM */
609
610 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
611 {
612         return dev_to_disk(dev)->private_data;
613 }
614
615 int __init nvme_core_init(void);
616 void nvme_core_exit(void);
617
618 #endif /* _NVME_H */