drivers/nvme/host/nvme.h

   1 /*
   2  * Copyright (c) 2011-2014, Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  */
  13
  14 #ifndef _NVME_H
  15 #define _NVME_H
  16
  17 #include <linux/nvme.h>
  18 #include <linux/pci.h>
  19 #include <linux/kref.h>
  20 #include <linux/blk-mq.h>
  21 #include <linux/lightnvm.h>
  22 #include <linux/sed-opal.h>
  23
  24 extern unsigned char nvme_io_timeout;
  25 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
  26
  27 extern unsigned char admin_timeout;
  28 #define ADMIN_TIMEOUT   (admin_timeout * HZ)
  29
  30 #define NVME_DEFAULT_KATO       5
  31 #define NVME_KATO_GRACE         10
  32
  33 extern struct workqueue_struct *nvme_wq;
  34
  35 enum {
  36         NVME_NS_LBA             = 0,
  37         NVME_NS_LIGHTNVM        = 1,
  38 };
  39
  40 /*
  41  * List of workarounds for devices that required behavior not specified in
  42  * the standard.
  43  */
  44 enum nvme_quirks {
  45         /*
  46          * Prefers I/O aligned to a stripe size specified in a vendor
  47          * specific Identify field.
  48          */
  49         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
  50
  51         /*
  52          * The controller doesn't handle Identify value others than 0 or 1
  53          * correctly.
  54          */
  55         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
  56
  57         /*
  58          * The controller deterministically returns O's on reads to
  59          * logical blocks that deallocate was called on.
  60          */
  61         NVME_QUIRK_DEALLOCATE_ZEROES            = (1 << 2),
  62
  63         /*
  64          * The controller needs a delay before starts checking the device
  65          * readiness, which is done by reading the NVME_CSTS_RDY bit.
  66          */
  67         NVME_QUIRK_DELAY_BEFORE_CHK_RDY         = (1 << 3),
  68
  69         /*
  70          * APST should not be used.
  71          */
  72         NVME_QUIRK_NO_APST                      = (1 << 4),
  73
  74         /*
  75          * The deepest sleep state should not be used.
  76          */
  77         NVME_QUIRK_NO_DEEPEST_PS                = (1 << 5),
  78
  79         /*
  80          * Supports the LighNVM command set if indicated in vs[1].
  81          */
  82         NVME_QUIRK_LIGHTNVM                     = (1 << 6),
  83
  84         /*
  85          * Set MEDIUM priority on SQ creation
  86          */
  87         NVME_QUIRK_MEDIUM_PRIO_SQ               = (1 << 7),
  88 };
  89
  90 /*
  91  * Common request structure for NVMe passthrough.  All drivers must have
  92  * this structure as the first member of their request-private data.
  93  */
  94 struct nvme_request {
  95         struct nvme_command     *cmd;
  96         union nvme_result       result;
  97         u8                      retries;
  98         u8                      flags;
  99         u16                     status;
 100 };
 101
 102 enum {
 103         NVME_REQ_CANCELLED              = (1 << 0),
 104 };
 105
 106 static inline struct nvme_request *nvme_req(struct request *req)
 107 {
 108         return blk_mq_rq_to_pdu(req);
 109 }
 110
 111 /* The below value is the specific amount of delay needed before checking
 112  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
 113  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
 114  * found empirically.
 115  */
 116 #define NVME_QUIRK_DELAY_AMOUNT         2300
 117
 118 enum nvme_ctrl_state {
 119         NVME_CTRL_NEW,
 120         NVME_CTRL_LIVE,
 121         NVME_CTRL_RESETTING,
 122         NVME_CTRL_RECONNECTING,
 123         NVME_CTRL_DELETING,
 124         NVME_CTRL_DEAD,
 125 };
 126
 127 struct nvme_ctrl {
 128         enum nvme_ctrl_state state;
 129         bool identified;
 130         spinlock_t lock;
 131         const struct nvme_ctrl_ops *ops;
 132         struct request_queue *admin_q;
 133         struct request_queue *connect_q;
 134         struct device *dev;
 135         struct kref kref;
 136         int instance;
 137         struct blk_mq_tag_set *tagset;
 138         struct blk_mq_tag_set *admin_tagset;
 139         struct list_head namespaces;
 140         struct mutex namespaces_mutex;
 141         struct device *device;  /* char device */
 142         struct list_head node;
 143         struct ida ns_ida;
 144         struct work_struct reset_work;
 145
 146         struct opal_dev *opal_dev;
 147
 148         char name[12];
 149         char serial[20];
 150         char model[40];
 151         char firmware_rev[8];
 152         char subnqn[NVMF_NQN_SIZE];
 153         u16 cntlid;
 154
 155         u32 ctrl_config;
 156         u16 mtfa;
 157         u32 queue_count;
 158
 159         u64 cap;
 160         u32 page_size;
 161         u32 max_hw_sectors;
 162         u16 oncs;
 163         u16 vid;
 164         u16 oacs;
 165         u16 nssa;
 166         u16 nr_streams;
 167         atomic_t abort_limit;
 168         u8 event_limit;
 169         u8 vwc;
 170         u32 vs;
 171         u32 sgls;
 172         u16 kas;
 173         u8 npss;
 174         u8 apsta;
 175         unsigned int shutdown_timeout;
 176         unsigned int kato;
 177         bool subsystem;
 178         unsigned long quirks;
 179         struct nvme_id_power_state psd[32];
 180         struct work_struct scan_work;
 181         struct work_struct async_event_work;
 182         struct delayed_work ka_work;
 183         struct work_struct fw_act_work;
 184
 185         /* Power saving configuration */
 186         u64 ps_max_latency_us;
 187         bool apst_enabled;
 188
 189         /* PCIe only: */
 190         u32 hmpre;
 191         u32 hmmin;
 192         u32 hmminds;
 193         u16 hmmaxd;
 194
 195         /* Fabrics only */
 196         u16 sqsize;
 197         u32 ioccsz;
 198         u32 iorcsz;
 199         u16 icdoff;
 200         u16 maxcmd;
 201         int nr_reconnects;
 202         struct nvmf_ctrl_options *opts;
 203 };
 204
 205 struct nvme_ns {
 206         struct list_head list;
 207
 208         struct nvme_ctrl *ctrl;
 209         struct request_queue *queue;
 210         struct gendisk *disk;
 211         struct nvm_dev *ndev;
 212         struct kref kref;
 213         int instance;
 214
 215         u8 eui[8];
 216         u8 nguid[16];
 217         uuid_t uuid;
 218
 219         unsigned ns_id;
 220         int lba_shift;
 221         u16 ms;
 222         u16 sgs;
 223         u32 sws;
 224         bool ext;
 225         u8 pi_type;
 226         unsigned long flags;
 227 #define NVME_NS_REMOVING 0
 228 #define NVME_NS_DEAD     1
 229         u16 noiob;
 230 };
 231
 232 struct nvme_ctrl_ops {
 233         const char *name;
 234         struct module *module;
 235         unsigned int flags;
 236 #define NVME_F_FABRICS                  (1 << 0)
 237 #define NVME_F_METADATA_SUPPORTED       (1 << 1)
 238         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
 239         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
 240         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
 241         void (*free_ctrl)(struct nvme_ctrl *ctrl);
 242         void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx);
 243         int (*delete_ctrl)(struct nvme_ctrl *ctrl);
 244         int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
 245 };
 246
 247 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
 248 {
 249         u32 val = 0;
 250
 251         if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
 252                 return false;
 253         return val & NVME_CSTS_RDY;
 254 }
 255
 256 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
 257 {
 258         if (!ctrl->subsystem)
 259                 return -ENOTTY;
 260         return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
 261 }
 262
 263 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
 264 {
 265         return (sector >> (ns->lba_shift - 9));
 266 }
 267
 268 static inline void nvme_cleanup_cmd(struct request *req)
 269 {
 270         if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
 271                 kfree(page_address(req->special_vec.bv_page) +
 272                       req->special_vec.bv_offset);
 273         }
 274 }
 275
 276 static inline void nvme_end_request(struct request *req, __le16 status,
 277                 union nvme_result result)
 278 {
 279         struct nvme_request *rq = nvme_req(req);
 280
 281         rq->status = le16_to_cpu(status) >> 1;
 282         rq->result = result;
 283         blk_mq_complete_request(req);
 284 }
 285
 286 void nvme_complete_rq(struct request *req);
 287 void nvme_cancel_request(struct request *req, void *data, bool reserved);
 288 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
 289                 enum nvme_ctrl_state new_state);
 290 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
 291 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
 292 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
 293 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
 294                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
 295 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
 296 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
 297 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
 298 void nvme_put_ctrl(struct nvme_ctrl *ctrl);
 299 int nvme_init_identify(struct nvme_ctrl *ctrl);
 300
 301 void nvme_queue_scan(struct nvme_ctrl *ctrl);
 302 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
 303
 304 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
 305                 bool send);
 306
 307 #define NVME_NR_AERS    1
 308 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
 309                 union nvme_result *res);
 310 void nvme_queue_async_events(struct nvme_ctrl *ctrl);
 311
 312 void nvme_stop_queues(struct nvme_ctrl *ctrl);
 313 void nvme_start_queues(struct nvme_ctrl *ctrl);
 314 void nvme_kill_queues(struct nvme_ctrl *ctrl);
 315 void nvme_unfreeze(struct nvme_ctrl *ctrl);
 316 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
 317 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
 318 void nvme_start_freeze(struct nvme_ctrl *ctrl);
 319
 320 #define NVME_QID_ANY -1
 321 struct request *nvme_alloc_request(struct request_queue *q,
 322                 struct nvme_command *cmd, unsigned int flags, int qid);
 323 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
 324                 struct nvme_command *cmd);
 325 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 326                 void *buf, unsigned bufflen);
 327 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 328                 union nvme_result *result, void *buffer, unsigned bufflen,
 329                 unsigned timeout, int qid, int at_head, int flags);
 330 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
 331 void nvme_start_keep_alive(struct nvme_ctrl *ctrl);
 332 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
 333 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
 334
 335 #ifdef CONFIG_NVM
 336 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
 337 void nvme_nvm_unregister(struct nvme_ns *ns);
 338 int nvme_nvm_register_sysfs(struct nvme_ns *ns);
 339 void nvme_nvm_unregister_sysfs(struct nvme_ns *ns);
 340 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
 341 #else
 342 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
 343                                     int node)
 344 {
 345         return 0;
 346 }
 347
 348 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
 349 static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns)
 350 {
 351         return 0;
 352 }
 353 static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {};
 354 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
 355                                                         unsigned long arg)
 356 {
 357         return -ENOTTY;
 358 }
 359 #endif /* CONFIG_NVM */
 360
 361 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
 362 {
 363         return dev_to_disk(dev)->private_data;
 364 }
 365
 366 int __init nvme_core_init(void);
 367 void nvme_core_exit(void);
 368
 369 #endif /* _NVME_H */