drivers/nvme/host/pci.c

   1 /*
   2  * NVM Express device driver
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include <linux/bitops.h>
  16 #include <linux/blkdev.h>
  17 #include <linux/blk-mq.h>
  18 #include <linux/cpu.h>
  19 #include <linux/delay.h>
  20 #include <linux/errno.h>
  21 #include <linux/fs.h>
  22 #include <linux/genhd.h>
  23 #include <linux/hdreg.h>
  24 #include <linux/idr.h>
  25 #include <linux/init.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/io.h>
  28 #include <linux/kdev_t.h>
  29 #include <linux/kthread.h>
  30 #include <linux/kernel.h>
  31 #include <linux/list_sort.h>
  32 #include <linux/mm.h>
  33 #include <linux/module.h>
  34 #include <linux/moduleparam.h>
  35 #include <linux/pci.h>
  36 #include <linux/poison.h>
  37 #include <linux/ptrace.h>
  38 #include <linux/sched.h>
  39 #include <linux/slab.h>
  40 #include <linux/t10-pi.h>
  41 #include <linux/types.h>
  42 #include <linux/pr.h>
  43 #include <scsi/sg.h>
  44 #include <linux/io-64-nonatomic-lo-hi.h>
  45 #include <asm/unaligned.h>
  46
  47 #include <uapi/linux/nvme_ioctl.h>
  48 #include "nvme.h"
  49
  50 #define NVME_MINORS             (1U << MINORBITS)
  51 #define NVME_Q_DEPTH            1024
  52 #define NVME_AQ_DEPTH           256
  53 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
  54 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
  55 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
  56 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
  57
  58 static unsigned char admin_timeout = 60;
  59 module_param(admin_timeout, byte, 0644);
  60 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  61
  62 unsigned char nvme_io_timeout = 30;
  63 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  64 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  65
  66 static unsigned char shutdown_timeout = 5;
  67 module_param(shutdown_timeout, byte, 0644);
  68 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  69
  70 static int nvme_major;
  71 module_param(nvme_major, int, 0);
  72
  73 static int nvme_char_major;
  74 module_param(nvme_char_major, int, 0);
  75
  76 static int use_threaded_interrupts;
  77 module_param(use_threaded_interrupts, int, 0);
  78
  79 static bool use_cmb_sqes = true;
  80 module_param(use_cmb_sqes, bool, 0644);
  81 MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");
  82
  83 static DEFINE_SPINLOCK(dev_list_lock);
  84 static LIST_HEAD(dev_list);
  85 static struct task_struct *nvme_thread;
  86 static struct workqueue_struct *nvme_workq;
  87 static wait_queue_head_t nvme_kthread_wait;
  88
  89 static struct class *nvme_class;
  90
  91 static int __nvme_reset(struct nvme_dev *dev);
  92 static int nvme_reset(struct nvme_dev *dev);
  93 static void nvme_process_cq(struct nvme_queue *nvmeq);
  94 static void nvme_dead_ctrl(struct nvme_dev *dev);
  95
  96 struct async_cmd_info {
  97         struct kthread_work work;
  98         struct kthread_worker *worker;
  99         struct request *req;
 100         u32 result;
 101         int status;
 102         void *ctx;
 103 };
 104
 105 /*
 106  * An NVM Express queue.  Each device has at least two (one for admin
 107  * commands and one for I/O commands).
 108  */
 109 struct nvme_queue {
 110         struct device *q_dmadev;
 111         struct nvme_dev *dev;
 112         char irqname[24];       /* nvme4294967295-65535\0 */
 113         spinlock_t q_lock;
 114         struct nvme_command *sq_cmds;
 115         struct nvme_command __iomem *sq_cmds_io;
 116         volatile struct nvme_completion *cqes;
 117         struct blk_mq_tags **tags;
 118         dma_addr_t sq_dma_addr;
 119         dma_addr_t cq_dma_addr;
 120         u32 __iomem *q_db;
 121         u16 q_depth;
 122         s16 cq_vector;
 123         u16 sq_head;
 124         u16 sq_tail;
 125         u16 cq_head;
 126         u16 qid;
 127         u8 cq_phase;
 128         u8 cqe_seen;
 129         struct async_cmd_info cmdinfo;
 130 };
 131
 132 /*
 133  * Check we didin't inadvertently grow the command struct
 134  */
 135 static inline void _nvme_check_size(void)
 136 {
 137         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
 138         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
 139         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
 140         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
 141         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
 142         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
 143         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
 144         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
 145         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
 146         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
 147         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
 148         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
 149 }
 150
 151 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
 152                                                 struct nvme_completion *);
 153
 154 struct nvme_cmd_info {
 155         nvme_completion_fn fn;
 156         void *ctx;
 157         int aborted;
 158         struct nvme_queue *nvmeq;
 159         struct nvme_iod iod[0];
 160 };
 161
 162 /*
 163  * Max size of iod being embedded in the request payload
 164  */
 165 #define NVME_INT_PAGES          2
 166 #define NVME_INT_BYTES(dev)     (NVME_INT_PAGES * (dev)->page_size)
 167 #define NVME_INT_MASK           0x01
 168
 169 /*
 170  * Will slightly overestimate the number of pages needed.  This is OK
 171  * as it only leads to a small amount of wasted memory for the lifetime of
 172  * the I/O.
 173  */
 174 static int nvme_npages(unsigned size, struct nvme_dev *dev)
 175 {
 176         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
 177         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
 178 }
 179
 180 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
 181 {
 182         unsigned int ret = sizeof(struct nvme_cmd_info);
 183
 184         ret += sizeof(struct nvme_iod);
 185         ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
 186         ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
 187
 188         return ret;
 189 }
 190
 191 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 192                                 unsigned int hctx_idx)
 193 {
 194         struct nvme_dev *dev = data;
 195         struct nvme_queue *nvmeq = dev->queues[0];
 196
 197         WARN_ON(hctx_idx != 0);
 198         WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
 199         WARN_ON(nvmeq->tags);
 200
 201         hctx->driver_data = nvmeq;
 202         nvmeq->tags = &dev->admin_tagset.tags[0];
 203         return 0;
 204 }
 205
 206 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
 207 {
 208         struct nvme_queue *nvmeq = hctx->driver_data;
 209
 210         nvmeq->tags = NULL;
 211 }
 212
 213 static int nvme_admin_init_request(void *data, struct request *req,
 214                                 unsigned int hctx_idx, unsigned int rq_idx,
 215                                 unsigned int numa_node)
 216 {
 217         struct nvme_dev *dev = data;
 218         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 219         struct nvme_queue *nvmeq = dev->queues[0];
 220
 221         BUG_ON(!nvmeq);
 222         cmd->nvmeq = nvmeq;
 223         return 0;
 224 }
 225
 226 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 227                           unsigned int hctx_idx)
 228 {
 229         struct nvme_dev *dev = data;
 230         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 231
 232         if (!nvmeq->tags)
 233                 nvmeq->tags = &dev->tagset.tags[hctx_idx];
 234
 235         WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
 236         hctx->driver_data = nvmeq;
 237         return 0;
 238 }
 239
 240 static int nvme_init_request(void *data, struct request *req,
 241                                 unsigned int hctx_idx, unsigned int rq_idx,
 242                                 unsigned int numa_node)
 243 {
 244         struct nvme_dev *dev = data;
 245         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 246         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 247
 248         BUG_ON(!nvmeq);
 249         cmd->nvmeq = nvmeq;
 250         return 0;
 251 }
 252
 253 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
 254                                 nvme_completion_fn handler)
 255 {
 256         cmd->fn = handler;
 257         cmd->ctx = ctx;
 258         cmd->aborted = 0;
 259         blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
 260 }
 261
 262 static void *iod_get_private(struct nvme_iod *iod)
 263 {
 264         return (void *) (iod->private & ~0x1UL);
 265 }
 266
 267 /*
 268  * If bit 0 is set, the iod is embedded in the request payload.
 269  */
 270 static bool iod_should_kfree(struct nvme_iod *iod)
 271 {
 272         return (iod->private & NVME_INT_MASK) == 0;
 273 }
 274
 275 /* Special values must be less than 0x1000 */
 276 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
 277 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
 278 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
 279 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
 280
 281 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
 282                                                 struct nvme_completion *cqe)
 283 {
 284         if (ctx == CMD_CTX_CANCELLED)
 285                 return;
 286         if (ctx == CMD_CTX_COMPLETED) {
 287                 dev_warn(nvmeq->q_dmadev,
 288                                 "completed id %d twice on queue %d\n",
 289                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 290                 return;
 291         }
 292         if (ctx == CMD_CTX_INVALID) {
 293                 dev_warn(nvmeq->q_dmadev,
 294                                 "invalid id %d completed on queue %d\n",
 295                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 296                 return;
 297         }
 298         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
 299 }
 300
 301 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
 302 {
 303         void *ctx;
 304
 305         if (fn)
 306                 *fn = cmd->fn;
 307         ctx = cmd->ctx;
 308         cmd->fn = special_completion;
 309         cmd->ctx = CMD_CTX_CANCELLED;
 310         return ctx;
 311 }
 312
 313 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
 314                                                 struct nvme_completion *cqe)
 315 {
 316         u32 result = le32_to_cpup(&cqe->result);
 317         u16 status = le16_to_cpup(&cqe->status) >> 1;
 318
 319         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
 320                 ++nvmeq->dev->event_limit;
 321         if (status != NVME_SC_SUCCESS)
 322                 return;
 323
 324         switch (result & 0xff07) {
 325         case NVME_AER_NOTICE_NS_CHANGED:
 326                 dev_info(nvmeq->q_dmadev, "rescanning\n");
 327                 schedule_work(&nvmeq->dev->scan_work);
 328         default:
 329                 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
 330         }
 331 }
 332
 333 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
 334                                                 struct nvme_completion *cqe)
 335 {
 336         struct request *req = ctx;
 337
 338         u16 status = le16_to_cpup(&cqe->status) >> 1;
 339         u32 result = le32_to_cpup(&cqe->result);
 340
 341         blk_mq_free_request(req);
 342
 343         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
 344         ++nvmeq->dev->abort_limit;
 345 }
 346
 347 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
 348                                                 struct nvme_completion *cqe)
 349 {
 350         struct async_cmd_info *cmdinfo = ctx;
 351         cmdinfo->result = le32_to_cpup(&cqe->result);
 352         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 353         blk_mq_free_request(cmdinfo->req);
 354         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
 355 }
 356
 357 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
 358                                   unsigned int tag)
 359 {
 360         struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
 361
 362         return blk_mq_rq_to_pdu(req);
 363 }
 364
 365 /*
 366  * Called with local interrupts disabled and the q_lock held.  May not sleep.
 367  */
 368 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
 369                                                 nvme_completion_fn *fn)
 370 {
 371         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
 372         void *ctx;
 373         if (tag >= nvmeq->q_depth) {
 374                 *fn = special_completion;
 375                 return CMD_CTX_INVALID;
 376         }
 377         if (fn)
 378                 *fn = cmd->fn;
 379         ctx = cmd->ctx;
 380         cmd->fn = special_completion;
 381         cmd->ctx = CMD_CTX_COMPLETED;
 382         return ctx;
 383 }
 384
 385 /**
 386  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
 387  * @nvmeq: The queue to use
 388  * @cmd: The command to send
 389  *
 390  * Safe to use from interrupt context
 391  */
 392 static void __nvme_submit_cmd(struct nvme_queue *nvmeq,
 393                                                 struct nvme_command *cmd)
 394 {
 395         u16 tail = nvmeq->sq_tail;
 396
 397         if (nvmeq->sq_cmds_io)
 398                 memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd));
 399         else
 400                 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
 401
 402         if (++tail == nvmeq->q_depth)
 403                 tail = 0;
 404         writel(tail, nvmeq->q_db);
 405         nvmeq->sq_tail = tail;
 406 }
 407
 408 static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 409 {
 410         unsigned long flags;
 411         spin_lock_irqsave(&nvmeq->q_lock, flags);
 412         __nvme_submit_cmd(nvmeq, cmd);
 413         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
 414 }
 415
 416 static __le64 **iod_list(struct nvme_iod *iod)
 417 {
 418         return ((void *)iod) + iod->offset;
 419 }
 420
 421 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
 422                             unsigned nseg, unsigned long private)
 423 {
 424         iod->private = private;
 425         iod->offset = offsetof(struct nvme_iod, sg[nseg]);
 426         iod->npages = -1;
 427         iod->length = nbytes;
 428         iod->nents = 0;
 429 }
 430
 431 static struct nvme_iod *
 432 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
 433                  unsigned long priv, gfp_t gfp)
 434 {
 435         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
 436                                 sizeof(__le64 *) * nvme_npages(bytes, dev) +
 437                                 sizeof(struct scatterlist) * nseg, gfp);
 438
 439         if (iod)
 440                 iod_init(iod, bytes, nseg, priv);
 441
 442         return iod;
 443 }
 444
 445 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
 446                                        gfp_t gfp)
 447 {
 448         unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
 449                                                 sizeof(struct nvme_dsm_range);
 450         struct nvme_iod *iod;
 451
 452         if (rq->nr_phys_segments <= NVME_INT_PAGES &&
 453             size <= NVME_INT_BYTES(dev)) {
 454                 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
 455
 456                 iod = cmd->iod;
 457                 iod_init(iod, size, rq->nr_phys_segments,
 458                                 (unsigned long) rq | NVME_INT_MASK);
 459                 return iod;
 460         }
 461
 462         return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
 463                                 (unsigned long) rq, gfp);
 464 }
 465
 466 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
 467 {
 468         const int last_prp = dev->page_size / 8 - 1;
 469         int i;
 470         __le64 **list = iod_list(iod);
 471         dma_addr_t prp_dma = iod->first_dma;
 472
 473         if (iod->npages == 0)
 474                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
 475         for (i = 0; i < iod->npages; i++) {
 476                 __le64 *prp_list = list[i];
 477                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
 478                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
 479                 prp_dma = next_prp_dma;
 480         }
 481
 482         if (iod_should_kfree(iod))
 483                 kfree(iod);
 484 }
 485
 486 static int nvme_error_status(u16 status)
 487 {
 488         switch (status & 0x7ff) {
 489         case NVME_SC_SUCCESS:
 490                 return 0;
 491         case NVME_SC_CAP_EXCEEDED:
 492                 return -ENOSPC;
 493         default:
 494                 return -EIO;
 495         }
 496 }
 497
 498 #ifdef CONFIG_BLK_DEV_INTEGRITY
 499 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
 500 {
 501         if (be32_to_cpu(pi->ref_tag) == v)
 502                 pi->ref_tag = cpu_to_be32(p);
 503 }
 504
 505 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
 506 {
 507         if (be32_to_cpu(pi->ref_tag) == p)
 508                 pi->ref_tag = cpu_to_be32(v);
 509 }
 510
 511 /**
 512  * nvme_dif_remap - remaps ref tags to bip seed and physical lba
 513  *
 514  * The virtual start sector is the one that was originally submitted by the
 515  * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
 516  * start sector may be different. Remap protection information to match the
 517  * physical LBA on writes, and back to the original seed on reads.
 518  *
 519  * Type 0 and 3 do not have a ref tag, so no remapping required.
 520  */
 521 static void nvme_dif_remap(struct request *req,
 522                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
 523 {
 524         struct nvme_ns *ns = req->rq_disk->private_data;
 525         struct bio_integrity_payload *bip;
 526         struct t10_pi_tuple *pi;
 527         void *p, *pmap;
 528         u32 i, nlb, ts, phys, virt;
 529
 530         if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
 531                 return;
 532
 533         bip = bio_integrity(req->bio);
 534         if (!bip)
 535                 return;
 536
 537         pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
 538
 539         p = pmap;
 540         virt = bip_get_seed(bip);
 541         phys = nvme_block_nr(ns, blk_rq_pos(req));
 542         nlb = (blk_rq_bytes(req) >> ns->lba_shift);
 543         ts = ns->disk->queue->integrity.tuple_size;
 544
 545         for (i = 0; i < nlb; i++, virt++, phys++) {
 546                 pi = (struct t10_pi_tuple *)p;
 547                 dif_swap(phys, virt, pi);
 548                 p += ts;
 549         }
 550         kunmap_atomic(pmap);
 551 }
 552
 553 static void nvme_init_integrity(struct nvme_ns *ns)
 554 {
 555         struct blk_integrity integrity;
 556
 557         switch (ns->pi_type) {
 558         case NVME_NS_DPS_PI_TYPE3:
 559                 integrity.profile = &t10_pi_type3_crc;
 560                 break;
 561         case NVME_NS_DPS_PI_TYPE1:
 562         case NVME_NS_DPS_PI_TYPE2:
 563                 integrity.profile = &t10_pi_type1_crc;
 564                 break;
 565         default:
 566                 integrity.profile = NULL;
 567                 break;
 568         }
 569         integrity.tuple_size = ns->ms;
 570         blk_integrity_register(ns->disk, &integrity);
 571         blk_queue_max_integrity_segments(ns->queue, 1);
 572 }
 573 #else /* CONFIG_BLK_DEV_INTEGRITY */
 574 static void nvme_dif_remap(struct request *req,
 575                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
 576 {
 577 }
 578 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
 579 {
 580 }
 581 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
 582 {
 583 }
 584 static void nvme_init_integrity(struct nvme_ns *ns)
 585 {
 586 }
 587 #endif
 588
 589 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
 590                                                 struct nvme_completion *cqe)
 591 {
 592         struct nvme_iod *iod = ctx;
 593         struct request *req = iod_get_private(iod);
 594         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
 595         u16 status = le16_to_cpup(&cqe->status) >> 1;
 596         bool requeue = false;
 597         int error = 0;
 598
 599         if (unlikely(status)) {
 600                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
 601                     && (jiffies - req->start_time) < req->timeout) {
 602                         unsigned long flags;
 603
 604                         requeue = true;
 605                         blk_mq_requeue_request(req);
 606                         spin_lock_irqsave(req->q->queue_lock, flags);
 607                         if (!blk_queue_stopped(req->q))
 608                                 blk_mq_kick_requeue_list(req->q);
 609                         spin_unlock_irqrestore(req->q->queue_lock, flags);
 610                         goto release_iod;
 611                 }
 612
 613                 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
 614                         if (cmd_rq->ctx == CMD_CTX_CANCELLED)
 615                                 error = -EINTR;
 616                         else
 617                                 error = status;
 618                 } else {
 619                         error = nvme_error_status(status);
 620                 }
 621         }
 622
 623         if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
 624                 u32 result = le32_to_cpup(&cqe->result);
 625                 req->special = (void *)(uintptr_t)result;
 626         }
 627
 628         if (cmd_rq->aborted)
 629                 dev_warn(nvmeq->dev->dev,
 630                         "completing aborted command with status:%04x\n",
 631                         error);
 632
 633 release_iod:
 634         if (iod->nents) {
 635                 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
 636                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 637                 if (blk_integrity_rq(req)) {
 638                         if (!rq_data_dir(req))
 639                                 nvme_dif_remap(req, nvme_dif_complete);
 640                         dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
 641                                 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 642                 }
 643         }
 644         nvme_free_iod(nvmeq->dev, iod);
 645
 646         if (likely(!requeue))
 647                 blk_mq_complete_request(req, error);
 648 }
 649
 650 /* length is in bytes.  gfp flags indicates whether we may sleep. */
 651 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
 652                 int total_len, gfp_t gfp)
 653 {
 654         struct dma_pool *pool;
 655         int length = total_len;
 656         struct scatterlist *sg = iod->sg;
 657         int dma_len = sg_dma_len(sg);
 658         u64 dma_addr = sg_dma_address(sg);
 659         u32 page_size = dev->page_size;
 660         int offset = dma_addr & (page_size - 1);
 661         __le64 *prp_list;
 662         __le64 **list = iod_list(iod);
 663         dma_addr_t prp_dma;
 664         int nprps, i;
 665
 666         length -= (page_size - offset);
 667         if (length <= 0)
 668                 return total_len;
 669
 670         dma_len -= (page_size - offset);
 671         if (dma_len) {
 672                 dma_addr += (page_size - offset);
 673         } else {
 674                 sg = sg_next(sg);
 675                 dma_addr = sg_dma_address(sg);
 676                 dma_len = sg_dma_len(sg);
 677         }
 678
 679         if (length <= page_size) {
 680                 iod->first_dma = dma_addr;
 681                 return total_len;
 682         }
 683
 684         nprps = DIV_ROUND_UP(length, page_size);
 685         if (nprps <= (256 / 8)) {
 686                 pool = dev->prp_small_pool;
 687                 iod->npages = 0;
 688         } else {
 689                 pool = dev->prp_page_pool;
 690                 iod->npages = 1;
 691         }
 692
 693         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 694         if (!prp_list) {
 695                 iod->first_dma = dma_addr;
 696                 iod->npages = -1;
 697                 return (total_len - length) + page_size;
 698         }
 699         list[0] = prp_list;
 700         iod->first_dma = prp_dma;
 701         i = 0;
 702         for (;;) {
 703                 if (i == page_size >> 3) {
 704                         __le64 *old_prp_list = prp_list;
 705                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 706                         if (!prp_list)
 707                                 return total_len - length;
 708                         list[iod->npages++] = prp_list;
 709                         prp_list[0] = old_prp_list[i - 1];
 710                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
 711                         i = 1;
 712                 }
 713                 prp_list[i++] = cpu_to_le64(dma_addr);
 714                 dma_len -= page_size;
 715                 dma_addr += page_size;
 716                 length -= page_size;
 717                 if (length <= 0)
 718                         break;
 719                 if (dma_len > 0)
 720                         continue;
 721                 BUG_ON(dma_len < 0);
 722                 sg = sg_next(sg);
 723                 dma_addr = sg_dma_address(sg);
 724                 dma_len = sg_dma_len(sg);
 725         }
 726
 727         return total_len;
 728 }
 729
 730 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
 731                 struct nvme_iod *iod)
 732 {
 733         struct nvme_command cmnd;
 734
 735         memcpy(&cmnd, req->cmd, sizeof(cmnd));
 736         cmnd.rw.command_id = req->tag;
 737         if (req->nr_phys_segments) {
 738                 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 739                 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
 740         }
 741
 742         __nvme_submit_cmd(nvmeq, &cmnd);
 743 }
 744
 745 /*
 746  * We reuse the small pool to allocate the 16-byte range here as it is not
 747  * worth having a special pool for these or additional cases to handle freeing
 748  * the iod.
 749  */
 750 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 751                 struct request *req, struct nvme_iod *iod)
 752 {
 753         struct nvme_dsm_range *range =
 754                                 (struct nvme_dsm_range *)iod_list(iod)[0];
 755         struct nvme_command cmnd;
 756
 757         range->cattr = cpu_to_le32(0);
 758         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
 759         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 760
 761         memset(&cmnd, 0, sizeof(cmnd));
 762         cmnd.dsm.opcode = nvme_cmd_dsm;
 763         cmnd.dsm.command_id = req->tag;
 764         cmnd.dsm.nsid = cpu_to_le32(ns->ns_id);
 765         cmnd.dsm.prp1 = cpu_to_le64(iod->first_dma);
 766         cmnd.dsm.nr = 0;
 767         cmnd.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
 768
 769         __nvme_submit_cmd(nvmeq, &cmnd);
 770 }
 771
 772 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 773                                                                 int cmdid)
 774 {
 775         struct nvme_command cmnd;
 776
 777         memset(&cmnd, 0, sizeof(cmnd));
 778         cmnd.common.opcode = nvme_cmd_flush;
 779         cmnd.common.command_id = cmdid;
 780         cmnd.common.nsid = cpu_to_le32(ns->ns_id);
 781
 782         __nvme_submit_cmd(nvmeq, &cmnd);
 783 }
 784
 785 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
 786                                                         struct nvme_ns *ns)
 787 {
 788         struct request *req = iod_get_private(iod);
 789         struct nvme_command cmnd;
 790         u16 control = 0;
 791         u32 dsmgmt = 0;
 792
 793         if (req->cmd_flags & REQ_FUA)
 794                 control |= NVME_RW_FUA;
 795         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
 796                 control |= NVME_RW_LR;
 797
 798         if (req->cmd_flags & REQ_RAHEAD)
 799                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
 800
 801         memset(&cmnd, 0, sizeof(cmnd));
 802         cmnd.rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
 803         cmnd.rw.command_id = req->tag;
 804         cmnd.rw.nsid = cpu_to_le32(ns->ns_id);
 805         cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 806         cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
 807         cmnd.rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 808         cmnd.rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
 809
 810         if (ns->ms) {
 811                 switch (ns->pi_type) {
 812                 case NVME_NS_DPS_PI_TYPE3:
 813                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
 814                         break;
 815                 case NVME_NS_DPS_PI_TYPE1:
 816                 case NVME_NS_DPS_PI_TYPE2:
 817                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
 818                                         NVME_RW_PRINFO_PRCHK_REF;
 819                         cmnd.rw.reftag = cpu_to_le32(
 820                                         nvme_block_nr(ns, blk_rq_pos(req)));
 821                         break;
 822                 }
 823                 if (blk_integrity_rq(req))
 824                         cmnd.rw.metadata =
 825                                 cpu_to_le64(sg_dma_address(iod->meta_sg));
 826                 else
 827                         control |= NVME_RW_PRINFO_PRACT;
 828         }
 829
 830         cmnd.rw.control = cpu_to_le16(control);
 831         cmnd.rw.dsmgmt = cpu_to_le32(dsmgmt);
 832
 833         __nvme_submit_cmd(nvmeq, &cmnd);
 834
 835         return 0;
 836 }
 837
 838 /*
 839  * NOTE: ns is NULL when called on the admin queue.
 840  */
 841 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
 842                          const struct blk_mq_queue_data *bd)
 843 {
 844         struct nvme_ns *ns = hctx->queue->queuedata;
 845         struct nvme_queue *nvmeq = hctx->driver_data;
 846         struct nvme_dev *dev = nvmeq->dev;
 847         struct request *req = bd->rq;
 848         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 849         struct nvme_iod *iod;
 850         enum dma_data_direction dma_dir;
 851
 852         /*
 853          * If formated with metadata, require the block layer provide a buffer
 854          * unless this namespace is formated such that the metadata can be
 855          * stripped/generated by the controller with PRACT=1.
 856          */
 857         if (ns && ns->ms && !blk_integrity_rq(req)) {
 858                 if (!(ns->pi_type && ns->ms == 8) &&
 859                                         req->cmd_type != REQ_TYPE_DRV_PRIV) {
 860                         blk_mq_complete_request(req, -EFAULT);
 861                         return BLK_MQ_RQ_QUEUE_OK;
 862                 }
 863         }
 864
 865         iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
 866         if (!iod)
 867                 return BLK_MQ_RQ_QUEUE_BUSY;
 868
 869         if (req->cmd_flags & REQ_DISCARD) {
 870                 void *range;
 871                 /*
 872                  * We reuse the small pool to allocate the 16-byte range here
 873                  * as it is not worth having a special pool for these or
 874                  * additional cases to handle freeing the iod.
 875                  */
 876                 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
 877                                                 &iod->first_dma);
 878                 if (!range)
 879                         goto retry_cmd;
 880                 iod_list(iod)[0] = (__le64 *)range;
 881                 iod->npages = 0;
 882         } else if (req->nr_phys_segments) {
 883                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 884
 885                 sg_init_table(iod->sg, req->nr_phys_segments);
 886                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
 887                 if (!iod->nents)
 888                         goto error_cmd;
 889
 890                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
 891                         goto retry_cmd;
 892
 893                 if (blk_rq_bytes(req) !=
 894                     nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
 895                         dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
 896                         goto retry_cmd;
 897                 }
 898                 if (blk_integrity_rq(req)) {
 899                         if (blk_rq_count_integrity_sg(req->q, req->bio) != 1) {
 900                                 dma_unmap_sg(dev->dev, iod->sg, iod->nents,
 901                                                 dma_dir);
 902                                 goto error_cmd;
 903                         }
 904
 905                         sg_init_table(iod->meta_sg, 1);
 906                         if (blk_rq_map_integrity_sg(
 907                                         req->q, req->bio, iod->meta_sg) != 1) {
 908                                 dma_unmap_sg(dev->dev, iod->sg, iod->nents,
 909                                                 dma_dir);
 910                                 goto error_cmd;
 911                         }
 912
 913                         if (rq_data_dir(req))
 914                                 nvme_dif_remap(req, nvme_dif_prep);
 915
 916                         if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir)) {
 917                                 dma_unmap_sg(dev->dev, iod->sg, iod->nents,
 918                                                 dma_dir);
 919                                 goto error_cmd;
 920                         }
 921                 }
 922         }
 923
 924         nvme_set_info(cmd, iod, req_completion);
 925         spin_lock_irq(&nvmeq->q_lock);
 926         if (req->cmd_type == REQ_TYPE_DRV_PRIV)
 927                 nvme_submit_priv(nvmeq, req, iod);
 928         else if (req->cmd_flags & REQ_DISCARD)
 929                 nvme_submit_discard(nvmeq, ns, req, iod);
 930         else if (req->cmd_flags & REQ_FLUSH)
 931                 nvme_submit_flush(nvmeq, ns, req->tag);
 932         else
 933                 nvme_submit_iod(nvmeq, iod, ns);
 934
 935         nvme_process_cq(nvmeq);
 936         spin_unlock_irq(&nvmeq->q_lock);
 937         return BLK_MQ_RQ_QUEUE_OK;
 938
 939  error_cmd:
 940         nvme_free_iod(dev, iod);
 941         return BLK_MQ_RQ_QUEUE_ERROR;
 942  retry_cmd:
 943         nvme_free_iod(dev, iod);
 944         return BLK_MQ_RQ_QUEUE_BUSY;
 945 }
 946
 947 static void __nvme_process_cq(struct nvme_queue *nvmeq, unsigned int *tag)
 948 {
 949         u16 head, phase;
 950
 951         head = nvmeq->cq_head;
 952         phase = nvmeq->cq_phase;
 953
 954         for (;;) {
 955                 void *ctx;
 956                 nvme_completion_fn fn;
 957                 struct nvme_completion cqe = nvmeq->cqes[head];
 958                 if ((le16_to_cpu(cqe.status) & 1) != phase)
 959                         break;
 960                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
 961                 if (++head == nvmeq->q_depth) {
 962                         head = 0;
 963                         phase = !phase;
 964                 }
 965                 if (tag && *tag == cqe.command_id)
 966                         *tag = -1;
 967                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
 968                 fn(nvmeq, ctx, &cqe);
 969         }
 970
 971         /* If the controller ignores the cq head doorbell and continuously
 972          * writes to the queue, it is theoretically possible to wrap around
 973          * the queue twice and mistakenly return IRQ_NONE.  Linux only
 974          * requires that 0.1% of your interrupts are handled, so this isn't
 975          * a big problem.
 976          */
 977         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
 978                 return;
 979
 980         if (likely(nvmeq->cq_vector >= 0))
 981                 writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
 982         nvmeq->cq_head = head;
 983         nvmeq->cq_phase = phase;
 984
 985         nvmeq->cqe_seen = 1;
 986 }
 987
 988 static void nvme_process_cq(struct nvme_queue *nvmeq)
 989 {
 990         __nvme_process_cq(nvmeq, NULL);
 991 }
 992
 993 static irqreturn_t nvme_irq(int irq, void *data)
 994 {
 995         irqreturn_t result;
 996         struct nvme_queue *nvmeq = data;
 997         spin_lock(&nvmeq->q_lock);
 998         nvme_process_cq(nvmeq);
 999         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
1000         nvmeq->cqe_seen = 0;
1001         spin_unlock(&nvmeq->q_lock);
1002         return result;
1003 }
1004
1005 static irqreturn_t nvme_irq_check(int irq, void *data)
1006 {
1007         struct nvme_queue *nvmeq = data;
1008         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
1009         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
1010                 return IRQ_NONE;
1011         return IRQ_WAKE_THREAD;
1012 }
1013
1014 static int nvme_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag)
1015 {
1016         struct nvme_queue *nvmeq = hctx->driver_data;
1017
1018         if ((le16_to_cpu(nvmeq->cqes[nvmeq->cq_head].status) & 1) ==
1019             nvmeq->cq_phase) {
1020                 spin_lock_irq(&nvmeq->q_lock);
1021                 __nvme_process_cq(nvmeq, &tag);
1022                 spin_unlock_irq(&nvmeq->q_lock);
1023
1024                 if (tag == -1)
1025                         return 1;
1026         }
1027
1028         return 0;
1029 }
1030
1031 /*
1032  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1033  * if the result is positive, it's an NVM Express status code
1034  */
1035 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1036                 void *buffer, void __user *ubuffer, unsigned bufflen,
1037                 u32 *result, unsigned timeout)
1038 {
1039         bool write = cmd->common.opcode & 1;
1040         struct bio *bio = NULL;
1041         struct request *req;
1042         int ret;
1043
1044         req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1045         if (IS_ERR(req))
1046                 return PTR_ERR(req);
1047
1048         req->cmd_type = REQ_TYPE_DRV_PRIV;
1049         req->cmd_flags |= REQ_FAILFAST_DRIVER;
1050         req->__data_len = 0;
1051         req->__sector = (sector_t) -1;
1052         req->bio = req->biotail = NULL;
1053
1054         req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1055
1056         req->cmd = (unsigned char *)cmd;
1057         req->cmd_len = sizeof(struct nvme_command);
1058         req->special = (void *)0;
1059
1060         if (buffer && bufflen) {
1061                 ret = blk_rq_map_kern(q, req, buffer, bufflen,
1062                                       __GFP_DIRECT_RECLAIM);
1063                 if (ret)
1064                         goto out;
1065         } else if (ubuffer && bufflen) {
1066                 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
1067                                       __GFP_DIRECT_RECLAIM);
1068                 if (ret)
1069                         goto out;
1070                 bio = req->bio;
1071         }
1072
1073         blk_execute_rq(req->q, NULL, req, 0);
1074         if (bio)
1075                 blk_rq_unmap_user(bio);
1076         if (result)
1077                 *result = (u32)(uintptr_t)req->special;
1078         ret = req->errors;
1079  out:
1080         blk_mq_free_request(req);
1081         return ret;
1082 }
1083
1084 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1085                 void *buffer, unsigned bufflen)
1086 {
1087         return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1088 }
1089
1090 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1091 {
1092         struct nvme_queue *nvmeq = dev->queues[0];
1093         struct nvme_command c;
1094         struct nvme_cmd_info *cmd_info;
1095         struct request *req;
1096
1097         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1098         if (IS_ERR(req))
1099                 return PTR_ERR(req);
1100
1101         req->cmd_flags |= REQ_NO_TIMEOUT;
1102         cmd_info = blk_mq_rq_to_pdu(req);
1103         nvme_set_info(cmd_info, NULL, async_req_completion);
1104
1105         memset(&c, 0, sizeof(c));
1106         c.common.opcode = nvme_admin_async_event;
1107         c.common.command_id = req->tag;
1108
1109         blk_mq_free_request(req);
1110         __nvme_submit_cmd(nvmeq, &c);
1111         return 0;
1112 }
1113
1114 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1115                         struct nvme_command *cmd,
1116                         struct async_cmd_info *cmdinfo, unsigned timeout)
1117 {
1118         struct nvme_queue *nvmeq = dev->queues[0];
1119         struct request *req;
1120         struct nvme_cmd_info *cmd_rq;
1121
1122         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1123         if (IS_ERR(req))
1124                 return PTR_ERR(req);
1125
1126         req->timeout = timeout;
1127         cmd_rq = blk_mq_rq_to_pdu(req);
1128         cmdinfo->req = req;
1129         nvme_set_info(cmd_rq, cmdinfo, async_completion);
1130         cmdinfo->status = -EINTR;
1131
1132         cmd->common.command_id = req->tag;
1133
1134         nvme_submit_cmd(nvmeq, cmd);
1135         return 0;
1136 }
1137
1138 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1139 {
1140         struct nvme_command c;
1141
1142         memset(&c, 0, sizeof(c));
1143         c.delete_queue.opcode = opcode;
1144         c.delete_queue.qid = cpu_to_le16(id);
1145
1146         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1147 }
1148
1149 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1150                                                 struct nvme_queue *nvmeq)
1151 {
1152         struct nvme_command c;
1153         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1154
1155         /*
1156          * Note: we (ab)use the fact the the prp fields survive if no data
1157          * is attached to the request.
1158          */
1159         memset(&c, 0, sizeof(c));
1160         c.create_cq.opcode = nvme_admin_create_cq;
1161         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1162         c.create_cq.cqid = cpu_to_le16(qid);
1163         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1164         c.create_cq.cq_flags = cpu_to_le16(flags);
1165         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1166
1167         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1168 }
1169
1170 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1171                                                 struct nvme_queue *nvmeq)
1172 {
1173         struct nvme_command c;
1174         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1175
1176         /*
1177          * Note: we (ab)use the fact the the prp fields survive if no data
1178          * is attached to the request.
1179          */
1180         memset(&c, 0, sizeof(c));
1181         c.create_sq.opcode = nvme_admin_create_sq;
1182         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1183         c.create_sq.sqid = cpu_to_le16(qid);
1184         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1185         c.create_sq.sq_flags = cpu_to_le16(flags);
1186         c.create_sq.cqid = cpu_to_le16(qid);
1187
1188         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1189 }
1190
1191 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1192 {
1193         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1194 }
1195
1196 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1197 {
1198         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1199 }
1200
1201 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1202 {
1203         struct nvme_command c = { };
1204         int error;
1205
1206         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1207         c.identify.opcode = nvme_admin_identify;
1208         c.identify.cns = cpu_to_le32(1);
1209
1210         *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1211         if (!*id)
1212                 return -ENOMEM;
1213
1214         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1215                         sizeof(struct nvme_id_ctrl));
1216         if (error)
1217                 kfree(*id);
1218         return error;
1219 }
1220
1221 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1222                 struct nvme_id_ns **id)
1223 {
1224         struct nvme_command c = { };
1225         int error;
1226
1227         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1228         c.identify.opcode = nvme_admin_identify,
1229         c.identify.nsid = cpu_to_le32(nsid),
1230
1231         *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1232         if (!*id)
1233                 return -ENOMEM;
1234
1235         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1236                         sizeof(struct nvme_id_ns));
1237         if (error)
1238                 kfree(*id);
1239         return error;
1240 }
1241
1242 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1243                                         dma_addr_t dma_addr, u32 *result)
1244 {
1245         struct nvme_command c;
1246
1247         memset(&c, 0, sizeof(c));
1248         c.features.opcode = nvme_admin_get_features;
1249         c.features.nsid = cpu_to_le32(nsid);
1250         c.features.prp1 = cpu_to_le64(dma_addr);
1251         c.features.fid = cpu_to_le32(fid);
1252
1253         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1254                         result, 0);
1255 }
1256
1257 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1258                                         dma_addr_t dma_addr, u32 *result)
1259 {
1260         struct nvme_command c;
1261
1262         memset(&c, 0, sizeof(c));
1263         c.features.opcode = nvme_admin_set_features;
1264         c.features.prp1 = cpu_to_le64(dma_addr);
1265         c.features.fid = cpu_to_le32(fid);
1266         c.features.dword11 = cpu_to_le32(dword11);
1267
1268         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1269                         result, 0);
1270 }
1271
1272 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1273 {
1274         struct nvme_command c = { };
1275         int error;
1276
1277         c.common.opcode = nvme_admin_get_log_page,
1278         c.common.nsid = cpu_to_le32(0xFFFFFFFF),
1279         c.common.cdw10[0] = cpu_to_le32(
1280                         (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1281                          NVME_LOG_SMART),
1282
1283         *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1284         if (!*log)
1285                 return -ENOMEM;
1286
1287         error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1288                         sizeof(struct nvme_smart_log));
1289         if (error)
1290                 kfree(*log);
1291         return error;
1292 }
1293
1294 /**
1295  * nvme_abort_req - Attempt aborting a request
1296  *
1297  * Schedule controller reset if the command was already aborted once before and
1298  * still hasn't been returned to the driver, or if this is the admin queue.
1299  */
1300 static void nvme_abort_req(struct request *req)
1301 {
1302         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1303         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1304         struct nvme_dev *dev = nvmeq->dev;
1305         struct request *abort_req;
1306         struct nvme_cmd_info *abort_cmd;
1307         struct nvme_command cmd;
1308
1309         if (!nvmeq->qid || cmd_rq->aborted) {
1310                 spin_lock(&dev_list_lock);
1311                 if (!__nvme_reset(dev)) {
1312                         dev_warn(dev->dev,
1313                                  "I/O %d QID %d timeout, reset controller\n",
1314                                  req->tag, nvmeq->qid);
1315                 }
1316                 spin_unlock(&dev_list_lock);
1317                 return;
1318         }
1319
1320         if (!dev->abort_limit)
1321                 return;
1322
1323         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1324                                                                         false);
1325         if (IS_ERR(abort_req))
1326                 return;
1327
1328         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1329         nvme_set_info(abort_cmd, abort_req, abort_completion);
1330
1331         memset(&cmd, 0, sizeof(cmd));
1332         cmd.abort.opcode = nvme_admin_abort_cmd;
1333         cmd.abort.cid = req->tag;
1334         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1335         cmd.abort.command_id = abort_req->tag;
1336
1337         --dev->abort_limit;
1338         cmd_rq->aborted = 1;
1339
1340         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1341                                                         nvmeq->qid);
1342         nvme_submit_cmd(dev->queues[0], &cmd);
1343 }
1344
1345 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1346 {
1347         struct nvme_queue *nvmeq = data;
1348         void *ctx;
1349         nvme_completion_fn fn;
1350         struct nvme_cmd_info *cmd;
1351         struct nvme_completion cqe;
1352
1353         if (!blk_mq_request_started(req))
1354                 return;
1355
1356         cmd = blk_mq_rq_to_pdu(req);
1357
1358         if (cmd->ctx == CMD_CTX_CANCELLED)
1359                 return;
1360
1361         if (blk_queue_dying(req->q))
1362                 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1363         else
1364                 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1365
1366
1367         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1368                                                 req->tag, nvmeq->qid);
1369         ctx = cancel_cmd_info(cmd, &fn);
1370         fn(nvmeq, ctx, &cqe);
1371 }
1372
1373 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1374 {
1375         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1376         struct nvme_queue *nvmeq = cmd->nvmeq;
1377
1378         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1379                                                         nvmeq->qid);
1380         spin_lock_irq(&nvmeq->q_lock);
1381         nvme_abort_req(req);
1382         spin_unlock_irq(&nvmeq->q_lock);
1383
1384         /*
1385          * The aborted req will be completed on receiving the abort req.
1386          * We enable the timer again. If hit twice, it'll cause a device reset,
1387          * as the device then is in a faulty state.
1388          */
1389         return BLK_EH_RESET_TIMER;
1390 }
1391
1392 static void nvme_free_queue(struct nvme_queue *nvmeq)
1393 {
1394         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1395                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1396         if (nvmeq->sq_cmds)
1397                 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1398                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1399         kfree(nvmeq);
1400 }
1401
1402 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1403 {
1404         int i;
1405
1406         for (i = dev->queue_count - 1; i >= lowest; i--) {
1407                 struct nvme_queue *nvmeq = dev->queues[i];
1408                 dev->queue_count--;
1409                 dev->queues[i] = NULL;
1410                 nvme_free_queue(nvmeq);
1411         }
1412 }
1413
1414 /**
1415  * nvme_suspend_queue - put queue into suspended state
1416  * @nvmeq - queue to suspend
1417  */
1418 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1419 {
1420         int vector;
1421
1422         spin_lock_irq(&nvmeq->q_lock);
1423         if (nvmeq->cq_vector == -1) {
1424                 spin_unlock_irq(&nvmeq->q_lock);
1425                 return 1;
1426         }
1427         vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1428         nvmeq->dev->online_queues--;
1429         nvmeq->cq_vector = -1;
1430         spin_unlock_irq(&nvmeq->q_lock);
1431
1432         if (!nvmeq->qid && nvmeq->dev->admin_q)
1433                 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1434
1435         irq_set_affinity_hint(vector, NULL);
1436         free_irq(vector, nvmeq);
1437
1438         return 0;
1439 }
1440
1441 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1442 {
1443         spin_lock_irq(&nvmeq->q_lock);
1444         if (nvmeq->tags && *nvmeq->tags)
1445                 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1446         spin_unlock_irq(&nvmeq->q_lock);
1447 }
1448
1449 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1450 {
1451         struct nvme_queue *nvmeq = dev->queues[qid];
1452
1453         if (!nvmeq)
1454                 return;
1455         if (nvme_suspend_queue(nvmeq))
1456                 return;
1457
1458         /* Don't tell the adapter to delete the admin queue.
1459          * Don't tell a removed adapter to delete IO queues. */
1460         if (qid && readl(&dev->bar->csts) != -1) {
1461                 adapter_delete_sq(dev, qid);
1462                 adapter_delete_cq(dev, qid);
1463         }
1464
1465         spin_lock_irq(&nvmeq->q_lock);
1466         nvme_process_cq(nvmeq);
1467         spin_unlock_irq(&nvmeq->q_lock);
1468 }
1469
1470 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
1471                                 int entry_size)
1472 {
1473         int q_depth = dev->q_depth;
1474         unsigned q_size_aligned = roundup(q_depth * entry_size, dev->page_size);
1475
1476         if (q_size_aligned * nr_io_queues > dev->cmb_size) {
1477                 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
1478                 mem_per_q = round_down(mem_per_q, dev->page_size);
1479                 q_depth = div_u64(mem_per_q, entry_size);
1480
1481                 /*
1482                  * Ensure the reduced q_depth is above some threshold where it
1483                  * would be better to map queues in system memory with the
1484                  * original depth
1485                  */
1486                 if (q_depth < 64)
1487                         return -ENOMEM;
1488         }
1489
1490         return q_depth;
1491 }
1492
1493 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1494                                 int qid, int depth)
1495 {
1496         if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) {
1497                 unsigned offset = (qid - 1) *
1498                                         roundup(SQ_SIZE(depth), dev->page_size);
1499                 nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset;
1500                 nvmeq->sq_cmds_io = dev->cmb + offset;
1501         } else {
1502                 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1503                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1504                 if (!nvmeq->sq_cmds)
1505                         return -ENOMEM;
1506         }
1507
1508         return 0;
1509 }
1510
1511 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1512                                                         int depth)
1513 {
1514         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1515         if (!nvmeq)
1516                 return NULL;
1517
1518         nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1519                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1520         if (!nvmeq->cqes)
1521                 goto free_nvmeq;
1522
1523         if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
1524                 goto free_cqdma;
1525
1526         nvmeq->q_dmadev = dev->dev;
1527         nvmeq->dev = dev;
1528         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1529                         dev->instance, qid);
1530         spin_lock_init(&nvmeq->q_lock);
1531         nvmeq->cq_head = 0;
1532         nvmeq->cq_phase = 1;
1533         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1534         nvmeq->q_depth = depth;
1535         nvmeq->qid = qid;
1536         nvmeq->cq_vector = -1;
1537         dev->queues[qid] = nvmeq;
1538
1539         /* make sure queue descriptor is set before queue count, for kthread */
1540         mb();
1541         dev->queue_count++;
1542
1543         return nvmeq;
1544
1545  free_cqdma:
1546         dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1547                                                         nvmeq->cq_dma_addr);
1548  free_nvmeq:
1549         kfree(nvmeq);
1550         return NULL;
1551 }
1552
1553 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1554                                                         const char *name)
1555 {
1556         if (use_threaded_interrupts)
1557                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1558                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1559                                         name, nvmeq);
1560         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1561                                 IRQF_SHARED, name, nvmeq);
1562 }
1563
1564 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1565 {
1566         struct nvme_dev *dev = nvmeq->dev;
1567
1568         spin_lock_irq(&nvmeq->q_lock);
1569         nvmeq->sq_tail = 0;
1570         nvmeq->cq_head = 0;
1571         nvmeq->cq_phase = 1;
1572         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1573         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1574         dev->online_queues++;
1575         spin_unlock_irq(&nvmeq->q_lock);
1576 }
1577
1578 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1579 {
1580         struct nvme_dev *dev = nvmeq->dev;
1581         int result;
1582
1583         nvmeq->cq_vector = qid - 1;
1584         result = adapter_alloc_cq(dev, qid, nvmeq);
1585         if (result < 0)
1586                 goto release_vector;
1587
1588         result = adapter_alloc_sq(dev, qid, nvmeq);
1589         if (result < 0)
1590                 goto release_cq;
1591
1592         nvme_init_queue(nvmeq, qid);
1593         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1594         if (result < 0)
1595                 goto release_sq;
1596
1597         return result;
1598
1599  release_sq:
1600         dev->online_queues--;
1601         adapter_delete_sq(dev, qid);
1602  release_cq:
1603         adapter_delete_cq(dev, qid);
1604  release_vector:
1605         nvmeq->cq_vector = -1;
1606         return result;
1607 }
1608
1609 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1610 {
1611         unsigned long timeout;
1612         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1613
1614         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1615
1616         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1617                 msleep(100);
1618                 if (fatal_signal_pending(current))
1619                         return -EINTR;
1620                 if (time_after(jiffies, timeout)) {
1621                         dev_err(dev->dev,
1622                                 "Device not ready; aborting %s\n", enabled ?
1623                                                 "initialisation" : "reset");
1624                         return -ENODEV;
1625                 }
1626         }
1627
1628         return 0;
1629 }
1630
1631 /*
1632  * If the device has been passed off to us in an enabled state, just clear
1633  * the enabled bit.  The spec says we should set the 'shutdown notification
1634  * bits', but doing so may cause the device to complete commands to the
1635  * admin queue ... and we don't know what memory that might be pointing at!
1636  */
1637 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1638 {
1639         struct pci_dev *pdev = to_pci_dev(dev->dev);
1640
1641         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1642         dev->ctrl_config &= ~NVME_CC_ENABLE;
1643         writel(dev->ctrl_config, &dev->bar->cc);
1644
1645         if (pdev->vendor == 0x1c58 && pdev->device == 0x0003)
1646                 msleep(NVME_QUIRK_DELAY_AMOUNT);
1647
1648         return nvme_wait_ready(dev, cap, false);
1649 }
1650
1651 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1652 {
1653         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1654         dev->ctrl_config |= NVME_CC_ENABLE;
1655         writel(dev->ctrl_config, &dev->bar->cc);
1656
1657         return nvme_wait_ready(dev, cap, true);
1658 }
1659
1660 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1661 {
1662         unsigned long timeout;
1663
1664         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1665         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1666
1667         writel(dev->ctrl_config, &dev->bar->cc);
1668
1669         timeout = SHUTDOWN_TIMEOUT + jiffies;
1670         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1671                                                         NVME_CSTS_SHST_CMPLT) {
1672                 msleep(100);
1673                 if (fatal_signal_pending(current))
1674                         return -EINTR;
1675                 if (time_after(jiffies, timeout)) {
1676                         dev_err(dev->dev,
1677                                 "Device shutdown incomplete; abort shutdown\n");
1678                         return -ENODEV;
1679                 }
1680         }
1681
1682         return 0;
1683 }
1684
1685 static struct blk_mq_ops nvme_mq_admin_ops = {
1686         .queue_rq       = nvme_queue_rq,
1687         .map_queue      = blk_mq_map_queue,
1688         .init_hctx      = nvme_admin_init_hctx,
1689         .exit_hctx      = nvme_admin_exit_hctx,
1690         .init_request   = nvme_admin_init_request,
1691         .timeout        = nvme_timeout,
1692 };
1693
1694 static struct blk_mq_ops nvme_mq_ops = {
1695         .queue_rq       = nvme_queue_rq,
1696         .map_queue      = blk_mq_map_queue,
1697         .init_hctx      = nvme_init_hctx,
1698         .init_request   = nvme_init_request,
1699         .timeout        = nvme_timeout,
1700         .poll           = nvme_poll,
1701 };
1702
1703 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1704 {
1705         if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1706                 blk_cleanup_queue(dev->admin_q);
1707                 blk_mq_free_tag_set(&dev->admin_tagset);
1708         }
1709 }
1710
1711 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1712 {
1713         if (!dev->admin_q) {
1714                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1715                 dev->admin_tagset.nr_hw_queues = 1;
1716                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1717                 dev->admin_tagset.reserved_tags = 1;
1718                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1719                 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1720                 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1721                 dev->admin_tagset.driver_data = dev;
1722
1723                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1724                         return -ENOMEM;
1725
1726                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1727                 if (IS_ERR(dev->admin_q)) {
1728                         blk_mq_free_tag_set(&dev->admin_tagset);
1729                         return -ENOMEM;
1730                 }
1731                 if (!blk_get_queue(dev->admin_q)) {
1732                         nvme_dev_remove_admin(dev);
1733                         dev->admin_q = NULL;
1734                         return -ENODEV;
1735                 }
1736         } else
1737                 blk_mq_unfreeze_queue(dev->admin_q);
1738
1739         return 0;
1740 }
1741
1742 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1743 {
1744         int result;
1745         u32 aqa;
1746         u64 cap = lo_hi_readq(&dev->bar->cap);
1747         struct nvme_queue *nvmeq;
1748         /*
1749          * default to a 4K page size, with the intention to update this
1750          * path in the future to accomodate architectures with differing
1751          * kernel and IO page sizes.
1752          */
1753         unsigned page_shift = 12;
1754         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1755
1756         if (page_shift < dev_page_min) {
1757                 dev_err(dev->dev,
1758                                 "Minimum device page size (%u) too large for "
1759                                 "host (%u)\n", 1 << dev_page_min,
1760                                 1 << page_shift);
1761                 return -ENODEV;
1762         }
1763
1764         dev->subsystem = readl(&dev->bar->vs) >= NVME_VS(1, 1) ?
1765                                                 NVME_CAP_NSSRC(cap) : 0;
1766
1767         if (dev->subsystem && (readl(&dev->bar->csts) & NVME_CSTS_NSSRO))
1768                 writel(NVME_CSTS_NSSRO, &dev->bar->csts);
1769
1770         result = nvme_disable_ctrl(dev, cap);
1771         if (result < 0)
1772                 return result;
1773
1774         nvmeq = dev->queues[0];
1775         if (!nvmeq) {
1776                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1777                 if (!nvmeq)
1778                         return -ENOMEM;
1779         }
1780
1781         aqa = nvmeq->q_depth - 1;
1782         aqa |= aqa << 16;
1783
1784         dev->page_size = 1 << page_shift;
1785
1786         dev->ctrl_config = NVME_CC_CSS_NVM;
1787         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1788         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1789         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1790
1791         writel(aqa, &dev->bar->aqa);
1792         lo_hi_writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1793         lo_hi_writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1794
1795         result = nvme_enable_ctrl(dev, cap);
1796         if (result)
1797                 goto free_nvmeq;
1798
1799         nvmeq->cq_vector = 0;
1800         nvme_init_queue(nvmeq, 0);
1801         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1802         if (result) {
1803                 nvmeq->cq_vector = -1;
1804                 goto free_nvmeq;
1805         }
1806
1807         return result;
1808
1809  free_nvmeq:
1810         nvme_free_queues(dev, 0);
1811         return result;
1812 }
1813
1814 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1815 {
1816         struct nvme_dev *dev = ns->dev;
1817         struct nvme_user_io io;
1818         struct nvme_command c;
1819         unsigned length, meta_len;
1820         int status, write;
1821         dma_addr_t meta_dma = 0;
1822         void *meta = NULL;
1823         void __user *metadata;
1824
1825         if (copy_from_user(&io, uio, sizeof(io)))
1826                 return -EFAULT;
1827
1828         switch (io.opcode) {
1829         case nvme_cmd_write:
1830         case nvme_cmd_read:
1831         case nvme_cmd_compare:
1832                 break;
1833         default:
1834                 return -EINVAL;
1835         }
1836
1837         length = (io.nblocks + 1) << ns->lba_shift;
1838         meta_len = (io.nblocks + 1) * ns->ms;
1839         metadata = (void __user *)(uintptr_t)io.metadata;
1840         write = io.opcode & 1;
1841
1842         if (ns->ext) {
1843                 length += meta_len;
1844                 meta_len = 0;
1845         }
1846         if (meta_len) {
1847                 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1848                         return -EINVAL;
1849
1850                 meta = dma_alloc_coherent(dev->dev, meta_len,
1851                                                 &meta_dma, GFP_KERNEL);
1852
1853                 if (!meta) {
1854                         status = -ENOMEM;
1855                         goto unmap;
1856                 }
1857                 if (write) {
1858                         if (copy_from_user(meta, metadata, meta_len)) {
1859                                 status = -EFAULT;
1860                                 goto unmap;
1861                         }
1862                 }
1863         }
1864
1865         memset(&c, 0, sizeof(c));
1866         c.rw.opcode = io.opcode;
1867         c.rw.flags = io.flags;
1868         c.rw.nsid = cpu_to_le32(ns->ns_id);
1869         c.rw.slba = cpu_to_le64(io.slba);
1870         c.rw.length = cpu_to_le16(io.nblocks);
1871         c.rw.control = cpu_to_le16(io.control);
1872         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1873         c.rw.reftag = cpu_to_le32(io.reftag);
1874         c.rw.apptag = cpu_to_le16(io.apptag);
1875         c.rw.appmask = cpu_to_le16(io.appmask);
1876         c.rw.metadata = cpu_to_le64(meta_dma);
1877
1878         status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1879                         (void __user *)(uintptr_t)io.addr, length, NULL, 0);
1880  unmap:
1881         if (meta) {
1882                 if (status == NVME_SC_SUCCESS && !write) {
1883                         if (copy_to_user(metadata, meta, meta_len))
1884                                 status = -EFAULT;
1885                 }
1886                 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1887         }
1888         return status;
1889 }
1890
1891 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1892                         struct nvme_passthru_cmd __user *ucmd)
1893 {
1894         struct nvme_passthru_cmd cmd;
1895         struct nvme_command c;
1896         unsigned timeout = 0;
1897         int status;
1898
1899         if (!capable(CAP_SYS_ADMIN))
1900                 return -EACCES;
1901         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1902                 return -EFAULT;
1903
1904         memset(&c, 0, sizeof(c));
1905         c.common.opcode = cmd.opcode;
1906         c.common.flags = cmd.flags;
1907         c.common.nsid = cpu_to_le32(cmd.nsid);
1908         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1909         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1910         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1911         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1912         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1913         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1914         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1915         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1916
1917         if (cmd.timeout_ms)
1918                 timeout = msecs_to_jiffies(cmd.timeout_ms);
1919
1920         status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1921                         NULL, (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
1922                         &cmd.result, timeout);
1923         if (status >= 0) {
1924                 if (put_user(cmd.result, &ucmd->result))
1925                         return -EFAULT;
1926         }
1927
1928         return status;
1929 }
1930
1931 static int nvme_subsys_reset(struct nvme_dev *dev)
1932 {
1933         if (!dev->subsystem)
1934                 return -ENOTTY;
1935
1936         writel(0x4E564D65, &dev->bar->nssr); /* "NVMe" */
1937         return 0;
1938 }
1939
1940 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1941                                                         unsigned long arg)
1942 {
1943         struct nvme_ns *ns = bdev->bd_disk->private_data;
1944
1945         switch (cmd) {
1946         case NVME_IOCTL_ID:
1947                 force_successful_syscall_return();
1948                 return ns->ns_id;
1949         case NVME_IOCTL_ADMIN_CMD:
1950                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1951         case NVME_IOCTL_IO_CMD:
1952                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1953         case NVME_IOCTL_SUBMIT_IO:
1954                 return nvme_submit_io(ns, (void __user *)arg);
1955         case SG_GET_VERSION_NUM:
1956                 return nvme_sg_get_version_num((void __user *)arg);
1957         case SG_IO:
1958                 return nvme_sg_io(ns, (void __user *)arg);
1959         default:
1960                 return -ENOTTY;
1961         }
1962 }
1963
1964 #ifdef CONFIG_COMPAT
1965 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1966                                         unsigned int cmd, unsigned long arg)
1967 {
1968         switch (cmd) {
1969         case SG_IO:
1970                 return -ENOIOCTLCMD;
1971         }
1972         return nvme_ioctl(bdev, mode, cmd, arg);
1973 }
1974 #else
1975 #define nvme_compat_ioctl       NULL
1976 #endif
1977
1978 static void nvme_free_dev(struct kref *kref);
1979 static void nvme_free_ns(struct kref *kref)
1980 {
1981         struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
1982
1983         if (ns->type == NVME_NS_LIGHTNVM)
1984                 nvme_nvm_unregister(ns->queue, ns->disk->disk_name);
1985
1986         spin_lock(&dev_list_lock);
1987         ns->disk->private_data = NULL;
1988         spin_unlock(&dev_list_lock);
1989
1990         kref_put(&ns->dev->kref, nvme_free_dev);
1991         put_disk(ns->disk);
1992         kfree(ns);
1993 }
1994
1995 static int nvme_open(struct block_device *bdev, fmode_t mode)
1996 {
1997         int ret = 0;
1998         struct nvme_ns *ns;
1999
2000         spin_lock(&dev_list_lock);
2001         ns = bdev->bd_disk->private_data;
2002         if (!ns)
2003                 ret = -ENXIO;
2004         else if (!kref_get_unless_zero(&ns->kref))
2005                 ret = -ENXIO;
2006         spin_unlock(&dev_list_lock);
2007
2008         return ret;
2009 }
2010
2011 static void nvme_release(struct gendisk *disk, fmode_t mode)
2012 {
2013         struct nvme_ns *ns = disk->private_data;
2014         kref_put(&ns->kref, nvme_free_ns);
2015 }
2016
2017 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
2018 {
2019         /* some standard values */
2020         geo->heads = 1 << 6;
2021         geo->sectors = 1 << 5;
2022         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
2023         return 0;
2024 }
2025
2026 static void nvme_config_discard(struct nvme_ns *ns)
2027 {
2028         u32 logical_block_size = queue_logical_block_size(ns->queue);
2029         ns->queue->limits.discard_zeroes_data = 0;
2030         ns->queue->limits.discard_alignment = logical_block_size;
2031         ns->queue->limits.discard_granularity = logical_block_size;
2032         blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
2033         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
2034 }
2035
2036 static int nvme_revalidate_disk(struct gendisk *disk)
2037 {
2038         struct nvme_ns *ns = disk->private_data;
2039         struct nvme_dev *dev = ns->dev;
2040         struct nvme_id_ns *id;
2041         u8 lbaf, pi_type;
2042         u16 old_ms;
2043         unsigned short bs;
2044
2045         if (nvme_identify_ns(dev, ns->ns_id, &id)) {
2046                 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
2047                                                 dev->instance, ns->ns_id);
2048                 return -ENODEV;
2049         }
2050         if (id->ncap == 0) {
2051                 kfree(id);
2052                 return -ENODEV;
2053         }
2054
2055         if (nvme_nvm_ns_supported(ns, id) && ns->type != NVME_NS_LIGHTNVM) {
2056                 if (nvme_nvm_register(ns->queue, disk->disk_name)) {
2057                         dev_warn(dev->dev,
2058                                 "%s: LightNVM init failure\n", __func__);
2059                         kfree(id);
2060                         return -ENODEV;
2061                 }
2062                 ns->type = NVME_NS_LIGHTNVM;
2063         }
2064
2065         old_ms = ns->ms;
2066         lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2067         ns->lba_shift = id->lbaf[lbaf].ds;
2068         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2069         ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
2070
2071         /*
2072          * If identify namespace failed, use default 512 byte block size so
2073          * block layer can use before failing read/write for 0 capacity.
2074          */
2075         if (ns->lba_shift == 0)
2076                 ns->lba_shift = 9;
2077         bs = 1 << ns->lba_shift;
2078
2079         /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2080         pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2081                                         id->dps & NVME_NS_DPS_PI_MASK : 0;
2082
2083         blk_mq_freeze_queue(disk->queue);
2084         if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2085                                 ns->ms != old_ms ||
2086                                 bs != queue_logical_block_size(disk->queue) ||
2087                                 (ns->ms && ns->ext)))
2088                 blk_integrity_unregister(disk);
2089
2090         ns->pi_type = pi_type;
2091         blk_queue_logical_block_size(ns->queue, bs);
2092
2093         if (ns->ms && !ns->ext)
2094                 nvme_init_integrity(ns);
2095
2096         if ((ns->ms && !(ns->ms == 8 && ns->pi_type) &&
2097                                                 !blk_get_integrity(disk)) ||
2098                                                 ns->type == NVME_NS_LIGHTNVM)
2099                 set_capacity(disk, 0);
2100         else
2101                 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2102
2103         if (dev->oncs & NVME_CTRL_ONCS_DSM)
2104                 nvme_config_discard(ns);
2105         blk_mq_unfreeze_queue(disk->queue);
2106
2107         kfree(id);
2108         return 0;
2109 }
2110
2111 static char nvme_pr_type(enum pr_type type)
2112 {
2113         switch (type) {
2114         case PR_WRITE_EXCLUSIVE:
2115                 return 1;
2116         case PR_EXCLUSIVE_ACCESS:
2117                 return 2;
2118         case PR_WRITE_EXCLUSIVE_REG_ONLY:
2119                 return 3;
2120         case PR_EXCLUSIVE_ACCESS_REG_ONLY:
2121                 return 4;
2122         case PR_WRITE_EXCLUSIVE_ALL_REGS:
2123                 return 5;
2124         case PR_EXCLUSIVE_ACCESS_ALL_REGS:
2125                 return 6;
2126         default:
2127                 return 0;
2128         }
2129 };
2130
2131 static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
2132                                 u64 key, u64 sa_key, u8 op)
2133 {
2134         struct nvme_ns *ns = bdev->bd_disk->private_data;
2135         struct nvme_command c;
2136         u8 data[16] = { 0, };
2137
2138         put_unaligned_le64(key, &data[0]);
2139         put_unaligned_le64(sa_key, &data[8]);
2140
2141         memset(&c, 0, sizeof(c));
2142         c.common.opcode = op;
2143         c.common.nsid = cpu_to_le32(ns->ns_id);
2144         c.common.cdw10[0] = cpu_to_le32(cdw10);
2145
2146         return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
2147 }
2148
2149 static int nvme_pr_register(struct block_device *bdev, u64 old,
2150                 u64 new, unsigned flags)
2151 {
2152         u32 cdw10;
2153
2154         if (flags & ~PR_FL_IGNORE_KEY)
2155                 return -EOPNOTSUPP;
2156
2157         cdw10 = old ? 2 : 0;
2158         cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
2159         cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
2160         return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
2161 }
2162
2163 static int nvme_pr_reserve(struct block_device *bdev, u64 key,
2164                 enum pr_type type, unsigned flags)
2165 {
2166         u32 cdw10;
2167
2168         if (flags & ~PR_FL_IGNORE_KEY)
2169                 return -EOPNOTSUPP;
2170
2171         cdw10 = nvme_pr_type(type) << 8;
2172         cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
2173         return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
2174 }
2175
2176 static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
2177                 enum pr_type type, bool abort)
2178 {
2179         u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
2180         return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
2181 }
2182
2183 static int nvme_pr_clear(struct block_device *bdev, u64 key)
2184 {
2185         u32 cdw10 = 1 | (key ? 1 << 3 : 0);
2186         return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
2187 }
2188
2189 static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
2190 {
2191         u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
2192         return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
2193 }
2194
2195 static const struct pr_ops nvme_pr_ops = {
2196         .pr_register    = nvme_pr_register,
2197         .pr_reserve     = nvme_pr_reserve,
2198         .pr_release     = nvme_pr_release,
2199         .pr_preempt     = nvme_pr_preempt,
2200         .pr_clear       = nvme_pr_clear,
2201 };
2202
2203 static const struct block_device_operations nvme_fops = {
2204         .owner          = THIS_MODULE,
2205         .ioctl          = nvme_ioctl,
2206         .compat_ioctl   = nvme_compat_ioctl,
2207         .open           = nvme_open,
2208         .release        = nvme_release,
2209         .getgeo         = nvme_getgeo,
2210         .revalidate_disk= nvme_revalidate_disk,
2211         .pr_ops         = &nvme_pr_ops,
2212 };
2213
2214 static int nvme_kthread(void *data)
2215 {
2216         struct nvme_dev *dev, *next;
2217
2218         while (!kthread_should_stop()) {
2219                 set_current_state(TASK_INTERRUPTIBLE);
2220                 spin_lock(&dev_list_lock);
2221                 list_for_each_entry_safe(dev, next, &dev_list, node) {
2222                         int i;
2223                         u32 csts = readl(&dev->bar->csts);
2224
2225                         if ((dev->subsystem && (csts & NVME_CSTS_NSSRO)) ||
2226                                                         csts & NVME_CSTS_CFS) {
2227                                 if (!__nvme_reset(dev)) {
2228                                         dev_warn(dev->dev,
2229                                                 "Failed status: %x, reset controller\n",
2230                                                 readl(&dev->bar->csts));
2231                                 }
2232                                 continue;
2233                         }
2234                         for (i = 0; i < dev->queue_count; i++) {
2235                                 struct nvme_queue *nvmeq = dev->queues[i];
2236                                 if (!nvmeq)
2237                                         continue;
2238                                 spin_lock_irq(&nvmeq->q_lock);
2239                                 nvme_process_cq(nvmeq);
2240
2241                                 while ((i == 0) && (dev->event_limit > 0)) {
2242                                         if (nvme_submit_async_admin_req(dev))
2243                                                 break;
2244                                         dev->event_limit--;
2245                                 }
2246                                 spin_unlock_irq(&nvmeq->q_lock);
2247                         }
2248                 }
2249                 spin_unlock(&dev_list_lock);
2250                 schedule_timeout(round_jiffies_relative(HZ));
2251         }
2252         return 0;
2253 }
2254
2255 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2256 {
2257         struct nvme_ns *ns;
2258         struct gendisk *disk;
2259         int node = dev_to_node(dev->dev);
2260
2261         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2262         if (!ns)
2263                 return;
2264
2265         ns->queue = blk_mq_init_queue(&dev->tagset);
2266         if (IS_ERR(ns->queue))
2267                 goto out_free_ns;
2268         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2269         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2270         ns->dev = dev;
2271         ns->queue->queuedata = ns;
2272
2273         disk = alloc_disk_node(0, node);
2274         if (!disk)
2275                 goto out_free_queue;
2276
2277         kref_init(&ns->kref);
2278         ns->ns_id = nsid;
2279         ns->disk = disk;
2280         ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2281         list_add_tail(&ns->list, &dev->namespaces);
2282
2283         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2284         if (dev->max_hw_sectors) {
2285                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2286                 blk_queue_max_segments(ns->queue,
2287                         (dev->max_hw_sectors / (dev->page_size >> 9)) + 1);
2288         }
2289         if (dev->stripe_size)
2290                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2291         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2292                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2293         blk_queue_virt_boundary(ns->queue, dev->page_size - 1);
2294
2295         disk->major = nvme_major;
2296         disk->first_minor = 0;
2297         disk->fops = &nvme_fops;
2298         disk->private_data = ns;
2299         disk->queue = ns->queue;
2300         disk->driverfs_dev = dev->device;
2301         disk->flags = GENHD_FL_EXT_DEVT;
2302         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2303
2304         /*
2305          * Initialize capacity to 0 until we establish the namespace format and
2306          * setup integrity extentions if necessary. The revalidate_disk after
2307          * add_disk allows the driver to register with integrity if the format
2308          * requires it.
2309          */
2310         set_capacity(disk, 0);
2311         if (nvme_revalidate_disk(ns->disk))
2312                 goto out_free_disk;
2313
2314         kref_get(&dev->kref);
2315         if (ns->type != NVME_NS_LIGHTNVM) {
2316                 add_disk(ns->disk);
2317                 if (ns->ms) {
2318                         struct block_device *bd = bdget_disk(ns->disk, 0);
2319                         if (!bd)
2320                                 return;
2321                         if (blkdev_get(bd, FMODE_READ, NULL)) {
2322                                 bdput(bd);
2323                                 return;
2324                         }
2325                         blkdev_reread_part(bd);
2326                         blkdev_put(bd, FMODE_READ);
2327                 }
2328         }
2329         return;
2330  out_free_disk:
2331         kfree(disk);
2332         list_del(&ns->list);
2333  out_free_queue:
2334         blk_cleanup_queue(ns->queue);
2335  out_free_ns:
2336         kfree(ns);
2337 }
2338
2339 /*
2340  * Create I/O queues.  Failing to create an I/O queue is not an issue,
2341  * we can continue with less than the desired amount of queues, and
2342  * even a controller without I/O queues an still be used to issue
2343  * admin commands.  This might be useful to upgrade a buggy firmware
2344  * for example.
2345  */
2346 static void nvme_create_io_queues(struct nvme_dev *dev)
2347 {
2348         unsigned i;
2349
2350         for (i = dev->queue_count; i <= dev->max_qid; i++)
2351                 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2352                         break;
2353
2354         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2355                 if (nvme_create_queue(dev->queues[i], i)) {
2356                         nvme_free_queues(dev, i);
2357                         break;
2358                 }
2359 }
2360
2361 static int set_queue_count(struct nvme_dev *dev, int count)
2362 {
2363         int status;
2364         u32 result;
2365         u32 q_count = (count - 1) | ((count - 1) << 16);
2366
2367         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2368                                                                 &result);
2369         if (status < 0)
2370                 return status;
2371         if (status > 0) {
2372                 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2373                 return 0;
2374         }
2375         return min(result & 0xffff, result >> 16) + 1;
2376 }
2377
2378 static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
2379 {
2380         u64 szu, size, offset;
2381         u32 cmbloc;
2382         resource_size_t bar_size;
2383         struct pci_dev *pdev = to_pci_dev(dev->dev);
2384         void __iomem *cmb;
2385         dma_addr_t dma_addr;
2386
2387         if (!use_cmb_sqes)
2388                 return NULL;
2389
2390         dev->cmbsz = readl(&dev->bar->cmbsz);
2391         if (!(NVME_CMB_SZ(dev->cmbsz)))
2392                 return NULL;
2393
2394         cmbloc = readl(&dev->bar->cmbloc);
2395
2396         szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz));
2397         size = szu * NVME_CMB_SZ(dev->cmbsz);
2398         offset = szu * NVME_CMB_OFST(cmbloc);
2399         bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc));
2400
2401         if (offset > bar_size)
2402                 return NULL;
2403
2404         /*
2405          * Controllers may support a CMB size larger than their BAR,
2406          * for example, due to being behind a bridge. Reduce the CMB to
2407          * the reported size of the BAR
2408          */
2409         if (size > bar_size - offset)
2410                 size = bar_size - offset;
2411
2412         dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset;
2413         cmb = ioremap_wc(dma_addr, size);
2414         if (!cmb)
2415                 return NULL;
2416
2417         dev->cmb_dma_addr = dma_addr;
2418         dev->cmb_size = size;
2419         return cmb;
2420 }
2421
2422 static inline void nvme_release_cmb(struct nvme_dev *dev)
2423 {
2424         if (dev->cmb) {
2425                 iounmap(dev->cmb);
2426                 dev->cmb = NULL;
2427         }
2428 }
2429
2430 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2431 {
2432         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2433 }
2434
2435 static int nvme_setup_io_queues(struct nvme_dev *dev)
2436 {
2437         struct nvme_queue *adminq = dev->queues[0];
2438         struct pci_dev *pdev = to_pci_dev(dev->dev);
2439         int result, i, vecs, nr_io_queues, size;
2440
2441         nr_io_queues = num_possible_cpus();
2442         result = set_queue_count(dev, nr_io_queues);
2443         if (result <= 0)
2444                 return result;
2445         if (result < nr_io_queues)
2446                 nr_io_queues = result;
2447
2448         if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) {
2449                 result = nvme_cmb_qdepth(dev, nr_io_queues,
2450                                 sizeof(struct nvme_command));
2451                 if (result > 0)
2452                         dev->q_depth = result;
2453                 else
2454                         nvme_release_cmb(dev);
2455         }
2456
2457         size = db_bar_size(dev, nr_io_queues);
2458         if (size > 8192) {
2459                 iounmap(dev->bar);
2460                 do {
2461                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2462                         if (dev->bar)
2463                                 break;
2464                         if (!--nr_io_queues)
2465                                 return -ENOMEM;
2466                         size = db_bar_size(dev, nr_io_queues);
2467                 } while (1);
2468                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2469                 adminq->q_db = dev->dbs;
2470         }
2471
2472         /* Deregister the admin queue's interrupt */
2473         free_irq(dev->entry[0].vector, adminq);
2474
2475         /*
2476          * If we enable msix early due to not intx, disable it again before
2477          * setting up the full range we need.
2478          */
2479         if (!pdev->irq)
2480                 pci_disable_msix(pdev);
2481
2482         for (i = 0; i < nr_io_queues; i++)
2483                 dev->entry[i].entry = i;
2484         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2485         if (vecs < 0) {
2486                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2487                 if (vecs < 0) {
2488                         vecs = 1;
2489                 } else {
2490                         for (i = 0; i < vecs; i++)
2491                                 dev->entry[i].vector = i + pdev->irq;
2492                 }
2493         }
2494
2495         /*
2496          * Should investigate if there's a performance win from allocating
2497          * more queues than interrupt vectors; it might allow the submission
2498          * path to scale better, even if the receive path is limited by the
2499          * number of interrupts.
2500          */
2501         nr_io_queues = vecs;
2502         dev->max_qid = nr_io_queues;
2503
2504         result = queue_request_irq(dev, adminq, adminq->irqname);
2505         if (result) {
2506                 adminq->cq_vector = -1;
2507                 goto free_queues;
2508         }
2509
2510         /* Free previously allocated queues that are no longer usable */
2511         nvme_free_queues(dev, nr_io_queues + 1);
2512         nvme_create_io_queues(dev);
2513
2514         return 0;
2515
2516  free_queues:
2517         nvme_free_queues(dev, 1);
2518         return result;
2519 }
2520
2521 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2522 {
2523         struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2524         struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2525
2526         return nsa->ns_id - nsb->ns_id;
2527 }
2528
2529 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2530 {
2531         struct nvme_ns *ns;
2532
2533         list_for_each_entry(ns, &dev->namespaces, list) {
2534                 if (ns->ns_id == nsid)
2535                         return ns;
2536                 if (ns->ns_id > nsid)
2537                         break;
2538         }
2539         return NULL;
2540 }
2541
2542 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2543 {
2544         return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2545                                                         dev->online_queues < 2);
2546 }
2547
2548 static void nvme_ns_remove(struct nvme_ns *ns)
2549 {
2550         bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2551
2552         if (kill) {
2553                 blk_set_queue_dying(ns->queue);
2554
2555                 /*
2556                  * The controller was shutdown first if we got here through
2557                  * device removal. The shutdown may requeue outstanding
2558                  * requests. These need to be aborted immediately so
2559                  * del_gendisk doesn't block indefinitely for their completion.
2560                  */
2561                 blk_mq_abort_requeue_list(ns->queue);
2562         }
2563         if (ns->disk->flags & GENHD_FL_UP)
2564                 del_gendisk(ns->disk);
2565         if (kill || !blk_queue_dying(ns->queue)) {
2566                 blk_mq_abort_requeue_list(ns->queue);
2567                 blk_cleanup_queue(ns->queue);
2568         }
2569         list_del_init(&ns->list);
2570         kref_put(&ns->kref, nvme_free_ns);
2571 }
2572
2573 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2574 {
2575         struct nvme_ns *ns, *next;
2576         unsigned i;
2577
2578         for (i = 1; i <= nn; i++) {
2579                 ns = nvme_find_ns(dev, i);
2580                 if (ns) {
2581                         if (revalidate_disk(ns->disk))
2582                                 nvme_ns_remove(ns);
2583                 } else
2584                         nvme_alloc_ns(dev, i);
2585         }
2586         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2587                 if (ns->ns_id > nn)
2588                         nvme_ns_remove(ns);
2589         }
2590         list_sort(NULL, &dev->namespaces, ns_cmp);
2591 }
2592
2593 static void nvme_set_irq_hints(struct nvme_dev *dev)
2594 {
2595         struct nvme_queue *nvmeq;
2596         int i;
2597
2598         for (i = 0; i < dev->online_queues; i++) {
2599                 nvmeq = dev->queues[i];
2600
2601                 if (!nvmeq->tags || !(*nvmeq->tags))
2602                         continue;
2603
2604                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2605                                         blk_mq_tags_cpumask(*nvmeq->tags));
2606         }
2607 }
2608
2609 static void nvme_dev_scan(struct work_struct *work)
2610 {
2611         struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2612         struct nvme_id_ctrl *ctrl;
2613
2614         if (!dev->tagset.tags)
2615                 return;
2616         if (nvme_identify_ctrl(dev, &ctrl))
2617                 return;
2618         nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2619         kfree(ctrl);
2620         nvme_set_irq_hints(dev);
2621 }
2622
2623 /*
2624  * Return: error value if an error occurred setting up the queues or calling
2625  * Identify Device.  0 if these succeeded, even if adding some of the
2626  * namespaces failed.  At the moment, these failures are silent.  TBD which
2627  * failures should be reported.
2628  */
2629 static int nvme_dev_add(struct nvme_dev *dev)
2630 {
2631         struct pci_dev *pdev = to_pci_dev(dev->dev);
2632         int res;
2633         struct nvme_id_ctrl *ctrl;
2634         int shift = NVME_CAP_MPSMIN(lo_hi_readq(&dev->bar->cap)) + 12;
2635
2636         res = nvme_identify_ctrl(dev, &ctrl);
2637         if (res) {
2638                 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2639                 return -EIO;
2640         }
2641
2642         dev->oncs = le16_to_cpup(&ctrl->oncs);
2643         dev->abort_limit = ctrl->acl + 1;
2644         dev->vwc = ctrl->vwc;
2645         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2646         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2647         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2648         if (ctrl->mdts)
2649                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2650         else
2651                 dev->max_hw_sectors = UINT_MAX;
2652         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2653                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2654                 unsigned int max_hw_sectors;
2655
2656                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2657                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2658                 if (dev->max_hw_sectors) {
2659                         dev->max_hw_sectors = min(max_hw_sectors,
2660                                                         dev->max_hw_sectors);
2661                 } else
2662                         dev->max_hw_sectors = max_hw_sectors;
2663         }
2664         kfree(ctrl);
2665
2666         if (!dev->tagset.tags) {
2667                 dev->tagset.ops = &nvme_mq_ops;
2668                 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2669                 dev->tagset.timeout = NVME_IO_TIMEOUT;
2670                 dev->tagset.numa_node = dev_to_node(dev->dev);
2671                 dev->tagset.queue_depth =
2672                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2673                 dev->tagset.cmd_size = nvme_cmd_size(dev);
2674                 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2675                 dev->tagset.driver_data = dev;
2676
2677                 if (blk_mq_alloc_tag_set(&dev->tagset))
2678                         return 0;
2679         }
2680         schedule_work(&dev->scan_work);
2681         return 0;
2682 }
2683
2684 static int nvme_pci_enable(struct nvme_dev *dev)
2685 {
2686         u64 cap;
2687         int result = -ENOMEM;
2688         struct pci_dev *pdev = to_pci_dev(dev->dev);
2689
2690         if (pci_enable_device_mem(pdev))
2691                 return result;
2692
2693         dev->entry[0].vector = pdev->irq;
2694         pci_set_master(pdev);
2695
2696         if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2697             dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2698                 goto disable;
2699
2700         if (readl(&dev->bar->csts) == -1) {
2701                 result = -ENODEV;
2702                 goto disable;
2703         }
2704
2705         /*
2706          * Some devices don't advertse INTx interrupts, pre-enable a single
2707          * MSIX vec for setup. We'll adjust this later.
2708          */
2709         if (!pdev->irq) {
2710                 result = pci_enable_msix(pdev, dev->entry, 1);
2711                 if (result < 0)
2712                         goto disable;
2713         }
2714
2715         cap = lo_hi_readq(&dev->bar->cap);
2716         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2717         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2718         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2719
2720         /*
2721          * Temporary fix for the Apple controller found in the MacBook8,1 and
2722          * some MacBook7,1 to avoid controller resets and data loss.
2723          */
2724         if (pdev->vendor == PCI_VENDOR_ID_APPLE && pdev->device == 0x2001) {
2725                 dev->q_depth = 2;
2726                 dev_warn(dev->dev, "detected Apple NVMe controller, set "
2727                         "queue depth=%u to work around controller resets\n",
2728                         dev->q_depth);
2729         }
2730
2731         if (readl(&dev->bar->vs) >= NVME_VS(1, 2))
2732                 dev->cmb = nvme_map_cmb(dev);
2733
2734         return 0;
2735
2736  disable:
2737         pci_disable_device(pdev);
2738
2739         return result;
2740 }
2741
2742 static void nvme_dev_unmap(struct nvme_dev *dev)
2743 {
2744         if (dev->bar)
2745                 iounmap(dev->bar);
2746         pci_release_regions(to_pci_dev(dev->dev));
2747 }
2748
2749 static void nvme_pci_disable(struct nvme_dev *dev)
2750 {
2751         struct pci_dev *pdev = to_pci_dev(dev->dev);
2752
2753         if (pdev->msi_enabled)
2754                 pci_disable_msi(pdev);
2755         else if (pdev->msix_enabled)
2756                 pci_disable_msix(pdev);
2757
2758         if (pci_is_enabled(pdev))
2759                 pci_disable_device(pdev);
2760 }
2761
2762 struct nvme_delq_ctx {
2763         struct task_struct *waiter;
2764         struct kthread_worker *worker;
2765         atomic_t refcount;
2766 };
2767
2768 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2769 {
2770         dq->waiter = current;
2771         mb();
2772
2773         for (;;) {
2774                 set_current_state(TASK_KILLABLE);
2775                 if (!atomic_read(&dq->refcount))
2776                         break;
2777                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2778                                         fatal_signal_pending(current)) {
2779                         /*
2780                          * Disable the controller first since we can't trust it
2781                          * at this point, but leave the admin queue enabled
2782                          * until all queue deletion requests are flushed.
2783                          * FIXME: This may take a while if there are more h/w
2784                          * queues than admin tags.
2785                          */
2786                         set_current_state(TASK_RUNNING);
2787                         nvme_disable_ctrl(dev, lo_hi_readq(&dev->bar->cap));
2788                         nvme_clear_queue(dev->queues[0]);
2789                         flush_kthread_worker(dq->worker);
2790                         nvme_disable_queue(dev, 0);
2791                         return;
2792                 }
2793         }
2794         set_current_state(TASK_RUNNING);
2795 }
2796
2797 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2798 {
2799         atomic_dec(&dq->refcount);
2800         if (dq->waiter)
2801                 wake_up_process(dq->waiter);
2802 }
2803
2804 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2805 {
2806         atomic_inc(&dq->refcount);
2807         return dq;
2808 }
2809
2810 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2811 {
2812         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2813         nvme_put_dq(dq);
2814
2815         spin_lock_irq(&nvmeq->q_lock);
2816         nvme_process_cq(nvmeq);
2817         spin_unlock_irq(&nvmeq->q_lock);
2818 }
2819
2820 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2821                                                 kthread_work_func_t fn)
2822 {
2823         struct nvme_command c;
2824
2825         memset(&c, 0, sizeof(c));
2826         c.delete_queue.opcode = opcode;
2827         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2828
2829         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2830         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2831                                                                 ADMIN_TIMEOUT);
2832 }
2833
2834 static void nvme_del_cq_work_handler(struct kthread_work *work)
2835 {
2836         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2837                                                         cmdinfo.work);
2838         nvme_del_queue_end(nvmeq);
2839 }
2840
2841 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2842 {
2843         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2844                                                 nvme_del_cq_work_handler);
2845 }
2846
2847 static void nvme_del_sq_work_handler(struct kthread_work *work)
2848 {
2849         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2850                                                         cmdinfo.work);
2851         int status = nvmeq->cmdinfo.status;
2852
2853         if (!status)
2854                 status = nvme_delete_cq(nvmeq);
2855         if (status)
2856                 nvme_del_queue_end(nvmeq);
2857 }
2858
2859 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2860 {
2861         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2862                                                 nvme_del_sq_work_handler);
2863 }
2864
2865 static void nvme_del_queue_start(struct kthread_work *work)
2866 {
2867         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2868                                                         cmdinfo.work);
2869         if (nvme_delete_sq(nvmeq))
2870                 nvme_del_queue_end(nvmeq);
2871 }
2872
2873 static void nvme_disable_io_queues(struct nvme_dev *dev)
2874 {
2875         int i;
2876         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2877         struct nvme_delq_ctx dq;
2878         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2879                                         &worker, "nvme%d", dev->instance);
2880
2881         if (IS_ERR(kworker_task)) {
2882                 dev_err(dev->dev,
2883                         "Failed to create queue del task\n");
2884                 for (i = dev->queue_count - 1; i > 0; i--)
2885                         nvme_disable_queue(dev, i);
2886                 return;
2887         }
2888
2889         dq.waiter = NULL;
2890         atomic_set(&dq.refcount, 0);
2891         dq.worker = &worker;
2892         for (i = dev->queue_count - 1; i > 0; i--) {
2893                 struct nvme_queue *nvmeq = dev->queues[i];
2894
2895                 if (nvme_suspend_queue(nvmeq))
2896                         continue;
2897                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2898                 nvmeq->cmdinfo.worker = dq.worker;
2899                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2900                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2901         }
2902         nvme_wait_dq(&dq, dev);
2903         kthread_stop(kworker_task);
2904 }
2905
2906 /*
2907 * Remove the node from the device list and check
2908 * for whether or not we need to stop the nvme_thread.
2909 */
2910 static void nvme_dev_list_remove(struct nvme_dev *dev)
2911 {
2912         struct task_struct *tmp = NULL;
2913
2914         spin_lock(&dev_list_lock);
2915         list_del_init(&dev->node);
2916         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2917                 tmp = nvme_thread;
2918                 nvme_thread = NULL;
2919         }
2920         spin_unlock(&dev_list_lock);
2921
2922         if (tmp)
2923                 kthread_stop(tmp);
2924 }
2925
2926 static void nvme_freeze_queues(struct nvme_dev *dev)
2927 {
2928         struct nvme_ns *ns;
2929
2930         list_for_each_entry(ns, &dev->namespaces, list) {
2931                 blk_mq_freeze_queue_start(ns->queue);
2932
2933                 spin_lock_irq(ns->queue->queue_lock);
2934                 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2935                 spin_unlock_irq(ns->queue->queue_lock);
2936
2937                 blk_mq_cancel_requeue_work(ns->queue);
2938                 blk_mq_stop_hw_queues(ns->queue);
2939         }
2940 }
2941
2942 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2943 {
2944         struct nvme_ns *ns;
2945
2946         list_for_each_entry(ns, &dev->namespaces, list) {
2947                 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2948                 blk_mq_unfreeze_queue(ns->queue);
2949                 blk_mq_start_stopped_hw_queues(ns->queue, true);
2950                 blk_mq_kick_requeue_list(ns->queue);
2951         }
2952 }
2953
2954 static void nvme_dev_shutdown(struct nvme_dev *dev)
2955 {
2956         int i;
2957         u32 csts = -1;
2958
2959         nvme_dev_list_remove(dev);
2960
2961         mutex_lock(&dev->shutdown_lock);
2962         if (pci_is_enabled(to_pci_dev(dev->dev))) {
2963                 nvme_freeze_queues(dev);
2964                 csts = readl(&dev->bar->csts);
2965         }
2966         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2967                 for (i = dev->queue_count - 1; i >= 0; i--) {
2968                         struct nvme_queue *nvmeq = dev->queues[i];
2969                         nvme_suspend_queue(nvmeq);
2970                 }
2971         } else {
2972                 nvme_disable_io_queues(dev);
2973                 nvme_shutdown_ctrl(dev);
2974                 nvme_disable_queue(dev, 0);
2975         }
2976         nvme_pci_disable(dev);
2977
2978         for (i = dev->queue_count - 1; i >= 0; i--)
2979                 nvme_clear_queue(dev->queues[i]);
2980         mutex_unlock(&dev->shutdown_lock);
2981 }
2982
2983 static void nvme_remove_namespaces(struct nvme_dev *dev)
2984 {
2985         struct nvme_ns *ns, *next;
2986
2987         list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2988                 nvme_ns_remove(ns);
2989 }
2990
2991 static void nvme_dev_remove(struct nvme_dev *dev)
2992 {
2993         if (nvme_io_incapable(dev)) {
2994                 /*
2995                  * If the device is not capable of IO (surprise hot-removal,
2996                  * for example), we need to quiesce prior to deleting the
2997                  * namespaces. This will end outstanding requests and prevent
2998                  * attempts to sync dirty data.
2999                  */
3000                 nvme_dev_shutdown(dev);
3001         }
3002         nvme_remove_namespaces(dev);
3003 }
3004
3005 static int nvme_setup_prp_pools(struct nvme_dev *dev)
3006 {
3007         dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
3008                                                 PAGE_SIZE, PAGE_SIZE, 0);
3009         if (!dev->prp_page_pool)
3010                 return -ENOMEM;
3011
3012         /* Optimisation for I/Os between 4k and 128k */
3013         dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
3014                                                 256, 256, 0);
3015         if (!dev->prp_small_pool) {
3016                 dma_pool_destroy(dev->prp_page_pool);
3017                 return -ENOMEM;
3018         }
3019         return 0;
3020 }
3021
3022 static void nvme_release_prp_pools(struct nvme_dev *dev)
3023 {
3024         dma_pool_destroy(dev->prp_page_pool);
3025         dma_pool_destroy(dev->prp_small_pool);
3026 }
3027
3028 static DEFINE_IDA(nvme_instance_ida);
3029
3030 static int nvme_set_instance(struct nvme_dev *dev)
3031 {
3032         int instance, error;
3033
3034         do {
3035                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
3036                         return -ENODEV;
3037
3038                 spin_lock(&dev_list_lock);
3039                 error = ida_get_new(&nvme_instance_ida, &instance);
3040                 spin_unlock(&dev_list_lock);
3041         } while (error == -EAGAIN);
3042
3043         if (error)
3044                 return -ENODEV;
3045
3046         dev->instance = instance;
3047         return 0;
3048 }
3049
3050 static void nvme_release_instance(struct nvme_dev *dev)
3051 {
3052         spin_lock(&dev_list_lock);
3053         ida_remove(&nvme_instance_ida, dev->instance);
3054         spin_unlock(&dev_list_lock);
3055 }
3056
3057 static void nvme_free_dev(struct kref *kref)
3058 {
3059         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
3060
3061         put_device(dev->dev);
3062         put_device(dev->device);
3063         nvme_release_instance(dev);
3064         if (dev->tagset.tags)
3065                 blk_mq_free_tag_set(&dev->tagset);
3066         if (dev->admin_q)
3067                 blk_put_queue(dev->admin_q);
3068         kfree(dev->queues);
3069         kfree(dev->entry);
3070         kfree(dev);
3071 }
3072
3073 static int nvme_dev_open(struct inode *inode, struct file *f)
3074 {
3075         struct nvme_dev *dev;
3076         int instance = iminor(inode);
3077         int ret = -ENODEV;
3078
3079         spin_lock(&dev_list_lock);
3080         list_for_each_entry(dev, &dev_list, node) {
3081                 if (dev->instance == instance) {
3082                         if (!dev->admin_q) {
3083                                 ret = -EWOULDBLOCK;
3084                                 break;
3085                         }
3086                         if (!kref_get_unless_zero(&dev->kref))
3087                                 break;
3088                         f->private_data = dev;
3089                         ret = 0;
3090                         break;
3091                 }
3092         }
3093         spin_unlock(&dev_list_lock);
3094
3095         return ret;
3096 }
3097
3098 static int nvme_dev_release(struct inode *inode, struct file *f)
3099 {
3100         struct nvme_dev *dev = f->private_data;
3101         kref_put(&dev->kref, nvme_free_dev);
3102         return 0;
3103 }
3104
3105 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
3106 {
3107         struct nvme_dev *dev = f->private_data;
3108         struct nvme_ns *ns;
3109
3110         switch (cmd) {
3111         case NVME_IOCTL_ADMIN_CMD:
3112                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
3113         case NVME_IOCTL_IO_CMD:
3114                 if (list_empty(&dev->namespaces))
3115                         return -ENOTTY;
3116                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
3117                 return nvme_user_cmd(dev, ns, (void __user *)arg);
3118         case NVME_IOCTL_RESET:
3119                 dev_warn(dev->dev, "resetting controller\n");
3120                 return nvme_reset(dev);
3121         case NVME_IOCTL_SUBSYS_RESET:
3122                 return nvme_subsys_reset(dev);
3123         default:
3124                 return -ENOTTY;
3125         }
3126 }
3127
3128 static const struct file_operations nvme_dev_fops = {
3129         .owner          = THIS_MODULE,
3130         .open           = nvme_dev_open,
3131         .release        = nvme_dev_release,
3132         .unlocked_ioctl = nvme_dev_ioctl,
3133         .compat_ioctl   = nvme_dev_ioctl,
3134 };
3135
3136 static void nvme_probe_work(struct work_struct *work)
3137 {
3138         struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3139         bool start_thread = false;
3140         int result;
3141
3142         result = nvme_pci_enable(dev);
3143         if (result)
3144                 goto out;
3145
3146         result = nvme_configure_admin_queue(dev);
3147         if (result)
3148                 goto unmap;
3149
3150         spin_lock(&dev_list_lock);
3151         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
3152                 start_thread = true;
3153                 nvme_thread = NULL;
3154         }
3155         list_add(&dev->node, &dev_list);
3156         spin_unlock(&dev_list_lock);
3157
3158         if (start_thread) {
3159                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
3160                 wake_up_all(&nvme_kthread_wait);
3161         } else
3162                 wait_event_killable(nvme_kthread_wait, nvme_thread);
3163
3164         if (IS_ERR_OR_NULL(nvme_thread)) {
3165                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
3166                 goto disable;
3167         }
3168
3169         result = nvme_alloc_admin_tags(dev);
3170         if (result)
3171                 goto disable;
3172
3173         result = nvme_setup_io_queues(dev);
3174         if (result)
3175                 goto free_tags;
3176
3177         dev->event_limit = 1;
3178
3179         /*
3180          * Keep the controller around but remove all namespaces if we don't have
3181          * any working I/O queue.
3182          */
3183         if (dev->online_queues < 2) {
3184                 dev_warn(dev->dev, "IO queues not created\n");
3185                 nvme_remove_namespaces(dev);
3186         } else {
3187                 nvme_unfreeze_queues(dev);
3188                 nvme_dev_add(dev);
3189         }
3190
3191         return;
3192
3193  free_tags:
3194         nvme_dev_remove_admin(dev);
3195         blk_put_queue(dev->admin_q);
3196         dev->admin_q = NULL;
3197         dev->queues[0]->tags = NULL;
3198  disable:
3199         nvme_disable_queue(dev, 0);
3200         nvme_dev_list_remove(dev);
3201  unmap:
3202         nvme_dev_unmap(dev);
3203  out:
3204         if (!work_busy(&dev->reset_work))
3205                 nvme_dead_ctrl(dev);
3206 }
3207
3208 static int nvme_remove_dead_ctrl(void *arg)
3209 {
3210         struct nvme_dev *dev = (struct nvme_dev *)arg;
3211         struct pci_dev *pdev = to_pci_dev(dev->dev);
3212
3213         if (pci_get_drvdata(pdev))
3214                 pci_stop_and_remove_bus_device_locked(pdev);
3215         kref_put(&dev->kref, nvme_free_dev);
3216         return 0;
3217 }
3218
3219 static void nvme_dead_ctrl(struct nvme_dev *dev)
3220 {
3221         dev_warn(dev->dev, "Device failed to resume\n");
3222         kref_get(&dev->kref);
3223         if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
3224                                                 dev->instance))) {
3225                 dev_err(dev->dev,
3226                         "Failed to start controller remove task\n");
3227                 kref_put(&dev->kref, nvme_free_dev);
3228         }
3229 }
3230
3231 static void nvme_reset_work(struct work_struct *ws)
3232 {
3233         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3234         bool in_probe = work_busy(&dev->probe_work);
3235
3236         nvme_dev_shutdown(dev);
3237
3238         /* Synchronize with device probe so that work will see failure status
3239          * and exit gracefully without trying to schedule another reset */
3240         flush_work(&dev->probe_work);
3241
3242         /* Fail this device if reset occured during probe to avoid
3243          * infinite initialization loops. */
3244         if (in_probe) {
3245                 nvme_dead_ctrl(dev);
3246                 return;
3247         }
3248         /* Schedule device resume asynchronously so the reset work is available
3249          * to cleanup errors that may occur during reinitialization */
3250         schedule_work(&dev->probe_work);
3251 }
3252
3253 static int __nvme_reset(struct nvme_dev *dev)
3254 {
3255         if (work_pending(&dev->reset_work))
3256                 return -EBUSY;
3257         list_del_init(&dev->node);
3258         queue_work(nvme_workq, &dev->reset_work);
3259         return 0;
3260 }
3261
3262 static int nvme_reset(struct nvme_dev *dev)
3263 {
3264         int ret;
3265
3266         if (!dev->admin_q || blk_queue_dying(dev->admin_q))
3267                 return -ENODEV;
3268
3269         spin_lock(&dev_list_lock);
3270         ret = __nvme_reset(dev);
3271         spin_unlock(&dev_list_lock);
3272
3273         if (!ret) {
3274                 flush_work(&dev->reset_work);
3275                 flush_work(&dev->probe_work);
3276                 return 0;
3277         }
3278
3279         return ret;
3280 }
3281
3282 static ssize_t nvme_sysfs_reset(struct device *dev,
3283                                 struct device_attribute *attr, const char *buf,
3284                                 size_t count)
3285 {
3286         struct nvme_dev *ndev = dev_get_drvdata(dev);
3287         int ret;
3288
3289         ret = nvme_reset(ndev);
3290         if (ret < 0)
3291                 return ret;
3292
3293         return count;
3294 }
3295 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3296
3297 static int nvme_dev_map(struct nvme_dev *dev)
3298 {
3299         int bars;
3300         struct pci_dev *pdev = to_pci_dev(dev->dev);
3301
3302         bars = pci_select_bars(pdev, IORESOURCE_MEM);
3303         if (!bars)
3304                 return -ENODEV;
3305         if (pci_request_selected_regions(pdev, bars, "nvme"))
3306                 return -ENODEV;
3307
3308         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
3309         if (!dev->bar)
3310                 goto release;
3311
3312         return 0;
3313 release:
3314         pci_release_regions(pdev);
3315         return -ENODEV;
3316 }
3317
3318 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3319 {
3320         int node, result = -ENOMEM;
3321         struct nvme_dev *dev;
3322
3323         node = dev_to_node(&pdev->dev);
3324         if (node == NUMA_NO_NODE)
3325                 set_dev_node(&pdev->dev, 0);
3326
3327         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
3328         if (!dev)
3329                 return -ENOMEM;
3330         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
3331                                                         GFP_KERNEL, node);
3332         if (!dev->entry)
3333                 goto free;
3334         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3335                                                         GFP_KERNEL, node);
3336         if (!dev->queues)
3337                 goto free;
3338
3339         INIT_LIST_HEAD(&dev->namespaces);
3340         INIT_WORK(&dev->reset_work, nvme_reset_work);
3341         mutex_init(&dev->shutdown_lock);
3342         dev->dev = get_device(&pdev->dev);
3343         pci_set_drvdata(pdev, dev);
3344
3345         result = nvme_dev_map(dev);
3346         if (result)
3347                 goto free;
3348
3349         result = nvme_set_instance(dev);
3350         if (result)
3351                 goto put_pci;
3352
3353         result = nvme_setup_prp_pools(dev);
3354         if (result)
3355                 goto release;
3356
3357         kref_init(&dev->kref);
3358         dev->device = device_create(nvme_class, &pdev->dev,
3359                                 MKDEV(nvme_char_major, dev->instance),
3360                                 dev, "nvme%d", dev->instance);
3361         if (IS_ERR(dev->device)) {
3362                 result = PTR_ERR(dev->device);
3363                 goto release_pools;
3364         }
3365         get_device(dev->device);
3366         dev_set_drvdata(dev->device, dev);
3367
3368         result = device_create_file(dev->device, &dev_attr_reset_controller);
3369         if (result)
3370                 goto put_dev;
3371
3372         INIT_LIST_HEAD(&dev->node);
3373         INIT_WORK(&dev->scan_work, nvme_dev_scan);
3374         INIT_WORK(&dev->probe_work, nvme_probe_work);
3375         schedule_work(&dev->probe_work);
3376         return 0;
3377
3378  put_dev:
3379         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3380         put_device(dev->device);
3381  release_pools:
3382         nvme_release_prp_pools(dev);
3383  release:
3384         nvme_release_instance(dev);
3385  put_pci:
3386         put_device(dev->dev);
3387         nvme_dev_unmap(dev);
3388  free:
3389         kfree(dev->queues);
3390         kfree(dev->entry);
3391         kfree(dev);
3392         return result;
3393 }
3394
3395 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3396 {
3397         struct nvme_dev *dev = pci_get_drvdata(pdev);
3398
3399         if (prepare)
3400                 nvme_dev_shutdown(dev);
3401         else
3402                 schedule_work(&dev->probe_work);
3403 }
3404
3405 static void nvme_shutdown(struct pci_dev *pdev)
3406 {
3407         struct nvme_dev *dev = pci_get_drvdata(pdev);
3408         nvme_dev_shutdown(dev);
3409 }
3410
3411 static void nvme_remove(struct pci_dev *pdev)
3412 {
3413         struct nvme_dev *dev = pci_get_drvdata(pdev);
3414
3415         spin_lock(&dev_list_lock);
3416         list_del_init(&dev->node);
3417         spin_unlock(&dev_list_lock);
3418
3419         pci_set_drvdata(pdev, NULL);
3420         flush_work(&dev->probe_work);
3421         flush_work(&dev->reset_work);
3422         flush_work(&dev->scan_work);
3423         device_remove_file(dev->device, &dev_attr_reset_controller);
3424         nvme_dev_remove(dev);
3425         nvme_dev_shutdown(dev);
3426         nvme_dev_remove_admin(dev);
3427         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3428         nvme_free_queues(dev, 0);
3429         nvme_release_cmb(dev);
3430         nvme_release_prp_pools(dev);
3431         nvme_dev_unmap(dev);
3432         kref_put(&dev->kref, nvme_free_dev);
3433 }
3434
3435 /* These functions are yet to be implemented */
3436 #define nvme_error_detected NULL
3437 #define nvme_dump_registers NULL
3438 #define nvme_link_reset NULL
3439 #define nvme_slot_reset NULL
3440 #define nvme_error_resume NULL
3441
3442 #ifdef CONFIG_PM_SLEEP
3443 static int nvme_suspend(struct device *dev)
3444 {
3445         struct pci_dev *pdev = to_pci_dev(dev);
3446         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3447
3448         nvme_dev_shutdown(ndev);
3449         return 0;
3450 }
3451
3452 static int nvme_resume(struct device *dev)
3453 {
3454         struct pci_dev *pdev = to_pci_dev(dev);
3455         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3456
3457         schedule_work(&ndev->probe_work);
3458         return 0;
3459 }
3460 #endif
3461
3462 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3463
3464 static const struct pci_error_handlers nvme_err_handler = {
3465         .error_detected = nvme_error_detected,
3466         .mmio_enabled   = nvme_dump_registers,
3467         .link_reset     = nvme_link_reset,
3468         .slot_reset     = nvme_slot_reset,
3469         .resume         = nvme_error_resume,
3470         .reset_notify   = nvme_reset_notify,
3471 };
3472
3473 /* Move to pci_ids.h later */
3474 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
3475
3476 static const struct pci_device_id nvme_id_table[] = {
3477         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3478         { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) },
3479         { 0, }
3480 };
3481 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3482
3483 static struct pci_driver nvme_driver = {
3484         .name           = "nvme",
3485         .id_table       = nvme_id_table,
3486         .probe          = nvme_probe,
3487         .remove         = nvme_remove,
3488         .shutdown       = nvme_shutdown,
3489         .driver         = {
3490                 .pm     = &nvme_dev_pm_ops,
3491         },
3492         .err_handler    = &nvme_err_handler,
3493 };
3494
3495 static int __init nvme_init(void)
3496 {
3497         int result;
3498
3499         init_waitqueue_head(&nvme_kthread_wait);
3500
3501         nvme_workq = create_singlethread_workqueue("nvme");
3502         if (!nvme_workq)
3503                 return -ENOMEM;
3504
3505         result = register_blkdev(nvme_major, "nvme");
3506         if (result < 0)
3507                 goto kill_workq;
3508         else if (result > 0)
3509                 nvme_major = result;
3510
3511         result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3512                                                         &nvme_dev_fops);
3513         if (result < 0)
3514                 goto unregister_blkdev;
3515         else if (result > 0)
3516                 nvme_char_major = result;
3517
3518         nvme_class = class_create(THIS_MODULE, "nvme");
3519         if (IS_ERR(nvme_class)) {
3520                 result = PTR_ERR(nvme_class);
3521                 goto unregister_chrdev;
3522         }
3523
3524         result = pci_register_driver(&nvme_driver);
3525         if (result)
3526                 goto destroy_class;
3527         return 0;
3528
3529  destroy_class:
3530         class_destroy(nvme_class);
3531  unregister_chrdev:
3532         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3533  unregister_blkdev:
3534         unregister_blkdev(nvme_major, "nvme");
3535  kill_workq:
3536         destroy_workqueue(nvme_workq);
3537         return result;
3538 }
3539
3540 static void __exit nvme_exit(void)
3541 {
3542         pci_unregister_driver(&nvme_driver);
3543         unregister_blkdev(nvme_major, "nvme");
3544         destroy_workqueue(nvme_workq);
3545         class_destroy(nvme_class);
3546         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3547         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3548         _nvme_check_size();
3549 }
3550
3551 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3552 MODULE_LICENSE("GPL");
3553 MODULE_VERSION("1.0");
3554 module_init(nvme_init);
3555 module_exit(nvme_exit);