drivers/phy/ti/phy-twl4030-usb.c

   1 /*
   2  * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
   3  *
   4  * Copyright (C) 2004-2007 Texas Instruments
   5  * Copyright (C) 2008 Nokia Corporation
   6  * Contact: Felipe Balbi <felipe.balbi@nokia.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Current status:
  23  *      - HS USB ULPI mode works.
  24  *      - 3-pin mode support may be added in future.
  25  */
  26
  27 #include <linux/module.h>
  28 #include <linux/init.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/workqueue.h>
  32 #include <linux/io.h>
  33 #include <linux/delay.h>
  34 #include <linux/usb/otg.h>
  35 #include <linux/phy/phy.h>
  36 #include <linux/pm_runtime.h>
  37 #include <linux/usb/musb.h>
  38 #include <linux/usb/ulpi.h>
  39 #include <linux/mfd/twl.h>
  40 #include <linux/regulator/consumer.h>
  41 #include <linux/err.h>
  42 #include <linux/slab.h>
  43
  44 /* Register defines */
  45
  46 #define MCPC_CTRL                       0x30
  47 #define MCPC_CTRL_RTSOL                 (1 << 7)
  48 #define MCPC_CTRL_EXTSWR                (1 << 6)
  49 #define MCPC_CTRL_EXTSWC                (1 << 5)
  50 #define MCPC_CTRL_VOICESW               (1 << 4)
  51 #define MCPC_CTRL_OUT64K                (1 << 3)
  52 #define MCPC_CTRL_RTSCTSSW              (1 << 2)
  53 #define MCPC_CTRL_HS_UART               (1 << 0)
  54
  55 #define MCPC_IO_CTRL                    0x33
  56 #define MCPC_IO_CTRL_MICBIASEN          (1 << 5)
  57 #define MCPC_IO_CTRL_CTS_NPU            (1 << 4)
  58 #define MCPC_IO_CTRL_RXD_PU             (1 << 3)
  59 #define MCPC_IO_CTRL_TXDTYP             (1 << 2)
  60 #define MCPC_IO_CTRL_CTSTYP             (1 << 1)
  61 #define MCPC_IO_CTRL_RTSTYP             (1 << 0)
  62
  63 #define MCPC_CTRL2                      0x36
  64 #define MCPC_CTRL2_MCPC_CK_EN           (1 << 0)
  65
  66 #define OTHER_FUNC_CTRL                 0x80
  67 #define OTHER_FUNC_CTRL_BDIS_ACON_EN    (1 << 4)
  68 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE   (1 << 2)
  69
  70 #define OTHER_IFC_CTRL                  0x83
  71 #define OTHER_IFC_CTRL_OE_INT_EN        (1 << 6)
  72 #define OTHER_IFC_CTRL_CEA2011_MODE     (1 << 5)
  73 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN      (1 << 4)
  74 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT       (1 << 3)
  75 #define OTHER_IFC_CTRL_HIZ_ULPI         (1 << 2)
  76 #define OTHER_IFC_CTRL_ALT_INT_REROUTE  (1 << 0)
  77
  78 #define OTHER_INT_EN_RISE               0x86
  79 #define OTHER_INT_EN_FALL               0x89
  80 #define OTHER_INT_STS                   0x8C
  81 #define OTHER_INT_LATCH                 0x8D
  82 #define OTHER_INT_VB_SESS_VLD           (1 << 7)
  83 #define OTHER_INT_DM_HI                 (1 << 6) /* not valid for "latch" reg */
  84 #define OTHER_INT_DP_HI                 (1 << 5) /* not valid for "latch" reg */
  85 #define OTHER_INT_BDIS_ACON             (1 << 3) /* not valid for "fall" regs */
  86 #define OTHER_INT_MANU                  (1 << 1)
  87 #define OTHER_INT_ABNORMAL_STRESS       (1 << 0)
  88
  89 #define ID_STATUS                       0x96
  90 #define ID_RES_FLOAT                    (1 << 4)
  91 #define ID_RES_440K                     (1 << 3)
  92 #define ID_RES_200K                     (1 << 2)
  93 #define ID_RES_102K                     (1 << 1)
  94 #define ID_RES_GND                      (1 << 0)
  95
  96 #define POWER_CTRL                      0xAC
  97 #define POWER_CTRL_OTG_ENAB             (1 << 5)
  98
  99 #define OTHER_IFC_CTRL2                 0xAF
 100 #define OTHER_IFC_CTRL2_ULPI_STP_LOW    (1 << 4)
 101 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL   (1 << 3)
 102 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430  (1 << 2)
 103 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK     (3 << 0) /* bits 0 and 1 */
 104 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N    (0 << 0)
 105 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N    (1 << 0)
 106
 107 #define REG_CTRL_EN                     0xB2
 108 #define REG_CTRL_ERROR                  0xB5
 109 #define ULPI_I2C_CONFLICT_INTEN         (1 << 0)
 110
 111 #define OTHER_FUNC_CTRL2                0xB8
 112 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN  (1 << 0)
 113
 114 /* following registers do not have separate _clr and _set registers */
 115 #define VBUS_DEBOUNCE                   0xC0
 116 #define ID_DEBOUNCE                     0xC1
 117 #define VBAT_TIMER                      0xD3
 118 #define PHY_PWR_CTRL                    0xFD
 119 #define PHY_PWR_PHYPWD                  (1 << 0)
 120 #define PHY_CLK_CTRL                    0xFE
 121 #define PHY_CLK_CTRL_CLOCKGATING_EN     (1 << 2)
 122 #define PHY_CLK_CTRL_CLK32K_EN          (1 << 1)
 123 #define REQ_PHY_DPLL_CLK                (1 << 0)
 124 #define PHY_CLK_CTRL_STS                0xFF
 125 #define PHY_DPLL_CLK                    (1 << 0)
 126
 127 /* In module TWL_MODULE_PM_MASTER */
 128 #define STS_HW_CONDITIONS               0x0F
 129
 130 /* In module TWL_MODULE_PM_RECEIVER */
 131 #define VUSB_DEDICATED1                 0x7D
 132 #define VUSB_DEDICATED2                 0x7E
 133 #define VUSB1V5_DEV_GRP                 0x71
 134 #define VUSB1V5_TYPE                    0x72
 135 #define VUSB1V5_REMAP                   0x73
 136 #define VUSB1V8_DEV_GRP                 0x74
 137 #define VUSB1V8_TYPE                    0x75
 138 #define VUSB1V8_REMAP                   0x76
 139 #define VUSB3V1_DEV_GRP                 0x77
 140 #define VUSB3V1_TYPE                    0x78
 141 #define VUSB3V1_REMAP                   0x79
 142
 143 /* In module TWL4030_MODULE_INTBR */
 144 #define PMBR1                           0x0D
 145 #define GPIO_USB_4PIN_ULPI_2430C        (3 << 0)
 146
 147 static irqreturn_t twl4030_usb_irq(int irq, void *_twl);
 148 /*
 149  * If VBUS is valid or ID is ground, then we know a
 150  * cable is present and we need to be runtime-enabled
 151  */
 152 static inline bool cable_present(enum musb_vbus_id_status stat)
 153 {
 154         return stat == MUSB_VBUS_VALID ||
 155                 stat == MUSB_ID_GROUND;
 156 }
 157
 158 struct twl4030_usb {
 159         struct usb_phy          phy;
 160         struct device           *dev;
 161
 162         /* TWL4030 internal USB regulator supplies */
 163         struct regulator        *usb1v5;
 164         struct regulator        *usb1v8;
 165         struct regulator        *usb3v1;
 166
 167         /* for vbus reporting with irqs disabled */
 168         struct mutex            lock;
 169
 170         /* pin configuration */
 171         enum twl4030_usb_mode   usb_mode;
 172
 173         int                     irq;
 174         enum musb_vbus_id_status linkstat;
 175         bool                    vbus_supplied;
 176         bool                    musb_mailbox_pending;
 177
 178         struct delayed_work     id_workaround_work;
 179 };
 180
 181 /* internal define on top of container_of */
 182 #define phy_to_twl(x)           container_of((x), struct twl4030_usb, phy)
 183
 184 /*-------------------------------------------------------------------------*/
 185
 186 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
 187                 u8 module, u8 data, u8 address)
 188 {
 189         u8 check = 0xFF;
 190
 191         if ((twl_i2c_write_u8(module, data, address) >= 0) &&
 192             (twl_i2c_read_u8(module, &check, address) >= 0) &&
 193                                                 (check == data))
 194                 return 0;
 195         dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
 196                         1, module, address, check, data);
 197
 198         /* Failed once: Try again */
 199         if ((twl_i2c_write_u8(module, data, address) >= 0) &&
 200             (twl_i2c_read_u8(module, &check, address) >= 0) &&
 201                                                 (check == data))
 202                 return 0;
 203         dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
 204                         2, module, address, check, data);
 205
 206         /* Failed again: Return error */
 207         return -EBUSY;
 208 }
 209
 210 #define twl4030_usb_write_verify(twl, address, data)    \
 211         twl4030_i2c_write_u8_verify(twl, TWL_MODULE_USB, (data), (address))
 212
 213 static inline int twl4030_usb_write(struct twl4030_usb *twl,
 214                 u8 address, u8 data)
 215 {
 216         int ret = 0;
 217
 218         ret = twl_i2c_write_u8(TWL_MODULE_USB, data, address);
 219         if (ret < 0)
 220                 dev_dbg(twl->dev,
 221                         "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
 222         return ret;
 223 }
 224
 225 static inline int twl4030_readb(struct twl4030_usb *twl, u8 module, u8 address)
 226 {
 227         u8 data;
 228         int ret = 0;
 229
 230         ret = twl_i2c_read_u8(module, &data, address);
 231         if (ret >= 0)
 232                 ret = data;
 233         else
 234                 dev_dbg(twl->dev,
 235                         "TWL4030:readb[0x%x,0x%x] Error %d\n",
 236                                         module, address, ret);
 237
 238         return ret;
 239 }
 240
 241 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
 242 {
 243         return twl4030_readb(twl, TWL_MODULE_USB, address);
 244 }
 245
 246 /*-------------------------------------------------------------------------*/
 247
 248 static inline int
 249 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 250 {
 251         return twl4030_usb_write(twl, ULPI_SET(reg), bits);
 252 }
 253
 254 static inline int
 255 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 256 {
 257         return twl4030_usb_write(twl, ULPI_CLR(reg), bits);
 258 }
 259
 260 /*-------------------------------------------------------------------------*/
 261
 262 static bool twl4030_is_driving_vbus(struct twl4030_usb *twl)
 263 {
 264         int ret;
 265
 266         ret = twl4030_usb_read(twl, PHY_CLK_CTRL_STS);
 267         if (ret < 0 || !(ret & PHY_DPLL_CLK))
 268                 /*
 269                  * if clocks are off, registers are not updated,
 270                  * but we can assume we don't drive VBUS in this case
 271                  */
 272                 return false;
 273
 274         ret = twl4030_usb_read(twl, ULPI_OTG_CTRL);
 275         if (ret < 0)
 276                 return false;
 277
 278         return (ret & (ULPI_OTG_DRVVBUS | ULPI_OTG_CHRGVBUS)) ? true : false;
 279 }
 280
 281 static enum musb_vbus_id_status
 282         twl4030_usb_linkstat(struct twl4030_usb *twl)
 283 {
 284         int     status;
 285         enum musb_vbus_id_status linkstat = MUSB_UNKNOWN;
 286
 287         twl->vbus_supplied = false;
 288
 289         /*
 290          * For ID/VBUS sensing, see manual section 15.4.8 ...
 291          * except when using only battery backup power, two
 292          * comparators produce VBUS_PRES and ID_PRES signals,
 293          * which don't match docs elsewhere.  But ... BIT(7)
 294          * and BIT(2) of STS_HW_CONDITIONS, respectively, do
 295          * seem to match up.  If either is true the USB_PRES
 296          * signal is active, the OTG module is activated, and
 297          * its interrupt may be raised (may wake the system).
 298          */
 299         status = twl4030_readb(twl, TWL_MODULE_PM_MASTER, STS_HW_CONDITIONS);
 300         if (status < 0)
 301                 dev_err(twl->dev, "USB link status err %d\n", status);
 302         else if (status & (BIT(7) | BIT(2))) {
 303                 if (status & BIT(7)) {
 304                         if (twl4030_is_driving_vbus(twl))
 305                                 status &= ~BIT(7);
 306                         else
 307                                 twl->vbus_supplied = true;
 308                 }
 309
 310                 if (status & BIT(2))
 311                         linkstat = MUSB_ID_GROUND;
 312                 else if (status & BIT(7))
 313                         linkstat = MUSB_VBUS_VALID;
 314                 else
 315                         linkstat = MUSB_VBUS_OFF;
 316         } else {
 317                 if (twl->linkstat != MUSB_UNKNOWN)
 318                         linkstat = MUSB_VBUS_OFF;
 319         }
 320
 321         kobject_uevent(&twl->dev->kobj, linkstat == MUSB_VBUS_VALID
 322                                         ? KOBJ_ONLINE : KOBJ_OFFLINE);
 323
 324         dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n",
 325                         status, status, linkstat);
 326
 327         /* REVISIT this assumes host and peripheral controllers
 328          * are registered, and that both are active...
 329          */
 330
 331         return linkstat;
 332 }
 333
 334 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
 335 {
 336         twl->usb_mode = mode;
 337
 338         switch (mode) {
 339         case T2_USB_MODE_ULPI:
 340                 twl4030_usb_clear_bits(twl, ULPI_IFC_CTRL,
 341                                         ULPI_IFC_CTRL_CARKITMODE);
 342                 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 343                 twl4030_usb_clear_bits(twl, ULPI_FUNC_CTRL,
 344                                         ULPI_FUNC_CTRL_XCVRSEL_MASK |
 345                                         ULPI_FUNC_CTRL_OPMODE_MASK);
 346                 break;
 347         case -1:
 348                 /* FIXME: power on defaults */
 349                 break;
 350         default:
 351                 dev_err(twl->dev, "unsupported T2 transceiver mode %d\n",
 352                                 mode);
 353                 break;
 354         }
 355 }
 356
 357 static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
 358 {
 359         unsigned long timeout;
 360         int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 361
 362         if (val >= 0) {
 363                 if (on) {
 364                         /* enable DPLL to access PHY registers over I2C */
 365                         val |= REQ_PHY_DPLL_CLK;
 366                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 367                                                 (u8)val) < 0);
 368
 369                         timeout = jiffies + HZ;
 370                         while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 371                                                         PHY_DPLL_CLK)
 372                                 && time_before(jiffies, timeout))
 373                                         udelay(10);
 374                         if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 375                                                         PHY_DPLL_CLK))
 376                                 dev_err(twl->dev, "Timeout setting T2 HSUSB "
 377                                                 "PHY DPLL clock\n");
 378                 } else {
 379                         /* let ULPI control the DPLL clock */
 380                         val &= ~REQ_PHY_DPLL_CLK;
 381                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 382                                                 (u8)val) < 0);
 383                 }
 384         }
 385 }
 386
 387 static void __twl4030_phy_power(struct twl4030_usb *twl, int on)
 388 {
 389         u8 pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
 390
 391         if (on)
 392                 pwr &= ~PHY_PWR_PHYPWD;
 393         else
 394                 pwr |= PHY_PWR_PHYPWD;
 395
 396         WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
 397 }
 398
 399 static int __maybe_unused twl4030_usb_suspend(struct device *dev)
 400 {
 401         struct twl4030_usb *twl = dev_get_drvdata(dev);
 402
 403         /*
 404          * we need enabled runtime on resume,
 405          * so turn irq off here, so we do not get it early
 406          * note: wakeup on usb plug works independently of this
 407          */
 408         dev_dbg(twl->dev, "%s\n", __func__);
 409         disable_irq(twl->irq);
 410
 411         return 0;
 412 }
 413
 414 static int __maybe_unused twl4030_usb_resume(struct device *dev)
 415 {
 416         struct twl4030_usb *twl = dev_get_drvdata(dev);
 417
 418         dev_dbg(twl->dev, "%s\n", __func__);
 419         enable_irq(twl->irq);
 420         /* check whether cable status changed */
 421         twl4030_usb_irq(0, twl);
 422
 423         return 0;
 424 }
 425
 426 static int __maybe_unused twl4030_usb_runtime_suspend(struct device *dev)
 427 {
 428         struct twl4030_usb *twl = dev_get_drvdata(dev);
 429
 430         dev_dbg(twl->dev, "%s\n", __func__);
 431
 432         __twl4030_phy_power(twl, 0);
 433         regulator_disable(twl->usb1v5);
 434         regulator_disable(twl->usb1v8);
 435         regulator_disable(twl->usb3v1);
 436
 437         return 0;
 438 }
 439
 440 static int __maybe_unused twl4030_usb_runtime_resume(struct device *dev)
 441 {
 442         struct twl4030_usb *twl = dev_get_drvdata(dev);
 443         int res;
 444
 445         dev_dbg(twl->dev, "%s\n", __func__);
 446
 447         res = regulator_enable(twl->usb3v1);
 448         if (res)
 449                 dev_err(twl->dev, "Failed to enable usb3v1\n");
 450
 451         res = regulator_enable(twl->usb1v8);
 452         if (res)
 453                 dev_err(twl->dev, "Failed to enable usb1v8\n");
 454
 455         /*
 456          * Disabling usb3v1 regulator (= writing 0 to VUSB3V1_DEV_GRP
 457          * in twl4030) resets the VUSB_DEDICATED2 register. This reset
 458          * enables VUSB3V1_SLEEP bit that remaps usb3v1 ACTIVE state to
 459          * SLEEP. We work around this by clearing the bit after usv3v1
 460          * is re-activated. This ensures that VUSB3V1 is really active.
 461          */
 462         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
 463
 464         res = regulator_enable(twl->usb1v5);
 465         if (res)
 466                 dev_err(twl->dev, "Failed to enable usb1v5\n");
 467
 468         __twl4030_phy_power(twl, 1);
 469         twl4030_usb_write(twl, PHY_CLK_CTRL,
 470                           twl4030_usb_read(twl, PHY_CLK_CTRL) |
 471                           (PHY_CLK_CTRL_CLOCKGATING_EN |
 472                            PHY_CLK_CTRL_CLK32K_EN));
 473
 474         twl4030_i2c_access(twl, 1);
 475         twl4030_usb_set_mode(twl, twl->usb_mode);
 476         if (twl->usb_mode == T2_USB_MODE_ULPI)
 477                 twl4030_i2c_access(twl, 0);
 478         /*
 479          * According to the TPS65950 TRM, there has to be at least 50ms
 480          * delay between setting POWER_CTRL_OTG_ENAB and enabling charging
 481          * so wait here so that a fully enabled phy can be expected after
 482          * resume
 483          */
 484         msleep(50);
 485         return 0;
 486 }
 487
 488 static int twl4030_phy_power_off(struct phy *phy)
 489 {
 490         struct twl4030_usb *twl = phy_get_drvdata(phy);
 491
 492         dev_dbg(twl->dev, "%s\n", __func__);
 493
 494         return 0;
 495 }
 496
 497 static int twl4030_phy_power_on(struct phy *phy)
 498 {
 499         struct twl4030_usb *twl = phy_get_drvdata(phy);
 500
 501         dev_dbg(twl->dev, "%s\n", __func__);
 502         pm_runtime_get_sync(twl->dev);
 503         schedule_delayed_work(&twl->id_workaround_work, HZ);
 504         pm_runtime_mark_last_busy(twl->dev);
 505         pm_runtime_put_autosuspend(twl->dev);
 506
 507         return 0;
 508 }
 509
 510 static int twl4030_usb_ldo_init(struct twl4030_usb *twl)
 511 {
 512         /* Enable writing to power configuration registers */
 513         twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
 514                          TWL4030_PM_MASTER_PROTECT_KEY);
 515
 516         twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
 517                          TWL4030_PM_MASTER_PROTECT_KEY);
 518
 519         /* Keep VUSB3V1 LDO in sleep state until VBUS/ID change detected*/
 520         /*twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);*/
 521
 522         /* input to VUSB3V1 LDO is from VBAT, not VBUS */
 523         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
 524
 525         /* Initialize 3.1V regulator */
 526         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB3V1_DEV_GRP);
 527
 528         twl->usb3v1 = devm_regulator_get(twl->dev, "usb3v1");
 529         if (IS_ERR(twl->usb3v1))
 530                 return -ENODEV;
 531
 532         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
 533
 534         /* Initialize 1.5V regulator */
 535         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V5_DEV_GRP);
 536
 537         twl->usb1v5 = devm_regulator_get(twl->dev, "usb1v5");
 538         if (IS_ERR(twl->usb1v5))
 539                 return -ENODEV;
 540
 541         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
 542
 543         /* Initialize 1.8V regulator */
 544         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V8_DEV_GRP);
 545
 546         twl->usb1v8 = devm_regulator_get(twl->dev, "usb1v8");
 547         if (IS_ERR(twl->usb1v8))
 548                 return -ENODEV;
 549
 550         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
 551
 552         /* disable access to power configuration registers */
 553         twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
 554                          TWL4030_PM_MASTER_PROTECT_KEY);
 555
 556         return 0;
 557 }
 558
 559 static ssize_t twl4030_usb_vbus_show(struct device *dev,
 560                 struct device_attribute *attr, char *buf)
 561 {
 562         struct twl4030_usb *twl = dev_get_drvdata(dev);
 563         int ret = -EINVAL;
 564
 565         mutex_lock(&twl->lock);
 566         ret = sprintf(buf, "%s\n",
 567                         twl->vbus_supplied ? "on" : "off");
 568         mutex_unlock(&twl->lock);
 569
 570         return ret;
 571 }
 572 static DEVICE_ATTR(vbus, 0444, twl4030_usb_vbus_show, NULL);
 573
 574 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
 575 {
 576         struct twl4030_usb *twl = _twl;
 577         enum musb_vbus_id_status status;
 578         bool status_changed = false;
 579         int err;
 580
 581         status = twl4030_usb_linkstat(twl);
 582
 583         mutex_lock(&twl->lock);
 584         if (status >= 0 && status != twl->linkstat) {
 585                 status_changed =
 586                         cable_present(twl->linkstat) !=
 587                         cable_present(status);
 588                 twl->linkstat = status;
 589         }
 590         mutex_unlock(&twl->lock);
 591
 592         if (status_changed) {
 593                 /* FIXME add a set_power() method so that B-devices can
 594                  * configure the charger appropriately.  It's not always
 595                  * correct to consume VBUS power, and how much current to
 596                  * consume is a function of the USB configuration chosen
 597                  * by the host.
 598                  *
 599                  * REVISIT usb_gadget_vbus_connect(...) as needed, ditto
 600                  * its disconnect() sibling, when changing to/from the
 601                  * USB_LINK_VBUS state.  musb_hdrc won't care until it
 602                  * starts to handle softconnect right.
 603                  */
 604                 if (cable_present(status)) {
 605                         pm_runtime_get_sync(twl->dev);
 606                 } else {
 607                         pm_runtime_mark_last_busy(twl->dev);
 608                         pm_runtime_put_autosuspend(twl->dev);
 609                 }
 610                 twl->musb_mailbox_pending = true;
 611         }
 612         if (twl->musb_mailbox_pending) {
 613                 err = musb_mailbox(status);
 614                 if (!err)
 615                         twl->musb_mailbox_pending = false;
 616         }
 617
 618         /* don't schedule during sleep - irq works right then */
 619         if (status == MUSB_ID_GROUND && pm_runtime_active(twl->dev)) {
 620                 cancel_delayed_work(&twl->id_workaround_work);
 621                 schedule_delayed_work(&twl->id_workaround_work, HZ);
 622         }
 623
 624         if (irq)
 625                 sysfs_notify(&twl->dev->kobj, NULL, "vbus");
 626
 627         return IRQ_HANDLED;
 628 }
 629
 630 static void twl4030_id_workaround_work(struct work_struct *work)
 631 {
 632         struct twl4030_usb *twl = container_of(work, struct twl4030_usb,
 633                 id_workaround_work.work);
 634
 635         twl4030_usb_irq(0, twl);
 636 }
 637
 638 static int twl4030_phy_init(struct phy *phy)
 639 {
 640         struct twl4030_usb *twl = phy_get_drvdata(phy);
 641
 642         pm_runtime_get_sync(twl->dev);
 643         twl->linkstat = MUSB_UNKNOWN;
 644         schedule_delayed_work(&twl->id_workaround_work, HZ);
 645         pm_runtime_mark_last_busy(twl->dev);
 646         pm_runtime_put_autosuspend(twl->dev);
 647
 648         return 0;
 649 }
 650
 651 static int twl4030_set_peripheral(struct usb_otg *otg,
 652                                         struct usb_gadget *gadget)
 653 {
 654         if (!otg)
 655                 return -ENODEV;
 656
 657         otg->gadget = gadget;
 658         if (!gadget)
 659                 otg->state = OTG_STATE_UNDEFINED;
 660
 661         return 0;
 662 }
 663
 664 static int twl4030_set_host(struct usb_otg *otg, struct usb_bus *host)
 665 {
 666         if (!otg)
 667                 return -ENODEV;
 668
 669         otg->host = host;
 670         if (!host)
 671                 otg->state = OTG_STATE_UNDEFINED;
 672
 673         return 0;
 674 }
 675
 676 static const struct phy_ops ops = {
 677         .init           = twl4030_phy_init,
 678         .power_on       = twl4030_phy_power_on,
 679         .power_off      = twl4030_phy_power_off,
 680         .owner          = THIS_MODULE,
 681 };
 682
 683 static const struct dev_pm_ops twl4030_usb_pm_ops = {
 684         SET_RUNTIME_PM_OPS(twl4030_usb_runtime_suspend,
 685                            twl4030_usb_runtime_resume, NULL)
 686         SET_SYSTEM_SLEEP_PM_OPS(twl4030_usb_suspend, twl4030_usb_resume)
 687 };
 688
 689 static int twl4030_usb_probe(struct platform_device *pdev)
 690 {
 691         struct twl4030_usb_data *pdata = dev_get_platdata(&pdev->dev);
 692         struct twl4030_usb      *twl;
 693         struct phy              *phy;
 694         int                     status, err;
 695         struct usb_otg          *otg;
 696         struct device_node      *np = pdev->dev.of_node;
 697         struct phy_provider     *phy_provider;
 698
 699         twl = devm_kzalloc(&pdev->dev, sizeof(*twl), GFP_KERNEL);
 700         if (!twl)
 701                 return -ENOMEM;
 702
 703         if (np)
 704                 of_property_read_u32(np, "usb_mode",
 705                                 (enum twl4030_usb_mode *)&twl->usb_mode);
 706         else if (pdata) {
 707                 twl->usb_mode = pdata->usb_mode;
 708         } else {
 709                 dev_err(&pdev->dev, "twl4030 initialized without pdata\n");
 710                 return -EINVAL;
 711         }
 712
 713         otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL);
 714         if (!otg)
 715                 return -ENOMEM;
 716
 717         twl->dev                = &pdev->dev;
 718         twl->irq                = platform_get_irq(pdev, 0);
 719         twl->vbus_supplied      = false;
 720         twl->linkstat           = MUSB_UNKNOWN;
 721         twl->musb_mailbox_pending = false;
 722
 723         twl->phy.dev            = twl->dev;
 724         twl->phy.label          = "twl4030";
 725         twl->phy.otg            = otg;
 726         twl->phy.type           = USB_PHY_TYPE_USB2;
 727
 728         otg->usb_phy            = &twl->phy;
 729         otg->set_host           = twl4030_set_host;
 730         otg->set_peripheral     = twl4030_set_peripheral;
 731
 732         phy = devm_phy_create(twl->dev, NULL, &ops);
 733         if (IS_ERR(phy)) {
 734                 dev_dbg(&pdev->dev, "Failed to create PHY\n");
 735                 return PTR_ERR(phy);
 736         }
 737
 738         phy_set_drvdata(phy, twl);
 739
 740         phy_provider = devm_of_phy_provider_register(twl->dev,
 741                 of_phy_simple_xlate);
 742         if (IS_ERR(phy_provider))
 743                 return PTR_ERR(phy_provider);
 744
 745         /* init mutex for workqueue */
 746         mutex_init(&twl->lock);
 747
 748         INIT_DELAYED_WORK(&twl->id_workaround_work, twl4030_id_workaround_work);
 749
 750         err = twl4030_usb_ldo_init(twl);
 751         if (err) {
 752                 dev_err(&pdev->dev, "ldo init failed\n");
 753                 return err;
 754         }
 755         usb_add_phy_dev(&twl->phy);
 756
 757         platform_set_drvdata(pdev, twl);
 758         if (device_create_file(&pdev->dev, &dev_attr_vbus))
 759                 dev_warn(&pdev->dev, "could not create sysfs file\n");
 760
 761         ATOMIC_INIT_NOTIFIER_HEAD(&twl->phy.notifier);
 762
 763         pm_runtime_use_autosuspend(&pdev->dev);
 764         pm_runtime_set_autosuspend_delay(&pdev->dev, 2000);
 765         pm_runtime_enable(&pdev->dev);
 766         pm_runtime_get_sync(&pdev->dev);
 767
 768         /* Our job is to use irqs and status from the power module
 769          * to keep the transceiver disabled when nothing's connected.
 770          *
 771          * FIXME we actually shouldn't start enabling it until the
 772          * USB controller drivers have said they're ready, by calling
 773          * set_host() and/or set_peripheral() ... OTG_capable boards
 774          * need both handles, otherwise just one suffices.
 775          */
 776         status = devm_request_threaded_irq(twl->dev, twl->irq, NULL,
 777                         twl4030_usb_irq, IRQF_TRIGGER_FALLING |
 778                         IRQF_TRIGGER_RISING | IRQF_ONESHOT, "twl4030_usb", twl);
 779         if (status < 0) {
 780                 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
 781                         twl->irq, status);
 782                 return status;
 783         }
 784
 785         if (pdata)
 786                 err = phy_create_lookup(phy, "usb", "musb-hdrc.0");
 787         if (err)
 788                 return err;
 789
 790         pm_runtime_mark_last_busy(&pdev->dev);
 791         pm_runtime_put_autosuspend(twl->dev);
 792
 793         dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
 794         return 0;
 795 }
 796
 797 static int twl4030_usb_remove(struct platform_device *pdev)
 798 {
 799         struct twl4030_usb *twl = platform_get_drvdata(pdev);
 800         int val;
 801
 802         usb_remove_phy(&twl->phy);
 803         pm_runtime_get_sync(twl->dev);
 804         cancel_delayed_work_sync(&twl->id_workaround_work);
 805         device_remove_file(twl->dev, &dev_attr_vbus);
 806
 807         /* set transceiver mode to power on defaults */
 808         twl4030_usb_set_mode(twl, -1);
 809
 810         /* idle ulpi before powering off */
 811         if (cable_present(twl->linkstat))
 812                 pm_runtime_put_noidle(twl->dev);
 813         pm_runtime_mark_last_busy(twl->dev);
 814         pm_runtime_dont_use_autosuspend(&pdev->dev);
 815         pm_runtime_put_sync(twl->dev);
 816         pm_runtime_disable(twl->dev);
 817
 818         /* autogate 60MHz ULPI clock,
 819          * clear dpll clock request for i2c access,
 820          * disable 32KHz
 821          */
 822         val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 823         if (val >= 0) {
 824                 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
 825                 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
 826                 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
 827         }
 828
 829         /* disable complete OTG block */
 830         twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 831
 832         return 0;
 833 }
 834
 835 #ifdef CONFIG_OF
 836 static const struct of_device_id twl4030_usb_id_table[] = {
 837         { .compatible = "ti,twl4030-usb" },
 838         {}
 839 };
 840 MODULE_DEVICE_TABLE(of, twl4030_usb_id_table);
 841 #endif
 842
 843 static struct platform_driver twl4030_usb_driver = {
 844         .probe          = twl4030_usb_probe,
 845         .remove         = twl4030_usb_remove,
 846         .driver         = {
 847                 .name   = "twl4030_usb",
 848                 .pm     = &twl4030_usb_pm_ops,
 849                 .of_match_table = of_match_ptr(twl4030_usb_id_table),
 850         },
 851 };
 852
 853 static int __init twl4030_usb_init(void)
 854 {
 855         return platform_driver_register(&twl4030_usb_driver);
 856 }
 857 subsys_initcall(twl4030_usb_init);
 858
 859 static void __exit twl4030_usb_exit(void)
 860 {
 861         platform_driver_unregister(&twl4030_usb_driver);
 862 }
 863 module_exit(twl4030_usb_exit);
 864
 865 MODULE_ALIAS("platform:twl4030_usb");
 866 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
 867 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
 868 MODULE_LICENSE("GPL");