drivers/pinctrl/qcom/pinctrl-spmi-mpp.c

   1 /*
   2  * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 and
   6  * only version 2 as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #include <linux/gpio.h>
  15 #include <linux/module.h>
  16 #include <linux/of.h>
  17 #include <linux/pinctrl/pinconf-generic.h>
  18 #include <linux/pinctrl/pinconf.h>
  19 #include <linux/pinctrl/pinmux.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/regmap.h>
  22 #include <linux/slab.h>
  23 #include <linux/types.h>
  24
  25 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
  26
  27 #include "../core.h"
  28 #include "../pinctrl-utils.h"
  29
  30 #define PMIC_MPP_ADDRESS_RANGE                  0x100
  31
  32 /*
  33  * Pull Up Values - it indicates whether a pull-up should be
  34  * applied for bidirectional mode only. The hardware ignores the
  35  * configuration when operating in other modes.
  36  */
  37 #define PMIC_MPP_PULL_UP_0P6KOHM                0
  38 #define PMIC_MPP_PULL_UP_10KOHM                 1
  39 #define PMIC_MPP_PULL_UP_30KOHM                 2
  40 #define PMIC_MPP_PULL_UP_OPEN                   3
  41
  42 /* type registers base address bases */
  43 #define PMIC_MPP_REG_TYPE                       0x4
  44 #define PMIC_MPP_REG_SUBTYPE                    0x5
  45
  46 /* mpp peripheral type and subtype values */
  47 #define PMIC_MPP_TYPE                           0x11
  48 #define PMIC_MPP_SUBTYPE_4CH_NO_ANA_OUT         0x3
  49 #define PMIC_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT     0x4
  50 #define PMIC_MPP_SUBTYPE_4CH_NO_SINK            0x5
  51 #define PMIC_MPP_SUBTYPE_ULT_4CH_NO_SINK        0x6
  52 #define PMIC_MPP_SUBTYPE_4CH_FULL_FUNC          0x7
  53 #define PMIC_MPP_SUBTYPE_8CH_FULL_FUNC          0xf
  54
  55 #define PMIC_MPP_REG_RT_STS                     0x10
  56 #define PMIC_MPP_REG_RT_STS_VAL_MASK            0x1
  57
  58 /* control register base address bases */
  59 #define PMIC_MPP_REG_MODE_CTL                   0x40
  60 #define PMIC_MPP_REG_DIG_VIN_CTL                0x41
  61 #define PMIC_MPP_REG_DIG_PULL_CTL               0x42
  62 #define PMIC_MPP_REG_DIG_IN_CTL                 0x43
  63 #define PMIC_MPP_REG_EN_CTL                     0x46
  64 #define PMIC_MPP_REG_AOUT_CTL                   0x48
  65 #define PMIC_MPP_REG_AIN_CTL                    0x4a
  66 #define PMIC_MPP_REG_SINK_CTL                   0x4c
  67
  68 /* PMIC_MPP_REG_MODE_CTL */
  69 #define PMIC_MPP_REG_MODE_VALUE_MASK            0x1
  70 #define PMIC_MPP_REG_MODE_FUNCTION_SHIFT        1
  71 #define PMIC_MPP_REG_MODE_FUNCTION_MASK         0x7
  72 #define PMIC_MPP_REG_MODE_DIR_SHIFT             4
  73 #define PMIC_MPP_REG_MODE_DIR_MASK              0x7
  74
  75 /* PMIC_MPP_REG_DIG_VIN_CTL */
  76 #define PMIC_MPP_REG_VIN_SHIFT                  0
  77 #define PMIC_MPP_REG_VIN_MASK                   0x7
  78
  79 /* PMIC_MPP_REG_DIG_PULL_CTL */
  80 #define PMIC_MPP_REG_PULL_SHIFT                 0
  81 #define PMIC_MPP_REG_PULL_MASK                  0x7
  82
  83 /* PMIC_MPP_REG_EN_CTL */
  84 #define PMIC_MPP_REG_MASTER_EN_SHIFT            7
  85
  86 /* PMIC_MPP_REG_AIN_CTL */
  87 #define PMIC_MPP_REG_AIN_ROUTE_SHIFT            0
  88 #define PMIC_MPP_REG_AIN_ROUTE_MASK             0x7
  89
  90 #define PMIC_MPP_MODE_DIGITAL_INPUT             0
  91 #define PMIC_MPP_MODE_DIGITAL_OUTPUT            1
  92 #define PMIC_MPP_MODE_DIGITAL_BIDIR             2
  93 #define PMIC_MPP_MODE_ANALOG_BIDIR              3
  94 #define PMIC_MPP_MODE_ANALOG_INPUT              4
  95 #define PMIC_MPP_MODE_ANALOG_OUTPUT             5
  96 #define PMIC_MPP_MODE_CURRENT_SINK              6
  97
  98 #define PMIC_MPP_SELECTOR_NORMAL                0
  99 #define PMIC_MPP_SELECTOR_PAIRED                1
 100 #define PMIC_MPP_SELECTOR_DTEST_FIRST           4
 101
 102 #define PMIC_MPP_PHYSICAL_OFFSET                1
 103
 104 /* Qualcomm specific pin configurations */
 105 #define PMIC_MPP_CONF_AMUX_ROUTE                (PIN_CONFIG_END + 1)
 106 #define PMIC_MPP_CONF_ANALOG_LEVEL              (PIN_CONFIG_END + 2)
 107 #define PMIC_MPP_CONF_DTEST_SELECTOR            (PIN_CONFIG_END + 3)
 108 #define PMIC_MPP_CONF_PAIRED                    (PIN_CONFIG_END + 4)
 109
 110 /**
 111  * struct pmic_mpp_pad - keep current MPP settings
 112  * @base: Address base in SPMI device.
 113  * @irq: IRQ number which this MPP generate.
 114  * @is_enabled: Set to false when MPP should be put in high Z state.
 115  * @out_value: Cached pin output value.
 116  * @output_enabled: Set to true if MPP output logic is enabled.
 117  * @input_enabled: Set to true if MPP input buffer logic is enabled.
 118  * @paired: Pin operates in paired mode
 119  * @num_sources: Number of power-sources supported by this MPP.
 120  * @power_source: Current power-source used.
 121  * @amux_input: Set the source for analog input.
 122  * @aout_level: Analog output level
 123  * @pullup: Pullup resistor value. Valid in Bidirectional mode only.
 124  * @function: See pmic_mpp_functions[].
 125  * @drive_strength: Amount of current in sink mode
 126  * @dtest: DTEST route selector
 127  */
 128 struct pmic_mpp_pad {
 129         u16             base;
 130         int             irq;
 131         bool            is_enabled;
 132         bool            out_value;
 133         bool            output_enabled;
 134         bool            input_enabled;
 135         bool            paired;
 136         unsigned int    num_sources;
 137         unsigned int    power_source;
 138         unsigned int    amux_input;
 139         unsigned int    aout_level;
 140         unsigned int    pullup;
 141         unsigned int    function;
 142         unsigned int    drive_strength;
 143         unsigned int    dtest;
 144 };
 145
 146 struct pmic_mpp_state {
 147         struct device   *dev;
 148         struct regmap   *map;
 149         struct pinctrl_dev *ctrl;
 150         struct gpio_chip chip;
 151 };
 152
 153 static const struct pinconf_generic_params pmic_mpp_bindings[] = {
 154         {"qcom,amux-route",     PMIC_MPP_CONF_AMUX_ROUTE,       0},
 155         {"qcom,analog-level",   PMIC_MPP_CONF_ANALOG_LEVEL,     0},
 156         {"qcom,dtest",          PMIC_MPP_CONF_DTEST_SELECTOR,   0},
 157         {"qcom,paired",         PMIC_MPP_CONF_PAIRED,           0},
 158 };
 159
 160 #ifdef CONFIG_DEBUG_FS
 161 static const struct pin_config_item pmic_conf_items[] = {
 162         PCONFDUMP(PMIC_MPP_CONF_AMUX_ROUTE, "analog mux", NULL, true),
 163         PCONFDUMP(PMIC_MPP_CONF_ANALOG_LEVEL, "analog level", NULL, true),
 164         PCONFDUMP(PMIC_MPP_CONF_DTEST_SELECTOR, "dtest", NULL, true),
 165         PCONFDUMP(PMIC_MPP_CONF_PAIRED, "paired", NULL, false),
 166 };
 167 #endif
 168
 169 static const char *const pmic_mpp_groups[] = {
 170         "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", "mpp8",
 171 };
 172
 173 #define PMIC_MPP_DIGITAL        0
 174 #define PMIC_MPP_ANALOG         1
 175 #define PMIC_MPP_SINK           2
 176
 177 static const char *const pmic_mpp_functions[] = {
 178         "digital", "analog", "sink"
 179 };
 180
 181 static inline struct pmic_mpp_state *to_mpp_state(struct gpio_chip *chip)
 182 {
 183         return container_of(chip, struct pmic_mpp_state, chip);
 184 };
 185
 186 static int pmic_mpp_read(struct pmic_mpp_state *state,
 187                          struct pmic_mpp_pad *pad, unsigned int addr)
 188 {
 189         unsigned int val;
 190         int ret;
 191
 192         ret = regmap_read(state->map, pad->base + addr, &val);
 193         if (ret < 0)
 194                 dev_err(state->dev, "read 0x%x failed\n", addr);
 195         else
 196                 ret = val;
 197
 198         return ret;
 199 }
 200
 201 static int pmic_mpp_write(struct pmic_mpp_state *state,
 202                           struct pmic_mpp_pad *pad, unsigned int addr,
 203                           unsigned int val)
 204 {
 205         int ret;
 206
 207         ret = regmap_write(state->map, pad->base + addr, val);
 208         if (ret < 0)
 209                 dev_err(state->dev, "write 0x%x failed\n", addr);
 210
 211         return ret;
 212 }
 213
 214 static int pmic_mpp_get_groups_count(struct pinctrl_dev *pctldev)
 215 {
 216         /* Every PIN is a group */
 217         return pctldev->desc->npins;
 218 }
 219
 220 static const char *pmic_mpp_get_group_name(struct pinctrl_dev *pctldev,
 221                                            unsigned pin)
 222 {
 223         return pctldev->desc->pins[pin].name;
 224 }
 225
 226 static int pmic_mpp_get_group_pins(struct pinctrl_dev *pctldev,
 227                                    unsigned pin,
 228                                    const unsigned **pins, unsigned *num_pins)
 229 {
 230         *pins = &pctldev->desc->pins[pin].number;
 231         *num_pins = 1;
 232         return 0;
 233 }
 234
 235 static const struct pinctrl_ops pmic_mpp_pinctrl_ops = {
 236         .get_groups_count       = pmic_mpp_get_groups_count,
 237         .get_group_name         = pmic_mpp_get_group_name,
 238         .get_group_pins         = pmic_mpp_get_group_pins,
 239         .dt_node_to_map         = pinconf_generic_dt_node_to_map_group,
 240         .dt_free_map            = pinctrl_utils_dt_free_map,
 241 };
 242
 243 static int pmic_mpp_get_functions_count(struct pinctrl_dev *pctldev)
 244 {
 245         return ARRAY_SIZE(pmic_mpp_functions);
 246 }
 247
 248 static const char *pmic_mpp_get_function_name(struct pinctrl_dev *pctldev,
 249                                               unsigned function)
 250 {
 251         return pmic_mpp_functions[function];
 252 }
 253
 254 static int pmic_mpp_get_function_groups(struct pinctrl_dev *pctldev,
 255                                         unsigned function,
 256                                         const char *const **groups,
 257                                         unsigned *const num_qgroups)
 258 {
 259         *groups = pmic_mpp_groups;
 260         *num_qgroups = pctldev->desc->npins;
 261         return 0;
 262 }
 263
 264 static int pmic_mpp_write_mode_ctl(struct pmic_mpp_state *state,
 265                                    struct pmic_mpp_pad *pad)
 266 {
 267         unsigned int mode;
 268         unsigned int sel;
 269         unsigned int val;
 270         unsigned int en;
 271
 272         switch (pad->function) {
 273         case PMIC_MPP_ANALOG:
 274                 if (pad->input_enabled && pad->output_enabled)
 275                         mode = PMIC_MPP_MODE_ANALOG_BIDIR;
 276                 else if (pad->input_enabled)
 277                         mode = PMIC_MPP_MODE_ANALOG_INPUT;
 278                 else
 279                         mode = PMIC_MPP_MODE_ANALOG_OUTPUT;
 280                 break;
 281         case PMIC_MPP_DIGITAL:
 282                 if (pad->input_enabled && pad->output_enabled)
 283                         mode = PMIC_MPP_MODE_DIGITAL_BIDIR;
 284                 else if (pad->input_enabled)
 285                         mode = PMIC_MPP_MODE_DIGITAL_INPUT;
 286                 else
 287                         mode = PMIC_MPP_MODE_DIGITAL_OUTPUT;
 288                 break;
 289         case PMIC_MPP_SINK:
 290         default:
 291                 mode = PMIC_MPP_MODE_CURRENT_SINK;
 292                 break;
 293         }
 294
 295         if (pad->dtest)
 296                 sel = PMIC_MPP_SELECTOR_DTEST_FIRST + pad->dtest - 1;
 297         else if (pad->paired)
 298                 sel = PMIC_MPP_SELECTOR_PAIRED;
 299         else
 300                 sel = PMIC_MPP_SELECTOR_NORMAL;
 301
 302         en = !!pad->out_value;
 303
 304         val = mode << PMIC_MPP_REG_MODE_DIR_SHIFT |
 305               sel << PMIC_MPP_REG_MODE_FUNCTION_SHIFT |
 306               en;
 307
 308         return pmic_mpp_write(state, pad, PMIC_MPP_REG_MODE_CTL, val);
 309 }
 310
 311 static int pmic_mpp_set_mux(struct pinctrl_dev *pctldev, unsigned function,
 312                                 unsigned pin)
 313 {
 314         struct pmic_mpp_state *state = pinctrl_dev_get_drvdata(pctldev);
 315         struct pmic_mpp_pad *pad;
 316         unsigned int val;
 317         int ret;
 318
 319         pad = pctldev->desc->pins[pin].drv_data;
 320
 321         pad->function = function;
 322
 323         ret = pmic_mpp_write_mode_ctl(state, pad);
 324         if (ret < 0)
 325                 return ret;
 326
 327         val = pad->is_enabled << PMIC_MPP_REG_MASTER_EN_SHIFT;
 328
 329         return pmic_mpp_write(state, pad, PMIC_MPP_REG_EN_CTL, val);
 330 }
 331
 332 static const struct pinmux_ops pmic_mpp_pinmux_ops = {
 333         .get_functions_count    = pmic_mpp_get_functions_count,
 334         .get_function_name      = pmic_mpp_get_function_name,
 335         .get_function_groups    = pmic_mpp_get_function_groups,
 336         .set_mux                = pmic_mpp_set_mux,
 337 };
 338
 339 static int pmic_mpp_config_get(struct pinctrl_dev *pctldev,
 340                                unsigned int pin, unsigned long *config)
 341 {
 342         unsigned param = pinconf_to_config_param(*config);
 343         struct pmic_mpp_pad *pad;
 344         unsigned arg = 0;
 345
 346         pad = pctldev->desc->pins[pin].drv_data;
 347
 348         switch (param) {
 349         case PIN_CONFIG_BIAS_DISABLE:
 350                 if (pad->pullup != PMIC_MPP_PULL_UP_OPEN)
 351                         return -EINVAL;
 352                 arg = 1;
 353                 break;
 354         case PIN_CONFIG_BIAS_PULL_UP:
 355                 switch (pad->pullup) {
 356                 case PMIC_MPP_PULL_UP_0P6KOHM:
 357                         arg = 600;
 358                         break;
 359                 case PMIC_MPP_PULL_UP_10KOHM:
 360                         arg = 10000;
 361                         break;
 362                 case PMIC_MPP_PULL_UP_30KOHM:
 363                         arg = 30000;
 364                         break;
 365                 default:
 366                         return -EINVAL;
 367                 }
 368                 break;
 369         case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
 370                 if (pad->is_enabled)
 371                         return -EINVAL;
 372                 arg = 1;
 373                 break;
 374         case PIN_CONFIG_POWER_SOURCE:
 375                 arg = pad->power_source;
 376                 break;
 377         case PIN_CONFIG_INPUT_ENABLE:
 378                 if (!pad->input_enabled)
 379                         return -EINVAL;
 380                 arg = 1;
 381                 break;
 382         case PIN_CONFIG_OUTPUT:
 383                 arg = pad->out_value;
 384                 break;
 385         case PMIC_MPP_CONF_DTEST_SELECTOR:
 386                 arg = pad->dtest;
 387                 break;
 388         case PMIC_MPP_CONF_AMUX_ROUTE:
 389                 arg = pad->amux_input;
 390                 break;
 391         case PMIC_MPP_CONF_PAIRED:
 392                 if (!pad->paired)
 393                         return -EINVAL;
 394                 arg = 1;
 395                 break;
 396         case PIN_CONFIG_DRIVE_STRENGTH:
 397                 arg = pad->drive_strength;
 398                 break;
 399         case PMIC_MPP_CONF_ANALOG_LEVEL:
 400                 arg = pad->aout_level;
 401                 break;
 402         default:
 403                 return -EINVAL;
 404         }
 405
 406         /* Convert register value to pinconf value */
 407         *config = pinconf_to_config_packed(param, arg);
 408         return 0;
 409 }
 410
 411 static int pmic_mpp_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
 412                                unsigned long *configs, unsigned nconfs)
 413 {
 414         struct pmic_mpp_state *state = pinctrl_dev_get_drvdata(pctldev);
 415         struct pmic_mpp_pad *pad;
 416         unsigned param, arg;
 417         unsigned int val;
 418         int i, ret;
 419
 420         pad = pctldev->desc->pins[pin].drv_data;
 421
 422         /* Make it possible to enable the pin, by not setting high impedance */
 423         pad->is_enabled = true;
 424
 425         for (i = 0; i < nconfs; i++) {
 426                 param = pinconf_to_config_param(configs[i]);
 427                 arg = pinconf_to_config_argument(configs[i]);
 428
 429                 switch (param) {
 430                 case PIN_CONFIG_BIAS_DISABLE:
 431                         pad->pullup = PMIC_MPP_PULL_UP_OPEN;
 432                         break;
 433                 case PIN_CONFIG_BIAS_PULL_UP:
 434                         switch (arg) {
 435                         case 600:
 436                                 pad->pullup = PMIC_MPP_PULL_UP_0P6KOHM;
 437                                 break;
 438                         case 10000:
 439                                 pad->pullup = PMIC_MPP_PULL_UP_10KOHM;
 440                                 break;
 441                         case 30000:
 442                                 pad->pullup = PMIC_MPP_PULL_UP_30KOHM;
 443                                 break;
 444                         default:
 445                                 return -EINVAL;
 446                         }
 447                         break;
 448                 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
 449                         pad->is_enabled = false;
 450                         break;
 451                 case PIN_CONFIG_POWER_SOURCE:
 452                         if (arg >= pad->num_sources)
 453                                 return -EINVAL;
 454                         pad->power_source = arg;
 455                         break;
 456                 case PIN_CONFIG_INPUT_ENABLE:
 457                         pad->input_enabled = arg ? true : false;
 458                         break;
 459                 case PIN_CONFIG_OUTPUT:
 460                         pad->output_enabled = true;
 461                         pad->out_value = arg;
 462                         break;
 463                 case PMIC_MPP_CONF_DTEST_SELECTOR:
 464                         pad->dtest = arg;
 465                         break;
 466                 case PIN_CONFIG_DRIVE_STRENGTH:
 467                         pad->drive_strength = arg;
 468                         break;
 469                 case PMIC_MPP_CONF_AMUX_ROUTE:
 470                         if (arg >= PMIC_MPP_AMUX_ROUTE_ABUS4)
 471                                 return -EINVAL;
 472                         pad->amux_input = arg;
 473                         break;
 474                 case PMIC_MPP_CONF_ANALOG_LEVEL:
 475                         pad->aout_level = arg;
 476                         break;
 477                 case PMIC_MPP_CONF_PAIRED:
 478                         pad->paired = !!arg;
 479                         break;
 480                 default:
 481                         return -EINVAL;
 482                 }
 483         }
 484
 485         val = pad->power_source << PMIC_MPP_REG_VIN_SHIFT;
 486
 487         ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_DIG_VIN_CTL, val);
 488         if (ret < 0)
 489                 return ret;
 490
 491         val = pad->pullup << PMIC_MPP_REG_PULL_SHIFT;
 492
 493         ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_DIG_PULL_CTL, val);
 494         if (ret < 0)
 495                 return ret;
 496
 497         val = pad->amux_input & PMIC_MPP_REG_AIN_ROUTE_MASK;
 498
 499         ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_AIN_CTL, val);
 500         if (ret < 0)
 501                 return ret;
 502
 503         ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_AOUT_CTL, pad->aout_level);
 504         if (ret < 0)
 505                 return ret;
 506
 507         ret = pmic_mpp_write_mode_ctl(state, pad);
 508         if (ret < 0)
 509                 return ret;
 510
 511         ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_SINK_CTL, pad->drive_strength);
 512         if (ret < 0)
 513                 return ret;
 514
 515         val = pad->is_enabled << PMIC_MPP_REG_MASTER_EN_SHIFT;
 516
 517         return pmic_mpp_write(state, pad, PMIC_MPP_REG_EN_CTL, val);
 518 }
 519
 520 static void pmic_mpp_config_dbg_show(struct pinctrl_dev *pctldev,
 521                                      struct seq_file *s, unsigned pin)
 522 {
 523         struct pmic_mpp_state *state = pinctrl_dev_get_drvdata(pctldev);
 524         struct pmic_mpp_pad *pad;
 525         int ret;
 526
 527         static const char *const biases[] = {
 528                 "0.6kOhm", "10kOhm", "30kOhm", "Disabled"
 529         };
 530
 531         pad = pctldev->desc->pins[pin].drv_data;
 532
 533         seq_printf(s, " mpp%-2d:", pin + PMIC_MPP_PHYSICAL_OFFSET);
 534
 535         if (!pad->is_enabled) {
 536                 seq_puts(s, " ---");
 537         } else {
 538
 539                 if (pad->input_enabled) {
 540                         ret = pmic_mpp_read(state, pad, PMIC_MPP_REG_RT_STS);
 541                         if (ret < 0)
 542                                 return;
 543
 544                         ret &= PMIC_MPP_REG_RT_STS_VAL_MASK;
 545                         pad->out_value = ret;
 546                 }
 547
 548                 seq_printf(s, " %-4s", pad->output_enabled ? "out" : "in");
 549                 seq_printf(s, " %-7s", pmic_mpp_functions[pad->function]);
 550                 seq_printf(s, " vin-%d", pad->power_source);
 551                 seq_printf(s, " %d", pad->aout_level);
 552                 seq_printf(s, " %-8s", biases[pad->pullup]);
 553                 seq_printf(s, " %-4s", pad->out_value ? "high" : "low");
 554                 if (pad->dtest)
 555                         seq_printf(s, " dtest%d", pad->dtest);
 556                 if (pad->paired)
 557                         seq_puts(s, " paired");
 558         }
 559 }
 560
 561 static const struct pinconf_ops pmic_mpp_pinconf_ops = {
 562         .is_generic = true,
 563         .pin_config_group_get           = pmic_mpp_config_get,
 564         .pin_config_group_set           = pmic_mpp_config_set,
 565         .pin_config_group_dbg_show      = pmic_mpp_config_dbg_show,
 566 };
 567
 568 static int pmic_mpp_direction_input(struct gpio_chip *chip, unsigned pin)
 569 {
 570         struct pmic_mpp_state *state = to_mpp_state(chip);
 571         unsigned long config;
 572
 573         config = pinconf_to_config_packed(PIN_CONFIG_INPUT_ENABLE, 1);
 574
 575         return pmic_mpp_config_set(state->ctrl, pin, &config, 1);
 576 }
 577
 578 static int pmic_mpp_direction_output(struct gpio_chip *chip,
 579                                      unsigned pin, int val)
 580 {
 581         struct pmic_mpp_state *state = to_mpp_state(chip);
 582         unsigned long config;
 583
 584         config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, val);
 585
 586         return pmic_mpp_config_set(state->ctrl, pin, &config, 1);
 587 }
 588
 589 static int pmic_mpp_get(struct gpio_chip *chip, unsigned pin)
 590 {
 591         struct pmic_mpp_state *state = to_mpp_state(chip);
 592         struct pmic_mpp_pad *pad;
 593         int ret;
 594
 595         pad = state->ctrl->desc->pins[pin].drv_data;
 596
 597         if (pad->input_enabled) {
 598                 ret = pmic_mpp_read(state, pad, PMIC_MPP_REG_RT_STS);
 599                 if (ret < 0)
 600                         return ret;
 601
 602                 pad->out_value = ret & PMIC_MPP_REG_RT_STS_VAL_MASK;
 603         }
 604
 605         return pad->out_value;
 606 }
 607
 608 static void pmic_mpp_set(struct gpio_chip *chip, unsigned pin, int value)
 609 {
 610         struct pmic_mpp_state *state = to_mpp_state(chip);
 611         unsigned long config;
 612
 613         config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, value);
 614
 615         pmic_mpp_config_set(state->ctrl, pin, &config, 1);
 616 }
 617
 618 static int pmic_mpp_of_xlate(struct gpio_chip *chip,
 619                              const struct of_phandle_args *gpio_desc,
 620                              u32 *flags)
 621 {
 622         if (chip->of_gpio_n_cells < 2)
 623                 return -EINVAL;
 624
 625         if (flags)
 626                 *flags = gpio_desc->args[1];
 627
 628         return gpio_desc->args[0] - PMIC_MPP_PHYSICAL_OFFSET;
 629 }
 630
 631 static int pmic_mpp_to_irq(struct gpio_chip *chip, unsigned pin)
 632 {
 633         struct pmic_mpp_state *state = to_mpp_state(chip);
 634         struct pmic_mpp_pad *pad;
 635
 636         pad = state->ctrl->desc->pins[pin].drv_data;
 637
 638         return pad->irq;
 639 }
 640
 641 static void pmic_mpp_dbg_show(struct seq_file *s, struct gpio_chip *chip)
 642 {
 643         struct pmic_mpp_state *state = to_mpp_state(chip);
 644         unsigned i;
 645
 646         for (i = 0; i < chip->ngpio; i++) {
 647                 pmic_mpp_config_dbg_show(state->ctrl, s, i);
 648                 seq_puts(s, "\n");
 649         }
 650 }
 651
 652 static const struct gpio_chip pmic_mpp_gpio_template = {
 653         .direction_input        = pmic_mpp_direction_input,
 654         .direction_output       = pmic_mpp_direction_output,
 655         .get                    = pmic_mpp_get,
 656         .set                    = pmic_mpp_set,
 657         .request                = gpiochip_generic_request,
 658         .free                   = gpiochip_generic_free,
 659         .of_xlate               = pmic_mpp_of_xlate,
 660         .to_irq                 = pmic_mpp_to_irq,
 661         .dbg_show               = pmic_mpp_dbg_show,
 662 };
 663
 664 static int pmic_mpp_populate(struct pmic_mpp_state *state,
 665                              struct pmic_mpp_pad *pad)
 666 {
 667         int type, subtype, val, dir;
 668         unsigned int sel;
 669
 670         type = pmic_mpp_read(state, pad, PMIC_MPP_REG_TYPE);
 671         if (type < 0)
 672                 return type;
 673
 674         if (type != PMIC_MPP_TYPE) {
 675                 dev_err(state->dev, "incorrect block type 0x%x at 0x%x\n",
 676                         type, pad->base);
 677                 return -ENODEV;
 678         }
 679
 680         subtype = pmic_mpp_read(state, pad, PMIC_MPP_REG_SUBTYPE);
 681         if (subtype < 0)
 682                 return subtype;
 683
 684         switch (subtype) {
 685         case PMIC_MPP_SUBTYPE_4CH_NO_ANA_OUT:
 686         case PMIC_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT:
 687         case PMIC_MPP_SUBTYPE_4CH_NO_SINK:
 688         case PMIC_MPP_SUBTYPE_ULT_4CH_NO_SINK:
 689         case PMIC_MPP_SUBTYPE_4CH_FULL_FUNC:
 690                 pad->num_sources = 4;
 691                 break;
 692         case PMIC_MPP_SUBTYPE_8CH_FULL_FUNC:
 693                 pad->num_sources = 8;
 694                 break;
 695         default:
 696                 dev_err(state->dev, "unknown MPP type 0x%x at 0x%x\n",
 697                         subtype, pad->base);
 698                 return -ENODEV;
 699         }
 700
 701         val = pmic_mpp_read(state, pad, PMIC_MPP_REG_MODE_CTL);
 702         if (val < 0)
 703                 return val;
 704
 705         pad->out_value = val & PMIC_MPP_REG_MODE_VALUE_MASK;
 706
 707         dir = val >> PMIC_MPP_REG_MODE_DIR_SHIFT;
 708         dir &= PMIC_MPP_REG_MODE_DIR_MASK;
 709
 710         switch (dir) {
 711         case PMIC_MPP_MODE_DIGITAL_INPUT:
 712                 pad->input_enabled = true;
 713                 pad->output_enabled = false;
 714                 pad->function = PMIC_MPP_DIGITAL;
 715                 break;
 716         case PMIC_MPP_MODE_DIGITAL_OUTPUT:
 717                 pad->input_enabled = false;
 718                 pad->output_enabled = true;
 719                 pad->function = PMIC_MPP_DIGITAL;
 720                 break;
 721         case PMIC_MPP_MODE_DIGITAL_BIDIR:
 722                 pad->input_enabled = true;
 723                 pad->output_enabled = true;
 724                 pad->function = PMIC_MPP_DIGITAL;
 725                 break;
 726         case PMIC_MPP_MODE_ANALOG_BIDIR:
 727                 pad->input_enabled = true;
 728                 pad->output_enabled = true;
 729                 pad->function = PMIC_MPP_ANALOG;
 730                 break;
 731         case PMIC_MPP_MODE_ANALOG_INPUT:
 732                 pad->input_enabled = true;
 733                 pad->output_enabled = false;
 734                 pad->function = PMIC_MPP_ANALOG;
 735                 break;
 736         case PMIC_MPP_MODE_ANALOG_OUTPUT:
 737                 pad->input_enabled = false;
 738                 pad->output_enabled = true;
 739                 pad->function = PMIC_MPP_ANALOG;
 740                 break;
 741         case PMIC_MPP_MODE_CURRENT_SINK:
 742                 pad->input_enabled = false;
 743                 pad->output_enabled = true;
 744                 pad->function = PMIC_MPP_SINK;
 745                 break;
 746         default:
 747                 dev_err(state->dev, "unknown MPP direction\n");
 748                 return -ENODEV;
 749         }
 750
 751         sel = val >> PMIC_MPP_REG_MODE_FUNCTION_SHIFT;
 752         sel &= PMIC_MPP_REG_MODE_FUNCTION_MASK;
 753
 754         if (sel >= PMIC_MPP_SELECTOR_DTEST_FIRST)
 755                 pad->dtest = sel + 1;
 756         else if (sel == PMIC_MPP_SELECTOR_PAIRED)
 757                 pad->paired = true;
 758
 759         val = pmic_mpp_read(state, pad, PMIC_MPP_REG_DIG_VIN_CTL);
 760         if (val < 0)
 761                 return val;
 762
 763         pad->power_source = val >> PMIC_MPP_REG_VIN_SHIFT;
 764         pad->power_source &= PMIC_MPP_REG_VIN_MASK;
 765
 766         val = pmic_mpp_read(state, pad, PMIC_MPP_REG_DIG_PULL_CTL);
 767         if (val < 0)
 768                 return val;
 769
 770         pad->pullup = val >> PMIC_MPP_REG_PULL_SHIFT;
 771         pad->pullup &= PMIC_MPP_REG_PULL_MASK;
 772
 773         val = pmic_mpp_read(state, pad, PMIC_MPP_REG_AIN_CTL);
 774         if (val < 0)
 775                 return val;
 776
 777         pad->amux_input = val >> PMIC_MPP_REG_AIN_ROUTE_SHIFT;
 778         pad->amux_input &= PMIC_MPP_REG_AIN_ROUTE_MASK;
 779
 780         val = pmic_mpp_read(state, pad, PMIC_MPP_REG_SINK_CTL);
 781         if (val < 0)
 782                 return val;
 783
 784         pad->drive_strength = val;
 785
 786         val = pmic_mpp_read(state, pad, PMIC_MPP_REG_AOUT_CTL);
 787         if (val < 0)
 788                 return val;
 789
 790         pad->aout_level = val;
 791
 792         val = pmic_mpp_read(state, pad, PMIC_MPP_REG_EN_CTL);
 793         if (val < 0)
 794                 return val;
 795
 796         pad->is_enabled = !!val;
 797
 798         return 0;
 799 }
 800
 801 static int pmic_mpp_probe(struct platform_device *pdev)
 802 {
 803         struct device *dev = &pdev->dev;
 804         struct pinctrl_pin_desc *pindesc;
 805         struct pinctrl_desc *pctrldesc;
 806         struct pmic_mpp_pad *pad, *pads;
 807         struct pmic_mpp_state *state;
 808         int ret, npins, i;
 809         u32 res[2];
 810
 811         ret = of_property_read_u32_array(dev->of_node, "reg", res, 2);
 812         if (ret < 0) {
 813                 dev_err(dev, "missing base address and/or range");
 814                 return ret;
 815         }
 816
 817         npins = res[1] / PMIC_MPP_ADDRESS_RANGE;
 818         if (!npins)
 819                 return -EINVAL;
 820
 821         BUG_ON(npins > ARRAY_SIZE(pmic_mpp_groups));
 822
 823         state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL);
 824         if (!state)
 825                 return -ENOMEM;
 826
 827         platform_set_drvdata(pdev, state);
 828
 829         state->dev = &pdev->dev;
 830         state->map = dev_get_regmap(dev->parent, NULL);
 831
 832         pindesc = devm_kcalloc(dev, npins, sizeof(*pindesc), GFP_KERNEL);
 833         if (!pindesc)
 834                 return -ENOMEM;
 835
 836         pads = devm_kcalloc(dev, npins, sizeof(*pads), GFP_KERNEL);
 837         if (!pads)
 838                 return -ENOMEM;
 839
 840         pctrldesc = devm_kzalloc(dev, sizeof(*pctrldesc), GFP_KERNEL);
 841         if (!pctrldesc)
 842                 return -ENOMEM;
 843
 844         pctrldesc->pctlops = &pmic_mpp_pinctrl_ops;
 845         pctrldesc->pmxops = &pmic_mpp_pinmux_ops;
 846         pctrldesc->confops = &pmic_mpp_pinconf_ops;
 847         pctrldesc->owner = THIS_MODULE;
 848         pctrldesc->name = dev_name(dev);
 849         pctrldesc->pins = pindesc;
 850         pctrldesc->npins = npins;
 851
 852         pctrldesc->num_custom_params = ARRAY_SIZE(pmic_mpp_bindings);
 853         pctrldesc->custom_params = pmic_mpp_bindings;
 854 #ifdef CONFIG_DEBUG_FS
 855         pctrldesc->custom_conf_items = pmic_conf_items;
 856 #endif
 857
 858         for (i = 0; i < npins; i++, pindesc++) {
 859                 pad = &pads[i];
 860                 pindesc->drv_data = pad;
 861                 pindesc->number = i;
 862                 pindesc->name = pmic_mpp_groups[i];
 863
 864                 pad->irq = platform_get_irq(pdev, i);
 865                 if (pad->irq < 0)
 866                         return pad->irq;
 867
 868                 pad->base = res[0] + i * PMIC_MPP_ADDRESS_RANGE;
 869
 870                 ret = pmic_mpp_populate(state, pad);
 871                 if (ret < 0)
 872                         return ret;
 873         }
 874
 875         state->chip = pmic_mpp_gpio_template;
 876         state->chip.dev = dev;
 877         state->chip.base = -1;
 878         state->chip.ngpio = npins;
 879         state->chip.label = dev_name(dev);
 880         state->chip.of_gpio_n_cells = 2;
 881         state->chip.can_sleep = false;
 882
 883         state->ctrl = pinctrl_register(pctrldesc, dev, state);
 884         if (IS_ERR(state->ctrl))
 885                 return PTR_ERR(state->ctrl);
 886
 887         ret = gpiochip_add(&state->chip);
 888         if (ret) {
 889                 dev_err(state->dev, "can't add gpio chip\n");
 890                 goto err_chip;
 891         }
 892
 893         ret = gpiochip_add_pin_range(&state->chip, dev_name(dev), 0, 0, npins);
 894         if (ret) {
 895                 dev_err(dev, "failed to add pin range\n");
 896                 goto err_range;
 897         }
 898
 899         return 0;
 900
 901 err_range:
 902         gpiochip_remove(&state->chip);
 903 err_chip:
 904         pinctrl_unregister(state->ctrl);
 905         return ret;
 906 }
 907
 908 static int pmic_mpp_remove(struct platform_device *pdev)
 909 {
 910         struct pmic_mpp_state *state = platform_get_drvdata(pdev);
 911
 912         gpiochip_remove(&state->chip);
 913         pinctrl_unregister(state->ctrl);
 914         return 0;
 915 }
 916
 917 static const struct of_device_id pmic_mpp_of_match[] = {
 918         { .compatible = "qcom,pm8841-mpp" },    /* 4 MPP's */
 919         { .compatible = "qcom,pm8916-mpp" },    /* 4 MPP's */
 920         { .compatible = "qcom,pm8941-mpp" },    /* 8 MPP's */
 921         { .compatible = "qcom,pma8084-mpp" },   /* 8 MPP's */
 922         { },
 923 };
 924
 925 MODULE_DEVICE_TABLE(of, pmic_mpp_of_match);
 926
 927 static struct platform_driver pmic_mpp_driver = {
 928         .driver = {
 929                    .name = "qcom-spmi-mpp",
 930                    .of_match_table = pmic_mpp_of_match,
 931         },
 932         .probe  = pmic_mpp_probe,
 933         .remove = pmic_mpp_remove,
 934 };
 935
 936 module_platform_driver(pmic_mpp_driver);
 937
 938 MODULE_AUTHOR("Ivan T. Ivanov <iivanov@mm-sol.com>");
 939 MODULE_DESCRIPTION("Qualcomm SPMI PMIC MPP pin control driver");
 940 MODULE_ALIAS("platform:qcom-spmi-mpp");
 941 MODULE_LICENSE("GPL v2");