drivers/regulator/pfuze100-regulator.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 //
   3 // Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
   4
   5 #include <linux/kernel.h>
   6 #include <linux/module.h>
   7 #include <linux/init.h>
   8 #include <linux/err.h>
   9 #include <linux/of.h>
  10 #include <linux/of_device.h>
  11 #include <linux/regulator/of_regulator.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/regulator/driver.h>
  14 #include <linux/regulator/machine.h>
  15 #include <linux/regulator/pfuze100.h>
  16 #include <linux/i2c.h>
  17 #include <linux/slab.h>
  18 #include <linux/regmap.h>
  19
  20 #define PFUZE_FLAG_DISABLE_SW   BIT(1)
  21
  22 #define PFUZE_NUMREGS           128
  23 #define PFUZE100_VOL_OFFSET     0
  24 #define PFUZE100_STANDBY_OFFSET 1
  25 #define PFUZE100_MODE_OFFSET    3
  26 #define PFUZE100_CONF_OFFSET    4
  27
  28 #define PFUZE100_DEVICEID       0x0
  29 #define PFUZE100_REVID          0x3
  30 #define PFUZE100_FABID          0x4
  31
  32 #define PFUZE100_COINVOL        0x1a
  33 #define PFUZE100_SW1ABVOL       0x20
  34 #define PFUZE100_SW1CVOL        0x2e
  35 #define PFUZE100_SW2VOL         0x35
  36 #define PFUZE100_SW3AVOL        0x3c
  37 #define PFUZE100_SW3BVOL        0x43
  38 #define PFUZE100_SW4VOL         0x4a
  39 #define PFUZE100_SWBSTCON1      0x66
  40 #define PFUZE100_VREFDDRCON     0x6a
  41 #define PFUZE100_VSNVSVOL       0x6b
  42 #define PFUZE100_VGEN1VOL       0x6c
  43 #define PFUZE100_VGEN2VOL       0x6d
  44 #define PFUZE100_VGEN3VOL       0x6e
  45 #define PFUZE100_VGEN4VOL       0x6f
  46 #define PFUZE100_VGEN5VOL       0x70
  47 #define PFUZE100_VGEN6VOL       0x71
  48
  49 enum chips { PFUZE100, PFUZE200, PFUZE3000 = 3, PFUZE3001 = 0x31, };
  50
  51 struct pfuze_regulator {
  52         struct regulator_desc desc;
  53         unsigned char stby_reg;
  54         unsigned char stby_mask;
  55         bool sw_reg;
  56 };
  57
  58 struct pfuze_chip {
  59         int     chip_id;
  60         int     flags;
  61         struct regmap *regmap;
  62         struct device *dev;
  63         struct pfuze_regulator regulator_descs[PFUZE100_MAX_REGULATOR];
  64         struct regulator_dev *regulators[PFUZE100_MAX_REGULATOR];
  65         struct pfuze_regulator *pfuze_regulators;
  66 };
  67
  68 static const int pfuze100_swbst[] = {
  69         5000000, 5050000, 5100000, 5150000,
  70 };
  71
  72 static const int pfuze100_vsnvs[] = {
  73         1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000,
  74 };
  75
  76 static const int pfuze100_coin[] = {
  77         2500000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000,
  78 };
  79
  80 static const int pfuze3000_sw1a[] = {
  81         700000, 725000, 750000, 775000, 800000, 825000, 850000, 875000,
  82         900000, 925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000,
  83         1100000, 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000,
  84         1300000, 1325000, 1350000, 1375000, 1400000, 1425000, 1800000, 3300000,
  85 };
  86
  87 static const int pfuze3000_sw2lo[] = {
  88         1500000, 1550000, 1600000, 1650000, 1700000, 1750000, 1800000, 1850000,
  89 };
  90
  91 static const int pfuze3000_sw2hi[] = {
  92         2500000, 2800000, 2850000, 3000000, 3100000, 3150000, 3200000, 3300000,
  93 };
  94
  95 static const struct i2c_device_id pfuze_device_id[] = {
  96         {.name = "pfuze100", .driver_data = PFUZE100},
  97         {.name = "pfuze200", .driver_data = PFUZE200},
  98         {.name = "pfuze3000", .driver_data = PFUZE3000},
  99         {.name = "pfuze3001", .driver_data = PFUZE3001},
 100         { }
 101 };
 102 MODULE_DEVICE_TABLE(i2c, pfuze_device_id);
 103
 104 static const struct of_device_id pfuze_dt_ids[] = {
 105         { .compatible = "fsl,pfuze100", .data = (void *)PFUZE100},
 106         { .compatible = "fsl,pfuze200", .data = (void *)PFUZE200},
 107         { .compatible = "fsl,pfuze3000", .data = (void *)PFUZE3000},
 108         { .compatible = "fsl,pfuze3001", .data = (void *)PFUZE3001},
 109         { }
 110 };
 111 MODULE_DEVICE_TABLE(of, pfuze_dt_ids);
 112
 113 static int pfuze100_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
 114 {
 115         struct pfuze_chip *pfuze100 = rdev_get_drvdata(rdev);
 116         int id = rdev_get_id(rdev);
 117         bool reg_has_ramp_delay;
 118         unsigned int ramp_bits;
 119         int ret;
 120
 121         switch (pfuze100->chip_id) {
 122         case PFUZE3001:
 123                 /* no dynamic voltage scaling for PF3001 */
 124                 reg_has_ramp_delay = false;
 125                 break;
 126         case PFUZE3000:
 127                 reg_has_ramp_delay = (id < PFUZE3000_SWBST);
 128                 break;
 129         case PFUZE200:
 130                 reg_has_ramp_delay = (id < PFUZE200_SWBST);
 131                 break;
 132         case PFUZE100:
 133         default:
 134                 reg_has_ramp_delay = (id < PFUZE100_SWBST);
 135                 break;
 136         }
 137
 138         if (reg_has_ramp_delay) {
 139                 ramp_delay = 12500 / ramp_delay;
 140                 ramp_bits = (ramp_delay >> 1) - (ramp_delay >> 3);
 141                 ret = regmap_update_bits(pfuze100->regmap,
 142                                          rdev->desc->vsel_reg + 4,
 143                                          0xc0, ramp_bits << 6);
 144                 if (ret < 0)
 145                         dev_err(pfuze100->dev, "ramp failed, err %d\n", ret);
 146         } else {
 147                 ret = -EACCES;
 148         }
 149
 150         return ret;
 151 }
 152
 153 static const struct regulator_ops pfuze100_ldo_regulator_ops = {
 154         .enable = regulator_enable_regmap,
 155         .disable = regulator_disable_regmap,
 156         .is_enabled = regulator_is_enabled_regmap,
 157         .list_voltage = regulator_list_voltage_linear,
 158         .set_voltage_sel = regulator_set_voltage_sel_regmap,
 159         .get_voltage_sel = regulator_get_voltage_sel_regmap,
 160 };
 161
 162 static const struct regulator_ops pfuze100_fixed_regulator_ops = {
 163         .enable = regulator_enable_regmap,
 164         .disable = regulator_disable_regmap,
 165         .is_enabled = regulator_is_enabled_regmap,
 166         .list_voltage = regulator_list_voltage_linear,
 167 };
 168
 169 static const struct regulator_ops pfuze100_sw_regulator_ops = {
 170         .list_voltage = regulator_list_voltage_linear,
 171         .set_voltage_sel = regulator_set_voltage_sel_regmap,
 172         .get_voltage_sel = regulator_get_voltage_sel_regmap,
 173         .set_voltage_time_sel = regulator_set_voltage_time_sel,
 174         .set_ramp_delay = pfuze100_set_ramp_delay,
 175 };
 176
 177 static const struct regulator_ops pfuze100_sw_disable_regulator_ops = {
 178         .enable = regulator_enable_regmap,
 179         .disable = regulator_disable_regmap,
 180         .is_enabled = regulator_is_enabled_regmap,
 181         .list_voltage = regulator_list_voltage_linear,
 182         .set_voltage_sel = regulator_set_voltage_sel_regmap,
 183         .get_voltage_sel = regulator_get_voltage_sel_regmap,
 184         .set_voltage_time_sel = regulator_set_voltage_time_sel,
 185         .set_ramp_delay = pfuze100_set_ramp_delay,
 186 };
 187
 188 static const struct regulator_ops pfuze100_swb_regulator_ops = {
 189         .enable = regulator_enable_regmap,
 190         .disable = regulator_disable_regmap,
 191         .is_enabled = regulator_is_enabled_regmap,
 192         .list_voltage = regulator_list_voltage_table,
 193         .map_voltage = regulator_map_voltage_ascend,
 194         .set_voltage_sel = regulator_set_voltage_sel_regmap,
 195         .get_voltage_sel = regulator_get_voltage_sel_regmap,
 196
 197 };
 198
 199 static const struct regulator_ops pfuze3000_sw_regulator_ops = {
 200         .enable = regulator_enable_regmap,
 201         .disable = regulator_disable_regmap,
 202         .is_enabled = regulator_is_enabled_regmap,
 203         .list_voltage = regulator_list_voltage_table,
 204         .map_voltage = regulator_map_voltage_ascend,
 205         .set_voltage_sel = regulator_set_voltage_sel_regmap,
 206         .get_voltage_sel = regulator_get_voltage_sel_regmap,
 207         .set_voltage_time_sel = regulator_set_voltage_time_sel,
 208         .set_ramp_delay = pfuze100_set_ramp_delay,
 209
 210 };
 211
 212 #define PFUZE100_FIXED_REG(_chip, _name, base, voltage) \
 213         [_chip ## _ ## _name] = {       \
 214                 .desc = {       \
 215                         .name = #_name, \
 216                         .n_voltages = 1,        \
 217                         .ops = &pfuze100_fixed_regulator_ops,   \
 218                         .type = REGULATOR_VOLTAGE,      \
 219                         .id = _chip ## _ ## _name,      \
 220                         .owner = THIS_MODULE,   \
 221                         .min_uV = (voltage),    \
 222                         .enable_reg = (base),   \
 223                         .enable_mask = 0x10,    \
 224                 },      \
 225         }
 226
 227 #define PFUZE100_SW_REG(_chip, _name, base, min, max, step)     \
 228         [_chip ## _ ## _name] = {       \
 229                 .desc = {       \
 230                         .name = #_name,\
 231                         .n_voltages = ((max) - (min)) / (step) + 1,     \
 232                         .ops = &pfuze100_sw_regulator_ops,      \
 233                         .type = REGULATOR_VOLTAGE,      \
 234                         .id = _chip ## _ ## _name,      \
 235                         .owner = THIS_MODULE,   \
 236                         .min_uV = (min),        \
 237                         .uV_step = (step),      \
 238                         .vsel_reg = (base) + PFUZE100_VOL_OFFSET,       \
 239                         .vsel_mask = 0x3f,      \
 240                         .enable_reg = (base) + PFUZE100_MODE_OFFSET,    \
 241                         .enable_mask = 0xf,     \
 242                 },      \
 243                 .stby_reg = (base) + PFUZE100_STANDBY_OFFSET,   \
 244                 .stby_mask = 0x3f,      \
 245                 .sw_reg = true,         \
 246         }
 247
 248 #define PFUZE100_SWB_REG(_chip, _name, base, mask, voltages)    \
 249         [_chip ## _ ##  _name] = {      \
 250                 .desc = {       \
 251                         .name = #_name, \
 252                         .n_voltages = ARRAY_SIZE(voltages),     \
 253                         .ops = &pfuze100_swb_regulator_ops,     \
 254                         .type = REGULATOR_VOLTAGE,      \
 255                         .id = _chip ## _ ## _name,      \
 256                         .owner = THIS_MODULE,   \
 257                         .volt_table = voltages, \
 258                         .vsel_reg = (base),     \
 259                         .vsel_mask = (mask),    \
 260                         .enable_reg = (base),   \
 261                         .enable_mask = 0x48,    \
 262                 },      \
 263         }
 264
 265 #define PFUZE100_VGEN_REG(_chip, _name, base, min, max, step)   \
 266         [_chip ## _ ## _name] = {       \
 267                 .desc = {       \
 268                         .name = #_name, \
 269                         .n_voltages = ((max) - (min)) / (step) + 1,     \
 270                         .ops = &pfuze100_ldo_regulator_ops,     \
 271                         .type = REGULATOR_VOLTAGE,      \
 272                         .id = _chip ## _ ## _name,      \
 273                         .owner = THIS_MODULE,   \
 274                         .min_uV = (min),        \
 275                         .uV_step = (step),      \
 276                         .vsel_reg = (base),     \
 277                         .vsel_mask = 0xf,       \
 278                         .enable_reg = (base),   \
 279                         .enable_mask = 0x10,    \
 280                 },      \
 281                 .stby_reg = (base),     \
 282                 .stby_mask = 0x20,      \
 283         }
 284
 285 #define PFUZE100_COIN_REG(_chip, _name, base, mask, voltages)   \
 286         [_chip ## _ ##  _name] = {      \
 287                 .desc = {       \
 288                         .name = #_name, \
 289                         .n_voltages = ARRAY_SIZE(voltages),     \
 290                         .ops = &pfuze100_swb_regulator_ops,     \
 291                         .type = REGULATOR_VOLTAGE,      \
 292                         .id = _chip ## _ ## _name,      \
 293                         .owner = THIS_MODULE,   \
 294                         .volt_table = voltages, \
 295                         .vsel_reg = (base),     \
 296                         .vsel_mask = (mask),    \
 297                         .enable_reg = (base),   \
 298                         .enable_mask = 0x8,     \
 299                 },      \
 300         }
 301
 302 #define PFUZE3000_VCC_REG(_chip, _name, base, min, max, step)   {       \
 303         .desc = {       \
 304                 .name = #_name, \
 305                 .n_voltages = ((max) - (min)) / (step) + 1,     \
 306                 .ops = &pfuze100_ldo_regulator_ops,     \
 307                 .type = REGULATOR_VOLTAGE,      \
 308                 .id = _chip ## _ ## _name,      \
 309                 .owner = THIS_MODULE,   \
 310                 .min_uV = (min),        \
 311                 .uV_step = (step),      \
 312                 .vsel_reg = (base),     \
 313                 .vsel_mask = 0x3,       \
 314                 .enable_reg = (base),   \
 315                 .enable_mask = 0x10,    \
 316         },      \
 317         .stby_reg = (base),     \
 318         .stby_mask = 0x20,      \
 319 }
 320
 321 /* No linar case for the some switches of PFUZE3000 */
 322 #define PFUZE3000_SW_REG(_chip, _name, base, mask, voltages)    \
 323         [_chip ## _ ##  _name] = {      \
 324                 .desc = {       \
 325                         .name = #_name, \
 326                         .n_voltages = ARRAY_SIZE(voltages),     \
 327                         .ops = &pfuze3000_sw_regulator_ops,     \
 328                         .type = REGULATOR_VOLTAGE,      \
 329                         .id = _chip ## _ ## _name,      \
 330                         .owner = THIS_MODULE,   \
 331                         .volt_table = voltages, \
 332                         .vsel_reg = (base) + PFUZE100_VOL_OFFSET,       \
 333                         .vsel_mask = (mask),    \
 334                         .enable_reg = (base) + PFUZE100_MODE_OFFSET,    \
 335                         .enable_mask = 0xf,     \
 336                         .enable_val = 0x8,      \
 337                         .enable_time = 500,     \
 338                 },      \
 339                 .stby_reg = (base) + PFUZE100_STANDBY_OFFSET,   \
 340                 .stby_mask = (mask),    \
 341                 .sw_reg = true,         \
 342         }
 343
 344 #define PFUZE3000_SW3_REG(_chip, _name, base, min, max, step)   {       \
 345         .desc = {       \
 346                 .name = #_name,\
 347                 .n_voltages = ((max) - (min)) / (step) + 1,     \
 348                 .ops = &pfuze100_sw_regulator_ops,      \
 349                 .type = REGULATOR_VOLTAGE,      \
 350                 .id = _chip ## _ ## _name,      \
 351                 .owner = THIS_MODULE,   \
 352                 .min_uV = (min),        \
 353                 .uV_step = (step),      \
 354                 .vsel_reg = (base) + PFUZE100_VOL_OFFSET,       \
 355                 .vsel_mask = 0xf,       \
 356         },      \
 357         .stby_reg = (base) + PFUZE100_STANDBY_OFFSET,   \
 358         .stby_mask = 0xf,       \
 359 }
 360
 361 /* PFUZE100 */
 362 static struct pfuze_regulator pfuze100_regulators[] = {
 363         PFUZE100_SW_REG(PFUZE100, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
 364         PFUZE100_SW_REG(PFUZE100, SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000),
 365         PFUZE100_SW_REG(PFUZE100, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
 366         PFUZE100_SW_REG(PFUZE100, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
 367         PFUZE100_SW_REG(PFUZE100, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
 368         PFUZE100_SW_REG(PFUZE100, SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000),
 369         PFUZE100_SWB_REG(PFUZE100, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
 370         PFUZE100_SWB_REG(PFUZE100, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
 371         PFUZE100_FIXED_REG(PFUZE100, VREFDDR, PFUZE100_VREFDDRCON, 750000),
 372         PFUZE100_VGEN_REG(PFUZE100, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
 373         PFUZE100_VGEN_REG(PFUZE100, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
 374         PFUZE100_VGEN_REG(PFUZE100, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
 375         PFUZE100_VGEN_REG(PFUZE100, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
 376         PFUZE100_VGEN_REG(PFUZE100, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
 377         PFUZE100_VGEN_REG(PFUZE100, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
 378 };
 379
 380 static struct pfuze_regulator pfuze200_regulators[] = {
 381         PFUZE100_SW_REG(PFUZE200, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
 382         PFUZE100_SW_REG(PFUZE200, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
 383         PFUZE100_SW_REG(PFUZE200, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
 384         PFUZE100_SW_REG(PFUZE200, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
 385         PFUZE100_SWB_REG(PFUZE200, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
 386         PFUZE100_SWB_REG(PFUZE200, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
 387         PFUZE100_FIXED_REG(PFUZE200, VREFDDR, PFUZE100_VREFDDRCON, 750000),
 388         PFUZE100_VGEN_REG(PFUZE200, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
 389         PFUZE100_VGEN_REG(PFUZE200, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
 390         PFUZE100_VGEN_REG(PFUZE200, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
 391         PFUZE100_VGEN_REG(PFUZE200, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
 392         PFUZE100_VGEN_REG(PFUZE200, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
 393         PFUZE100_VGEN_REG(PFUZE200, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
 394         PFUZE100_COIN_REG(PFUZE200, COIN, PFUZE100_COINVOL, 0x7, pfuze100_coin),
 395 };
 396
 397 static struct pfuze_regulator pfuze3000_regulators[] = {
 398         PFUZE3000_SW_REG(PFUZE3000, SW1A, PFUZE100_SW1ABVOL, 0x1f, pfuze3000_sw1a),
 399         PFUZE100_SW_REG(PFUZE3000, SW1B, PFUZE100_SW1CVOL, 700000, 1475000, 25000),
 400         PFUZE3000_SW_REG(PFUZE3000, SW2, PFUZE100_SW2VOL, 0x7, pfuze3000_sw2lo),
 401         PFUZE3000_SW3_REG(PFUZE3000, SW3, PFUZE100_SW3AVOL, 900000, 1650000, 50000),
 402         PFUZE100_SWB_REG(PFUZE3000, SWBST, PFUZE100_SWBSTCON1, 0x3, pfuze100_swbst),
 403         PFUZE100_SWB_REG(PFUZE3000, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
 404         PFUZE100_FIXED_REG(PFUZE3000, VREFDDR, PFUZE100_VREFDDRCON, 750000),
 405         PFUZE100_VGEN_REG(PFUZE3000, VLDO1, PFUZE100_VGEN1VOL, 1800000, 3300000, 100000),
 406         PFUZE100_VGEN_REG(PFUZE3000, VLDO2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
 407         PFUZE3000_VCC_REG(PFUZE3000, VCCSD, PFUZE100_VGEN3VOL, 2850000, 3300000, 150000),
 408         PFUZE3000_VCC_REG(PFUZE3000, V33, PFUZE100_VGEN4VOL, 2850000, 3300000, 150000),
 409         PFUZE100_VGEN_REG(PFUZE3000, VLDO3, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
 410         PFUZE100_VGEN_REG(PFUZE3000, VLDO4, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
 411 };
 412
 413 static struct pfuze_regulator pfuze3001_regulators[] = {
 414         PFUZE3000_SW_REG(PFUZE3001, SW1, PFUZE100_SW1ABVOL, 0x1f, pfuze3000_sw1a),
 415         PFUZE3000_SW_REG(PFUZE3001, SW2, PFUZE100_SW2VOL, 0x7, pfuze3000_sw2lo),
 416         PFUZE3000_SW3_REG(PFUZE3001, SW3, PFUZE100_SW3AVOL, 900000, 1650000, 50000),
 417         PFUZE100_SWB_REG(PFUZE3001, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
 418         PFUZE100_VGEN_REG(PFUZE3001, VLDO1, PFUZE100_VGEN1VOL, 1800000, 3300000, 100000),
 419         PFUZE100_VGEN_REG(PFUZE3001, VLDO2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
 420         PFUZE3000_VCC_REG(PFUZE3001, VCCSD, PFUZE100_VGEN3VOL, 2850000, 3300000, 150000),
 421         PFUZE3000_VCC_REG(PFUZE3001, V33, PFUZE100_VGEN4VOL, 2850000, 3300000, 150000),
 422         PFUZE100_VGEN_REG(PFUZE3001, VLDO3, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
 423         PFUZE100_VGEN_REG(PFUZE3001, VLDO4, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
 424 };
 425
 426 #ifdef CONFIG_OF
 427 /* PFUZE100 */
 428 static struct of_regulator_match pfuze100_matches[] = {
 429         { .name = "sw1ab",      },
 430         { .name = "sw1c",       },
 431         { .name = "sw2",        },
 432         { .name = "sw3a",       },
 433         { .name = "sw3b",       },
 434         { .name = "sw4",        },
 435         { .name = "swbst",      },
 436         { .name = "vsnvs",      },
 437         { .name = "vrefddr",    },
 438         { .name = "vgen1",      },
 439         { .name = "vgen2",      },
 440         { .name = "vgen3",      },
 441         { .name = "vgen4",      },
 442         { .name = "vgen5",      },
 443         { .name = "vgen6",      },
 444 };
 445
 446 /* PFUZE200 */
 447 static struct of_regulator_match pfuze200_matches[] = {
 448
 449         { .name = "sw1ab",      },
 450         { .name = "sw2",        },
 451         { .name = "sw3a",       },
 452         { .name = "sw3b",       },
 453         { .name = "swbst",      },
 454         { .name = "vsnvs",      },
 455         { .name = "vrefddr",    },
 456         { .name = "vgen1",      },
 457         { .name = "vgen2",      },
 458         { .name = "vgen3",      },
 459         { .name = "vgen4",      },
 460         { .name = "vgen5",      },
 461         { .name = "vgen6",      },
 462         { .name = "coin",       },
 463 };
 464
 465 /* PFUZE3000 */
 466 static struct of_regulator_match pfuze3000_matches[] = {
 467
 468         { .name = "sw1a",       },
 469         { .name = "sw1b",       },
 470         { .name = "sw2",        },
 471         { .name = "sw3",        },
 472         { .name = "swbst",      },
 473         { .name = "vsnvs",      },
 474         { .name = "vrefddr",    },
 475         { .name = "vldo1",      },
 476         { .name = "vldo2",      },
 477         { .name = "vccsd",      },
 478         { .name = "v33",        },
 479         { .name = "vldo3",      },
 480         { .name = "vldo4",      },
 481 };
 482
 483 /* PFUZE3001 */
 484 static struct of_regulator_match pfuze3001_matches[] = {
 485
 486         { .name = "sw1",        },
 487         { .name = "sw2",        },
 488         { .name = "sw3",        },
 489         { .name = "vsnvs",      },
 490         { .name = "vldo1",      },
 491         { .name = "vldo2",      },
 492         { .name = "vccsd",      },
 493         { .name = "v33",        },
 494         { .name = "vldo3",      },
 495         { .name = "vldo4",      },
 496 };
 497
 498 static struct of_regulator_match *pfuze_matches;
 499
 500 static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
 501 {
 502         struct device *dev = chip->dev;
 503         struct device_node *np, *parent;
 504         int ret;
 505
 506         np = of_node_get(dev->of_node);
 507         if (!np)
 508                 return -EINVAL;
 509
 510         if (of_property_read_bool(np, "fsl,pfuze-support-disable-sw"))
 511                 chip->flags |= PFUZE_FLAG_DISABLE_SW;
 512
 513         parent = of_get_child_by_name(np, "regulators");
 514         if (!parent) {
 515                 dev_err(dev, "regulators node not found\n");
 516                 of_node_put(np);
 517                 return -EINVAL;
 518         }
 519
 520         switch (chip->chip_id) {
 521         case PFUZE3001:
 522                 pfuze_matches = pfuze3001_matches;
 523                 ret = of_regulator_match(dev, parent, pfuze3001_matches,
 524                                          ARRAY_SIZE(pfuze3001_matches));
 525                 break;
 526         case PFUZE3000:
 527                 pfuze_matches = pfuze3000_matches;
 528                 ret = of_regulator_match(dev, parent, pfuze3000_matches,
 529                                          ARRAY_SIZE(pfuze3000_matches));
 530                 break;
 531         case PFUZE200:
 532                 pfuze_matches = pfuze200_matches;
 533                 ret = of_regulator_match(dev, parent, pfuze200_matches,
 534                                          ARRAY_SIZE(pfuze200_matches));
 535                 break;
 536
 537         case PFUZE100:
 538         default:
 539                 pfuze_matches = pfuze100_matches;
 540                 ret = of_regulator_match(dev, parent, pfuze100_matches,
 541                                          ARRAY_SIZE(pfuze100_matches));
 542                 break;
 543         }
 544
 545         of_node_put(parent);
 546         of_node_put(np);
 547         if (ret < 0) {
 548                 dev_err(dev, "Error parsing regulator init data: %d\n",
 549                         ret);
 550                 return ret;
 551         }
 552
 553         return 0;
 554 }
 555
 556 static inline struct regulator_init_data *match_init_data(int index)
 557 {
 558         return pfuze_matches[index].init_data;
 559 }
 560
 561 static inline struct device_node *match_of_node(int index)
 562 {
 563         return pfuze_matches[index].of_node;
 564 }
 565 #else
 566 static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
 567 {
 568         return 0;
 569 }
 570
 571 static inline struct regulator_init_data *match_init_data(int index)
 572 {
 573         return NULL;
 574 }
 575
 576 static inline struct device_node *match_of_node(int index)
 577 {
 578         return NULL;
 579 }
 580 #endif
 581
 582 static int pfuze_identify(struct pfuze_chip *pfuze_chip)
 583 {
 584         unsigned int value;
 585         int ret;
 586
 587         ret = regmap_read(pfuze_chip->regmap, PFUZE100_DEVICEID, &value);
 588         if (ret)
 589                 return ret;
 590
 591         if (((value & 0x0f) == 0x8) && (pfuze_chip->chip_id == PFUZE100)) {
 592                 /*
 593                  * Freescale misprogrammed 1-3% of parts prior to week 8 of 2013
 594                  * as ID=8 in PFUZE100
 595                  */
 596                 dev_info(pfuze_chip->dev, "Assuming misprogrammed ID=0x8");
 597         } else if ((value & 0x0f) != pfuze_chip->chip_id &&
 598                    (value & 0xf0) >> 4 != pfuze_chip->chip_id &&
 599                    (value != pfuze_chip->chip_id)) {
 600                 /* device id NOT match with your setting */
 601                 dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
 602                 return -ENODEV;
 603         }
 604
 605         ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);
 606         if (ret)
 607                 return ret;
 608         dev_info(pfuze_chip->dev,
 609                  "Full layer: %x, Metal layer: %x\n",
 610                  (value & 0xf0) >> 4, value & 0x0f);
 611
 612         ret = regmap_read(pfuze_chip->regmap, PFUZE100_FABID, &value);
 613         if (ret)
 614                 return ret;
 615         dev_info(pfuze_chip->dev, "FAB: %x, FIN: %x\n",
 616                  (value & 0xc) >> 2, value & 0x3);
 617
 618         return 0;
 619 }
 620
 621 static const struct regmap_config pfuze_regmap_config = {
 622         .reg_bits = 8,
 623         .val_bits = 8,
 624         .max_register = PFUZE_NUMREGS - 1,
 625         .cache_type = REGCACHE_RBTREE,
 626 };
 627
 628 static int pfuze100_regulator_probe(struct i2c_client *client,
 629                                     const struct i2c_device_id *id)
 630 {
 631         struct pfuze_chip *pfuze_chip;
 632         struct pfuze_regulator_platform_data *pdata =
 633             dev_get_platdata(&client->dev);
 634         struct regulator_config config = { };
 635         int i, ret;
 636         const struct of_device_id *match;
 637         u32 regulator_num;
 638         u32 sw_check_start, sw_check_end, sw_hi = 0x40;
 639
 640         pfuze_chip = devm_kzalloc(&client->dev, sizeof(*pfuze_chip),
 641                         GFP_KERNEL);
 642         if (!pfuze_chip)
 643                 return -ENOMEM;
 644
 645         if (client->dev.of_node) {
 646                 match = of_match_device(of_match_ptr(pfuze_dt_ids),
 647                                 &client->dev);
 648                 if (!match) {
 649                         dev_err(&client->dev, "Error: No device match found\n");
 650                         return -ENODEV;
 651                 }
 652                 pfuze_chip->chip_id = (int)(long)match->data;
 653         } else if (id) {
 654                 pfuze_chip->chip_id = id->driver_data;
 655         } else {
 656                 dev_err(&client->dev, "No dts match or id table match found\n");
 657                 return -ENODEV;
 658         }
 659
 660         i2c_set_clientdata(client, pfuze_chip);
 661         pfuze_chip->dev = &client->dev;
 662
 663         pfuze_chip->regmap = devm_regmap_init_i2c(client, &pfuze_regmap_config);
 664         if (IS_ERR(pfuze_chip->regmap)) {
 665                 ret = PTR_ERR(pfuze_chip->regmap);
 666                 dev_err(&client->dev,
 667                         "regmap allocation failed with err %d\n", ret);
 668                 return ret;
 669         }
 670
 671         ret = pfuze_identify(pfuze_chip);
 672         if (ret) {
 673                 dev_err(&client->dev, "unrecognized pfuze chip ID!\n");
 674                 return ret;
 675         }
 676
 677         /* use the right regulators after identify the right device */
 678         switch (pfuze_chip->chip_id) {
 679         case PFUZE3001:
 680                 pfuze_chip->pfuze_regulators = pfuze3001_regulators;
 681                 regulator_num = ARRAY_SIZE(pfuze3001_regulators);
 682                 sw_check_start = PFUZE3001_SW2;
 683                 sw_check_end = PFUZE3001_SW2;
 684                 sw_hi = 1 << 3;
 685                 break;
 686         case PFUZE3000:
 687                 pfuze_chip->pfuze_regulators = pfuze3000_regulators;
 688                 regulator_num = ARRAY_SIZE(pfuze3000_regulators);
 689                 sw_check_start = PFUZE3000_SW2;
 690                 sw_check_end = PFUZE3000_SW2;
 691                 sw_hi = 1 << 3;
 692                 break;
 693         case PFUZE200:
 694                 pfuze_chip->pfuze_regulators = pfuze200_regulators;
 695                 regulator_num = ARRAY_SIZE(pfuze200_regulators);
 696                 sw_check_start = PFUZE200_SW2;
 697                 sw_check_end = PFUZE200_SW3B;
 698                 break;
 699         case PFUZE100:
 700         default:
 701                 pfuze_chip->pfuze_regulators = pfuze100_regulators;
 702                 regulator_num = ARRAY_SIZE(pfuze100_regulators);
 703                 sw_check_start = PFUZE100_SW2;
 704                 sw_check_end = PFUZE100_SW4;
 705                 break;
 706         }
 707         dev_info(&client->dev, "pfuze%s found.\n",
 708                 (pfuze_chip->chip_id == PFUZE100) ? "100" :
 709                 (((pfuze_chip->chip_id == PFUZE200) ? "200" :
 710                 ((pfuze_chip->chip_id == PFUZE3000) ? "3000" : "3001"))));
 711
 712         memcpy(pfuze_chip->regulator_descs, pfuze_chip->pfuze_regulators,
 713                 regulator_num * sizeof(struct pfuze_regulator));
 714
 715         ret = pfuze_parse_regulators_dt(pfuze_chip);
 716         if (ret)
 717                 return ret;
 718
 719         for (i = 0; i < regulator_num; i++) {
 720                 struct regulator_init_data *init_data;
 721                 struct regulator_desc *desc;
 722                 int val;
 723
 724                 desc = &pfuze_chip->regulator_descs[i].desc;
 725
 726                 if (pdata)
 727                         init_data = pdata->init_data[i];
 728                 else
 729                         init_data = match_init_data(i);
 730
 731                 /* SW2~SW4 high bit check and modify the voltage value table */
 732                 if (i >= sw_check_start && i <= sw_check_end) {
 733                         ret = regmap_read(pfuze_chip->regmap,
 734                                                 desc->vsel_reg, &val);
 735                         if (ret) {
 736                                 dev_err(&client->dev, "Fails to read from the register.\n");
 737                                 return ret;
 738                         }
 739
 740                         if (val & sw_hi) {
 741                                 if (pfuze_chip->chip_id == PFUZE3000 ||
 742                                         pfuze_chip->chip_id == PFUZE3001) {
 743                                         desc->volt_table = pfuze3000_sw2hi;
 744                                         desc->n_voltages = ARRAY_SIZE(pfuze3000_sw2hi);
 745                                 } else {
 746                                         desc->min_uV = 800000;
 747                                         desc->uV_step = 50000;
 748                                         desc->n_voltages = 51;
 749                                 }
 750                         }
 751                 }
 752
 753                 /*
 754                  * Allow SW regulators to turn off. Checking it trough a flag is
 755                  * a workaround to keep the backward compatibility with existing
 756                  * old dtb's which may relay on the fact that we didn't disable
 757                  * the switched regulator till yet.
 758                  */
 759                 if (pfuze_chip->flags & PFUZE_FLAG_DISABLE_SW) {
 760                         if (pfuze_chip->chip_id == PFUZE100 ||
 761                                 pfuze_chip->chip_id == PFUZE200) {
 762                                 if (pfuze_chip->regulator_descs[i].sw_reg) {
 763                                         desc->ops = &pfuze100_sw_disable_regulator_ops;
 764                                         desc->enable_val = 0x8;
 765                                         desc->disable_val = 0x0;
 766                                         desc->enable_time = 500;
 767                                 }
 768                         }
 769                 }
 770
 771                 config.dev = &client->dev;
 772                 config.init_data = init_data;
 773                 config.driver_data = pfuze_chip;
 774                 config.of_node = match_of_node(i);
 775
 776                 pfuze_chip->regulators[i] =
 777                         devm_regulator_register(&client->dev, desc, &config);
 778                 if (IS_ERR(pfuze_chip->regulators[i])) {
 779                         dev_err(&client->dev, "register regulator%s failed\n",
 780                                 pfuze_chip->pfuze_regulators[i].desc.name);
 781                         return PTR_ERR(pfuze_chip->regulators[i]);
 782                 }
 783         }
 784
 785         return 0;
 786 }
 787
 788 static struct i2c_driver pfuze_driver = {
 789         .id_table = pfuze_device_id,
 790         .driver = {
 791                 .name = "pfuze100-regulator",
 792                 .of_match_table = pfuze_dt_ids,
 793         },
 794         .probe = pfuze100_regulator_probe,
 795 };
 796 module_i2c_driver(pfuze_driver);
 797
 798 MODULE_AUTHOR("Robin Gong <b38343@freescale.com>");
 799 MODULE_DESCRIPTION("Regulator Driver for Freescale PFUZE100/200/3000/3001 PMIC");
 800 MODULE_LICENSE("GPL v2");