GNU Linux-libre 4.14.266-gnu1
[releases.git] / drivers / scsi / hpsa.c
1 /*
2  *    Disk Array driver for HP Smart Array SAS controllers
3  *    Copyright 2016 Microsemi Corporation
4  *    Copyright 2014-2015 PMC-Sierra, Inc.
5  *    Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
6  *
7  *    This program is free software; you can redistribute it and/or modify
8  *    it under the terms of the GNU General Public License as published by
9  *    the Free Software Foundation; version 2 of the License.
10  *
11  *    This program is distributed in the hope that it will be useful,
12  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
15  *
16  *    Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
17  *
18  */
19
20 #include <linux/module.h>
21 #include <linux/interrupt.h>
22 #include <linux/types.h>
23 #include <linux/pci.h>
24 #include <linux/pci-aspm.h>
25 #include <linux/kernel.h>
26 #include <linux/slab.h>
27 #include <linux/delay.h>
28 #include <linux/fs.h>
29 #include <linux/timer.h>
30 #include <linux/init.h>
31 #include <linux/spinlock.h>
32 #include <linux/compat.h>
33 #include <linux/blktrace_api.h>
34 #include <linux/uaccess.h>
35 #include <linux/io.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/completion.h>
38 #include <linux/moduleparam.h>
39 #include <scsi/scsi.h>
40 #include <scsi/scsi_cmnd.h>
41 #include <scsi/scsi_device.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_tcq.h>
44 #include <scsi/scsi_eh.h>
45 #include <scsi/scsi_transport_sas.h>
46 #include <scsi/scsi_dbg.h>
47 #include <linux/cciss_ioctl.h>
48 #include <linux/string.h>
49 #include <linux/bitmap.h>
50 #include <linux/atomic.h>
51 #include <linux/jiffies.h>
52 #include <linux/percpu-defs.h>
53 #include <linux/percpu.h>
54 #include <asm/unaligned.h>
55 #include <asm/div64.h>
56 #include "hpsa_cmd.h"
57 #include "hpsa.h"
58
59 /*
60  * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
61  * with an optional trailing '-' followed by a byte value (0-255).
62  */
63 #define HPSA_DRIVER_VERSION "3.4.20-0"
64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
65 #define HPSA "hpsa"
66
67 /* How long to wait for CISS doorbell communication */
68 #define CLEAR_EVENT_WAIT_INTERVAL 20    /* ms for each msleep() call */
69 #define MODE_CHANGE_WAIT_INTERVAL 10    /* ms for each msleep() call */
70 #define MAX_CLEAR_EVENT_WAIT 30000      /* times 20 ms = 600 s */
71 #define MAX_MODE_CHANGE_WAIT 2000       /* times 10 ms = 20 s */
72 #define MAX_IOCTL_CONFIG_WAIT 1000
73
74 /*define how many times we will try a command because of bus resets */
75 #define MAX_CMD_RETRIES 3
76
77 /* Embedded module documentation macros - see modules.h */
78 MODULE_AUTHOR("Hewlett-Packard Company");
79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
80         HPSA_DRIVER_VERSION);
81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
82 MODULE_VERSION(HPSA_DRIVER_VERSION);
83 MODULE_LICENSE("GPL");
84 MODULE_ALIAS("cciss");
85
86 static int hpsa_simple_mode;
87 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
88 MODULE_PARM_DESC(hpsa_simple_mode,
89         "Use 'simple mode' rather than 'performant mode'");
90
91 /* define the PCI info for the cards we can control */
92 static const struct pci_device_id hpsa_pci_device_id[] = {
93         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
94         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
95         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
96         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
97         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
98         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
99         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
100         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
101         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
102         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
107         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
108         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103c, 0x1920},
109         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
110         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
111         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
112         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
113         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103c, 0x1925},
114         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
115         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
116         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
117         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
118         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
119         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
120         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
121         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
122         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
123         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
124         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
125         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
126         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
127         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
128         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
129         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
130         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
131         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
132         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
133         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
134         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
135         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
136         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
137         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
138         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
139         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
140         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
141         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
142         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
143         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
144         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
145         {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
146         {PCI_VENDOR_ID_HP,     PCI_ANY_ID,      PCI_ANY_ID, PCI_ANY_ID,
147                 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
148         {PCI_VENDOR_ID_COMPAQ,     PCI_ANY_ID,  PCI_ANY_ID, PCI_ANY_ID,
149                 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
150         {0,}
151 };
152
153 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
154
155 /*  board_id = Subsystem Device ID & Vendor ID
156  *  product = Marketing Name for the board
157  *  access = Address of the struct of function pointers
158  */
159 static struct board_type products[] = {
160         {0x40700E11, "Smart Array 5300", &SA5A_access},
161         {0x40800E11, "Smart Array 5i", &SA5B_access},
162         {0x40820E11, "Smart Array 532", &SA5B_access},
163         {0x40830E11, "Smart Array 5312", &SA5B_access},
164         {0x409A0E11, "Smart Array 641", &SA5A_access},
165         {0x409B0E11, "Smart Array 642", &SA5A_access},
166         {0x409C0E11, "Smart Array 6400", &SA5A_access},
167         {0x409D0E11, "Smart Array 6400 EM", &SA5A_access},
168         {0x40910E11, "Smart Array 6i", &SA5A_access},
169         {0x3225103C, "Smart Array P600", &SA5A_access},
170         {0x3223103C, "Smart Array P800", &SA5A_access},
171         {0x3234103C, "Smart Array P400", &SA5A_access},
172         {0x3235103C, "Smart Array P400i", &SA5A_access},
173         {0x3211103C, "Smart Array E200i", &SA5A_access},
174         {0x3212103C, "Smart Array E200", &SA5A_access},
175         {0x3213103C, "Smart Array E200i", &SA5A_access},
176         {0x3214103C, "Smart Array E200i", &SA5A_access},
177         {0x3215103C, "Smart Array E200i", &SA5A_access},
178         {0x3237103C, "Smart Array E500", &SA5A_access},
179         {0x323D103C, "Smart Array P700m", &SA5A_access},
180         {0x3241103C, "Smart Array P212", &SA5_access},
181         {0x3243103C, "Smart Array P410", &SA5_access},
182         {0x3245103C, "Smart Array P410i", &SA5_access},
183         {0x3247103C, "Smart Array P411", &SA5_access},
184         {0x3249103C, "Smart Array P812", &SA5_access},
185         {0x324A103C, "Smart Array P712m", &SA5_access},
186         {0x324B103C, "Smart Array P711m", &SA5_access},
187         {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
188         {0x3350103C, "Smart Array P222", &SA5_access},
189         {0x3351103C, "Smart Array P420", &SA5_access},
190         {0x3352103C, "Smart Array P421", &SA5_access},
191         {0x3353103C, "Smart Array P822", &SA5_access},
192         {0x3354103C, "Smart Array P420i", &SA5_access},
193         {0x3355103C, "Smart Array P220i", &SA5_access},
194         {0x3356103C, "Smart Array P721m", &SA5_access},
195         {0x1920103C, "Smart Array P430i", &SA5_access},
196         {0x1921103C, "Smart Array P830i", &SA5_access},
197         {0x1922103C, "Smart Array P430", &SA5_access},
198         {0x1923103C, "Smart Array P431", &SA5_access},
199         {0x1924103C, "Smart Array P830", &SA5_access},
200         {0x1925103C, "Smart Array P831", &SA5_access},
201         {0x1926103C, "Smart Array P731m", &SA5_access},
202         {0x1928103C, "Smart Array P230i", &SA5_access},
203         {0x1929103C, "Smart Array P530", &SA5_access},
204         {0x21BD103C, "Smart Array P244br", &SA5_access},
205         {0x21BE103C, "Smart Array P741m", &SA5_access},
206         {0x21BF103C, "Smart HBA H240ar", &SA5_access},
207         {0x21C0103C, "Smart Array P440ar", &SA5_access},
208         {0x21C1103C, "Smart Array P840ar", &SA5_access},
209         {0x21C2103C, "Smart Array P440", &SA5_access},
210         {0x21C3103C, "Smart Array P441", &SA5_access},
211         {0x21C4103C, "Smart Array", &SA5_access},
212         {0x21C5103C, "Smart Array P841", &SA5_access},
213         {0x21C6103C, "Smart HBA H244br", &SA5_access},
214         {0x21C7103C, "Smart HBA H240", &SA5_access},
215         {0x21C8103C, "Smart HBA H241", &SA5_access},
216         {0x21C9103C, "Smart Array", &SA5_access},
217         {0x21CA103C, "Smart Array P246br", &SA5_access},
218         {0x21CB103C, "Smart Array P840", &SA5_access},
219         {0x21CC103C, "Smart Array", &SA5_access},
220         {0x21CD103C, "Smart Array", &SA5_access},
221         {0x21CE103C, "Smart HBA", &SA5_access},
222         {0x05809005, "SmartHBA-SA", &SA5_access},
223         {0x05819005, "SmartHBA-SA 8i", &SA5_access},
224         {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
225         {0x05839005, "SmartHBA-SA 8e", &SA5_access},
226         {0x05849005, "SmartHBA-SA 16i", &SA5_access},
227         {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
228         {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
229         {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
230         {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
231         {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
232         {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
233         {0xFFFF103C, "Unknown Smart Array", &SA5_access},
234 };
235
236 static struct scsi_transport_template *hpsa_sas_transport_template;
237 static int hpsa_add_sas_host(struct ctlr_info *h);
238 static void hpsa_delete_sas_host(struct ctlr_info *h);
239 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
240                         struct hpsa_scsi_dev_t *device);
241 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
242 static struct hpsa_scsi_dev_t
243         *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
244                 struct sas_rphy *rphy);
245
246 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
247 static const struct scsi_cmnd hpsa_cmd_busy;
248 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
249 static const struct scsi_cmnd hpsa_cmd_idle;
250 static int number_of_controllers;
251
252 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
253 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
254 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
255
256 #ifdef CONFIG_COMPAT
257 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
258         void __user *arg);
259 #endif
260
261 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
262 static struct CommandList *cmd_alloc(struct ctlr_info *h);
263 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
264 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
265                                             struct scsi_cmnd *scmd);
266 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
267         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
268         int cmd_type);
269 static void hpsa_free_cmd_pool(struct ctlr_info *h);
270 #define VPD_PAGE (1 << 8)
271 #define HPSA_SIMPLE_ERROR_BITS 0x03
272
273 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
274 static void hpsa_scan_start(struct Scsi_Host *);
275 static int hpsa_scan_finished(struct Scsi_Host *sh,
276         unsigned long elapsed_time);
277 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
278
279 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
280 static int hpsa_slave_alloc(struct scsi_device *sdev);
281 static int hpsa_slave_configure(struct scsi_device *sdev);
282 static void hpsa_slave_destroy(struct scsi_device *sdev);
283
284 static void hpsa_update_scsi_devices(struct ctlr_info *h);
285 static int check_for_unit_attention(struct ctlr_info *h,
286         struct CommandList *c);
287 static void check_ioctl_unit_attention(struct ctlr_info *h,
288         struct CommandList *c);
289 /* performant mode helper functions */
290 static void calc_bucket_map(int *bucket, int num_buckets,
291         int nsgs, int min_blocks, u32 *bucket_map);
292 static void hpsa_free_performant_mode(struct ctlr_info *h);
293 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
294 static inline u32 next_command(struct ctlr_info *h, u8 q);
295 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
296                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
297                                u64 *cfg_offset);
298 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
299                                     unsigned long *memory_bar);
300 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
301                                 bool *legacy_board);
302 static int wait_for_device_to_become_ready(struct ctlr_info *h,
303                                            unsigned char lunaddr[],
304                                            int reply_queue);
305 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
306                                      int wait_for_ready);
307 static inline void finish_cmd(struct CommandList *c);
308 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
309 #define BOARD_NOT_READY 0
310 #define BOARD_READY 1
311 static void hpsa_drain_accel_commands(struct ctlr_info *h);
312 static void hpsa_flush_cache(struct ctlr_info *h);
313 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
314         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
315         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
316 static void hpsa_command_resubmit_worker(struct work_struct *work);
317 static u32 lockup_detected(struct ctlr_info *h);
318 static int detect_controller_lockup(struct ctlr_info *h);
319 static void hpsa_disable_rld_caching(struct ctlr_info *h);
320 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
321         struct ReportExtendedLUNdata *buf, int bufsize);
322 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
323         unsigned char scsi3addr[], u8 page);
324 static int hpsa_luns_changed(struct ctlr_info *h);
325 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
326                                struct hpsa_scsi_dev_t *dev,
327                                unsigned char *scsi3addr);
328
329 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
330 {
331         unsigned long *priv = shost_priv(sdev->host);
332         return (struct ctlr_info *) *priv;
333 }
334
335 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
336 {
337         unsigned long *priv = shost_priv(sh);
338         return (struct ctlr_info *) *priv;
339 }
340
341 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
342 {
343         return c->scsi_cmd == SCSI_CMD_IDLE;
344 }
345
346 static inline bool hpsa_is_pending_event(struct CommandList *c)
347 {
348         return c->reset_pending;
349 }
350
351 /* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
352 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
353                         u8 *sense_key, u8 *asc, u8 *ascq)
354 {
355         struct scsi_sense_hdr sshdr;
356         bool rc;
357
358         *sense_key = -1;
359         *asc = -1;
360         *ascq = -1;
361
362         if (sense_data_len < 1)
363                 return;
364
365         rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
366         if (rc) {
367                 *sense_key = sshdr.sense_key;
368                 *asc = sshdr.asc;
369                 *ascq = sshdr.ascq;
370         }
371 }
372
373 static int check_for_unit_attention(struct ctlr_info *h,
374         struct CommandList *c)
375 {
376         u8 sense_key, asc, ascq;
377         int sense_len;
378
379         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
380                 sense_len = sizeof(c->err_info->SenseInfo);
381         else
382                 sense_len = c->err_info->SenseLen;
383
384         decode_sense_data(c->err_info->SenseInfo, sense_len,
385                                 &sense_key, &asc, &ascq);
386         if (sense_key != UNIT_ATTENTION || asc == 0xff)
387                 return 0;
388
389         switch (asc) {
390         case STATE_CHANGED:
391                 dev_warn(&h->pdev->dev,
392                         "%s: a state change detected, command retried\n",
393                         h->devname);
394                 break;
395         case LUN_FAILED:
396                 dev_warn(&h->pdev->dev,
397                         "%s: LUN failure detected\n", h->devname);
398                 break;
399         case REPORT_LUNS_CHANGED:
400                 dev_warn(&h->pdev->dev,
401                         "%s: report LUN data changed\n", h->devname);
402         /*
403          * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
404          * target (array) devices.
405          */
406                 break;
407         case POWER_OR_RESET:
408                 dev_warn(&h->pdev->dev,
409                         "%s: a power on or device reset detected\n",
410                         h->devname);
411                 break;
412         case UNIT_ATTENTION_CLEARED:
413                 dev_warn(&h->pdev->dev,
414                         "%s: unit attention cleared by another initiator\n",
415                         h->devname);
416                 break;
417         default:
418                 dev_warn(&h->pdev->dev,
419                         "%s: unknown unit attention detected\n",
420                         h->devname);
421                 break;
422         }
423         return 1;
424 }
425
426 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
427 {
428         if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
429                 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
430                  c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
431                 return 0;
432         dev_warn(&h->pdev->dev, HPSA "device busy");
433         return 1;
434 }
435
436 static u32 lockup_detected(struct ctlr_info *h);
437 static ssize_t host_show_lockup_detected(struct device *dev,
438                 struct device_attribute *attr, char *buf)
439 {
440         int ld;
441         struct ctlr_info *h;
442         struct Scsi_Host *shost = class_to_shost(dev);
443
444         h = shost_to_hba(shost);
445         ld = lockup_detected(h);
446
447         return sprintf(buf, "ld=%d\n", ld);
448 }
449
450 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
451                                          struct device_attribute *attr,
452                                          const char *buf, size_t count)
453 {
454         int status, len;
455         struct ctlr_info *h;
456         struct Scsi_Host *shost = class_to_shost(dev);
457         char tmpbuf[10];
458
459         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
460                 return -EACCES;
461         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
462         strncpy(tmpbuf, buf, len);
463         tmpbuf[len] = '\0';
464         if (sscanf(tmpbuf, "%d", &status) != 1)
465                 return -EINVAL;
466         h = shost_to_hba(shost);
467         h->acciopath_status = !!status;
468         dev_warn(&h->pdev->dev,
469                 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
470                 h->acciopath_status ? "enabled" : "disabled");
471         return count;
472 }
473
474 static ssize_t host_store_raid_offload_debug(struct device *dev,
475                                          struct device_attribute *attr,
476                                          const char *buf, size_t count)
477 {
478         int debug_level, len;
479         struct ctlr_info *h;
480         struct Scsi_Host *shost = class_to_shost(dev);
481         char tmpbuf[10];
482
483         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
484                 return -EACCES;
485         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
486         strncpy(tmpbuf, buf, len);
487         tmpbuf[len] = '\0';
488         if (sscanf(tmpbuf, "%d", &debug_level) != 1)
489                 return -EINVAL;
490         if (debug_level < 0)
491                 debug_level = 0;
492         h = shost_to_hba(shost);
493         h->raid_offload_debug = debug_level;
494         dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
495                 h->raid_offload_debug);
496         return count;
497 }
498
499 static ssize_t host_store_rescan(struct device *dev,
500                                  struct device_attribute *attr,
501                                  const char *buf, size_t count)
502 {
503         struct ctlr_info *h;
504         struct Scsi_Host *shost = class_to_shost(dev);
505         h = shost_to_hba(shost);
506         hpsa_scan_start(h->scsi_host);
507         return count;
508 }
509
510 static ssize_t host_show_firmware_revision(struct device *dev,
511              struct device_attribute *attr, char *buf)
512 {
513         struct ctlr_info *h;
514         struct Scsi_Host *shost = class_to_shost(dev);
515         unsigned char *fwrev;
516
517         h = shost_to_hba(shost);
518         if (!h->hba_inquiry_data)
519                 return 0;
520         fwrev = &h->hba_inquiry_data[32];
521         return snprintf(buf, 20, "%c%c%c%c\n",
522                 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
523 }
524
525 static ssize_t host_show_commands_outstanding(struct device *dev,
526              struct device_attribute *attr, char *buf)
527 {
528         struct Scsi_Host *shost = class_to_shost(dev);
529         struct ctlr_info *h = shost_to_hba(shost);
530
531         return snprintf(buf, 20, "%d\n",
532                         atomic_read(&h->commands_outstanding));
533 }
534
535 static ssize_t host_show_transport_mode(struct device *dev,
536         struct device_attribute *attr, char *buf)
537 {
538         struct ctlr_info *h;
539         struct Scsi_Host *shost = class_to_shost(dev);
540
541         h = shost_to_hba(shost);
542         return snprintf(buf, 20, "%s\n",
543                 h->transMethod & CFGTBL_Trans_Performant ?
544                         "performant" : "simple");
545 }
546
547 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
548         struct device_attribute *attr, char *buf)
549 {
550         struct ctlr_info *h;
551         struct Scsi_Host *shost = class_to_shost(dev);
552
553         h = shost_to_hba(shost);
554         return snprintf(buf, 30, "HP SSD Smart Path %s\n",
555                 (h->acciopath_status == 1) ?  "enabled" : "disabled");
556 }
557
558 /* List of controllers which cannot be hard reset on kexec with reset_devices */
559 static u32 unresettable_controller[] = {
560         0x324a103C, /* Smart Array P712m */
561         0x324b103C, /* Smart Array P711m */
562         0x3223103C, /* Smart Array P800 */
563         0x3234103C, /* Smart Array P400 */
564         0x3235103C, /* Smart Array P400i */
565         0x3211103C, /* Smart Array E200i */
566         0x3212103C, /* Smart Array E200 */
567         0x3213103C, /* Smart Array E200i */
568         0x3214103C, /* Smart Array E200i */
569         0x3215103C, /* Smart Array E200i */
570         0x3237103C, /* Smart Array E500 */
571         0x323D103C, /* Smart Array P700m */
572         0x40800E11, /* Smart Array 5i */
573         0x409C0E11, /* Smart Array 6400 */
574         0x409D0E11, /* Smart Array 6400 EM */
575         0x40700E11, /* Smart Array 5300 */
576         0x40820E11, /* Smart Array 532 */
577         0x40830E11, /* Smart Array 5312 */
578         0x409A0E11, /* Smart Array 641 */
579         0x409B0E11, /* Smart Array 642 */
580         0x40910E11, /* Smart Array 6i */
581 };
582
583 /* List of controllers which cannot even be soft reset */
584 static u32 soft_unresettable_controller[] = {
585         0x40800E11, /* Smart Array 5i */
586         0x40700E11, /* Smart Array 5300 */
587         0x40820E11, /* Smart Array 532 */
588         0x40830E11, /* Smart Array 5312 */
589         0x409A0E11, /* Smart Array 641 */
590         0x409B0E11, /* Smart Array 642 */
591         0x40910E11, /* Smart Array 6i */
592         /* Exclude 640x boards.  These are two pci devices in one slot
593          * which share a battery backed cache module.  One controls the
594          * cache, the other accesses the cache through the one that controls
595          * it.  If we reset the one controlling the cache, the other will
596          * likely not be happy.  Just forbid resetting this conjoined mess.
597          * The 640x isn't really supported by hpsa anyway.
598          */
599         0x409C0E11, /* Smart Array 6400 */
600         0x409D0E11, /* Smart Array 6400 EM */
601 };
602
603 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
604 {
605         int i;
606
607         for (i = 0; i < nelems; i++)
608                 if (a[i] == board_id)
609                         return 1;
610         return 0;
611 }
612
613 static int ctlr_is_hard_resettable(u32 board_id)
614 {
615         return !board_id_in_array(unresettable_controller,
616                         ARRAY_SIZE(unresettable_controller), board_id);
617 }
618
619 static int ctlr_is_soft_resettable(u32 board_id)
620 {
621         return !board_id_in_array(soft_unresettable_controller,
622                         ARRAY_SIZE(soft_unresettable_controller), board_id);
623 }
624
625 static int ctlr_is_resettable(u32 board_id)
626 {
627         return ctlr_is_hard_resettable(board_id) ||
628                 ctlr_is_soft_resettable(board_id);
629 }
630
631 static ssize_t host_show_resettable(struct device *dev,
632         struct device_attribute *attr, char *buf)
633 {
634         struct ctlr_info *h;
635         struct Scsi_Host *shost = class_to_shost(dev);
636
637         h = shost_to_hba(shost);
638         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
639 }
640
641 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
642 {
643         return (scsi3addr[3] & 0xC0) == 0x40;
644 }
645
646 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
647         "1(+0)ADM", "UNKNOWN", "PHYS DRV"
648 };
649 #define HPSA_RAID_0     0
650 #define HPSA_RAID_4     1
651 #define HPSA_RAID_1     2       /* also used for RAID 10 */
652 #define HPSA_RAID_5     3       /* also used for RAID 50 */
653 #define HPSA_RAID_51    4
654 #define HPSA_RAID_6     5       /* also used for RAID 60 */
655 #define HPSA_RAID_ADM   6       /* also used for RAID 1+0 ADM */
656 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
657 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
658
659 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
660 {
661         return !device->physical_device;
662 }
663
664 static ssize_t raid_level_show(struct device *dev,
665              struct device_attribute *attr, char *buf)
666 {
667         ssize_t l = 0;
668         unsigned char rlevel;
669         struct ctlr_info *h;
670         struct scsi_device *sdev;
671         struct hpsa_scsi_dev_t *hdev;
672         unsigned long flags;
673
674         sdev = to_scsi_device(dev);
675         h = sdev_to_hba(sdev);
676         spin_lock_irqsave(&h->lock, flags);
677         hdev = sdev->hostdata;
678         if (!hdev) {
679                 spin_unlock_irqrestore(&h->lock, flags);
680                 return -ENODEV;
681         }
682
683         /* Is this even a logical drive? */
684         if (!is_logical_device(hdev)) {
685                 spin_unlock_irqrestore(&h->lock, flags);
686                 l = snprintf(buf, PAGE_SIZE, "N/A\n");
687                 return l;
688         }
689
690         rlevel = hdev->raid_level;
691         spin_unlock_irqrestore(&h->lock, flags);
692         if (rlevel > RAID_UNKNOWN)
693                 rlevel = RAID_UNKNOWN;
694         l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
695         return l;
696 }
697
698 static ssize_t lunid_show(struct device *dev,
699              struct device_attribute *attr, char *buf)
700 {
701         struct ctlr_info *h;
702         struct scsi_device *sdev;
703         struct hpsa_scsi_dev_t *hdev;
704         unsigned long flags;
705         unsigned char lunid[8];
706
707         sdev = to_scsi_device(dev);
708         h = sdev_to_hba(sdev);
709         spin_lock_irqsave(&h->lock, flags);
710         hdev = sdev->hostdata;
711         if (!hdev) {
712                 spin_unlock_irqrestore(&h->lock, flags);
713                 return -ENODEV;
714         }
715         memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
716         spin_unlock_irqrestore(&h->lock, flags);
717         return snprintf(buf, 20, "0x%8phN\n", lunid);
718 }
719
720 static ssize_t unique_id_show(struct device *dev,
721              struct device_attribute *attr, char *buf)
722 {
723         struct ctlr_info *h;
724         struct scsi_device *sdev;
725         struct hpsa_scsi_dev_t *hdev;
726         unsigned long flags;
727         unsigned char sn[16];
728
729         sdev = to_scsi_device(dev);
730         h = sdev_to_hba(sdev);
731         spin_lock_irqsave(&h->lock, flags);
732         hdev = sdev->hostdata;
733         if (!hdev) {
734                 spin_unlock_irqrestore(&h->lock, flags);
735                 return -ENODEV;
736         }
737         memcpy(sn, hdev->device_id, sizeof(sn));
738         spin_unlock_irqrestore(&h->lock, flags);
739         return snprintf(buf, 16 * 2 + 2,
740                         "%02X%02X%02X%02X%02X%02X%02X%02X"
741                         "%02X%02X%02X%02X%02X%02X%02X%02X\n",
742                         sn[0], sn[1], sn[2], sn[3],
743                         sn[4], sn[5], sn[6], sn[7],
744                         sn[8], sn[9], sn[10], sn[11],
745                         sn[12], sn[13], sn[14], sn[15]);
746 }
747
748 static ssize_t sas_address_show(struct device *dev,
749               struct device_attribute *attr, char *buf)
750 {
751         struct ctlr_info *h;
752         struct scsi_device *sdev;
753         struct hpsa_scsi_dev_t *hdev;
754         unsigned long flags;
755         u64 sas_address;
756
757         sdev = to_scsi_device(dev);
758         h = sdev_to_hba(sdev);
759         spin_lock_irqsave(&h->lock, flags);
760         hdev = sdev->hostdata;
761         if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
762                 spin_unlock_irqrestore(&h->lock, flags);
763                 return -ENODEV;
764         }
765         sas_address = hdev->sas_address;
766         spin_unlock_irqrestore(&h->lock, flags);
767
768         return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
769 }
770
771 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
772              struct device_attribute *attr, char *buf)
773 {
774         struct ctlr_info *h;
775         struct scsi_device *sdev;
776         struct hpsa_scsi_dev_t *hdev;
777         unsigned long flags;
778         int offload_enabled;
779
780         sdev = to_scsi_device(dev);
781         h = sdev_to_hba(sdev);
782         spin_lock_irqsave(&h->lock, flags);
783         hdev = sdev->hostdata;
784         if (!hdev) {
785                 spin_unlock_irqrestore(&h->lock, flags);
786                 return -ENODEV;
787         }
788         offload_enabled = hdev->offload_enabled;
789         spin_unlock_irqrestore(&h->lock, flags);
790         return snprintf(buf, 20, "%d\n", offload_enabled);
791 }
792
793 #define MAX_PATHS 8
794 static ssize_t path_info_show(struct device *dev,
795              struct device_attribute *attr, char *buf)
796 {
797         struct ctlr_info *h;
798         struct scsi_device *sdev;
799         struct hpsa_scsi_dev_t *hdev;
800         unsigned long flags;
801         int i;
802         int output_len = 0;
803         u8 box;
804         u8 bay;
805         u8 path_map_index = 0;
806         char *active;
807         unsigned char phys_connector[2];
808
809         sdev = to_scsi_device(dev);
810         h = sdev_to_hba(sdev);
811         spin_lock_irqsave(&h->devlock, flags);
812         hdev = sdev->hostdata;
813         if (!hdev) {
814                 spin_unlock_irqrestore(&h->devlock, flags);
815                 return -ENODEV;
816         }
817
818         bay = hdev->bay;
819         for (i = 0; i < MAX_PATHS; i++) {
820                 path_map_index = 1<<i;
821                 if (i == hdev->active_path_index)
822                         active = "Active";
823                 else if (hdev->path_map & path_map_index)
824                         active = "Inactive";
825                 else
826                         continue;
827
828                 output_len += scnprintf(buf + output_len,
829                                 PAGE_SIZE - output_len,
830                                 "[%d:%d:%d:%d] %20.20s ",
831                                 h->scsi_host->host_no,
832                                 hdev->bus, hdev->target, hdev->lun,
833                                 scsi_device_type(hdev->devtype));
834
835                 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
836                         output_len += scnprintf(buf + output_len,
837                                                 PAGE_SIZE - output_len,
838                                                 "%s\n", active);
839                         continue;
840                 }
841
842                 box = hdev->box[i];
843                 memcpy(&phys_connector, &hdev->phys_connector[i],
844                         sizeof(phys_connector));
845                 if (phys_connector[0] < '0')
846                         phys_connector[0] = '0';
847                 if (phys_connector[1] < '0')
848                         phys_connector[1] = '0';
849                 output_len += scnprintf(buf + output_len,
850                                 PAGE_SIZE - output_len,
851                                 "PORT: %.2s ",
852                                 phys_connector);
853                 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
854                         hdev->expose_device) {
855                         if (box == 0 || box == 0xFF) {
856                                 output_len += scnprintf(buf + output_len,
857                                         PAGE_SIZE - output_len,
858                                         "BAY: %hhu %s\n",
859                                         bay, active);
860                         } else {
861                                 output_len += scnprintf(buf + output_len,
862                                         PAGE_SIZE - output_len,
863                                         "BOX: %hhu BAY: %hhu %s\n",
864                                         box, bay, active);
865                         }
866                 } else if (box != 0 && box != 0xFF) {
867                         output_len += scnprintf(buf + output_len,
868                                 PAGE_SIZE - output_len, "BOX: %hhu %s\n",
869                                 box, active);
870                 } else
871                         output_len += scnprintf(buf + output_len,
872                                 PAGE_SIZE - output_len, "%s\n", active);
873         }
874
875         spin_unlock_irqrestore(&h->devlock, flags);
876         return output_len;
877 }
878
879 static ssize_t host_show_ctlr_num(struct device *dev,
880         struct device_attribute *attr, char *buf)
881 {
882         struct ctlr_info *h;
883         struct Scsi_Host *shost = class_to_shost(dev);
884
885         h = shost_to_hba(shost);
886         return snprintf(buf, 20, "%d\n", h->ctlr);
887 }
888
889 static ssize_t host_show_legacy_board(struct device *dev,
890         struct device_attribute *attr, char *buf)
891 {
892         struct ctlr_info *h;
893         struct Scsi_Host *shost = class_to_shost(dev);
894
895         h = shost_to_hba(shost);
896         return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0);
897 }
898
899 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
900 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
901 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
902 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
903 static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL);
904 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
905                         host_show_hp_ssd_smart_path_enabled, NULL);
906 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL);
907 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
908                 host_show_hp_ssd_smart_path_status,
909                 host_store_hp_ssd_smart_path_status);
910 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
911                         host_store_raid_offload_debug);
912 static DEVICE_ATTR(firmware_revision, S_IRUGO,
913         host_show_firmware_revision, NULL);
914 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
915         host_show_commands_outstanding, NULL);
916 static DEVICE_ATTR(transport_mode, S_IRUGO,
917         host_show_transport_mode, NULL);
918 static DEVICE_ATTR(resettable, S_IRUGO,
919         host_show_resettable, NULL);
920 static DEVICE_ATTR(lockup_detected, S_IRUGO,
921         host_show_lockup_detected, NULL);
922 static DEVICE_ATTR(ctlr_num, S_IRUGO,
923         host_show_ctlr_num, NULL);
924 static DEVICE_ATTR(legacy_board, S_IRUGO,
925         host_show_legacy_board, NULL);
926
927 static struct device_attribute *hpsa_sdev_attrs[] = {
928         &dev_attr_raid_level,
929         &dev_attr_lunid,
930         &dev_attr_unique_id,
931         &dev_attr_hp_ssd_smart_path_enabled,
932         &dev_attr_path_info,
933         &dev_attr_sas_address,
934         NULL,
935 };
936
937 static struct device_attribute *hpsa_shost_attrs[] = {
938         &dev_attr_rescan,
939         &dev_attr_firmware_revision,
940         &dev_attr_commands_outstanding,
941         &dev_attr_transport_mode,
942         &dev_attr_resettable,
943         &dev_attr_hp_ssd_smart_path_status,
944         &dev_attr_raid_offload_debug,
945         &dev_attr_lockup_detected,
946         &dev_attr_ctlr_num,
947         &dev_attr_legacy_board,
948         NULL,
949 };
950
951 #define HPSA_NRESERVED_CMDS     (HPSA_CMDS_RESERVED_FOR_DRIVER +\
952                                  HPSA_MAX_CONCURRENT_PASSTHRUS)
953
954 static struct scsi_host_template hpsa_driver_template = {
955         .module                 = THIS_MODULE,
956         .name                   = HPSA,
957         .proc_name              = HPSA,
958         .queuecommand           = hpsa_scsi_queue_command,
959         .scan_start             = hpsa_scan_start,
960         .scan_finished          = hpsa_scan_finished,
961         .change_queue_depth     = hpsa_change_queue_depth,
962         .this_id                = -1,
963         .use_clustering         = ENABLE_CLUSTERING,
964         .eh_device_reset_handler = hpsa_eh_device_reset_handler,
965         .ioctl                  = hpsa_ioctl,
966         .slave_alloc            = hpsa_slave_alloc,
967         .slave_configure        = hpsa_slave_configure,
968         .slave_destroy          = hpsa_slave_destroy,
969 #ifdef CONFIG_COMPAT
970         .compat_ioctl           = hpsa_compat_ioctl,
971 #endif
972         .sdev_attrs = hpsa_sdev_attrs,
973         .shost_attrs = hpsa_shost_attrs,
974         .max_sectors = 1024,
975         .no_write_same = 1,
976 };
977
978 static inline u32 next_command(struct ctlr_info *h, u8 q)
979 {
980         u32 a;
981         struct reply_queue_buffer *rq = &h->reply_queue[q];
982
983         if (h->transMethod & CFGTBL_Trans_io_accel1)
984                 return h->access.command_completed(h, q);
985
986         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
987                 return h->access.command_completed(h, q);
988
989         if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
990                 a = rq->head[rq->current_entry];
991                 rq->current_entry++;
992                 atomic_dec(&h->commands_outstanding);
993         } else {
994                 a = FIFO_EMPTY;
995         }
996         /* Check for wraparound */
997         if (rq->current_entry == h->max_commands) {
998                 rq->current_entry = 0;
999                 rq->wraparound ^= 1;
1000         }
1001         return a;
1002 }
1003
1004 /*
1005  * There are some special bits in the bus address of the
1006  * command that we have to set for the controller to know
1007  * how to process the command:
1008  *
1009  * Normal performant mode:
1010  * bit 0: 1 means performant mode, 0 means simple mode.
1011  * bits 1-3 = block fetch table entry
1012  * bits 4-6 = command type (== 0)
1013  *
1014  * ioaccel1 mode:
1015  * bit 0 = "performant mode" bit.
1016  * bits 1-3 = block fetch table entry
1017  * bits 4-6 = command type (== 110)
1018  * (command type is needed because ioaccel1 mode
1019  * commands are submitted through the same register as normal
1020  * mode commands, so this is how the controller knows whether
1021  * the command is normal mode or ioaccel1 mode.)
1022  *
1023  * ioaccel2 mode:
1024  * bit 0 = "performant mode" bit.
1025  * bits 1-4 = block fetch table entry (note extra bit)
1026  * bits 4-6 = not needed, because ioaccel2 mode has
1027  * a separate special register for submitting commands.
1028  */
1029
1030 /*
1031  * set_performant_mode: Modify the tag for cciss performant
1032  * set bit 0 for pull model, bits 3-1 for block fetch
1033  * register number
1034  */
1035 #define DEFAULT_REPLY_QUEUE (-1)
1036 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
1037                                         int reply_queue)
1038 {
1039         if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
1040                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1041                 if (unlikely(!h->msix_vectors))
1042                         return;
1043                 c->Header.ReplyQueue = reply_queue;
1044         }
1045 }
1046
1047 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
1048                                                 struct CommandList *c,
1049                                                 int reply_queue)
1050 {
1051         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1052
1053         /*
1054          * Tell the controller to post the reply to the queue for this
1055          * processor.  This seems to give the best I/O throughput.
1056          */
1057         cp->ReplyQueue = reply_queue;
1058         /*
1059          * Set the bits in the address sent down to include:
1060          *  - performant mode bit (bit 0)
1061          *  - pull count (bits 1-3)
1062          *  - command type (bits 4-6)
1063          */
1064         c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1065                                         IOACCEL1_BUSADDR_CMDTYPE;
1066 }
1067
1068 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1069                                                 struct CommandList *c,
1070                                                 int reply_queue)
1071 {
1072         struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1073                 &h->ioaccel2_cmd_pool[c->cmdindex];
1074
1075         /* Tell the controller to post the reply to the queue for this
1076          * processor.  This seems to give the best I/O throughput.
1077          */
1078         cp->reply_queue = reply_queue;
1079         /* Set the bits in the address sent down to include:
1080          *  - performant mode bit not used in ioaccel mode 2
1081          *  - pull count (bits 0-3)
1082          *  - command type isn't needed for ioaccel2
1083          */
1084         c->busaddr |= h->ioaccel2_blockFetchTable[0];
1085 }
1086
1087 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1088                                                 struct CommandList *c,
1089                                                 int reply_queue)
1090 {
1091         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1092
1093         /*
1094          * Tell the controller to post the reply to the queue for this
1095          * processor.  This seems to give the best I/O throughput.
1096          */
1097         cp->reply_queue = reply_queue;
1098         /*
1099          * Set the bits in the address sent down to include:
1100          *  - performant mode bit not used in ioaccel mode 2
1101          *  - pull count (bits 0-3)
1102          *  - command type isn't needed for ioaccel2
1103          */
1104         c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1105 }
1106
1107 static int is_firmware_flash_cmd(u8 *cdb)
1108 {
1109         return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1110 }
1111
1112 /*
1113  * During firmware flash, the heartbeat register may not update as frequently
1114  * as it should.  So we dial down lockup detection during firmware flash. and
1115  * dial it back up when firmware flash completes.
1116  */
1117 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1118 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1119 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ)
1120 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1121                 struct CommandList *c)
1122 {
1123         if (!is_firmware_flash_cmd(c->Request.CDB))
1124                 return;
1125         atomic_inc(&h->firmware_flash_in_progress);
1126         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1127 }
1128
1129 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1130                 struct CommandList *c)
1131 {
1132         if (is_firmware_flash_cmd(c->Request.CDB) &&
1133                 atomic_dec_and_test(&h->firmware_flash_in_progress))
1134                 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1135 }
1136
1137 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1138         struct CommandList *c, int reply_queue)
1139 {
1140         dial_down_lockup_detection_during_fw_flash(h, c);
1141         atomic_inc(&h->commands_outstanding);
1142
1143         reply_queue = h->reply_map[raw_smp_processor_id()];
1144         switch (c->cmd_type) {
1145         case CMD_IOACCEL1:
1146                 set_ioaccel1_performant_mode(h, c, reply_queue);
1147                 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1148                 break;
1149         case CMD_IOACCEL2:
1150                 set_ioaccel2_performant_mode(h, c, reply_queue);
1151                 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1152                 break;
1153         case IOACCEL2_TMF:
1154                 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1155                 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1156                 break;
1157         default:
1158                 set_performant_mode(h, c, reply_queue);
1159                 h->access.submit_command(h, c);
1160         }
1161 }
1162
1163 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1164 {
1165         if (unlikely(hpsa_is_pending_event(c)))
1166                 return finish_cmd(c);
1167
1168         __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1169 }
1170
1171 static inline int is_hba_lunid(unsigned char scsi3addr[])
1172 {
1173         return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1174 }
1175
1176 static inline int is_scsi_rev_5(struct ctlr_info *h)
1177 {
1178         if (!h->hba_inquiry_data)
1179                 return 0;
1180         if ((h->hba_inquiry_data[2] & 0x07) == 5)
1181                 return 1;
1182         return 0;
1183 }
1184
1185 static int hpsa_find_target_lun(struct ctlr_info *h,
1186         unsigned char scsi3addr[], int bus, int *target, int *lun)
1187 {
1188         /* finds an unused bus, target, lun for a new physical device
1189          * assumes h->devlock is held
1190          */
1191         int i, found = 0;
1192         DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1193
1194         bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1195
1196         for (i = 0; i < h->ndevices; i++) {
1197                 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1198                         __set_bit(h->dev[i]->target, lun_taken);
1199         }
1200
1201         i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1202         if (i < HPSA_MAX_DEVICES) {
1203                 /* *bus = 1; */
1204                 *target = i;
1205                 *lun = 0;
1206                 found = 1;
1207         }
1208         return !found;
1209 }
1210
1211 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1212         struct hpsa_scsi_dev_t *dev, char *description)
1213 {
1214 #define LABEL_SIZE 25
1215         char label[LABEL_SIZE];
1216
1217         if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1218                 return;
1219
1220         switch (dev->devtype) {
1221         case TYPE_RAID:
1222                 snprintf(label, LABEL_SIZE, "controller");
1223                 break;
1224         case TYPE_ENCLOSURE:
1225                 snprintf(label, LABEL_SIZE, "enclosure");
1226                 break;
1227         case TYPE_DISK:
1228         case TYPE_ZBC:
1229                 if (dev->external)
1230                         snprintf(label, LABEL_SIZE, "external");
1231                 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1232                         snprintf(label, LABEL_SIZE, "%s",
1233                                 raid_label[PHYSICAL_DRIVE]);
1234                 else
1235                         snprintf(label, LABEL_SIZE, "RAID-%s",
1236                                 dev->raid_level > RAID_UNKNOWN ? "?" :
1237                                 raid_label[dev->raid_level]);
1238                 break;
1239         case TYPE_ROM:
1240                 snprintf(label, LABEL_SIZE, "rom");
1241                 break;
1242         case TYPE_TAPE:
1243                 snprintf(label, LABEL_SIZE, "tape");
1244                 break;
1245         case TYPE_MEDIUM_CHANGER:
1246                 snprintf(label, LABEL_SIZE, "changer");
1247                 break;
1248         default:
1249                 snprintf(label, LABEL_SIZE, "UNKNOWN");
1250                 break;
1251         }
1252
1253         dev_printk(level, &h->pdev->dev,
1254                         "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1255                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1256                         description,
1257                         scsi_device_type(dev->devtype),
1258                         dev->vendor,
1259                         dev->model,
1260                         label,
1261                         dev->offload_config ? '+' : '-',
1262                         dev->offload_enabled ? '+' : '-',
1263                         dev->expose_device);
1264 }
1265
1266 /* Add an entry into h->dev[] array. */
1267 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1268                 struct hpsa_scsi_dev_t *device,
1269                 struct hpsa_scsi_dev_t *added[], int *nadded)
1270 {
1271         /* assumes h->devlock is held */
1272         int n = h->ndevices;
1273         int i;
1274         unsigned char addr1[8], addr2[8];
1275         struct hpsa_scsi_dev_t *sd;
1276
1277         if (n >= HPSA_MAX_DEVICES) {
1278                 dev_err(&h->pdev->dev, "too many devices, some will be "
1279                         "inaccessible.\n");
1280                 return -1;
1281         }
1282
1283         /* physical devices do not have lun or target assigned until now. */
1284         if (device->lun != -1)
1285                 /* Logical device, lun is already assigned. */
1286                 goto lun_assigned;
1287
1288         /* If this device a non-zero lun of a multi-lun device
1289          * byte 4 of the 8-byte LUN addr will contain the logical
1290          * unit no, zero otherwise.
1291          */
1292         if (device->scsi3addr[4] == 0) {
1293                 /* This is not a non-zero lun of a multi-lun device */
1294                 if (hpsa_find_target_lun(h, device->scsi3addr,
1295                         device->bus, &device->target, &device->lun) != 0)
1296                         return -1;
1297                 goto lun_assigned;
1298         }
1299
1300         /* This is a non-zero lun of a multi-lun device.
1301          * Search through our list and find the device which
1302          * has the same 8 byte LUN address, excepting byte 4 and 5.
1303          * Assign the same bus and target for this new LUN.
1304          * Use the logical unit number from the firmware.
1305          */
1306         memcpy(addr1, device->scsi3addr, 8);
1307         addr1[4] = 0;
1308         addr1[5] = 0;
1309         for (i = 0; i < n; i++) {
1310                 sd = h->dev[i];
1311                 memcpy(addr2, sd->scsi3addr, 8);
1312                 addr2[4] = 0;
1313                 addr2[5] = 0;
1314                 /* differ only in byte 4 and 5? */
1315                 if (memcmp(addr1, addr2, 8) == 0) {
1316                         device->bus = sd->bus;
1317                         device->target = sd->target;
1318                         device->lun = device->scsi3addr[4];
1319                         break;
1320                 }
1321         }
1322         if (device->lun == -1) {
1323                 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1324                         " suspect firmware bug or unsupported hardware "
1325                         "configuration.\n");
1326                         return -1;
1327         }
1328
1329 lun_assigned:
1330
1331         h->dev[n] = device;
1332         h->ndevices++;
1333         added[*nadded] = device;
1334         (*nadded)++;
1335         hpsa_show_dev_msg(KERN_INFO, h, device,
1336                 device->expose_device ? "added" : "masked");
1337         device->offload_to_be_enabled = device->offload_enabled;
1338         device->offload_enabled = 0;
1339         return 0;
1340 }
1341
1342 /* Update an entry in h->dev[] array. */
1343 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1344         int entry, struct hpsa_scsi_dev_t *new_entry)
1345 {
1346         int offload_enabled;
1347         /* assumes h->devlock is held */
1348         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1349
1350         /* Raid level changed. */
1351         h->dev[entry]->raid_level = new_entry->raid_level;
1352
1353         /* Raid offload parameters changed.  Careful about the ordering. */
1354         if (new_entry->offload_config && new_entry->offload_enabled) {
1355                 /*
1356                  * if drive is newly offload_enabled, we want to copy the
1357                  * raid map data first.  If previously offload_enabled and
1358                  * offload_config were set, raid map data had better be
1359                  * the same as it was before.  if raid map data is changed
1360                  * then it had better be the case that
1361                  * h->dev[entry]->offload_enabled is currently 0.
1362                  */
1363                 h->dev[entry]->raid_map = new_entry->raid_map;
1364                 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1365         }
1366         if (new_entry->hba_ioaccel_enabled) {
1367                 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1368                 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1369         }
1370         h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1371         h->dev[entry]->offload_config = new_entry->offload_config;
1372         h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1373         h->dev[entry]->queue_depth = new_entry->queue_depth;
1374
1375         /*
1376          * We can turn off ioaccel offload now, but need to delay turning
1377          * it on until we can update h->dev[entry]->phys_disk[], but we
1378          * can't do that until all the devices are updated.
1379          */
1380         h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
1381         if (!new_entry->offload_enabled)
1382                 h->dev[entry]->offload_enabled = 0;
1383
1384         offload_enabled = h->dev[entry]->offload_enabled;
1385         h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
1386         hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1387         h->dev[entry]->offload_enabled = offload_enabled;
1388 }
1389
1390 /* Replace an entry from h->dev[] array. */
1391 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1392         int entry, struct hpsa_scsi_dev_t *new_entry,
1393         struct hpsa_scsi_dev_t *added[], int *nadded,
1394         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1395 {
1396         /* assumes h->devlock is held */
1397         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1398         removed[*nremoved] = h->dev[entry];
1399         (*nremoved)++;
1400
1401         /*
1402          * New physical devices won't have target/lun assigned yet
1403          * so we need to preserve the values in the slot we are replacing.
1404          */
1405         if (new_entry->target == -1) {
1406                 new_entry->target = h->dev[entry]->target;
1407                 new_entry->lun = h->dev[entry]->lun;
1408         }
1409
1410         h->dev[entry] = new_entry;
1411         added[*nadded] = new_entry;
1412         (*nadded)++;
1413         hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1414         new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1415         new_entry->offload_enabled = 0;
1416 }
1417
1418 /* Remove an entry from h->dev[] array. */
1419 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1420         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1421 {
1422         /* assumes h->devlock is held */
1423         int i;
1424         struct hpsa_scsi_dev_t *sd;
1425
1426         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1427
1428         sd = h->dev[entry];
1429         removed[*nremoved] = h->dev[entry];
1430         (*nremoved)++;
1431
1432         for (i = entry; i < h->ndevices-1; i++)
1433                 h->dev[i] = h->dev[i+1];
1434         h->ndevices--;
1435         hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1436 }
1437
1438 #define SCSI3ADDR_EQ(a, b) ( \
1439         (a)[7] == (b)[7] && \
1440         (a)[6] == (b)[6] && \
1441         (a)[5] == (b)[5] && \
1442         (a)[4] == (b)[4] && \
1443         (a)[3] == (b)[3] && \
1444         (a)[2] == (b)[2] && \
1445         (a)[1] == (b)[1] && \
1446         (a)[0] == (b)[0])
1447
1448 static void fixup_botched_add(struct ctlr_info *h,
1449         struct hpsa_scsi_dev_t *added)
1450 {
1451         /* called when scsi_add_device fails in order to re-adjust
1452          * h->dev[] to match the mid layer's view.
1453          */
1454         unsigned long flags;
1455         int i, j;
1456
1457         spin_lock_irqsave(&h->lock, flags);
1458         for (i = 0; i < h->ndevices; i++) {
1459                 if (h->dev[i] == added) {
1460                         for (j = i; j < h->ndevices-1; j++)
1461                                 h->dev[j] = h->dev[j+1];
1462                         h->ndevices--;
1463                         break;
1464                 }
1465         }
1466         spin_unlock_irqrestore(&h->lock, flags);
1467         kfree(added);
1468 }
1469
1470 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1471         struct hpsa_scsi_dev_t *dev2)
1472 {
1473         /* we compare everything except lun and target as these
1474          * are not yet assigned.  Compare parts likely
1475          * to differ first
1476          */
1477         if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1478                 sizeof(dev1->scsi3addr)) != 0)
1479                 return 0;
1480         if (memcmp(dev1->device_id, dev2->device_id,
1481                 sizeof(dev1->device_id)) != 0)
1482                 return 0;
1483         if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1484                 return 0;
1485         if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1486                 return 0;
1487         if (dev1->devtype != dev2->devtype)
1488                 return 0;
1489         if (dev1->bus != dev2->bus)
1490                 return 0;
1491         return 1;
1492 }
1493
1494 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1495         struct hpsa_scsi_dev_t *dev2)
1496 {
1497         /* Device attributes that can change, but don't mean
1498          * that the device is a different device, nor that the OS
1499          * needs to be told anything about the change.
1500          */
1501         if (dev1->raid_level != dev2->raid_level)
1502                 return 1;
1503         if (dev1->offload_config != dev2->offload_config)
1504                 return 1;
1505         if (dev1->offload_enabled != dev2->offload_enabled)
1506                 return 1;
1507         if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1508                 if (dev1->queue_depth != dev2->queue_depth)
1509                         return 1;
1510         return 0;
1511 }
1512
1513 /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1514  * and return needle location in *index.  If scsi3addr matches, but not
1515  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1516  * location in *index.
1517  * In the case of a minor device attribute change, such as RAID level, just
1518  * return DEVICE_UPDATED, along with the updated device's location in index.
1519  * If needle not found, return DEVICE_NOT_FOUND.
1520  */
1521 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1522         struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1523         int *index)
1524 {
1525         int i;
1526 #define DEVICE_NOT_FOUND 0
1527 #define DEVICE_CHANGED 1
1528 #define DEVICE_SAME 2
1529 #define DEVICE_UPDATED 3
1530         if (needle == NULL)
1531                 return DEVICE_NOT_FOUND;
1532
1533         for (i = 0; i < haystack_size; i++) {
1534                 if (haystack[i] == NULL) /* previously removed. */
1535                         continue;
1536                 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1537                         *index = i;
1538                         if (device_is_the_same(needle, haystack[i])) {
1539                                 if (device_updated(needle, haystack[i]))
1540                                         return DEVICE_UPDATED;
1541                                 return DEVICE_SAME;
1542                         } else {
1543                                 /* Keep offline devices offline */
1544                                 if (needle->volume_offline)
1545                                         return DEVICE_NOT_FOUND;
1546                                 return DEVICE_CHANGED;
1547                         }
1548                 }
1549         }
1550         *index = -1;
1551         return DEVICE_NOT_FOUND;
1552 }
1553
1554 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1555                                         unsigned char scsi3addr[])
1556 {
1557         struct offline_device_entry *device;
1558         unsigned long flags;
1559
1560         /* Check to see if device is already on the list */
1561         spin_lock_irqsave(&h->offline_device_lock, flags);
1562         list_for_each_entry(device, &h->offline_device_list, offline_list) {
1563                 if (memcmp(device->scsi3addr, scsi3addr,
1564                         sizeof(device->scsi3addr)) == 0) {
1565                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1566                         return;
1567                 }
1568         }
1569         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1570
1571         /* Device is not on the list, add it. */
1572         device = kmalloc(sizeof(*device), GFP_KERNEL);
1573         if (!device)
1574                 return;
1575
1576         memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1577         spin_lock_irqsave(&h->offline_device_lock, flags);
1578         list_add_tail(&device->offline_list, &h->offline_device_list);
1579         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1580 }
1581
1582 /* Print a message explaining various offline volume states */
1583 static void hpsa_show_volume_status(struct ctlr_info *h,
1584         struct hpsa_scsi_dev_t *sd)
1585 {
1586         if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1587                 dev_info(&h->pdev->dev,
1588                         "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1589                         h->scsi_host->host_no,
1590                         sd->bus, sd->target, sd->lun);
1591         switch (sd->volume_offline) {
1592         case HPSA_LV_OK:
1593                 break;
1594         case HPSA_LV_UNDERGOING_ERASE:
1595                 dev_info(&h->pdev->dev,
1596                         "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1597                         h->scsi_host->host_no,
1598                         sd->bus, sd->target, sd->lun);
1599                 break;
1600         case HPSA_LV_NOT_AVAILABLE:
1601                 dev_info(&h->pdev->dev,
1602                         "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1603                         h->scsi_host->host_no,
1604                         sd->bus, sd->target, sd->lun);
1605                 break;
1606         case HPSA_LV_UNDERGOING_RPI:
1607                 dev_info(&h->pdev->dev,
1608                         "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1609                         h->scsi_host->host_no,
1610                         sd->bus, sd->target, sd->lun);
1611                 break;
1612         case HPSA_LV_PENDING_RPI:
1613                 dev_info(&h->pdev->dev,
1614                         "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1615                         h->scsi_host->host_no,
1616                         sd->bus, sd->target, sd->lun);
1617                 break;
1618         case HPSA_LV_ENCRYPTED_NO_KEY:
1619                 dev_info(&h->pdev->dev,
1620                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1621                         h->scsi_host->host_no,
1622                         sd->bus, sd->target, sd->lun);
1623                 break;
1624         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1625                 dev_info(&h->pdev->dev,
1626                         "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1627                         h->scsi_host->host_no,
1628                         sd->bus, sd->target, sd->lun);
1629                 break;
1630         case HPSA_LV_UNDERGOING_ENCRYPTION:
1631                 dev_info(&h->pdev->dev,
1632                         "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1633                         h->scsi_host->host_no,
1634                         sd->bus, sd->target, sd->lun);
1635                 break;
1636         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1637                 dev_info(&h->pdev->dev,
1638                         "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1639                         h->scsi_host->host_no,
1640                         sd->bus, sd->target, sd->lun);
1641                 break;
1642         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1643                 dev_info(&h->pdev->dev,
1644                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1645                         h->scsi_host->host_no,
1646                         sd->bus, sd->target, sd->lun);
1647                 break;
1648         case HPSA_LV_PENDING_ENCRYPTION:
1649                 dev_info(&h->pdev->dev,
1650                         "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1651                         h->scsi_host->host_no,
1652                         sd->bus, sd->target, sd->lun);
1653                 break;
1654         case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1655                 dev_info(&h->pdev->dev,
1656                         "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1657                         h->scsi_host->host_no,
1658                         sd->bus, sd->target, sd->lun);
1659                 break;
1660         }
1661 }
1662
1663 /*
1664  * Figure the list of physical drive pointers for a logical drive with
1665  * raid offload configured.
1666  */
1667 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1668                                 struct hpsa_scsi_dev_t *dev[], int ndevices,
1669                                 struct hpsa_scsi_dev_t *logical_drive)
1670 {
1671         struct raid_map_data *map = &logical_drive->raid_map;
1672         struct raid_map_disk_data *dd = &map->data[0];
1673         int i, j;
1674         int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1675                                 le16_to_cpu(map->metadata_disks_per_row);
1676         int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1677                                 le16_to_cpu(map->layout_map_count) *
1678                                 total_disks_per_row;
1679         int nphys_disk = le16_to_cpu(map->layout_map_count) *
1680                                 total_disks_per_row;
1681         int qdepth;
1682
1683         if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1684                 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1685
1686         logical_drive->nphysical_disks = nraid_map_entries;
1687
1688         qdepth = 0;
1689         for (i = 0; i < nraid_map_entries; i++) {
1690                 logical_drive->phys_disk[i] = NULL;
1691                 if (!logical_drive->offload_config)
1692                         continue;
1693                 for (j = 0; j < ndevices; j++) {
1694                         if (dev[j] == NULL)
1695                                 continue;
1696                         if (dev[j]->devtype != TYPE_DISK &&
1697                             dev[j]->devtype != TYPE_ZBC)
1698                                 continue;
1699                         if (is_logical_device(dev[j]))
1700                                 continue;
1701                         if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1702                                 continue;
1703
1704                         logical_drive->phys_disk[i] = dev[j];
1705                         if (i < nphys_disk)
1706                                 qdepth = min(h->nr_cmds, qdepth +
1707                                     logical_drive->phys_disk[i]->queue_depth);
1708                         break;
1709                 }
1710
1711                 /*
1712                  * This can happen if a physical drive is removed and
1713                  * the logical drive is degraded.  In that case, the RAID
1714                  * map data will refer to a physical disk which isn't actually
1715                  * present.  And in that case offload_enabled should already
1716                  * be 0, but we'll turn it off here just in case
1717                  */
1718                 if (!logical_drive->phys_disk[i]) {
1719                         logical_drive->offload_enabled = 0;
1720                         logical_drive->offload_to_be_enabled = 0;
1721                         logical_drive->queue_depth = 8;
1722                 }
1723         }
1724         if (nraid_map_entries)
1725                 /*
1726                  * This is correct for reads, too high for full stripe writes,
1727                  * way too high for partial stripe writes
1728                  */
1729                 logical_drive->queue_depth = qdepth;
1730         else
1731                 logical_drive->queue_depth = h->nr_cmds;
1732 }
1733
1734 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1735                                 struct hpsa_scsi_dev_t *dev[], int ndevices)
1736 {
1737         int i;
1738
1739         for (i = 0; i < ndevices; i++) {
1740                 if (dev[i] == NULL)
1741                         continue;
1742                 if (dev[i]->devtype != TYPE_DISK &&
1743                     dev[i]->devtype != TYPE_ZBC)
1744                         continue;
1745                 if (!is_logical_device(dev[i]))
1746                         continue;
1747
1748                 /*
1749                  * If offload is currently enabled, the RAID map and
1750                  * phys_disk[] assignment *better* not be changing
1751                  * and since it isn't changing, we do not need to
1752                  * update it.
1753                  */
1754                 if (dev[i]->offload_enabled)
1755                         continue;
1756
1757                 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1758         }
1759 }
1760
1761 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1762 {
1763         int rc = 0;
1764
1765         if (!h->scsi_host)
1766                 return 1;
1767
1768         if (is_logical_device(device)) /* RAID */
1769                 rc = scsi_add_device(h->scsi_host, device->bus,
1770                                         device->target, device->lun);
1771         else /* HBA */
1772                 rc = hpsa_add_sas_device(h->sas_host, device);
1773
1774         return rc;
1775 }
1776
1777 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1778                                                 struct hpsa_scsi_dev_t *dev)
1779 {
1780         int i;
1781         int count = 0;
1782
1783         for (i = 0; i < h->nr_cmds; i++) {
1784                 struct CommandList *c = h->cmd_pool + i;
1785                 int refcount = atomic_inc_return(&c->refcount);
1786
1787                 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1788                                 dev->scsi3addr)) {
1789                         unsigned long flags;
1790
1791                         spin_lock_irqsave(&h->lock, flags);     /* Implied MB */
1792                         if (!hpsa_is_cmd_idle(c))
1793                                 ++count;
1794                         spin_unlock_irqrestore(&h->lock, flags);
1795                 }
1796
1797                 cmd_free(h, c);
1798         }
1799
1800         return count;
1801 }
1802
1803 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1804                                                 struct hpsa_scsi_dev_t *device)
1805 {
1806         int cmds = 0;
1807         int waits = 0;
1808
1809         while (1) {
1810                 cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1811                 if (cmds == 0)
1812                         break;
1813                 if (++waits > 20)
1814                         break;
1815                 dev_warn(&h->pdev->dev,
1816                         "%s: removing device with %d outstanding commands!\n",
1817                         __func__, cmds);
1818                 msleep(1000);
1819         }
1820 }
1821
1822 static void hpsa_remove_device(struct ctlr_info *h,
1823                         struct hpsa_scsi_dev_t *device)
1824 {
1825         struct scsi_device *sdev = NULL;
1826
1827         if (!h->scsi_host)
1828                 return;
1829
1830         if (is_logical_device(device)) { /* RAID */
1831                 sdev = scsi_device_lookup(h->scsi_host, device->bus,
1832                                                 device->target, device->lun);
1833                 if (sdev) {
1834                         scsi_remove_device(sdev);
1835                         scsi_device_put(sdev);
1836                 } else {
1837                         /*
1838                          * We don't expect to get here.  Future commands
1839                          * to this device will get a selection timeout as
1840                          * if the device were gone.
1841                          */
1842                         hpsa_show_dev_msg(KERN_WARNING, h, device,
1843                                         "didn't find device for removal.");
1844                 }
1845         } else { /* HBA */
1846
1847                 device->removed = 1;
1848                 hpsa_wait_for_outstanding_commands_for_dev(h, device);
1849
1850                 hpsa_remove_sas_device(device);
1851         }
1852 }
1853
1854 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1855         struct hpsa_scsi_dev_t *sd[], int nsds)
1856 {
1857         /* sd contains scsi3 addresses and devtypes, and inquiry
1858          * data.  This function takes what's in sd to be the current
1859          * reality and updates h->dev[] to reflect that reality.
1860          */
1861         int i, entry, device_change, changes = 0;
1862         struct hpsa_scsi_dev_t *csd;
1863         unsigned long flags;
1864         struct hpsa_scsi_dev_t **added, **removed;
1865         int nadded, nremoved;
1866
1867         /*
1868          * A reset can cause a device status to change
1869          * re-schedule the scan to see what happened.
1870          */
1871         spin_lock_irqsave(&h->reset_lock, flags);
1872         if (h->reset_in_progress) {
1873                 h->drv_req_rescan = 1;
1874                 spin_unlock_irqrestore(&h->reset_lock, flags);
1875                 return;
1876         }
1877         spin_unlock_irqrestore(&h->reset_lock, flags);
1878
1879         added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1880         removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1881
1882         if (!added || !removed) {
1883                 dev_warn(&h->pdev->dev, "out of memory in "
1884                         "adjust_hpsa_scsi_table\n");
1885                 goto free_and_out;
1886         }
1887
1888         spin_lock_irqsave(&h->devlock, flags);
1889
1890         /* find any devices in h->dev[] that are not in
1891          * sd[] and remove them from h->dev[], and for any
1892          * devices which have changed, remove the old device
1893          * info and add the new device info.
1894          * If minor device attributes change, just update
1895          * the existing device structure.
1896          */
1897         i = 0;
1898         nremoved = 0;
1899         nadded = 0;
1900         while (i < h->ndevices) {
1901                 csd = h->dev[i];
1902                 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1903                 if (device_change == DEVICE_NOT_FOUND) {
1904                         changes++;
1905                         hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1906                         continue; /* remove ^^^, hence i not incremented */
1907                 } else if (device_change == DEVICE_CHANGED) {
1908                         changes++;
1909                         hpsa_scsi_replace_entry(h, i, sd[entry],
1910                                 added, &nadded, removed, &nremoved);
1911                         /* Set it to NULL to prevent it from being freed
1912                          * at the bottom of hpsa_update_scsi_devices()
1913                          */
1914                         sd[entry] = NULL;
1915                 } else if (device_change == DEVICE_UPDATED) {
1916                         hpsa_scsi_update_entry(h, i, sd[entry]);
1917                 }
1918                 i++;
1919         }
1920
1921         /* Now, make sure every device listed in sd[] is also
1922          * listed in h->dev[], adding them if they aren't found
1923          */
1924
1925         for (i = 0; i < nsds; i++) {
1926                 if (!sd[i]) /* if already added above. */
1927                         continue;
1928
1929                 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1930                  * as the SCSI mid-layer does not handle such devices well.
1931                  * It relentlessly loops sending TUR at 3Hz, then READ(10)
1932                  * at 160Hz, and prevents the system from coming up.
1933                  */
1934                 if (sd[i]->volume_offline) {
1935                         hpsa_show_volume_status(h, sd[i]);
1936                         hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1937                         continue;
1938                 }
1939
1940                 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1941                                         h->ndevices, &entry);
1942                 if (device_change == DEVICE_NOT_FOUND) {
1943                         changes++;
1944                         if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1945                                 break;
1946                         sd[i] = NULL; /* prevent from being freed later. */
1947                 } else if (device_change == DEVICE_CHANGED) {
1948                         /* should never happen... */
1949                         changes++;
1950                         dev_warn(&h->pdev->dev,
1951                                 "device unexpectedly changed.\n");
1952                         /* but if it does happen, we just ignore that device */
1953                 }
1954         }
1955         hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
1956
1957         /* Now that h->dev[]->phys_disk[] is coherent, we can enable
1958          * any logical drives that need it enabled.
1959          */
1960         for (i = 0; i < h->ndevices; i++) {
1961                 if (h->dev[i] == NULL)
1962                         continue;
1963                 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
1964         }
1965
1966         spin_unlock_irqrestore(&h->devlock, flags);
1967
1968         /* Monitor devices which are in one of several NOT READY states to be
1969          * brought online later. This must be done without holding h->devlock,
1970          * so don't touch h->dev[]
1971          */
1972         for (i = 0; i < nsds; i++) {
1973                 if (!sd[i]) /* if already added above. */
1974                         continue;
1975                 if (sd[i]->volume_offline)
1976                         hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1977         }
1978
1979         /* Don't notify scsi mid layer of any changes the first time through
1980          * (or if there are no changes) scsi_scan_host will do it later the
1981          * first time through.
1982          */
1983         if (!changes)
1984                 goto free_and_out;
1985
1986         /* Notify scsi mid layer of any removed devices */
1987         for (i = 0; i < nremoved; i++) {
1988                 if (removed[i] == NULL)
1989                         continue;
1990                 if (removed[i]->expose_device)
1991                         hpsa_remove_device(h, removed[i]);
1992                 kfree(removed[i]);
1993                 removed[i] = NULL;
1994         }
1995
1996         /* Notify scsi mid layer of any added devices */
1997         for (i = 0; i < nadded; i++) {
1998                 int rc = 0;
1999
2000                 if (added[i] == NULL)
2001                         continue;
2002                 if (!(added[i]->expose_device))
2003                         continue;
2004                 rc = hpsa_add_device(h, added[i]);
2005                 if (!rc)
2006                         continue;
2007                 dev_warn(&h->pdev->dev,
2008                         "addition failed %d, device not added.", rc);
2009                 /* now we have to remove it from h->dev,
2010                  * since it didn't get added to scsi mid layer
2011                  */
2012                 fixup_botched_add(h, added[i]);
2013                 h->drv_req_rescan = 1;
2014         }
2015
2016 free_and_out:
2017         kfree(added);
2018         kfree(removed);
2019 }
2020
2021 /*
2022  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
2023  * Assume's h->devlock is held.
2024  */
2025 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2026         int bus, int target, int lun)
2027 {
2028         int i;
2029         struct hpsa_scsi_dev_t *sd;
2030
2031         for (i = 0; i < h->ndevices; i++) {
2032                 sd = h->dev[i];
2033                 if (sd->bus == bus && sd->target == target && sd->lun == lun)
2034                         return sd;
2035         }
2036         return NULL;
2037 }
2038
2039 static int hpsa_slave_alloc(struct scsi_device *sdev)
2040 {
2041         struct hpsa_scsi_dev_t *sd = NULL;
2042         unsigned long flags;
2043         struct ctlr_info *h;
2044
2045         h = sdev_to_hba(sdev);
2046         spin_lock_irqsave(&h->devlock, flags);
2047         if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2048                 struct scsi_target *starget;
2049                 struct sas_rphy *rphy;
2050
2051                 starget = scsi_target(sdev);
2052                 rphy = target_to_rphy(starget);
2053                 sd = hpsa_find_device_by_sas_rphy(h, rphy);
2054                 if (sd) {
2055                         sd->target = sdev_id(sdev);
2056                         sd->lun = sdev->lun;
2057                 }
2058         }
2059         if (!sd)
2060                 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2061                                         sdev_id(sdev), sdev->lun);
2062
2063         if (sd && sd->expose_device) {
2064                 atomic_set(&sd->ioaccel_cmds_out, 0);
2065                 sdev->hostdata = sd;
2066         } else
2067                 sdev->hostdata = NULL;
2068         spin_unlock_irqrestore(&h->devlock, flags);
2069         return 0;
2070 }
2071
2072 /* configure scsi device based on internal per-device structure */
2073 static int hpsa_slave_configure(struct scsi_device *sdev)
2074 {
2075         struct hpsa_scsi_dev_t *sd;
2076         int queue_depth;
2077
2078         sd = sdev->hostdata;
2079         sdev->no_uld_attach = !sd || !sd->expose_device;
2080
2081         if (sd) {
2082                 if (sd->external)
2083                         queue_depth = EXTERNAL_QD;
2084                 else
2085                         queue_depth = sd->queue_depth != 0 ?
2086                                         sd->queue_depth : sdev->host->can_queue;
2087         } else
2088                 queue_depth = sdev->host->can_queue;
2089
2090         scsi_change_queue_depth(sdev, queue_depth);
2091
2092         return 0;
2093 }
2094
2095 static void hpsa_slave_destroy(struct scsi_device *sdev)
2096 {
2097         /* nothing to do. */
2098 }
2099
2100 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2101 {
2102         int i;
2103
2104         if (!h->ioaccel2_cmd_sg_list)
2105                 return;
2106         for (i = 0; i < h->nr_cmds; i++) {
2107                 kfree(h->ioaccel2_cmd_sg_list[i]);
2108                 h->ioaccel2_cmd_sg_list[i] = NULL;
2109         }
2110         kfree(h->ioaccel2_cmd_sg_list);
2111         h->ioaccel2_cmd_sg_list = NULL;
2112 }
2113
2114 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2115 {
2116         int i;
2117
2118         if (h->chainsize <= 0)
2119                 return 0;
2120
2121         h->ioaccel2_cmd_sg_list =
2122                 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
2123                                         GFP_KERNEL);
2124         if (!h->ioaccel2_cmd_sg_list)
2125                 return -ENOMEM;
2126         for (i = 0; i < h->nr_cmds; i++) {
2127                 h->ioaccel2_cmd_sg_list[i] =
2128                         kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
2129                                         h->maxsgentries, GFP_KERNEL);
2130                 if (!h->ioaccel2_cmd_sg_list[i])
2131                         goto clean;
2132         }
2133         return 0;
2134
2135 clean:
2136         hpsa_free_ioaccel2_sg_chain_blocks(h);
2137         return -ENOMEM;
2138 }
2139
2140 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2141 {
2142         int i;
2143
2144         if (!h->cmd_sg_list)
2145                 return;
2146         for (i = 0; i < h->nr_cmds; i++) {
2147                 kfree(h->cmd_sg_list[i]);
2148                 h->cmd_sg_list[i] = NULL;
2149         }
2150         kfree(h->cmd_sg_list);
2151         h->cmd_sg_list = NULL;
2152 }
2153
2154 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2155 {
2156         int i;
2157
2158         if (h->chainsize <= 0)
2159                 return 0;
2160
2161         h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
2162                                 GFP_KERNEL);
2163         if (!h->cmd_sg_list)
2164                 return -ENOMEM;
2165
2166         for (i = 0; i < h->nr_cmds; i++) {
2167                 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
2168                                                 h->chainsize, GFP_KERNEL);
2169                 if (!h->cmd_sg_list[i])
2170                         goto clean;
2171
2172         }
2173         return 0;
2174
2175 clean:
2176         hpsa_free_sg_chain_blocks(h);
2177         return -ENOMEM;
2178 }
2179
2180 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2181         struct io_accel2_cmd *cp, struct CommandList *c)
2182 {
2183         struct ioaccel2_sg_element *chain_block;
2184         u64 temp64;
2185         u32 chain_size;
2186
2187         chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2188         chain_size = le32_to_cpu(cp->sg[0].length);
2189         temp64 = pci_map_single(h->pdev, chain_block, chain_size,
2190                                 PCI_DMA_TODEVICE);
2191         if (dma_mapping_error(&h->pdev->dev, temp64)) {
2192                 /* prevent subsequent unmapping */
2193                 cp->sg->address = 0;
2194                 return -1;
2195         }
2196         cp->sg->address = cpu_to_le64(temp64);
2197         return 0;
2198 }
2199
2200 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2201         struct io_accel2_cmd *cp)
2202 {
2203         struct ioaccel2_sg_element *chain_sg;
2204         u64 temp64;
2205         u32 chain_size;
2206
2207         chain_sg = cp->sg;
2208         temp64 = le64_to_cpu(chain_sg->address);
2209         chain_size = le32_to_cpu(cp->sg[0].length);
2210         pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
2211 }
2212
2213 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2214         struct CommandList *c)
2215 {
2216         struct SGDescriptor *chain_sg, *chain_block;
2217         u64 temp64;
2218         u32 chain_len;
2219
2220         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2221         chain_block = h->cmd_sg_list[c->cmdindex];
2222         chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2223         chain_len = sizeof(*chain_sg) *
2224                 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2225         chain_sg->Len = cpu_to_le32(chain_len);
2226         temp64 = pci_map_single(h->pdev, chain_block, chain_len,
2227                                 PCI_DMA_TODEVICE);
2228         if (dma_mapping_error(&h->pdev->dev, temp64)) {
2229                 /* prevent subsequent unmapping */
2230                 chain_sg->Addr = cpu_to_le64(0);
2231                 return -1;
2232         }
2233         chain_sg->Addr = cpu_to_le64(temp64);
2234         return 0;
2235 }
2236
2237 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2238         struct CommandList *c)
2239 {
2240         struct SGDescriptor *chain_sg;
2241
2242         if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2243                 return;
2244
2245         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2246         pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
2247                         le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
2248 }
2249
2250
2251 /* Decode the various types of errors on ioaccel2 path.
2252  * Return 1 for any error that should generate a RAID path retry.
2253  * Return 0 for errors that don't require a RAID path retry.
2254  */
2255 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2256                                         struct CommandList *c,
2257                                         struct scsi_cmnd *cmd,
2258                                         struct io_accel2_cmd *c2,
2259                                         struct hpsa_scsi_dev_t *dev)
2260 {
2261         int data_len;
2262         int retry = 0;
2263         u32 ioaccel2_resid = 0;
2264
2265         switch (c2->error_data.serv_response) {
2266         case IOACCEL2_SERV_RESPONSE_COMPLETE:
2267                 switch (c2->error_data.status) {
2268                 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2269                         if (cmd)
2270                                 cmd->result = 0;
2271                         break;
2272                 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2273                         cmd->result |= SAM_STAT_CHECK_CONDITION;
2274                         if (c2->error_data.data_present !=
2275                                         IOACCEL2_SENSE_DATA_PRESENT) {
2276                                 memset(cmd->sense_buffer, 0,
2277                                         SCSI_SENSE_BUFFERSIZE);
2278                                 break;
2279                         }
2280                         /* copy the sense data */
2281                         data_len = c2->error_data.sense_data_len;
2282                         if (data_len > SCSI_SENSE_BUFFERSIZE)
2283                                 data_len = SCSI_SENSE_BUFFERSIZE;
2284                         if (data_len > sizeof(c2->error_data.sense_data_buff))
2285                                 data_len =
2286                                         sizeof(c2->error_data.sense_data_buff);
2287                         memcpy(cmd->sense_buffer,
2288                                 c2->error_data.sense_data_buff, data_len);
2289                         retry = 1;
2290                         break;
2291                 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2292                         retry = 1;
2293                         break;
2294                 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2295                         retry = 1;
2296                         break;
2297                 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2298                         retry = 1;
2299                         break;
2300                 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2301                         retry = 1;
2302                         break;
2303                 default:
2304                         retry = 1;
2305                         break;
2306                 }
2307                 break;
2308         case IOACCEL2_SERV_RESPONSE_FAILURE:
2309                 switch (c2->error_data.status) {
2310                 case IOACCEL2_STATUS_SR_IO_ERROR:
2311                 case IOACCEL2_STATUS_SR_IO_ABORTED:
2312                 case IOACCEL2_STATUS_SR_OVERRUN:
2313                         retry = 1;
2314                         break;
2315                 case IOACCEL2_STATUS_SR_UNDERRUN:
2316                         cmd->result = (DID_OK << 16);           /* host byte */
2317                         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2318                         ioaccel2_resid = get_unaligned_le32(
2319                                                 &c2->error_data.resid_cnt[0]);
2320                         scsi_set_resid(cmd, ioaccel2_resid);
2321                         break;
2322                 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2323                 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2324                 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2325                         /*
2326                          * Did an HBA disk disappear? We will eventually
2327                          * get a state change event from the controller but
2328                          * in the meantime, we need to tell the OS that the
2329                          * HBA disk is no longer there and stop I/O
2330                          * from going down. This allows the potential re-insert
2331                          * of the disk to get the same device node.
2332                          */
2333                         if (dev->physical_device && dev->expose_device) {
2334                                 cmd->result = DID_NO_CONNECT << 16;
2335                                 dev->removed = 1;
2336                                 h->drv_req_rescan = 1;
2337                                 dev_warn(&h->pdev->dev,
2338                                         "%s: device is gone!\n", __func__);
2339                         } else
2340                                 /*
2341                                  * Retry by sending down the RAID path.
2342                                  * We will get an event from ctlr to
2343                                  * trigger rescan regardless.
2344                                  */
2345                                 retry = 1;
2346                         break;
2347                 default:
2348                         retry = 1;
2349                 }
2350                 break;
2351         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2352                 break;
2353         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2354                 break;
2355         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2356                 retry = 1;
2357                 break;
2358         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2359                 break;
2360         default:
2361                 retry = 1;
2362                 break;
2363         }
2364
2365         return retry;   /* retry on raid path? */
2366 }
2367
2368 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2369                 struct CommandList *c)
2370 {
2371         bool do_wake = false;
2372
2373         /*
2374          * Reset c->scsi_cmd here so that the reset handler will know
2375          * this command has completed.  Then, check to see if the handler is
2376          * waiting for this command, and, if so, wake it.
2377          */
2378         c->scsi_cmd = SCSI_CMD_IDLE;
2379         mb();   /* Declare command idle before checking for pending events. */
2380         if (c->reset_pending) {
2381                 unsigned long flags;
2382                 struct hpsa_scsi_dev_t *dev;
2383
2384                 /*
2385                  * There appears to be a reset pending; lock the lock and
2386                  * reconfirm.  If so, then decrement the count of outstanding
2387                  * commands and wake the reset command if this is the last one.
2388                  */
2389                 spin_lock_irqsave(&h->lock, flags);
2390                 dev = c->reset_pending;         /* Re-fetch under the lock. */
2391                 if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2392                         do_wake = true;
2393                 c->reset_pending = NULL;
2394                 spin_unlock_irqrestore(&h->lock, flags);
2395         }
2396
2397         if (do_wake)
2398                 wake_up_all(&h->event_sync_wait_queue);
2399 }
2400
2401 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2402                                       struct CommandList *c)
2403 {
2404         hpsa_cmd_resolve_events(h, c);
2405         cmd_tagged_free(h, c);
2406 }
2407
2408 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2409                 struct CommandList *c, struct scsi_cmnd *cmd)
2410 {
2411         hpsa_cmd_resolve_and_free(h, c);
2412         if (cmd && cmd->scsi_done)
2413                 cmd->scsi_done(cmd);
2414 }
2415
2416 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2417 {
2418         INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2419         queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2420 }
2421
2422 static void process_ioaccel2_completion(struct ctlr_info *h,
2423                 struct CommandList *c, struct scsi_cmnd *cmd,
2424                 struct hpsa_scsi_dev_t *dev)
2425 {
2426         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2427
2428         /* check for good status */
2429         if (likely(c2->error_data.serv_response == 0 &&
2430                         c2->error_data.status == 0)) {
2431                 cmd->result = 0;
2432                 return hpsa_cmd_free_and_done(h, c, cmd);
2433         }
2434
2435         /*
2436          * Any RAID offload error results in retry which will use
2437          * the normal I/O path so the controller can handle whatever's
2438          * wrong.
2439          */
2440         if (is_logical_device(dev) &&
2441                 c2->error_data.serv_response ==
2442                         IOACCEL2_SERV_RESPONSE_FAILURE) {
2443                 if (c2->error_data.status ==
2444                         IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2445                         dev->offload_enabled = 0;
2446                         dev->offload_to_be_enabled = 0;
2447                 }
2448
2449                 return hpsa_retry_cmd(h, c);
2450         }
2451
2452         if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
2453                 return hpsa_retry_cmd(h, c);
2454
2455         return hpsa_cmd_free_and_done(h, c, cmd);
2456 }
2457
2458 /* Returns 0 on success, < 0 otherwise. */
2459 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2460                                         struct CommandList *cp)
2461 {
2462         u8 tmf_status = cp->err_info->ScsiStatus;
2463
2464         switch (tmf_status) {
2465         case CISS_TMF_COMPLETE:
2466                 /*
2467                  * CISS_TMF_COMPLETE never happens, instead,
2468                  * ei->CommandStatus == 0 for this case.
2469                  */
2470         case CISS_TMF_SUCCESS:
2471                 return 0;
2472         case CISS_TMF_INVALID_FRAME:
2473         case CISS_TMF_NOT_SUPPORTED:
2474         case CISS_TMF_FAILED:
2475         case CISS_TMF_WRONG_LUN:
2476         case CISS_TMF_OVERLAPPED_TAG:
2477                 break;
2478         default:
2479                 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2480                                 tmf_status);
2481                 break;
2482         }
2483         return -tmf_status;
2484 }
2485
2486 static void complete_scsi_command(struct CommandList *cp)
2487 {
2488         struct scsi_cmnd *cmd;
2489         struct ctlr_info *h;
2490         struct ErrorInfo *ei;
2491         struct hpsa_scsi_dev_t *dev;
2492         struct io_accel2_cmd *c2;
2493
2494         u8 sense_key;
2495         u8 asc;      /* additional sense code */
2496         u8 ascq;     /* additional sense code qualifier */
2497         unsigned long sense_data_size;
2498
2499         ei = cp->err_info;
2500         cmd = cp->scsi_cmd;
2501         h = cp->h;
2502
2503         if (!cmd->device) {
2504                 cmd->result = DID_NO_CONNECT << 16;
2505                 return hpsa_cmd_free_and_done(h, cp, cmd);
2506         }
2507
2508         dev = cmd->device->hostdata;
2509         if (!dev) {
2510                 cmd->result = DID_NO_CONNECT << 16;
2511                 return hpsa_cmd_free_and_done(h, cp, cmd);
2512         }
2513         c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2514
2515         scsi_dma_unmap(cmd); /* undo the DMA mappings */
2516         if ((cp->cmd_type == CMD_SCSI) &&
2517                 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2518                 hpsa_unmap_sg_chain_block(h, cp);
2519
2520         if ((cp->cmd_type == CMD_IOACCEL2) &&
2521                 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2522                 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2523
2524         cmd->result = (DID_OK << 16);           /* host byte */
2525         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2526
2527         if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2528                 if (dev->physical_device && dev->expose_device &&
2529                         dev->removed) {
2530                         cmd->result = DID_NO_CONNECT << 16;
2531                         return hpsa_cmd_free_and_done(h, cp, cmd);
2532                 }
2533                 if (likely(cp->phys_disk != NULL))
2534                         atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2535         }
2536
2537         /*
2538          * We check for lockup status here as it may be set for
2539          * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2540          * fail_all_oustanding_cmds()
2541          */
2542         if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2543                 /* DID_NO_CONNECT will prevent a retry */
2544                 cmd->result = DID_NO_CONNECT << 16;
2545                 return hpsa_cmd_free_and_done(h, cp, cmd);
2546         }
2547
2548         if ((unlikely(hpsa_is_pending_event(cp))))
2549                 if (cp->reset_pending)
2550                         return hpsa_cmd_free_and_done(h, cp, cmd);
2551
2552         if (cp->cmd_type == CMD_IOACCEL2)
2553                 return process_ioaccel2_completion(h, cp, cmd, dev);
2554
2555         scsi_set_resid(cmd, ei->ResidualCnt);
2556         if (ei->CommandStatus == 0)
2557                 return hpsa_cmd_free_and_done(h, cp, cmd);
2558
2559         /* For I/O accelerator commands, copy over some fields to the normal
2560          * CISS header used below for error handling.
2561          */
2562         if (cp->cmd_type == CMD_IOACCEL1) {
2563                 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2564                 cp->Header.SGList = scsi_sg_count(cmd);
2565                 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2566                 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2567                         IOACCEL1_IOFLAGS_CDBLEN_MASK;
2568                 cp->Header.tag = c->tag;
2569                 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2570                 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2571
2572                 /* Any RAID offload error results in retry which will use
2573                  * the normal I/O path so the controller can handle whatever's
2574                  * wrong.
2575                  */
2576                 if (is_logical_device(dev)) {
2577                         if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2578                                 dev->offload_enabled = 0;
2579                         return hpsa_retry_cmd(h, cp);
2580                 }
2581         }
2582
2583         /* an error has occurred */
2584         switch (ei->CommandStatus) {
2585
2586         case CMD_TARGET_STATUS:
2587                 cmd->result |= ei->ScsiStatus;
2588                 /* copy the sense data */
2589                 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2590                         sense_data_size = SCSI_SENSE_BUFFERSIZE;
2591                 else
2592                         sense_data_size = sizeof(ei->SenseInfo);
2593                 if (ei->SenseLen < sense_data_size)
2594                         sense_data_size = ei->SenseLen;
2595                 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2596                 if (ei->ScsiStatus)
2597                         decode_sense_data(ei->SenseInfo, sense_data_size,
2598                                 &sense_key, &asc, &ascq);
2599                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2600                         if (sense_key == ABORTED_COMMAND) {
2601                                 cmd->result |= DID_SOFT_ERROR << 16;
2602                                 break;
2603                         }
2604                         break;
2605                 }
2606                 /* Problem was not a check condition
2607                  * Pass it up to the upper layers...
2608                  */
2609                 if (ei->ScsiStatus) {
2610                         dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2611                                 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2612                                 "Returning result: 0x%x\n",
2613                                 cp, ei->ScsiStatus,
2614                                 sense_key, asc, ascq,
2615                                 cmd->result);
2616                 } else {  /* scsi status is zero??? How??? */
2617                         dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2618                                 "Returning no connection.\n", cp),
2619
2620                         /* Ordinarily, this case should never happen,
2621                          * but there is a bug in some released firmware
2622                          * revisions that allows it to happen if, for
2623                          * example, a 4100 backplane loses power and
2624                          * the tape drive is in it.  We assume that
2625                          * it's a fatal error of some kind because we
2626                          * can't show that it wasn't. We will make it
2627                          * look like selection timeout since that is
2628                          * the most common reason for this to occur,
2629                          * and it's severe enough.
2630                          */
2631
2632                         cmd->result = DID_NO_CONNECT << 16;
2633                 }
2634                 break;
2635
2636         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2637                 break;
2638         case CMD_DATA_OVERRUN:
2639                 dev_warn(&h->pdev->dev,
2640                         "CDB %16phN data overrun\n", cp->Request.CDB);
2641                 break;
2642         case CMD_INVALID: {
2643                 /* print_bytes(cp, sizeof(*cp), 1, 0);
2644                 print_cmd(cp); */
2645                 /* We get CMD_INVALID if you address a non-existent device
2646                  * instead of a selection timeout (no response).  You will
2647                  * see this if you yank out a drive, then try to access it.
2648                  * This is kind of a shame because it means that any other
2649                  * CMD_INVALID (e.g. driver bug) will get interpreted as a
2650                  * missing target. */
2651                 cmd->result = DID_NO_CONNECT << 16;
2652         }
2653                 break;
2654         case CMD_PROTOCOL_ERR:
2655                 cmd->result = DID_ERROR << 16;
2656                 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2657                                 cp->Request.CDB);
2658                 break;
2659         case CMD_HARDWARE_ERR:
2660                 cmd->result = DID_ERROR << 16;
2661                 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2662                         cp->Request.CDB);
2663                 break;
2664         case CMD_CONNECTION_LOST:
2665                 cmd->result = DID_ERROR << 16;
2666                 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2667                         cp->Request.CDB);
2668                 break;
2669         case CMD_ABORTED:
2670                 cmd->result = DID_ABORT << 16;
2671                 break;
2672         case CMD_ABORT_FAILED:
2673                 cmd->result = DID_ERROR << 16;
2674                 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2675                         cp->Request.CDB);
2676                 break;
2677         case CMD_UNSOLICITED_ABORT:
2678                 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2679                 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2680                         cp->Request.CDB);
2681                 break;
2682         case CMD_TIMEOUT:
2683                 cmd->result = DID_TIME_OUT << 16;
2684                 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2685                         cp->Request.CDB);
2686                 break;
2687         case CMD_UNABORTABLE:
2688                 cmd->result = DID_ERROR << 16;
2689                 dev_warn(&h->pdev->dev, "Command unabortable\n");
2690                 break;
2691         case CMD_TMF_STATUS:
2692                 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2693                         cmd->result = DID_ERROR << 16;
2694                 break;
2695         case CMD_IOACCEL_DISABLED:
2696                 /* This only handles the direct pass-through case since RAID
2697                  * offload is handled above.  Just attempt a retry.
2698                  */
2699                 cmd->result = DID_SOFT_ERROR << 16;
2700                 dev_warn(&h->pdev->dev,
2701                                 "cp %p had HP SSD Smart Path error\n", cp);
2702                 break;
2703         default:
2704                 cmd->result = DID_ERROR << 16;
2705                 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2706                                 cp, ei->CommandStatus);
2707         }
2708
2709         return hpsa_cmd_free_and_done(h, cp, cmd);
2710 }
2711
2712 static void hpsa_pci_unmap(struct pci_dev *pdev,
2713         struct CommandList *c, int sg_used, int data_direction)
2714 {
2715         int i;
2716
2717         for (i = 0; i < sg_used; i++)
2718                 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2719                                 le32_to_cpu(c->SG[i].Len),
2720                                 data_direction);
2721 }
2722
2723 static int hpsa_map_one(struct pci_dev *pdev,
2724                 struct CommandList *cp,
2725                 unsigned char *buf,
2726                 size_t buflen,
2727                 int data_direction)
2728 {
2729         u64 addr64;
2730
2731         if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2732                 cp->Header.SGList = 0;
2733                 cp->Header.SGTotal = cpu_to_le16(0);
2734                 return 0;
2735         }
2736
2737         addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2738         if (dma_mapping_error(&pdev->dev, addr64)) {
2739                 /* Prevent subsequent unmap of something never mapped */
2740                 cp->Header.SGList = 0;
2741                 cp->Header.SGTotal = cpu_to_le16(0);
2742                 return -1;
2743         }
2744         cp->SG[0].Addr = cpu_to_le64(addr64);
2745         cp->SG[0].Len = cpu_to_le32(buflen);
2746         cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2747         cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
2748         cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2749         return 0;
2750 }
2751
2752 #define NO_TIMEOUT ((unsigned long) -1)
2753 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2754 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2755         struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2756 {
2757         DECLARE_COMPLETION_ONSTACK(wait);
2758
2759         c->waiting = &wait;
2760         __enqueue_cmd_and_start_io(h, c, reply_queue);
2761         if (timeout_msecs == NO_TIMEOUT) {
2762                 /* TODO: get rid of this no-timeout thing */
2763                 wait_for_completion_io(&wait);
2764                 return IO_OK;
2765         }
2766         if (!wait_for_completion_io_timeout(&wait,
2767                                         msecs_to_jiffies(timeout_msecs))) {
2768                 dev_warn(&h->pdev->dev, "Command timed out.\n");
2769                 return -ETIMEDOUT;
2770         }
2771         return IO_OK;
2772 }
2773
2774 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2775                                    int reply_queue, unsigned long timeout_msecs)
2776 {
2777         if (unlikely(lockup_detected(h))) {
2778                 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2779                 return IO_OK;
2780         }
2781         return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2782 }
2783
2784 static u32 lockup_detected(struct ctlr_info *h)
2785 {
2786         int cpu;
2787         u32 rc, *lockup_detected;
2788
2789         cpu = get_cpu();
2790         lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2791         rc = *lockup_detected;
2792         put_cpu();
2793         return rc;
2794 }
2795
2796 #define MAX_DRIVER_CMD_RETRIES 25
2797 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2798         struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2799 {
2800         int backoff_time = 10, retry_count = 0;
2801         int rc;
2802
2803         do {
2804                 memset(c->err_info, 0, sizeof(*c->err_info));
2805                 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2806                                                   timeout_msecs);
2807                 if (rc)
2808                         break;
2809                 retry_count++;
2810                 if (retry_count > 3) {
2811                         msleep(backoff_time);
2812                         if (backoff_time < 1000)
2813                                 backoff_time *= 2;
2814                 }
2815         } while ((check_for_unit_attention(h, c) ||
2816                         check_for_busy(h, c)) &&
2817                         retry_count <= MAX_DRIVER_CMD_RETRIES);
2818         hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2819         if (retry_count > MAX_DRIVER_CMD_RETRIES)
2820                 rc = -EIO;
2821         return rc;
2822 }
2823
2824 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2825                                 struct CommandList *c)
2826 {
2827         const u8 *cdb = c->Request.CDB;
2828         const u8 *lun = c->Header.LUN.LunAddrBytes;
2829
2830         dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n",
2831                  txt, lun, cdb);
2832 }
2833
2834 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2835                         struct CommandList *cp)
2836 {
2837         const struct ErrorInfo *ei = cp->err_info;
2838         struct device *d = &cp->h->pdev->dev;
2839         u8 sense_key, asc, ascq;
2840         int sense_len;
2841
2842         switch (ei->CommandStatus) {
2843         case CMD_TARGET_STATUS:
2844                 if (ei->SenseLen > sizeof(ei->SenseInfo))
2845                         sense_len = sizeof(ei->SenseInfo);
2846                 else
2847                         sense_len = ei->SenseLen;
2848                 decode_sense_data(ei->SenseInfo, sense_len,
2849                                         &sense_key, &asc, &ascq);
2850                 hpsa_print_cmd(h, "SCSI status", cp);
2851                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2852                         dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2853                                 sense_key, asc, ascq);
2854                 else
2855                         dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2856                 if (ei->ScsiStatus == 0)
2857                         dev_warn(d, "SCSI status is abnormally zero.  "
2858                         "(probably indicates selection timeout "
2859                         "reported incorrectly due to a known "
2860                         "firmware bug, circa July, 2001.)\n");
2861                 break;
2862         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2863                 break;
2864         case CMD_DATA_OVERRUN:
2865                 hpsa_print_cmd(h, "overrun condition", cp);
2866                 break;
2867         case CMD_INVALID: {
2868                 /* controller unfortunately reports SCSI passthru's
2869                  * to non-existent targets as invalid commands.
2870                  */
2871                 hpsa_print_cmd(h, "invalid command", cp);
2872                 dev_warn(d, "probably means device no longer present\n");
2873                 }
2874                 break;
2875         case CMD_PROTOCOL_ERR:
2876                 hpsa_print_cmd(h, "protocol error", cp);
2877                 break;
2878         case CMD_HARDWARE_ERR:
2879                 hpsa_print_cmd(h, "hardware error", cp);
2880                 break;
2881         case CMD_CONNECTION_LOST:
2882                 hpsa_print_cmd(h, "connection lost", cp);
2883                 break;
2884         case CMD_ABORTED:
2885                 hpsa_print_cmd(h, "aborted", cp);
2886                 break;
2887         case CMD_ABORT_FAILED:
2888                 hpsa_print_cmd(h, "abort failed", cp);
2889                 break;
2890         case CMD_UNSOLICITED_ABORT:
2891                 hpsa_print_cmd(h, "unsolicited abort", cp);
2892                 break;
2893         case CMD_TIMEOUT:
2894                 hpsa_print_cmd(h, "timed out", cp);
2895                 break;
2896         case CMD_UNABORTABLE:
2897                 hpsa_print_cmd(h, "unabortable", cp);
2898                 break;
2899         case CMD_CTLR_LOCKUP:
2900                 hpsa_print_cmd(h, "controller lockup detected", cp);
2901                 break;
2902         default:
2903                 hpsa_print_cmd(h, "unknown status", cp);
2904                 dev_warn(d, "Unknown command status %x\n",
2905                                 ei->CommandStatus);
2906         }
2907 }
2908
2909 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2910                         u16 page, unsigned char *buf,
2911                         unsigned char bufsize)
2912 {
2913         int rc = IO_OK;
2914         struct CommandList *c;
2915         struct ErrorInfo *ei;
2916
2917         c = cmd_alloc(h);
2918
2919         if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2920                         page, scsi3addr, TYPE_CMD)) {
2921                 rc = -1;
2922                 goto out;
2923         }
2924         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2925                                         PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
2926         if (rc)
2927                 goto out;
2928         ei = c->err_info;
2929         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2930                 hpsa_scsi_interpret_error(h, c);
2931                 rc = -1;
2932         }
2933 out:
2934         cmd_free(h, c);
2935         return rc;
2936 }
2937
2938 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2939         u8 reset_type, int reply_queue)
2940 {
2941         int rc = IO_OK;
2942         struct CommandList *c;
2943         struct ErrorInfo *ei;
2944
2945         c = cmd_alloc(h);
2946
2947
2948         /* fill_cmd can't fail here, no data buffer to map. */
2949         (void) fill_cmd(c, reset_type, h, NULL, 0, 0,
2950                         scsi3addr, TYPE_MSG);
2951         rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
2952         if (rc) {
2953                 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
2954                 goto out;
2955         }
2956         /* no unmap needed here because no data xfer. */
2957
2958         ei = c->err_info;
2959         if (ei->CommandStatus != 0) {
2960                 hpsa_scsi_interpret_error(h, c);
2961                 rc = -1;
2962         }
2963 out:
2964         cmd_free(h, c);
2965         return rc;
2966 }
2967
2968 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
2969                                struct hpsa_scsi_dev_t *dev,
2970                                unsigned char *scsi3addr)
2971 {
2972         int i;
2973         bool match = false;
2974         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2975         struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
2976
2977         if (hpsa_is_cmd_idle(c))
2978                 return false;
2979
2980         switch (c->cmd_type) {
2981         case CMD_SCSI:
2982         case CMD_IOCTL_PEND:
2983                 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
2984                                 sizeof(c->Header.LUN.LunAddrBytes));
2985                 break;
2986
2987         case CMD_IOACCEL1:
2988         case CMD_IOACCEL2:
2989                 if (c->phys_disk == dev) {
2990                         /* HBA mode match */
2991                         match = true;
2992                 } else {
2993                         /* Possible RAID mode -- check each phys dev. */
2994                         /* FIXME:  Do we need to take out a lock here?  If
2995                          * so, we could just call hpsa_get_pdisk_of_ioaccel2()
2996                          * instead. */
2997                         for (i = 0; i < dev->nphysical_disks && !match; i++) {
2998                                 /* FIXME: an alternate test might be
2999                                  *
3000                                  * match = dev->phys_disk[i]->ioaccel_handle
3001                                  *              == c2->scsi_nexus;      */
3002                                 match = dev->phys_disk[i] == c->phys_disk;
3003                         }
3004                 }
3005                 break;
3006
3007         case IOACCEL2_TMF:
3008                 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3009                         match = dev->phys_disk[i]->ioaccel_handle ==
3010                                         le32_to_cpu(ac->it_nexus);
3011                 }
3012                 break;
3013
3014         case 0:         /* The command is in the middle of being initialized. */
3015                 match = false;
3016                 break;
3017
3018         default:
3019                 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3020                         c->cmd_type);
3021                 BUG();
3022         }
3023
3024         return match;
3025 }
3026
3027 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3028         unsigned char *scsi3addr, u8 reset_type, int reply_queue)
3029 {
3030         int i;
3031         int rc = 0;
3032
3033         /* We can really only handle one reset at a time */
3034         if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3035                 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3036                 return -EINTR;
3037         }
3038
3039         BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
3040
3041         for (i = 0; i < h->nr_cmds; i++) {
3042                 struct CommandList *c = h->cmd_pool + i;
3043                 int refcount = atomic_inc_return(&c->refcount);
3044
3045                 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
3046                         unsigned long flags;
3047
3048                         /*
3049                          * Mark the target command as having a reset pending,
3050                          * then lock a lock so that the command cannot complete
3051                          * while we're considering it.  If the command is not
3052                          * idle then count it; otherwise revoke the event.
3053                          */
3054                         c->reset_pending = dev;
3055                         spin_lock_irqsave(&h->lock, flags);     /* Implied MB */
3056                         if (!hpsa_is_cmd_idle(c))
3057                                 atomic_inc(&dev->reset_cmds_out);
3058                         else
3059                                 c->reset_pending = NULL;
3060                         spin_unlock_irqrestore(&h->lock, flags);
3061                 }
3062
3063                 cmd_free(h, c);
3064         }
3065
3066         rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
3067         if (!rc)
3068                 wait_event(h->event_sync_wait_queue,
3069                         atomic_read(&dev->reset_cmds_out) == 0 ||
3070                         lockup_detected(h));
3071
3072         if (unlikely(lockup_detected(h))) {
3073                 dev_warn(&h->pdev->dev,
3074                          "Controller lockup detected during reset wait\n");
3075                 rc = -ENODEV;
3076         }
3077
3078         if (unlikely(rc))
3079                 atomic_set(&dev->reset_cmds_out, 0);
3080         else
3081                 rc = wait_for_device_to_become_ready(h, scsi3addr, 0);
3082
3083         mutex_unlock(&h->reset_mutex);
3084         return rc;
3085 }
3086
3087 static void hpsa_get_raid_level(struct ctlr_info *h,
3088         unsigned char *scsi3addr, unsigned char *raid_level)
3089 {
3090         int rc;
3091         unsigned char *buf;
3092
3093         *raid_level = RAID_UNKNOWN;
3094         buf = kzalloc(64, GFP_KERNEL);
3095         if (!buf)
3096                 return;
3097
3098         if (!hpsa_vpd_page_supported(h, scsi3addr,
3099                 HPSA_VPD_LV_DEVICE_GEOMETRY))
3100                 goto exit;
3101
3102         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3103                 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
3104
3105         if (rc == 0)
3106                 *raid_level = buf[8];
3107         if (*raid_level > RAID_UNKNOWN)
3108                 *raid_level = RAID_UNKNOWN;
3109 exit:
3110         kfree(buf);
3111         return;
3112 }
3113
3114 #define HPSA_MAP_DEBUG
3115 #ifdef HPSA_MAP_DEBUG
3116 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3117                                 struct raid_map_data *map_buff)
3118 {
3119         struct raid_map_disk_data *dd = &map_buff->data[0];
3120         int map, row, col;
3121         u16 map_cnt, row_cnt, disks_per_row;
3122
3123         if (rc != 0)
3124                 return;
3125
3126         /* Show details only if debugging has been activated. */
3127         if (h->raid_offload_debug < 2)
3128                 return;
3129
3130         dev_info(&h->pdev->dev, "structure_size = %u\n",
3131                                 le32_to_cpu(map_buff->structure_size));
3132         dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3133                         le32_to_cpu(map_buff->volume_blk_size));
3134         dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3135                         le64_to_cpu(map_buff->volume_blk_cnt));
3136         dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3137                         map_buff->phys_blk_shift);
3138         dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3139                         map_buff->parity_rotation_shift);
3140         dev_info(&h->pdev->dev, "strip_size = %u\n",
3141                         le16_to_cpu(map_buff->strip_size));
3142         dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3143                         le64_to_cpu(map_buff->disk_starting_blk));
3144         dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3145                         le64_to_cpu(map_buff->disk_blk_cnt));
3146         dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3147                         le16_to_cpu(map_buff->data_disks_per_row));
3148         dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3149                         le16_to_cpu(map_buff->metadata_disks_per_row));
3150         dev_info(&h->pdev->dev, "row_cnt = %u\n",
3151                         le16_to_cpu(map_buff->row_cnt));
3152         dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3153                         le16_to_cpu(map_buff->layout_map_count));
3154         dev_info(&h->pdev->dev, "flags = 0x%x\n",
3155                         le16_to_cpu(map_buff->flags));
3156         dev_info(&h->pdev->dev, "encryption = %s\n",
3157                         le16_to_cpu(map_buff->flags) &
3158                         RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
3159         dev_info(&h->pdev->dev, "dekindex = %u\n",
3160                         le16_to_cpu(map_buff->dekindex));
3161         map_cnt = le16_to_cpu(map_buff->layout_map_count);
3162         for (map = 0; map < map_cnt; map++) {
3163                 dev_info(&h->pdev->dev, "Map%u:\n", map);
3164                 row_cnt = le16_to_cpu(map_buff->row_cnt);
3165                 for (row = 0; row < row_cnt; row++) {
3166                         dev_info(&h->pdev->dev, "  Row%u:\n", row);
3167                         disks_per_row =
3168                                 le16_to_cpu(map_buff->data_disks_per_row);
3169                         for (col = 0; col < disks_per_row; col++, dd++)
3170                                 dev_info(&h->pdev->dev,
3171                                         "    D%02u: h=0x%04x xor=%u,%u\n",
3172                                         col, dd->ioaccel_handle,
3173                                         dd->xor_mult[0], dd->xor_mult[1]);
3174                         disks_per_row =
3175                                 le16_to_cpu(map_buff->metadata_disks_per_row);
3176                         for (col = 0; col < disks_per_row; col++, dd++)
3177                                 dev_info(&h->pdev->dev,
3178                                         "    M%02u: h=0x%04x xor=%u,%u\n",
3179                                         col, dd->ioaccel_handle,
3180                                         dd->xor_mult[0], dd->xor_mult[1]);
3181                 }
3182         }
3183 }
3184 #else
3185 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3186                         __attribute__((unused)) int rc,
3187                         __attribute__((unused)) struct raid_map_data *map_buff)
3188 {
3189 }
3190 #endif
3191
3192 static int hpsa_get_raid_map(struct ctlr_info *h,
3193         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3194 {
3195         int rc = 0;
3196         struct CommandList *c;
3197         struct ErrorInfo *ei;
3198
3199         c = cmd_alloc(h);
3200
3201         if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3202                         sizeof(this_device->raid_map), 0,
3203                         scsi3addr, TYPE_CMD)) {
3204                 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3205                 cmd_free(h, c);
3206                 return -1;
3207         }
3208         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3209                                         PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3210         if (rc)
3211                 goto out;
3212         ei = c->err_info;
3213         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3214                 hpsa_scsi_interpret_error(h, c);
3215                 rc = -1;
3216                 goto out;
3217         }
3218         cmd_free(h, c);
3219
3220         /* @todo in the future, dynamically allocate RAID map memory */
3221         if (le32_to_cpu(this_device->raid_map.structure_size) >
3222                                 sizeof(this_device->raid_map)) {
3223                 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3224                 rc = -1;
3225         }
3226         hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3227         return rc;
3228 out:
3229         cmd_free(h, c);
3230         return rc;
3231 }
3232
3233 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3234                 unsigned char scsi3addr[], u16 bmic_device_index,
3235                 struct bmic_sense_subsystem_info *buf, size_t bufsize)
3236 {
3237         int rc = IO_OK;
3238         struct CommandList *c;
3239         struct ErrorInfo *ei;
3240
3241         c = cmd_alloc(h);
3242
3243         rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3244                 0, RAID_CTLR_LUNID, TYPE_CMD);
3245         if (rc)
3246                 goto out;
3247
3248         c->Request.CDB[2] = bmic_device_index & 0xff;
3249         c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3250
3251         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3252                                 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3253         if (rc)
3254                 goto out;
3255         ei = c->err_info;
3256         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3257                 hpsa_scsi_interpret_error(h, c);
3258                 rc = -1;
3259         }
3260 out:
3261         cmd_free(h, c);
3262         return rc;
3263 }
3264
3265 static int hpsa_bmic_id_controller(struct ctlr_info *h,
3266         struct bmic_identify_controller *buf, size_t bufsize)
3267 {
3268         int rc = IO_OK;
3269         struct CommandList *c;
3270         struct ErrorInfo *ei;
3271
3272         c = cmd_alloc(h);
3273
3274         rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3275                 0, RAID_CTLR_LUNID, TYPE_CMD);
3276         if (rc)
3277                 goto out;
3278
3279         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3280                 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3281         if (rc)
3282                 goto out;
3283         ei = c->err_info;
3284         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3285                 hpsa_scsi_interpret_error(h, c);
3286                 rc = -1;
3287         }
3288 out:
3289         cmd_free(h, c);
3290         return rc;
3291 }
3292
3293 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3294                 unsigned char scsi3addr[], u16 bmic_device_index,
3295                 struct bmic_identify_physical_device *buf, size_t bufsize)
3296 {
3297         int rc = IO_OK;
3298         struct CommandList *c;
3299         struct ErrorInfo *ei;
3300
3301         c = cmd_alloc(h);
3302         rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3303                 0, RAID_CTLR_LUNID, TYPE_CMD);
3304         if (rc)
3305                 goto out;
3306
3307         c->Request.CDB[2] = bmic_device_index & 0xff;
3308         c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3309
3310         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3311                                                 DEFAULT_TIMEOUT);
3312         ei = c->err_info;
3313         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3314                 hpsa_scsi_interpret_error(h, c);
3315                 rc = -1;
3316         }
3317 out:
3318         cmd_free(h, c);
3319
3320         return rc;
3321 }
3322
3323 /*
3324  * get enclosure information
3325  * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3326  * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3327  * Uses id_physical_device to determine the box_index.
3328  */
3329 static void hpsa_get_enclosure_info(struct ctlr_info *h,
3330                         unsigned char *scsi3addr,
3331                         struct ReportExtendedLUNdata *rlep, int rle_index,
3332                         struct hpsa_scsi_dev_t *encl_dev)
3333 {
3334         int rc = -1;
3335         struct CommandList *c = NULL;
3336         struct ErrorInfo *ei = NULL;
3337         struct bmic_sense_storage_box_params *bssbp = NULL;
3338         struct bmic_identify_physical_device *id_phys = NULL;
3339         struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3340         u16 bmic_device_index = 0;
3341
3342         bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3343
3344         if (encl_dev->target == -1 || encl_dev->lun == -1) {
3345                 rc = IO_OK;
3346                 goto out;
3347         }
3348
3349         if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
3350                 rc = IO_OK;
3351                 goto out;
3352         }
3353
3354         bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3355         if (!bssbp)
3356                 goto out;
3357
3358         id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3359         if (!id_phys)
3360                 goto out;
3361
3362         rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3363                                                 id_phys, sizeof(*id_phys));
3364         if (rc) {
3365                 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3366                         __func__, encl_dev->external, bmic_device_index);
3367                 goto out;
3368         }
3369
3370         c = cmd_alloc(h);
3371
3372         rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3373                         sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3374
3375         if (rc)
3376                 goto out;
3377
3378         if (id_phys->phys_connector[1] == 'E')
3379                 c->Request.CDB[5] = id_phys->box_index;
3380         else
3381                 c->Request.CDB[5] = 0;
3382
3383         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3384                                                 DEFAULT_TIMEOUT);
3385         if (rc)
3386                 goto out;
3387
3388         ei = c->err_info;
3389         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3390                 rc = -1;
3391                 goto out;
3392         }
3393
3394         encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3395         memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3396                 bssbp->phys_connector, sizeof(bssbp->phys_connector));
3397
3398         rc = IO_OK;
3399 out:
3400         kfree(bssbp);
3401         kfree(id_phys);
3402
3403         if (c)
3404                 cmd_free(h, c);
3405
3406         if (rc != IO_OK)
3407                 hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3408                         "Error, could not get enclosure information\n");
3409 }
3410
3411 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3412                                                 unsigned char *scsi3addr)
3413 {
3414         struct ReportExtendedLUNdata *physdev;
3415         u32 nphysicals;
3416         u64 sa = 0;
3417         int i;
3418
3419         physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3420         if (!physdev)
3421                 return 0;
3422
3423         if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3424                 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3425                 kfree(physdev);
3426                 return 0;
3427         }
3428         nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3429
3430         for (i = 0; i < nphysicals; i++)
3431                 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3432                         sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3433                         break;
3434                 }
3435
3436         kfree(physdev);
3437
3438         return sa;
3439 }
3440
3441 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3442                                         struct hpsa_scsi_dev_t *dev)
3443 {
3444         int rc;
3445         u64 sa = 0;
3446
3447         if (is_hba_lunid(scsi3addr)) {
3448                 struct bmic_sense_subsystem_info *ssi;
3449
3450                 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3451                 if (!ssi)
3452                         return;
3453
3454                 rc = hpsa_bmic_sense_subsystem_information(h,
3455                                         scsi3addr, 0, ssi, sizeof(*ssi));
3456                 if (rc == 0) {
3457                         sa = get_unaligned_be64(ssi->primary_world_wide_id);
3458                         h->sas_address = sa;
3459                 }
3460
3461                 kfree(ssi);
3462         } else
3463                 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3464
3465         dev->sas_address = sa;
3466 }
3467
3468 /* Get a device id from inquiry page 0x83 */
3469 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3470         unsigned char scsi3addr[], u8 page)
3471 {
3472         int rc;
3473         int i;
3474         int pages;
3475         unsigned char *buf, bufsize;
3476
3477         buf = kzalloc(256, GFP_KERNEL);
3478         if (!buf)
3479                 return false;
3480
3481         /* Get the size of the page list first */
3482         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3483                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3484                                 buf, HPSA_VPD_HEADER_SZ);
3485         if (rc != 0)
3486                 goto exit_unsupported;
3487         pages = buf[3];
3488         if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3489                 bufsize = pages + HPSA_VPD_HEADER_SZ;
3490         else
3491                 bufsize = 255;
3492
3493         /* Get the whole VPD page list */
3494         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3495                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3496                                 buf, bufsize);
3497         if (rc != 0)
3498                 goto exit_unsupported;
3499
3500         pages = buf[3];
3501         for (i = 1; i <= pages; i++)
3502                 if (buf[3 + i] == page)
3503                         goto exit_supported;
3504 exit_unsupported:
3505         kfree(buf);
3506         return false;
3507 exit_supported:
3508         kfree(buf);
3509         return true;
3510 }
3511
3512 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3513         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3514 {
3515         int rc;
3516         unsigned char *buf;
3517         u8 ioaccel_status;
3518
3519         this_device->offload_config = 0;
3520         this_device->offload_enabled = 0;
3521         this_device->offload_to_be_enabled = 0;
3522
3523         buf = kzalloc(64, GFP_KERNEL);
3524         if (!buf)
3525                 return;
3526         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3527                 goto out;
3528         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3529                         VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3530         if (rc != 0)
3531                 goto out;
3532
3533 #define IOACCEL_STATUS_BYTE 4
3534 #define OFFLOAD_CONFIGURED_BIT 0x01
3535 #define OFFLOAD_ENABLED_BIT 0x02
3536         ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3537         this_device->offload_config =
3538                 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3539         if (this_device->offload_config) {
3540                 this_device->offload_enabled =
3541                         !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3542                 if (hpsa_get_raid_map(h, scsi3addr, this_device))
3543                         this_device->offload_enabled = 0;
3544         }
3545         this_device->offload_to_be_enabled = this_device->offload_enabled;
3546 out:
3547         kfree(buf);
3548         return;
3549 }
3550
3551 /* Get the device id from inquiry page 0x83 */
3552 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3553         unsigned char *device_id, int index, int buflen)
3554 {
3555         int rc;
3556         unsigned char *buf;
3557
3558         /* Does controller have VPD for device id? */
3559         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
3560                 return 1; /* not supported */
3561
3562         buf = kzalloc(64, GFP_KERNEL);
3563         if (!buf)
3564                 return -ENOMEM;
3565
3566         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3567                                         HPSA_VPD_LV_DEVICE_ID, buf, 64);
3568         if (rc == 0) {
3569                 if (buflen > 16)
3570                         buflen = 16;
3571                 memcpy(device_id, &buf[8], buflen);
3572         }
3573
3574         kfree(buf);
3575
3576         return rc; /*0 - got id,  otherwise, didn't */
3577 }
3578
3579 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3580                 void *buf, int bufsize,
3581                 int extended_response)
3582 {
3583         int rc = IO_OK;
3584         struct CommandList *c;
3585         unsigned char scsi3addr[8];
3586         struct ErrorInfo *ei;
3587
3588         c = cmd_alloc(h);
3589
3590         /* address the controller */
3591         memset(scsi3addr, 0, sizeof(scsi3addr));
3592         if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3593                 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3594                 rc = -EAGAIN;
3595                 goto out;
3596         }
3597         if (extended_response)
3598                 c->Request.CDB[1] = extended_response;
3599         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3600                                         PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3601         if (rc)
3602                 goto out;
3603         ei = c->err_info;
3604         if (ei->CommandStatus != 0 &&
3605             ei->CommandStatus != CMD_DATA_UNDERRUN) {
3606                 hpsa_scsi_interpret_error(h, c);
3607                 rc = -EIO;
3608         } else {
3609                 struct ReportLUNdata *rld = buf;
3610
3611                 if (rld->extended_response_flag != extended_response) {
3612                         if (!h->legacy_board) {
3613                                 dev_err(&h->pdev->dev,
3614                                         "report luns requested format %u, got %u\n",
3615                                         extended_response,
3616                                         rld->extended_response_flag);
3617                                 rc = -EINVAL;
3618                         } else
3619                                 rc = -EOPNOTSUPP;
3620                 }
3621         }
3622 out:
3623         cmd_free(h, c);
3624         return rc;
3625 }
3626
3627 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3628                 struct ReportExtendedLUNdata *buf, int bufsize)
3629 {
3630         int rc;
3631         struct ReportLUNdata *lbuf;
3632
3633         rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3634                                       HPSA_REPORT_PHYS_EXTENDED);
3635         if (!rc || rc != -EOPNOTSUPP)
3636                 return rc;
3637
3638         /* REPORT PHYS EXTENDED is not supported */
3639         lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL);
3640         if (!lbuf)
3641                 return -ENOMEM;
3642
3643         rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0);
3644         if (!rc) {
3645                 int i;
3646                 u32 nphys;
3647
3648                 /* Copy ReportLUNdata header */
3649                 memcpy(buf, lbuf, 8);
3650                 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8;
3651                 for (i = 0; i < nphys; i++)
3652                         memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8);
3653         }
3654         kfree(lbuf);
3655         return rc;
3656 }
3657
3658 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3659                 struct ReportLUNdata *buf, int bufsize)
3660 {
3661         return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3662 }
3663
3664 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3665         int bus, int target, int lun)
3666 {
3667         device->bus = bus;
3668         device->target = target;
3669         device->lun = lun;
3670 }
3671
3672 /* Use VPD inquiry to get details of volume status */
3673 static int hpsa_get_volume_status(struct ctlr_info *h,
3674                                         unsigned char scsi3addr[])
3675 {
3676         int rc;
3677         int status;
3678         int size;
3679         unsigned char *buf;
3680
3681         buf = kzalloc(64, GFP_KERNEL);
3682         if (!buf)
3683                 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3684
3685         /* Does controller have VPD for logical volume status? */
3686         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3687                 goto exit_failed;
3688
3689         /* Get the size of the VPD return buffer */
3690         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3691                                         buf, HPSA_VPD_HEADER_SZ);
3692         if (rc != 0)
3693                 goto exit_failed;
3694         size = buf[3];
3695
3696         /* Now get the whole VPD buffer */
3697         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3698                                         buf, size + HPSA_VPD_HEADER_SZ);
3699         if (rc != 0)
3700                 goto exit_failed;
3701         status = buf[4]; /* status byte */
3702
3703         kfree(buf);
3704         return status;
3705 exit_failed:
3706         kfree(buf);
3707         return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3708 }
3709
3710 /* Determine offline status of a volume.
3711  * Return either:
3712  *  0 (not offline)
3713  *  0xff (offline for unknown reasons)
3714  *  # (integer code indicating one of several NOT READY states
3715  *     describing why a volume is to be kept offline)
3716  */
3717 static unsigned char hpsa_volume_offline(struct ctlr_info *h,
3718                                         unsigned char scsi3addr[])
3719 {
3720         struct CommandList *c;
3721         unsigned char *sense;
3722         u8 sense_key, asc, ascq;
3723         int sense_len;
3724         int rc, ldstat = 0;
3725         u16 cmd_status;
3726         u8 scsi_status;
3727 #define ASC_LUN_NOT_READY 0x04
3728 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3729 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3730
3731         c = cmd_alloc(h);
3732
3733         (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3734         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3735                                         DEFAULT_TIMEOUT);
3736         if (rc) {
3737                 cmd_free(h, c);
3738                 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3739         }
3740         sense = c->err_info->SenseInfo;
3741         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3742                 sense_len = sizeof(c->err_info->SenseInfo);
3743         else
3744                 sense_len = c->err_info->SenseLen;
3745         decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3746         cmd_status = c->err_info->CommandStatus;
3747         scsi_status = c->err_info->ScsiStatus;
3748         cmd_free(h, c);
3749
3750         /* Determine the reason for not ready state */
3751         ldstat = hpsa_get_volume_status(h, scsi3addr);
3752
3753         /* Keep volume offline in certain cases: */
3754         switch (ldstat) {
3755         case HPSA_LV_FAILED:
3756         case HPSA_LV_UNDERGOING_ERASE:
3757         case HPSA_LV_NOT_AVAILABLE:
3758         case HPSA_LV_UNDERGOING_RPI:
3759         case HPSA_LV_PENDING_RPI:
3760         case HPSA_LV_ENCRYPTED_NO_KEY:
3761         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3762         case HPSA_LV_UNDERGOING_ENCRYPTION:
3763         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3764         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3765                 return ldstat;
3766         case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3767                 /* If VPD status page isn't available,
3768                  * use ASC/ASCQ to determine state
3769                  */
3770                 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3771                         (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3772                         return ldstat;
3773                 break;
3774         default:
3775                 break;
3776         }
3777         return HPSA_LV_OK;
3778 }
3779
3780 static int hpsa_update_device_info(struct ctlr_info *h,
3781         unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3782         unsigned char *is_OBDR_device)
3783 {
3784
3785 #define OBDR_SIG_OFFSET 43
3786 #define OBDR_TAPE_SIG "$DR-10"
3787 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3788 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3789
3790         unsigned char *inq_buff;
3791         unsigned char *obdr_sig;
3792         int rc = 0;
3793
3794         inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3795         if (!inq_buff) {
3796                 rc = -ENOMEM;
3797                 goto bail_out;
3798         }
3799
3800         /* Do an inquiry to the device to see what it is. */
3801         if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3802                 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3803                 dev_err(&h->pdev->dev,
3804                         "%s: inquiry failed, device will be skipped.\n",
3805                         __func__);
3806                 rc = HPSA_INQUIRY_FAILED;
3807                 goto bail_out;
3808         }
3809
3810         scsi_sanitize_inquiry_string(&inq_buff[8], 8);
3811         scsi_sanitize_inquiry_string(&inq_buff[16], 16);
3812
3813         this_device->devtype = (inq_buff[0] & 0x1f);
3814         memcpy(this_device->scsi3addr, scsi3addr, 8);
3815         memcpy(this_device->vendor, &inq_buff[8],
3816                 sizeof(this_device->vendor));
3817         memcpy(this_device->model, &inq_buff[16],
3818                 sizeof(this_device->model));
3819         this_device->rev = inq_buff[2];
3820         memset(this_device->device_id, 0,
3821                 sizeof(this_device->device_id));
3822         if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3823                 sizeof(this_device->device_id)) < 0)
3824                 dev_err(&h->pdev->dev,
3825                         "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n",
3826                         h->ctlr, __func__,
3827                         h->scsi_host->host_no,
3828                         this_device->target, this_device->lun,
3829                         scsi_device_type(this_device->devtype),
3830                         this_device->model);
3831
3832         if ((this_device->devtype == TYPE_DISK ||
3833                 this_device->devtype == TYPE_ZBC) &&
3834                 is_logical_dev_addr_mode(scsi3addr)) {
3835                 unsigned char volume_offline;
3836
3837                 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3838                 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3839                         hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3840                 volume_offline = hpsa_volume_offline(h, scsi3addr);
3841                 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED &&
3842                     h->legacy_board) {
3843                         /*
3844                          * Legacy boards might not support volume status
3845                          */
3846                         dev_info(&h->pdev->dev,
3847                                  "C0:T%d:L%d Volume status not available, assuming online.\n",
3848                                  this_device->target, this_device->lun);
3849                         volume_offline = 0;
3850                 }
3851                 this_device->volume_offline = volume_offline;
3852                 if (volume_offline == HPSA_LV_FAILED) {
3853                         rc = HPSA_LV_FAILED;
3854                         dev_err(&h->pdev->dev,
3855                                 "%s: LV failed, device will be skipped.\n",
3856                                 __func__);
3857                         goto bail_out;
3858                 }
3859         } else {
3860                 this_device->raid_level = RAID_UNKNOWN;
3861                 this_device->offload_config = 0;
3862                 this_device->offload_enabled = 0;
3863                 this_device->offload_to_be_enabled = 0;
3864                 this_device->hba_ioaccel_enabled = 0;
3865                 this_device->volume_offline = 0;
3866                 this_device->queue_depth = h->nr_cmds;
3867         }
3868
3869         if (this_device->external)
3870                 this_device->queue_depth = EXTERNAL_QD;
3871
3872         if (is_OBDR_device) {
3873                 /* See if this is a One-Button-Disaster-Recovery device
3874                  * by looking for "$DR-10" at offset 43 in inquiry data.
3875                  */
3876                 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
3877                 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
3878                                         strncmp(obdr_sig, OBDR_TAPE_SIG,
3879                                                 OBDR_SIG_LEN) == 0);
3880         }
3881         kfree(inq_buff);
3882         return 0;
3883
3884 bail_out:
3885         kfree(inq_buff);
3886         return rc;
3887 }
3888
3889 /*
3890  * Helper function to assign bus, target, lun mapping of devices.
3891  * Logical drive target and lun are assigned at this time, but
3892  * physical device lun and target assignment are deferred (assigned
3893  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3894 */
3895 static void figure_bus_target_lun(struct ctlr_info *h,
3896         u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3897 {
3898         u32 lunid = get_unaligned_le32(lunaddrbytes);
3899
3900         if (!is_logical_dev_addr_mode(lunaddrbytes)) {
3901                 /* physical device, target and lun filled in later */
3902                 if (is_hba_lunid(lunaddrbytes)) {
3903                         int bus = HPSA_HBA_BUS;
3904
3905                         if (!device->rev)
3906                                 bus = HPSA_LEGACY_HBA_BUS;
3907                         hpsa_set_bus_target_lun(device,
3908                                         bus, 0, lunid & 0x3fff);
3909                 } else
3910                         /* defer target, lun assignment for physical devices */
3911                         hpsa_set_bus_target_lun(device,
3912                                         HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
3913                 return;
3914         }
3915         /* It's a logical device */
3916         if (device->external) {
3917                 hpsa_set_bus_target_lun(device,
3918                         HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
3919                         lunid & 0x00ff);
3920                 return;
3921         }
3922         hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
3923                                 0, lunid & 0x3fff);
3924 }
3925
3926 static int  figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
3927         int i, int nphysicals, int nlocal_logicals)
3928 {
3929         /* In report logicals, local logicals are listed first,
3930         * then any externals.
3931         */
3932         int logicals_start = nphysicals + (raid_ctlr_position == 0);
3933
3934         if (i == raid_ctlr_position)
3935                 return 0;
3936
3937         if (i < logicals_start)
3938                 return 0;
3939
3940         /* i is in logicals range, but still within local logicals */
3941         if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
3942                 return 0;
3943
3944         return 1; /* it's an external lun */
3945 }
3946
3947 /*
3948  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
3949  * logdev.  The number of luns in physdev and logdev are returned in
3950  * *nphysicals and *nlogicals, respectively.
3951  * Returns 0 on success, -1 otherwise.
3952  */
3953 static int hpsa_gather_lun_info(struct ctlr_info *h,
3954         struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
3955         struct ReportLUNdata *logdev, u32 *nlogicals)
3956 {
3957         if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3958                 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3959                 return -1;
3960         }
3961         *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
3962         if (*nphysicals > HPSA_MAX_PHYS_LUN) {
3963                 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
3964                         HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
3965                 *nphysicals = HPSA_MAX_PHYS_LUN;
3966         }
3967         if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
3968                 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
3969                 return -1;
3970         }
3971         *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
3972         /* Reject Logicals in excess of our max capability. */
3973         if (*nlogicals > HPSA_MAX_LUN) {
3974                 dev_warn(&h->pdev->dev,
3975                         "maximum logical LUNs (%d) exceeded.  "
3976                         "%d LUNs ignored.\n", HPSA_MAX_LUN,
3977                         *nlogicals - HPSA_MAX_LUN);
3978                         *nlogicals = HPSA_MAX_LUN;
3979         }
3980         if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
3981                 dev_warn(&h->pdev->dev,
3982                         "maximum logical + physical LUNs (%d) exceeded. "
3983                         "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
3984                         *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
3985                 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
3986         }
3987         return 0;
3988 }
3989
3990 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
3991         int i, int nphysicals, int nlogicals,
3992         struct ReportExtendedLUNdata *physdev_list,
3993         struct ReportLUNdata *logdev_list)
3994 {
3995         /* Helper function, figure out where the LUN ID info is coming from
3996          * given index i, lists of physical and logical devices, where in
3997          * the list the raid controller is supposed to appear (first or last)
3998          */
3999
4000         int logicals_start = nphysicals + (raid_ctlr_position == 0);
4001         int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4002
4003         if (i == raid_ctlr_position)
4004                 return RAID_CTLR_LUNID;
4005
4006         if (i < logicals_start)
4007                 return &physdev_list->LUN[i -
4008                                 (raid_ctlr_position == 0)].lunid[0];
4009
4010         if (i < last_device)
4011                 return &logdev_list->LUN[i - nphysicals -
4012                         (raid_ctlr_position == 0)][0];
4013         BUG();
4014         return NULL;
4015 }
4016
4017 /* get physical drive ioaccel handle and queue depth */
4018 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
4019                 struct hpsa_scsi_dev_t *dev,
4020                 struct ReportExtendedLUNdata *rlep, int rle_index,
4021                 struct bmic_identify_physical_device *id_phys)
4022 {
4023         int rc;
4024         struct ext_report_lun_entry *rle;
4025
4026         rle = &rlep->LUN[rle_index];
4027
4028         dev->ioaccel_handle = rle->ioaccel_handle;
4029         if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4030                 dev->hba_ioaccel_enabled = 1;
4031         memset(id_phys, 0, sizeof(*id_phys));
4032         rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4033                         GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
4034                         sizeof(*id_phys));
4035         if (!rc)
4036                 /* Reserve space for FW operations */
4037 #define DRIVE_CMDS_RESERVED_FOR_FW 2
4038 #define DRIVE_QUEUE_DEPTH 7
4039                 dev->queue_depth =
4040                         le16_to_cpu(id_phys->current_queue_depth_limit) -
4041                                 DRIVE_CMDS_RESERVED_FOR_FW;
4042         else
4043                 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
4044 }
4045
4046 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4047         struct ReportExtendedLUNdata *rlep, int rle_index,
4048         struct bmic_identify_physical_device *id_phys)
4049 {
4050         struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
4051
4052         if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
4053                 this_device->hba_ioaccel_enabled = 1;
4054
4055         memcpy(&this_device->active_path_index,
4056                 &id_phys->active_path_number,
4057                 sizeof(this_device->active_path_index));
4058         memcpy(&this_device->path_map,
4059                 &id_phys->redundant_path_present_map,
4060                 sizeof(this_device->path_map));
4061         memcpy(&this_device->box,
4062                 &id_phys->alternate_paths_phys_box_on_port,
4063                 sizeof(this_device->box));
4064         memcpy(&this_device->phys_connector,
4065                 &id_phys->alternate_paths_phys_connector,
4066                 sizeof(this_device->phys_connector));
4067         memcpy(&this_device->bay,
4068                 &id_phys->phys_bay_in_box,
4069                 sizeof(this_device->bay));
4070 }
4071
4072 /* get number of local logical disks. */
4073 static int hpsa_set_local_logical_count(struct ctlr_info *h,
4074         struct bmic_identify_controller *id_ctlr,
4075         u32 *nlocals)
4076 {
4077         int rc;
4078
4079         if (!id_ctlr) {
4080                 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
4081                         __func__);
4082                 return -ENOMEM;
4083         }
4084         memset(id_ctlr, 0, sizeof(*id_ctlr));
4085         rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
4086         if (!rc)
4087                 if (id_ctlr->configured_logical_drive_count < 255)
4088                         *nlocals = id_ctlr->configured_logical_drive_count;
4089                 else
4090                         *nlocals = le16_to_cpu(
4091                                         id_ctlr->extended_logical_unit_count);
4092         else
4093                 *nlocals = -1;
4094         return rc;
4095 }
4096
4097 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
4098 {
4099         struct bmic_identify_physical_device *id_phys;
4100         bool is_spare = false;
4101         int rc;
4102
4103         id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4104         if (!id_phys)
4105                 return false;
4106
4107         rc = hpsa_bmic_id_physical_device(h,
4108                                         lunaddrbytes,
4109                                         GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
4110                                         id_phys, sizeof(*id_phys));
4111         if (rc == 0)
4112                 is_spare = (id_phys->more_flags >> 6) & 0x01;
4113
4114         kfree(id_phys);
4115         return is_spare;
4116 }
4117
4118 #define RPL_DEV_FLAG_NON_DISK                           0x1
4119 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED  0x2
4120 #define RPL_DEV_FLAG_UNCONFIG_DISK                      0x4
4121
4122 #define BMIC_DEVICE_TYPE_ENCLOSURE  6
4123
4124 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
4125                                 struct ext_report_lun_entry *rle)
4126 {
4127         u8 device_flags;
4128         u8 device_type;
4129
4130         if (!MASKED_DEVICE(lunaddrbytes))
4131                 return false;
4132
4133         device_flags = rle->device_flags;
4134         device_type = rle->device_type;
4135
4136         if (device_flags & RPL_DEV_FLAG_NON_DISK) {
4137                 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
4138                         return false;
4139                 return true;
4140         }
4141
4142         if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
4143                 return false;
4144
4145         if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
4146                 return false;
4147
4148         /*
4149          * Spares may be spun down, we do not want to
4150          * do an Inquiry to a RAID set spare drive as
4151          * that would have them spun up, that is a
4152          * performance hit because I/O to the RAID device
4153          * stops while the spin up occurs which can take
4154          * over 50 seconds.
4155          */
4156         if (hpsa_is_disk_spare(h, lunaddrbytes))
4157                 return true;
4158
4159         return false;
4160 }
4161
4162 static void hpsa_update_scsi_devices(struct ctlr_info *h)
4163 {
4164         /* the idea here is we could get notified
4165          * that some devices have changed, so we do a report
4166          * physical luns and report logical luns cmd, and adjust
4167          * our list of devices accordingly.
4168          *
4169          * The scsi3addr's of devices won't change so long as the
4170          * adapter is not reset.  That means we can rescan and
4171          * tell which devices we already know about, vs. new
4172          * devices, vs.  disappearing devices.
4173          */
4174         struct ReportExtendedLUNdata *physdev_list = NULL;
4175         struct ReportLUNdata *logdev_list = NULL;
4176         struct bmic_identify_physical_device *id_phys = NULL;
4177         struct bmic_identify_controller *id_ctlr = NULL;
4178         u32 nphysicals = 0;
4179         u32 nlogicals = 0;
4180         u32 nlocal_logicals = 0;
4181         u32 ndev_allocated = 0;
4182         struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4183         int ncurrent = 0;
4184         int i, n_ext_target_devs, ndevs_to_allocate;
4185         int raid_ctlr_position;
4186         bool physical_device;
4187         DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4188
4189         currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
4190         physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4191         logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4192         tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
4193         id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4194         id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4195
4196         if (!currentsd || !physdev_list || !logdev_list ||
4197                 !tmpdevice || !id_phys || !id_ctlr) {
4198                 dev_err(&h->pdev->dev, "out of memory\n");
4199                 goto out;
4200         }
4201         memset(lunzerobits, 0, sizeof(lunzerobits));
4202
4203         h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4204
4205         if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4206                         logdev_list, &nlogicals)) {
4207                 h->drv_req_rescan = 1;
4208                 goto out;
4209         }
4210
4211         /* Set number of local logicals (non PTRAID) */
4212         if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4213                 dev_warn(&h->pdev->dev,
4214                         "%s: Can't determine number of local logical devices.\n",
4215                         __func__);
4216         }
4217
4218         /* We might see up to the maximum number of logical and physical disks
4219          * plus external target devices, and a device for the local RAID
4220          * controller.
4221          */
4222         ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4223
4224         /* Allocate the per device structures */
4225         for (i = 0; i < ndevs_to_allocate; i++) {
4226                 if (i >= HPSA_MAX_DEVICES) {
4227                         dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4228                                 "  %d devices ignored.\n", HPSA_MAX_DEVICES,
4229                                 ndevs_to_allocate - HPSA_MAX_DEVICES);
4230                         break;
4231                 }
4232
4233                 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4234                 if (!currentsd[i]) {
4235                         h->drv_req_rescan = 1;
4236                         goto out;
4237                 }
4238                 ndev_allocated++;
4239         }
4240
4241         if (is_scsi_rev_5(h))
4242                 raid_ctlr_position = 0;
4243         else
4244                 raid_ctlr_position = nphysicals + nlogicals;
4245
4246         /* adjust our table of devices */
4247         n_ext_target_devs = 0;
4248         for (i = 0; i < nphysicals + nlogicals + 1; i++) {
4249                 u8 *lunaddrbytes, is_OBDR = 0;
4250                 int rc = 0;
4251                 int phys_dev_index = i - (raid_ctlr_position == 0);
4252                 bool skip_device = false;
4253
4254                 physical_device = i < nphysicals + (raid_ctlr_position == 0);
4255
4256                 /* Figure out where the LUN ID info is coming from */
4257                 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4258                         i, nphysicals, nlogicals, physdev_list, logdev_list);
4259
4260                 /* Determine if this is a lun from an external target array */
4261                 tmpdevice->external =
4262                         figure_external_status(h, raid_ctlr_position, i,
4263                                                 nphysicals, nlocal_logicals);
4264
4265                 /*
4266                  * Skip over some devices such as a spare.
4267                  */
4268                 if (!tmpdevice->external && physical_device) {
4269                         skip_device = hpsa_skip_device(h, lunaddrbytes,
4270                                         &physdev_list->LUN[phys_dev_index]);
4271                         if (skip_device)
4272                                 continue;
4273                 }
4274
4275                 /* Get device type, vendor, model, device id */
4276                 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4277                                                         &is_OBDR);
4278                 if (rc == -ENOMEM) {
4279                         dev_warn(&h->pdev->dev,
4280                                 "Out of memory, rescan deferred.\n");
4281                         h->drv_req_rescan = 1;
4282                         goto out;
4283                 }
4284                 if (rc) {
4285                         h->drv_req_rescan = 1;
4286                         continue;
4287                 }
4288
4289                 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4290                 this_device = currentsd[ncurrent];
4291
4292                 /* Turn on discovery_polling if there are ext target devices.
4293                  * Event-based change notification is unreliable for those.
4294                  */
4295                 if (!h->discovery_polling) {
4296                         if (tmpdevice->external) {
4297                                 h->discovery_polling = 1;
4298                                 dev_info(&h->pdev->dev,
4299                                         "External target, activate discovery polling.\n");
4300                         }
4301                 }
4302
4303
4304                 *this_device = *tmpdevice;
4305                 this_device->physical_device = physical_device;
4306
4307                 /*
4308                  * Expose all devices except for physical devices that
4309                  * are masked.
4310                  */
4311                 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
4312                         this_device->expose_device = 0;
4313                 else
4314                         this_device->expose_device = 1;
4315
4316
4317                 /*
4318                  * Get the SAS address for physical devices that are exposed.
4319                  */
4320                 if (this_device->physical_device && this_device->expose_device)
4321                         hpsa_get_sas_address(h, lunaddrbytes, this_device);
4322
4323                 switch (this_device->devtype) {
4324                 case TYPE_ROM:
4325                         /* We don't *really* support actual CD-ROM devices,
4326                          * just "One Button Disaster Recovery" tape drive
4327                          * which temporarily pretends to be a CD-ROM drive.
4328                          * So we check that the device is really an OBDR tape
4329                          * device by checking for "$DR-10" in bytes 43-48 of
4330                          * the inquiry data.
4331                          */
4332                         if (is_OBDR)
4333                                 ncurrent++;
4334                         break;
4335                 case TYPE_DISK:
4336                 case TYPE_ZBC:
4337                         if (this_device->physical_device) {
4338                                 /* The disk is in HBA mode. */
4339                                 /* Never use RAID mapper in HBA mode. */
4340                                 this_device->offload_enabled = 0;
4341                                 hpsa_get_ioaccel_drive_info(h, this_device,
4342                                         physdev_list, phys_dev_index, id_phys);
4343                                 hpsa_get_path_info(this_device,
4344                                         physdev_list, phys_dev_index, id_phys);
4345                         }
4346                         ncurrent++;
4347                         break;
4348                 case TYPE_TAPE:
4349                 case TYPE_MEDIUM_CHANGER:
4350                         ncurrent++;
4351                         break;
4352                 case TYPE_ENCLOSURE:
4353                         if (!this_device->external)
4354                                 hpsa_get_enclosure_info(h, lunaddrbytes,
4355                                                 physdev_list, phys_dev_index,
4356                                                 this_device);
4357                         ncurrent++;
4358                         break;
4359                 case TYPE_RAID:
4360                         /* Only present the Smartarray HBA as a RAID controller.
4361                          * If it's a RAID controller other than the HBA itself
4362                          * (an external RAID controller, MSA500 or similar)
4363                          * don't present it.
4364                          */
4365                         if (!is_hba_lunid(lunaddrbytes))
4366                                 break;
4367                         ncurrent++;
4368                         break;
4369                 default:
4370                         break;
4371                 }
4372                 if (ncurrent >= HPSA_MAX_DEVICES)
4373                         break;
4374         }
4375
4376         if (h->sas_host == NULL) {
4377                 int rc = 0;
4378
4379                 rc = hpsa_add_sas_host(h);
4380                 if (rc) {
4381                         dev_warn(&h->pdev->dev,
4382                                 "Could not add sas host %d\n", rc);
4383                         goto out;
4384                 }
4385         }
4386
4387         adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4388 out:
4389         kfree(tmpdevice);
4390         for (i = 0; i < ndev_allocated; i++)
4391                 kfree(currentsd[i]);
4392         kfree(currentsd);
4393         kfree(physdev_list);
4394         kfree(logdev_list);
4395         kfree(id_ctlr);
4396         kfree(id_phys);
4397 }
4398
4399 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4400                                    struct scatterlist *sg)
4401 {
4402         u64 addr64 = (u64) sg_dma_address(sg);
4403         unsigned int len = sg_dma_len(sg);
4404
4405         desc->Addr = cpu_to_le64(addr64);
4406         desc->Len = cpu_to_le32(len);
4407         desc->Ext = 0;
4408 }
4409
4410 /*
4411  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4412  * dma mapping  and fills in the scatter gather entries of the
4413  * hpsa command, cp.
4414  */
4415 static int hpsa_scatter_gather(struct ctlr_info *h,
4416                 struct CommandList *cp,
4417                 struct scsi_cmnd *cmd)
4418 {
4419         struct scatterlist *sg;
4420         int use_sg, i, sg_limit, chained, last_sg;
4421         struct SGDescriptor *curr_sg;
4422
4423         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4424
4425         use_sg = scsi_dma_map(cmd);
4426         if (use_sg < 0)
4427                 return use_sg;
4428
4429         if (!use_sg)
4430                 goto sglist_finished;
4431
4432         /*
4433          * If the number of entries is greater than the max for a single list,
4434          * then we have a chained list; we will set up all but one entry in the
4435          * first list (the last entry is saved for link information);
4436          * otherwise, we don't have a chained list and we'll set up at each of
4437          * the entries in the one list.
4438          */
4439         curr_sg = cp->SG;
4440         chained = use_sg > h->max_cmd_sg_entries;
4441         sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4442         last_sg = scsi_sg_count(cmd) - 1;
4443         scsi_for_each_sg(cmd, sg, sg_limit, i) {
4444                 hpsa_set_sg_descriptor(curr_sg, sg);
4445                 curr_sg++;
4446         }
4447
4448         if (chained) {
4449                 /*
4450                  * Continue with the chained list.  Set curr_sg to the chained
4451                  * list.  Modify the limit to the total count less the entries
4452                  * we've already set up.  Resume the scan at the list entry
4453                  * where the previous loop left off.
4454                  */
4455                 curr_sg = h->cmd_sg_list[cp->cmdindex];
4456                 sg_limit = use_sg - sg_limit;
4457                 for_each_sg(sg, sg, sg_limit, i) {
4458                         hpsa_set_sg_descriptor(curr_sg, sg);
4459                         curr_sg++;
4460                 }
4461         }
4462
4463         /* Back the pointer up to the last entry and mark it as "last". */
4464         (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4465
4466         if (use_sg + chained > h->maxSG)
4467                 h->maxSG = use_sg + chained;
4468
4469         if (chained) {
4470                 cp->Header.SGList = h->max_cmd_sg_entries;
4471                 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4472                 if (hpsa_map_sg_chain_block(h, cp)) {
4473                         scsi_dma_unmap(cmd);
4474                         return -1;
4475                 }
4476                 return 0;
4477         }
4478
4479 sglist_finished:
4480
4481         cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
4482         cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4483         return 0;
4484 }
4485
4486 #define BUFLEN 128
4487 static inline void warn_zero_length_transfer(struct ctlr_info *h,
4488                                                 u8 *cdb, int cdb_len,
4489                                                 const char *func)
4490 {
4491         char buf[BUFLEN];
4492         int outlen;
4493         int i;
4494
4495         outlen = scnprintf(buf, BUFLEN,
4496                                 "%s: Blocking zero-length request: CDB:", func);
4497         for (i = 0; i < cdb_len; i++)
4498                 outlen += scnprintf(buf+outlen, BUFLEN - outlen,
4499                                         "%02hhx", cdb[i]);
4500         dev_warn(&h->pdev->dev, "%s\n", buf);
4501 }
4502
4503 #define IO_ACCEL_INELIGIBLE 1
4504 /* zero-length transfers trigger hardware errors. */
4505 static bool is_zero_length_transfer(u8 *cdb)
4506 {
4507         u32 block_cnt;
4508
4509         /* Block zero-length transfer sizes on certain commands. */
4510         switch (cdb[0]) {
4511         case READ_10:
4512         case WRITE_10:
4513         case VERIFY:            /* 0x2F */
4514         case WRITE_VERIFY:      /* 0x2E */
4515                 block_cnt = get_unaligned_be16(&cdb[7]);
4516                 break;
4517         case READ_12:
4518         case WRITE_12:
4519         case VERIFY_12: /* 0xAF */
4520         case WRITE_VERIFY_12:   /* 0xAE */
4521                 block_cnt = get_unaligned_be32(&cdb[6]);
4522                 break;
4523         case READ_16:
4524         case WRITE_16:
4525         case VERIFY_16:         /* 0x8F */
4526                 block_cnt = get_unaligned_be32(&cdb[10]);
4527                 break;
4528         default:
4529                 return false;
4530         }
4531
4532         return block_cnt == 0;
4533 }
4534
4535 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4536 {
4537         int is_write = 0;
4538         u32 block;
4539         u32 block_cnt;
4540
4541         /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4542         switch (cdb[0]) {
4543         case WRITE_6:
4544         case WRITE_12:
4545                 is_write = 1;
4546         case READ_6:
4547         case READ_12:
4548                 if (*cdb_len == 6) {
4549                         block = (((cdb[1] & 0x1F) << 16) |
4550                                 (cdb[2] << 8) |
4551                                 cdb[3]);
4552                         block_cnt = cdb[4];
4553                         if (block_cnt == 0)
4554                                 block_cnt = 256;
4555                 } else {
4556                         BUG_ON(*cdb_len != 12);
4557                         block = get_unaligned_be32(&cdb[2]);
4558                         block_cnt = get_unaligned_be32(&cdb[6]);
4559                 }
4560                 if (block_cnt > 0xffff)
4561                         return IO_ACCEL_INELIGIBLE;
4562
4563                 cdb[0] = is_write ? WRITE_10 : READ_10;
4564                 cdb[1] = 0;
4565                 cdb[2] = (u8) (block >> 24);
4566                 cdb[3] = (u8) (block >> 16);
4567                 cdb[4] = (u8) (block >> 8);
4568                 cdb[5] = (u8) (block);
4569                 cdb[6] = 0;
4570                 cdb[7] = (u8) (block_cnt >> 8);
4571                 cdb[8] = (u8) (block_cnt);
4572                 cdb[9] = 0;
4573                 *cdb_len = 10;
4574                 break;
4575         }
4576         return 0;
4577 }
4578
4579 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4580         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4581         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4582 {
4583         struct scsi_cmnd *cmd = c->scsi_cmd;
4584         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4585         unsigned int len;
4586         unsigned int total_len = 0;
4587         struct scatterlist *sg;
4588         u64 addr64;
4589         int use_sg, i;
4590         struct SGDescriptor *curr_sg;
4591         u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4592
4593         /* TODO: implement chaining support */
4594         if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4595                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4596                 return IO_ACCEL_INELIGIBLE;
4597         }
4598
4599         BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4600
4601         if (is_zero_length_transfer(cdb)) {
4602                 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4603                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4604                 return IO_ACCEL_INELIGIBLE;
4605         }
4606
4607         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4608                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4609                 return IO_ACCEL_INELIGIBLE;
4610         }
4611
4612         c->cmd_type = CMD_IOACCEL1;
4613
4614         /* Adjust the DMA address to point to the accelerated command buffer */
4615         c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4616                                 (c->cmdindex * sizeof(*cp));
4617         BUG_ON(c->busaddr & 0x0000007F);
4618
4619         use_sg = scsi_dma_map(cmd);
4620         if (use_sg < 0) {
4621                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4622                 return use_sg;
4623         }
4624
4625         if (use_sg) {
4626                 curr_sg = cp->SG;
4627                 scsi_for_each_sg(cmd, sg, use_sg, i) {
4628                         addr64 = (u64) sg_dma_address(sg);
4629                         len  = sg_dma_len(sg);
4630                         total_len += len;
4631                         curr_sg->Addr = cpu_to_le64(addr64);
4632                         curr_sg->Len = cpu_to_le32(len);
4633                         curr_sg->Ext = cpu_to_le32(0);
4634                         curr_sg++;
4635                 }
4636                 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4637
4638                 switch (cmd->sc_data_direction) {
4639                 case DMA_TO_DEVICE:
4640                         control |= IOACCEL1_CONTROL_DATA_OUT;
4641                         break;
4642                 case DMA_FROM_DEVICE:
4643                         control |= IOACCEL1_CONTROL_DATA_IN;
4644                         break;
4645                 case DMA_NONE:
4646                         control |= IOACCEL1_CONTROL_NODATAXFER;
4647                         break;
4648                 default:
4649                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4650                         cmd->sc_data_direction);
4651                         BUG();
4652                         break;
4653                 }
4654         } else {
4655                 control |= IOACCEL1_CONTROL_NODATAXFER;
4656         }
4657
4658         c->Header.SGList = use_sg;
4659         /* Fill out the command structure to submit */
4660         cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4661         cp->transfer_len = cpu_to_le32(total_len);
4662         cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4663                         (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4664         cp->control = cpu_to_le32(control);
4665         memcpy(cp->CDB, cdb, cdb_len);
4666         memcpy(cp->CISS_LUN, scsi3addr, 8);
4667         /* Tag was already set at init time. */
4668         enqueue_cmd_and_start_io(h, c);
4669         return 0;
4670 }
4671
4672 /*
4673  * Queue a command directly to a device behind the controller using the
4674  * I/O accelerator path.
4675  */
4676 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4677         struct CommandList *c)
4678 {
4679         struct scsi_cmnd *cmd = c->scsi_cmd;
4680         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4681
4682         if (!dev)
4683                 return -1;
4684
4685         c->phys_disk = dev;
4686
4687         return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4688                 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4689 }
4690
4691 /*
4692  * Set encryption parameters for the ioaccel2 request
4693  */
4694 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4695         struct CommandList *c, struct io_accel2_cmd *cp)
4696 {
4697         struct scsi_cmnd *cmd = c->scsi_cmd;
4698         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4699         struct raid_map_data *map = &dev->raid_map;
4700         u64 first_block;
4701
4702         /* Are we doing encryption on this device */
4703         if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4704                 return;
4705         /* Set the data encryption key index. */
4706         cp->dekindex = map->dekindex;
4707
4708         /* Set the encryption enable flag, encoded into direction field. */
4709         cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4710
4711         /* Set encryption tweak values based on logical block address
4712          * If block size is 512, tweak value is LBA.
4713          * For other block sizes, tweak is (LBA * block size)/ 512)
4714          */
4715         switch (cmd->cmnd[0]) {
4716         /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4717         case READ_6:
4718         case WRITE_6:
4719                 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4720                                 (cmd->cmnd[2] << 8) |
4721                                 cmd->cmnd[3]);
4722                 break;
4723         case WRITE_10:
4724         case READ_10:
4725         /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4726         case WRITE_12:
4727         case READ_12:
4728                 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4729                 break;
4730         case WRITE_16:
4731         case READ_16:
4732                 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4733                 break;
4734         default:
4735                 dev_err(&h->pdev->dev,
4736                         "ERROR: %s: size (0x%x) not supported for encryption\n",
4737                         __func__, cmd->cmnd[0]);
4738                 BUG();
4739                 break;
4740         }
4741
4742         if (le32_to_cpu(map->volume_blk_size) != 512)
4743                 first_block = first_block *
4744                                 le32_to_cpu(map->volume_blk_size)/512;
4745
4746         cp->tweak_lower = cpu_to_le32(first_block);
4747         cp->tweak_upper = cpu_to_le32(first_block >> 32);
4748 }
4749
4750 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4751         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4752         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4753 {
4754         struct scsi_cmnd *cmd = c->scsi_cmd;
4755         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4756         struct ioaccel2_sg_element *curr_sg;
4757         int use_sg, i;
4758         struct scatterlist *sg;
4759         u64 addr64;
4760         u32 len;
4761         u32 total_len = 0;
4762
4763         if (!cmd->device)
4764                 return -1;
4765
4766         if (!cmd->device->hostdata)
4767                 return -1;
4768
4769         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4770
4771         if (is_zero_length_transfer(cdb)) {
4772                 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4773                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4774                 return IO_ACCEL_INELIGIBLE;
4775         }
4776
4777         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4778                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4779                 return IO_ACCEL_INELIGIBLE;
4780         }
4781
4782         c->cmd_type = CMD_IOACCEL2;
4783         /* Adjust the DMA address to point to the accelerated command buffer */
4784         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4785                                 (c->cmdindex * sizeof(*cp));
4786         BUG_ON(c->busaddr & 0x0000007F);
4787
4788         memset(cp, 0, sizeof(*cp));
4789         cp->IU_type = IOACCEL2_IU_TYPE;
4790
4791         use_sg = scsi_dma_map(cmd);
4792         if (use_sg < 0) {
4793                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4794                 return use_sg;
4795         }
4796
4797         if (use_sg) {
4798                 curr_sg = cp->sg;
4799                 if (use_sg > h->ioaccel_maxsg) {
4800                         addr64 = le64_to_cpu(
4801                                 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4802                         curr_sg->address = cpu_to_le64(addr64);
4803                         curr_sg->length = 0;
4804                         curr_sg->reserved[0] = 0;
4805                         curr_sg->reserved[1] = 0;
4806                         curr_sg->reserved[2] = 0;
4807                         curr_sg->chain_indicator = IOACCEL2_CHAIN;
4808
4809                         curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4810                 }
4811                 scsi_for_each_sg(cmd, sg, use_sg, i) {
4812                         addr64 = (u64) sg_dma_address(sg);
4813                         len  = sg_dma_len(sg);
4814                         total_len += len;
4815                         curr_sg->address = cpu_to_le64(addr64);
4816                         curr_sg->length = cpu_to_le32(len);
4817                         curr_sg->reserved[0] = 0;
4818                         curr_sg->reserved[1] = 0;
4819                         curr_sg->reserved[2] = 0;
4820                         curr_sg->chain_indicator = 0;
4821                         curr_sg++;
4822                 }
4823
4824                 /*
4825                  * Set the last s/g element bit
4826                  */
4827                 (curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG;
4828
4829                 switch (cmd->sc_data_direction) {
4830                 case DMA_TO_DEVICE:
4831                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4832                         cp->direction |= IOACCEL2_DIR_DATA_OUT;
4833                         break;
4834                 case DMA_FROM_DEVICE:
4835                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4836                         cp->direction |= IOACCEL2_DIR_DATA_IN;
4837                         break;
4838                 case DMA_NONE:
4839                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4840                         cp->direction |= IOACCEL2_DIR_NO_DATA;
4841                         break;
4842                 default:
4843                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4844                                 cmd->sc_data_direction);
4845                         BUG();
4846                         break;
4847                 }
4848         } else {
4849                 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4850                 cp->direction |= IOACCEL2_DIR_NO_DATA;
4851         }
4852
4853         /* Set encryption parameters, if necessary */
4854         set_encrypt_ioaccel2(h, c, cp);
4855
4856         cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4857         cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4858         memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4859
4860         cp->data_len = cpu_to_le32(total_len);
4861         cp->err_ptr = cpu_to_le64(c->busaddr +
4862                         offsetof(struct io_accel2_cmd, error_data));
4863         cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4864
4865         /* fill in sg elements */
4866         if (use_sg > h->ioaccel_maxsg) {
4867                 cp->sg_count = 1;
4868                 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
4869                 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4870                         atomic_dec(&phys_disk->ioaccel_cmds_out);
4871                         scsi_dma_unmap(cmd);
4872                         return -1;
4873                 }
4874         } else
4875                 cp->sg_count = (u8) use_sg;
4876
4877         enqueue_cmd_and_start_io(h, c);
4878         return 0;
4879 }
4880
4881 /*
4882  * Queue a command to the correct I/O accelerator path.
4883  */
4884 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
4885         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4886         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4887 {
4888         if (!c->scsi_cmd->device)
4889                 return -1;
4890
4891         if (!c->scsi_cmd->device->hostdata)
4892                 return -1;
4893
4894         /* Try to honor the device's queue depth */
4895         if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
4896                                         phys_disk->queue_depth) {
4897                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4898                 return IO_ACCEL_INELIGIBLE;
4899         }
4900         if (h->transMethod & CFGTBL_Trans_io_accel1)
4901                 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
4902                                                 cdb, cdb_len, scsi3addr,
4903                                                 phys_disk);
4904         else
4905                 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
4906                                                 cdb, cdb_len, scsi3addr,
4907                                                 phys_disk);
4908 }
4909
4910 static void raid_map_helper(struct raid_map_data *map,
4911                 int offload_to_mirror, u32 *map_index, u32 *current_group)
4912 {
4913         if (offload_to_mirror == 0)  {
4914                 /* use physical disk in the first mirrored group. */
4915                 *map_index %= le16_to_cpu(map->data_disks_per_row);
4916                 return;
4917         }
4918         do {
4919                 /* determine mirror group that *map_index indicates */
4920                 *current_group = *map_index /
4921                         le16_to_cpu(map->data_disks_per_row);
4922                 if (offload_to_mirror == *current_group)
4923                         continue;
4924                 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
4925                         /* select map index from next group */
4926                         *map_index += le16_to_cpu(map->data_disks_per_row);
4927                         (*current_group)++;
4928                 } else {
4929                         /* select map index from first group */
4930                         *map_index %= le16_to_cpu(map->data_disks_per_row);
4931                         *current_group = 0;
4932                 }
4933         } while (offload_to_mirror != *current_group);
4934 }
4935
4936 /*
4937  * Attempt to perform offload RAID mapping for a logical volume I/O.
4938  */
4939 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
4940         struct CommandList *c)
4941 {
4942         struct scsi_cmnd *cmd = c->scsi_cmd;
4943         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4944         struct raid_map_data *map = &dev->raid_map;
4945         struct raid_map_disk_data *dd = &map->data[0];
4946         int is_write = 0;
4947         u32 map_index;
4948         u64 first_block, last_block;
4949         u32 block_cnt;
4950         u32 blocks_per_row;
4951         u64 first_row, last_row;
4952         u32 first_row_offset, last_row_offset;
4953         u32 first_column, last_column;
4954         u64 r0_first_row, r0_last_row;
4955         u32 r5or6_blocks_per_row;
4956         u64 r5or6_first_row, r5or6_last_row;
4957         u32 r5or6_first_row_offset, r5or6_last_row_offset;
4958         u32 r5or6_first_column, r5or6_last_column;
4959         u32 total_disks_per_row;
4960         u32 stripesize;
4961         u32 first_group, last_group, current_group;
4962         u32 map_row;
4963         u32 disk_handle;
4964         u64 disk_block;
4965         u32 disk_block_cnt;
4966         u8 cdb[16];
4967         u8 cdb_len;
4968         u16 strip_size;
4969 #if BITS_PER_LONG == 32
4970         u64 tmpdiv;
4971 #endif
4972         int offload_to_mirror;
4973
4974         if (!dev)
4975                 return -1;
4976
4977         /* check for valid opcode, get LBA and block count */
4978         switch (cmd->cmnd[0]) {
4979         case WRITE_6:
4980                 is_write = 1;
4981         case READ_6:
4982                 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4983                                 (cmd->cmnd[2] << 8) |
4984                                 cmd->cmnd[3]);
4985                 block_cnt = cmd->cmnd[4];
4986                 if (block_cnt == 0)
4987                         block_cnt = 256;
4988                 break;
4989         case WRITE_10:
4990                 is_write = 1;
4991         case READ_10:
4992                 first_block =
4993                         (((u64) cmd->cmnd[2]) << 24) |
4994                         (((u64) cmd->cmnd[3]) << 16) |
4995                         (((u64) cmd->cmnd[4]) << 8) |
4996                         cmd->cmnd[5];
4997                 block_cnt =
4998                         (((u32) cmd->cmnd[7]) << 8) |
4999                         cmd->cmnd[8];
5000                 break;
5001         case WRITE_12:
5002                 is_write = 1;
5003         case READ_12:
5004                 first_block =
5005                         (((u64) cmd->cmnd[2]) << 24) |
5006                         (((u64) cmd->cmnd[3]) << 16) |
5007                         (((u64) cmd->cmnd[4]) << 8) |
5008                         cmd->cmnd[5];
5009                 block_cnt =
5010                         (((u32) cmd->cmnd[6]) << 24) |
5011                         (((u32) cmd->cmnd[7]) << 16) |
5012                         (((u32) cmd->cmnd[8]) << 8) |
5013                 cmd->cmnd[9];
5014                 break;
5015         case WRITE_16:
5016                 is_write = 1;
5017         case READ_16:
5018                 first_block =
5019                         (((u64) cmd->cmnd[2]) << 56) |
5020                         (((u64) cmd->cmnd[3]) << 48) |
5021                         (((u64) cmd->cmnd[4]) << 40) |
5022                         (((u64) cmd->cmnd[5]) << 32) |
5023                         (((u64) cmd->cmnd[6]) << 24) |
5024                         (((u64) cmd->cmnd[7]) << 16) |
5025                         (((u64) cmd->cmnd[8]) << 8) |
5026                         cmd->cmnd[9];
5027                 block_cnt =
5028                         (((u32) cmd->cmnd[10]) << 24) |
5029                         (((u32) cmd->cmnd[11]) << 16) |
5030                         (((u32) cmd->cmnd[12]) << 8) |
5031                         cmd->cmnd[13];
5032                 break;
5033         default:
5034                 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5035         }
5036         last_block = first_block + block_cnt - 1;
5037
5038         /* check for write to non-RAID-0 */
5039         if (is_write && dev->raid_level != 0)
5040                 return IO_ACCEL_INELIGIBLE;
5041
5042         /* check for invalid block or wraparound */
5043         if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
5044                 last_block < first_block)
5045                 return IO_ACCEL_INELIGIBLE;
5046
5047         /* calculate stripe information for the request */
5048         blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
5049                                 le16_to_cpu(map->strip_size);
5050         strip_size = le16_to_cpu(map->strip_size);
5051 #if BITS_PER_LONG == 32
5052         tmpdiv = first_block;
5053         (void) do_div(tmpdiv, blocks_per_row);
5054         first_row = tmpdiv;
5055         tmpdiv = last_block;
5056         (void) do_div(tmpdiv, blocks_per_row);
5057         last_row = tmpdiv;
5058         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5059         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5060         tmpdiv = first_row_offset;
5061         (void) do_div(tmpdiv, strip_size);
5062         first_column = tmpdiv;
5063         tmpdiv = last_row_offset;
5064         (void) do_div(tmpdiv, strip_size);
5065         last_column = tmpdiv;
5066 #else
5067         first_row = first_block / blocks_per_row;
5068         last_row = last_block / blocks_per_row;
5069         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5070         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5071         first_column = first_row_offset / strip_size;
5072         last_column = last_row_offset / strip_size;
5073 #endif
5074
5075         /* if this isn't a single row/column then give to the controller */
5076         if ((first_row != last_row) || (first_column != last_column))
5077                 return IO_ACCEL_INELIGIBLE;
5078
5079         /* proceeding with driver mapping */
5080         total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
5081                                 le16_to_cpu(map->metadata_disks_per_row);
5082         map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5083                                 le16_to_cpu(map->row_cnt);
5084         map_index = (map_row * total_disks_per_row) + first_column;
5085
5086         switch (dev->raid_level) {
5087         case HPSA_RAID_0:
5088                 break; /* nothing special to do */
5089         case HPSA_RAID_1:
5090                 /* Handles load balance across RAID 1 members.
5091                  * (2-drive R1 and R10 with even # of drives.)
5092                  * Appropriate for SSDs, not optimal for HDDs
5093                  */
5094                 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
5095                 if (dev->offload_to_mirror)
5096                         map_index += le16_to_cpu(map->data_disks_per_row);
5097                 dev->offload_to_mirror = !dev->offload_to_mirror;
5098                 break;
5099         case HPSA_RAID_ADM:
5100                 /* Handles N-way mirrors  (R1-ADM)
5101                  * and R10 with # of drives divisible by 3.)
5102                  */
5103                 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
5104
5105                 offload_to_mirror = dev->offload_to_mirror;
5106                 raid_map_helper(map, offload_to_mirror,
5107                                 &map_index, &current_group);
5108                 /* set mirror group to use next time */
5109                 offload_to_mirror =
5110                         (offload_to_mirror >=
5111                         le16_to_cpu(map->layout_map_count) - 1)
5112                         ? 0 : offload_to_mirror + 1;
5113                 dev->offload_to_mirror = offload_to_mirror;
5114                 /* Avoid direct use of dev->offload_to_mirror within this
5115                  * function since multiple threads might simultaneously
5116                  * increment it beyond the range of dev->layout_map_count -1.
5117                  */
5118                 break;
5119         case HPSA_RAID_5:
5120         case HPSA_RAID_6:
5121                 if (le16_to_cpu(map->layout_map_count) <= 1)
5122                         break;
5123
5124                 /* Verify first and last block are in same RAID group */
5125                 r5or6_blocks_per_row =
5126                         le16_to_cpu(map->strip_size) *
5127                         le16_to_cpu(map->data_disks_per_row);
5128                 BUG_ON(r5or6_blocks_per_row == 0);
5129                 stripesize = r5or6_blocks_per_row *
5130                         le16_to_cpu(map->layout_map_count);
5131 #if BITS_PER_LONG == 32
5132                 tmpdiv = first_block;
5133                 first_group = do_div(tmpdiv, stripesize);
5134                 tmpdiv = first_group;
5135                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5136                 first_group = tmpdiv;
5137                 tmpdiv = last_block;
5138                 last_group = do_div(tmpdiv, stripesize);
5139                 tmpdiv = last_group;
5140                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5141                 last_group = tmpdiv;
5142 #else
5143                 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
5144                 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
5145 #endif
5146                 if (first_group != last_group)
5147                         return IO_ACCEL_INELIGIBLE;
5148
5149                 /* Verify request is in a single row of RAID 5/6 */
5150 #if BITS_PER_LONG == 32
5151                 tmpdiv = first_block;
5152                 (void) do_div(tmpdiv, stripesize);
5153                 first_row = r5or6_first_row = r0_first_row = tmpdiv;
5154                 tmpdiv = last_block;
5155                 (void) do_div(tmpdiv, stripesize);
5156                 r5or6_last_row = r0_last_row = tmpdiv;
5157 #else
5158                 first_row = r5or6_first_row = r0_first_row =
5159                                                 first_block / stripesize;
5160                 r5or6_last_row = r0_last_row = last_block / stripesize;
5161 #endif
5162                 if (r5or6_first_row != r5or6_last_row)
5163                         return IO_ACCEL_INELIGIBLE;
5164
5165
5166                 /* Verify request is in a single column */
5167 #if BITS_PER_LONG == 32
5168                 tmpdiv = first_block;
5169                 first_row_offset = do_div(tmpdiv, stripesize);
5170                 tmpdiv = first_row_offset;
5171                 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
5172                 r5or6_first_row_offset = first_row_offset;
5173                 tmpdiv = last_block;
5174                 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
5175                 tmpdiv = r5or6_last_row_offset;
5176                 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
5177                 tmpdiv = r5or6_first_row_offset;
5178                 (void) do_div(tmpdiv, map->strip_size);
5179                 first_column = r5or6_first_column = tmpdiv;
5180                 tmpdiv = r5or6_last_row_offset;
5181                 (void) do_div(tmpdiv, map->strip_size);
5182                 r5or6_last_column = tmpdiv;
5183 #else
5184                 first_row_offset = r5or6_first_row_offset =
5185                         (u32)((first_block % stripesize) %
5186                                                 r5or6_blocks_per_row);
5187
5188                 r5or6_last_row_offset =
5189                         (u32)((last_block % stripesize) %
5190                                                 r5or6_blocks_per_row);
5191
5192                 first_column = r5or6_first_column =
5193                         r5or6_first_row_offset / le16_to_cpu(map->strip_size);
5194                 r5or6_last_column =
5195                         r5or6_last_row_offset / le16_to_cpu(map->strip_size);
5196 #endif
5197                 if (r5or6_first_column != r5or6_last_column)
5198                         return IO_ACCEL_INELIGIBLE;
5199
5200                 /* Request is eligible */
5201                 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5202                         le16_to_cpu(map->row_cnt);
5203
5204                 map_index = (first_group *
5205                         (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
5206                         (map_row * total_disks_per_row) + first_column;
5207                 break;
5208         default:
5209                 return IO_ACCEL_INELIGIBLE;
5210         }
5211
5212         if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
5213                 return IO_ACCEL_INELIGIBLE;
5214
5215         c->phys_disk = dev->phys_disk[map_index];
5216         if (!c->phys_disk)
5217                 return IO_ACCEL_INELIGIBLE;
5218
5219         disk_handle = dd[map_index].ioaccel_handle;
5220         disk_block = le64_to_cpu(map->disk_starting_blk) +
5221                         first_row * le16_to_cpu(map->strip_size) +
5222                         (first_row_offset - first_column *
5223                         le16_to_cpu(map->strip_size));
5224         disk_block_cnt = block_cnt;
5225
5226         /* handle differing logical/physical block sizes */
5227         if (map->phys_blk_shift) {
5228                 disk_block <<= map->phys_blk_shift;
5229                 disk_block_cnt <<= map->phys_blk_shift;
5230         }
5231         BUG_ON(disk_block_cnt > 0xffff);
5232
5233         /* build the new CDB for the physical disk I/O */
5234         if (disk_block > 0xffffffff) {
5235                 cdb[0] = is_write ? WRITE_16 : READ_16;
5236                 cdb[1] = 0;
5237                 cdb[2] = (u8) (disk_block >> 56);
5238                 cdb[3] = (u8) (disk_block >> 48);
5239                 cdb[4] = (u8) (disk_block >> 40);
5240                 cdb[5] = (u8) (disk_block >> 32);
5241                 cdb[6] = (u8) (disk_block >> 24);
5242                 cdb[7] = (u8) (disk_block >> 16);
5243                 cdb[8] = (u8) (disk_block >> 8);
5244                 cdb[9] = (u8) (disk_block);
5245                 cdb[10] = (u8) (disk_block_cnt >> 24);
5246                 cdb[11] = (u8) (disk_block_cnt >> 16);
5247                 cdb[12] = (u8) (disk_block_cnt >> 8);
5248                 cdb[13] = (u8) (disk_block_cnt);
5249                 cdb[14] = 0;
5250                 cdb[15] = 0;
5251                 cdb_len = 16;
5252         } else {
5253                 cdb[0] = is_write ? WRITE_10 : READ_10;
5254                 cdb[1] = 0;
5255                 cdb[2] = (u8) (disk_block >> 24);
5256                 cdb[3] = (u8) (disk_block >> 16);
5257                 cdb[4] = (u8) (disk_block >> 8);
5258                 cdb[5] = (u8) (disk_block);
5259                 cdb[6] = 0;
5260                 cdb[7] = (u8) (disk_block_cnt >> 8);
5261                 cdb[8] = (u8) (disk_block_cnt);
5262                 cdb[9] = 0;
5263                 cdb_len = 10;
5264         }
5265         return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
5266                                                 dev->scsi3addr,
5267                                                 dev->phys_disk[map_index]);
5268 }
5269
5270 /*
5271  * Submit commands down the "normal" RAID stack path
5272  * All callers to hpsa_ciss_submit must check lockup_detected
5273  * beforehand, before (opt.) and after calling cmd_alloc
5274  */
5275 static int hpsa_ciss_submit(struct ctlr_info *h,
5276         struct CommandList *c, struct scsi_cmnd *cmd,
5277         unsigned char scsi3addr[])
5278 {
5279         cmd->host_scribble = (unsigned char *) c;
5280         c->cmd_type = CMD_SCSI;
5281         c->scsi_cmd = cmd;
5282         c->Header.ReplyQueue = 0;  /* unused in simple mode */
5283         memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
5284         c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5285
5286         /* Fill in the request block... */
5287
5288         c->Request.Timeout = 0;
5289         BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5290         c->Request.CDBLen = cmd->cmd_len;
5291         memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5292         switch (cmd->sc_data_direction) {
5293         case DMA_TO_DEVICE:
5294                 c->Request.type_attr_dir =
5295                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5296                 break;
5297         case DMA_FROM_DEVICE:
5298                 c->Request.type_attr_dir =
5299                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5300                 break;
5301         case DMA_NONE:
5302                 c->Request.type_attr_dir =
5303                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5304                 break;
5305         case DMA_BIDIRECTIONAL:
5306                 /* This can happen if a buggy application does a scsi passthru
5307                  * and sets both inlen and outlen to non-zero. ( see
5308                  * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5309                  */
5310
5311                 c->Request.type_attr_dir =
5312                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5313                 /* This is technically wrong, and hpsa controllers should
5314                  * reject it with CMD_INVALID, which is the most correct
5315                  * response, but non-fibre backends appear to let it
5316                  * slide by, and give the same results as if this field
5317                  * were set correctly.  Either way is acceptable for
5318                  * our purposes here.
5319                  */
5320
5321                 break;
5322
5323         default:
5324                 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5325                         cmd->sc_data_direction);
5326                 BUG();
5327                 break;
5328         }
5329
5330         if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
5331                 hpsa_cmd_resolve_and_free(h, c);
5332                 return SCSI_MLQUEUE_HOST_BUSY;
5333         }
5334         enqueue_cmd_and_start_io(h, c);
5335         /* the cmd'll come back via intr handler in complete_scsi_command()  */
5336         return 0;
5337 }
5338
5339 static void hpsa_cmd_init(struct ctlr_info *h, int index,
5340                                 struct CommandList *c)
5341 {
5342         dma_addr_t cmd_dma_handle, err_dma_handle;
5343
5344         /* Zero out all of commandlist except the last field, refcount */
5345         memset(c, 0, offsetof(struct CommandList, refcount));
5346         c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5347         cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5348         c->err_info = h->errinfo_pool + index;
5349         memset(c->err_info, 0, sizeof(*c->err_info));
5350         err_dma_handle = h->errinfo_pool_dhandle
5351             + index * sizeof(*c->err_info);
5352         c->cmdindex = index;
5353         c->busaddr = (u32) cmd_dma_handle;
5354         c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5355         c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5356         c->h = h;
5357         c->scsi_cmd = SCSI_CMD_IDLE;
5358 }
5359
5360 static void hpsa_preinitialize_commands(struct ctlr_info *h)
5361 {
5362         int i;
5363
5364         for (i = 0; i < h->nr_cmds; i++) {
5365                 struct CommandList *c = h->cmd_pool + i;
5366
5367                 hpsa_cmd_init(h, i, c);
5368                 atomic_set(&c->refcount, 0);
5369         }
5370 }
5371
5372 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5373                                 struct CommandList *c)
5374 {
5375         dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5376
5377         BUG_ON(c->cmdindex != index);
5378
5379         memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5380         memset(c->err_info, 0, sizeof(*c->err_info));
5381         c->busaddr = (u32) cmd_dma_handle;
5382 }
5383
5384 static int hpsa_ioaccel_submit(struct ctlr_info *h,
5385                 struct CommandList *c, struct scsi_cmnd *cmd,
5386                 unsigned char *scsi3addr)
5387 {
5388         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5389         int rc = IO_ACCEL_INELIGIBLE;
5390
5391         if (!dev)
5392                 return SCSI_MLQUEUE_HOST_BUSY;
5393
5394         cmd->host_scribble = (unsigned char *) c;
5395
5396         if (dev->offload_enabled) {
5397                 hpsa_cmd_init(h, c->cmdindex, c);
5398                 c->cmd_type = CMD_SCSI;
5399                 c->scsi_cmd = cmd;
5400                 rc = hpsa_scsi_ioaccel_raid_map(h, c);
5401                 if (rc < 0)     /* scsi_dma_map failed. */
5402                         rc = SCSI_MLQUEUE_HOST_BUSY;
5403         } else if (dev->hba_ioaccel_enabled) {
5404                 hpsa_cmd_init(h, c->cmdindex, c);
5405                 c->cmd_type = CMD_SCSI;
5406                 c->scsi_cmd = cmd;
5407                 rc = hpsa_scsi_ioaccel_direct_map(h, c);
5408                 if (rc < 0)     /* scsi_dma_map failed. */
5409                         rc = SCSI_MLQUEUE_HOST_BUSY;
5410         }
5411         return rc;
5412 }
5413
5414 static void hpsa_command_resubmit_worker(struct work_struct *work)
5415 {
5416         struct scsi_cmnd *cmd;
5417         struct hpsa_scsi_dev_t *dev;
5418         struct CommandList *c = container_of(work, struct CommandList, work);
5419
5420         cmd = c->scsi_cmd;
5421         dev = cmd->device->hostdata;
5422         if (!dev) {
5423                 cmd->result = DID_NO_CONNECT << 16;
5424                 return hpsa_cmd_free_and_done(c->h, c, cmd);
5425         }
5426         if (c->reset_pending)
5427                 return hpsa_cmd_free_and_done(c->h, c, cmd);
5428         if (c->cmd_type == CMD_IOACCEL2) {
5429                 struct ctlr_info *h = c->h;
5430                 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5431                 int rc;
5432
5433                 if (c2->error_data.serv_response ==
5434                                 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5435                         rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
5436                         if (rc == 0)
5437                                 return;
5438                         if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5439                                 /*
5440                                  * If we get here, it means dma mapping failed.
5441                                  * Try again via scsi mid layer, which will
5442                                  * then get SCSI_MLQUEUE_HOST_BUSY.
5443                                  */
5444                                 cmd->result = DID_IMM_RETRY << 16;
5445                                 return hpsa_cmd_free_and_done(h, c, cmd);
5446                         }
5447                         /* else, fall thru and resubmit down CISS path */
5448                 }
5449         }
5450         hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5451         if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
5452                 /*
5453                  * If we get here, it means dma mapping failed. Try
5454                  * again via scsi mid layer, which will then get
5455                  * SCSI_MLQUEUE_HOST_BUSY.
5456                  *
5457                  * hpsa_ciss_submit will have already freed c
5458                  * if it encountered a dma mapping failure.
5459                  */
5460                 cmd->result = DID_IMM_RETRY << 16;
5461                 cmd->scsi_done(cmd);
5462         }
5463 }
5464
5465 /* Running in struct Scsi_Host->host_lock less mode */
5466 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5467 {
5468         struct ctlr_info *h;
5469         struct hpsa_scsi_dev_t *dev;
5470         unsigned char scsi3addr[8];
5471         struct CommandList *c;
5472         int rc = 0;
5473
5474         /* Get the ptr to our adapter structure out of cmd->host. */
5475         h = sdev_to_hba(cmd->device);
5476
5477         BUG_ON(cmd->request->tag < 0);
5478
5479         dev = cmd->device->hostdata;
5480         if (!dev) {
5481                 cmd->result = DID_NO_CONNECT << 16;
5482                 cmd->scsi_done(cmd);
5483                 return 0;
5484         }
5485
5486         if (dev->removed) {
5487                 cmd->result = DID_NO_CONNECT << 16;
5488                 cmd->scsi_done(cmd);
5489                 return 0;
5490         }
5491
5492         memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
5493
5494         if (unlikely(lockup_detected(h))) {
5495                 cmd->result = DID_NO_CONNECT << 16;
5496                 cmd->scsi_done(cmd);
5497                 return 0;
5498         }
5499         c = cmd_tagged_alloc(h, cmd);
5500
5501         /*
5502          * This is necessary because the SML doesn't zero out this field during
5503          * error recovery.
5504          */
5505         cmd->result = 0;
5506
5507         /*
5508          * Call alternate submit routine for I/O accelerated commands.
5509          * Retries always go down the normal I/O path.
5510          */
5511         if (likely(cmd->retries == 0 &&
5512                         !blk_rq_is_passthrough(cmd->request) &&
5513                         h->acciopath_status)) {
5514                 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
5515                 if (rc == 0)
5516                         return 0;
5517                 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5518                         hpsa_cmd_resolve_and_free(h, c);
5519                         return SCSI_MLQUEUE_HOST_BUSY;
5520                 }
5521         }
5522         return hpsa_ciss_submit(h, c, cmd, scsi3addr);
5523 }
5524
5525 static void hpsa_scan_complete(struct ctlr_info *h)
5526 {
5527         unsigned long flags;
5528
5529         spin_lock_irqsave(&h->scan_lock, flags);
5530         h->scan_finished = 1;
5531         wake_up(&h->scan_wait_queue);
5532         spin_unlock_irqrestore(&h->scan_lock, flags);
5533 }
5534
5535 static void hpsa_scan_start(struct Scsi_Host *sh)
5536 {
5537         struct ctlr_info *h = shost_to_hba(sh);
5538         unsigned long flags;
5539
5540         /*
5541          * Don't let rescans be initiated on a controller known to be locked
5542          * up.  If the controller locks up *during* a rescan, that thread is
5543          * probably hosed, but at least we can prevent new rescan threads from
5544          * piling up on a locked up controller.
5545          */
5546         if (unlikely(lockup_detected(h)))
5547                 return hpsa_scan_complete(h);
5548
5549         /*
5550          * If a scan is already waiting to run, no need to add another
5551          */
5552         spin_lock_irqsave(&h->scan_lock, flags);
5553         if (h->scan_waiting) {
5554                 spin_unlock_irqrestore(&h->scan_lock, flags);
5555                 return;
5556         }
5557
5558         spin_unlock_irqrestore(&h->scan_lock, flags);
5559
5560         /* wait until any scan already in progress is finished. */
5561         while (1) {
5562                 spin_lock_irqsave(&h->scan_lock, flags);
5563                 if (h->scan_finished)
5564                         break;
5565                 h->scan_waiting = 1;
5566                 spin_unlock_irqrestore(&h->scan_lock, flags);
5567                 wait_event(h->scan_wait_queue, h->scan_finished);
5568                 /* Note: We don't need to worry about a race between this
5569                  * thread and driver unload because the midlayer will
5570                  * have incremented the reference count, so unload won't
5571                  * happen if we're in here.
5572                  */
5573         }
5574         h->scan_finished = 0; /* mark scan as in progress */
5575         h->scan_waiting = 0;
5576         spin_unlock_irqrestore(&h->scan_lock, flags);
5577
5578         if (unlikely(lockup_detected(h)))
5579                 return hpsa_scan_complete(h);
5580
5581         /*
5582          * Do the scan after a reset completion
5583          */
5584         spin_lock_irqsave(&h->reset_lock, flags);
5585         if (h->reset_in_progress) {
5586                 h->drv_req_rescan = 1;
5587                 spin_unlock_irqrestore(&h->reset_lock, flags);
5588                 hpsa_scan_complete(h);
5589                 return;
5590         }
5591         spin_unlock_irqrestore(&h->reset_lock, flags);
5592
5593         hpsa_update_scsi_devices(h);
5594
5595         hpsa_scan_complete(h);
5596 }
5597
5598 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5599 {
5600         struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5601
5602         if (!logical_drive)
5603                 return -ENODEV;
5604
5605         if (qdepth < 1)
5606                 qdepth = 1;
5607         else if (qdepth > logical_drive->queue_depth)
5608                 qdepth = logical_drive->queue_depth;
5609
5610         return scsi_change_queue_depth(sdev, qdepth);
5611 }
5612
5613 static int hpsa_scan_finished(struct Scsi_Host *sh,
5614         unsigned long elapsed_time)
5615 {
5616         struct ctlr_info *h = shost_to_hba(sh);
5617         unsigned long flags;
5618         int finished;
5619
5620         spin_lock_irqsave(&h->scan_lock, flags);
5621         finished = h->scan_finished;
5622         spin_unlock_irqrestore(&h->scan_lock, flags);
5623         return finished;
5624 }
5625
5626 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5627 {
5628         struct Scsi_Host *sh;
5629
5630         sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5631         if (sh == NULL) {
5632                 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5633                 return -ENOMEM;
5634         }
5635
5636         sh->io_port = 0;
5637         sh->n_io_port = 0;
5638         sh->this_id = -1;
5639         sh->max_channel = 3;
5640         sh->max_cmd_len = MAX_COMMAND_SIZE;
5641         sh->max_lun = HPSA_MAX_LUN;
5642         sh->max_id = HPSA_MAX_LUN;
5643         sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5644         sh->cmd_per_lun = sh->can_queue;
5645         sh->sg_tablesize = h->maxsgentries;
5646         sh->transportt = hpsa_sas_transport_template;
5647         sh->hostdata[0] = (unsigned long) h;
5648         sh->irq = pci_irq_vector(h->pdev, 0);
5649         sh->unique_id = sh->irq;
5650
5651         h->scsi_host = sh;
5652         return 0;
5653 }
5654
5655 static int hpsa_scsi_add_host(struct ctlr_info *h)
5656 {
5657         int rv;
5658
5659         rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5660         if (rv) {
5661                 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5662                 return rv;
5663         }
5664         scsi_scan_host(h->scsi_host);
5665         return 0;
5666 }
5667
5668 /*
5669  * The block layer has already gone to the trouble of picking out a unique,
5670  * small-integer tag for this request.  We use an offset from that value as
5671  * an index to select our command block.  (The offset allows us to reserve the
5672  * low-numbered entries for our own uses.)
5673  */
5674 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5675 {
5676         int idx = scmd->request->tag;
5677
5678         if (idx < 0)
5679                 return idx;
5680
5681         /* Offset to leave space for internal cmds. */
5682         return idx += HPSA_NRESERVED_CMDS;
5683 }
5684
5685 /*
5686  * Send a TEST_UNIT_READY command to the specified LUN using the specified
5687  * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5688  */
5689 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5690                                 struct CommandList *c, unsigned char lunaddr[],
5691                                 int reply_queue)
5692 {
5693         int rc;
5694
5695         /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5696         (void) fill_cmd(c, TEST_UNIT_READY, h,
5697                         NULL, 0, 0, lunaddr, TYPE_CMD);
5698         rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
5699         if (rc)
5700                 return rc;
5701         /* no unmap needed here because no data xfer. */
5702
5703         /* Check if the unit is already ready. */
5704         if (c->err_info->CommandStatus == CMD_SUCCESS)
5705                 return 0;
5706
5707         /*
5708          * The first command sent after reset will receive "unit attention" to
5709          * indicate that the LUN has been reset...this is actually what we're
5710          * looking for (but, success is good too).
5711          */
5712         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5713                 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5714                         (c->err_info->SenseInfo[2] == NO_SENSE ||
5715                          c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5716                 return 0;
5717
5718         return 1;
5719 }
5720
5721 /*
5722  * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5723  * returns zero when the unit is ready, and non-zero when giving up.
5724  */
5725 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5726                                 struct CommandList *c,
5727                                 unsigned char lunaddr[], int reply_queue)
5728 {
5729         int rc;
5730         int count = 0;
5731         int waittime = 1; /* seconds */
5732
5733         /* Send test unit ready until device ready, or give up. */
5734         for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5735
5736                 /*
5737                  * Wait for a bit.  do this first, because if we send
5738                  * the TUR right away, the reset will just abort it.
5739                  */
5740                 msleep(1000 * waittime);
5741
5742                 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5743                 if (!rc)
5744                         break;
5745
5746                 /* Increase wait time with each try, up to a point. */
5747                 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5748                         waittime *= 2;
5749
5750                 dev_warn(&h->pdev->dev,
5751                          "waiting %d secs for device to become ready.\n",
5752                          waittime);
5753         }
5754
5755         return rc;
5756 }
5757
5758 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5759                                            unsigned char lunaddr[],
5760                                            int reply_queue)
5761 {
5762         int first_queue;
5763         int last_queue;
5764         int rq;
5765         int rc = 0;
5766         struct CommandList *c;
5767
5768         c = cmd_alloc(h);
5769
5770         /*
5771          * If no specific reply queue was requested, then send the TUR
5772          * repeatedly, requesting a reply on each reply queue; otherwise execute
5773          * the loop exactly once using only the specified queue.
5774          */
5775         if (reply_queue == DEFAULT_REPLY_QUEUE) {
5776                 first_queue = 0;
5777                 last_queue = h->nreply_queues - 1;
5778         } else {
5779                 first_queue = reply_queue;
5780                 last_queue = reply_queue;
5781         }
5782
5783         for (rq = first_queue; rq <= last_queue; rq++) {
5784                 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5785                 if (rc)
5786                         break;
5787         }
5788
5789         if (rc)
5790                 dev_warn(&h->pdev->dev, "giving up on device.\n");
5791         else
5792                 dev_warn(&h->pdev->dev, "device is ready.\n");
5793
5794         cmd_free(h, c);
5795         return rc;
5796 }
5797
5798 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5799  * complaining.  Doing a host- or bus-reset can't do anything good here.
5800  */
5801 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5802 {
5803         int rc = SUCCESS;
5804         struct ctlr_info *h;
5805         struct hpsa_scsi_dev_t *dev;
5806         u8 reset_type;
5807         char msg[48];
5808         unsigned long flags;
5809
5810         /* find the controller to which the command to be aborted was sent */
5811         h = sdev_to_hba(scsicmd->device);
5812         if (h == NULL) /* paranoia */
5813                 return FAILED;
5814
5815         spin_lock_irqsave(&h->reset_lock, flags);
5816         h->reset_in_progress = 1;
5817         spin_unlock_irqrestore(&h->reset_lock, flags);
5818
5819         if (lockup_detected(h)) {
5820                 rc = FAILED;
5821                 goto return_reset_status;
5822         }
5823
5824         dev = scsicmd->device->hostdata;
5825         if (!dev) {
5826                 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5827                 rc = FAILED;
5828                 goto return_reset_status;
5829         }
5830
5831         if (dev->devtype == TYPE_ENCLOSURE) {
5832                 rc = SUCCESS;
5833                 goto return_reset_status;
5834         }
5835
5836         /* if controller locked up, we can guarantee command won't complete */
5837         if (lockup_detected(h)) {
5838                 snprintf(msg, sizeof(msg),
5839                          "cmd %d RESET FAILED, lockup detected",
5840                          hpsa_get_cmd_index(scsicmd));
5841                 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5842                 rc = FAILED;
5843                 goto return_reset_status;
5844         }
5845
5846         /* this reset request might be the result of a lockup; check */
5847         if (detect_controller_lockup(h)) {
5848                 snprintf(msg, sizeof(msg),
5849                          "cmd %d RESET FAILED, new lockup detected",
5850                          hpsa_get_cmd_index(scsicmd));
5851                 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5852                 rc = FAILED;
5853                 goto return_reset_status;
5854         }
5855
5856         /* Do not attempt on controller */
5857         if (is_hba_lunid(dev->scsi3addr)) {
5858                 rc = SUCCESS;
5859                 goto return_reset_status;
5860         }
5861
5862         if (is_logical_dev_addr_mode(dev->scsi3addr))
5863                 reset_type = HPSA_DEVICE_RESET_MSG;
5864         else
5865                 reset_type = HPSA_PHYS_TARGET_RESET;
5866
5867         sprintf(msg, "resetting %s",
5868                 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
5869         hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5870
5871         /* send a reset to the SCSI LUN which the command was sent to */
5872         rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type,
5873                            DEFAULT_REPLY_QUEUE);
5874         if (rc == 0)
5875                 rc = SUCCESS;
5876         else
5877                 rc = FAILED;
5878
5879         sprintf(msg, "reset %s %s",
5880                 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
5881                 rc == SUCCESS ? "completed successfully" : "failed");
5882         hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5883
5884 return_reset_status:
5885         spin_lock_irqsave(&h->reset_lock, flags);
5886         h->reset_in_progress = 0;
5887         spin_unlock_irqrestore(&h->reset_lock, flags);
5888         return rc;
5889 }
5890
5891 /*
5892  * For operations with an associated SCSI command, a command block is allocated
5893  * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
5894  * block request tag as an index into a table of entries.  cmd_tagged_free() is
5895  * the complement, although cmd_free() may be called instead.
5896  */
5897 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
5898                                             struct scsi_cmnd *scmd)
5899 {
5900         int idx = hpsa_get_cmd_index(scmd);
5901         struct CommandList *c = h->cmd_pool + idx;
5902
5903         if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
5904                 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
5905                         idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
5906                 /* The index value comes from the block layer, so if it's out of
5907                  * bounds, it's probably not our bug.
5908                  */
5909                 BUG();
5910         }
5911
5912         atomic_inc(&c->refcount);
5913         if (unlikely(!hpsa_is_cmd_idle(c))) {
5914                 /*
5915                  * We expect that the SCSI layer will hand us a unique tag
5916                  * value.  Thus, there should never be a collision here between
5917                  * two requests...because if the selected command isn't idle
5918                  * then someone is going to be very disappointed.
5919                  */
5920                 dev_err(&h->pdev->dev,
5921                         "tag collision (tag=%d) in cmd_tagged_alloc().\n",
5922                         idx);
5923                 if (c->scsi_cmd != NULL)
5924                         scsi_print_command(c->scsi_cmd);
5925                 scsi_print_command(scmd);
5926         }
5927
5928         hpsa_cmd_partial_init(h, idx, c);
5929         return c;
5930 }
5931
5932 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
5933 {
5934         /*
5935          * Release our reference to the block.  We don't need to do anything
5936          * else to free it, because it is accessed by index.
5937          */
5938         (void)atomic_dec(&c->refcount);
5939 }
5940
5941 /*
5942  * For operations that cannot sleep, a command block is allocated at init,
5943  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
5944  * which ones are free or in use.  Lock must be held when calling this.
5945  * cmd_free() is the complement.
5946  * This function never gives up and returns NULL.  If it hangs,
5947  * another thread must call cmd_free() to free some tags.
5948  */
5949
5950 static struct CommandList *cmd_alloc(struct ctlr_info *h)
5951 {
5952         struct CommandList *c;
5953         int refcount, i;
5954         int offset = 0;
5955
5956         /*
5957          * There is some *extremely* small but non-zero chance that that
5958          * multiple threads could get in here, and one thread could
5959          * be scanning through the list of bits looking for a free
5960          * one, but the free ones are always behind him, and other
5961          * threads sneak in behind him and eat them before he can
5962          * get to them, so that while there is always a free one, a
5963          * very unlucky thread might be starved anyway, never able to
5964          * beat the other threads.  In reality, this happens so
5965          * infrequently as to be indistinguishable from never.
5966          *
5967          * Note that we start allocating commands before the SCSI host structure
5968          * is initialized.  Since the search starts at bit zero, this
5969          * all works, since we have at least one command structure available;
5970          * however, it means that the structures with the low indexes have to be
5971          * reserved for driver-initiated requests, while requests from the block
5972          * layer will use the higher indexes.
5973          */
5974
5975         for (;;) {
5976                 i = find_next_zero_bit(h->cmd_pool_bits,
5977                                         HPSA_NRESERVED_CMDS,
5978                                         offset);
5979                 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
5980                         offset = 0;
5981                         continue;
5982                 }
5983                 c = h->cmd_pool + i;
5984                 refcount = atomic_inc_return(&c->refcount);
5985                 if (unlikely(refcount > 1)) {
5986                         cmd_free(h, c); /* already in use */
5987                         offset = (i + 1) % HPSA_NRESERVED_CMDS;
5988                         continue;
5989                 }
5990                 set_bit(i & (BITS_PER_LONG - 1),
5991                         h->cmd_pool_bits + (i / BITS_PER_LONG));
5992                 break; /* it's ours now. */
5993         }
5994         hpsa_cmd_partial_init(h, i, c);
5995         return c;
5996 }
5997
5998 /*
5999  * This is the complementary operation to cmd_alloc().  Note, however, in some
6000  * corner cases it may also be used to free blocks allocated by
6001  * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
6002  * the clear-bit is harmless.
6003  */
6004 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6005 {
6006         if (atomic_dec_and_test(&c->refcount)) {
6007                 int i;
6008
6009                 i = c - h->cmd_pool;
6010                 clear_bit(i & (BITS_PER_LONG - 1),
6011                           h->cmd_pool_bits + (i / BITS_PER_LONG));
6012         }
6013 }
6014
6015 #ifdef CONFIG_COMPAT
6016
6017 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
6018         void __user *arg)
6019 {
6020         IOCTL32_Command_struct __user *arg32 =
6021             (IOCTL32_Command_struct __user *) arg;
6022         IOCTL_Command_struct arg64;
6023         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
6024         int err;
6025         u32 cp;
6026
6027         memset(&arg64, 0, sizeof(arg64));
6028         err = 0;
6029         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6030                            sizeof(arg64.LUN_info));
6031         err |= copy_from_user(&arg64.Request, &arg32->Request,
6032                            sizeof(arg64.Request));
6033         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6034                            sizeof(arg64.error_info));
6035         err |= get_user(arg64.buf_size, &arg32->buf_size);
6036         err |= get_user(cp, &arg32->buf);
6037         arg64.buf = compat_ptr(cp);
6038         err |= copy_to_user(p, &arg64, sizeof(arg64));
6039
6040         if (err)
6041                 return -EFAULT;
6042
6043         err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
6044         if (err)
6045                 return err;
6046         err |= copy_in_user(&arg32->error_info, &p->error_info,
6047                          sizeof(arg32->error_info));
6048         if (err)
6049                 return -EFAULT;
6050         return err;
6051 }
6052
6053 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
6054         int cmd, void __user *arg)
6055 {
6056         BIG_IOCTL32_Command_struct __user *arg32 =
6057             (BIG_IOCTL32_Command_struct __user *) arg;
6058         BIG_IOCTL_Command_struct arg64;
6059         BIG_IOCTL_Command_struct __user *p =
6060             compat_alloc_user_space(sizeof(arg64));
6061         int err;
6062         u32 cp;
6063
6064         memset(&arg64, 0, sizeof(arg64));
6065         err = 0;
6066         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6067                            sizeof(arg64.LUN_info));
6068         err |= copy_from_user(&arg64.Request, &arg32->Request,
6069                            sizeof(arg64.Request));
6070         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6071                            sizeof(arg64.error_info));
6072         err |= get_user(arg64.buf_size, &arg32->buf_size);
6073         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
6074         err |= get_user(cp, &arg32->buf);
6075         arg64.buf = compat_ptr(cp);
6076         err |= copy_to_user(p, &arg64, sizeof(arg64));
6077
6078         if (err)
6079                 return -EFAULT;
6080
6081         err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
6082         if (err)
6083                 return err;
6084         err |= copy_in_user(&arg32->error_info, &p->error_info,
6085                          sizeof(arg32->error_info));
6086         if (err)
6087                 return -EFAULT;
6088         return err;
6089 }
6090
6091 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6092 {
6093         switch (cmd) {
6094         case CCISS_GETPCIINFO:
6095         case CCISS_GETINTINFO:
6096         case CCISS_SETINTINFO:
6097         case CCISS_GETNODENAME:
6098         case CCISS_SETNODENAME:
6099         case CCISS_GETHEARTBEAT:
6100         case CCISS_GETBUSTYPES:
6101         case CCISS_GETFIRMVER:
6102         case CCISS_GETDRIVVER:
6103         case CCISS_REVALIDVOLS:
6104         case CCISS_DEREGDISK:
6105         case CCISS_REGNEWDISK:
6106         case CCISS_REGNEWD:
6107         case CCISS_RESCANDISK:
6108         case CCISS_GETLUNINFO:
6109                 return hpsa_ioctl(dev, cmd, arg);
6110
6111         case CCISS_PASSTHRU32:
6112                 return hpsa_ioctl32_passthru(dev, cmd, arg);
6113         case CCISS_BIG_PASSTHRU32:
6114                 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6115
6116         default:
6117                 return -ENOIOCTLCMD;
6118         }
6119 }
6120 #endif
6121
6122 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6123 {
6124         struct hpsa_pci_info pciinfo;
6125
6126         if (!argp)
6127                 return -EINVAL;
6128         pciinfo.domain = pci_domain_nr(h->pdev->bus);
6129         pciinfo.bus = h->pdev->bus->number;
6130         pciinfo.dev_fn = h->pdev->devfn;
6131         pciinfo.board_id = h->board_id;
6132         if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6133                 return -EFAULT;
6134         return 0;
6135 }
6136
6137 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6138 {
6139         DriverVer_type DriverVer;
6140         unsigned char vmaj, vmin, vsubmin;
6141         int rc;
6142
6143         rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6144                 &vmaj, &vmin, &vsubmin);
6145         if (rc != 3) {
6146                 dev_info(&h->pdev->dev, "driver version string '%s' "
6147                         "unrecognized.", HPSA_DRIVER_VERSION);
6148                 vmaj = 0;
6149                 vmin = 0;
6150                 vsubmin = 0;
6151         }
6152         DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6153         if (!argp)
6154                 return -EINVAL;
6155         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6156                 return -EFAULT;
6157         return 0;
6158 }
6159
6160 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6161 {
6162         IOCTL_Command_struct iocommand;
6163         struct CommandList *c;
6164         char *buff = NULL;
6165         u64 temp64;
6166         int rc = 0;
6167
6168         if (!argp)
6169                 return -EINVAL;
6170         if (!capable(CAP_SYS_RAWIO))
6171                 return -EPERM;
6172         if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6173                 return -EFAULT;
6174         if ((iocommand.buf_size < 1) &&
6175             (iocommand.Request.Type.Direction != XFER_NONE)) {
6176                 return -EINVAL;
6177         }
6178         if (iocommand.buf_size > 0) {
6179                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
6180                 if (buff == NULL)
6181                         return -ENOMEM;
6182                 if (iocommand.Request.Type.Direction & XFER_WRITE) {
6183                         /* Copy the data into the buffer we created */
6184                         if (copy_from_user(buff, iocommand.buf,
6185                                 iocommand.buf_size)) {
6186                                 rc = -EFAULT;
6187                                 goto out_kfree;
6188                         }
6189                 } else {
6190                         memset(buff, 0, iocommand.buf_size);
6191                 }
6192         }
6193         c = cmd_alloc(h);
6194
6195         /* Fill in the command type */
6196         c->cmd_type = CMD_IOCTL_PEND;
6197         c->scsi_cmd = SCSI_CMD_BUSY;
6198         /* Fill in Command Header */
6199         c->Header.ReplyQueue = 0; /* unused in simple mode */
6200         if (iocommand.buf_size > 0) {   /* buffer to fill */
6201                 c->Header.SGList = 1;
6202                 c->Header.SGTotal = cpu_to_le16(1);
6203         } else  { /* no buffers to fill */
6204                 c->Header.SGList = 0;
6205                 c->Header.SGTotal = cpu_to_le16(0);
6206         }
6207         memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
6208
6209         /* Fill in Request block */
6210         memcpy(&c->Request, &iocommand.Request,
6211                 sizeof(c->Request));
6212
6213         /* Fill in the scatter gather information */
6214         if (iocommand.buf_size > 0) {
6215                 temp64 = pci_map_single(h->pdev, buff,
6216                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
6217                 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6218                         c->SG[0].Addr = cpu_to_le64(0);
6219                         c->SG[0].Len = cpu_to_le32(0);
6220                         rc = -ENOMEM;
6221                         goto out;
6222                 }
6223                 c->SG[0].Addr = cpu_to_le64(temp64);
6224                 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
6225                 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6226         }
6227         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6228                                         NO_TIMEOUT);
6229         if (iocommand.buf_size > 0)
6230                 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
6231         check_ioctl_unit_attention(h, c);
6232         if (rc) {
6233                 rc = -EIO;
6234                 goto out;
6235         }
6236
6237         /* Copy the error information out */
6238         memcpy(&iocommand.error_info, c->err_info,
6239                 sizeof(iocommand.error_info));
6240         if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6241                 rc = -EFAULT;
6242                 goto out;
6243         }
6244         if ((iocommand.Request.Type.Direction & XFER_READ) &&
6245                 iocommand.buf_size > 0) {
6246                 /* Copy the data out of the buffer we created */
6247                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6248                         rc = -EFAULT;
6249                         goto out;
6250                 }
6251         }
6252 out:
6253         cmd_free(h, c);
6254 out_kfree:
6255         kfree(buff);
6256         return rc;
6257 }
6258
6259 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6260 {
6261         BIG_IOCTL_Command_struct *ioc;
6262         struct CommandList *c;
6263         unsigned char **buff = NULL;
6264         int *buff_size = NULL;
6265         u64 temp64;
6266         BYTE sg_used = 0;
6267         int status = 0;
6268         u32 left;
6269         u32 sz;
6270         BYTE __user *data_ptr;
6271
6272         if (!argp)
6273                 return -EINVAL;
6274         if (!capable(CAP_SYS_RAWIO))
6275                 return -EPERM;
6276         ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
6277         if (!ioc) {
6278                 status = -ENOMEM;
6279                 goto cleanup1;
6280         }
6281         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6282                 status = -EFAULT;
6283                 goto cleanup1;
6284         }
6285         if ((ioc->buf_size < 1) &&
6286             (ioc->Request.Type.Direction != XFER_NONE)) {
6287                 status = -EINVAL;
6288                 goto cleanup1;
6289         }
6290         /* Check kmalloc limits  using all SGs */
6291         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6292                 status = -EINVAL;
6293                 goto cleanup1;
6294         }
6295         if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6296                 status = -EINVAL;
6297                 goto cleanup1;
6298         }
6299         buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
6300         if (!buff) {
6301                 status = -ENOMEM;
6302                 goto cleanup1;
6303         }
6304         buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
6305         if (!buff_size) {
6306                 status = -ENOMEM;
6307                 goto cleanup1;
6308         }
6309         left = ioc->buf_size;
6310         data_ptr = ioc->buf;
6311         while (left) {
6312                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6313                 buff_size[sg_used] = sz;
6314                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6315                 if (buff[sg_used] == NULL) {
6316                         status = -ENOMEM;
6317                         goto cleanup1;
6318                 }
6319                 if (ioc->Request.Type.Direction & XFER_WRITE) {
6320                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6321                                 status = -EFAULT;
6322                                 goto cleanup1;
6323                         }
6324                 } else
6325                         memset(buff[sg_used], 0, sz);
6326                 left -= sz;
6327                 data_ptr += sz;
6328                 sg_used++;
6329         }
6330         c = cmd_alloc(h);
6331
6332         c->cmd_type = CMD_IOCTL_PEND;
6333         c->scsi_cmd = SCSI_CMD_BUSY;
6334         c->Header.ReplyQueue = 0;
6335         c->Header.SGList = (u8) sg_used;
6336         c->Header.SGTotal = cpu_to_le16(sg_used);
6337         memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6338         memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6339         if (ioc->buf_size > 0) {
6340                 int i;
6341                 for (i = 0; i < sg_used; i++) {
6342                         temp64 = pci_map_single(h->pdev, buff[i],
6343                                     buff_size[i], PCI_DMA_BIDIRECTIONAL);
6344                         if (dma_mapping_error(&h->pdev->dev,
6345                                                         (dma_addr_t) temp64)) {
6346                                 c->SG[i].Addr = cpu_to_le64(0);
6347                                 c->SG[i].Len = cpu_to_le32(0);
6348                                 hpsa_pci_unmap(h->pdev, c, i,
6349                                         PCI_DMA_BIDIRECTIONAL);
6350                                 status = -ENOMEM;
6351                                 goto cleanup0;
6352                         }
6353                         c->SG[i].Addr = cpu_to_le64(temp64);
6354                         c->SG[i].Len = cpu_to_le32(buff_size[i]);
6355                         c->SG[i].Ext = cpu_to_le32(0);
6356                 }
6357                 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6358         }
6359         status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6360                                                 NO_TIMEOUT);
6361         if (sg_used)
6362                 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6363         check_ioctl_unit_attention(h, c);
6364         if (status) {
6365                 status = -EIO;
6366                 goto cleanup0;
6367         }
6368
6369         /* Copy the error information out */
6370         memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6371         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6372                 status = -EFAULT;
6373                 goto cleanup0;
6374         }
6375         if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6376                 int i;
6377
6378                 /* Copy the data out of the buffer we created */
6379                 BYTE __user *ptr = ioc->buf;
6380                 for (i = 0; i < sg_used; i++) {
6381                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
6382                                 status = -EFAULT;
6383                                 goto cleanup0;
6384                         }
6385                         ptr += buff_size[i];
6386                 }
6387         }
6388         status = 0;
6389 cleanup0:
6390         cmd_free(h, c);
6391 cleanup1:
6392         if (buff) {
6393                 int i;
6394
6395                 for (i = 0; i < sg_used; i++)
6396                         kfree(buff[i]);
6397                 kfree(buff);
6398         }
6399         kfree(buff_size);
6400         kfree(ioc);
6401         return status;
6402 }
6403
6404 static void check_ioctl_unit_attention(struct ctlr_info *h,
6405         struct CommandList *c)
6406 {
6407         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6408                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6409                 (void) check_for_unit_attention(h, c);
6410 }
6411
6412 /*
6413  * ioctl
6414  */
6415 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6416 {
6417         struct ctlr_info *h;
6418         void __user *argp = (void __user *)arg;
6419         int rc;
6420
6421         h = sdev_to_hba(dev);
6422
6423         switch (cmd) {
6424         case CCISS_DEREGDISK:
6425         case CCISS_REGNEWDISK:
6426         case CCISS_REGNEWD:
6427                 hpsa_scan_start(h->scsi_host);
6428                 return 0;
6429         case CCISS_GETPCIINFO:
6430                 return hpsa_getpciinfo_ioctl(h, argp);
6431         case CCISS_GETDRIVVER:
6432                 return hpsa_getdrivver_ioctl(h, argp);
6433         case CCISS_PASSTHRU:
6434                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6435                         return -EAGAIN;
6436                 rc = hpsa_passthru_ioctl(h, argp);
6437                 atomic_inc(&h->passthru_cmds_avail);
6438                 return rc;
6439         case CCISS_BIG_PASSTHRU:
6440                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6441                         return -EAGAIN;
6442                 rc = hpsa_big_passthru_ioctl(h, argp);
6443                 atomic_inc(&h->passthru_cmds_avail);
6444                 return rc;
6445         default:
6446                 return -ENOTTY;
6447         }
6448 }
6449
6450 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
6451                                 u8 reset_type)
6452 {
6453         struct CommandList *c;
6454
6455         c = cmd_alloc(h);
6456
6457         /* fill_cmd can't fail here, no data buffer to map */
6458         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6459                 RAID_CTLR_LUNID, TYPE_MSG);
6460         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6461         c->waiting = NULL;
6462         enqueue_cmd_and_start_io(h, c);
6463         /* Don't wait for completion, the reset won't complete.  Don't free
6464          * the command either.  This is the last command we will send before
6465          * re-initializing everything, so it doesn't matter and won't leak.
6466          */
6467         return;
6468 }
6469
6470 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6471         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6472         int cmd_type)
6473 {
6474         int pci_dir = XFER_NONE;
6475
6476         c->cmd_type = CMD_IOCTL_PEND;
6477         c->scsi_cmd = SCSI_CMD_BUSY;
6478         c->Header.ReplyQueue = 0;
6479         if (buff != NULL && size > 0) {
6480                 c->Header.SGList = 1;
6481                 c->Header.SGTotal = cpu_to_le16(1);
6482         } else {
6483                 c->Header.SGList = 0;
6484                 c->Header.SGTotal = cpu_to_le16(0);
6485         }
6486         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6487
6488         if (cmd_type == TYPE_CMD) {
6489                 switch (cmd) {
6490                 case HPSA_INQUIRY:
6491                         /* are we trying to read a vital product page */
6492                         if (page_code & VPD_PAGE) {
6493                                 c->Request.CDB[1] = 0x01;
6494                                 c->Request.CDB[2] = (page_code & 0xff);
6495                         }
6496                         c->Request.CDBLen = 6;
6497                         c->Request.type_attr_dir =
6498                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6499                         c->Request.Timeout = 0;
6500                         c->Request.CDB[0] = HPSA_INQUIRY;
6501                         c->Request.CDB[4] = size & 0xFF;
6502                         break;
6503                 case HPSA_REPORT_LOG:
6504                 case HPSA_REPORT_PHYS:
6505                         /* Talking to controller so It's a physical command
6506                            mode = 00 target = 0.  Nothing to write.
6507                          */
6508                         c->Request.CDBLen = 12;
6509                         c->Request.type_attr_dir =
6510                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6511                         c->Request.Timeout = 0;
6512                         c->Request.CDB[0] = cmd;
6513                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6514                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6515                         c->Request.CDB[8] = (size >> 8) & 0xFF;
6516                         c->Request.CDB[9] = size & 0xFF;
6517                         break;
6518                 case BMIC_SENSE_DIAG_OPTIONS:
6519                         c->Request.CDBLen = 16;
6520                         c->Request.type_attr_dir =
6521                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6522                         c->Request.Timeout = 0;
6523                         /* Spec says this should be BMIC_WRITE */
6524                         c->Request.CDB[0] = BMIC_READ;
6525                         c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6526                         break;
6527                 case BMIC_SET_DIAG_OPTIONS:
6528                         c->Request.CDBLen = 16;
6529                         c->Request.type_attr_dir =
6530                                         TYPE_ATTR_DIR(cmd_type,
6531                                                 ATTR_SIMPLE, XFER_WRITE);
6532                         c->Request.Timeout = 0;
6533                         c->Request.CDB[0] = BMIC_WRITE;
6534                         c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6535                         break;
6536                 case HPSA_CACHE_FLUSH:
6537                         c->Request.CDBLen = 12;
6538                         c->Request.type_attr_dir =
6539                                         TYPE_ATTR_DIR(cmd_type,
6540                                                 ATTR_SIMPLE, XFER_WRITE);
6541                         c->Request.Timeout = 0;
6542                         c->Request.CDB[0] = BMIC_WRITE;
6543                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6544                         c->Request.CDB[7] = (size >> 8) & 0xFF;
6545                         c->Request.CDB[8] = size & 0xFF;
6546                         break;
6547                 case TEST_UNIT_READY:
6548                         c->Request.CDBLen = 6;
6549                         c->Request.type_attr_dir =
6550                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6551                         c->Request.Timeout = 0;
6552                         break;
6553                 case HPSA_GET_RAID_MAP:
6554                         c->Request.CDBLen = 12;
6555                         c->Request.type_attr_dir =
6556                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6557                         c->Request.Timeout = 0;
6558                         c->Request.CDB[0] = HPSA_CISS_READ;
6559                         c->Request.CDB[1] = cmd;
6560                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6561                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6562                         c->Request.CDB[8] = (size >> 8) & 0xFF;
6563                         c->Request.CDB[9] = size & 0xFF;
6564                         break;
6565                 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6566                         c->Request.CDBLen = 10;
6567                         c->Request.type_attr_dir =
6568                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6569                         c->Request.Timeout = 0;
6570                         c->Request.CDB[0] = BMIC_READ;
6571                         c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6572                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6573                         c->Request.CDB[8] = (size >> 8) & 0xFF;
6574                         break;
6575                 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6576                         c->Request.CDBLen = 10;
6577                         c->Request.type_attr_dir =
6578                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6579                         c->Request.Timeout = 0;
6580                         c->Request.CDB[0] = BMIC_READ;
6581                         c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6582                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6583                         c->Request.CDB[8] = (size >> 8) & 0XFF;
6584                         break;
6585                 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6586                         c->Request.CDBLen = 10;
6587                         c->Request.type_attr_dir =
6588                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6589                         c->Request.Timeout = 0;
6590                         c->Request.CDB[0] = BMIC_READ;
6591                         c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6592                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6593                         c->Request.CDB[8] = (size >> 8) & 0XFF;
6594                         break;
6595                 case BMIC_SENSE_STORAGE_BOX_PARAMS:
6596                         c->Request.CDBLen = 10;
6597                         c->Request.type_attr_dir =
6598                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6599                         c->Request.Timeout = 0;
6600                         c->Request.CDB[0] = BMIC_READ;
6601                         c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6602                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6603                         c->Request.CDB[8] = (size >> 8) & 0XFF;
6604                         break;
6605                 case BMIC_IDENTIFY_CONTROLLER:
6606                         c->Request.CDBLen = 10;
6607                         c->Request.type_attr_dir =
6608                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6609                         c->Request.Timeout = 0;
6610                         c->Request.CDB[0] = BMIC_READ;
6611                         c->Request.CDB[1] = 0;
6612                         c->Request.CDB[2] = 0;
6613                         c->Request.CDB[3] = 0;
6614                         c->Request.CDB[4] = 0;
6615                         c->Request.CDB[5] = 0;
6616                         c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
6617                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6618                         c->Request.CDB[8] = (size >> 8) & 0XFF;
6619                         c->Request.CDB[9] = 0;
6620                         break;
6621                 default:
6622                         dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6623                         BUG();
6624                 }
6625         } else if (cmd_type == TYPE_MSG) {
6626                 switch (cmd) {
6627
6628                 case  HPSA_PHYS_TARGET_RESET:
6629                         c->Request.CDBLen = 16;
6630                         c->Request.type_attr_dir =
6631                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6632                         c->Request.Timeout = 0; /* Don't time out */
6633                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6634                         c->Request.CDB[0] = HPSA_RESET;
6635                         c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
6636                         /* Physical target reset needs no control bytes 4-7*/
6637                         c->Request.CDB[4] = 0x00;
6638                         c->Request.CDB[5] = 0x00;
6639                         c->Request.CDB[6] = 0x00;
6640                         c->Request.CDB[7] = 0x00;
6641                         break;
6642                 case  HPSA_DEVICE_RESET_MSG:
6643                         c->Request.CDBLen = 16;
6644                         c->Request.type_attr_dir =
6645                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6646                         c->Request.Timeout = 0; /* Don't time out */
6647                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6648                         c->Request.CDB[0] =  cmd;
6649                         c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6650                         /* If bytes 4-7 are zero, it means reset the */
6651                         /* LunID device */
6652                         c->Request.CDB[4] = 0x00;
6653                         c->Request.CDB[5] = 0x00;
6654                         c->Request.CDB[6] = 0x00;
6655                         c->Request.CDB[7] = 0x00;
6656                         break;
6657                 default:
6658                         dev_warn(&h->pdev->dev, "unknown message type %d\n",
6659                                 cmd);
6660                         BUG();
6661                 }
6662         } else {
6663                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6664                 BUG();
6665         }
6666
6667         switch (GET_DIR(c->Request.type_attr_dir)) {
6668         case XFER_READ:
6669                 pci_dir = PCI_DMA_FROMDEVICE;
6670                 break;
6671         case XFER_WRITE:
6672                 pci_dir = PCI_DMA_TODEVICE;
6673                 break;
6674         case XFER_NONE:
6675                 pci_dir = PCI_DMA_NONE;
6676                 break;
6677         default:
6678                 pci_dir = PCI_DMA_BIDIRECTIONAL;
6679         }
6680         if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
6681                 return -1;
6682         return 0;
6683 }
6684
6685 /*
6686  * Map (physical) PCI mem into (virtual) kernel space
6687  */
6688 static void __iomem *remap_pci_mem(ulong base, ulong size)
6689 {
6690         ulong page_base = ((ulong) base) & PAGE_MASK;
6691         ulong page_offs = ((ulong) base) - page_base;
6692         void __iomem *page_remapped = ioremap_nocache(page_base,
6693                 page_offs + size);
6694
6695         return page_remapped ? (page_remapped + page_offs) : NULL;
6696 }
6697
6698 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6699 {
6700         return h->access.command_completed(h, q);
6701 }
6702
6703 static inline bool interrupt_pending(struct ctlr_info *h)
6704 {
6705         return h->access.intr_pending(h);
6706 }
6707
6708 static inline long interrupt_not_for_us(struct ctlr_info *h)
6709 {
6710         return (h->access.intr_pending(h) == 0) ||
6711                 (h->interrupts_enabled == 0);
6712 }
6713
6714 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6715         u32 raw_tag)
6716 {
6717         if (unlikely(tag_index >= h->nr_cmds)) {
6718                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6719                 return 1;
6720         }
6721         return 0;
6722 }
6723
6724 static inline void finish_cmd(struct CommandList *c)
6725 {
6726         dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6727         if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6728                         || c->cmd_type == CMD_IOACCEL2))
6729                 complete_scsi_command(c);
6730         else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6731                 complete(c->waiting);
6732 }
6733
6734 /* process completion of an indexed ("direct lookup") command */
6735 static inline void process_indexed_cmd(struct ctlr_info *h,
6736         u32 raw_tag)
6737 {
6738         u32 tag_index;
6739         struct CommandList *c;
6740
6741         tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6742         if (!bad_tag(h, tag_index, raw_tag)) {
6743                 c = h->cmd_pool + tag_index;
6744                 finish_cmd(c);
6745         }
6746 }
6747
6748 /* Some controllers, like p400, will give us one interrupt
6749  * after a soft reset, even if we turned interrupts off.
6750  * Only need to check for this in the hpsa_xxx_discard_completions
6751  * functions.
6752  */
6753 static int ignore_bogus_interrupt(struct ctlr_info *h)
6754 {
6755         if (likely(!reset_devices))
6756                 return 0;
6757
6758         if (likely(h->interrupts_enabled))
6759                 return 0;
6760
6761         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6762                 "(known firmware bug.)  Ignoring.\n");
6763
6764         return 1;
6765 }
6766
6767 /*
6768  * Convert &h->q[x] (passed to interrupt handlers) back to h.
6769  * Relies on (h-q[x] == x) being true for x such that
6770  * 0 <= x < MAX_REPLY_QUEUES.
6771  */
6772 static struct ctlr_info *queue_to_hba(u8 *queue)
6773 {
6774         return container_of((queue - *queue), struct ctlr_info, q[0]);
6775 }
6776
6777 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6778 {
6779         struct ctlr_info *h = queue_to_hba(queue);
6780         u8 q = *(u8 *) queue;
6781         u32 raw_tag;
6782
6783         if (ignore_bogus_interrupt(h))
6784                 return IRQ_NONE;
6785
6786         if (interrupt_not_for_us(h))
6787                 return IRQ_NONE;
6788         h->last_intr_timestamp = get_jiffies_64();
6789         while (interrupt_pending(h)) {
6790                 raw_tag = get_next_completion(h, q);
6791                 while (raw_tag != FIFO_EMPTY)
6792                         raw_tag = next_command(h, q);
6793         }
6794         return IRQ_HANDLED;
6795 }
6796
6797 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
6798 {
6799         struct ctlr_info *h = queue_to_hba(queue);
6800         u32 raw_tag;
6801         u8 q = *(u8 *) queue;
6802
6803         if (ignore_bogus_interrupt(h))
6804                 return IRQ_NONE;
6805
6806         h->last_intr_timestamp = get_jiffies_64();
6807         raw_tag = get_next_completion(h, q);
6808         while (raw_tag != FIFO_EMPTY)
6809                 raw_tag = next_command(h, q);
6810         return IRQ_HANDLED;
6811 }
6812
6813 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
6814 {
6815         struct ctlr_info *h = queue_to_hba((u8 *) queue);
6816         u32 raw_tag;
6817         u8 q = *(u8 *) queue;
6818
6819         if (interrupt_not_for_us(h))
6820                 return IRQ_NONE;
6821         h->last_intr_timestamp = get_jiffies_64();
6822         while (interrupt_pending(h)) {
6823                 raw_tag = get_next_completion(h, q);
6824                 while (raw_tag != FIFO_EMPTY) {
6825                         process_indexed_cmd(h, raw_tag);
6826                         raw_tag = next_command(h, q);
6827                 }
6828         }
6829         return IRQ_HANDLED;
6830 }
6831
6832 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
6833 {
6834         struct ctlr_info *h = queue_to_hba(queue);
6835         u32 raw_tag;
6836         u8 q = *(u8 *) queue;
6837
6838         h->last_intr_timestamp = get_jiffies_64();
6839         raw_tag = get_next_completion(h, q);
6840         while (raw_tag != FIFO_EMPTY) {
6841                 process_indexed_cmd(h, raw_tag);
6842                 raw_tag = next_command(h, q);
6843         }
6844         return IRQ_HANDLED;
6845 }
6846
6847 /* Send a message CDB to the firmware. Careful, this only works
6848  * in simple mode, not performant mode due to the tag lookup.
6849  * We only ever use this immediately after a controller reset.
6850  */
6851 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
6852                         unsigned char type)
6853 {
6854         struct Command {
6855                 struct CommandListHeader CommandHeader;
6856                 struct RequestBlock Request;
6857                 struct ErrDescriptor ErrorDescriptor;
6858         };
6859         struct Command *cmd;
6860         static const size_t cmd_sz = sizeof(*cmd) +
6861                                         sizeof(cmd->ErrorDescriptor);
6862         dma_addr_t paddr64;
6863         __le32 paddr32;
6864         u32 tag;
6865         void __iomem *vaddr;
6866         int i, err;
6867
6868         vaddr = pci_ioremap_bar(pdev, 0);
6869         if (vaddr == NULL)
6870                 return -ENOMEM;
6871
6872         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
6873          * CCISS commands, so they must be allocated from the lower 4GiB of
6874          * memory.
6875          */
6876         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
6877         if (err) {
6878                 iounmap(vaddr);
6879                 return err;
6880         }
6881
6882         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
6883         if (cmd == NULL) {
6884                 iounmap(vaddr);
6885                 return -ENOMEM;
6886         }
6887
6888         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
6889          * although there's no guarantee, we assume that the address is at
6890          * least 4-byte aligned (most likely, it's page-aligned).
6891          */
6892         paddr32 = cpu_to_le32(paddr64);
6893
6894         cmd->CommandHeader.ReplyQueue = 0;
6895         cmd->CommandHeader.SGList = 0;
6896         cmd->CommandHeader.SGTotal = cpu_to_le16(0);
6897         cmd->CommandHeader.tag = cpu_to_le64(paddr64);
6898         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
6899
6900         cmd->Request.CDBLen = 16;
6901         cmd->Request.type_attr_dir =
6902                         TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
6903         cmd->Request.Timeout = 0; /* Don't time out */
6904         cmd->Request.CDB[0] = opcode;
6905         cmd->Request.CDB[1] = type;
6906         memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
6907         cmd->ErrorDescriptor.Addr =
6908                         cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
6909         cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
6910
6911         writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
6912
6913         for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
6914                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
6915                 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
6916                         break;
6917                 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
6918         }
6919
6920         iounmap(vaddr);
6921
6922         /* we leak the DMA buffer here ... no choice since the controller could
6923          *  still complete the command.
6924          */
6925         if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
6926                 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
6927                         opcode, type);
6928                 return -ETIMEDOUT;
6929         }
6930
6931         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
6932
6933         if (tag & HPSA_ERROR_BIT) {
6934                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
6935                         opcode, type);
6936                 return -EIO;
6937         }
6938
6939         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
6940                 opcode, type);
6941         return 0;
6942 }
6943
6944 #define hpsa_noop(p) hpsa_message(p, 3, 0)
6945
6946 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
6947         void __iomem *vaddr, u32 use_doorbell)
6948 {
6949
6950         if (use_doorbell) {
6951                 /* For everything after the P600, the PCI power state method
6952                  * of resetting the controller doesn't work, so we have this
6953                  * other way using the doorbell register.
6954                  */
6955                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
6956                 writel(use_doorbell, vaddr + SA5_DOORBELL);
6957
6958                 /* PMC hardware guys tell us we need a 10 second delay after
6959                  * doorbell reset and before any attempt to talk to the board
6960                  * at all to ensure that this actually works and doesn't fall
6961                  * over in some weird corner cases.
6962                  */
6963                 msleep(10000);
6964         } else { /* Try to do it the PCI power state way */
6965
6966                 /* Quoting from the Open CISS Specification: "The Power
6967                  * Management Control/Status Register (CSR) controls the power
6968                  * state of the device.  The normal operating state is D0,
6969                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
6970                  * the controller, place the interface device in D3 then to D0,
6971                  * this causes a secondary PCI reset which will reset the
6972                  * controller." */
6973
6974                 int rc = 0;
6975
6976                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
6977
6978                 /* enter the D3hot power management state */
6979                 rc = pci_set_power_state(pdev, PCI_D3hot);
6980                 if (rc)
6981                         return rc;
6982
6983                 msleep(500);
6984
6985                 /* enter the D0 power management state */
6986                 rc = pci_set_power_state(pdev, PCI_D0);
6987                 if (rc)
6988                         return rc;
6989
6990                 /*
6991                  * The P600 requires a small delay when changing states.
6992                  * Otherwise we may think the board did not reset and we bail.
6993                  * This for kdump only and is particular to the P600.
6994                  */
6995                 msleep(500);
6996         }
6997         return 0;
6998 }
6999
7000 static void init_driver_version(char *driver_version, int len)
7001 {
7002         memset(driver_version, 0, len);
7003         strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7004 }
7005
7006 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7007 {
7008         char *driver_version;
7009         int i, size = sizeof(cfgtable->driver_version);
7010
7011         driver_version = kmalloc(size, GFP_KERNEL);
7012         if (!driver_version)
7013                 return -ENOMEM;
7014
7015         init_driver_version(driver_version, size);
7016         for (i = 0; i < size; i++)
7017                 writeb(driver_version[i], &cfgtable->driver_version[i]);
7018         kfree(driver_version);
7019         return 0;
7020 }
7021
7022 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7023                                           unsigned char *driver_ver)
7024 {
7025         int i;
7026
7027         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7028                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
7029 }
7030
7031 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7032 {
7033
7034         char *driver_ver, *old_driver_ver;
7035         int rc, size = sizeof(cfgtable->driver_version);
7036
7037         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
7038         if (!old_driver_ver)
7039                 return -ENOMEM;
7040         driver_ver = old_driver_ver + size;
7041
7042         /* After a reset, the 32 bytes of "driver version" in the cfgtable
7043          * should have been changed, otherwise we know the reset failed.
7044          */
7045         init_driver_version(old_driver_ver, size);
7046         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7047         rc = !memcmp(driver_ver, old_driver_ver, size);
7048         kfree(old_driver_ver);
7049         return rc;
7050 }
7051 /* This does a hard reset of the controller using PCI power management
7052  * states or the using the doorbell register.
7053  */
7054 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
7055 {
7056         u64 cfg_offset;
7057         u32 cfg_base_addr;
7058         u64 cfg_base_addr_index;
7059         void __iomem *vaddr;
7060         unsigned long paddr;
7061         u32 misc_fw_support;
7062         int rc;
7063         struct CfgTable __iomem *cfgtable;
7064         u32 use_doorbell;
7065         u16 command_register;
7066
7067         /* For controllers as old as the P600, this is very nearly
7068          * the same thing as
7069          *
7070          * pci_save_state(pci_dev);
7071          * pci_set_power_state(pci_dev, PCI_D3hot);
7072          * pci_set_power_state(pci_dev, PCI_D0);
7073          * pci_restore_state(pci_dev);
7074          *
7075          * For controllers newer than the P600, the pci power state
7076          * method of resetting doesn't work so we have another way
7077          * using the doorbell register.
7078          */
7079
7080         if (!ctlr_is_resettable(board_id)) {
7081                 dev_warn(&pdev->dev, "Controller not resettable\n");
7082                 return -ENODEV;
7083         }
7084
7085         /* if controller is soft- but not hard resettable... */
7086         if (!ctlr_is_hard_resettable(board_id))
7087                 return -ENOTSUPP; /* try soft reset later. */
7088
7089         /* Save the PCI command register */
7090         pci_read_config_word(pdev, 4, &command_register);
7091         pci_save_state(pdev);
7092
7093         /* find the first memory BAR, so we can find the cfg table */
7094         rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7095         if (rc)
7096                 return rc;
7097         vaddr = remap_pci_mem(paddr, 0x250);
7098         if (!vaddr)
7099                 return -ENOMEM;
7100
7101         /* find cfgtable in order to check if reset via doorbell is supported */
7102         rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7103                                         &cfg_base_addr_index, &cfg_offset);
7104         if (rc)
7105                 goto unmap_vaddr;
7106         cfgtable = remap_pci_mem(pci_resource_start(pdev,
7107                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7108         if (!cfgtable) {
7109                 rc = -ENOMEM;
7110                 goto unmap_vaddr;
7111         }
7112         rc = write_driver_ver_to_cfgtable(cfgtable);
7113         if (rc)
7114                 goto unmap_cfgtable;
7115
7116         /* If reset via doorbell register is supported, use that.
7117          * There are two such methods.  Favor the newest method.
7118          */
7119         misc_fw_support = readl(&cfgtable->misc_fw_support);
7120         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7121         if (use_doorbell) {
7122                 use_doorbell = DOORBELL_CTLR_RESET2;
7123         } else {
7124                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7125                 if (use_doorbell) {
7126                         dev_warn(&pdev->dev,
7127                                 "Soft reset not supported. Firmware update is required.\n");
7128                         rc = -ENOTSUPP; /* try soft reset */
7129                         goto unmap_cfgtable;
7130                 }
7131         }
7132
7133         rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7134         if (rc)
7135                 goto unmap_cfgtable;
7136
7137         pci_restore_state(pdev);
7138         pci_write_config_word(pdev, 4, command_register);
7139
7140         /* Some devices (notably the HP Smart Array 5i Controller)
7141            need a little pause here */
7142         msleep(HPSA_POST_RESET_PAUSE_MSECS);
7143
7144         rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7145         if (rc) {
7146                 dev_warn(&pdev->dev,
7147                         "Failed waiting for board to become ready after hard reset\n");
7148                 goto unmap_cfgtable;
7149         }
7150
7151         rc = controller_reset_failed(vaddr);
7152         if (rc < 0)
7153                 goto unmap_cfgtable;
7154         if (rc) {
7155                 dev_warn(&pdev->dev, "Unable to successfully reset "
7156                         "controller. Will try soft reset.\n");
7157                 rc = -ENOTSUPP;
7158         } else {
7159                 dev_info(&pdev->dev, "board ready after hard reset.\n");
7160         }
7161
7162 unmap_cfgtable:
7163         iounmap(cfgtable);
7164
7165 unmap_vaddr:
7166         iounmap(vaddr);
7167         return rc;
7168 }
7169
7170 /*
7171  *  We cannot read the structure directly, for portability we must use
7172  *   the io functions.
7173  *   This is for debug only.
7174  */
7175 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7176 {
7177 #ifdef HPSA_DEBUG
7178         int i;
7179         char temp_name[17];
7180
7181         dev_info(dev, "Controller Configuration information\n");
7182         dev_info(dev, "------------------------------------\n");
7183         for (i = 0; i < 4; i++)
7184                 temp_name[i] = readb(&(tb->Signature[i]));
7185         temp_name[4] = '\0';
7186         dev_info(dev, "   Signature = %s\n", temp_name);
7187         dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
7188         dev_info(dev, "   Transport methods supported = 0x%x\n",
7189                readl(&(tb->TransportSupport)));
7190         dev_info(dev, "   Transport methods active = 0x%x\n",
7191                readl(&(tb->TransportActive)));
7192         dev_info(dev, "   Requested transport Method = 0x%x\n",
7193                readl(&(tb->HostWrite.TransportRequest)));
7194         dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
7195                readl(&(tb->HostWrite.CoalIntDelay)));
7196         dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
7197                readl(&(tb->HostWrite.CoalIntCount)));
7198         dev_info(dev, "   Max outstanding commands = %d\n",
7199                readl(&(tb->CmdsOutMax)));
7200         dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7201         for (i = 0; i < 16; i++)
7202                 temp_name[i] = readb(&(tb->ServerName[i]));
7203         temp_name[16] = '\0';
7204         dev_info(dev, "   Server Name = %s\n", temp_name);
7205         dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
7206                 readl(&(tb->HeartBeat)));
7207 #endif                          /* HPSA_DEBUG */
7208 }
7209
7210 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7211 {
7212         int i, offset, mem_type, bar_type;
7213
7214         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
7215                 return 0;
7216         offset = 0;
7217         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7218                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7219                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7220                         offset += 4;
7221                 else {
7222                         mem_type = pci_resource_flags(pdev, i) &
7223                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7224                         switch (mem_type) {
7225                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
7226                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7227                                 offset += 4;    /* 32 bit */
7228                                 break;
7229                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
7230                                 offset += 8;
7231                                 break;
7232                         default:        /* reserved in PCI 2.2 */
7233                                 dev_warn(&pdev->dev,
7234                                        "base address is invalid\n");
7235                                 return -1;
7236                                 break;
7237                         }
7238                 }
7239                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7240                         return i + 1;
7241         }
7242         return -1;
7243 }
7244
7245 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7246 {
7247         pci_free_irq_vectors(h->pdev);
7248         h->msix_vectors = 0;
7249 }
7250
7251 static void hpsa_setup_reply_map(struct ctlr_info *h)
7252 {
7253         const struct cpumask *mask;
7254         unsigned int queue, cpu;
7255
7256         for (queue = 0; queue < h->msix_vectors; queue++) {
7257                 mask = pci_irq_get_affinity(h->pdev, queue);
7258                 if (!mask)
7259                         goto fallback;
7260
7261                 for_each_cpu(cpu, mask)
7262                         h->reply_map[cpu] = queue;
7263         }
7264         return;
7265
7266 fallback:
7267         for_each_possible_cpu(cpu)
7268                 h->reply_map[cpu] = 0;
7269 }
7270
7271 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7272  * controllers that are capable. If not, we use legacy INTx mode.
7273  */
7274 static int hpsa_interrupt_mode(struct ctlr_info *h)
7275 {
7276         unsigned int flags = PCI_IRQ_LEGACY;
7277         int ret;
7278
7279         /* Some boards advertise MSI but don't really support it */
7280         switch (h->board_id) {
7281         case 0x40700E11:
7282         case 0x40800E11:
7283         case 0x40820E11:
7284         case 0x40830E11:
7285                 break;
7286         default:
7287                 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7288                                 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7289                 if (ret > 0) {
7290                         h->msix_vectors = ret;
7291                         return 0;
7292                 }
7293
7294                 flags |= PCI_IRQ_MSI;
7295                 break;
7296         }
7297
7298         ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7299         if (ret < 0)
7300                 return ret;
7301         return 0;
7302 }
7303
7304 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
7305                                 bool *legacy_board)
7306 {
7307         int i;
7308         u32 subsystem_vendor_id, subsystem_device_id;
7309
7310         subsystem_vendor_id = pdev->subsystem_vendor;
7311         subsystem_device_id = pdev->subsystem_device;
7312         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7313                     subsystem_vendor_id;
7314
7315         if (legacy_board)
7316                 *legacy_board = false;
7317         for (i = 0; i < ARRAY_SIZE(products); i++)
7318                 if (*board_id == products[i].board_id) {
7319                         if (products[i].access != &SA5A_access &&
7320                             products[i].access != &SA5B_access)
7321                                 return i;
7322                         dev_warn(&pdev->dev,
7323                                  "legacy board ID: 0x%08x\n",
7324                                  *board_id);
7325                         if (legacy_board)
7326                             *legacy_board = true;
7327                         return i;
7328                 }
7329
7330         dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id);
7331         if (legacy_board)
7332                 *legacy_board = true;
7333         return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7334 }
7335
7336 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7337                                     unsigned long *memory_bar)
7338 {
7339         int i;
7340
7341         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7342                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7343                         /* addressing mode bits already removed */
7344                         *memory_bar = pci_resource_start(pdev, i);
7345                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7346                                 *memory_bar);
7347                         return 0;
7348                 }
7349         dev_warn(&pdev->dev, "no memory BAR found\n");
7350         return -ENODEV;
7351 }
7352
7353 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7354                                      int wait_for_ready)
7355 {
7356         int i, iterations;
7357         u32 scratchpad;
7358         if (wait_for_ready)
7359                 iterations = HPSA_BOARD_READY_ITERATIONS;
7360         else
7361                 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7362
7363         for (i = 0; i < iterations; i++) {
7364                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7365                 if (wait_for_ready) {
7366                         if (scratchpad == HPSA_FIRMWARE_READY)
7367                                 return 0;
7368                 } else {
7369                         if (scratchpad != HPSA_FIRMWARE_READY)
7370                                 return 0;
7371                 }
7372                 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7373         }
7374         dev_warn(&pdev->dev, "board not ready, timed out.\n");
7375         return -ENODEV;
7376 }
7377
7378 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7379                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7380                                u64 *cfg_offset)
7381 {
7382         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7383         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7384         *cfg_base_addr &= (u32) 0x0000ffff;
7385         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7386         if (*cfg_base_addr_index == -1) {
7387                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7388                 return -ENODEV;
7389         }
7390         return 0;
7391 }
7392
7393 static void hpsa_free_cfgtables(struct ctlr_info *h)
7394 {
7395         if (h->transtable) {
7396                 iounmap(h->transtable);
7397                 h->transtable = NULL;
7398         }
7399         if (h->cfgtable) {
7400                 iounmap(h->cfgtable);
7401                 h->cfgtable = NULL;
7402         }
7403 }
7404
7405 /* Find and map CISS config table and transfer table
7406 + * several items must be unmapped (freed) later
7407 + * */
7408 static int hpsa_find_cfgtables(struct ctlr_info *h)
7409 {
7410         u64 cfg_offset;
7411         u32 cfg_base_addr;
7412         u64 cfg_base_addr_index;
7413         u32 trans_offset;
7414         int rc;
7415
7416         rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7417                 &cfg_base_addr_index, &cfg_offset);
7418         if (rc)
7419                 return rc;
7420         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7421                        cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7422         if (!h->cfgtable) {
7423                 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7424                 return -ENOMEM;
7425         }
7426         rc = write_driver_ver_to_cfgtable(h->cfgtable);
7427         if (rc)
7428                 return rc;
7429         /* Find performant mode table. */
7430         trans_offset = readl(&h->cfgtable->TransMethodOffset);
7431         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7432                                 cfg_base_addr_index)+cfg_offset+trans_offset,
7433                                 sizeof(*h->transtable));
7434         if (!h->transtable) {
7435                 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7436                 hpsa_free_cfgtables(h);
7437                 return -ENOMEM;
7438         }
7439         return 0;
7440 }
7441
7442 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7443 {
7444 #define MIN_MAX_COMMANDS 16
7445         BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7446
7447         h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7448
7449         /* Limit commands in memory limited kdump scenario. */
7450         if (reset_devices && h->max_commands > 32)
7451                 h->max_commands = 32;
7452
7453         if (h->max_commands < MIN_MAX_COMMANDS) {
7454                 dev_warn(&h->pdev->dev,
7455                         "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7456                         h->max_commands,
7457                         MIN_MAX_COMMANDS);
7458                 h->max_commands = MIN_MAX_COMMANDS;
7459         }
7460 }
7461
7462 /* If the controller reports that the total max sg entries is greater than 512,
7463  * then we know that chained SG blocks work.  (Original smart arrays did not
7464  * support chained SG blocks and would return zero for max sg entries.)
7465  */
7466 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7467 {
7468         return h->maxsgentries > 512;
7469 }
7470
7471 /* Interrogate the hardware for some limits:
7472  * max commands, max SG elements without chaining, and with chaining,
7473  * SG chain block size, etc.
7474  */
7475 static void hpsa_find_board_params(struct ctlr_info *h)
7476 {
7477         hpsa_get_max_perf_mode_cmds(h);
7478         h->nr_cmds = h->max_commands;
7479         h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7480         h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7481         if (hpsa_supports_chained_sg_blocks(h)) {
7482                 /* Limit in-command s/g elements to 32 save dma'able memory. */
7483                 h->max_cmd_sg_entries = 32;
7484                 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7485                 h->maxsgentries--; /* save one for chain pointer */
7486         } else {
7487                 /*
7488                  * Original smart arrays supported at most 31 s/g entries
7489                  * embedded inline in the command (trying to use more
7490                  * would lock up the controller)
7491                  */
7492                 h->max_cmd_sg_entries = 31;
7493                 h->maxsgentries = 31; /* default to traditional values */
7494                 h->chainsize = 0;
7495         }
7496
7497         /* Find out what task management functions are supported and cache */
7498         h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7499         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7500                 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7501         if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7502                 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7503         if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7504                 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7505 }
7506
7507 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7508 {
7509         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7510                 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7511                 return false;
7512         }
7513         return true;
7514 }
7515
7516 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7517 {
7518         u32 driver_support;
7519
7520         driver_support = readl(&(h->cfgtable->driver_support));
7521         /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7522 #ifdef CONFIG_X86
7523         driver_support |= ENABLE_SCSI_PREFETCH;
7524 #endif
7525         driver_support |= ENABLE_UNIT_ATTN;
7526         writel(driver_support, &(h->cfgtable->driver_support));
7527 }
7528
7529 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
7530  * in a prefetch beyond physical memory.
7531  */
7532 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7533 {
7534         u32 dma_prefetch;
7535
7536         if (h->board_id != 0x3225103C)
7537                 return;
7538         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7539         dma_prefetch |= 0x8000;
7540         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7541 }
7542
7543 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7544 {
7545         int i;
7546         u32 doorbell_value;
7547         unsigned long flags;
7548         /* wait until the clear_event_notify bit 6 is cleared by controller. */
7549         for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7550                 spin_lock_irqsave(&h->lock, flags);
7551                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7552                 spin_unlock_irqrestore(&h->lock, flags);
7553                 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7554                         goto done;
7555                 /* delay and try again */
7556                 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7557         }
7558         return -ENODEV;
7559 done:
7560         return 0;
7561 }
7562
7563 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7564 {
7565         int i;
7566         u32 doorbell_value;
7567         unsigned long flags;
7568
7569         /* under certain very rare conditions, this can take awhile.
7570          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7571          * as we enter this code.)
7572          */
7573         for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7574                 if (h->remove_in_progress)
7575                         goto done;
7576                 spin_lock_irqsave(&h->lock, flags);
7577                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7578                 spin_unlock_irqrestore(&h->lock, flags);
7579                 if (!(doorbell_value & CFGTBL_ChangeReq))
7580                         goto done;
7581                 /* delay and try again */
7582                 msleep(MODE_CHANGE_WAIT_INTERVAL);
7583         }
7584         return -ENODEV;
7585 done:
7586         return 0;
7587 }
7588
7589 /* return -ENODEV or other reason on error, 0 on success */
7590 static int hpsa_enter_simple_mode(struct ctlr_info *h)
7591 {
7592         u32 trans_support;
7593
7594         trans_support = readl(&(h->cfgtable->TransportSupport));
7595         if (!(trans_support & SIMPLE_MODE))
7596                 return -ENOTSUPP;
7597
7598         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7599
7600         /* Update the field, and then ring the doorbell */
7601         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7602         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7603         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7604         if (hpsa_wait_for_mode_change_ack(h))
7605                 goto error;
7606         print_cfg_table(&h->pdev->dev, h->cfgtable);
7607         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7608                 goto error;
7609         h->transMethod = CFGTBL_Trans_Simple;
7610         return 0;
7611 error:
7612         dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7613         return -ENODEV;
7614 }
7615
7616 /* free items allocated or mapped by hpsa_pci_init */
7617 static void hpsa_free_pci_init(struct ctlr_info *h)
7618 {
7619         hpsa_free_cfgtables(h);                 /* pci_init 4 */
7620         iounmap(h->vaddr);                      /* pci_init 3 */
7621         h->vaddr = NULL;
7622         hpsa_disable_interrupt_mode(h);         /* pci_init 2 */
7623         /*
7624          * call pci_disable_device before pci_release_regions per
7625          * Documentation/PCI/pci.txt
7626          */
7627         pci_disable_device(h->pdev);            /* pci_init 1 */
7628         pci_release_regions(h->pdev);           /* pci_init 2 */
7629 }
7630
7631 /* several items must be freed later */
7632 static int hpsa_pci_init(struct ctlr_info *h)
7633 {
7634         int prod_index, err;
7635         bool legacy_board;
7636
7637         prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board);
7638         if (prod_index < 0)
7639                 return prod_index;
7640         h->product_name = products[prod_index].product_name;
7641         h->access = *(products[prod_index].access);
7642         h->legacy_board = legacy_board;
7643         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7644                                PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7645
7646         err = pci_enable_device(h->pdev);
7647         if (err) {
7648                 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7649                 pci_disable_device(h->pdev);
7650                 return err;
7651         }
7652
7653         err = pci_request_regions(h->pdev, HPSA);
7654         if (err) {
7655                 dev_err(&h->pdev->dev,
7656                         "failed to obtain PCI resources\n");
7657                 pci_disable_device(h->pdev);
7658                 return err;
7659         }
7660
7661         pci_set_master(h->pdev);
7662
7663         err = hpsa_interrupt_mode(h);
7664         if (err)
7665                 goto clean1;
7666
7667         /* setup mapping between CPU and reply queue */
7668         hpsa_setup_reply_map(h);
7669
7670         err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7671         if (err)
7672                 goto clean2;    /* intmode+region, pci */
7673         h->vaddr = remap_pci_mem(h->paddr, 0x250);
7674         if (!h->vaddr) {
7675                 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7676                 err = -ENOMEM;
7677                 goto clean2;    /* intmode+region, pci */
7678         }
7679         err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7680         if (err)
7681                 goto clean3;    /* vaddr, intmode+region, pci */
7682         err = hpsa_find_cfgtables(h);
7683         if (err)
7684                 goto clean3;    /* vaddr, intmode+region, pci */
7685         hpsa_find_board_params(h);
7686
7687         if (!hpsa_CISS_signature_present(h)) {
7688                 err = -ENODEV;
7689                 goto clean4;    /* cfgtables, vaddr, intmode+region, pci */
7690         }
7691         hpsa_set_driver_support_bits(h);
7692         hpsa_p600_dma_prefetch_quirk(h);
7693         err = hpsa_enter_simple_mode(h);
7694         if (err)
7695                 goto clean4;    /* cfgtables, vaddr, intmode+region, pci */
7696         return 0;
7697
7698 clean4: /* cfgtables, vaddr, intmode+region, pci */
7699         hpsa_free_cfgtables(h);
7700 clean3: /* vaddr, intmode+region, pci */
7701         iounmap(h->vaddr);
7702         h->vaddr = NULL;
7703 clean2: /* intmode+region, pci */
7704         hpsa_disable_interrupt_mode(h);
7705 clean1:
7706         /*
7707          * call pci_disable_device before pci_release_regions per
7708          * Documentation/PCI/pci.txt
7709          */
7710         pci_disable_device(h->pdev);
7711         pci_release_regions(h->pdev);
7712         return err;
7713 }
7714
7715 static void hpsa_hba_inquiry(struct ctlr_info *h)
7716 {
7717         int rc;
7718
7719 #define HBA_INQUIRY_BYTE_COUNT 64
7720         h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7721         if (!h->hba_inquiry_data)
7722                 return;
7723         rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7724                 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7725         if (rc != 0) {
7726                 kfree(h->hba_inquiry_data);
7727                 h->hba_inquiry_data = NULL;
7728         }
7729 }
7730
7731 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7732 {
7733         int rc, i;
7734         void __iomem *vaddr;
7735
7736         if (!reset_devices)
7737                 return 0;
7738
7739         /* kdump kernel is loading, we don't know in which state is
7740          * the pci interface. The dev->enable_cnt is equal zero
7741          * so we call enable+disable, wait a while and switch it on.
7742          */
7743         rc = pci_enable_device(pdev);
7744         if (rc) {
7745                 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7746                 return -ENODEV;
7747         }
7748         pci_disable_device(pdev);
7749         msleep(260);                    /* a randomly chosen number */
7750         rc = pci_enable_device(pdev);
7751         if (rc) {
7752                 dev_warn(&pdev->dev, "failed to enable device.\n");
7753                 return -ENODEV;
7754         }
7755
7756         pci_set_master(pdev);
7757
7758         vaddr = pci_ioremap_bar(pdev, 0);
7759         if (vaddr == NULL) {
7760                 rc = -ENOMEM;
7761                 goto out_disable;
7762         }
7763         writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7764         iounmap(vaddr);
7765
7766         /* Reset the controller with a PCI power-cycle or via doorbell */
7767         rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7768
7769         /* -ENOTSUPP here means we cannot reset the controller
7770          * but it's already (and still) up and running in
7771          * "performant mode".  Or, it might be 640x, which can't reset
7772          * due to concerns about shared bbwc between 6402/6404 pair.
7773          */
7774         if (rc)
7775                 goto out_disable;
7776
7777         /* Now try to get the controller to respond to a no-op */
7778         dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7779         for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7780                 if (hpsa_noop(pdev) == 0)
7781                         break;
7782                 else
7783                         dev_warn(&pdev->dev, "no-op failed%s\n",
7784                                         (i < 11 ? "; re-trying" : ""));
7785         }
7786
7787 out_disable:
7788
7789         pci_disable_device(pdev);
7790         return rc;
7791 }
7792
7793 static void hpsa_free_cmd_pool(struct ctlr_info *h)
7794 {
7795         kfree(h->cmd_pool_bits);
7796         h->cmd_pool_bits = NULL;
7797         if (h->cmd_pool) {
7798                 pci_free_consistent(h->pdev,
7799                                 h->nr_cmds * sizeof(struct CommandList),
7800                                 h->cmd_pool,
7801                                 h->cmd_pool_dhandle);
7802                 h->cmd_pool = NULL;
7803                 h->cmd_pool_dhandle = 0;
7804         }
7805         if (h->errinfo_pool) {
7806                 pci_free_consistent(h->pdev,
7807                                 h->nr_cmds * sizeof(struct ErrorInfo),
7808                                 h->errinfo_pool,
7809                                 h->errinfo_pool_dhandle);
7810                 h->errinfo_pool = NULL;
7811                 h->errinfo_pool_dhandle = 0;
7812         }
7813 }
7814
7815 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
7816 {
7817         h->cmd_pool_bits = kzalloc(
7818                 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
7819                 sizeof(unsigned long), GFP_KERNEL);
7820         h->cmd_pool = pci_alloc_consistent(h->pdev,
7821                     h->nr_cmds * sizeof(*h->cmd_pool),
7822                     &(h->cmd_pool_dhandle));
7823         h->errinfo_pool = pci_alloc_consistent(h->pdev,
7824                     h->nr_cmds * sizeof(*h->errinfo_pool),
7825                     &(h->errinfo_pool_dhandle));
7826         if ((h->cmd_pool_bits == NULL)
7827             || (h->cmd_pool == NULL)
7828             || (h->errinfo_pool == NULL)) {
7829                 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
7830                 goto clean_up;
7831         }
7832         hpsa_preinitialize_commands(h);
7833         return 0;
7834 clean_up:
7835         hpsa_free_cmd_pool(h);
7836         return -ENOMEM;
7837 }
7838
7839 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
7840 static void hpsa_free_irqs(struct ctlr_info *h)
7841 {
7842         int i;
7843
7844         if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
7845                 /* Single reply queue, only one irq to free */
7846                 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]);
7847                 h->q[h->intr_mode] = 0;
7848                 return;
7849         }
7850
7851         for (i = 0; i < h->msix_vectors; i++) {
7852                 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
7853                 h->q[i] = 0;
7854         }
7855         for (; i < MAX_REPLY_QUEUES; i++)
7856                 h->q[i] = 0;
7857 }
7858
7859 /* returns 0 on success; cleans up and returns -Enn on error */
7860 static int hpsa_request_irqs(struct ctlr_info *h,
7861         irqreturn_t (*msixhandler)(int, void *),
7862         irqreturn_t (*intxhandler)(int, void *))
7863 {
7864         int rc, i;
7865
7866         /*
7867          * initialize h->q[x] = x so that interrupt handlers know which
7868          * queue to process.
7869          */
7870         for (i = 0; i < MAX_REPLY_QUEUES; i++)
7871                 h->q[i] = (u8) i;
7872
7873         if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
7874                 /* If performant mode and MSI-X, use multiple reply queues */
7875                 for (i = 0; i < h->msix_vectors; i++) {
7876                         sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
7877                         rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
7878                                         0, h->intrname[i],
7879                                         &h->q[i]);
7880                         if (rc) {
7881                                 int j;
7882
7883                                 dev_err(&h->pdev->dev,
7884                                         "failed to get irq %d for %s\n",
7885                                        pci_irq_vector(h->pdev, i), h->devname);
7886                                 for (j = 0; j < i; j++) {
7887                                         free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
7888                                         h->q[j] = 0;
7889                                 }
7890                                 for (; j < MAX_REPLY_QUEUES; j++)
7891                                         h->q[j] = 0;
7892                                 return rc;
7893                         }
7894                 }
7895         } else {
7896                 /* Use single reply pool */
7897                 if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
7898                         sprintf(h->intrname[0], "%s-msi%s", h->devname,
7899                                 h->msix_vectors ? "x" : "");
7900                         rc = request_irq(pci_irq_vector(h->pdev, 0),
7901                                 msixhandler, 0,
7902                                 h->intrname[0],
7903                                 &h->q[h->intr_mode]);
7904                 } else {
7905                         sprintf(h->intrname[h->intr_mode],
7906                                 "%s-intx", h->devname);
7907                         rc = request_irq(pci_irq_vector(h->pdev, 0),
7908                                 intxhandler, IRQF_SHARED,
7909                                 h->intrname[0],
7910                                 &h->q[h->intr_mode]);
7911                 }
7912         }
7913         if (rc) {
7914                 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
7915                        pci_irq_vector(h->pdev, 0), h->devname);
7916                 hpsa_free_irqs(h);
7917                 return -ENODEV;
7918         }
7919         return 0;
7920 }
7921
7922 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
7923 {
7924         int rc;
7925         hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
7926
7927         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
7928         rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
7929         if (rc) {
7930                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
7931                 return rc;
7932         }
7933
7934         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
7935         rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7936         if (rc) {
7937                 dev_warn(&h->pdev->dev, "Board failed to become ready "
7938                         "after soft reset.\n");
7939                 return rc;
7940         }
7941
7942         return 0;
7943 }
7944
7945 static void hpsa_free_reply_queues(struct ctlr_info *h)
7946 {
7947         int i;
7948
7949         for (i = 0; i < h->nreply_queues; i++) {
7950                 if (!h->reply_queue[i].head)
7951                         continue;
7952                 pci_free_consistent(h->pdev,
7953                                         h->reply_queue_size,
7954                                         h->reply_queue[i].head,
7955                                         h->reply_queue[i].busaddr);
7956                 h->reply_queue[i].head = NULL;
7957                 h->reply_queue[i].busaddr = 0;
7958         }
7959         h->reply_queue_size = 0;
7960 }
7961
7962 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
7963 {
7964         hpsa_free_performant_mode(h);           /* init_one 7 */
7965         hpsa_free_sg_chain_blocks(h);           /* init_one 6 */
7966         hpsa_free_cmd_pool(h);                  /* init_one 5 */
7967         hpsa_free_irqs(h);                      /* init_one 4 */
7968         scsi_host_put(h->scsi_host);            /* init_one 3 */
7969         h->scsi_host = NULL;                    /* init_one 3 */
7970         hpsa_free_pci_init(h);                  /* init_one 2_5 */
7971         free_percpu(h->lockup_detected);        /* init_one 2 */
7972         h->lockup_detected = NULL;              /* init_one 2 */
7973         if (h->resubmit_wq) {
7974                 destroy_workqueue(h->resubmit_wq);      /* init_one 1 */
7975                 h->resubmit_wq = NULL;
7976         }
7977         if (h->rescan_ctlr_wq) {
7978                 destroy_workqueue(h->rescan_ctlr_wq);
7979                 h->rescan_ctlr_wq = NULL;
7980         }
7981         kfree(h);                               /* init_one 1 */
7982 }
7983
7984 /* Called when controller lockup detected. */
7985 static void fail_all_outstanding_cmds(struct ctlr_info *h)
7986 {
7987         int i, refcount;
7988         struct CommandList *c;
7989         int failcount = 0;
7990
7991         flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
7992         for (i = 0; i < h->nr_cmds; i++) {
7993                 c = h->cmd_pool + i;
7994                 refcount = atomic_inc_return(&c->refcount);
7995                 if (refcount > 1) {
7996                         c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
7997                         finish_cmd(c);
7998                         atomic_dec(&h->commands_outstanding);
7999                         failcount++;
8000                 }
8001                 cmd_free(h, c);
8002         }
8003         dev_warn(&h->pdev->dev,
8004                 "failed %d commands in fail_all\n", failcount);
8005 }
8006
8007 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8008 {
8009         int cpu;
8010
8011         for_each_online_cpu(cpu) {
8012                 u32 *lockup_detected;
8013                 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8014                 *lockup_detected = value;
8015         }
8016         wmb(); /* be sure the per-cpu variables are out to memory */
8017 }
8018
8019 static void controller_lockup_detected(struct ctlr_info *h)
8020 {
8021         unsigned long flags;
8022         u32 lockup_detected;
8023
8024         h->access.set_intr_mask(h, HPSA_INTR_OFF);
8025         spin_lock_irqsave(&h->lock, flags);
8026         lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8027         if (!lockup_detected) {
8028                 /* no heartbeat, but controller gave us a zero. */
8029                 dev_warn(&h->pdev->dev,
8030                         "lockup detected after %d but scratchpad register is zero\n",
8031                         h->heartbeat_sample_interval / HZ);
8032                 lockup_detected = 0xffffffff;
8033         }
8034         set_lockup_detected_for_all_cpus(h, lockup_detected);
8035         spin_unlock_irqrestore(&h->lock, flags);
8036         dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8037                         lockup_detected, h->heartbeat_sample_interval / HZ);
8038         pci_disable_device(h->pdev);
8039         fail_all_outstanding_cmds(h);
8040 }
8041
8042 static int detect_controller_lockup(struct ctlr_info *h)
8043 {
8044         u64 now;
8045         u32 heartbeat;
8046         unsigned long flags;
8047
8048         now = get_jiffies_64();
8049         /* If we've received an interrupt recently, we're ok. */
8050         if (time_after64(h->last_intr_timestamp +
8051                                 (h->heartbeat_sample_interval), now))
8052                 return false;
8053
8054         /*
8055          * If we've already checked the heartbeat recently, we're ok.
8056          * This could happen if someone sends us a signal. We
8057          * otherwise don't care about signals in this thread.
8058          */
8059         if (time_after64(h->last_heartbeat_timestamp +
8060                                 (h->heartbeat_sample_interval), now))
8061                 return false;
8062
8063         /* If heartbeat has not changed since we last looked, we're not ok. */
8064         spin_lock_irqsave(&h->lock, flags);
8065         heartbeat = readl(&h->cfgtable->HeartBeat);
8066         spin_unlock_irqrestore(&h->lock, flags);
8067         if (h->last_heartbeat == heartbeat) {
8068                 controller_lockup_detected(h);
8069                 return true;
8070         }
8071
8072         /* We're ok. */
8073         h->last_heartbeat = heartbeat;
8074         h->last_heartbeat_timestamp = now;
8075         return false;
8076 }
8077
8078 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
8079 {
8080         int i;
8081         char *event_type;
8082
8083         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8084                 return;
8085
8086         /* Ask the controller to clear the events we're handling. */
8087         if ((h->transMethod & (CFGTBL_Trans_io_accel1
8088                         | CFGTBL_Trans_io_accel2)) &&
8089                 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8090                  h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8091
8092                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8093                         event_type = "state change";
8094                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8095                         event_type = "configuration change";
8096                 /* Stop sending new RAID offload reqs via the IO accelerator */
8097                 scsi_block_requests(h->scsi_host);
8098                 for (i = 0; i < h->ndevices; i++) {
8099                         h->dev[i]->offload_enabled = 0;
8100                         h->dev[i]->offload_to_be_enabled = 0;
8101                 }
8102                 hpsa_drain_accel_commands(h);
8103                 /* Set 'accelerator path config change' bit */
8104                 dev_warn(&h->pdev->dev,
8105                         "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8106                         h->events, event_type);
8107                 writel(h->events, &(h->cfgtable->clear_event_notify));
8108                 /* Set the "clear event notify field update" bit 6 */
8109                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8110                 /* Wait until ctlr clears 'clear event notify field', bit 6 */
8111                 hpsa_wait_for_clear_event_notify_ack(h);
8112                 scsi_unblock_requests(h->scsi_host);
8113         } else {
8114                 /* Acknowledge controller notification events. */
8115                 writel(h->events, &(h->cfgtable->clear_event_notify));
8116                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8117                 hpsa_wait_for_clear_event_notify_ack(h);
8118 #if 0
8119                 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8120                 hpsa_wait_for_mode_change_ack(h);
8121 #endif
8122         }
8123         return;
8124 }
8125
8126 /* Check a register on the controller to see if there are configuration
8127  * changes (added/changed/removed logical drives, etc.) which mean that
8128  * we should rescan the controller for devices.
8129  * Also check flag for driver-initiated rescan.
8130  */
8131 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8132 {
8133         if (h->drv_req_rescan) {
8134                 h->drv_req_rescan = 0;
8135                 return 1;
8136         }
8137
8138         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8139                 return 0;
8140
8141         h->events = readl(&(h->cfgtable->event_notify));
8142         return h->events & RESCAN_REQUIRED_EVENT_BITS;
8143 }
8144
8145 /*
8146  * Check if any of the offline devices have become ready
8147  */
8148 static int hpsa_offline_devices_ready(struct ctlr_info *h)
8149 {
8150         unsigned long flags;
8151         struct offline_device_entry *d;
8152         struct list_head *this, *tmp;
8153
8154         spin_lock_irqsave(&h->offline_device_lock, flags);
8155         list_for_each_safe(this, tmp, &h->offline_device_list) {
8156                 d = list_entry(this, struct offline_device_entry,
8157                                 offline_list);
8158                 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8159                 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8160                         spin_lock_irqsave(&h->offline_device_lock, flags);
8161                         list_del(&d->offline_list);
8162                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
8163                         return 1;
8164                 }
8165                 spin_lock_irqsave(&h->offline_device_lock, flags);
8166         }
8167         spin_unlock_irqrestore(&h->offline_device_lock, flags);
8168         return 0;
8169 }
8170
8171 static int hpsa_luns_changed(struct ctlr_info *h)
8172 {
8173         int rc = 1; /* assume there are changes */
8174         struct ReportLUNdata *logdev = NULL;
8175
8176         /* if we can't find out if lun data has changed,
8177          * assume that it has.
8178          */
8179
8180         if (!h->lastlogicals)
8181                 return rc;
8182
8183         logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8184         if (!logdev)
8185                 return rc;
8186
8187         if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8188                 dev_warn(&h->pdev->dev,
8189                         "report luns failed, can't track lun changes.\n");
8190                 goto out;
8191         }
8192         if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8193                 dev_info(&h->pdev->dev,
8194                         "Lun changes detected.\n");
8195                 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8196                 goto out;
8197         } else
8198                 rc = 0; /* no changes detected. */
8199 out:
8200         kfree(logdev);
8201         return rc;
8202 }
8203
8204 static void hpsa_perform_rescan(struct ctlr_info *h)
8205 {
8206         struct Scsi_Host *sh = NULL;
8207         unsigned long flags;
8208
8209         /*
8210          * Do the scan after the reset
8211          */
8212         spin_lock_irqsave(&h->reset_lock, flags);
8213         if (h->reset_in_progress) {
8214                 h->drv_req_rescan = 1;
8215                 spin_unlock_irqrestore(&h->reset_lock, flags);
8216                 return;
8217         }
8218         spin_unlock_irqrestore(&h->reset_lock, flags);
8219
8220         sh = scsi_host_get(h->scsi_host);
8221         if (sh != NULL) {
8222                 hpsa_scan_start(sh);
8223                 scsi_host_put(sh);
8224                 h->drv_req_rescan = 0;
8225         }
8226 }
8227
8228 /*
8229  * watch for controller events
8230  */
8231 static void hpsa_event_monitor_worker(struct work_struct *work)
8232 {
8233         struct ctlr_info *h = container_of(to_delayed_work(work),
8234                                         struct ctlr_info, event_monitor_work);
8235         unsigned long flags;
8236
8237         spin_lock_irqsave(&h->lock, flags);
8238         if (h->remove_in_progress) {
8239                 spin_unlock_irqrestore(&h->lock, flags);
8240                 return;
8241         }
8242         spin_unlock_irqrestore(&h->lock, flags);
8243
8244         if (hpsa_ctlr_needs_rescan(h)) {
8245                 hpsa_ack_ctlr_events(h);
8246                 hpsa_perform_rescan(h);
8247         }
8248
8249         spin_lock_irqsave(&h->lock, flags);
8250         if (!h->remove_in_progress)
8251                 schedule_delayed_work(&h->event_monitor_work,
8252                                         HPSA_EVENT_MONITOR_INTERVAL);
8253         spin_unlock_irqrestore(&h->lock, flags);
8254 }
8255
8256 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8257 {
8258         unsigned long flags;
8259         struct ctlr_info *h = container_of(to_delayed_work(work),
8260                                         struct ctlr_info, rescan_ctlr_work);
8261
8262         spin_lock_irqsave(&h->lock, flags);
8263         if (h->remove_in_progress) {
8264                 spin_unlock_irqrestore(&h->lock, flags);
8265                 return;
8266         }
8267         spin_unlock_irqrestore(&h->lock, flags);
8268
8269         if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) {
8270                 hpsa_perform_rescan(h);
8271         } else if (h->discovery_polling) {
8272                 hpsa_disable_rld_caching(h);
8273                 if (hpsa_luns_changed(h)) {
8274                         dev_info(&h->pdev->dev,
8275                                 "driver discovery polling rescan.\n");
8276                         hpsa_perform_rescan(h);
8277                 }
8278         }
8279         spin_lock_irqsave(&h->lock, flags);
8280         if (!h->remove_in_progress)
8281                 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8282                                 h->heartbeat_sample_interval);
8283         spin_unlock_irqrestore(&h->lock, flags);
8284 }
8285
8286 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8287 {
8288         unsigned long flags;
8289         struct ctlr_info *h = container_of(to_delayed_work(work),
8290                                         struct ctlr_info, monitor_ctlr_work);
8291
8292         detect_controller_lockup(h);
8293         if (lockup_detected(h))
8294                 return;
8295
8296         spin_lock_irqsave(&h->lock, flags);
8297         if (!h->remove_in_progress)
8298                 schedule_delayed_work(&h->monitor_ctlr_work,
8299                                 h->heartbeat_sample_interval);
8300         spin_unlock_irqrestore(&h->lock, flags);
8301 }
8302
8303 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8304                                                 char *name)
8305 {
8306         struct workqueue_struct *wq = NULL;
8307
8308         wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8309         if (!wq)
8310                 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8311
8312         return wq;
8313 }
8314
8315 static void hpda_free_ctlr_info(struct ctlr_info *h)
8316 {
8317         kfree(h->reply_map);
8318         kfree(h);
8319 }
8320
8321 static struct ctlr_info *hpda_alloc_ctlr_info(void)
8322 {
8323         struct ctlr_info *h;
8324
8325         h = kzalloc(sizeof(*h), GFP_KERNEL);
8326         if (!h)
8327                 return NULL;
8328
8329         h->reply_map = kzalloc(sizeof(*h->reply_map) * nr_cpu_ids, GFP_KERNEL);
8330         if (!h->reply_map) {
8331                 kfree(h);
8332                 return NULL;
8333         }
8334         return h;
8335 }
8336
8337 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8338 {
8339         int dac, rc;
8340         struct ctlr_info *h;
8341         int try_soft_reset = 0;
8342         unsigned long flags;
8343         u32 board_id;
8344
8345         if (number_of_controllers == 0)
8346                 printk(KERN_INFO DRIVER_NAME "\n");
8347
8348         rc = hpsa_lookup_board_id(pdev, &board_id, NULL);
8349         if (rc < 0) {
8350                 dev_warn(&pdev->dev, "Board ID not found\n");
8351                 return rc;
8352         }
8353
8354         rc = hpsa_init_reset_devices(pdev, board_id);
8355         if (rc) {
8356                 if (rc != -ENOTSUPP)
8357                         return rc;
8358                 /* If the reset fails in a particular way (it has no way to do
8359                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
8360                  * a soft reset once we get the controller configured up to the
8361                  * point that it can accept a command.
8362                  */
8363                 try_soft_reset = 1;
8364                 rc = 0;
8365         }
8366
8367 reinit_after_soft_reset:
8368
8369         /* Command structures must be aligned on a 32-byte boundary because
8370          * the 5 lower bits of the address are used by the hardware. and by
8371          * the driver.  See comments in hpsa.h for more info.
8372          */
8373         BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8374         h = hpda_alloc_ctlr_info();
8375         if (!h) {
8376                 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8377                 return -ENOMEM;
8378         }
8379
8380         h->pdev = pdev;
8381
8382         h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8383         INIT_LIST_HEAD(&h->offline_device_list);
8384         spin_lock_init(&h->lock);
8385         spin_lock_init(&h->offline_device_lock);
8386         spin_lock_init(&h->scan_lock);
8387         spin_lock_init(&h->reset_lock);
8388         atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8389
8390         /* Allocate and clear per-cpu variable lockup_detected */
8391         h->lockup_detected = alloc_percpu(u32);
8392         if (!h->lockup_detected) {
8393                 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8394                 rc = -ENOMEM;
8395                 goto clean1;    /* aer/h */
8396         }
8397         set_lockup_detected_for_all_cpus(h, 0);
8398
8399         rc = hpsa_pci_init(h);
8400         if (rc)
8401                 goto clean2;    /* lu, aer/h */
8402
8403         /* relies on h-> settings made by hpsa_pci_init, including
8404          * interrupt_mode h->intr */
8405         rc = hpsa_scsi_host_alloc(h);
8406         if (rc)
8407                 goto clean2_5;  /* pci, lu, aer/h */
8408
8409         sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8410         h->ctlr = number_of_controllers;
8411         number_of_controllers++;
8412
8413         /* configure PCI DMA stuff */
8414         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8415         if (rc == 0) {
8416                 dac = 1;
8417         } else {
8418                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8419                 if (rc == 0) {
8420                         dac = 0;
8421                 } else {
8422                         dev_err(&pdev->dev, "no suitable DMA available\n");
8423                         goto clean3;    /* shost, pci, lu, aer/h */
8424                 }
8425         }
8426
8427         /* make sure the board interrupts are off */
8428         h->access.set_intr_mask(h, HPSA_INTR_OFF);
8429
8430         rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8431         if (rc)
8432                 goto clean3;    /* shost, pci, lu, aer/h */
8433         rc = hpsa_alloc_cmd_pool(h);
8434         if (rc)
8435                 goto clean4;    /* irq, shost, pci, lu, aer/h */
8436         rc = hpsa_alloc_sg_chain_blocks(h);
8437         if (rc)
8438                 goto clean5;    /* cmd, irq, shost, pci, lu, aer/h */
8439         init_waitqueue_head(&h->scan_wait_queue);
8440         init_waitqueue_head(&h->event_sync_wait_queue);
8441         mutex_init(&h->reset_mutex);
8442         h->scan_finished = 1; /* no scan currently in progress */
8443         h->scan_waiting = 0;
8444
8445         pci_set_drvdata(pdev, h);
8446         h->ndevices = 0;
8447
8448         spin_lock_init(&h->devlock);
8449         rc = hpsa_put_ctlr_into_performant_mode(h);
8450         if (rc)
8451                 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8452
8453         /* create the resubmit workqueue */
8454         h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8455         if (!h->rescan_ctlr_wq) {
8456                 rc = -ENOMEM;
8457                 goto clean7;
8458         }
8459
8460         h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8461         if (!h->resubmit_wq) {
8462                 rc = -ENOMEM;
8463                 goto clean7;    /* aer/h */
8464         }
8465
8466         /*
8467          * At this point, the controller is ready to take commands.
8468          * Now, if reset_devices and the hard reset didn't work, try
8469          * the soft reset and see if that works.
8470          */
8471         if (try_soft_reset) {
8472
8473                 /* This is kind of gross.  We may or may not get a completion
8474                  * from the soft reset command, and if we do, then the value
8475                  * from the fifo may or may not be valid.  So, we wait 10 secs
8476                  * after the reset throwing away any completions we get during
8477                  * that time.  Unregister the interrupt handler and register
8478                  * fake ones to scoop up any residual completions.
8479                  */
8480                 spin_lock_irqsave(&h->lock, flags);
8481                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8482                 spin_unlock_irqrestore(&h->lock, flags);
8483                 hpsa_free_irqs(h);
8484                 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8485                                         hpsa_intx_discard_completions);
8486                 if (rc) {
8487                         dev_warn(&h->pdev->dev,
8488                                 "Failed to request_irq after soft reset.\n");
8489                         /*
8490                          * cannot goto clean7 or free_irqs will be called
8491                          * again. Instead, do its work
8492                          */
8493                         hpsa_free_performant_mode(h);   /* clean7 */
8494                         hpsa_free_sg_chain_blocks(h);   /* clean6 */
8495                         hpsa_free_cmd_pool(h);          /* clean5 */
8496                         /*
8497                          * skip hpsa_free_irqs(h) clean4 since that
8498                          * was just called before request_irqs failed
8499                          */
8500                         goto clean3;
8501                 }
8502
8503                 rc = hpsa_kdump_soft_reset(h);
8504                 if (rc)
8505                         /* Neither hard nor soft reset worked, we're hosed. */
8506                         goto clean7;
8507
8508                 dev_info(&h->pdev->dev, "Board READY.\n");
8509                 dev_info(&h->pdev->dev,
8510                         "Waiting for stale completions to drain.\n");
8511                 h->access.set_intr_mask(h, HPSA_INTR_ON);
8512                 msleep(10000);
8513                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8514
8515                 rc = controller_reset_failed(h->cfgtable);
8516                 if (rc)
8517                         dev_info(&h->pdev->dev,
8518                                 "Soft reset appears to have failed.\n");
8519
8520                 /* since the controller's reset, we have to go back and re-init
8521                  * everything.  Easiest to just forget what we've done and do it
8522                  * all over again.
8523                  */
8524                 hpsa_undo_allocations_after_kdump_soft_reset(h);
8525                 try_soft_reset = 0;
8526                 if (rc)
8527                         /* don't goto clean, we already unallocated */
8528                         return -ENODEV;
8529
8530                 goto reinit_after_soft_reset;
8531         }
8532
8533         /* Enable Accelerated IO path at driver layer */
8534         h->acciopath_status = 1;
8535         /* Disable discovery polling.*/
8536         h->discovery_polling = 0;
8537
8538
8539         /* Turn the interrupts on so we can service requests */
8540         h->access.set_intr_mask(h, HPSA_INTR_ON);
8541
8542         hpsa_hba_inquiry(h);
8543
8544         h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8545         if (!h->lastlogicals)
8546                 dev_info(&h->pdev->dev,
8547                         "Can't track change to report lun data\n");
8548
8549         /* hook into SCSI subsystem */
8550         rc = hpsa_scsi_add_host(h);
8551         if (rc)
8552                 goto clean8; /* lastlogicals, perf, sg, cmd, irq, shost, pci, lu, aer/h */
8553
8554         /* Monitor the controller for firmware lockups */
8555         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8556         INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8557         schedule_delayed_work(&h->monitor_ctlr_work,
8558                                 h->heartbeat_sample_interval);
8559         INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8560         queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8561                                 h->heartbeat_sample_interval);
8562         INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker);
8563         schedule_delayed_work(&h->event_monitor_work,
8564                                 HPSA_EVENT_MONITOR_INTERVAL);
8565         return 0;
8566
8567 clean8: /* lastlogicals, perf, sg, cmd, irq, shost, pci, lu, aer/h */
8568         kfree(h->lastlogicals);
8569 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8570         hpsa_free_performant_mode(h);
8571         h->access.set_intr_mask(h, HPSA_INTR_OFF);
8572 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8573         hpsa_free_sg_chain_blocks(h);
8574 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8575         hpsa_free_cmd_pool(h);
8576 clean4: /* irq, shost, pci, lu, aer/h */
8577         hpsa_free_irqs(h);
8578 clean3: /* shost, pci, lu, aer/h */
8579         scsi_host_put(h->scsi_host);
8580         h->scsi_host = NULL;
8581 clean2_5: /* pci, lu, aer/h */
8582         hpsa_free_pci_init(h);
8583 clean2: /* lu, aer/h */
8584         if (h->lockup_detected) {
8585                 free_percpu(h->lockup_detected);
8586                 h->lockup_detected = NULL;
8587         }
8588 clean1: /* wq/aer/h */
8589         if (h->resubmit_wq) {
8590                 destroy_workqueue(h->resubmit_wq);
8591                 h->resubmit_wq = NULL;
8592         }
8593         if (h->rescan_ctlr_wq) {
8594                 destroy_workqueue(h->rescan_ctlr_wq);
8595                 h->rescan_ctlr_wq = NULL;
8596         }
8597         kfree(h);
8598         return rc;
8599 }
8600
8601 static void hpsa_flush_cache(struct ctlr_info *h)
8602 {
8603         char *flush_buf;
8604         struct CommandList *c;
8605         int rc;
8606
8607         if (unlikely(lockup_detected(h)))
8608                 return;
8609         flush_buf = kzalloc(4, GFP_KERNEL);
8610         if (!flush_buf)
8611                 return;
8612
8613         c = cmd_alloc(h);
8614
8615         if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8616                 RAID_CTLR_LUNID, TYPE_CMD)) {
8617                 goto out;
8618         }
8619         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8620                                         PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
8621         if (rc)
8622                 goto out;
8623         if (c->err_info->CommandStatus != 0)
8624 out:
8625                 dev_warn(&h->pdev->dev,
8626                         "error flushing cache on controller\n");
8627         cmd_free(h, c);
8628         kfree(flush_buf);
8629 }
8630
8631 /* Make controller gather fresh report lun data each time we
8632  * send down a report luns request
8633  */
8634 static void hpsa_disable_rld_caching(struct ctlr_info *h)
8635 {
8636         u32 *options;
8637         struct CommandList *c;
8638         int rc;
8639
8640         /* Don't bother trying to set diag options if locked up */
8641         if (unlikely(h->lockup_detected))
8642                 return;
8643
8644         options = kzalloc(sizeof(*options), GFP_KERNEL);
8645         if (!options)
8646                 return;
8647
8648         c = cmd_alloc(h);
8649
8650         /* first, get the current diag options settings */
8651         if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8652                 RAID_CTLR_LUNID, TYPE_CMD))
8653                 goto errout;
8654
8655         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8656                 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
8657         if ((rc != 0) || (c->err_info->CommandStatus != 0))
8658                 goto errout;
8659
8660         /* Now, set the bit for disabling the RLD caching */
8661         *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8662
8663         if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8664                 RAID_CTLR_LUNID, TYPE_CMD))
8665                 goto errout;
8666
8667         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8668                 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
8669         if ((rc != 0)  || (c->err_info->CommandStatus != 0))
8670                 goto errout;
8671
8672         /* Now verify that it got set: */
8673         if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8674                 RAID_CTLR_LUNID, TYPE_CMD))
8675                 goto errout;
8676
8677         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8678                 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
8679         if ((rc != 0)  || (c->err_info->CommandStatus != 0))
8680                 goto errout;
8681
8682         if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
8683                 goto out;
8684
8685 errout:
8686         dev_err(&h->pdev->dev,
8687                         "Error: failed to disable report lun data caching.\n");
8688 out:
8689         cmd_free(h, c);
8690         kfree(options);
8691 }
8692
8693 static void __hpsa_shutdown(struct pci_dev *pdev)
8694 {
8695         struct ctlr_info *h;
8696
8697         h = pci_get_drvdata(pdev);
8698         /* Turn board interrupts off  and send the flush cache command
8699          * sendcmd will turn off interrupt, and send the flush...
8700          * To write all data in the battery backed cache to disks
8701          */
8702         hpsa_flush_cache(h);
8703         h->access.set_intr_mask(h, HPSA_INTR_OFF);
8704         hpsa_free_irqs(h);                      /* init_one 4 */
8705         hpsa_disable_interrupt_mode(h);         /* pci_init 2 */
8706 }
8707
8708 static void hpsa_shutdown(struct pci_dev *pdev)
8709 {
8710         __hpsa_shutdown(pdev);
8711         pci_disable_device(pdev);
8712 }
8713
8714 static void hpsa_free_device_info(struct ctlr_info *h)
8715 {
8716         int i;
8717
8718         for (i = 0; i < h->ndevices; i++) {
8719                 kfree(h->dev[i]);
8720                 h->dev[i] = NULL;
8721         }
8722 }
8723
8724 static void hpsa_remove_one(struct pci_dev *pdev)
8725 {
8726         struct ctlr_info *h;
8727         unsigned long flags;
8728
8729         if (pci_get_drvdata(pdev) == NULL) {
8730                 dev_err(&pdev->dev, "unable to remove device\n");
8731                 return;
8732         }
8733         h = pci_get_drvdata(pdev);
8734
8735         /* Get rid of any controller monitoring work items */
8736         spin_lock_irqsave(&h->lock, flags);
8737         h->remove_in_progress = 1;
8738         spin_unlock_irqrestore(&h->lock, flags);
8739         cancel_delayed_work_sync(&h->monitor_ctlr_work);
8740         cancel_delayed_work_sync(&h->rescan_ctlr_work);
8741         cancel_delayed_work_sync(&h->event_monitor_work);
8742         destroy_workqueue(h->rescan_ctlr_wq);
8743         destroy_workqueue(h->resubmit_wq);
8744
8745         hpsa_delete_sas_host(h);
8746
8747         /*
8748          * Call before disabling interrupts.
8749          * scsi_remove_host can trigger I/O operations especially
8750          * when multipath is enabled. There can be SYNCHRONIZE CACHE
8751          * operations which cannot complete and will hang the system.
8752          */
8753         if (h->scsi_host)
8754                 scsi_remove_host(h->scsi_host);         /* init_one 8 */
8755         /* includes hpsa_free_irqs - init_one 4 */
8756         /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8757         __hpsa_shutdown(pdev);
8758
8759         hpsa_free_device_info(h);               /* scan */
8760
8761         kfree(h->hba_inquiry_data);                     /* init_one 10 */
8762         h->hba_inquiry_data = NULL;                     /* init_one 10 */
8763         hpsa_free_ioaccel2_sg_chain_blocks(h);
8764         hpsa_free_performant_mode(h);                   /* init_one 7 */
8765         hpsa_free_sg_chain_blocks(h);                   /* init_one 6 */
8766         hpsa_free_cmd_pool(h);                          /* init_one 5 */
8767         kfree(h->lastlogicals);
8768
8769         /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
8770
8771         scsi_host_put(h->scsi_host);                    /* init_one 3 */
8772         h->scsi_host = NULL;                            /* init_one 3 */
8773
8774         /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8775         hpsa_free_pci_init(h);                          /* init_one 2.5 */
8776
8777         free_percpu(h->lockup_detected);                /* init_one 2 */
8778         h->lockup_detected = NULL;                      /* init_one 2 */
8779         /* (void) pci_disable_pcie_error_reporting(pdev); */    /* init_one 1 */
8780
8781         hpda_free_ctlr_info(h);                         /* init_one 1 */
8782 }
8783
8784 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
8785         __attribute__((unused)) pm_message_t state)
8786 {
8787         return -ENOSYS;
8788 }
8789
8790 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
8791 {
8792         return -ENOSYS;
8793 }
8794
8795 static struct pci_driver hpsa_pci_driver = {
8796         .name = HPSA,
8797         .probe = hpsa_init_one,
8798         .remove = hpsa_remove_one,
8799         .id_table = hpsa_pci_device_id, /* id_table */
8800         .shutdown = hpsa_shutdown,
8801         .suspend = hpsa_suspend,
8802         .resume = hpsa_resume,
8803 };
8804
8805 /* Fill in bucket_map[], given nsgs (the max number of
8806  * scatter gather elements supported) and bucket[],
8807  * which is an array of 8 integers.  The bucket[] array
8808  * contains 8 different DMA transfer sizes (in 16
8809  * byte increments) which the controller uses to fetch
8810  * commands.  This function fills in bucket_map[], which
8811  * maps a given number of scatter gather elements to one of
8812  * the 8 DMA transfer sizes.  The point of it is to allow the
8813  * controller to only do as much DMA as needed to fetch the
8814  * command, with the DMA transfer size encoded in the lower
8815  * bits of the command address.
8816  */
8817 static void  calc_bucket_map(int bucket[], int num_buckets,
8818         int nsgs, int min_blocks, u32 *bucket_map)
8819 {
8820         int i, j, b, size;
8821
8822         /* Note, bucket_map must have nsgs+1 entries. */
8823         for (i = 0; i <= nsgs; i++) {
8824                 /* Compute size of a command with i SG entries */
8825                 size = i + min_blocks;
8826                 b = num_buckets; /* Assume the biggest bucket */
8827                 /* Find the bucket that is just big enough */
8828                 for (j = 0; j < num_buckets; j++) {
8829                         if (bucket[j] >= size) {
8830                                 b = j;
8831                                 break;
8832                         }
8833                 }
8834                 /* for a command with i SG entries, use bucket b. */
8835                 bucket_map[i] = b;
8836         }
8837 }
8838
8839 /*
8840  * return -ENODEV on err, 0 on success (or no action)
8841  * allocates numerous items that must be freed later
8842  */
8843 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
8844 {
8845         int i;
8846         unsigned long register_value;
8847         unsigned long transMethod = CFGTBL_Trans_Performant |
8848                         (trans_support & CFGTBL_Trans_use_short_tags) |
8849                                 CFGTBL_Trans_enable_directed_msix |
8850                         (trans_support & (CFGTBL_Trans_io_accel1 |
8851                                 CFGTBL_Trans_io_accel2));
8852         struct access_method access = SA5_performant_access;
8853
8854         /* This is a bit complicated.  There are 8 registers on
8855          * the controller which we write to to tell it 8 different
8856          * sizes of commands which there may be.  It's a way of
8857          * reducing the DMA done to fetch each command.  Encoded into
8858          * each command's tag are 3 bits which communicate to the controller
8859          * which of the eight sizes that command fits within.  The size of
8860          * each command depends on how many scatter gather entries there are.
8861          * Each SG entry requires 16 bytes.  The eight registers are programmed
8862          * with the number of 16-byte blocks a command of that size requires.
8863          * The smallest command possible requires 5 such 16 byte blocks.
8864          * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
8865          * blocks.  Note, this only extends to the SG entries contained
8866          * within the command block, and does not extend to chained blocks
8867          * of SG elements.   bft[] contains the eight values we write to
8868          * the registers.  They are not evenly distributed, but have more
8869          * sizes for small commands, and fewer sizes for larger commands.
8870          */
8871         int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
8872 #define MIN_IOACCEL2_BFT_ENTRY 5
8873 #define HPSA_IOACCEL2_HEADER_SZ 4
8874         int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
8875                         13, 14, 15, 16, 17, 18, 19,
8876                         HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
8877         BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
8878         BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
8879         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
8880                                  16 * MIN_IOACCEL2_BFT_ENTRY);
8881         BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
8882         BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
8883         /*  5 = 1 s/g entry or 4k
8884          *  6 = 2 s/g entry or 8k
8885          *  8 = 4 s/g entry or 16k
8886          * 10 = 6 s/g entry or 24k
8887          */
8888
8889         /* If the controller supports either ioaccel method then
8890          * we can also use the RAID stack submit path that does not
8891          * perform the superfluous readl() after each command submission.
8892          */
8893         if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
8894                 access = SA5_performant_access_no_read;
8895
8896         /* Controller spec: zero out this buffer. */
8897         for (i = 0; i < h->nreply_queues; i++)
8898                 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
8899
8900         bft[7] = SG_ENTRIES_IN_CMD + 4;
8901         calc_bucket_map(bft, ARRAY_SIZE(bft),
8902                                 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
8903         for (i = 0; i < 8; i++)
8904                 writel(bft[i], &h->transtable->BlockFetch[i]);
8905
8906         /* size of controller ring buffer */
8907         writel(h->max_commands, &h->transtable->RepQSize);
8908         writel(h->nreply_queues, &h->transtable->RepQCount);
8909         writel(0, &h->transtable->RepQCtrAddrLow32);
8910         writel(0, &h->transtable->RepQCtrAddrHigh32);
8911
8912         for (i = 0; i < h->nreply_queues; i++) {
8913                 writel(0, &h->transtable->RepQAddr[i].upper);
8914                 writel(h->reply_queue[i].busaddr,
8915                         &h->transtable->RepQAddr[i].lower);
8916         }
8917
8918         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
8919         writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
8920         /*
8921          * enable outbound interrupt coalescing in accelerator mode;
8922          */
8923         if (trans_support & CFGTBL_Trans_io_accel1) {
8924                 access = SA5_ioaccel_mode1_access;
8925                 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
8926                 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
8927         } else
8928                 if (trans_support & CFGTBL_Trans_io_accel2)
8929                         access = SA5_ioaccel_mode2_access;
8930         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8931         if (hpsa_wait_for_mode_change_ack(h)) {
8932                 dev_err(&h->pdev->dev,
8933                         "performant mode problem - doorbell timeout\n");
8934                 return -ENODEV;
8935         }
8936         register_value = readl(&(h->cfgtable->TransportActive));
8937         if (!(register_value & CFGTBL_Trans_Performant)) {
8938                 dev_err(&h->pdev->dev,
8939                         "performant mode problem - transport not active\n");
8940                 return -ENODEV;
8941         }
8942         /* Change the access methods to the performant access methods */
8943         h->access = access;
8944         h->transMethod = transMethod;
8945
8946         if (!((trans_support & CFGTBL_Trans_io_accel1) ||
8947                 (trans_support & CFGTBL_Trans_io_accel2)))
8948                 return 0;
8949
8950         if (trans_support & CFGTBL_Trans_io_accel1) {
8951                 /* Set up I/O accelerator mode */
8952                 for (i = 0; i < h->nreply_queues; i++) {
8953                         writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
8954                         h->reply_queue[i].current_entry =
8955                                 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
8956                 }
8957                 bft[7] = h->ioaccel_maxsg + 8;
8958                 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
8959                                 h->ioaccel1_blockFetchTable);
8960
8961                 /* initialize all reply queue entries to unused */
8962                 for (i = 0; i < h->nreply_queues; i++)
8963                         memset(h->reply_queue[i].head,
8964                                 (u8) IOACCEL_MODE1_REPLY_UNUSED,
8965                                 h->reply_queue_size);
8966
8967                 /* set all the constant fields in the accelerator command
8968                  * frames once at init time to save CPU cycles later.
8969                  */
8970                 for (i = 0; i < h->nr_cmds; i++) {
8971                         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
8972
8973                         cp->function = IOACCEL1_FUNCTION_SCSIIO;
8974                         cp->err_info = (u32) (h->errinfo_pool_dhandle +
8975                                         (i * sizeof(struct ErrorInfo)));
8976                         cp->err_info_len = sizeof(struct ErrorInfo);
8977                         cp->sgl_offset = IOACCEL1_SGLOFFSET;
8978                         cp->host_context_flags =
8979                                 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
8980                         cp->timeout_sec = 0;
8981                         cp->ReplyQueue = 0;
8982                         cp->tag =
8983                                 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
8984                         cp->host_addr =
8985                                 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
8986                                         (i * sizeof(struct io_accel1_cmd)));
8987                 }
8988         } else if (trans_support & CFGTBL_Trans_io_accel2) {
8989                 u64 cfg_offset, cfg_base_addr_index;
8990                 u32 bft2_offset, cfg_base_addr;
8991                 int rc;
8992
8993                 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
8994                         &cfg_base_addr_index, &cfg_offset);
8995                 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
8996                 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
8997                 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
8998                                 4, h->ioaccel2_blockFetchTable);
8999                 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9000                 BUILD_BUG_ON(offsetof(struct CfgTable,
9001                                 io_accel_request_size_offset) != 0xb8);
9002                 h->ioaccel2_bft2_regs =
9003                         remap_pci_mem(pci_resource_start(h->pdev,
9004                                         cfg_base_addr_index) +
9005                                         cfg_offset + bft2_offset,
9006                                         ARRAY_SIZE(bft2) *
9007                                         sizeof(*h->ioaccel2_bft2_regs));
9008                 for (i = 0; i < ARRAY_SIZE(bft2); i++)
9009                         writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9010         }
9011         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9012         if (hpsa_wait_for_mode_change_ack(h)) {
9013                 dev_err(&h->pdev->dev,
9014                         "performant mode problem - enabling ioaccel mode\n");
9015                 return -ENODEV;
9016         }
9017         return 0;
9018 }
9019
9020 /* Free ioaccel1 mode command blocks and block fetch table */
9021 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9022 {
9023         if (h->ioaccel_cmd_pool) {
9024                 pci_free_consistent(h->pdev,
9025                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9026                         h->ioaccel_cmd_pool,
9027                         h->ioaccel_cmd_pool_dhandle);
9028                 h->ioaccel_cmd_pool = NULL;
9029                 h->ioaccel_cmd_pool_dhandle = 0;
9030         }
9031         kfree(h->ioaccel1_blockFetchTable);
9032         h->ioaccel1_blockFetchTable = NULL;
9033 }
9034
9035 /* Allocate ioaccel1 mode command blocks and block fetch table */
9036 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9037 {
9038         h->ioaccel_maxsg =
9039                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9040         if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9041                 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9042
9043         /* Command structures must be aligned on a 128-byte boundary
9044          * because the 7 lower bits of the address are used by the
9045          * hardware.
9046          */
9047         BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9048                         IOACCEL1_COMMANDLIST_ALIGNMENT);
9049         h->ioaccel_cmd_pool =
9050                 pci_alloc_consistent(h->pdev,
9051                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9052                         &(h->ioaccel_cmd_pool_dhandle));
9053
9054         h->ioaccel1_blockFetchTable =
9055                 kmalloc(((h->ioaccel_maxsg + 1) *
9056                                 sizeof(u32)), GFP_KERNEL);
9057
9058         if ((h->ioaccel_cmd_pool == NULL) ||
9059                 (h->ioaccel1_blockFetchTable == NULL))
9060                 goto clean_up;
9061
9062         memset(h->ioaccel_cmd_pool, 0,
9063                 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9064         return 0;
9065
9066 clean_up:
9067         hpsa_free_ioaccel1_cmd_and_bft(h);
9068         return -ENOMEM;
9069 }
9070
9071 /* Free ioaccel2 mode command blocks and block fetch table */
9072 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9073 {
9074         hpsa_free_ioaccel2_sg_chain_blocks(h);
9075
9076         if (h->ioaccel2_cmd_pool) {
9077                 pci_free_consistent(h->pdev,
9078                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9079                         h->ioaccel2_cmd_pool,
9080                         h->ioaccel2_cmd_pool_dhandle);
9081                 h->ioaccel2_cmd_pool = NULL;
9082                 h->ioaccel2_cmd_pool_dhandle = 0;
9083         }
9084         kfree(h->ioaccel2_blockFetchTable);
9085         h->ioaccel2_blockFetchTable = NULL;
9086 }
9087
9088 /* Allocate ioaccel2 mode command blocks and block fetch table */
9089 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9090 {
9091         int rc;
9092
9093         /* Allocate ioaccel2 mode command blocks and block fetch table */
9094
9095         h->ioaccel_maxsg =
9096                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9097         if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9098                 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9099
9100         BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9101                         IOACCEL2_COMMANDLIST_ALIGNMENT);
9102         h->ioaccel2_cmd_pool =
9103                 pci_alloc_consistent(h->pdev,
9104                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9105                         &(h->ioaccel2_cmd_pool_dhandle));
9106
9107         h->ioaccel2_blockFetchTable =
9108                 kmalloc(((h->ioaccel_maxsg + 1) *
9109                                 sizeof(u32)), GFP_KERNEL);
9110
9111         if ((h->ioaccel2_cmd_pool == NULL) ||
9112                 (h->ioaccel2_blockFetchTable == NULL)) {
9113                 rc = -ENOMEM;
9114                 goto clean_up;
9115         }
9116
9117         rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9118         if (rc)
9119                 goto clean_up;
9120
9121         memset(h->ioaccel2_cmd_pool, 0,
9122                 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9123         return 0;
9124
9125 clean_up:
9126         hpsa_free_ioaccel2_cmd_and_bft(h);
9127         return rc;
9128 }
9129
9130 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9131 static void hpsa_free_performant_mode(struct ctlr_info *h)
9132 {
9133         kfree(h->blockFetchTable);
9134         h->blockFetchTable = NULL;
9135         hpsa_free_reply_queues(h);
9136         hpsa_free_ioaccel1_cmd_and_bft(h);
9137         hpsa_free_ioaccel2_cmd_and_bft(h);
9138 }
9139
9140 /* return -ENODEV on error, 0 on success (or no action)
9141  * allocates numerous items that must be freed later
9142  */
9143 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
9144 {
9145         u32 trans_support;
9146         unsigned long transMethod = CFGTBL_Trans_Performant |
9147                                         CFGTBL_Trans_use_short_tags;
9148         int i, rc;
9149
9150         if (hpsa_simple_mode)
9151                 return 0;
9152
9153         trans_support = readl(&(h->cfgtable->TransportSupport));
9154         if (!(trans_support & PERFORMANT_MODE))
9155                 return 0;
9156
9157         /* Check for I/O accelerator mode support */
9158         if (trans_support & CFGTBL_Trans_io_accel1) {
9159                 transMethod |= CFGTBL_Trans_io_accel1 |
9160                                 CFGTBL_Trans_enable_directed_msix;
9161                 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9162                 if (rc)
9163                         return rc;
9164         } else if (trans_support & CFGTBL_Trans_io_accel2) {
9165                 transMethod |= CFGTBL_Trans_io_accel2 |
9166                                 CFGTBL_Trans_enable_directed_msix;
9167                 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9168                 if (rc)
9169                         return rc;
9170         }
9171
9172         h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
9173         hpsa_get_max_perf_mode_cmds(h);
9174         /* Performant mode ring buffer and supporting data structures */
9175         h->reply_queue_size = h->max_commands * sizeof(u64);
9176
9177         for (i = 0; i < h->nreply_queues; i++) {
9178                 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
9179                                                 h->reply_queue_size,
9180                                                 &(h->reply_queue[i].busaddr));
9181                 if (!h->reply_queue[i].head) {
9182                         rc = -ENOMEM;
9183                         goto clean1;    /* rq, ioaccel */
9184                 }
9185                 h->reply_queue[i].size = h->max_commands;
9186                 h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
9187                 h->reply_queue[i].current_entry = 0;
9188         }
9189
9190         /* Need a block fetch table for performant mode */
9191         h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9192                                 sizeof(u32)), GFP_KERNEL);
9193         if (!h->blockFetchTable) {
9194                 rc = -ENOMEM;
9195                 goto clean1;    /* rq, ioaccel */
9196         }
9197
9198         rc = hpsa_enter_performant_mode(h, trans_support);
9199         if (rc)
9200                 goto clean2;    /* bft, rq, ioaccel */
9201         return 0;
9202
9203 clean2: /* bft, rq, ioaccel */
9204         kfree(h->blockFetchTable);
9205         h->blockFetchTable = NULL;
9206 clean1: /* rq, ioaccel */
9207         hpsa_free_reply_queues(h);
9208         hpsa_free_ioaccel1_cmd_and_bft(h);
9209         hpsa_free_ioaccel2_cmd_and_bft(h);
9210         return rc;
9211 }
9212
9213 static int is_accelerated_cmd(struct CommandList *c)
9214 {
9215         return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9216 }
9217
9218 static void hpsa_drain_accel_commands(struct ctlr_info *h)
9219 {
9220         struct CommandList *c = NULL;
9221         int i, accel_cmds_out;
9222         int refcount;
9223
9224         do { /* wait for all outstanding ioaccel commands to drain out */
9225                 accel_cmds_out = 0;
9226                 for (i = 0; i < h->nr_cmds; i++) {
9227                         c = h->cmd_pool + i;
9228                         refcount = atomic_inc_return(&c->refcount);
9229                         if (refcount > 1) /* Command is allocated */
9230                                 accel_cmds_out += is_accelerated_cmd(c);
9231                         cmd_free(h, c);
9232                 }
9233                 if (accel_cmds_out <= 0)
9234                         break;
9235                 msleep(100);
9236         } while (1);
9237 }
9238
9239 static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9240                                 struct hpsa_sas_port *hpsa_sas_port)
9241 {
9242         struct hpsa_sas_phy *hpsa_sas_phy;
9243         struct sas_phy *phy;
9244
9245         hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9246         if (!hpsa_sas_phy)
9247                 return NULL;
9248
9249         phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9250                 hpsa_sas_port->next_phy_index);
9251         if (!phy) {
9252                 kfree(hpsa_sas_phy);
9253                 return NULL;
9254         }
9255
9256         hpsa_sas_port->next_phy_index++;
9257         hpsa_sas_phy->phy = phy;
9258         hpsa_sas_phy->parent_port = hpsa_sas_port;
9259
9260         return hpsa_sas_phy;
9261 }
9262
9263 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9264 {
9265         struct sas_phy *phy = hpsa_sas_phy->phy;
9266
9267         sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9268         if (hpsa_sas_phy->added_to_port)
9269                 list_del(&hpsa_sas_phy->phy_list_entry);
9270         sas_phy_delete(phy);
9271         kfree(hpsa_sas_phy);
9272 }
9273
9274 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9275 {
9276         int rc;
9277         struct hpsa_sas_port *hpsa_sas_port;
9278         struct sas_phy *phy;
9279         struct sas_identify *identify;
9280
9281         hpsa_sas_port = hpsa_sas_phy->parent_port;
9282         phy = hpsa_sas_phy->phy;
9283
9284         identify = &phy->identify;
9285         memset(identify, 0, sizeof(*identify));
9286         identify->sas_address = hpsa_sas_port->sas_address;
9287         identify->device_type = SAS_END_DEVICE;
9288         identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9289         identify->target_port_protocols = SAS_PROTOCOL_STP;
9290         phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9291         phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9292         phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9293         phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9294         phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9295
9296         rc = sas_phy_add(hpsa_sas_phy->phy);
9297         if (rc)
9298                 return rc;
9299
9300         sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9301         list_add_tail(&hpsa_sas_phy->phy_list_entry,
9302                         &hpsa_sas_port->phy_list_head);
9303         hpsa_sas_phy->added_to_port = true;
9304
9305         return 0;
9306 }
9307
9308 static int
9309         hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9310                                 struct sas_rphy *rphy)
9311 {
9312         struct sas_identify *identify;
9313
9314         identify = &rphy->identify;
9315         identify->sas_address = hpsa_sas_port->sas_address;
9316         identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9317         identify->target_port_protocols = SAS_PROTOCOL_STP;
9318
9319         return sas_rphy_add(rphy);
9320 }
9321
9322 static struct hpsa_sas_port
9323         *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9324                                 u64 sas_address)
9325 {
9326         int rc;
9327         struct hpsa_sas_port *hpsa_sas_port;
9328         struct sas_port *port;
9329
9330         hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9331         if (!hpsa_sas_port)
9332                 return NULL;
9333
9334         INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9335         hpsa_sas_port->parent_node = hpsa_sas_node;
9336
9337         port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9338         if (!port)
9339                 goto free_hpsa_port;
9340
9341         rc = sas_port_add(port);
9342         if (rc)
9343                 goto free_sas_port;
9344
9345         hpsa_sas_port->port = port;
9346         hpsa_sas_port->sas_address = sas_address;
9347         list_add_tail(&hpsa_sas_port->port_list_entry,
9348                         &hpsa_sas_node->port_list_head);
9349
9350         return hpsa_sas_port;
9351
9352 free_sas_port:
9353         sas_port_free(port);
9354 free_hpsa_port:
9355         kfree(hpsa_sas_port);
9356
9357         return NULL;
9358 }
9359
9360 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9361 {
9362         struct hpsa_sas_phy *hpsa_sas_phy;
9363         struct hpsa_sas_phy *next;
9364
9365         list_for_each_entry_safe(hpsa_sas_phy, next,
9366                         &hpsa_sas_port->phy_list_head, phy_list_entry)
9367                 hpsa_free_sas_phy(hpsa_sas_phy);
9368
9369         sas_port_delete(hpsa_sas_port->port);
9370         list_del(&hpsa_sas_port->port_list_entry);
9371         kfree(hpsa_sas_port);
9372 }
9373
9374 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9375 {
9376         struct hpsa_sas_node *hpsa_sas_node;
9377
9378         hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9379         if (hpsa_sas_node) {
9380                 hpsa_sas_node->parent_dev = parent_dev;
9381                 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9382         }
9383
9384         return hpsa_sas_node;
9385 }
9386
9387 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9388 {
9389         struct hpsa_sas_port *hpsa_sas_port;
9390         struct hpsa_sas_port *next;
9391
9392         if (!hpsa_sas_node)
9393                 return;
9394
9395         list_for_each_entry_safe(hpsa_sas_port, next,
9396                         &hpsa_sas_node->port_list_head, port_list_entry)
9397                 hpsa_free_sas_port(hpsa_sas_port);
9398
9399         kfree(hpsa_sas_node);
9400 }
9401
9402 static struct hpsa_scsi_dev_t
9403         *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9404                                         struct sas_rphy *rphy)
9405 {
9406         int i;
9407         struct hpsa_scsi_dev_t *device;
9408
9409         for (i = 0; i < h->ndevices; i++) {
9410                 device = h->dev[i];
9411                 if (!device->sas_port)
9412                         continue;
9413                 if (device->sas_port->rphy == rphy)
9414                         return device;
9415         }
9416
9417         return NULL;
9418 }
9419
9420 static int hpsa_add_sas_host(struct ctlr_info *h)
9421 {
9422         int rc;
9423         struct device *parent_dev;
9424         struct hpsa_sas_node *hpsa_sas_node;
9425         struct hpsa_sas_port *hpsa_sas_port;
9426         struct hpsa_sas_phy *hpsa_sas_phy;
9427
9428         parent_dev = &h->scsi_host->shost_gendev;
9429
9430         hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9431         if (!hpsa_sas_node)
9432                 return -ENOMEM;
9433
9434         hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9435         if (!hpsa_sas_port) {
9436                 rc = -ENODEV;
9437                 goto free_sas_node;
9438         }
9439
9440         hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9441         if (!hpsa_sas_phy) {
9442                 rc = -ENODEV;
9443                 goto free_sas_port;
9444         }
9445
9446         rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9447         if (rc)
9448                 goto free_sas_phy;
9449
9450         h->sas_host = hpsa_sas_node;
9451
9452         return 0;
9453
9454 free_sas_phy:
9455         hpsa_free_sas_phy(hpsa_sas_phy);
9456 free_sas_port:
9457         hpsa_free_sas_port(hpsa_sas_port);
9458 free_sas_node:
9459         hpsa_free_sas_node(hpsa_sas_node);
9460
9461         return rc;
9462 }
9463
9464 static void hpsa_delete_sas_host(struct ctlr_info *h)
9465 {
9466         hpsa_free_sas_node(h->sas_host);
9467 }
9468
9469 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9470                                 struct hpsa_scsi_dev_t *device)
9471 {
9472         int rc;
9473         struct hpsa_sas_port *hpsa_sas_port;
9474         struct sas_rphy *rphy;
9475
9476         hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9477         if (!hpsa_sas_port)
9478                 return -ENOMEM;
9479
9480         rphy = sas_end_device_alloc(hpsa_sas_port->port);
9481         if (!rphy) {
9482                 rc = -ENODEV;
9483                 goto free_sas_port;
9484         }
9485
9486         hpsa_sas_port->rphy = rphy;
9487         device->sas_port = hpsa_sas_port;
9488
9489         rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9490         if (rc)
9491                 goto free_sas_port;
9492
9493         return 0;
9494
9495 free_sas_port:
9496         hpsa_free_sas_port(hpsa_sas_port);
9497         device->sas_port = NULL;
9498
9499         return rc;
9500 }
9501
9502 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9503 {
9504         if (device->sas_port) {
9505                 hpsa_free_sas_port(device->sas_port);
9506                 device->sas_port = NULL;
9507         }
9508 }
9509
9510 static int
9511 hpsa_sas_get_linkerrors(struct sas_phy *phy)
9512 {
9513         return 0;
9514 }
9515
9516 static int
9517 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9518 {
9519         *identifier = 0;
9520         return 0;
9521 }
9522
9523 static int
9524 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9525 {
9526         return -ENXIO;
9527 }
9528
9529 static int
9530 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9531 {
9532         return 0;
9533 }
9534
9535 static int
9536 hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9537 {
9538         return 0;
9539 }
9540
9541 static int
9542 hpsa_sas_phy_setup(struct sas_phy *phy)
9543 {
9544         return 0;
9545 }
9546
9547 static void
9548 hpsa_sas_phy_release(struct sas_phy *phy)
9549 {
9550 }
9551
9552 static int
9553 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9554 {
9555         return -EINVAL;
9556 }
9557
9558 static struct sas_function_template hpsa_sas_transport_functions = {
9559         .get_linkerrors = hpsa_sas_get_linkerrors,
9560         .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9561         .get_bay_identifier = hpsa_sas_get_bay_identifier,
9562         .phy_reset = hpsa_sas_phy_reset,
9563         .phy_enable = hpsa_sas_phy_enable,
9564         .phy_setup = hpsa_sas_phy_setup,
9565         .phy_release = hpsa_sas_phy_release,
9566         .set_phy_speed = hpsa_sas_phy_speed,
9567 };
9568
9569 /*
9570  *  This is it.  Register the PCI driver information for the cards we control
9571  *  the OS will call our registered routines when it finds one of our cards.
9572  */
9573 static int __init hpsa_init(void)
9574 {
9575         int rc;
9576
9577         hpsa_sas_transport_template =
9578                 sas_attach_transport(&hpsa_sas_transport_functions);
9579         if (!hpsa_sas_transport_template)
9580                 return -ENODEV;
9581
9582         rc = pci_register_driver(&hpsa_pci_driver);
9583
9584         if (rc)
9585                 sas_release_transport(hpsa_sas_transport_template);
9586
9587         return rc;
9588 }
9589
9590 static void __exit hpsa_cleanup(void)
9591 {
9592         pci_unregister_driver(&hpsa_pci_driver);
9593         sas_release_transport(hpsa_sas_transport_template);
9594 }
9595
9596 static void __attribute__((unused)) verify_offsets(void)
9597 {
9598 #define VERIFY_OFFSET(member, offset) \
9599         BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9600
9601         VERIFY_OFFSET(structure_size, 0);
9602         VERIFY_OFFSET(volume_blk_size, 4);
9603         VERIFY_OFFSET(volume_blk_cnt, 8);
9604         VERIFY_OFFSET(phys_blk_shift, 16);
9605         VERIFY_OFFSET(parity_rotation_shift, 17);
9606         VERIFY_OFFSET(strip_size, 18);
9607         VERIFY_OFFSET(disk_starting_blk, 20);
9608         VERIFY_OFFSET(disk_blk_cnt, 28);
9609         VERIFY_OFFSET(data_disks_per_row, 36);
9610         VERIFY_OFFSET(metadata_disks_per_row, 38);
9611         VERIFY_OFFSET(row_cnt, 40);
9612         VERIFY_OFFSET(layout_map_count, 42);
9613         VERIFY_OFFSET(flags, 44);
9614         VERIFY_OFFSET(dekindex, 46);
9615         /* VERIFY_OFFSET(reserved, 48 */
9616         VERIFY_OFFSET(data, 64);
9617
9618 #undef VERIFY_OFFSET
9619
9620 #define VERIFY_OFFSET(member, offset) \
9621         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9622
9623         VERIFY_OFFSET(IU_type, 0);
9624         VERIFY_OFFSET(direction, 1);
9625         VERIFY_OFFSET(reply_queue, 2);
9626         /* VERIFY_OFFSET(reserved1, 3);  */
9627         VERIFY_OFFSET(scsi_nexus, 4);
9628         VERIFY_OFFSET(Tag, 8);
9629         VERIFY_OFFSET(cdb, 16);
9630         VERIFY_OFFSET(cciss_lun, 32);
9631         VERIFY_OFFSET(data_len, 40);
9632         VERIFY_OFFSET(cmd_priority_task_attr, 44);
9633         VERIFY_OFFSET(sg_count, 45);
9634         /* VERIFY_OFFSET(reserved3 */
9635         VERIFY_OFFSET(err_ptr, 48);
9636         VERIFY_OFFSET(err_len, 56);
9637         /* VERIFY_OFFSET(reserved4  */
9638         VERIFY_OFFSET(sg, 64);
9639
9640 #undef VERIFY_OFFSET
9641
9642 #define VERIFY_OFFSET(member, offset) \
9643         BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9644
9645         VERIFY_OFFSET(dev_handle, 0x00);
9646         VERIFY_OFFSET(reserved1, 0x02);
9647         VERIFY_OFFSET(function, 0x03);
9648         VERIFY_OFFSET(reserved2, 0x04);
9649         VERIFY_OFFSET(err_info, 0x0C);
9650         VERIFY_OFFSET(reserved3, 0x10);
9651         VERIFY_OFFSET(err_info_len, 0x12);
9652         VERIFY_OFFSET(reserved4, 0x13);
9653         VERIFY_OFFSET(sgl_offset, 0x14);
9654         VERIFY_OFFSET(reserved5, 0x15);
9655         VERIFY_OFFSET(transfer_len, 0x1C);
9656         VERIFY_OFFSET(reserved6, 0x20);
9657         VERIFY_OFFSET(io_flags, 0x24);
9658         VERIFY_OFFSET(reserved7, 0x26);
9659         VERIFY_OFFSET(LUN, 0x34);
9660         VERIFY_OFFSET(control, 0x3C);
9661         VERIFY_OFFSET(CDB, 0x40);
9662         VERIFY_OFFSET(reserved8, 0x50);
9663         VERIFY_OFFSET(host_context_flags, 0x60);
9664         VERIFY_OFFSET(timeout_sec, 0x62);
9665         VERIFY_OFFSET(ReplyQueue, 0x64);
9666         VERIFY_OFFSET(reserved9, 0x65);
9667         VERIFY_OFFSET(tag, 0x68);
9668         VERIFY_OFFSET(host_addr, 0x70);
9669         VERIFY_OFFSET(CISS_LUN, 0x78);
9670         VERIFY_OFFSET(SG, 0x78 + 8);
9671 #undef VERIFY_OFFSET
9672 }
9673
9674 module_init(hpsa_init);
9675 module_exit(hpsa_cleanup);