drivers/scsi/mpt3sas/mpt3sas_base.c

   1 /*
   2  * This is the Fusion MPT base driver providing common API layer interface
   3  * for access to MPT (Message Passing Technology) firmware.
   4  *
   5  * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.c
   6  * Copyright (C) 2012-2014  LSI Corporation
   7  * Copyright (C) 2013-2014 Avago Technologies
   8  *  (mailto: MPT-FusionLinux.pdl@avagotech.com)
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * as published by the Free Software Foundation; either version 2
  13  * of the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * NO WARRANTY
  21  * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  22  * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  23  * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  24  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  25  * solely responsible for determining the appropriateness of using and
  26  * distributing the Program and assumes all risks associated with its
  27  * exercise of rights under this Agreement, including but not limited to
  28  * the risks and costs of program errors, damage to or loss of data,
  29  * programs or equipment, and unavailability or interruption of operations.
  30
  31  * DISCLAIMER OF LIABILITY
  32  * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  33  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  34  * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  35  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  36  * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  37  * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  38  * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  39
  40  * You should have received a copy of the GNU General Public License
  41  * along with this program; if not, write to the Free Software
  42  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301,
  43  * USA.
  44  */
  45
  46 #include <linux/kernel.h>
  47 #include <linux/module.h>
  48 #include <linux/errno.h>
  49 #include <linux/init.h>
  50 #include <linux/slab.h>
  51 #include <linux/types.h>
  52 #include <linux/pci.h>
  53 #include <linux/kdev_t.h>
  54 #include <linux/blkdev.h>
  55 #include <linux/delay.h>
  56 #include <linux/interrupt.h>
  57 #include <linux/dma-mapping.h>
  58 #include <linux/io.h>
  59 #include <linux/time.h>
  60 #include <linux/kthread.h>
  61 #include <linux/aer.h>
  62
  63
  64 #include "mpt3sas_base.h"
  65
  66 static MPT_CALLBACK     mpt_callbacks[MPT_MAX_CALLBACKS];
  67
  68
  69 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  70
  71  /* maximum controller queue depth */
  72 #define MAX_HBA_QUEUE_DEPTH     30000
  73 #define MAX_CHAIN_DEPTH         100000
  74 static int max_queue_depth = -1;
  75 module_param(max_queue_depth, int, 0);
  76 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  77
  78 static int max_sgl_entries = -1;
  79 module_param(max_sgl_entries, int, 0);
  80 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  81
  82 static int msix_disable = -1;
  83 module_param(msix_disable, int, 0);
  84 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  85
  86 static int max_msix_vectors = -1;
  87 module_param(max_msix_vectors, int, 0);
  88 MODULE_PARM_DESC(max_msix_vectors,
  89         " max msix vectors");
  90
  91 static int mpt3sas_fwfault_debug;
  92 MODULE_PARM_DESC(mpt3sas_fwfault_debug,
  93         " enable detection of firmware fault and halt firmware - (default=0)");
  94
  95 static int
  96 _base_get_ioc_facts(struct MPT3SAS_ADAPTER *ioc, int sleep_flag);
  97
  98 /**
  99  * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
 100  *
 101  */
 102 static int
 103 _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
 104 {
 105         int ret = param_set_int(val, kp);
 106         struct MPT3SAS_ADAPTER *ioc;
 107
 108         if (ret)
 109                 return ret;
 110
 111         /* global ioc spinlock to protect controller list on list operations */
 112         pr_info("setting fwfault_debug(%d)\n", mpt3sas_fwfault_debug);
 113         spin_lock(&gioc_lock);
 114         list_for_each_entry(ioc, &mpt3sas_ioc_list, list)
 115                 ioc->fwfault_debug = mpt3sas_fwfault_debug;
 116         spin_unlock(&gioc_lock);
 117         return 0;
 118 }
 119 module_param_call(mpt3sas_fwfault_debug, _scsih_set_fwfault_debug,
 120         param_get_int, &mpt3sas_fwfault_debug, 0644);
 121
 122 /**
 123  *  mpt3sas_remove_dead_ioc_func - kthread context to remove dead ioc
 124  * @arg: input argument, used to derive ioc
 125  *
 126  * Return 0 if controller is removed from pci subsystem.
 127  * Return -1 for other case.
 128  */
 129 static int mpt3sas_remove_dead_ioc_func(void *arg)
 130 {
 131         struct MPT3SAS_ADAPTER *ioc = (struct MPT3SAS_ADAPTER *)arg;
 132         struct pci_dev *pdev;
 133
 134         if ((ioc == NULL))
 135                 return -1;
 136
 137         pdev = ioc->pdev;
 138         if ((pdev == NULL))
 139                 return -1;
 140         pci_stop_and_remove_bus_device_locked(pdev);
 141         return 0;
 142 }
 143
 144 /**
 145  * _base_fault_reset_work - workq handling ioc fault conditions
 146  * @work: input argument, used to derive ioc
 147  * Context: sleep.
 148  *
 149  * Return nothing.
 150  */
 151 static void
 152 _base_fault_reset_work(struct work_struct *work)
 153 {
 154         struct MPT3SAS_ADAPTER *ioc =
 155             container_of(work, struct MPT3SAS_ADAPTER, fault_reset_work.work);
 156         unsigned long    flags;
 157         u32 doorbell;
 158         int rc;
 159         struct task_struct *p;
 160
 161
 162         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 163         if (ioc->shost_recovery || ioc->pci_error_recovery)
 164                 goto rearm_timer;
 165         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 166
 167         doorbell = mpt3sas_base_get_iocstate(ioc, 0);
 168         if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
 169                 pr_err(MPT3SAS_FMT "SAS host is non-operational !!!!\n",
 170                     ioc->name);
 171
 172                 /* It may be possible that EEH recovery can resolve some of
 173                  * pci bus failure issues rather removing the dead ioc function
 174                  * by considering controller is in a non-operational state. So
 175                  * here priority is given to the EEH recovery. If it doesn't
 176                  * not resolve this issue, mpt3sas driver will consider this
 177                  * controller to non-operational state and remove the dead ioc
 178                  * function.
 179                  */
 180                 if (ioc->non_operational_loop++ < 5) {
 181                         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock,
 182                                                          flags);
 183                         goto rearm_timer;
 184                 }
 185
 186                 /*
 187                  * Call _scsih_flush_pending_cmds callback so that we flush all
 188                  * pending commands back to OS. This call is required to aovid
 189                  * deadlock at block layer. Dead IOC will fail to do diag reset,
 190                  * and this call is safe since dead ioc will never return any
 191                  * command back from HW.
 192                  */
 193                 ioc->schedule_dead_ioc_flush_running_cmds(ioc);
 194                 /*
 195                  * Set remove_host flag early since kernel thread will
 196                  * take some time to execute.
 197                  */
 198                 ioc->remove_host = 1;
 199                 /*Remove the Dead Host */
 200                 p = kthread_run(mpt3sas_remove_dead_ioc_func, ioc,
 201                     "%s_dead_ioc_%d", ioc->driver_name, ioc->id);
 202                 if (IS_ERR(p))
 203                         pr_err(MPT3SAS_FMT
 204                         "%s: Running mpt3sas_dead_ioc thread failed !!!!\n",
 205                         ioc->name, __func__);
 206                 else
 207                         pr_err(MPT3SAS_FMT
 208                         "%s: Running mpt3sas_dead_ioc thread success !!!!\n",
 209                         ioc->name, __func__);
 210                 return; /* don't rearm timer */
 211         }
 212
 213         ioc->non_operational_loop = 0;
 214
 215         if ((doorbell & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL) {
 216                 rc = mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
 217                     FORCE_BIG_HAMMER);
 218                 pr_warn(MPT3SAS_FMT "%s: hard reset: %s\n", ioc->name,
 219                     __func__, (rc == 0) ? "success" : "failed");
 220                 doorbell = mpt3sas_base_get_iocstate(ioc, 0);
 221                 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
 222                         mpt3sas_base_fault_info(ioc, doorbell &
 223                             MPI2_DOORBELL_DATA_MASK);
 224                 if (rc && (doorbell & MPI2_IOC_STATE_MASK) !=
 225                     MPI2_IOC_STATE_OPERATIONAL)
 226                         return; /* don't rearm timer */
 227         }
 228
 229         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 230  rearm_timer:
 231         if (ioc->fault_reset_work_q)
 232                 queue_delayed_work(ioc->fault_reset_work_q,
 233                     &ioc->fault_reset_work,
 234                     msecs_to_jiffies(FAULT_POLLING_INTERVAL));
 235         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 236 }
 237
 238 /**
 239  * mpt3sas_base_start_watchdog - start the fault_reset_work_q
 240  * @ioc: per adapter object
 241  * Context: sleep.
 242  *
 243  * Return nothing.
 244  */
 245 void
 246 mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc)
 247 {
 248         unsigned long    flags;
 249
 250         if (ioc->fault_reset_work_q)
 251                 return;
 252
 253         /* initialize fault polling */
 254
 255         INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
 256         snprintf(ioc->fault_reset_work_q_name,
 257             sizeof(ioc->fault_reset_work_q_name), "poll_%s%d_status",
 258             ioc->driver_name, ioc->id);
 259         ioc->fault_reset_work_q =
 260                 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
 261         if (!ioc->fault_reset_work_q) {
 262                 pr_err(MPT3SAS_FMT "%s: failed (line=%d)\n",
 263                     ioc->name, __func__, __LINE__);
 264                         return;
 265         }
 266         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 267         if (ioc->fault_reset_work_q)
 268                 queue_delayed_work(ioc->fault_reset_work_q,
 269                     &ioc->fault_reset_work,
 270                     msecs_to_jiffies(FAULT_POLLING_INTERVAL));
 271         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 272 }
 273
 274 /**
 275  * mpt3sas_base_stop_watchdog - stop the fault_reset_work_q
 276  * @ioc: per adapter object
 277  * Context: sleep.
 278  *
 279  * Return nothing.
 280  */
 281 void
 282 mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc)
 283 {
 284         unsigned long flags;
 285         struct workqueue_struct *wq;
 286
 287         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 288         wq = ioc->fault_reset_work_q;
 289         ioc->fault_reset_work_q = NULL;
 290         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 291         if (wq) {
 292                 if (!cancel_delayed_work_sync(&ioc->fault_reset_work))
 293                         flush_workqueue(wq);
 294                 destroy_workqueue(wq);
 295         }
 296 }
 297
 298 /**
 299  * mpt3sas_base_fault_info - verbose translation of firmware FAULT code
 300  * @ioc: per adapter object
 301  * @fault_code: fault code
 302  *
 303  * Return nothing.
 304  */
 305 void
 306 mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code)
 307 {
 308         pr_err(MPT3SAS_FMT "fault_state(0x%04x)!\n",
 309             ioc->name, fault_code);
 310 }
 311
 312 /**
 313  * mpt3sas_halt_firmware - halt's mpt controller firmware
 314  * @ioc: per adapter object
 315  *
 316  * For debugging timeout related issues.  Writing 0xCOFFEE00
 317  * to the doorbell register will halt controller firmware. With
 318  * the purpose to stop both driver and firmware, the enduser can
 319  * obtain a ring buffer from controller UART.
 320  */
 321 void
 322 mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc)
 323 {
 324         u32 doorbell;
 325
 326         if (!ioc->fwfault_debug)
 327                 return;
 328
 329         dump_stack();
 330
 331         doorbell = readl(&ioc->chip->Doorbell);
 332         if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
 333                 mpt3sas_base_fault_info(ioc , doorbell);
 334         else {
 335                 writel(0xC0FFEE00, &ioc->chip->Doorbell);
 336                 pr_err(MPT3SAS_FMT "Firmware is halted due to command timeout\n",
 337                         ioc->name);
 338         }
 339
 340         if (ioc->fwfault_debug == 2)
 341                 for (;;)
 342                         ;
 343         else
 344                 panic("panic in %s\n", __func__);
 345 }
 346
 347 /**
 348  * _base_sas_ioc_info - verbose translation of the ioc status
 349  * @ioc: per adapter object
 350  * @mpi_reply: reply mf payload returned from firmware
 351  * @request_hdr: request mf
 352  *
 353  * Return nothing.
 354  */
 355 static void
 356 _base_sas_ioc_info(struct MPT3SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
 357         MPI2RequestHeader_t *request_hdr)
 358 {
 359         u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
 360             MPI2_IOCSTATUS_MASK;
 361         char *desc = NULL;
 362         u16 frame_sz;
 363         char *func_str = NULL;
 364
 365         /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
 366         if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
 367             request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
 368             request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
 369                 return;
 370
 371         if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
 372                 return;
 373
 374         switch (ioc_status) {
 375
 376 /****************************************************************************
 377 *  Common IOCStatus values for all replies
 378 ****************************************************************************/
 379
 380         case MPI2_IOCSTATUS_INVALID_FUNCTION:
 381                 desc = "invalid function";
 382                 break;
 383         case MPI2_IOCSTATUS_BUSY:
 384                 desc = "busy";
 385                 break;
 386         case MPI2_IOCSTATUS_INVALID_SGL:
 387                 desc = "invalid sgl";
 388                 break;
 389         case MPI2_IOCSTATUS_INTERNAL_ERROR:
 390                 desc = "internal error";
 391                 break;
 392         case MPI2_IOCSTATUS_INVALID_VPID:
 393                 desc = "invalid vpid";
 394                 break;
 395         case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
 396                 desc = "insufficient resources";
 397                 break;
 398         case MPI2_IOCSTATUS_INVALID_FIELD:
 399                 desc = "invalid field";
 400                 break;
 401         case MPI2_IOCSTATUS_INVALID_STATE:
 402                 desc = "invalid state";
 403                 break;
 404         case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
 405                 desc = "op state not supported";
 406                 break;
 407
 408 /****************************************************************************
 409 *  Config IOCStatus values
 410 ****************************************************************************/
 411
 412         case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
 413                 desc = "config invalid action";
 414                 break;
 415         case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
 416                 desc = "config invalid type";
 417                 break;
 418         case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
 419                 desc = "config invalid page";
 420                 break;
 421         case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
 422                 desc = "config invalid data";
 423                 break;
 424         case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
 425                 desc = "config no defaults";
 426                 break;
 427         case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
 428                 desc = "config cant commit";
 429                 break;
 430
 431 /****************************************************************************
 432 *  SCSI IO Reply
 433 ****************************************************************************/
 434
 435         case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
 436         case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
 437         case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
 438         case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
 439         case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
 440         case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
 441         case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
 442         case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
 443         case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
 444         case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
 445         case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
 446         case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
 447                 break;
 448
 449 /****************************************************************************
 450 *  For use by SCSI Initiator and SCSI Target end-to-end data protection
 451 ****************************************************************************/
 452
 453         case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
 454                 desc = "eedp guard error";
 455                 break;
 456         case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
 457                 desc = "eedp ref tag error";
 458                 break;
 459         case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
 460                 desc = "eedp app tag error";
 461                 break;
 462
 463 /****************************************************************************
 464 *  SCSI Target values
 465 ****************************************************************************/
 466
 467         case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
 468                 desc = "target invalid io index";
 469                 break;
 470         case MPI2_IOCSTATUS_TARGET_ABORTED:
 471                 desc = "target aborted";
 472                 break;
 473         case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
 474                 desc = "target no conn retryable";
 475                 break;
 476         case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
 477                 desc = "target no connection";
 478                 break;
 479         case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
 480                 desc = "target xfer count mismatch";
 481                 break;
 482         case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
 483                 desc = "target data offset error";
 484                 break;
 485         case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
 486                 desc = "target too much write data";
 487                 break;
 488         case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
 489                 desc = "target iu too short";
 490                 break;
 491         case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
 492                 desc = "target ack nak timeout";
 493                 break;
 494         case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
 495                 desc = "target nak received";
 496                 break;
 497
 498 /****************************************************************************
 499 *  Serial Attached SCSI values
 500 ****************************************************************************/
 501
 502         case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
 503                 desc = "smp request failed";
 504                 break;
 505         case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
 506                 desc = "smp data overrun";
 507                 break;
 508
 509 /****************************************************************************
 510 *  Diagnostic Buffer Post / Diagnostic Release values
 511 ****************************************************************************/
 512
 513         case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
 514                 desc = "diagnostic released";
 515                 break;
 516         default:
 517                 break;
 518         }
 519
 520         if (!desc)
 521                 return;
 522
 523         switch (request_hdr->Function) {
 524         case MPI2_FUNCTION_CONFIG:
 525                 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
 526                 func_str = "config_page";
 527                 break;
 528         case MPI2_FUNCTION_SCSI_TASK_MGMT:
 529                 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
 530                 func_str = "task_mgmt";
 531                 break;
 532         case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
 533                 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
 534                 func_str = "sas_iounit_ctl";
 535                 break;
 536         case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
 537                 frame_sz = sizeof(Mpi2SepRequest_t);
 538                 func_str = "enclosure";
 539                 break;
 540         case MPI2_FUNCTION_IOC_INIT:
 541                 frame_sz = sizeof(Mpi2IOCInitRequest_t);
 542                 func_str = "ioc_init";
 543                 break;
 544         case MPI2_FUNCTION_PORT_ENABLE:
 545                 frame_sz = sizeof(Mpi2PortEnableRequest_t);
 546                 func_str = "port_enable";
 547                 break;
 548         case MPI2_FUNCTION_SMP_PASSTHROUGH:
 549                 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
 550                 func_str = "smp_passthru";
 551                 break;
 552         default:
 553                 frame_sz = 32;
 554                 func_str = "unknown";
 555                 break;
 556         }
 557
 558         pr_warn(MPT3SAS_FMT "ioc_status: %s(0x%04x), request(0x%p),(%s)\n",
 559                 ioc->name, desc, ioc_status, request_hdr, func_str);
 560
 561         _debug_dump_mf(request_hdr, frame_sz/4);
 562 }
 563
 564 /**
 565  * _base_display_event_data - verbose translation of firmware asyn events
 566  * @ioc: per adapter object
 567  * @mpi_reply: reply mf payload returned from firmware
 568  *
 569  * Return nothing.
 570  */
 571 static void
 572 _base_display_event_data(struct MPT3SAS_ADAPTER *ioc,
 573         Mpi2EventNotificationReply_t *mpi_reply)
 574 {
 575         char *desc = NULL;
 576         u16 event;
 577
 578         if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
 579                 return;
 580
 581         event = le16_to_cpu(mpi_reply->Event);
 582
 583         switch (event) {
 584         case MPI2_EVENT_LOG_DATA:
 585                 desc = "Log Data";
 586                 break;
 587         case MPI2_EVENT_STATE_CHANGE:
 588                 desc = "Status Change";
 589                 break;
 590         case MPI2_EVENT_HARD_RESET_RECEIVED:
 591                 desc = "Hard Reset Received";
 592                 break;
 593         case MPI2_EVENT_EVENT_CHANGE:
 594                 desc = "Event Change";
 595                 break;
 596         case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
 597                 desc = "Device Status Change";
 598                 break;
 599         case MPI2_EVENT_IR_OPERATION_STATUS:
 600                 if (!ioc->hide_ir_msg)
 601                         desc = "IR Operation Status";
 602                 break;
 603         case MPI2_EVENT_SAS_DISCOVERY:
 604         {
 605                 Mpi2EventDataSasDiscovery_t *event_data =
 606                     (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
 607                 pr_info(MPT3SAS_FMT "Discovery: (%s)", ioc->name,
 608                     (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
 609                     "start" : "stop");
 610                 if (event_data->DiscoveryStatus)
 611                         pr_info("discovery_status(0x%08x)",
 612                             le32_to_cpu(event_data->DiscoveryStatus));
 613                         pr_info("\n");
 614                 return;
 615         }
 616         case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
 617                 desc = "SAS Broadcast Primitive";
 618                 break;
 619         case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
 620                 desc = "SAS Init Device Status Change";
 621                 break;
 622         case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
 623                 desc = "SAS Init Table Overflow";
 624                 break;
 625         case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
 626                 desc = "SAS Topology Change List";
 627                 break;
 628         case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
 629                 desc = "SAS Enclosure Device Status Change";
 630                 break;
 631         case MPI2_EVENT_IR_VOLUME:
 632                 if (!ioc->hide_ir_msg)
 633                         desc = "IR Volume";
 634                 break;
 635         case MPI2_EVENT_IR_PHYSICAL_DISK:
 636                 if (!ioc->hide_ir_msg)
 637                         desc = "IR Physical Disk";
 638                 break;
 639         case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
 640                 if (!ioc->hide_ir_msg)
 641                         desc = "IR Configuration Change List";
 642                 break;
 643         case MPI2_EVENT_LOG_ENTRY_ADDED:
 644                 if (!ioc->hide_ir_msg)
 645                         desc = "Log Entry Added";
 646                 break;
 647         case MPI2_EVENT_TEMP_THRESHOLD:
 648                 desc = "Temperature Threshold";
 649                 break;
 650         }
 651
 652         if (!desc)
 653                 return;
 654
 655         pr_info(MPT3SAS_FMT "%s\n", ioc->name, desc);
 656 }
 657
 658 /**
 659  * _base_sas_log_info - verbose translation of firmware log info
 660  * @ioc: per adapter object
 661  * @log_info: log info
 662  *
 663  * Return nothing.
 664  */
 665 static void
 666 _base_sas_log_info(struct MPT3SAS_ADAPTER *ioc , u32 log_info)
 667 {
 668         union loginfo_type {
 669                 u32     loginfo;
 670                 struct {
 671                         u32     subcode:16;
 672                         u32     code:8;
 673                         u32     originator:4;
 674                         u32     bus_type:4;
 675                 } dw;
 676         };
 677         union loginfo_type sas_loginfo;
 678         char *originator_str = NULL;
 679
 680         sas_loginfo.loginfo = log_info;
 681         if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
 682                 return;
 683
 684         /* each nexus loss loginfo */
 685         if (log_info == 0x31170000)
 686                 return;
 687
 688         /* eat the loginfos associated with task aborts */
 689         if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
 690             0x31140000 || log_info == 0x31130000))
 691                 return;
 692
 693         switch (sas_loginfo.dw.originator) {
 694         case 0:
 695                 originator_str = "IOP";
 696                 break;
 697         case 1:
 698                 originator_str = "PL";
 699                 break;
 700         case 2:
 701                 if (!ioc->hide_ir_msg)
 702                         originator_str = "IR";
 703                 else
 704                         originator_str = "WarpDrive";
 705                 break;
 706         }
 707
 708         pr_warn(MPT3SAS_FMT
 709                 "log_info(0x%08x): originator(%s), code(0x%02x), sub_code(0x%04x)\n",
 710                 ioc->name, log_info,
 711              originator_str, sas_loginfo.dw.code,
 712              sas_loginfo.dw.subcode);
 713 }
 714
 715 /**
 716  * _base_display_reply_info -
 717  * @ioc: per adapter object
 718  * @smid: system request message index
 719  * @msix_index: MSIX table index supplied by the OS
 720  * @reply: reply message frame(lower 32bit addr)
 721  *
 722  * Return nothing.
 723  */
 724 static void
 725 _base_display_reply_info(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
 726         u32 reply)
 727 {
 728         MPI2DefaultReply_t *mpi_reply;
 729         u16 ioc_status;
 730         u32 loginfo = 0;
 731
 732         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
 733         if (unlikely(!mpi_reply)) {
 734                 pr_err(MPT3SAS_FMT "mpi_reply not valid at %s:%d/%s()!\n",
 735                     ioc->name, __FILE__, __LINE__, __func__);
 736                 return;
 737         }
 738         ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
 739
 740         if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
 741             (ioc->logging_level & MPT_DEBUG_REPLY)) {
 742                 _base_sas_ioc_info(ioc , mpi_reply,
 743                    mpt3sas_base_get_msg_frame(ioc, smid));
 744         }
 745
 746         if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
 747                 loginfo = le32_to_cpu(mpi_reply->IOCLogInfo);
 748                 _base_sas_log_info(ioc, loginfo);
 749         }
 750
 751         if (ioc_status || loginfo) {
 752                 ioc_status &= MPI2_IOCSTATUS_MASK;
 753                 mpt3sas_trigger_mpi(ioc, ioc_status, loginfo);
 754         }
 755 }
 756
 757 /**
 758  * mpt3sas_base_done - base internal command completion routine
 759  * @ioc: per adapter object
 760  * @smid: system request message index
 761  * @msix_index: MSIX table index supplied by the OS
 762  * @reply: reply message frame(lower 32bit addr)
 763  *
 764  * Return 1 meaning mf should be freed from _base_interrupt
 765  *        0 means the mf is freed from this function.
 766  */
 767 u8
 768 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
 769         u32 reply)
 770 {
 771         MPI2DefaultReply_t *mpi_reply;
 772
 773         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
 774         if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
 775                 return 1;
 776
 777         if (ioc->base_cmds.status == MPT3_CMD_NOT_USED)
 778                 return 1;
 779
 780         ioc->base_cmds.status |= MPT3_CMD_COMPLETE;
 781         if (mpi_reply) {
 782                 ioc->base_cmds.status |= MPT3_CMD_REPLY_VALID;
 783                 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
 784         }
 785         ioc->base_cmds.status &= ~MPT3_CMD_PENDING;
 786
 787         complete(&ioc->base_cmds.done);
 788         return 1;
 789 }
 790
 791 /**
 792  * _base_async_event - main callback handler for firmware asyn events
 793  * @ioc: per adapter object
 794  * @msix_index: MSIX table index supplied by the OS
 795  * @reply: reply message frame(lower 32bit addr)
 796  *
 797  * Return 1 meaning mf should be freed from _base_interrupt
 798  *        0 means the mf is freed from this function.
 799  */
 800 static u8
 801 _base_async_event(struct MPT3SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
 802 {
 803         Mpi2EventNotificationReply_t *mpi_reply;
 804         Mpi2EventAckRequest_t *ack_request;
 805         u16 smid;
 806
 807         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
 808         if (!mpi_reply)
 809                 return 1;
 810         if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
 811                 return 1;
 812
 813         _base_display_event_data(ioc, mpi_reply);
 814
 815         if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
 816                 goto out;
 817         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
 818         if (!smid) {
 819                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
 820                     ioc->name, __func__);
 821                 goto out;
 822         }
 823
 824         ack_request = mpt3sas_base_get_msg_frame(ioc, smid);
 825         memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
 826         ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
 827         ack_request->Event = mpi_reply->Event;
 828         ack_request->EventContext = mpi_reply->EventContext;
 829         ack_request->VF_ID = 0;  /* TODO */
 830         ack_request->VP_ID = 0;
 831         mpt3sas_base_put_smid_default(ioc, smid);
 832
 833  out:
 834
 835         /* scsih callback handler */
 836         mpt3sas_scsih_event_callback(ioc, msix_index, reply);
 837
 838         /* ctl callback handler */
 839         mpt3sas_ctl_event_callback(ioc, msix_index, reply);
 840
 841         return 1;
 842 }
 843
 844 /**
 845  * _base_get_cb_idx - obtain the callback index
 846  * @ioc: per adapter object
 847  * @smid: system request message index
 848  *
 849  * Return callback index.
 850  */
 851 static u8
 852 _base_get_cb_idx(struct MPT3SAS_ADAPTER *ioc, u16 smid)
 853 {
 854         int i;
 855         u8 cb_idx;
 856
 857         if (smid < ioc->hi_priority_smid) {
 858                 i = smid - 1;
 859                 cb_idx = ioc->scsi_lookup[i].cb_idx;
 860         } else if (smid < ioc->internal_smid) {
 861                 i = smid - ioc->hi_priority_smid;
 862                 cb_idx = ioc->hpr_lookup[i].cb_idx;
 863         } else if (smid <= ioc->hba_queue_depth) {
 864                 i = smid - ioc->internal_smid;
 865                 cb_idx = ioc->internal_lookup[i].cb_idx;
 866         } else
 867                 cb_idx = 0xFF;
 868         return cb_idx;
 869 }
 870
 871 /**
 872  * _base_mask_interrupts - disable interrupts
 873  * @ioc: per adapter object
 874  *
 875  * Disabling ResetIRQ, Reply and Doorbell Interrupts
 876  *
 877  * Return nothing.
 878  */
 879 static void
 880 _base_mask_interrupts(struct MPT3SAS_ADAPTER *ioc)
 881 {
 882         u32 him_register;
 883
 884         ioc->mask_interrupts = 1;
 885         him_register = readl(&ioc->chip->HostInterruptMask);
 886         him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
 887         writel(him_register, &ioc->chip->HostInterruptMask);
 888         readl(&ioc->chip->HostInterruptMask);
 889 }
 890
 891 /**
 892  * _base_unmask_interrupts - enable interrupts
 893  * @ioc: per adapter object
 894  *
 895  * Enabling only Reply Interrupts
 896  *
 897  * Return nothing.
 898  */
 899 static void
 900 _base_unmask_interrupts(struct MPT3SAS_ADAPTER *ioc)
 901 {
 902         u32 him_register;
 903
 904         him_register = readl(&ioc->chip->HostInterruptMask);
 905         him_register &= ~MPI2_HIM_RIM;
 906         writel(him_register, &ioc->chip->HostInterruptMask);
 907         ioc->mask_interrupts = 0;
 908 }
 909
 910 union reply_descriptor {
 911         u64 word;
 912         struct {
 913                 u32 low;
 914                 u32 high;
 915         } u;
 916 };
 917
 918 /**
 919  * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
 920  * @irq: irq number (not used)
 921  * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
 922  * @r: pt_regs pointer (not used)
 923  *
 924  * Return IRQ_HANDLE if processed, else IRQ_NONE.
 925  */
 926 static irqreturn_t
 927 _base_interrupt(int irq, void *bus_id)
 928 {
 929         struct adapter_reply_queue *reply_q = bus_id;
 930         union reply_descriptor rd;
 931         u32 completed_cmds;
 932         u8 request_desript_type;
 933         u16 smid;
 934         u8 cb_idx;
 935         u32 reply;
 936         u8 msix_index = reply_q->msix_index;
 937         struct MPT3SAS_ADAPTER *ioc = reply_q->ioc;
 938         Mpi2ReplyDescriptorsUnion_t *rpf;
 939         u8 rc;
 940
 941         if (ioc->mask_interrupts)
 942                 return IRQ_NONE;
 943
 944         if (!atomic_add_unless(&reply_q->busy, 1, 1))
 945                 return IRQ_NONE;
 946
 947         rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
 948         request_desript_type = rpf->Default.ReplyFlags
 949              & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
 950         if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
 951                 atomic_dec(&reply_q->busy);
 952                 return IRQ_NONE;
 953         }
 954
 955         completed_cmds = 0;
 956         cb_idx = 0xFF;
 957         do {
 958                 rd.word = le64_to_cpu(rpf->Words);
 959                 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
 960                         goto out;
 961                 reply = 0;
 962                 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
 963                 if (request_desript_type ==
 964                     MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS ||
 965                     request_desript_type ==
 966                     MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS) {
 967                         cb_idx = _base_get_cb_idx(ioc, smid);
 968                         if ((likely(cb_idx < MPT_MAX_CALLBACKS)) &&
 969                             (likely(mpt_callbacks[cb_idx] != NULL))) {
 970                                 rc = mpt_callbacks[cb_idx](ioc, smid,
 971                                     msix_index, 0);
 972                                 if (rc)
 973                                         mpt3sas_base_free_smid(ioc, smid);
 974                         }
 975                 } else if (request_desript_type ==
 976                     MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
 977                         reply = le32_to_cpu(
 978                             rpf->AddressReply.ReplyFrameAddress);
 979                         if (reply > ioc->reply_dma_max_address ||
 980                             reply < ioc->reply_dma_min_address)
 981                                 reply = 0;
 982                         if (smid) {
 983                                 cb_idx = _base_get_cb_idx(ioc, smid);
 984                                 if ((likely(cb_idx < MPT_MAX_CALLBACKS)) &&
 985                                     (likely(mpt_callbacks[cb_idx] != NULL))) {
 986                                         rc = mpt_callbacks[cb_idx](ioc, smid,
 987                                             msix_index, reply);
 988                                         if (reply)
 989                                                 _base_display_reply_info(ioc,
 990                                                     smid, msix_index, reply);
 991                                         if (rc)
 992                                                 mpt3sas_base_free_smid(ioc,
 993                                                     smid);
 994                                 }
 995                         } else {
 996                                 _base_async_event(ioc, msix_index, reply);
 997                         }
 998
 999                         /* reply free queue handling */
1000                         if (reply) {
1001                                 ioc->reply_free_host_index =
1002                                     (ioc->reply_free_host_index ==
1003                                     (ioc->reply_free_queue_depth - 1)) ?
1004                                     0 : ioc->reply_free_host_index + 1;
1005                                 ioc->reply_free[ioc->reply_free_host_index] =
1006                                     cpu_to_le32(reply);
1007                                 wmb();
1008                                 writel(ioc->reply_free_host_index,
1009                                     &ioc->chip->ReplyFreeHostIndex);
1010                         }
1011                 }
1012
1013                 rpf->Words = cpu_to_le64(ULLONG_MAX);
1014                 reply_q->reply_post_host_index =
1015                     (reply_q->reply_post_host_index ==
1016                     (ioc->reply_post_queue_depth - 1)) ? 0 :
1017                     reply_q->reply_post_host_index + 1;
1018                 request_desript_type =
1019                     reply_q->reply_post_free[reply_q->reply_post_host_index].
1020                     Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
1021                 completed_cmds++;
1022                 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
1023                         goto out;
1024                 if (!reply_q->reply_post_host_index)
1025                         rpf = reply_q->reply_post_free;
1026                 else
1027                         rpf++;
1028         } while (1);
1029
1030  out:
1031
1032         if (!completed_cmds) {
1033                 atomic_dec(&reply_q->busy);
1034                 return IRQ_NONE;
1035         }
1036
1037         wmb();
1038         if (ioc->is_warpdrive) {
1039                 writel(reply_q->reply_post_host_index,
1040                 ioc->reply_post_host_index[msix_index]);
1041                 atomic_dec(&reply_q->busy);
1042                 return IRQ_HANDLED;
1043         }
1044
1045         /* Update Reply Post Host Index.
1046          * For those HBA's which support combined reply queue feature
1047          * 1. Get the correct Supplemental Reply Post Host Index Register.
1048          *    i.e. (msix_index / 8)th entry from Supplemental Reply Post Host
1049          *    Index Register address bank i.e replyPostRegisterIndex[],
1050          * 2. Then update this register with new reply host index value
1051          *    in ReplyPostIndex field and the MSIxIndex field with
1052          *    msix_index value reduced to a value between 0 and 7,
1053          *    using a modulo 8 operation. Since each Supplemental Reply Post
1054          *    Host Index Register supports 8 MSI-X vectors.
1055          *
1056          * For other HBA's just update the Reply Post Host Index register with
1057          * new reply host index value in ReplyPostIndex Field and msix_index
1058          * value in MSIxIndex field.
1059          */
1060         if (ioc->msix96_vector)
1061                 writel(reply_q->reply_post_host_index | ((msix_index  & 7) <<
1062                         MPI2_RPHI_MSIX_INDEX_SHIFT),
1063                         ioc->replyPostRegisterIndex[msix_index/8]);
1064         else
1065                 writel(reply_q->reply_post_host_index | (msix_index <<
1066                         MPI2_RPHI_MSIX_INDEX_SHIFT),
1067                         &ioc->chip->ReplyPostHostIndex);
1068         atomic_dec(&reply_q->busy);
1069         return IRQ_HANDLED;
1070 }
1071
1072 /**
1073  * _base_is_controller_msix_enabled - is controller support muli-reply queues
1074  * @ioc: per adapter object
1075  *
1076  */
1077 static inline int
1078 _base_is_controller_msix_enabled(struct MPT3SAS_ADAPTER *ioc)
1079 {
1080         return (ioc->facts.IOCCapabilities &
1081             MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
1082 }
1083
1084 /**
1085  * mpt3sas_base_flush_reply_queues - flushing the MSIX reply queues
1086  * @ioc: per adapter object
1087  * Context: ISR conext
1088  *
1089  * Called when a Task Management request has completed. We want
1090  * to flush the other reply queues so all the outstanding IO has been
1091  * completed back to OS before we process the TM completetion.
1092  *
1093  * Return nothing.
1094  */
1095 void
1096 mpt3sas_base_flush_reply_queues(struct MPT3SAS_ADAPTER *ioc)
1097 {
1098         struct adapter_reply_queue *reply_q;
1099
1100         /* If MSIX capability is turned off
1101          * then multi-queues are not enabled
1102          */
1103         if (!_base_is_controller_msix_enabled(ioc))
1104                 return;
1105
1106         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1107                 if (ioc->shost_recovery)
1108                         return;
1109                 /* TMs are on msix_index == 0 */
1110                 if (reply_q->msix_index == 0)
1111                         continue;
1112                 _base_interrupt(reply_q->vector, (void *)reply_q);
1113         }
1114 }
1115
1116 /**
1117  * mpt3sas_base_release_callback_handler - clear interrupt callback handler
1118  * @cb_idx: callback index
1119  *
1120  * Return nothing.
1121  */
1122 void
1123 mpt3sas_base_release_callback_handler(u8 cb_idx)
1124 {
1125         mpt_callbacks[cb_idx] = NULL;
1126 }
1127
1128 /**
1129  * mpt3sas_base_register_callback_handler - obtain index for the interrupt callback handler
1130  * @cb_func: callback function
1131  *
1132  * Returns cb_func.
1133  */
1134 u8
1135 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func)
1136 {
1137         u8 cb_idx;
1138
1139         for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
1140                 if (mpt_callbacks[cb_idx] == NULL)
1141                         break;
1142
1143         mpt_callbacks[cb_idx] = cb_func;
1144         return cb_idx;
1145 }
1146
1147 /**
1148  * mpt3sas_base_initialize_callback_handler - initialize the interrupt callback handler
1149  *
1150  * Return nothing.
1151  */
1152 void
1153 mpt3sas_base_initialize_callback_handler(void)
1154 {
1155         u8 cb_idx;
1156
1157         for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
1158                 mpt3sas_base_release_callback_handler(cb_idx);
1159 }
1160
1161
1162 /**
1163  * _base_build_zero_len_sge - build zero length sg entry
1164  * @ioc: per adapter object
1165  * @paddr: virtual address for SGE
1166  *
1167  * Create a zero length scatter gather entry to insure the IOCs hardware has
1168  * something to use if the target device goes brain dead and tries
1169  * to send data even when none is asked for.
1170  *
1171  * Return nothing.
1172  */
1173 static void
1174 _base_build_zero_len_sge(struct MPT3SAS_ADAPTER *ioc, void *paddr)
1175 {
1176         u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
1177             MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
1178             MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
1179             MPI2_SGE_FLAGS_SHIFT);
1180         ioc->base_add_sg_single(paddr, flags_length, -1);
1181 }
1182
1183 /**
1184  * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
1185  * @paddr: virtual address for SGE
1186  * @flags_length: SGE flags and data transfer length
1187  * @dma_addr: Physical address
1188  *
1189  * Return nothing.
1190  */
1191 static void
1192 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1193 {
1194         Mpi2SGESimple32_t *sgel = paddr;
1195
1196         flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
1197             MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1198         sgel->FlagsLength = cpu_to_le32(flags_length);
1199         sgel->Address = cpu_to_le32(dma_addr);
1200 }
1201
1202
1203 /**
1204  * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1205  * @paddr: virtual address for SGE
1206  * @flags_length: SGE flags and data transfer length
1207  * @dma_addr: Physical address
1208  *
1209  * Return nothing.
1210  */
1211 static void
1212 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1213 {
1214         Mpi2SGESimple64_t *sgel = paddr;
1215
1216         flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1217             MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1218         sgel->FlagsLength = cpu_to_le32(flags_length);
1219         sgel->Address = cpu_to_le64(dma_addr);
1220 }
1221
1222 /**
1223  * _base_get_chain_buffer_tracker - obtain chain tracker
1224  * @ioc: per adapter object
1225  * @smid: smid associated to an IO request
1226  *
1227  * Returns chain tracker(from ioc->free_chain_list)
1228  */
1229 static struct chain_tracker *
1230 _base_get_chain_buffer_tracker(struct MPT3SAS_ADAPTER *ioc, u16 smid)
1231 {
1232         struct chain_tracker *chain_req;
1233         unsigned long flags;
1234
1235         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1236         if (list_empty(&ioc->free_chain_list)) {
1237                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1238                 dfailprintk(ioc, pr_warn(MPT3SAS_FMT
1239                         "chain buffers not available\n", ioc->name));
1240                 return NULL;
1241         }
1242         chain_req = list_entry(ioc->free_chain_list.next,
1243             struct chain_tracker, tracker_list);
1244         list_del_init(&chain_req->tracker_list);
1245         list_add_tail(&chain_req->tracker_list,
1246             &ioc->scsi_lookup[smid - 1].chain_list);
1247         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1248         return chain_req;
1249 }
1250
1251
1252 /**
1253  * _base_build_sg - build generic sg
1254  * @ioc: per adapter object
1255  * @psge: virtual address for SGE
1256  * @data_out_dma: physical address for WRITES
1257  * @data_out_sz: data xfer size for WRITES
1258  * @data_in_dma: physical address for READS
1259  * @data_in_sz: data xfer size for READS
1260  *
1261  * Return nothing.
1262  */
1263 static void
1264 _base_build_sg(struct MPT3SAS_ADAPTER *ioc, void *psge,
1265         dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
1266         size_t data_in_sz)
1267 {
1268         u32 sgl_flags;
1269
1270         if (!data_out_sz && !data_in_sz) {
1271                 _base_build_zero_len_sge(ioc, psge);
1272                 return;
1273         }
1274
1275         if (data_out_sz && data_in_sz) {
1276                 /* WRITE sgel first */
1277                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1278                     MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_HOST_TO_IOC);
1279                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1280                 ioc->base_add_sg_single(psge, sgl_flags |
1281                     data_out_sz, data_out_dma);
1282
1283                 /* incr sgel */
1284                 psge += ioc->sge_size;
1285
1286                 /* READ sgel last */
1287                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1288                     MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
1289                     MPI2_SGE_FLAGS_END_OF_LIST);
1290                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1291                 ioc->base_add_sg_single(psge, sgl_flags |
1292                     data_in_sz, data_in_dma);
1293         } else if (data_out_sz) /* WRITE */ {
1294                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1295                     MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
1296                     MPI2_SGE_FLAGS_END_OF_LIST | MPI2_SGE_FLAGS_HOST_TO_IOC);
1297                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1298                 ioc->base_add_sg_single(psge, sgl_flags |
1299                     data_out_sz, data_out_dma);
1300         } else if (data_in_sz) /* READ */ {
1301                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1302                     MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
1303                     MPI2_SGE_FLAGS_END_OF_LIST);
1304                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1305                 ioc->base_add_sg_single(psge, sgl_flags |
1306                     data_in_sz, data_in_dma);
1307         }
1308 }
1309
1310 /* IEEE format sgls */
1311
1312 /**
1313  * _base_add_sg_single_ieee - add sg element for IEEE format
1314  * @paddr: virtual address for SGE
1315  * @flags: SGE flags
1316  * @chain_offset: number of 128 byte elements from start of segment
1317  * @length: data transfer length
1318  * @dma_addr: Physical address
1319  *
1320  * Return nothing.
1321  */
1322 static void
1323 _base_add_sg_single_ieee(void *paddr, u8 flags, u8 chain_offset, u32 length,
1324         dma_addr_t dma_addr)
1325 {
1326         Mpi25IeeeSgeChain64_t *sgel = paddr;
1327
1328         sgel->Flags = flags;
1329         sgel->NextChainOffset = chain_offset;
1330         sgel->Length = cpu_to_le32(length);
1331         sgel->Address = cpu_to_le64(dma_addr);
1332 }
1333
1334 /**
1335  * _base_build_zero_len_sge_ieee - build zero length sg entry for IEEE format
1336  * @ioc: per adapter object
1337  * @paddr: virtual address for SGE
1338  *
1339  * Create a zero length scatter gather entry to insure the IOCs hardware has
1340  * something to use if the target device goes brain dead and tries
1341  * to send data even when none is asked for.
1342  *
1343  * Return nothing.
1344  */
1345 static void
1346 _base_build_zero_len_sge_ieee(struct MPT3SAS_ADAPTER *ioc, void *paddr)
1347 {
1348         u8 sgl_flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1349                 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR |
1350                 MPI25_IEEE_SGE_FLAGS_END_OF_LIST);
1351         _base_add_sg_single_ieee(paddr, sgl_flags, 0, 0, -1);
1352 }
1353
1354 /**
1355  * _base_build_sg_scmd - main sg creation routine
1356  * @ioc: per adapter object
1357  * @scmd: scsi command
1358  * @smid: system request message index
1359  * Context: none.
1360  *
1361  * The main routine that builds scatter gather table from a given
1362  * scsi request sent via the .queuecommand main handler.
1363  *
1364  * Returns 0 success, anything else error
1365  */
1366 static int
1367 _base_build_sg_scmd(struct MPT3SAS_ADAPTER *ioc,
1368                 struct scsi_cmnd *scmd, u16 smid)
1369 {
1370         Mpi2SCSIIORequest_t *mpi_request;
1371         dma_addr_t chain_dma;
1372         struct scatterlist *sg_scmd;
1373         void *sg_local, *chain;
1374         u32 chain_offset;
1375         u32 chain_length;
1376         u32 chain_flags;
1377         int sges_left;
1378         u32 sges_in_segment;
1379         u32 sgl_flags;
1380         u32 sgl_flags_last_element;
1381         u32 sgl_flags_end_buffer;
1382         struct chain_tracker *chain_req;
1383
1384         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
1385
1386         /* init scatter gather flags */
1387         sgl_flags = MPI2_SGE_FLAGS_SIMPLE_ELEMENT;
1388         if (scmd->sc_data_direction == DMA_TO_DEVICE)
1389                 sgl_flags |= MPI2_SGE_FLAGS_HOST_TO_IOC;
1390         sgl_flags_last_element = (sgl_flags | MPI2_SGE_FLAGS_LAST_ELEMENT)
1391             << MPI2_SGE_FLAGS_SHIFT;
1392         sgl_flags_end_buffer = (sgl_flags | MPI2_SGE_FLAGS_LAST_ELEMENT |
1393             MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST)
1394             << MPI2_SGE_FLAGS_SHIFT;
1395         sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1396
1397         sg_scmd = scsi_sglist(scmd);
1398         sges_left = scsi_dma_map(scmd);
1399         if (sges_left < 0) {
1400                 sdev_printk(KERN_ERR, scmd->device,
1401                  "pci_map_sg failed: request for %d bytes!\n",
1402                  scsi_bufflen(scmd));
1403                 return -ENOMEM;
1404         }
1405
1406         sg_local = &mpi_request->SGL;
1407         sges_in_segment = ioc->max_sges_in_main_message;
1408         if (sges_left <= sges_in_segment)
1409                 goto fill_in_last_segment;
1410
1411         mpi_request->ChainOffset = (offsetof(Mpi2SCSIIORequest_t, SGL) +
1412             (sges_in_segment * ioc->sge_size))/4;
1413
1414         /* fill in main message segment when there is a chain following */
1415         while (sges_in_segment) {
1416                 if (sges_in_segment == 1)
1417                         ioc->base_add_sg_single(sg_local,
1418                             sgl_flags_last_element | sg_dma_len(sg_scmd),
1419                             sg_dma_address(sg_scmd));
1420                 else
1421                         ioc->base_add_sg_single(sg_local, sgl_flags |
1422                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1423                 sg_scmd = sg_next(sg_scmd);
1424                 sg_local += ioc->sge_size;
1425                 sges_left--;
1426                 sges_in_segment--;
1427         }
1428
1429         /* initializing the chain flags and pointers */
1430         chain_flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT << MPI2_SGE_FLAGS_SHIFT;
1431         chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1432         if (!chain_req)
1433                 return -1;
1434         chain = chain_req->chain_buffer;
1435         chain_dma = chain_req->chain_buffer_dma;
1436         do {
1437                 sges_in_segment = (sges_left <=
1438                     ioc->max_sges_in_chain_message) ? sges_left :
1439                     ioc->max_sges_in_chain_message;
1440                 chain_offset = (sges_left == sges_in_segment) ?
1441                     0 : (sges_in_segment * ioc->sge_size)/4;
1442                 chain_length = sges_in_segment * ioc->sge_size;
1443                 if (chain_offset) {
1444                         chain_offset = chain_offset <<
1445                             MPI2_SGE_CHAIN_OFFSET_SHIFT;
1446                         chain_length += ioc->sge_size;
1447                 }
1448                 ioc->base_add_sg_single(sg_local, chain_flags | chain_offset |
1449                     chain_length, chain_dma);
1450                 sg_local = chain;
1451                 if (!chain_offset)
1452                         goto fill_in_last_segment;
1453
1454                 /* fill in chain segments */
1455                 while (sges_in_segment) {
1456                         if (sges_in_segment == 1)
1457                                 ioc->base_add_sg_single(sg_local,
1458                                     sgl_flags_last_element |
1459                                     sg_dma_len(sg_scmd),
1460                                     sg_dma_address(sg_scmd));
1461                         else
1462                                 ioc->base_add_sg_single(sg_local, sgl_flags |
1463                                     sg_dma_len(sg_scmd),
1464                                     sg_dma_address(sg_scmd));
1465                         sg_scmd = sg_next(sg_scmd);
1466                         sg_local += ioc->sge_size;
1467                         sges_left--;
1468                         sges_in_segment--;
1469                 }
1470
1471                 chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1472                 if (!chain_req)
1473                         return -1;
1474                 chain = chain_req->chain_buffer;
1475                 chain_dma = chain_req->chain_buffer_dma;
1476         } while (1);
1477
1478
1479  fill_in_last_segment:
1480
1481         /* fill the last segment */
1482         while (sges_left) {
1483                 if (sges_left == 1)
1484                         ioc->base_add_sg_single(sg_local, sgl_flags_end_buffer |
1485                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1486                 else
1487                         ioc->base_add_sg_single(sg_local, sgl_flags |
1488                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1489                 sg_scmd = sg_next(sg_scmd);
1490                 sg_local += ioc->sge_size;
1491                 sges_left--;
1492         }
1493
1494         return 0;
1495 }
1496
1497 /**
1498  * _base_build_sg_scmd_ieee - main sg creation routine for IEEE format
1499  * @ioc: per adapter object
1500  * @scmd: scsi command
1501  * @smid: system request message index
1502  * Context: none.
1503  *
1504  * The main routine that builds scatter gather table from a given
1505  * scsi request sent via the .queuecommand main handler.
1506  *
1507  * Returns 0 success, anything else error
1508  */
1509 static int
1510 _base_build_sg_scmd_ieee(struct MPT3SAS_ADAPTER *ioc,
1511         struct scsi_cmnd *scmd, u16 smid)
1512 {
1513         Mpi2SCSIIORequest_t *mpi_request;
1514         dma_addr_t chain_dma;
1515         struct scatterlist *sg_scmd;
1516         void *sg_local, *chain;
1517         u32 chain_offset;
1518         u32 chain_length;
1519         int sges_left;
1520         u32 sges_in_segment;
1521         u8 simple_sgl_flags;
1522         u8 simple_sgl_flags_last;
1523         u8 chain_sgl_flags;
1524         struct chain_tracker *chain_req;
1525
1526         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
1527
1528         /* init scatter gather flags */
1529         simple_sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1530             MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1531         simple_sgl_flags_last = simple_sgl_flags |
1532             MPI25_IEEE_SGE_FLAGS_END_OF_LIST;
1533         chain_sgl_flags = MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT |
1534             MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1535
1536         sg_scmd = scsi_sglist(scmd);
1537         sges_left = scsi_dma_map(scmd);
1538         if (sges_left < 0) {
1539                 sdev_printk(KERN_ERR, scmd->device,
1540                         "pci_map_sg failed: request for %d bytes!\n",
1541                         scsi_bufflen(scmd));
1542                 return -ENOMEM;
1543         }
1544
1545         sg_local = &mpi_request->SGL;
1546         sges_in_segment = (ioc->request_sz -
1547             offsetof(Mpi2SCSIIORequest_t, SGL))/ioc->sge_size_ieee;
1548         if (sges_left <= sges_in_segment)
1549                 goto fill_in_last_segment;
1550
1551         mpi_request->ChainOffset = (sges_in_segment - 1 /* chain element */) +
1552             (offsetof(Mpi2SCSIIORequest_t, SGL)/ioc->sge_size_ieee);
1553
1554         /* fill in main message segment when there is a chain following */
1555         while (sges_in_segment > 1) {
1556                 _base_add_sg_single_ieee(sg_local, simple_sgl_flags, 0,
1557                     sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1558                 sg_scmd = sg_next(sg_scmd);
1559                 sg_local += ioc->sge_size_ieee;
1560                 sges_left--;
1561                 sges_in_segment--;
1562         }
1563
1564         /* initializing the pointers */
1565         chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1566         if (!chain_req)
1567                 return -1;
1568         chain = chain_req->chain_buffer;
1569         chain_dma = chain_req->chain_buffer_dma;
1570         do {
1571                 sges_in_segment = (sges_left <=
1572                     ioc->max_sges_in_chain_message) ? sges_left :
1573                     ioc->max_sges_in_chain_message;
1574                 chain_offset = (sges_left == sges_in_segment) ?
1575                     0 : sges_in_segment;
1576                 chain_length = sges_in_segment * ioc->sge_size_ieee;
1577                 if (chain_offset)
1578                         chain_length += ioc->sge_size_ieee;
1579                 _base_add_sg_single_ieee(sg_local, chain_sgl_flags,
1580                     chain_offset, chain_length, chain_dma);
1581
1582                 sg_local = chain;
1583                 if (!chain_offset)
1584                         goto fill_in_last_segment;
1585
1586                 /* fill in chain segments */
1587                 while (sges_in_segment) {
1588                         _base_add_sg_single_ieee(sg_local, simple_sgl_flags, 0,
1589                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1590                         sg_scmd = sg_next(sg_scmd);
1591                         sg_local += ioc->sge_size_ieee;
1592                         sges_left--;
1593                         sges_in_segment--;
1594                 }
1595
1596                 chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1597                 if (!chain_req)
1598                         return -1;
1599                 chain = chain_req->chain_buffer;
1600                 chain_dma = chain_req->chain_buffer_dma;
1601         } while (1);
1602
1603
1604  fill_in_last_segment:
1605
1606         /* fill the last segment */
1607         while (sges_left > 0) {
1608                 if (sges_left == 1)
1609                         _base_add_sg_single_ieee(sg_local,
1610                             simple_sgl_flags_last, 0, sg_dma_len(sg_scmd),
1611                             sg_dma_address(sg_scmd));
1612                 else
1613                         _base_add_sg_single_ieee(sg_local, simple_sgl_flags, 0,
1614                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1615                 sg_scmd = sg_next(sg_scmd);
1616                 sg_local += ioc->sge_size_ieee;
1617                 sges_left--;
1618         }
1619
1620         return 0;
1621 }
1622
1623 /**
1624  * _base_build_sg_ieee - build generic sg for IEEE format
1625  * @ioc: per adapter object
1626  * @psge: virtual address for SGE
1627  * @data_out_dma: physical address for WRITES
1628  * @data_out_sz: data xfer size for WRITES
1629  * @data_in_dma: physical address for READS
1630  * @data_in_sz: data xfer size for READS
1631  *
1632  * Return nothing.
1633  */
1634 static void
1635 _base_build_sg_ieee(struct MPT3SAS_ADAPTER *ioc, void *psge,
1636         dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
1637         size_t data_in_sz)
1638 {
1639         u8 sgl_flags;
1640
1641         if (!data_out_sz && !data_in_sz) {
1642                 _base_build_zero_len_sge_ieee(ioc, psge);
1643                 return;
1644         }
1645
1646         if (data_out_sz && data_in_sz) {
1647                 /* WRITE sgel first */
1648                 sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1649                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1650                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_out_sz,
1651                     data_out_dma);
1652
1653                 /* incr sgel */
1654                 psge += ioc->sge_size_ieee;
1655
1656                 /* READ sgel last */
1657                 sgl_flags |= MPI25_IEEE_SGE_FLAGS_END_OF_LIST;
1658                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_in_sz,
1659                     data_in_dma);
1660         } else if (data_out_sz) /* WRITE */ {
1661                 sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1662                     MPI25_IEEE_SGE_FLAGS_END_OF_LIST |
1663                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1664                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_out_sz,
1665                     data_out_dma);
1666         } else if (data_in_sz) /* READ */ {
1667                 sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1668                     MPI25_IEEE_SGE_FLAGS_END_OF_LIST |
1669                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1670                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_in_sz,
1671                     data_in_dma);
1672         }
1673 }
1674
1675 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1676
1677 /**
1678  * _base_config_dma_addressing - set dma addressing
1679  * @ioc: per adapter object
1680  * @pdev: PCI device struct
1681  *
1682  * Returns 0 for success, non-zero for failure.
1683  */
1684 static int
1685 _base_config_dma_addressing(struct MPT3SAS_ADAPTER *ioc, struct pci_dev *pdev)
1686 {
1687         struct sysinfo s;
1688         u64 consistent_dma_mask;
1689         /* Set 63 bit DMA mask for all SAS3 and SAS35 controllers */
1690         int dma_mask = (ioc->hba_mpi_version_belonged > MPI2_VERSION) ? 63 : 64;
1691
1692         if (ioc->dma_mask)
1693                 consistent_dma_mask = DMA_BIT_MASK(dma_mask);
1694         else
1695                 consistent_dma_mask = DMA_BIT_MASK(32);
1696
1697         if (sizeof(dma_addr_t) > 4) {
1698                 const uint64_t required_mask =
1699                     dma_get_required_mask(&pdev->dev);
1700                 if ((required_mask > DMA_BIT_MASK(32)) &&
1701                     !pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_mask)) &&
1702                     !pci_set_consistent_dma_mask(pdev, consistent_dma_mask)) {
1703                         ioc->base_add_sg_single = &_base_add_sg_single_64;
1704                         ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1705                         ioc->dma_mask = dma_mask;
1706                         goto out;
1707                 }
1708         }
1709
1710         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1711             && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1712                 ioc->base_add_sg_single = &_base_add_sg_single_32;
1713                 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1714                 ioc->dma_mask = 32;
1715         } else
1716                 return -ENODEV;
1717
1718  out:
1719         si_meminfo(&s);
1720         pr_info(MPT3SAS_FMT
1721                 "%d BIT PCI BUS DMA ADDRESSING SUPPORTED, total mem (%ld kB)\n",
1722                 ioc->name, ioc->dma_mask, convert_to_kb(s.totalram));
1723
1724         return 0;
1725 }
1726
1727 static int
1728 _base_change_consistent_dma_mask(struct MPT3SAS_ADAPTER *ioc,
1729                                       struct pci_dev *pdev)
1730 {
1731         if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(ioc->dma_mask))) {
1732                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
1733                         return -ENODEV;
1734         }
1735         return 0;
1736 }
1737
1738 /**
1739  * _base_check_enable_msix - checks MSIX capabable.
1740  * @ioc: per adapter object
1741  *
1742  * Check to see if card is capable of MSIX, and set number
1743  * of available msix vectors
1744  */
1745 static int
1746 _base_check_enable_msix(struct MPT3SAS_ADAPTER *ioc)
1747 {
1748         int base;
1749         u16 message_control;
1750
1751         /* Check whether controller SAS2008 B0 controller,
1752          * if it is SAS2008 B0 controller use IO-APIC instead of MSIX
1753          */
1754         if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
1755             ioc->pdev->revision == SAS2_PCI_DEVICE_B0_REVISION) {
1756                 return -EINVAL;
1757         }
1758
1759         base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1760         if (!base) {
1761                 dfailprintk(ioc, pr_info(MPT3SAS_FMT "msix not supported\n",
1762                         ioc->name));
1763                 return -EINVAL;
1764         }
1765
1766         /* get msix vector count */
1767         /* NUMA_IO not supported for older controllers */
1768         if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
1769             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
1770             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
1771             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
1772             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
1773             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
1774             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
1775                 ioc->msix_vector_count = 1;
1776         else {
1777                 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1778                 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1779         }
1780         dinitprintk(ioc, pr_info(MPT3SAS_FMT
1781                 "msix is supported, vector_count(%d)\n",
1782                 ioc->name, ioc->msix_vector_count));
1783         return 0;
1784 }
1785
1786 /**
1787  * _base_free_irq - free irq
1788  * @ioc: per adapter object
1789  *
1790  * Freeing respective reply_queue from the list.
1791  */
1792 static void
1793 _base_free_irq(struct MPT3SAS_ADAPTER *ioc)
1794 {
1795         struct adapter_reply_queue *reply_q, *next;
1796
1797         if (list_empty(&ioc->reply_queue_list))
1798                 return;
1799
1800         list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
1801                 list_del(&reply_q->list);
1802                 irq_set_affinity_hint(reply_q->vector, NULL);
1803                 free_cpumask_var(reply_q->affinity_hint);
1804                 synchronize_irq(reply_q->vector);
1805                 free_irq(reply_q->vector, reply_q);
1806                 kfree(reply_q);
1807         }
1808 }
1809
1810 /**
1811  * _base_request_irq - request irq
1812  * @ioc: per adapter object
1813  * @index: msix index into vector table
1814  * @vector: irq vector
1815  *
1816  * Inserting respective reply_queue into the list.
1817  */
1818 static int
1819 _base_request_irq(struct MPT3SAS_ADAPTER *ioc, u8 index, u32 vector)
1820 {
1821         struct adapter_reply_queue *reply_q;
1822         int r;
1823
1824         reply_q =  kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
1825         if (!reply_q) {
1826                 pr_err(MPT3SAS_FMT "unable to allocate memory %d!\n",
1827                     ioc->name, (int)sizeof(struct adapter_reply_queue));
1828                 return -ENOMEM;
1829         }
1830         reply_q->ioc = ioc;
1831         reply_q->msix_index = index;
1832         reply_q->vector = vector;
1833
1834         if (!alloc_cpumask_var(&reply_q->affinity_hint, GFP_KERNEL))
1835                 return -ENOMEM;
1836         cpumask_clear(reply_q->affinity_hint);
1837
1838         atomic_set(&reply_q->busy, 0);
1839         if (ioc->msix_enable)
1840                 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
1841                     ioc->driver_name, ioc->id, index);
1842         else
1843                 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
1844                     ioc->driver_name, ioc->id);
1845         r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
1846             reply_q);
1847         if (r) {
1848                 pr_err(MPT3SAS_FMT "unable to allocate interrupt %d!\n",
1849                     reply_q->name, vector);
1850                 kfree(reply_q);
1851                 return -EBUSY;
1852         }
1853
1854         INIT_LIST_HEAD(&reply_q->list);
1855         list_add_tail(&reply_q->list, &ioc->reply_queue_list);
1856         return 0;
1857 }
1858
1859 /**
1860  * _base_assign_reply_queues - assigning msix index for each cpu
1861  * @ioc: per adapter object
1862  *
1863  * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
1864  *
1865  * It would nice if we could call irq_set_affinity, however it is not
1866  * an exported symbol
1867  */
1868 static void
1869 _base_assign_reply_queues(struct MPT3SAS_ADAPTER *ioc)
1870 {
1871         unsigned int cpu, nr_cpus, nr_msix, index = 0;
1872         struct adapter_reply_queue *reply_q;
1873
1874         if (!_base_is_controller_msix_enabled(ioc))
1875                 return;
1876
1877         memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
1878
1879         nr_cpus = num_online_cpus();
1880         nr_msix = ioc->reply_queue_count = min(ioc->reply_queue_count,
1881                                                ioc->facts.MaxMSIxVectors);
1882         if (!nr_msix)
1883                 return;
1884
1885         cpu = cpumask_first(cpu_online_mask);
1886
1887         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1888
1889                 unsigned int i, group = nr_cpus / nr_msix;
1890
1891                 if (cpu >= nr_cpus)
1892                         break;
1893
1894                 if (index < nr_cpus % nr_msix)
1895                         group++;
1896
1897                 for (i = 0 ; i < group ; i++) {
1898                         ioc->cpu_msix_table[cpu] = index;
1899                         cpumask_or(reply_q->affinity_hint,
1900                                    reply_q->affinity_hint, get_cpu_mask(cpu));
1901                         cpu = cpumask_next(cpu, cpu_online_mask);
1902                 }
1903
1904                 if (irq_set_affinity_hint(reply_q->vector,
1905                                            reply_q->affinity_hint))
1906                         dinitprintk(ioc, pr_info(MPT3SAS_FMT
1907                             "error setting affinity hint for irq vector %d\n",
1908                             ioc->name, reply_q->vector));
1909                 index++;
1910         }
1911 }
1912
1913 /**
1914  * _base_disable_msix - disables msix
1915  * @ioc: per adapter object
1916  *
1917  */
1918 static void
1919 _base_disable_msix(struct MPT3SAS_ADAPTER *ioc)
1920 {
1921         if (!ioc->msix_enable)
1922                 return;
1923         pci_disable_msix(ioc->pdev);
1924         ioc->msix_enable = 0;
1925 }
1926
1927 /**
1928  * _base_enable_msix - enables msix, failback to io_apic
1929  * @ioc: per adapter object
1930  *
1931  */
1932 static int
1933 _base_enable_msix(struct MPT3SAS_ADAPTER *ioc)
1934 {
1935         struct msix_entry *entries, *a;
1936         int r;
1937         int i;
1938         u8 try_msix = 0;
1939
1940         if (msix_disable == -1 || msix_disable == 0)
1941                 try_msix = 1;
1942
1943         if (!try_msix)
1944                 goto try_ioapic;
1945
1946         if (_base_check_enable_msix(ioc) != 0)
1947                 goto try_ioapic;
1948
1949         ioc->reply_queue_count = min_t(int, ioc->cpu_count,
1950             ioc->msix_vector_count);
1951
1952         printk(MPT3SAS_FMT "MSI-X vectors supported: %d, no of cores"
1953           ": %d, max_msix_vectors: %d\n", ioc->name, ioc->msix_vector_count,
1954           ioc->cpu_count, max_msix_vectors);
1955
1956         if (!ioc->rdpq_array_enable && max_msix_vectors == -1)
1957                 max_msix_vectors = 8;
1958
1959         if (max_msix_vectors > 0) {
1960                 ioc->reply_queue_count = min_t(int, max_msix_vectors,
1961                         ioc->reply_queue_count);
1962                 ioc->msix_vector_count = ioc->reply_queue_count;
1963         } else if (max_msix_vectors == 0)
1964                 goto try_ioapic;
1965
1966         entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
1967             GFP_KERNEL);
1968         if (!entries) {
1969                 dfailprintk(ioc, pr_info(MPT3SAS_FMT
1970                         "kcalloc failed @ at %s:%d/%s() !!!\n",
1971                         ioc->name, __FILE__, __LINE__, __func__));
1972                 goto try_ioapic;
1973         }
1974
1975         for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
1976                 a->entry = i;
1977
1978         r = pci_enable_msix_exact(ioc->pdev, entries, ioc->reply_queue_count);
1979         if (r) {
1980                 dfailprintk(ioc, pr_info(MPT3SAS_FMT
1981                         "pci_enable_msix_exact failed (r=%d) !!!\n",
1982                         ioc->name, r));
1983                 kfree(entries);
1984                 goto try_ioapic;
1985         }
1986
1987         ioc->msix_enable = 1;
1988         for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
1989                 r = _base_request_irq(ioc, i, a->vector);
1990                 if (r) {
1991                         _base_free_irq(ioc);
1992                         _base_disable_msix(ioc);
1993                         kfree(entries);
1994                         goto try_ioapic;
1995                 }
1996         }
1997
1998         kfree(entries);
1999         return 0;
2000
2001 /* failback to io_apic interrupt routing */
2002  try_ioapic:
2003
2004         ioc->reply_queue_count = 1;
2005         r = _base_request_irq(ioc, 0, ioc->pdev->irq);
2006
2007         return r;
2008 }
2009
2010 /**
2011  * mpt3sas_base_unmap_resources - free controller resources
2012  * @ioc: per adapter object
2013  */
2014 void
2015 mpt3sas_base_unmap_resources(struct MPT3SAS_ADAPTER *ioc)
2016 {
2017         struct pci_dev *pdev = ioc->pdev;
2018
2019         dexitprintk(ioc, printk(MPT3SAS_FMT "%s\n",
2020                 ioc->name, __func__));
2021
2022         _base_free_irq(ioc);
2023         _base_disable_msix(ioc);
2024
2025         if (ioc->msix96_vector) {
2026                 kfree(ioc->replyPostRegisterIndex);
2027                 ioc->replyPostRegisterIndex = NULL;
2028         }
2029
2030         if (ioc->chip_phys) {
2031                 iounmap(ioc->chip);
2032                 ioc->chip_phys = 0;
2033         }
2034
2035         if (pci_is_enabled(pdev)) {
2036                 pci_release_selected_regions(ioc->pdev, ioc->bars);
2037                 pci_disable_pcie_error_reporting(pdev);
2038                 pci_disable_device(pdev);
2039         }
2040 }
2041
2042 /**
2043  * mpt3sas_base_map_resources - map in controller resources (io/irq/memap)
2044  * @ioc: per adapter object
2045  *
2046  * Returns 0 for success, non-zero for failure.
2047  */
2048 int
2049 mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc)
2050 {
2051         struct pci_dev *pdev = ioc->pdev;
2052         u32 memap_sz;
2053         u32 pio_sz;
2054         int i, r = 0;
2055         u64 pio_chip = 0;
2056         u64 chip_phys = 0;
2057         struct adapter_reply_queue *reply_q;
2058
2059         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n",
2060             ioc->name, __func__));
2061
2062         ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
2063         if (pci_enable_device_mem(pdev)) {
2064                 pr_warn(MPT3SAS_FMT "pci_enable_device_mem: failed\n",
2065                         ioc->name);
2066                 ioc->bars = 0;
2067                 return -ENODEV;
2068         }
2069
2070
2071         if (pci_request_selected_regions(pdev, ioc->bars,
2072             ioc->driver_name)) {
2073                 pr_warn(MPT3SAS_FMT "pci_request_selected_regions: failed\n",
2074                         ioc->name);
2075                 ioc->bars = 0;
2076                 r = -ENODEV;
2077                 goto out_fail;
2078         }
2079
2080 /* AER (Advanced Error Reporting) hooks */
2081         pci_enable_pcie_error_reporting(pdev);
2082
2083         pci_set_master(pdev);
2084
2085
2086         if (_base_config_dma_addressing(ioc, pdev) != 0) {
2087                 pr_warn(MPT3SAS_FMT "no suitable DMA mask for %s\n",
2088                     ioc->name, pci_name(pdev));
2089                 r = -ENODEV;
2090                 goto out_fail;
2091         }
2092
2093         for (i = 0, memap_sz = 0, pio_sz = 0; (i < DEVICE_COUNT_RESOURCE) &&
2094              (!memap_sz || !pio_sz); i++) {
2095                 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
2096                         if (pio_sz)
2097                                 continue;
2098                         pio_chip = (u64)pci_resource_start(pdev, i);
2099                         pio_sz = pci_resource_len(pdev, i);
2100                 } else if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
2101                         if (memap_sz)
2102                                 continue;
2103                         ioc->chip_phys = pci_resource_start(pdev, i);
2104                         chip_phys = (u64)ioc->chip_phys;
2105                         memap_sz = pci_resource_len(pdev, i);
2106                         ioc->chip = ioremap(ioc->chip_phys, memap_sz);
2107                 }
2108         }
2109
2110         if (ioc->chip == NULL) {
2111                 pr_err(MPT3SAS_FMT "unable to map adapter memory! "
2112                         " or resource not found\n", ioc->name);
2113                 r = -EINVAL;
2114                 goto out_fail;
2115         }
2116
2117         _base_mask_interrupts(ioc);
2118
2119         r = _base_get_ioc_facts(ioc, CAN_SLEEP);
2120         if (r)
2121                 goto out_fail;
2122
2123         if (!ioc->rdpq_array_enable_assigned) {
2124                 ioc->rdpq_array_enable = ioc->rdpq_array_capable;
2125                 ioc->rdpq_array_enable_assigned = 1;
2126         }
2127
2128         r = _base_enable_msix(ioc);
2129         if (r)
2130                 goto out_fail;
2131
2132         /* Use the Combined reply queue feature only for SAS3 C0 & higher
2133          * revision HBAs and also only when reply queue count is greater than 8
2134          */
2135         if (ioc->msix96_vector && ioc->reply_queue_count > 8) {
2136                 /* Determine the Supplemental Reply Post Host Index Registers
2137                  * Addresse. Supplemental Reply Post Host Index Registers
2138                  * starts at offset MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET and
2139                  * each register is at offset bytes of
2140                  * MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET from previous one.
2141                  */
2142                 ioc->replyPostRegisterIndex = kcalloc(
2143                      MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT,
2144                      sizeof(resource_size_t *), GFP_KERNEL);
2145                 if (!ioc->replyPostRegisterIndex) {
2146                         dfailprintk(ioc, printk(MPT3SAS_FMT
2147                         "allocation for reply Post Register Index failed!!!\n",
2148                                                                    ioc->name));
2149                         r = -ENOMEM;
2150                         goto out_fail;
2151                 }
2152
2153                 for (i = 0; i < MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT; i++) {
2154                         ioc->replyPostRegisterIndex[i] = (resource_size_t *)
2155                              ((u8 *)&ioc->chip->Doorbell +
2156                              MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET +
2157                              (i * MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET));
2158                 }
2159         } else
2160                 ioc->msix96_vector = 0;
2161
2162         if (ioc->is_warpdrive) {
2163                 ioc->reply_post_host_index[0] = (resource_size_t __iomem *)
2164                     &ioc->chip->ReplyPostHostIndex;
2165
2166                 for (i = 1; i < ioc->cpu_msix_table_sz; i++)
2167                         ioc->reply_post_host_index[i] =
2168                         (resource_size_t __iomem *)
2169                         ((u8 __iomem *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
2170                         * 4)));
2171         }
2172
2173         list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
2174                 pr_info(MPT3SAS_FMT "%s: IRQ %d\n",
2175                     reply_q->name,  ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
2176                     "IO-APIC enabled"), reply_q->vector);
2177
2178         pr_info(MPT3SAS_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
2179             ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
2180         pr_info(MPT3SAS_FMT "ioport(0x%016llx), size(%d)\n",
2181             ioc->name, (unsigned long long)pio_chip, pio_sz);
2182
2183         /* Save PCI configuration state for recovery from PCI AER/EEH errors */
2184         pci_save_state(pdev);
2185         return 0;
2186
2187  out_fail:
2188         mpt3sas_base_unmap_resources(ioc);
2189         return r;
2190 }
2191
2192 /**
2193  * mpt3sas_base_get_msg_frame - obtain request mf pointer
2194  * @ioc: per adapter object
2195  * @smid: system request message index(smid zero is invalid)
2196  *
2197  * Returns virt pointer to message frame.
2198  */
2199 void *
2200 mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2201 {
2202         return (void *)(ioc->request + (smid * ioc->request_sz));
2203 }
2204
2205 /**
2206  * mpt3sas_base_get_sense_buffer - obtain a sense buffer virt addr
2207  * @ioc: per adapter object
2208  * @smid: system request message index
2209  *
2210  * Returns virt pointer to sense buffer.
2211  */
2212 void *
2213 mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2214 {
2215         return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
2216 }
2217
2218 /**
2219  * mpt3sas_base_get_sense_buffer_dma - obtain a sense buffer dma addr
2220  * @ioc: per adapter object
2221  * @smid: system request message index
2222  *
2223  * Returns phys pointer to the low 32bit address of the sense buffer.
2224  */
2225 __le32
2226 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2227 {
2228         return cpu_to_le32(ioc->sense_dma + ((smid - 1) *
2229             SCSI_SENSE_BUFFERSIZE));
2230 }
2231
2232 /**
2233  * mpt3sas_base_get_reply_virt_addr - obtain reply frames virt address
2234  * @ioc: per adapter object
2235  * @phys_addr: lower 32 physical addr of the reply
2236  *
2237  * Converts 32bit lower physical addr into a virt address.
2238  */
2239 void *
2240 mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc, u32 phys_addr)
2241 {
2242         if (!phys_addr)
2243                 return NULL;
2244         return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
2245 }
2246
2247 static inline u8
2248 _base_get_msix_index(struct MPT3SAS_ADAPTER *ioc)
2249 {
2250         return ioc->cpu_msix_table[raw_smp_processor_id()];
2251 }
2252
2253 /**
2254  * mpt3sas_base_get_smid - obtain a free smid from internal queue
2255  * @ioc: per adapter object
2256  * @cb_idx: callback index
2257  *
2258  * Returns smid (zero is invalid)
2259  */
2260 u16
2261 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx)
2262 {
2263         unsigned long flags;
2264         struct request_tracker *request;
2265         u16 smid;
2266
2267         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2268         if (list_empty(&ioc->internal_free_list)) {
2269                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2270                 pr_err(MPT3SAS_FMT "%s: smid not available\n",
2271                     ioc->name, __func__);
2272                 return 0;
2273         }
2274
2275         request = list_entry(ioc->internal_free_list.next,
2276             struct request_tracker, tracker_list);
2277         request->cb_idx = cb_idx;
2278         smid = request->smid;
2279         list_del(&request->tracker_list);
2280         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2281         return smid;
2282 }
2283
2284 /**
2285  * mpt3sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
2286  * @ioc: per adapter object
2287  * @cb_idx: callback index
2288  * @scmd: pointer to scsi command object
2289  *
2290  * Returns smid (zero is invalid)
2291  */
2292 u16
2293 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
2294         struct scsi_cmnd *scmd)
2295 {
2296         unsigned long flags;
2297         struct scsiio_tracker *request;
2298         u16 smid;
2299
2300         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2301         if (list_empty(&ioc->free_list)) {
2302                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2303                 pr_err(MPT3SAS_FMT "%s: smid not available\n",
2304                     ioc->name, __func__);
2305                 return 0;
2306         }
2307
2308         request = list_entry(ioc->free_list.next,
2309             struct scsiio_tracker, tracker_list);
2310         request->scmd = scmd;
2311         request->cb_idx = cb_idx;
2312         smid = request->smid;
2313         request->msix_io = _base_get_msix_index(ioc);
2314         list_del(&request->tracker_list);
2315         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2316         return smid;
2317 }
2318
2319 /**
2320  * mpt3sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
2321  * @ioc: per adapter object
2322  * @cb_idx: callback index
2323  *
2324  * Returns smid (zero is invalid)
2325  */
2326 u16
2327 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx)
2328 {
2329         unsigned long flags;
2330         struct request_tracker *request;
2331         u16 smid;
2332
2333         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2334         if (list_empty(&ioc->hpr_free_list)) {
2335                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2336                 return 0;
2337         }
2338
2339         request = list_entry(ioc->hpr_free_list.next,
2340             struct request_tracker, tracker_list);
2341         request->cb_idx = cb_idx;
2342         smid = request->smid;
2343         list_del(&request->tracker_list);
2344         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2345         return smid;
2346 }
2347
2348 /**
2349  * mpt3sas_base_free_smid - put smid back on free_list
2350  * @ioc: per adapter object
2351  * @smid: system request message index
2352  *
2353  * Return nothing.
2354  */
2355 void
2356 mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2357 {
2358         unsigned long flags;
2359         int i;
2360         struct chain_tracker *chain_req, *next;
2361
2362         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2363         if (smid < ioc->hi_priority_smid) {
2364                 /* scsiio queue */
2365                 i = smid - 1;
2366                 if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
2367                         list_for_each_entry_safe(chain_req, next,
2368                             &ioc->scsi_lookup[i].chain_list, tracker_list) {
2369                                 list_del_init(&chain_req->tracker_list);
2370                                 list_add(&chain_req->tracker_list,
2371                                     &ioc->free_chain_list);
2372                         }
2373                 }
2374                 ioc->scsi_lookup[i].cb_idx = 0xFF;
2375                 ioc->scsi_lookup[i].scmd = NULL;
2376                 ioc->scsi_lookup[i].direct_io = 0;
2377                 list_add(&ioc->scsi_lookup[i].tracker_list, &ioc->free_list);
2378                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2379
2380                 /*
2381                  * See _wait_for_commands_to_complete() call with regards
2382                  * to this code.
2383                  */
2384                 if (ioc->shost_recovery && ioc->pending_io_count) {
2385                         if (ioc->pending_io_count == 1)
2386                                 wake_up(&ioc->reset_wq);
2387                         ioc->pending_io_count--;
2388                 }
2389                 return;
2390         } else if (smid < ioc->internal_smid) {
2391                 /* hi-priority */
2392                 i = smid - ioc->hi_priority_smid;
2393                 ioc->hpr_lookup[i].cb_idx = 0xFF;
2394                 list_add(&ioc->hpr_lookup[i].tracker_list, &ioc->hpr_free_list);
2395         } else if (smid <= ioc->hba_queue_depth) {
2396                 /* internal queue */
2397                 i = smid - ioc->internal_smid;
2398                 ioc->internal_lookup[i].cb_idx = 0xFF;
2399                 list_add(&ioc->internal_lookup[i].tracker_list,
2400                     &ioc->internal_free_list);
2401         }
2402         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2403 }
2404
2405 /**
2406  * _base_writeq - 64 bit write to MMIO
2407  * @ioc: per adapter object
2408  * @b: data payload
2409  * @addr: address in MMIO space
2410  * @writeq_lock: spin lock
2411  *
2412  * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
2413  * care of 32 bit environment where its not quarenteed to send the entire word
2414  * in one transfer.
2415  */
2416 #if defined(writeq) && defined(CONFIG_64BIT)
2417 static inline void
2418 _base_writeq(__u64 b, volatile void __iomem *addr, spinlock_t *writeq_lock)
2419 {
2420         writeq(cpu_to_le64(b), addr);
2421 }
2422 #else
2423 static inline void
2424 _base_writeq(__u64 b, volatile void __iomem *addr, spinlock_t *writeq_lock)
2425 {
2426         unsigned long flags;
2427         __u64 data_out = cpu_to_le64(b);
2428
2429         spin_lock_irqsave(writeq_lock, flags);
2430         writel((u32)(data_out), addr);
2431         writel((u32)(data_out >> 32), (addr + 4));
2432         spin_unlock_irqrestore(writeq_lock, flags);
2433 }
2434 #endif
2435
2436 /**
2437  * mpt3sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
2438  * @ioc: per adapter object
2439  * @smid: system request message index
2440  * @handle: device handle
2441  *
2442  * Return nothing.
2443  */
2444 void
2445 mpt3sas_base_put_smid_scsi_io(struct MPT3SAS_ADAPTER *ioc, u16 smid, u16 handle)
2446 {
2447         Mpi2RequestDescriptorUnion_t descriptor;
2448         u64 *request = (u64 *)&descriptor;
2449
2450
2451         descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
2452         descriptor.SCSIIO.MSIxIndex =  _base_get_msix_index(ioc);
2453         descriptor.SCSIIO.SMID = cpu_to_le16(smid);
2454         descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
2455         descriptor.SCSIIO.LMID = 0;
2456         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2457             &ioc->scsi_lookup_lock);
2458 }
2459
2460 /**
2461  * mpt3sas_base_put_smid_fast_path - send fast path request to firmware
2462  * @ioc: per adapter object
2463  * @smid: system request message index
2464  * @handle: device handle
2465  *
2466  * Return nothing.
2467  */
2468 void
2469 mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
2470         u16 handle)
2471 {
2472         Mpi2RequestDescriptorUnion_t descriptor;
2473         u64 *request = (u64 *)&descriptor;
2474
2475         descriptor.SCSIIO.RequestFlags =
2476             MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO;
2477         descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
2478         descriptor.SCSIIO.SMID = cpu_to_le16(smid);
2479         descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
2480         descriptor.SCSIIO.LMID = 0;
2481         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2482             &ioc->scsi_lookup_lock);
2483 }
2484
2485 /**
2486  * mpt3sas_base_put_smid_hi_priority - send Task Managment request to firmware
2487  * @ioc: per adapter object
2488  * @smid: system request message index
2489  * @msix_task: msix_task will be same as msix of IO incase of task abort else 0.
2490  * Return nothing.
2491  */
2492 void
2493 mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
2494         u16 msix_task)
2495 {
2496         Mpi2RequestDescriptorUnion_t descriptor;
2497         u64 *request = (u64 *)&descriptor;
2498
2499         descriptor.HighPriority.RequestFlags =
2500             MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
2501         descriptor.HighPriority.MSIxIndex =  msix_task;
2502         descriptor.HighPriority.SMID = cpu_to_le16(smid);
2503         descriptor.HighPriority.LMID = 0;
2504         descriptor.HighPriority.Reserved1 = 0;
2505         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2506             &ioc->scsi_lookup_lock);
2507 }
2508
2509 /**
2510  * mpt3sas_base_put_smid_default - Default, primarily used for config pages
2511  * @ioc: per adapter object
2512  * @smid: system request message index
2513  *
2514  * Return nothing.
2515  */
2516 void
2517 mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2518 {
2519         Mpi2RequestDescriptorUnion_t descriptor;
2520         u64 *request = (u64 *)&descriptor;
2521
2522         descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2523         descriptor.Default.MSIxIndex =  _base_get_msix_index(ioc);
2524         descriptor.Default.SMID = cpu_to_le16(smid);
2525         descriptor.Default.LMID = 0;
2526         descriptor.Default.DescriptorTypeDependent = 0;
2527         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2528             &ioc->scsi_lookup_lock);
2529 }
2530
2531 /**
2532  * _base_display_OEMs_branding - Display branding string
2533  * @ioc: per adapter object
2534  *
2535  * Return nothing.
2536  */
2537 static void
2538 _base_display_OEMs_branding(struct MPT3SAS_ADAPTER *ioc)
2539 {
2540         if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
2541                 return;
2542
2543         switch (ioc->pdev->subsystem_vendor) {
2544         case PCI_VENDOR_ID_INTEL:
2545                 switch (ioc->pdev->device) {
2546                 case MPI2_MFGPAGE_DEVID_SAS2008:
2547                         switch (ioc->pdev->subsystem_device) {
2548                         case MPT2SAS_INTEL_RMS2LL080_SSDID:
2549                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2550                                     MPT2SAS_INTEL_RMS2LL080_BRANDING);
2551                                 break;
2552                         case MPT2SAS_INTEL_RMS2LL040_SSDID:
2553                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2554                                     MPT2SAS_INTEL_RMS2LL040_BRANDING);
2555                                 break;
2556                         case MPT2SAS_INTEL_SSD910_SSDID:
2557                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2558                                     MPT2SAS_INTEL_SSD910_BRANDING);
2559                                 break;
2560                         default:
2561                                 pr_info(MPT3SAS_FMT
2562                                  "Intel(R) Controller: Subsystem ID: 0x%X\n",
2563                                  ioc->name, ioc->pdev->subsystem_device);
2564                                 break;
2565                         }
2566                 case MPI2_MFGPAGE_DEVID_SAS2308_2:
2567                         switch (ioc->pdev->subsystem_device) {
2568                         case MPT2SAS_INTEL_RS25GB008_SSDID:
2569                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2570                                     MPT2SAS_INTEL_RS25GB008_BRANDING);
2571                                 break;
2572                         case MPT2SAS_INTEL_RMS25JB080_SSDID:
2573                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2574                                     MPT2SAS_INTEL_RMS25JB080_BRANDING);
2575                                 break;
2576                         case MPT2SAS_INTEL_RMS25JB040_SSDID:
2577                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2578                                     MPT2SAS_INTEL_RMS25JB040_BRANDING);
2579                                 break;
2580                         case MPT2SAS_INTEL_RMS25KB080_SSDID:
2581                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2582                                     MPT2SAS_INTEL_RMS25KB080_BRANDING);
2583                                 break;
2584                         case MPT2SAS_INTEL_RMS25KB040_SSDID:
2585                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2586                                     MPT2SAS_INTEL_RMS25KB040_BRANDING);
2587                                 break;
2588                         case MPT2SAS_INTEL_RMS25LB040_SSDID:
2589                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2590                                     MPT2SAS_INTEL_RMS25LB040_BRANDING);
2591                                 break;
2592                         case MPT2SAS_INTEL_RMS25LB080_SSDID:
2593                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2594                                     MPT2SAS_INTEL_RMS25LB080_BRANDING);
2595                                 break;
2596                         default:
2597                                 pr_info(MPT3SAS_FMT
2598                                  "Intel(R) Controller: Subsystem ID: 0x%X\n",
2599                                  ioc->name, ioc->pdev->subsystem_device);
2600                                 break;
2601                         }
2602                 case MPI25_MFGPAGE_DEVID_SAS3008:
2603                         switch (ioc->pdev->subsystem_device) {
2604                         case MPT3SAS_INTEL_RMS3JC080_SSDID:
2605                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2606                                         MPT3SAS_INTEL_RMS3JC080_BRANDING);
2607                                 break;
2608
2609                         case MPT3SAS_INTEL_RS3GC008_SSDID:
2610                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2611                                         MPT3SAS_INTEL_RS3GC008_BRANDING);
2612                                 break;
2613                         case MPT3SAS_INTEL_RS3FC044_SSDID:
2614                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2615                                         MPT3SAS_INTEL_RS3FC044_BRANDING);
2616                                 break;
2617                         case MPT3SAS_INTEL_RS3UC080_SSDID:
2618                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2619                                         MPT3SAS_INTEL_RS3UC080_BRANDING);
2620                                 break;
2621                         default:
2622                                 pr_info(MPT3SAS_FMT
2623                                  "Intel(R) Controller: Subsystem ID: 0x%X\n",
2624                                  ioc->name, ioc->pdev->subsystem_device);
2625                                 break;
2626                         }
2627                         break;
2628                 default:
2629                         pr_info(MPT3SAS_FMT
2630                          "Intel(R) Controller: Subsystem ID: 0x%X\n",
2631                          ioc->name, ioc->pdev->subsystem_device);
2632                         break;
2633                 }
2634                 break;
2635         case PCI_VENDOR_ID_DELL:
2636                 switch (ioc->pdev->device) {
2637                 case MPI2_MFGPAGE_DEVID_SAS2008:
2638                         switch (ioc->pdev->subsystem_device) {
2639                         case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
2640                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2641                                  MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING);
2642                                 break;
2643                         case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
2644                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2645                                  MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING);
2646                                 break;
2647                         case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
2648                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2649                                  MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING);
2650                                 break;
2651                         case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
2652                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2653                                  MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING);
2654                                 break;
2655                         case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
2656                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2657                                  MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING);
2658                                 break;
2659                         case MPT2SAS_DELL_PERC_H200_SSDID:
2660                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2661                                  MPT2SAS_DELL_PERC_H200_BRANDING);
2662                                 break;
2663                         case MPT2SAS_DELL_6GBPS_SAS_SSDID:
2664                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2665                                  MPT2SAS_DELL_6GBPS_SAS_BRANDING);
2666                                 break;
2667                         default:
2668                                 pr_info(MPT3SAS_FMT
2669                                    "Dell 6Gbps HBA: Subsystem ID: 0x%X\n",
2670                                    ioc->name, ioc->pdev->subsystem_device);
2671                                 break;
2672                         }
2673                         break;
2674                 case MPI25_MFGPAGE_DEVID_SAS3008:
2675                         switch (ioc->pdev->subsystem_device) {
2676                         case MPT3SAS_DELL_12G_HBA_SSDID:
2677                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2678                                         MPT3SAS_DELL_12G_HBA_BRANDING);
2679                                 break;
2680                         default:
2681                                 pr_info(MPT3SAS_FMT
2682                                    "Dell 12Gbps HBA: Subsystem ID: 0x%X\n",
2683                                    ioc->name, ioc->pdev->subsystem_device);
2684                                 break;
2685                         }
2686                         break;
2687                 default:
2688                         pr_info(MPT3SAS_FMT
2689                            "Dell HBA: Subsystem ID: 0x%X\n", ioc->name,
2690                            ioc->pdev->subsystem_device);
2691                         break;
2692                 }
2693                 break;
2694         case PCI_VENDOR_ID_CISCO:
2695                 switch (ioc->pdev->device) {
2696                 case MPI25_MFGPAGE_DEVID_SAS3008:
2697                         switch (ioc->pdev->subsystem_device) {
2698                         case MPT3SAS_CISCO_12G_8E_HBA_SSDID:
2699                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2700                                         MPT3SAS_CISCO_12G_8E_HBA_BRANDING);
2701                                 break;
2702                         case MPT3SAS_CISCO_12G_8I_HBA_SSDID:
2703                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2704                                         MPT3SAS_CISCO_12G_8I_HBA_BRANDING);
2705                                 break;
2706                         case MPT3SAS_CISCO_12G_AVILA_HBA_SSDID:
2707                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2708                                         MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING);
2709                                 break;
2710                         default:
2711                                 pr_info(MPT3SAS_FMT
2712                                   "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n",
2713                                   ioc->name, ioc->pdev->subsystem_device);
2714                                 break;
2715                         }
2716                         break;
2717                 case MPI25_MFGPAGE_DEVID_SAS3108_1:
2718                         switch (ioc->pdev->subsystem_device) {
2719                         case MPT3SAS_CISCO_12G_AVILA_HBA_SSDID:
2720                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2721                                 MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING);
2722                                 break;
2723                         case MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID:
2724                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2725                                 MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING
2726                                 );
2727                                 break;
2728                         default:
2729                                 pr_info(MPT3SAS_FMT
2730                                  "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n",
2731                                  ioc->name, ioc->pdev->subsystem_device);
2732                                 break;
2733                         }
2734                         break;
2735                 default:
2736                         pr_info(MPT3SAS_FMT
2737                            "Cisco SAS HBA: Subsystem ID: 0x%X\n",
2738                            ioc->name, ioc->pdev->subsystem_device);
2739                         break;
2740                 }
2741                 break;
2742         case MPT2SAS_HP_3PAR_SSVID:
2743                 switch (ioc->pdev->device) {
2744                 case MPI2_MFGPAGE_DEVID_SAS2004:
2745                         switch (ioc->pdev->subsystem_device) {
2746                         case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
2747                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2748                                     MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
2749                                 break;
2750                         default:
2751                                 pr_info(MPT3SAS_FMT
2752                                    "HP 6Gbps SAS HBA: Subsystem ID: 0x%X\n",
2753                                    ioc->name, ioc->pdev->subsystem_device);
2754                                 break;
2755                         }
2756                 case MPI2_MFGPAGE_DEVID_SAS2308_2:
2757                         switch (ioc->pdev->subsystem_device) {
2758                         case MPT2SAS_HP_2_4_INTERNAL_SSDID:
2759                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2760                                     MPT2SAS_HP_2_4_INTERNAL_BRANDING);
2761                                 break;
2762                         case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
2763                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2764                                     MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
2765                                 break;
2766                         case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
2767                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2768                                  MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
2769                                 break;
2770                         case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
2771                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2772                                     MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
2773                                 break;
2774                         default:
2775                                 pr_info(MPT3SAS_FMT
2776                                    "HP 6Gbps SAS HBA: Subsystem ID: 0x%X\n",
2777                                    ioc->name, ioc->pdev->subsystem_device);
2778                                 break;
2779                         }
2780                 default:
2781                         pr_info(MPT3SAS_FMT
2782                            "HP SAS HBA: Subsystem ID: 0x%X\n",
2783                            ioc->name, ioc->pdev->subsystem_device);
2784                         break;
2785                 }
2786         default:
2787                 break;
2788         }
2789 }
2790
2791 /**
2792  * _base_display_ioc_capabilities - Disply IOC's capabilities.
2793  * @ioc: per adapter object
2794  *
2795  * Return nothing.
2796  */
2797 static void
2798 _base_display_ioc_capabilities(struct MPT3SAS_ADAPTER *ioc)
2799 {
2800         int i = 0;
2801         char desc[16];
2802         u32 iounit_pg1_flags;
2803         u32 bios_version;
2804
2805         bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
2806         strncpy(desc, ioc->manu_pg0.ChipName, 16);
2807         pr_info(MPT3SAS_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "\
2808            "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
2809             ioc->name, desc,
2810            (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
2811            (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
2812            (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
2813            ioc->facts.FWVersion.Word & 0x000000FF,
2814            ioc->pdev->revision,
2815            (bios_version & 0xFF000000) >> 24,
2816            (bios_version & 0x00FF0000) >> 16,
2817            (bios_version & 0x0000FF00) >> 8,
2818             bios_version & 0x000000FF);
2819
2820         _base_display_OEMs_branding(ioc);
2821
2822         pr_info(MPT3SAS_FMT "Protocol=(", ioc->name);
2823
2824         if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
2825                 pr_info("Initiator");
2826                 i++;
2827         }
2828
2829         if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
2830                 pr_info("%sTarget", i ? "," : "");
2831                 i++;
2832         }
2833
2834         i = 0;
2835         pr_info("), ");
2836         pr_info("Capabilities=(");
2837
2838         if (!ioc->hide_ir_msg) {
2839                 if (ioc->facts.IOCCapabilities &
2840                     MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
2841                         pr_info("Raid");
2842                         i++;
2843                 }
2844         }
2845
2846         if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
2847                 pr_info("%sTLR", i ? "," : "");
2848                 i++;
2849         }
2850
2851         if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
2852                 pr_info("%sMulticast", i ? "," : "");
2853                 i++;
2854         }
2855
2856         if (ioc->facts.IOCCapabilities &
2857             MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
2858                 pr_info("%sBIDI Target", i ? "," : "");
2859                 i++;
2860         }
2861
2862         if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
2863                 pr_info("%sEEDP", i ? "," : "");
2864                 i++;
2865         }
2866
2867         if (ioc->facts.IOCCapabilities &
2868             MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
2869                 pr_info("%sSnapshot Buffer", i ? "," : "");
2870                 i++;
2871         }
2872
2873         if (ioc->facts.IOCCapabilities &
2874             MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
2875                 pr_info("%sDiag Trace Buffer", i ? "," : "");
2876                 i++;
2877         }
2878
2879         if (ioc->facts.IOCCapabilities &
2880             MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
2881                 pr_info("%sDiag Extended Buffer", i ? "," : "");
2882                 i++;
2883         }
2884
2885         if (ioc->facts.IOCCapabilities &
2886             MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
2887                 pr_info("%sTask Set Full", i ? "," : "");
2888                 i++;
2889         }
2890
2891         iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2892         if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
2893                 pr_info("%sNCQ", i ? "," : "");
2894                 i++;
2895         }
2896
2897         pr_info(")\n");
2898 }
2899
2900 /**
2901  * mpt3sas_base_update_missing_delay - change the missing delay timers
2902  * @ioc: per adapter object
2903  * @device_missing_delay: amount of time till device is reported missing
2904  * @io_missing_delay: interval IO is returned when there is a missing device
2905  *
2906  * Return nothing.
2907  *
2908  * Passed on the command line, this function will modify the device missing
2909  * delay, as well as the io missing delay. This should be called at driver
2910  * load time.
2911  */
2912 void
2913 mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
2914         u16 device_missing_delay, u8 io_missing_delay)
2915 {
2916         u16 dmd, dmd_new, dmd_orignal;
2917         u8 io_missing_delay_original;
2918         u16 sz;
2919         Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
2920         Mpi2ConfigReply_t mpi_reply;
2921         u8 num_phys = 0;
2922         u16 ioc_status;
2923
2924         mpt3sas_config_get_number_hba_phys(ioc, &num_phys);
2925         if (!num_phys)
2926                 return;
2927
2928         sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
2929             sizeof(Mpi2SasIOUnit1PhyData_t));
2930         sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
2931         if (!sas_iounit_pg1) {
2932                 pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
2933                     ioc->name, __FILE__, __LINE__, __func__);
2934                 goto out;
2935         }
2936         if ((mpt3sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
2937             sas_iounit_pg1, sz))) {
2938                 pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
2939                     ioc->name, __FILE__, __LINE__, __func__);
2940                 goto out;
2941         }
2942         ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
2943             MPI2_IOCSTATUS_MASK;
2944         if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
2945                 pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
2946                     ioc->name, __FILE__, __LINE__, __func__);
2947                 goto out;
2948         }
2949
2950         /* device missing delay */
2951         dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
2952         if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2953                 dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2954         else
2955                 dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2956         dmd_orignal = dmd;
2957         if (device_missing_delay > 0x7F) {
2958                 dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
2959                     device_missing_delay;
2960                 dmd = dmd / 16;
2961                 dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
2962         } else
2963                 dmd = device_missing_delay;
2964         sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
2965
2966         /* io missing delay */
2967         io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
2968         sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
2969
2970         if (!mpt3sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
2971             sz)) {
2972                 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2973                         dmd_new = (dmd &
2974                             MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2975                 else
2976                         dmd_new =
2977                     dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2978                 pr_info(MPT3SAS_FMT "device_missing_delay: old(%d), new(%d)\n",
2979                         ioc->name, dmd_orignal, dmd_new);
2980                 pr_info(MPT3SAS_FMT "ioc_missing_delay: old(%d), new(%d)\n",
2981                         ioc->name, io_missing_delay_original,
2982                     io_missing_delay);
2983                 ioc->device_missing_delay = dmd_new;
2984                 ioc->io_missing_delay = io_missing_delay;
2985         }
2986
2987 out:
2988         kfree(sas_iounit_pg1);
2989 }
2990 /**
2991  * _base_static_config_pages - static start of day config pages
2992  * @ioc: per adapter object
2993  *
2994  * Return nothing.
2995  */
2996 static void
2997 _base_static_config_pages(struct MPT3SAS_ADAPTER *ioc)
2998 {
2999         Mpi2ConfigReply_t mpi_reply;
3000         u32 iounit_pg1_flags;
3001
3002         mpt3sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
3003         if (ioc->ir_firmware)
3004                 mpt3sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
3005                     &ioc->manu_pg10);
3006
3007         /*
3008          * Ensure correct T10 PI operation if vendor left EEDPTagMode
3009          * flag unset in NVDATA.
3010          */
3011         mpt3sas_config_get_manufacturing_pg11(ioc, &mpi_reply, &ioc->manu_pg11);
3012         if (ioc->manu_pg11.EEDPTagMode == 0) {
3013                 pr_err("%s: overriding NVDATA EEDPTagMode setting\n",
3014                     ioc->name);
3015                 ioc->manu_pg11.EEDPTagMode &= ~0x3;
3016                 ioc->manu_pg11.EEDPTagMode |= 0x1;
3017                 mpt3sas_config_set_manufacturing_pg11(ioc, &mpi_reply,
3018                     &ioc->manu_pg11);
3019         }
3020
3021         mpt3sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
3022         mpt3sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
3023         mpt3sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
3024         mpt3sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
3025         mpt3sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
3026         mpt3sas_config_get_iounit_pg8(ioc, &mpi_reply, &ioc->iounit_pg8);
3027         _base_display_ioc_capabilities(ioc);
3028
3029         /*
3030          * Enable task_set_full handling in iounit_pg1 when the
3031          * facts capabilities indicate that its supported.
3032          */
3033         iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
3034         if ((ioc->facts.IOCCapabilities &
3035             MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
3036                 iounit_pg1_flags &=
3037                     ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
3038         else
3039                 iounit_pg1_flags |=
3040                     MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
3041         ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
3042         mpt3sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
3043
3044         if (ioc->iounit_pg8.NumSensors)
3045                 ioc->temp_sensors_count = ioc->iounit_pg8.NumSensors;
3046 }
3047
3048 /**
3049  * _base_release_memory_pools - release memory
3050  * @ioc: per adapter object
3051  *
3052  * Free memory allocated from _base_allocate_memory_pools.
3053  *
3054  * Return nothing.
3055  */
3056 static void
3057 _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
3058 {
3059         int i = 0;
3060         struct reply_post_struct *rps;
3061
3062         dexitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
3063             __func__));
3064
3065         if (ioc->request) {
3066                 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
3067                     ioc->request,  ioc->request_dma);
3068                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3069                         "request_pool(0x%p): free\n",
3070                         ioc->name, ioc->request));
3071                 ioc->request = NULL;
3072         }
3073
3074         if (ioc->sense) {
3075                 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
3076                 if (ioc->sense_dma_pool)
3077                         pci_pool_destroy(ioc->sense_dma_pool);
3078                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3079                         "sense_pool(0x%p): free\n",
3080                         ioc->name, ioc->sense));
3081                 ioc->sense = NULL;
3082         }
3083
3084         if (ioc->reply) {
3085                 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
3086                 if (ioc->reply_dma_pool)
3087                         pci_pool_destroy(ioc->reply_dma_pool);
3088                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3089                         "reply_pool(0x%p): free\n",
3090                         ioc->name, ioc->reply));
3091                 ioc->reply = NULL;
3092         }
3093
3094         if (ioc->reply_free) {
3095                 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
3096                     ioc->reply_free_dma);
3097                 if (ioc->reply_free_dma_pool)
3098                         pci_pool_destroy(ioc->reply_free_dma_pool);
3099                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3100                         "reply_free_pool(0x%p): free\n",
3101                         ioc->name, ioc->reply_free));
3102                 ioc->reply_free = NULL;
3103         }
3104
3105         if (ioc->reply_post) {
3106                 do {
3107                         rps = &ioc->reply_post[i];
3108                         if (rps->reply_post_free) {
3109                                 pci_pool_free(
3110                                     ioc->reply_post_free_dma_pool,
3111                                     rps->reply_post_free,
3112                                     rps->reply_post_free_dma);
3113                                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3114                                     "reply_post_free_pool(0x%p): free\n",
3115                                     ioc->name, rps->reply_post_free));
3116                                 rps->reply_post_free = NULL;
3117                         }
3118                 } while (ioc->rdpq_array_enable &&
3119                            (++i < ioc->reply_queue_count));
3120
3121                 if (ioc->reply_post_free_dma_pool)
3122                         pci_pool_destroy(ioc->reply_post_free_dma_pool);
3123                 kfree(ioc->reply_post);
3124         }
3125
3126         if (ioc->config_page) {
3127                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3128                     "config_page(0x%p): free\n", ioc->name,
3129                     ioc->config_page));
3130                 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
3131                     ioc->config_page, ioc->config_page_dma);
3132         }
3133
3134         if (ioc->scsi_lookup) {
3135                 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
3136                 ioc->scsi_lookup = NULL;
3137         }
3138         kfree(ioc->hpr_lookup);
3139         ioc->hpr_lookup = NULL;
3140         kfree(ioc->internal_lookup);
3141         ioc->internal_lookup = NULL;
3142         if (ioc->chain_lookup) {
3143                 for (i = 0; i < ioc->chain_depth; i++) {
3144                         if (ioc->chain_lookup[i].chain_buffer)
3145                                 pci_pool_free(ioc->chain_dma_pool,
3146                                     ioc->chain_lookup[i].chain_buffer,
3147                                     ioc->chain_lookup[i].chain_buffer_dma);
3148                 }
3149                 if (ioc->chain_dma_pool)
3150                         pci_pool_destroy(ioc->chain_dma_pool);
3151                 free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
3152                 ioc->chain_lookup = NULL;
3153         }
3154 }
3155
3156 /**
3157  * _base_allocate_memory_pools - allocate start of day memory pools
3158  * @ioc: per adapter object
3159  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3160  *
3161  * Returns 0 success, anything else error
3162  */
3163 static int
3164 _base_allocate_memory_pools(struct MPT3SAS_ADAPTER *ioc,  int sleep_flag)
3165 {
3166         struct mpt3sas_facts *facts;
3167         u16 max_sge_elements;
3168         u16 chains_needed_per_io;
3169         u32 sz, total_sz, reply_post_free_sz;
3170         u32 retry_sz;
3171         u16 max_request_credit;
3172         unsigned short sg_tablesize;
3173         u16 sge_size;
3174         int i;
3175
3176         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
3177             __func__));
3178
3179
3180         retry_sz = 0;
3181         facts = &ioc->facts;
3182
3183         /* command line tunables for max sgl entries */
3184         if (max_sgl_entries != -1)
3185                 sg_tablesize = max_sgl_entries;
3186         else {
3187                 if (ioc->hba_mpi_version_belonged == MPI2_VERSION)
3188                         sg_tablesize = MPT2SAS_SG_DEPTH;
3189                 else
3190                         sg_tablesize = MPT3SAS_SG_DEPTH;
3191         }
3192
3193         if (sg_tablesize < MPT_MIN_PHYS_SEGMENTS)
3194                 sg_tablesize = MPT_MIN_PHYS_SEGMENTS;
3195         else if (sg_tablesize > MPT_MAX_PHYS_SEGMENTS) {
3196                 sg_tablesize = min_t(unsigned short, sg_tablesize,
3197                                       SCSI_MAX_SG_CHAIN_SEGMENTS);
3198                 pr_warn(MPT3SAS_FMT
3199                  "sg_tablesize(%u) is bigger than kernel"
3200                  " defined SCSI_MAX_SG_SEGMENTS(%u)\n", ioc->name,
3201                  sg_tablesize, MPT_MAX_PHYS_SEGMENTS);
3202         }
3203         ioc->shost->sg_tablesize = sg_tablesize;
3204
3205         ioc->hi_priority_depth = facts->HighPriorityCredit;
3206         ioc->internal_depth = ioc->hi_priority_depth + (5);
3207         /* command line tunables  for max controller queue depth */
3208         if (max_queue_depth != -1 && max_queue_depth != 0) {
3209                 max_request_credit = min_t(u16, max_queue_depth +
3210                     ioc->hi_priority_depth + ioc->internal_depth,
3211                     facts->RequestCredit);
3212                 if (max_request_credit > MAX_HBA_QUEUE_DEPTH)
3213                         max_request_credit =  MAX_HBA_QUEUE_DEPTH;
3214         } else
3215                 max_request_credit = min_t(u16, facts->RequestCredit,
3216                     MAX_HBA_QUEUE_DEPTH);
3217
3218         ioc->hba_queue_depth = max_request_credit;
3219
3220         /* request frame size */
3221         ioc->request_sz = facts->IOCRequestFrameSize * 4;
3222
3223         /* reply frame size */
3224         ioc->reply_sz = facts->ReplyFrameSize * 4;
3225
3226         /* calculate the max scatter element size */
3227         sge_size = max_t(u16, ioc->sge_size, ioc->sge_size_ieee);
3228
3229  retry_allocation:
3230         total_sz = 0;
3231         /* calculate number of sg elements left over in the 1st frame */
3232         max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
3233             sizeof(Mpi2SGEIOUnion_t)) + sge_size);
3234         ioc->max_sges_in_main_message = max_sge_elements/sge_size;
3235
3236         /* now do the same for a chain buffer */
3237         max_sge_elements = ioc->request_sz - sge_size;
3238         ioc->max_sges_in_chain_message = max_sge_elements/sge_size;
3239
3240         /*
3241          *  MPT3SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
3242          */
3243         chains_needed_per_io = ((ioc->shost->sg_tablesize -
3244            ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
3245             + 1;
3246         if (chains_needed_per_io > facts->MaxChainDepth) {
3247                 chains_needed_per_io = facts->MaxChainDepth;
3248                 ioc->shost->sg_tablesize = min_t(u16,
3249                 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
3250                 * chains_needed_per_io), ioc->shost->sg_tablesize);
3251         }
3252         ioc->chains_needed_per_io = chains_needed_per_io;
3253
3254         /* reply free queue sizing - taking into account for 64 FW events */
3255         ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
3256
3257         /* calculate reply descriptor post queue depth */
3258         ioc->reply_post_queue_depth = ioc->hba_queue_depth +
3259                                 ioc->reply_free_queue_depth +  1 ;
3260         /* align the reply post queue on the next 16 count boundary */
3261         if (ioc->reply_post_queue_depth % 16)
3262                 ioc->reply_post_queue_depth += 16 -
3263                 (ioc->reply_post_queue_depth % 16);
3264
3265
3266         if (ioc->reply_post_queue_depth >
3267             facts->MaxReplyDescriptorPostQueueDepth) {
3268                 ioc->reply_post_queue_depth =
3269                                 facts->MaxReplyDescriptorPostQueueDepth -
3270                     (facts->MaxReplyDescriptorPostQueueDepth % 16);
3271                 ioc->hba_queue_depth =
3272                                 ((ioc->reply_post_queue_depth - 64) / 2) - 1;
3273                 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
3274         }
3275
3276         dinitprintk(ioc, pr_info(MPT3SAS_FMT "scatter gather: " \
3277             "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
3278             "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
3279             ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
3280             ioc->chains_needed_per_io));
3281
3282         /* reply post queue, 16 byte align */
3283         reply_post_free_sz = ioc->reply_post_queue_depth *
3284             sizeof(Mpi2DefaultReplyDescriptor_t);
3285
3286         sz = reply_post_free_sz;
3287         if (_base_is_controller_msix_enabled(ioc) && !ioc->rdpq_array_enable)
3288                 sz *= ioc->reply_queue_count;
3289
3290         ioc->reply_post = kcalloc((ioc->rdpq_array_enable) ?
3291             (ioc->reply_queue_count):1,
3292             sizeof(struct reply_post_struct), GFP_KERNEL);
3293
3294         if (!ioc->reply_post) {
3295                 pr_err(MPT3SAS_FMT "reply_post_free pool: kcalloc failed\n",
3296                         ioc->name);
3297                 goto out;
3298         }
3299         ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
3300             ioc->pdev, sz, 16, 0);
3301         if (!ioc->reply_post_free_dma_pool) {
3302                 pr_err(MPT3SAS_FMT
3303                  "reply_post_free pool: pci_pool_create failed\n",
3304                  ioc->name);
3305                 goto out;
3306         }
3307         i = 0;
3308         do {
3309                 ioc->reply_post[i].reply_post_free =
3310                     pci_pool_alloc(ioc->reply_post_free_dma_pool,
3311                     GFP_KERNEL,
3312                     &ioc->reply_post[i].reply_post_free_dma);
3313                 if (!ioc->reply_post[i].reply_post_free) {
3314                         pr_err(MPT3SAS_FMT
3315                         "reply_post_free pool: pci_pool_alloc failed\n",
3316                         ioc->name);
3317                         goto out;
3318                 }
3319                 memset(ioc->reply_post[i].reply_post_free, 0, sz);
3320                 dinitprintk(ioc, pr_info(MPT3SAS_FMT
3321                     "reply post free pool (0x%p): depth(%d),"
3322                     "element_size(%d), pool_size(%d kB)\n", ioc->name,
3323                     ioc->reply_post[i].reply_post_free,
3324                     ioc->reply_post_queue_depth, 8, sz/1024));
3325                 dinitprintk(ioc, pr_info(MPT3SAS_FMT
3326                     "reply_post_free_dma = (0x%llx)\n", ioc->name,
3327                     (unsigned long long)
3328                     ioc->reply_post[i].reply_post_free_dma));
3329                 total_sz += sz;
3330         } while (ioc->rdpq_array_enable && (++i < ioc->reply_queue_count));
3331
3332         if (ioc->dma_mask > 32) {
3333                 if (_base_change_consistent_dma_mask(ioc, ioc->pdev) != 0) {
3334                         pr_warn(MPT3SAS_FMT
3335                             "no suitable consistent DMA mask for %s\n",
3336                             ioc->name, pci_name(ioc->pdev));
3337                         goto out;
3338                 }
3339         }
3340
3341         ioc->scsiio_depth = ioc->hba_queue_depth -
3342             ioc->hi_priority_depth - ioc->internal_depth;
3343
3344         /* set the scsi host can_queue depth
3345          * with some internal commands that could be outstanding
3346          */
3347         ioc->shost->can_queue = ioc->scsiio_depth;
3348         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3349                 "scsi host: can_queue depth (%d)\n",
3350                 ioc->name, ioc->shost->can_queue));
3351
3352
3353         /* contiguous pool for request and chains, 16 byte align, one extra "
3354          * "frame for smid=0
3355          */
3356         ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
3357         sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
3358
3359         /* hi-priority queue */
3360         sz += (ioc->hi_priority_depth * ioc->request_sz);
3361
3362         /* internal queue */
3363         sz += (ioc->internal_depth * ioc->request_sz);
3364
3365         ioc->request_dma_sz = sz;
3366         ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
3367         if (!ioc->request) {
3368                 pr_err(MPT3SAS_FMT "request pool: pci_alloc_consistent " \
3369                     "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
3370                     "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
3371                     ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
3372                 if (ioc->scsiio_depth < MPT3SAS_SAS_QUEUE_DEPTH)
3373                         goto out;
3374                 retry_sz += 64;
3375                 ioc->hba_queue_depth = max_request_credit - retry_sz;
3376                 goto retry_allocation;
3377         }
3378
3379         if (retry_sz)
3380                 pr_err(MPT3SAS_FMT "request pool: pci_alloc_consistent " \
3381                     "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
3382                     "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
3383                     ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
3384
3385         /* hi-priority queue */
3386         ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
3387             ioc->request_sz);
3388         ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
3389             ioc->request_sz);
3390
3391         /* internal queue */
3392         ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
3393             ioc->request_sz);
3394         ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
3395             ioc->request_sz);
3396
3397         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3398                 "request pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n",
3399                 ioc->name, ioc->request, ioc->hba_queue_depth, ioc->request_sz,
3400             (ioc->hba_queue_depth * ioc->request_sz)/1024));
3401
3402         dinitprintk(ioc, pr_info(MPT3SAS_FMT "request pool: dma(0x%llx)\n",
3403             ioc->name, (unsigned long long) ioc->request_dma));
3404         total_sz += sz;
3405
3406         sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
3407         ioc->scsi_lookup_pages = get_order(sz);
3408         ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
3409             GFP_KERNEL, ioc->scsi_lookup_pages);
3410         if (!ioc->scsi_lookup) {
3411                 pr_err(MPT3SAS_FMT "scsi_lookup: get_free_pages failed, sz(%d)\n",
3412                         ioc->name, (int)sz);
3413                 goto out;
3414         }
3415
3416         dinitprintk(ioc, pr_info(MPT3SAS_FMT "scsiio(0x%p): depth(%d)\n",
3417                 ioc->name, ioc->request, ioc->scsiio_depth));
3418
3419         ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
3420         sz = ioc->chain_depth * sizeof(struct chain_tracker);
3421         ioc->chain_pages = get_order(sz);
3422         ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
3423             GFP_KERNEL, ioc->chain_pages);
3424         if (!ioc->chain_lookup) {
3425                 pr_err(MPT3SAS_FMT "chain_lookup: __get_free_pages failed\n",
3426                         ioc->name);
3427                 goto out;
3428         }
3429         ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
3430             ioc->request_sz, 16, 0);
3431         if (!ioc->chain_dma_pool) {
3432                 pr_err(MPT3SAS_FMT "chain_dma_pool: pci_pool_create failed\n",
3433                         ioc->name);
3434                 goto out;
3435         }
3436         for (i = 0; i < ioc->chain_depth; i++) {
3437                 ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
3438                     ioc->chain_dma_pool , GFP_KERNEL,
3439                     &ioc->chain_lookup[i].chain_buffer_dma);
3440                 if (!ioc->chain_lookup[i].chain_buffer) {
3441                         ioc->chain_depth = i;
3442                         goto chain_done;
3443                 }
3444                 total_sz += ioc->request_sz;
3445         }
3446  chain_done:
3447         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3448                 "chain pool depth(%d), frame_size(%d), pool_size(%d kB)\n",
3449                 ioc->name, ioc->chain_depth, ioc->request_sz,
3450                 ((ioc->chain_depth *  ioc->request_sz))/1024));
3451
3452         /* initialize hi-priority queue smid's */
3453         ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
3454             sizeof(struct request_tracker), GFP_KERNEL);
3455         if (!ioc->hpr_lookup) {
3456                 pr_err(MPT3SAS_FMT "hpr_lookup: kcalloc failed\n",
3457                     ioc->name);
3458                 goto out;
3459         }
3460         ioc->hi_priority_smid = ioc->scsiio_depth + 1;
3461         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3462                 "hi_priority(0x%p): depth(%d), start smid(%d)\n",
3463                 ioc->name, ioc->hi_priority,
3464             ioc->hi_priority_depth, ioc->hi_priority_smid));
3465
3466         /* initialize internal queue smid's */
3467         ioc->internal_lookup = kcalloc(ioc->internal_depth,
3468             sizeof(struct request_tracker), GFP_KERNEL);
3469         if (!ioc->internal_lookup) {
3470                 pr_err(MPT3SAS_FMT "internal_lookup: kcalloc failed\n",
3471                     ioc->name);
3472                 goto out;
3473         }
3474         ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
3475         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3476                 "internal(0x%p): depth(%d), start smid(%d)\n",
3477                 ioc->name, ioc->internal,
3478             ioc->internal_depth, ioc->internal_smid));
3479
3480         /* sense buffers, 4 byte align */
3481         sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
3482         ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
3483             0);
3484         if (!ioc->sense_dma_pool) {
3485                 pr_err(MPT3SAS_FMT "sense pool: pci_pool_create failed\n",
3486                     ioc->name);
3487                 goto out;
3488         }
3489         ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
3490             &ioc->sense_dma);
3491         if (!ioc->sense) {
3492                 pr_err(MPT3SAS_FMT "sense pool: pci_pool_alloc failed\n",
3493                     ioc->name);
3494                 goto out;
3495         }
3496         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3497             "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
3498             "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
3499             SCSI_SENSE_BUFFERSIZE, sz/1024));
3500         dinitprintk(ioc, pr_info(MPT3SAS_FMT "sense_dma(0x%llx)\n",
3501             ioc->name, (unsigned long long)ioc->sense_dma));
3502         total_sz += sz;
3503
3504         /* reply pool, 4 byte align */
3505         sz = ioc->reply_free_queue_depth * ioc->reply_sz;
3506         ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
3507             0);
3508         if (!ioc->reply_dma_pool) {
3509                 pr_err(MPT3SAS_FMT "reply pool: pci_pool_create failed\n",
3510                     ioc->name);
3511                 goto out;
3512         }
3513         ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
3514             &ioc->reply_dma);
3515         if (!ioc->reply) {
3516                 pr_err(MPT3SAS_FMT "reply pool: pci_pool_alloc failed\n",
3517                     ioc->name);
3518                 goto out;
3519         }
3520         ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
3521         ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
3522         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3523                 "reply pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n",
3524                 ioc->name, ioc->reply,
3525             ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
3526         dinitprintk(ioc, pr_info(MPT3SAS_FMT "reply_dma(0x%llx)\n",
3527             ioc->name, (unsigned long long)ioc->reply_dma));
3528         total_sz += sz;
3529
3530         /* reply free queue, 16 byte align */
3531         sz = ioc->reply_free_queue_depth * 4;
3532         ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
3533             ioc->pdev, sz, 16, 0);
3534         if (!ioc->reply_free_dma_pool) {
3535                 pr_err(MPT3SAS_FMT "reply_free pool: pci_pool_create failed\n",
3536                         ioc->name);
3537                 goto out;
3538         }
3539         ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
3540             &ioc->reply_free_dma);
3541         if (!ioc->reply_free) {
3542                 pr_err(MPT3SAS_FMT "reply_free pool: pci_pool_alloc failed\n",
3543                         ioc->name);
3544                 goto out;
3545         }
3546         memset(ioc->reply_free, 0, sz);
3547         dinitprintk(ioc, pr_info(MPT3SAS_FMT "reply_free pool(0x%p): " \
3548             "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
3549             ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
3550         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3551                 "reply_free_dma (0x%llx)\n",
3552                 ioc->name, (unsigned long long)ioc->reply_free_dma));
3553         total_sz += sz;
3554
3555         ioc->config_page_sz = 512;
3556         ioc->config_page = pci_alloc_consistent(ioc->pdev,
3557             ioc->config_page_sz, &ioc->config_page_dma);
3558         if (!ioc->config_page) {
3559                 pr_err(MPT3SAS_FMT
3560                         "config page: pci_pool_alloc failed\n",
3561                         ioc->name);
3562                 goto out;
3563         }
3564         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3565                 "config page(0x%p): size(%d)\n",
3566                 ioc->name, ioc->config_page, ioc->config_page_sz));
3567         dinitprintk(ioc, pr_info(MPT3SAS_FMT "config_page_dma(0x%llx)\n",
3568                 ioc->name, (unsigned long long)ioc->config_page_dma));
3569         total_sz += ioc->config_page_sz;
3570
3571         pr_info(MPT3SAS_FMT "Allocated physical memory: size(%d kB)\n",
3572             ioc->name, total_sz/1024);
3573         pr_info(MPT3SAS_FMT
3574                 "Current Controller Queue Depth(%d),Max Controller Queue Depth(%d)\n",
3575             ioc->name, ioc->shost->can_queue, facts->RequestCredit);
3576         pr_info(MPT3SAS_FMT "Scatter Gather Elements per IO(%d)\n",
3577             ioc->name, ioc->shost->sg_tablesize);
3578         return 0;
3579
3580  out:
3581         return -ENOMEM;
3582 }
3583
3584 /**
3585  * mpt3sas_base_get_iocstate - Get the current state of a MPT adapter.
3586  * @ioc: Pointer to MPT_ADAPTER structure
3587  * @cooked: Request raw or cooked IOC state
3588  *
3589  * Returns all IOC Doorbell register bits if cooked==0, else just the
3590  * Doorbell bits in MPI_IOC_STATE_MASK.
3591  */
3592 u32
3593 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked)
3594 {
3595         u32 s, sc;
3596
3597         s = readl(&ioc->chip->Doorbell);
3598         sc = s & MPI2_IOC_STATE_MASK;
3599         return cooked ? sc : s;
3600 }
3601
3602 /**
3603  * _base_wait_on_iocstate - waiting on a particular ioc state
3604  * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
3605  * @timeout: timeout in second
3606  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3607  *
3608  * Returns 0 for success, non-zero for failure.
3609  */
3610 static int
3611 _base_wait_on_iocstate(struct MPT3SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
3612         int sleep_flag)
3613 {
3614         u32 count, cntdn;
3615         u32 current_state;
3616
3617         count = 0;
3618         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3619         do {
3620                 current_state = mpt3sas_base_get_iocstate(ioc, 1);
3621                 if (current_state == ioc_state)
3622                         return 0;
3623                 if (count && current_state == MPI2_IOC_STATE_FAULT)
3624                         break;
3625                 if (sleep_flag == CAN_SLEEP)
3626                         usleep_range(1000, 1500);
3627                 else
3628                         udelay(500);
3629                 count++;
3630         } while (--cntdn);
3631
3632         return current_state;
3633 }
3634
3635 /**
3636  * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
3637  * a write to the doorbell)
3638  * @ioc: per adapter object
3639  * @timeout: timeout in second
3640  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3641  *
3642  * Returns 0 for success, non-zero for failure.
3643  *
3644  * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
3645  */
3646 static int
3647 _base_diag_reset(struct MPT3SAS_ADAPTER *ioc, int sleep_flag);
3648
3649 static int
3650 _base_wait_for_doorbell_int(struct MPT3SAS_ADAPTER *ioc, int timeout,
3651         int sleep_flag)
3652 {
3653         u32 cntdn, count;
3654         u32 int_status;
3655
3656         count = 0;
3657         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3658         do {
3659                 int_status = readl(&ioc->chip->HostInterruptStatus);
3660                 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
3661                         dhsprintk(ioc, pr_info(MPT3SAS_FMT
3662                                 "%s: successful count(%d), timeout(%d)\n",
3663                                 ioc->name, __func__, count, timeout));
3664                         return 0;
3665                 }
3666                 if (sleep_flag == CAN_SLEEP)
3667                         usleep_range(1000, 1500);
3668                 else
3669                         udelay(500);
3670                 count++;
3671         } while (--cntdn);
3672
3673         pr_err(MPT3SAS_FMT
3674                 "%s: failed due to timeout count(%d), int_status(%x)!\n",
3675                 ioc->name, __func__, count, int_status);
3676         return -EFAULT;
3677 }
3678
3679 /**
3680  * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
3681  * @ioc: per adapter object
3682  * @timeout: timeout in second
3683  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3684  *
3685  * Returns 0 for success, non-zero for failure.
3686  *
3687  * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
3688  * doorbell.
3689  */
3690 static int
3691 _base_wait_for_doorbell_ack(struct MPT3SAS_ADAPTER *ioc, int timeout,
3692         int sleep_flag)
3693 {
3694         u32 cntdn, count;
3695         u32 int_status;
3696         u32 doorbell;
3697
3698         count = 0;
3699         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3700         do {
3701                 int_status = readl(&ioc->chip->HostInterruptStatus);
3702                 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
3703                         dhsprintk(ioc, pr_info(MPT3SAS_FMT
3704                                 "%s: successful count(%d), timeout(%d)\n",
3705                                 ioc->name, __func__, count, timeout));
3706                         return 0;
3707                 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
3708                         doorbell = readl(&ioc->chip->Doorbell);
3709                         if ((doorbell & MPI2_IOC_STATE_MASK) ==
3710                             MPI2_IOC_STATE_FAULT) {
3711                                 mpt3sas_base_fault_info(ioc , doorbell);
3712                                 return -EFAULT;
3713                         }
3714                 } else if (int_status == 0xFFFFFFFF)
3715                         goto out;
3716
3717                 if (sleep_flag == CAN_SLEEP)
3718                         usleep_range(1000, 1500);
3719                 else
3720                         udelay(500);
3721                 count++;
3722         } while (--cntdn);
3723
3724  out:
3725         pr_err(MPT3SAS_FMT
3726          "%s: failed due to timeout count(%d), int_status(%x)!\n",
3727          ioc->name, __func__, count, int_status);
3728         return -EFAULT;
3729 }
3730
3731 /**
3732  * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
3733  * @ioc: per adapter object
3734  * @timeout: timeout in second
3735  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3736  *
3737  * Returns 0 for success, non-zero for failure.
3738  *
3739  */
3740 static int
3741 _base_wait_for_doorbell_not_used(struct MPT3SAS_ADAPTER *ioc, int timeout,
3742         int sleep_flag)
3743 {
3744         u32 cntdn, count;
3745         u32 doorbell_reg;
3746
3747         count = 0;
3748         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3749         do {
3750                 doorbell_reg = readl(&ioc->chip->Doorbell);
3751                 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
3752                         dhsprintk(ioc, pr_info(MPT3SAS_FMT
3753                                 "%s: successful count(%d), timeout(%d)\n",
3754                                 ioc->name, __func__, count, timeout));
3755                         return 0;
3756                 }
3757                 if (sleep_flag == CAN_SLEEP)
3758                         usleep_range(1000, 1500);
3759                 else
3760                         udelay(500);
3761                 count++;
3762         } while (--cntdn);
3763
3764         pr_err(MPT3SAS_FMT
3765                 "%s: failed due to timeout count(%d), doorbell_reg(%x)!\n",
3766                 ioc->name, __func__, count, doorbell_reg);
3767         return -EFAULT;
3768 }
3769
3770 /**
3771  * _base_send_ioc_reset - send doorbell reset
3772  * @ioc: per adapter object
3773  * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
3774  * @timeout: timeout in second
3775  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3776  *
3777  * Returns 0 for success, non-zero for failure.
3778  */
3779 static int
3780 _base_send_ioc_reset(struct MPT3SAS_ADAPTER *ioc, u8 reset_type, int timeout,
3781         int sleep_flag)
3782 {
3783         u32 ioc_state;
3784         int r = 0;
3785
3786         if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
3787                 pr_err(MPT3SAS_FMT "%s: unknown reset_type\n",
3788                     ioc->name, __func__);
3789                 return -EFAULT;
3790         }
3791
3792         if (!(ioc->facts.IOCCapabilities &
3793            MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
3794                 return -EFAULT;
3795
3796         pr_info(MPT3SAS_FMT "sending message unit reset !!\n", ioc->name);
3797
3798         writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
3799             &ioc->chip->Doorbell);
3800         if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
3801                 r = -EFAULT;
3802                 goto out;
3803         }
3804         ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
3805             timeout, sleep_flag);
3806         if (ioc_state) {
3807                 pr_err(MPT3SAS_FMT
3808                         "%s: failed going to ready state (ioc_state=0x%x)\n",
3809                         ioc->name, __func__, ioc_state);
3810                 r = -EFAULT;
3811                 goto out;
3812         }
3813  out:
3814         pr_info(MPT3SAS_FMT "message unit reset: %s\n",
3815             ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
3816         return r;
3817 }
3818
3819 /**
3820  * _base_handshake_req_reply_wait - send request thru doorbell interface
3821  * @ioc: per adapter object
3822  * @request_bytes: request length
3823  * @request: pointer having request payload
3824  * @reply_bytes: reply length
3825  * @reply: pointer to reply payload
3826  * @timeout: timeout in second
3827  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3828  *
3829  * Returns 0 for success, non-zero for failure.
3830  */
3831 static int
3832 _base_handshake_req_reply_wait(struct MPT3SAS_ADAPTER *ioc, int request_bytes,
3833         u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
3834 {
3835         MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
3836         int i;
3837         u8 failed;
3838         u16 dummy;
3839         __le32 *mfp;
3840
3841         /* make sure doorbell is not in use */
3842         if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
3843                 pr_err(MPT3SAS_FMT
3844                         "doorbell is in use (line=%d)\n",
3845                         ioc->name, __LINE__);
3846                 return -EFAULT;
3847         }
3848
3849         /* clear pending doorbell interrupts from previous state changes */
3850         if (readl(&ioc->chip->HostInterruptStatus) &
3851             MPI2_HIS_IOC2SYS_DB_STATUS)
3852                 writel(0, &ioc->chip->HostInterruptStatus);
3853
3854         /* send message to ioc */
3855         writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
3856             ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
3857             &ioc->chip->Doorbell);
3858
3859         if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
3860                 pr_err(MPT3SAS_FMT
3861                         "doorbell handshake int failed (line=%d)\n",
3862                         ioc->name, __LINE__);
3863                 return -EFAULT;
3864         }
3865         writel(0, &ioc->chip->HostInterruptStatus);
3866
3867         if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
3868                 pr_err(MPT3SAS_FMT
3869                         "doorbell handshake ack failed (line=%d)\n",
3870                         ioc->name, __LINE__);
3871                 return -EFAULT;
3872         }
3873
3874         /* send message 32-bits at a time */
3875         for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
3876                 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
3877                 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
3878                         failed = 1;
3879         }
3880
3881         if (failed) {
3882                 pr_err(MPT3SAS_FMT
3883                         "doorbell handshake sending request failed (line=%d)\n",
3884                         ioc->name, __LINE__);
3885                 return -EFAULT;
3886         }
3887
3888         /* now wait for the reply */
3889         if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
3890                 pr_err(MPT3SAS_FMT
3891                         "doorbell handshake int failed (line=%d)\n",
3892                         ioc->name, __LINE__);
3893                 return -EFAULT;
3894         }
3895
3896         /* read the first two 16-bits, it gives the total length of the reply */
3897         reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3898             & MPI2_DOORBELL_DATA_MASK);
3899         writel(0, &ioc->chip->HostInterruptStatus);
3900         if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3901                 pr_err(MPT3SAS_FMT
3902                         "doorbell handshake int failed (line=%d)\n",
3903                         ioc->name, __LINE__);
3904                 return -EFAULT;
3905         }
3906         reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3907             & MPI2_DOORBELL_DATA_MASK);
3908         writel(0, &ioc->chip->HostInterruptStatus);
3909
3910         for (i = 2; i < default_reply->MsgLength * 2; i++)  {
3911                 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3912                         pr_err(MPT3SAS_FMT
3913                                 "doorbell handshake int failed (line=%d)\n",
3914                                 ioc->name, __LINE__);
3915                         return -EFAULT;
3916                 }
3917                 if (i >=  reply_bytes/2) /* overflow case */
3918                         dummy = readl(&ioc->chip->Doorbell);
3919                 else
3920                         reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3921                             & MPI2_DOORBELL_DATA_MASK);
3922                 writel(0, &ioc->chip->HostInterruptStatus);
3923         }
3924
3925         _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
3926         if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
3927                 dhsprintk(ioc, pr_info(MPT3SAS_FMT
3928                         "doorbell is in use (line=%d)\n", ioc->name, __LINE__));
3929         }
3930         writel(0, &ioc->chip->HostInterruptStatus);
3931
3932         if (ioc->logging_level & MPT_DEBUG_INIT) {
3933                 mfp = (__le32 *)reply;
3934                 pr_info("\toffset:data\n");
3935                 for (i = 0; i < reply_bytes/4; i++)
3936                         pr_info("\t[0x%02x]:%08x\n", i*4,
3937                             le32_to_cpu(mfp[i]));
3938         }
3939         return 0;
3940 }
3941
3942 /**
3943  * mpt3sas_base_sas_iounit_control - send sas iounit control to FW
3944  * @ioc: per adapter object
3945  * @mpi_reply: the reply payload from FW
3946  * @mpi_request: the request payload sent to FW
3947  *
3948  * The SAS IO Unit Control Request message allows the host to perform low-level
3949  * operations, such as resets on the PHYs of the IO Unit, also allows the host
3950  * to obtain the IOC assigned device handles for a device if it has other
3951  * identifying information about the device, in addition allows the host to
3952  * remove IOC resources associated with the device.
3953  *
3954  * Returns 0 for success, non-zero for failure.
3955  */
3956 int
3957 mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
3958         Mpi2SasIoUnitControlReply_t *mpi_reply,
3959         Mpi2SasIoUnitControlRequest_t *mpi_request)
3960 {
3961         u16 smid;
3962         u32 ioc_state;
3963         unsigned long timeleft;
3964         bool issue_reset = false;
3965         int rc;
3966         void *request;
3967         u16 wait_state_count;
3968
3969         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
3970             __func__));
3971
3972         mutex_lock(&ioc->base_cmds.mutex);
3973
3974         if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) {
3975                 pr_err(MPT3SAS_FMT "%s: base_cmd in use\n",
3976                     ioc->name, __func__);
3977                 rc = -EAGAIN;
3978                 goto out;
3979         }
3980
3981         wait_state_count = 0;
3982         ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
3983         while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3984                 if (wait_state_count++ == 10) {
3985                         pr_err(MPT3SAS_FMT
3986                             "%s: failed due to ioc not operational\n",
3987                             ioc->name, __func__);
3988                         rc = -EFAULT;
3989                         goto out;
3990                 }
3991                 ssleep(1);
3992                 ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
3993                 pr_info(MPT3SAS_FMT
3994                         "%s: waiting for operational state(count=%d)\n",
3995                         ioc->name, __func__, wait_state_count);
3996         }
3997
3998         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
3999         if (!smid) {
4000                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4001                     ioc->name, __func__);
4002                 rc = -EAGAIN;
4003                 goto out;
4004         }
4005
4006         rc = 0;
4007         ioc->base_cmds.status = MPT3_CMD_PENDING;
4008         request = mpt3sas_base_get_msg_frame(ioc, smid);
4009         ioc->base_cmds.smid = smid;
4010         memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
4011         if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
4012             mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
4013                 ioc->ioc_link_reset_in_progress = 1;
4014         init_completion(&ioc->base_cmds.done);
4015         mpt3sas_base_put_smid_default(ioc, smid);
4016         timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
4017             msecs_to_jiffies(10000));
4018         if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
4019             mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
4020             ioc->ioc_link_reset_in_progress)
4021                 ioc->ioc_link_reset_in_progress = 0;
4022         if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
4023                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4024                     ioc->name, __func__);
4025                 _debug_dump_mf(mpi_request,
4026                     sizeof(Mpi2SasIoUnitControlRequest_t)/4);
4027                 if (!(ioc->base_cmds.status & MPT3_CMD_RESET))
4028                         issue_reset = true;
4029                 goto issue_host_reset;
4030         }
4031         if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID)
4032                 memcpy(mpi_reply, ioc->base_cmds.reply,
4033                     sizeof(Mpi2SasIoUnitControlReply_t));
4034         else
4035                 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
4036         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4037         goto out;
4038
4039  issue_host_reset:
4040         if (issue_reset)
4041                 mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
4042                     FORCE_BIG_HAMMER);
4043         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4044         rc = -EFAULT;
4045  out:
4046         mutex_unlock(&ioc->base_cmds.mutex);
4047         return rc;
4048 }
4049
4050 /**
4051  * mpt3sas_base_scsi_enclosure_processor - sending request to sep device
4052  * @ioc: per adapter object
4053  * @mpi_reply: the reply payload from FW
4054  * @mpi_request: the request payload sent to FW
4055  *
4056  * The SCSI Enclosure Processor request message causes the IOC to
4057  * communicate with SES devices to control LED status signals.
4058  *
4059  * Returns 0 for success, non-zero for failure.
4060  */
4061 int
4062 mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
4063         Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
4064 {
4065         u16 smid;
4066         u32 ioc_state;
4067         unsigned long timeleft;
4068         bool issue_reset = false;
4069         int rc;
4070         void *request;
4071         u16 wait_state_count;
4072
4073         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4074             __func__));
4075
4076         mutex_lock(&ioc->base_cmds.mutex);
4077
4078         if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) {
4079                 pr_err(MPT3SAS_FMT "%s: base_cmd in use\n",
4080                     ioc->name, __func__);
4081                 rc = -EAGAIN;
4082                 goto out;
4083         }
4084
4085         wait_state_count = 0;
4086         ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
4087         while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
4088                 if (wait_state_count++ == 10) {
4089                         pr_err(MPT3SAS_FMT
4090                             "%s: failed due to ioc not operational\n",
4091                             ioc->name, __func__);
4092                         rc = -EFAULT;
4093                         goto out;
4094                 }
4095                 ssleep(1);
4096                 ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
4097                 pr_info(MPT3SAS_FMT
4098                         "%s: waiting for operational state(count=%d)\n",
4099                         ioc->name,
4100                     __func__, wait_state_count);
4101         }
4102
4103         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
4104         if (!smid) {
4105                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4106                     ioc->name, __func__);
4107                 rc = -EAGAIN;
4108                 goto out;
4109         }
4110
4111         rc = 0;
4112         ioc->base_cmds.status = MPT3_CMD_PENDING;
4113         request = mpt3sas_base_get_msg_frame(ioc, smid);
4114         ioc->base_cmds.smid = smid;
4115         memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
4116         init_completion(&ioc->base_cmds.done);
4117         mpt3sas_base_put_smid_default(ioc, smid);
4118         timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
4119             msecs_to_jiffies(10000));
4120         if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
4121                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4122                     ioc->name, __func__);
4123                 _debug_dump_mf(mpi_request,
4124                     sizeof(Mpi2SepRequest_t)/4);
4125                 if (!(ioc->base_cmds.status & MPT3_CMD_RESET))
4126                         issue_reset = false;
4127                 goto issue_host_reset;
4128         }
4129         if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID)
4130                 memcpy(mpi_reply, ioc->base_cmds.reply,
4131                     sizeof(Mpi2SepReply_t));
4132         else
4133                 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
4134         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4135         goto out;
4136
4137  issue_host_reset:
4138         if (issue_reset)
4139                 mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
4140                     FORCE_BIG_HAMMER);
4141         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4142         rc = -EFAULT;
4143  out:
4144         mutex_unlock(&ioc->base_cmds.mutex);
4145         return rc;
4146 }
4147
4148 /**
4149  * _base_get_port_facts - obtain port facts reply and save in ioc
4150  * @ioc: per adapter object
4151  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4152  *
4153  * Returns 0 for success, non-zero for failure.
4154  */
4155 static int
4156 _base_get_port_facts(struct MPT3SAS_ADAPTER *ioc, int port, int sleep_flag)
4157 {
4158         Mpi2PortFactsRequest_t mpi_request;
4159         Mpi2PortFactsReply_t mpi_reply;
4160         struct mpt3sas_port_facts *pfacts;
4161         int mpi_reply_sz, mpi_request_sz, r;
4162
4163         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4164             __func__));
4165
4166         mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
4167         mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
4168         memset(&mpi_request, 0, mpi_request_sz);
4169         mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
4170         mpi_request.PortNumber = port;
4171         r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
4172             (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
4173
4174         if (r != 0) {
4175                 pr_err(MPT3SAS_FMT "%s: handshake failed (r=%d)\n",
4176                     ioc->name, __func__, r);
4177                 return r;
4178         }
4179
4180         pfacts = &ioc->pfacts[port];
4181         memset(pfacts, 0, sizeof(struct mpt3sas_port_facts));
4182         pfacts->PortNumber = mpi_reply.PortNumber;
4183         pfacts->VP_ID = mpi_reply.VP_ID;
4184         pfacts->VF_ID = mpi_reply.VF_ID;
4185         pfacts->MaxPostedCmdBuffers =
4186             le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
4187
4188         return 0;
4189 }
4190
4191 /**
4192  * _base_wait_for_iocstate - Wait until the card is in READY or OPERATIONAL
4193  * @ioc: per adapter object
4194  * @timeout:
4195  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4196  *
4197  * Returns 0 for success, non-zero for failure.
4198  */
4199 static int
4200 _base_wait_for_iocstate(struct MPT3SAS_ADAPTER *ioc, int timeout,
4201         int sleep_flag)
4202 {
4203         u32 ioc_state;
4204         int rc;
4205
4206         dinitprintk(ioc, printk(MPT3SAS_FMT "%s\n", ioc->name,
4207             __func__));
4208
4209         if (ioc->pci_error_recovery) {
4210                 dfailprintk(ioc, printk(MPT3SAS_FMT
4211                     "%s: host in pci error recovery\n", ioc->name, __func__));
4212                 return -EFAULT;
4213         }
4214
4215         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
4216         dhsprintk(ioc, printk(MPT3SAS_FMT "%s: ioc_state(0x%08x)\n",
4217             ioc->name, __func__, ioc_state));
4218
4219         if (((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY) ||
4220             (ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
4221                 return 0;
4222
4223         if (ioc_state & MPI2_DOORBELL_USED) {
4224                 dhsprintk(ioc, printk(MPT3SAS_FMT
4225                     "unexpected doorbell active!\n", ioc->name));
4226                 goto issue_diag_reset;
4227         }
4228
4229         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
4230                 mpt3sas_base_fault_info(ioc, ioc_state &
4231                     MPI2_DOORBELL_DATA_MASK);
4232                 goto issue_diag_reset;
4233         }
4234
4235         ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
4236             timeout, sleep_flag);
4237         if (ioc_state) {
4238                 dfailprintk(ioc, printk(MPT3SAS_FMT
4239                     "%s: failed going to ready state (ioc_state=0x%x)\n",
4240                     ioc->name, __func__, ioc_state));
4241                 return -EFAULT;
4242         }
4243
4244  issue_diag_reset:
4245         rc = _base_diag_reset(ioc, sleep_flag);
4246         return rc;
4247 }
4248
4249 /**
4250  * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
4251  * @ioc: per adapter object
4252  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4253  *
4254  * Returns 0 for success, non-zero for failure.
4255  */
4256 static int
4257 _base_get_ioc_facts(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4258 {
4259         Mpi2IOCFactsRequest_t mpi_request;
4260         Mpi2IOCFactsReply_t mpi_reply;
4261         struct mpt3sas_facts *facts;
4262         int mpi_reply_sz, mpi_request_sz, r;
4263
4264         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4265             __func__));
4266
4267         r = _base_wait_for_iocstate(ioc, 10, sleep_flag);
4268         if (r) {
4269                 dfailprintk(ioc, printk(MPT3SAS_FMT
4270                     "%s: failed getting to correct state\n",
4271                     ioc->name, __func__));
4272                 return r;
4273         }
4274         mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
4275         mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
4276         memset(&mpi_request, 0, mpi_request_sz);
4277         mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
4278         r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
4279             (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
4280
4281         if (r != 0) {
4282                 pr_err(MPT3SAS_FMT "%s: handshake failed (r=%d)\n",
4283                     ioc->name, __func__, r);
4284                 return r;
4285         }
4286
4287         facts = &ioc->facts;
4288         memset(facts, 0, sizeof(struct mpt3sas_facts));
4289         facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
4290         facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
4291         facts->VP_ID = mpi_reply.VP_ID;
4292         facts->VF_ID = mpi_reply.VF_ID;
4293         facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
4294         facts->MaxChainDepth = mpi_reply.MaxChainDepth;
4295         facts->WhoInit = mpi_reply.WhoInit;
4296         facts->NumberOfPorts = mpi_reply.NumberOfPorts;
4297         facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
4298         facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
4299         facts->MaxReplyDescriptorPostQueueDepth =
4300             le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
4301         facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
4302         facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
4303         if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
4304                 ioc->ir_firmware = 1;
4305         if ((facts->IOCCapabilities &
4306               MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE))
4307                 ioc->rdpq_array_capable = 1;
4308         facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
4309         facts->IOCRequestFrameSize =
4310             le16_to_cpu(mpi_reply.IOCRequestFrameSize);
4311         facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
4312         facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
4313         ioc->shost->max_id = -1;
4314         facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
4315         facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
4316         facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
4317         facts->HighPriorityCredit =
4318             le16_to_cpu(mpi_reply.HighPriorityCredit);
4319         facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
4320         facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
4321
4322         dinitprintk(ioc, pr_info(MPT3SAS_FMT
4323                 "hba queue depth(%d), max chains per io(%d)\n",
4324                 ioc->name, facts->RequestCredit,
4325             facts->MaxChainDepth));
4326         dinitprintk(ioc, pr_info(MPT3SAS_FMT
4327                 "request frame size(%d), reply frame size(%d)\n", ioc->name,
4328             facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
4329         return 0;
4330 }
4331
4332 /**
4333  * _base_send_ioc_init - send ioc_init to firmware
4334  * @ioc: per adapter object
4335  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4336  *
4337  * Returns 0 for success, non-zero for failure.
4338  */
4339 static int
4340 _base_send_ioc_init(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4341 {
4342         Mpi2IOCInitRequest_t mpi_request;
4343         Mpi2IOCInitReply_t mpi_reply;
4344         int i, r = 0;
4345         struct timeval current_time;
4346         u16 ioc_status;
4347         u32 reply_post_free_array_sz = 0;
4348         Mpi2IOCInitRDPQArrayEntry *reply_post_free_array = NULL;
4349         dma_addr_t reply_post_free_array_dma;
4350
4351         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4352             __func__));
4353
4354         memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
4355         mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
4356         mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
4357         mpi_request.VF_ID = 0; /* TODO */
4358         mpi_request.VP_ID = 0;
4359         mpi_request.MsgVersion = cpu_to_le16(ioc->hba_mpi_version_belonged);
4360         mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
4361
4362         if (_base_is_controller_msix_enabled(ioc))
4363                 mpi_request.HostMSIxVectors = ioc->reply_queue_count;
4364         mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
4365         mpi_request.ReplyDescriptorPostQueueDepth =
4366             cpu_to_le16(ioc->reply_post_queue_depth);
4367         mpi_request.ReplyFreeQueueDepth =
4368             cpu_to_le16(ioc->reply_free_queue_depth);
4369
4370         mpi_request.SenseBufferAddressHigh =
4371             cpu_to_le32((u64)ioc->sense_dma >> 32);
4372         mpi_request.SystemReplyAddressHigh =
4373             cpu_to_le32((u64)ioc->reply_dma >> 32);
4374         mpi_request.SystemRequestFrameBaseAddress =
4375             cpu_to_le64((u64)ioc->request_dma);
4376         mpi_request.ReplyFreeQueueAddress =
4377             cpu_to_le64((u64)ioc->reply_free_dma);
4378
4379         if (ioc->rdpq_array_enable) {
4380                 reply_post_free_array_sz = ioc->reply_queue_count *
4381                     sizeof(Mpi2IOCInitRDPQArrayEntry);
4382                 reply_post_free_array = pci_alloc_consistent(ioc->pdev,
4383                         reply_post_free_array_sz, &reply_post_free_array_dma);
4384                 if (!reply_post_free_array) {
4385                         pr_err(MPT3SAS_FMT
4386                         "reply_post_free_array: pci_alloc_consistent failed\n",
4387                         ioc->name);
4388                         r = -ENOMEM;
4389                         goto out;
4390                 }
4391                 memset(reply_post_free_array, 0, reply_post_free_array_sz);
4392                 for (i = 0; i < ioc->reply_queue_count; i++)
4393                         reply_post_free_array[i].RDPQBaseAddress =
4394                             cpu_to_le64(
4395                                 (u64)ioc->reply_post[i].reply_post_free_dma);
4396                 mpi_request.MsgFlags = MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE;
4397                 mpi_request.ReplyDescriptorPostQueueAddress =
4398                     cpu_to_le64((u64)reply_post_free_array_dma);
4399         } else {
4400                 mpi_request.ReplyDescriptorPostQueueAddress =
4401                     cpu_to_le64((u64)ioc->reply_post[0].reply_post_free_dma);
4402         }
4403
4404         /* This time stamp specifies number of milliseconds
4405          * since epoch ~ midnight January 1, 1970.
4406          */
4407         do_gettimeofday(&current_time);
4408         mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
4409             (current_time.tv_usec / 1000));
4410
4411         if (ioc->logging_level & MPT_DEBUG_INIT) {
4412                 __le32 *mfp;
4413                 int i;
4414
4415                 mfp = (__le32 *)&mpi_request;
4416                 pr_info("\toffset:data\n");
4417                 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
4418                         pr_info("\t[0x%02x]:%08x\n", i*4,
4419                             le32_to_cpu(mfp[i]));
4420         }
4421
4422         r = _base_handshake_req_reply_wait(ioc,
4423             sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
4424             sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
4425             sleep_flag);
4426
4427         if (r != 0) {
4428                 pr_err(MPT3SAS_FMT "%s: handshake failed (r=%d)\n",
4429                     ioc->name, __func__, r);
4430                 goto out;
4431         }
4432
4433         ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
4434         if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
4435             mpi_reply.IOCLogInfo) {
4436                 pr_err(MPT3SAS_FMT "%s: failed\n", ioc->name, __func__);
4437                 r = -EIO;
4438         }
4439
4440 out:
4441         if (reply_post_free_array)
4442                 pci_free_consistent(ioc->pdev, reply_post_free_array_sz,
4443                                     reply_post_free_array,
4444                                     reply_post_free_array_dma);
4445         return r;
4446 }
4447
4448 /**
4449  * mpt3sas_port_enable_done - command completion routine for port enable
4450  * @ioc: per adapter object
4451  * @smid: system request message index
4452  * @msix_index: MSIX table index supplied by the OS
4453  * @reply: reply message frame(lower 32bit addr)
4454  *
4455  * Return 1 meaning mf should be freed from _base_interrupt
4456  *        0 means the mf is freed from this function.
4457  */
4458 u8
4459 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
4460         u32 reply)
4461 {
4462         MPI2DefaultReply_t *mpi_reply;
4463         u16 ioc_status;
4464
4465         if (ioc->port_enable_cmds.status == MPT3_CMD_NOT_USED)
4466                 return 1;
4467
4468         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
4469         if (!mpi_reply)
4470                 return 1;
4471
4472         if (mpi_reply->Function != MPI2_FUNCTION_PORT_ENABLE)
4473                 return 1;
4474
4475         ioc->port_enable_cmds.status &= ~MPT3_CMD_PENDING;
4476         ioc->port_enable_cmds.status |= MPT3_CMD_COMPLETE;
4477         ioc->port_enable_cmds.status |= MPT3_CMD_REPLY_VALID;
4478         memcpy(ioc->port_enable_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
4479         ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
4480         if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
4481                 ioc->port_enable_failed = 1;
4482
4483         if (ioc->is_driver_loading) {
4484                 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
4485                         mpt3sas_port_enable_complete(ioc);
4486                         return 1;
4487                 } else {
4488                         ioc->start_scan_failed = ioc_status;
4489                         ioc->start_scan = 0;
4490                         return 1;
4491                 }
4492         }
4493         complete(&ioc->port_enable_cmds.done);
4494         return 1;
4495 }
4496
4497 /**
4498  * _base_send_port_enable - send port_enable(discovery stuff) to firmware
4499  * @ioc: per adapter object
4500  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4501  *
4502  * Returns 0 for success, non-zero for failure.
4503  */
4504 static int
4505 _base_send_port_enable(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4506 {
4507         Mpi2PortEnableRequest_t *mpi_request;
4508         Mpi2PortEnableReply_t *mpi_reply;
4509         unsigned long timeleft;
4510         int r = 0;
4511         u16 smid;
4512         u16 ioc_status;
4513
4514         pr_info(MPT3SAS_FMT "sending port enable !!\n", ioc->name);
4515
4516         if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) {
4517                 pr_err(MPT3SAS_FMT "%s: internal command already in use\n",
4518                     ioc->name, __func__);
4519                 return -EAGAIN;
4520         }
4521
4522         smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
4523         if (!smid) {
4524                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4525                     ioc->name, __func__);
4526                 return -EAGAIN;
4527         }
4528
4529         ioc->port_enable_cmds.status = MPT3_CMD_PENDING;
4530         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
4531         ioc->port_enable_cmds.smid = smid;
4532         memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
4533         mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
4534
4535         init_completion(&ioc->port_enable_cmds.done);
4536         mpt3sas_base_put_smid_default(ioc, smid);
4537         timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
4538             300*HZ);
4539         if (!(ioc->port_enable_cmds.status & MPT3_CMD_COMPLETE)) {
4540                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4541                     ioc->name, __func__);
4542                 _debug_dump_mf(mpi_request,
4543                     sizeof(Mpi2PortEnableRequest_t)/4);
4544                 if (ioc->port_enable_cmds.status & MPT3_CMD_RESET)
4545                         r = -EFAULT;
4546                 else
4547                         r = -ETIME;
4548                 goto out;
4549         }
4550
4551         mpi_reply = ioc->port_enable_cmds.reply;
4552         ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
4553         if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
4554                 pr_err(MPT3SAS_FMT "%s: failed with (ioc_status=0x%08x)\n",
4555                     ioc->name, __func__, ioc_status);
4556                 r = -EFAULT;
4557                 goto out;
4558         }
4559
4560  out:
4561         ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED;
4562         pr_info(MPT3SAS_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
4563             "SUCCESS" : "FAILED"));
4564         return r;
4565 }
4566
4567 /**
4568  * mpt3sas_port_enable - initiate firmware discovery (don't wait for reply)
4569  * @ioc: per adapter object
4570  *
4571  * Returns 0 for success, non-zero for failure.
4572  */
4573 int
4574 mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc)
4575 {
4576         Mpi2PortEnableRequest_t *mpi_request;
4577         u16 smid;
4578
4579         pr_info(MPT3SAS_FMT "sending port enable !!\n", ioc->name);
4580
4581         if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) {
4582                 pr_err(MPT3SAS_FMT "%s: internal command already in use\n",
4583                     ioc->name, __func__);
4584                 return -EAGAIN;
4585         }
4586
4587         smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
4588         if (!smid) {
4589                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4590                     ioc->name, __func__);
4591                 return -EAGAIN;
4592         }
4593
4594         ioc->port_enable_cmds.status = MPT3_CMD_PENDING;
4595         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
4596         ioc->port_enable_cmds.smid = smid;
4597         memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
4598         mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
4599
4600         mpt3sas_base_put_smid_default(ioc, smid);
4601         return 0;
4602 }
4603
4604 /**
4605  * _base_determine_wait_on_discovery - desposition
4606  * @ioc: per adapter object
4607  *
4608  * Decide whether to wait on discovery to complete. Used to either
4609  * locate boot device, or report volumes ahead of physical devices.
4610  *
4611  * Returns 1 for wait, 0 for don't wait
4612  */
4613 static int
4614 _base_determine_wait_on_discovery(struct MPT3SAS_ADAPTER *ioc)
4615 {
4616         /* We wait for discovery to complete if IR firmware is loaded.
4617          * The sas topology events arrive before PD events, so we need time to
4618          * turn on the bit in ioc->pd_handles to indicate PD
4619          * Also, it maybe required to report Volumes ahead of physical
4620          * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
4621          */
4622         if (ioc->ir_firmware)
4623                 return 1;
4624
4625         /* if no Bios, then we don't need to wait */
4626         if (!ioc->bios_pg3.BiosVersion)
4627                 return 0;
4628
4629         /* Bios is present, then we drop down here.
4630          *
4631          * If there any entries in the Bios Page 2, then we wait
4632          * for discovery to complete.
4633          */
4634
4635         /* Current Boot Device */
4636         if ((ioc->bios_pg2.CurrentBootDeviceForm &
4637             MPI2_BIOSPAGE2_FORM_MASK) ==
4638             MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
4639         /* Request Boot Device */
4640            (ioc->bios_pg2.ReqBootDeviceForm &
4641             MPI2_BIOSPAGE2_FORM_MASK) ==
4642             MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
4643         /* Alternate Request Boot Device */
4644            (ioc->bios_pg2.ReqAltBootDeviceForm &
4645             MPI2_BIOSPAGE2_FORM_MASK) ==
4646             MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
4647                 return 0;
4648
4649         return 1;
4650 }
4651
4652 /**
4653  * _base_unmask_events - turn on notification for this event
4654  * @ioc: per adapter object
4655  * @event: firmware event
4656  *
4657  * The mask is stored in ioc->event_masks.
4658  */
4659 static void
4660 _base_unmask_events(struct MPT3SAS_ADAPTER *ioc, u16 event)
4661 {
4662         u32 desired_event;
4663
4664         if (event >= 128)
4665                 return;
4666
4667         desired_event = (1 << (event % 32));
4668
4669         if (event < 32)
4670                 ioc->event_masks[0] &= ~desired_event;
4671         else if (event < 64)
4672                 ioc->event_masks[1] &= ~desired_event;
4673         else if (event < 96)
4674                 ioc->event_masks[2] &= ~desired_event;
4675         else if (event < 128)
4676                 ioc->event_masks[3] &= ~desired_event;
4677 }
4678
4679 /**
4680  * _base_event_notification - send event notification
4681  * @ioc: per adapter object
4682  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4683  *
4684  * Returns 0 for success, non-zero for failure.
4685  */
4686 static int
4687 _base_event_notification(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4688 {
4689         Mpi2EventNotificationRequest_t *mpi_request;
4690         unsigned long timeleft;
4691         u16 smid;
4692         int r = 0;
4693         int i;
4694
4695         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4696             __func__));
4697
4698         if (ioc->base_cmds.status & MPT3_CMD_PENDING) {
4699                 pr_err(MPT3SAS_FMT "%s: internal command already in use\n",
4700                     ioc->name, __func__);
4701                 return -EAGAIN;
4702         }
4703
4704         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
4705         if (!smid) {
4706                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4707                     ioc->name, __func__);
4708                 return -EAGAIN;
4709         }
4710         ioc->base_cmds.status = MPT3_CMD_PENDING;
4711         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
4712         ioc->base_cmds.smid = smid;
4713         memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
4714         mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
4715         mpi_request->VF_ID = 0; /* TODO */
4716         mpi_request->VP_ID = 0;
4717         for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
4718                 mpi_request->EventMasks[i] =
4719                     cpu_to_le32(ioc->event_masks[i]);
4720         init_completion(&ioc->base_cmds.done);
4721         mpt3sas_base_put_smid_default(ioc, smid);
4722         timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
4723         if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
4724                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4725                     ioc->name, __func__);
4726                 _debug_dump_mf(mpi_request,
4727                     sizeof(Mpi2EventNotificationRequest_t)/4);
4728                 if (ioc->base_cmds.status & MPT3_CMD_RESET)
4729                         r = -EFAULT;
4730                 else
4731                         r = -ETIME;
4732         } else
4733                 dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s: complete\n",
4734                     ioc->name, __func__));
4735         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4736         return r;
4737 }
4738
4739 /**
4740  * mpt3sas_base_validate_event_type - validating event types
4741  * @ioc: per adapter object
4742  * @event: firmware event
4743  *
4744  * This will turn on firmware event notification when application
4745  * ask for that event. We don't mask events that are already enabled.
4746  */
4747 void
4748 mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc, u32 *event_type)
4749 {
4750         int i, j;
4751         u32 event_mask, desired_event;
4752         u8 send_update_to_fw;
4753
4754         for (i = 0, send_update_to_fw = 0; i <
4755             MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
4756                 event_mask = ~event_type[i];
4757                 desired_event = 1;
4758                 for (j = 0; j < 32; j++) {
4759                         if (!(event_mask & desired_event) &&
4760                             (ioc->event_masks[i] & desired_event)) {
4761                                 ioc->event_masks[i] &= ~desired_event;
4762                                 send_update_to_fw = 1;
4763                         }
4764                         desired_event = (desired_event << 1);
4765                 }
4766         }
4767
4768         if (!send_update_to_fw)
4769                 return;
4770
4771         mutex_lock(&ioc->base_cmds.mutex);
4772         _base_event_notification(ioc, CAN_SLEEP);
4773         mutex_unlock(&ioc->base_cmds.mutex);
4774 }
4775
4776 /**
4777  * _base_diag_reset - the "big hammer" start of day reset
4778  * @ioc: per adapter object
4779  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4780  *
4781  * Returns 0 for success, non-zero for failure.
4782  */
4783 static int
4784 _base_diag_reset(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4785 {
4786         u32 host_diagnostic;
4787         u32 ioc_state;
4788         u32 count;
4789         u32 hcb_size;
4790
4791         pr_info(MPT3SAS_FMT "sending diag reset !!\n", ioc->name);
4792
4793         drsprintk(ioc, pr_info(MPT3SAS_FMT "clear interrupts\n",
4794             ioc->name));
4795
4796         count = 0;
4797         do {
4798                 /* Write magic sequence to WriteSequence register
4799                  * Loop until in diagnostic mode
4800                  */
4801                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4802                         "write magic sequence\n", ioc->name));
4803                 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
4804                 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
4805                 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
4806                 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
4807                 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
4808                 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
4809                 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
4810
4811                 /* wait 100 msec */
4812                 if (sleep_flag == CAN_SLEEP)
4813                         msleep(100);
4814                 else
4815                         mdelay(100);
4816
4817                 if (count++ > 20)
4818                         goto out;
4819
4820                 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
4821                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4822                         "wrote magic sequence: count(%d), host_diagnostic(0x%08x)\n",
4823                     ioc->name, count, host_diagnostic));
4824
4825         } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
4826
4827         hcb_size = readl(&ioc->chip->HCBSize);
4828
4829         drsprintk(ioc, pr_info(MPT3SAS_FMT "diag reset: issued\n",
4830             ioc->name));
4831         writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
4832              &ioc->chip->HostDiagnostic);
4833
4834         /*This delay allows the chip PCIe hardware time to finish reset tasks*/
4835         if (sleep_flag == CAN_SLEEP)
4836                 msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
4837         else
4838                 mdelay(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
4839
4840         /* Approximately 300 second max wait */
4841         for (count = 0; count < (300000000 /
4842                 MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC); count++) {
4843
4844                 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
4845
4846                 if (host_diagnostic == 0xFFFFFFFF)
4847                         goto out;
4848                 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
4849                         break;
4850
4851                 /* Wait to pass the second read delay window */
4852                 if (sleep_flag == CAN_SLEEP)
4853                         msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
4854                                                                 / 1000);
4855                 else
4856                         mdelay(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
4857                                                                 / 1000);
4858         }
4859
4860         if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
4861
4862                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4863                 "restart the adapter assuming the HCB Address points to good F/W\n",
4864                     ioc->name));
4865                 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
4866                 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
4867                 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
4868
4869                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4870                     "re-enable the HCDW\n", ioc->name));
4871                 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
4872                     &ioc->chip->HCBSize);
4873         }
4874
4875         drsprintk(ioc, pr_info(MPT3SAS_FMT "restart the adapter\n",
4876             ioc->name));
4877         writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
4878             &ioc->chip->HostDiagnostic);
4879
4880         drsprintk(ioc, pr_info(MPT3SAS_FMT
4881                 "disable writes to the diagnostic register\n", ioc->name));
4882         writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
4883
4884         drsprintk(ioc, pr_info(MPT3SAS_FMT
4885                 "Wait for FW to go to the READY state\n", ioc->name));
4886         ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
4887             sleep_flag);
4888         if (ioc_state) {
4889                 pr_err(MPT3SAS_FMT
4890                         "%s: failed going to ready state (ioc_state=0x%x)\n",
4891                         ioc->name, __func__, ioc_state);
4892                 goto out;
4893         }
4894
4895         pr_info(MPT3SAS_FMT "diag reset: SUCCESS\n", ioc->name);
4896         return 0;
4897
4898  out:
4899         pr_err(MPT3SAS_FMT "diag reset: FAILED\n", ioc->name);
4900         return -EFAULT;
4901 }
4902
4903 /**
4904  * _base_make_ioc_ready - put controller in READY state
4905  * @ioc: per adapter object
4906  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4907  * @type: FORCE_BIG_HAMMER or SOFT_RESET
4908  *
4909  * Returns 0 for success, non-zero for failure.
4910  */
4911 static int
4912 _base_make_ioc_ready(struct MPT3SAS_ADAPTER *ioc, int sleep_flag,
4913         enum reset_type type)
4914 {
4915         u32 ioc_state;
4916         int rc;
4917         int count;
4918
4919         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4920             __func__));
4921
4922         if (ioc->pci_error_recovery)
4923                 return 0;
4924
4925         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
4926         dhsprintk(ioc, pr_info(MPT3SAS_FMT "%s: ioc_state(0x%08x)\n",
4927             ioc->name, __func__, ioc_state));
4928
4929         /* if in RESET state, it should move to READY state shortly */
4930         count = 0;
4931         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_RESET) {
4932                 while ((ioc_state & MPI2_IOC_STATE_MASK) !=
4933                     MPI2_IOC_STATE_READY) {
4934                         if (count++ == 10) {
4935                                 pr_err(MPT3SAS_FMT
4936                                         "%s: failed going to ready state (ioc_state=0x%x)\n",
4937                                     ioc->name, __func__, ioc_state);
4938                                 return -EFAULT;
4939                         }
4940                         if (sleep_flag == CAN_SLEEP)
4941                                 ssleep(1);
4942                         else
4943                                 mdelay(1000);
4944                         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
4945                 }
4946         }
4947
4948         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
4949                 return 0;
4950
4951         if (ioc_state & MPI2_DOORBELL_USED) {
4952                 dhsprintk(ioc, pr_info(MPT3SAS_FMT
4953                         "unexpected doorbell active!\n",
4954                         ioc->name));
4955                 goto issue_diag_reset;
4956         }
4957
4958         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
4959                 mpt3sas_base_fault_info(ioc, ioc_state &
4960                     MPI2_DOORBELL_DATA_MASK);
4961                 goto issue_diag_reset;
4962         }
4963
4964         if (type == FORCE_BIG_HAMMER)
4965                 goto issue_diag_reset;
4966
4967         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
4968                 if (!(_base_send_ioc_reset(ioc,
4969                     MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
4970                         return 0;
4971         }
4972
4973  issue_diag_reset:
4974         rc = _base_diag_reset(ioc, CAN_SLEEP);
4975         return rc;
4976 }
4977
4978 /**
4979  * _base_make_ioc_operational - put controller in OPERATIONAL state
4980  * @ioc: per adapter object
4981  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4982  *
4983  * Returns 0 for success, non-zero for failure.
4984  */
4985 static int
4986 _base_make_ioc_operational(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4987 {
4988         int r, i, index;
4989         unsigned long   flags;
4990         u32 reply_address;
4991         u16 smid;
4992         struct _tr_list *delayed_tr, *delayed_tr_next;
4993         u8 hide_flag;
4994         struct adapter_reply_queue *reply_q;
4995         Mpi2ReplyDescriptorsUnion_t *reply_post_free_contig;
4996
4997         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4998             __func__));
4999
5000         /* clean the delayed target reset list */
5001         list_for_each_entry_safe(delayed_tr, delayed_tr_next,
5002             &ioc->delayed_tr_list, list) {
5003                 list_del(&delayed_tr->list);
5004                 kfree(delayed_tr);
5005         }
5006
5007
5008         list_for_each_entry_safe(delayed_tr, delayed_tr_next,
5009             &ioc->delayed_tr_volume_list, list) {
5010                 list_del(&delayed_tr->list);
5011                 kfree(delayed_tr);
5012         }
5013
5014         /* initialize the scsi lookup free list */
5015         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
5016         INIT_LIST_HEAD(&ioc->free_list);
5017         smid = 1;
5018         for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
5019                 INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
5020                 ioc->scsi_lookup[i].cb_idx = 0xFF;
5021                 ioc->scsi_lookup[i].smid = smid;
5022                 ioc->scsi_lookup[i].scmd = NULL;
5023                 ioc->scsi_lookup[i].direct_io = 0;
5024                 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
5025                     &ioc->free_list);
5026         }
5027
5028         /* hi-priority queue */
5029         INIT_LIST_HEAD(&ioc->hpr_free_list);
5030         smid = ioc->hi_priority_smid;
5031         for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
5032                 ioc->hpr_lookup[i].cb_idx = 0xFF;
5033                 ioc->hpr_lookup[i].smid = smid;
5034                 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
5035                     &ioc->hpr_free_list);
5036         }
5037
5038         /* internal queue */
5039         INIT_LIST_HEAD(&ioc->internal_free_list);
5040         smid = ioc->internal_smid;
5041         for (i = 0; i < ioc->internal_depth; i++, smid++) {
5042                 ioc->internal_lookup[i].cb_idx = 0xFF;
5043                 ioc->internal_lookup[i].smid = smid;
5044                 list_add_tail(&ioc->internal_lookup[i].tracker_list,
5045                     &ioc->internal_free_list);
5046         }
5047
5048         /* chain pool */
5049         INIT_LIST_HEAD(&ioc->free_chain_list);
5050         for (i = 0; i < ioc->chain_depth; i++)
5051                 list_add_tail(&ioc->chain_lookup[i].tracker_list,
5052                     &ioc->free_chain_list);
5053
5054         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
5055
5056         /* initialize Reply Free Queue */
5057         for (i = 0, reply_address = (u32)ioc->reply_dma ;
5058             i < ioc->reply_free_queue_depth ; i++, reply_address +=
5059             ioc->reply_sz)
5060                 ioc->reply_free[i] = cpu_to_le32(reply_address);
5061
5062         /* initialize reply queues */
5063         if (ioc->is_driver_loading)
5064                 _base_assign_reply_queues(ioc);
5065
5066         /* initialize Reply Post Free Queue */
5067         index = 0;
5068         reply_post_free_contig = ioc->reply_post[0].reply_post_free;
5069         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
5070                 /*
5071                  * If RDPQ is enabled, switch to the next allocation.
5072                  * Otherwise advance within the contiguous region.
5073                  */
5074                 if (ioc->rdpq_array_enable) {
5075                         reply_q->reply_post_free =
5076                                 ioc->reply_post[index++].reply_post_free;
5077                 } else {
5078                         reply_q->reply_post_free = reply_post_free_contig;
5079                         reply_post_free_contig += ioc->reply_post_queue_depth;
5080                 }
5081
5082                 reply_q->reply_post_host_index = 0;
5083                 for (i = 0; i < ioc->reply_post_queue_depth; i++)
5084                         reply_q->reply_post_free[i].Words =
5085                             cpu_to_le64(ULLONG_MAX);
5086                 if (!_base_is_controller_msix_enabled(ioc))
5087                         goto skip_init_reply_post_free_queue;
5088         }
5089  skip_init_reply_post_free_queue:
5090
5091         r = _base_send_ioc_init(ioc, sleep_flag);
5092         if (r)
5093                 return r;
5094
5095         /* initialize reply free host index */
5096         ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
5097         writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
5098
5099         /* initialize reply post host index */
5100         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
5101                 if (ioc->msix96_vector)
5102                         writel((reply_q->msix_index & 7)<<
5103                            MPI2_RPHI_MSIX_INDEX_SHIFT,
5104                            ioc->replyPostRegisterIndex[reply_q->msix_index/8]);
5105                 else
5106                         writel(reply_q->msix_index <<
5107                                 MPI2_RPHI_MSIX_INDEX_SHIFT,
5108                                 &ioc->chip->ReplyPostHostIndex);
5109
5110                 if (!_base_is_controller_msix_enabled(ioc))
5111                         goto skip_init_reply_post_host_index;
5112         }
5113
5114  skip_init_reply_post_host_index:
5115
5116         _base_unmask_interrupts(ioc);
5117         r = _base_event_notification(ioc, sleep_flag);
5118         if (r)
5119                 return r;
5120
5121         if (sleep_flag == CAN_SLEEP)
5122                 _base_static_config_pages(ioc);
5123
5124
5125         if (ioc->is_driver_loading) {
5126
5127                 if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
5128                     == 0x80) {
5129                         hide_flag = (u8) (
5130                             le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) &
5131                             MFG_PAGE10_HIDE_SSDS_MASK);
5132                         if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
5133                                 ioc->mfg_pg10_hide_flag = hide_flag;
5134                 }
5135
5136                 ioc->wait_for_discovery_to_complete =
5137                     _base_determine_wait_on_discovery(ioc);
5138
5139                 return r; /* scan_start and scan_finished support */
5140         }
5141
5142         r = _base_send_port_enable(ioc, sleep_flag);
5143         if (r)
5144                 return r;
5145
5146         return r;
5147 }
5148
5149 /**
5150  * mpt3sas_base_free_resources - free resources controller resources
5151  * @ioc: per adapter object
5152  *
5153  * Return nothing.
5154  */
5155 void
5156 mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc)
5157 {
5158         dexitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
5159             __func__));
5160
5161         /* synchronizing freeing resource with pci_access_mutex lock */
5162         mutex_lock(&ioc->pci_access_mutex);
5163         if (ioc->chip_phys && ioc->chip) {
5164                 _base_mask_interrupts(ioc);
5165                 ioc->shost_recovery = 1;
5166                 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
5167                 ioc->shost_recovery = 0;
5168         }
5169
5170         mpt3sas_base_unmap_resources(ioc);
5171         mutex_unlock(&ioc->pci_access_mutex);
5172         return;
5173 }
5174
5175 /**
5176  * mpt3sas_base_attach - attach controller instance
5177  * @ioc: per adapter object
5178  *
5179  * Returns 0 for success, non-zero for failure.
5180  */
5181 int
5182 mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc)
5183 {
5184         int r, i;
5185         int cpu_id, last_cpu_id = 0;
5186
5187         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
5188             __func__));
5189
5190         /* setup cpu_msix_table */
5191         ioc->cpu_count = num_online_cpus();
5192         for_each_online_cpu(cpu_id)
5193                 last_cpu_id = cpu_id;
5194         ioc->cpu_msix_table_sz = last_cpu_id + 1;
5195         ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
5196         ioc->reply_queue_count = 1;
5197         if (!ioc->cpu_msix_table) {
5198                 dfailprintk(ioc, pr_info(MPT3SAS_FMT
5199                         "allocation for cpu_msix_table failed!!!\n",
5200                         ioc->name));
5201                 r = -ENOMEM;
5202                 goto out_free_resources;
5203         }
5204
5205         if (ioc->is_warpdrive) {
5206                 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
5207                     sizeof(resource_size_t *), GFP_KERNEL);
5208                 if (!ioc->reply_post_host_index) {
5209                         dfailprintk(ioc, pr_info(MPT3SAS_FMT "allocation "
5210                                 "for cpu_msix_table failed!!!\n", ioc->name));
5211                         r = -ENOMEM;
5212                         goto out_free_resources;
5213                 }
5214         }
5215
5216         ioc->rdpq_array_enable_assigned = 0;
5217         ioc->dma_mask = 0;
5218         r = mpt3sas_base_map_resources(ioc);
5219         if (r)
5220                 goto out_free_resources;
5221
5222         pci_set_drvdata(ioc->pdev, ioc->shost);
5223         r = _base_get_ioc_facts(ioc, CAN_SLEEP);
5224         if (r)
5225                 goto out_free_resources;
5226
5227         switch (ioc->hba_mpi_version_belonged) {
5228         case MPI2_VERSION:
5229                 ioc->build_sg_scmd = &_base_build_sg_scmd;
5230                 ioc->build_sg = &_base_build_sg;
5231                 ioc->build_zero_len_sge = &_base_build_zero_len_sge;
5232                 break;
5233         case MPI25_VERSION:
5234                 /*
5235                  * In SAS3.0,
5236                  * SCSI_IO, SMP_PASSTHRU, SATA_PASSTHRU, Target Assist, and
5237                  * Target Status - all require the IEEE formated scatter gather
5238                  * elements.
5239                  */
5240                 ioc->build_sg_scmd = &_base_build_sg_scmd_ieee;
5241                 ioc->build_sg = &_base_build_sg_ieee;
5242                 ioc->build_zero_len_sge = &_base_build_zero_len_sge_ieee;
5243                 ioc->sge_size_ieee = sizeof(Mpi2IeeeSgeSimple64_t);
5244                 break;
5245         }
5246
5247         /*
5248          * These function pointers for other requests that don't
5249          * the require IEEE scatter gather elements.
5250          *
5251          * For example Configuration Pages and SAS IOUNIT Control don't.
5252          */
5253         ioc->build_sg_mpi = &_base_build_sg;
5254         ioc->build_zero_len_sge_mpi = &_base_build_zero_len_sge;
5255
5256         r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
5257         if (r)
5258                 goto out_free_resources;
5259
5260         ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
5261             sizeof(struct mpt3sas_port_facts), GFP_KERNEL);
5262         if (!ioc->pfacts) {
5263                 r = -ENOMEM;
5264                 goto out_free_resources;
5265         }
5266
5267         for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
5268                 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
5269                 if (r)
5270                         goto out_free_resources;
5271         }
5272
5273         r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
5274         if (r)
5275                 goto out_free_resources;
5276
5277         init_waitqueue_head(&ioc->reset_wq);
5278
5279         /* allocate memory pd handle bitmask list */
5280         ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
5281         if (ioc->facts.MaxDevHandle % 8)
5282                 ioc->pd_handles_sz++;
5283         ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
5284             GFP_KERNEL);
5285         if (!ioc->pd_handles) {
5286                 r = -ENOMEM;
5287                 goto out_free_resources;
5288         }
5289         ioc->blocking_handles = kzalloc(ioc->pd_handles_sz,
5290             GFP_KERNEL);
5291         if (!ioc->blocking_handles) {
5292                 r = -ENOMEM;
5293                 goto out_free_resources;
5294         }
5295
5296         ioc->fwfault_debug = mpt3sas_fwfault_debug;
5297
5298         /* base internal command bits */
5299         mutex_init(&ioc->base_cmds.mutex);
5300         ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5301         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
5302
5303         /* port_enable command bits */
5304         ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5305         ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED;
5306
5307         /* transport internal command bits */
5308         ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5309         ioc->transport_cmds.status = MPT3_CMD_NOT_USED;
5310         mutex_init(&ioc->transport_cmds.mutex);
5311
5312         /* scsih internal command bits */
5313         ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5314         ioc->scsih_cmds.status = MPT3_CMD_NOT_USED;
5315         mutex_init(&ioc->scsih_cmds.mutex);
5316
5317         /* task management internal command bits */
5318         ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5319         ioc->tm_cmds.status = MPT3_CMD_NOT_USED;
5320         mutex_init(&ioc->tm_cmds.mutex);
5321
5322         /* config page internal command bits */
5323         ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5324         ioc->config_cmds.status = MPT3_CMD_NOT_USED;
5325         mutex_init(&ioc->config_cmds.mutex);
5326
5327         /* ctl module internal command bits */
5328         ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5329         ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
5330         ioc->ctl_cmds.status = MPT3_CMD_NOT_USED;
5331         mutex_init(&ioc->ctl_cmds.mutex);
5332
5333         if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
5334             !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
5335             !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
5336             !ioc->ctl_cmds.sense) {
5337                 r = -ENOMEM;
5338                 goto out_free_resources;
5339         }
5340
5341         for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
5342                 ioc->event_masks[i] = -1;
5343
5344         /* here we enable the events we care about */
5345         _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
5346         _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
5347         _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
5348         _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
5349         _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
5350         _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
5351         _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
5352         _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
5353         _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
5354         _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
5355         _base_unmask_events(ioc, MPI2_EVENT_TEMP_THRESHOLD);
5356
5357         r = _base_make_ioc_operational(ioc, CAN_SLEEP);
5358         if (r)
5359                 goto out_free_resources;
5360
5361         ioc->non_operational_loop = 0;
5362         return 0;
5363
5364  out_free_resources:
5365
5366         ioc->remove_host = 1;
5367
5368         mpt3sas_base_free_resources(ioc);
5369         _base_release_memory_pools(ioc);
5370         pci_set_drvdata(ioc->pdev, NULL);
5371         kfree(ioc->cpu_msix_table);
5372         if (ioc->is_warpdrive)
5373                 kfree(ioc->reply_post_host_index);
5374         kfree(ioc->pd_handles);
5375         kfree(ioc->blocking_handles);
5376         kfree(ioc->tm_cmds.reply);
5377         kfree(ioc->transport_cmds.reply);
5378         kfree(ioc->scsih_cmds.reply);
5379         kfree(ioc->config_cmds.reply);
5380         kfree(ioc->base_cmds.reply);
5381         kfree(ioc->port_enable_cmds.reply);
5382         kfree(ioc->ctl_cmds.reply);
5383         kfree(ioc->ctl_cmds.sense);
5384         kfree(ioc->pfacts);
5385         ioc->ctl_cmds.reply = NULL;
5386         ioc->base_cmds.reply = NULL;
5387         ioc->tm_cmds.reply = NULL;
5388         ioc->scsih_cmds.reply = NULL;
5389         ioc->transport_cmds.reply = NULL;
5390         ioc->config_cmds.reply = NULL;
5391         ioc->pfacts = NULL;
5392         return r;
5393 }
5394
5395
5396 /**
5397  * mpt3sas_base_detach - remove controller instance
5398  * @ioc: per adapter object
5399  *
5400  * Return nothing.
5401  */
5402 void
5403 mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc)
5404 {
5405         dexitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
5406             __func__));
5407
5408         mpt3sas_base_stop_watchdog(ioc);
5409         mpt3sas_base_free_resources(ioc);
5410         _base_release_memory_pools(ioc);
5411         pci_set_drvdata(ioc->pdev, NULL);
5412         kfree(ioc->cpu_msix_table);
5413         if (ioc->is_warpdrive)
5414                 kfree(ioc->reply_post_host_index);
5415         kfree(ioc->pd_handles);
5416         kfree(ioc->blocking_handles);
5417         kfree(ioc->pfacts);
5418         kfree(ioc->ctl_cmds.reply);
5419         kfree(ioc->ctl_cmds.sense);
5420         kfree(ioc->base_cmds.reply);
5421         kfree(ioc->port_enable_cmds.reply);
5422         kfree(ioc->tm_cmds.reply);
5423         kfree(ioc->transport_cmds.reply);
5424         kfree(ioc->scsih_cmds.reply);
5425         kfree(ioc->config_cmds.reply);
5426 }
5427
5428 /**
5429  * _base_reset_handler - reset callback handler (for base)
5430  * @ioc: per adapter object
5431  * @reset_phase: phase
5432  *
5433  * The handler for doing any required cleanup or initialization.
5434  *
5435  * The reset phase can be MPT3_IOC_PRE_RESET, MPT3_IOC_AFTER_RESET,
5436  * MPT3_IOC_DONE_RESET
5437  *
5438  * Return nothing.
5439  */
5440 static void
5441 _base_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase)
5442 {
5443         mpt3sas_scsih_reset_handler(ioc, reset_phase);
5444         mpt3sas_ctl_reset_handler(ioc, reset_phase);
5445         switch (reset_phase) {
5446         case MPT3_IOC_PRE_RESET:
5447                 dtmprintk(ioc, pr_info(MPT3SAS_FMT
5448                 "%s: MPT3_IOC_PRE_RESET\n", ioc->name, __func__));
5449                 break;
5450         case MPT3_IOC_AFTER_RESET:
5451                 dtmprintk(ioc, pr_info(MPT3SAS_FMT
5452                 "%s: MPT3_IOC_AFTER_RESET\n", ioc->name, __func__));
5453                 if (ioc->transport_cmds.status & MPT3_CMD_PENDING) {
5454                         ioc->transport_cmds.status |= MPT3_CMD_RESET;
5455                         mpt3sas_base_free_smid(ioc, ioc->transport_cmds.smid);
5456                         complete(&ioc->transport_cmds.done);
5457                 }
5458                 if (ioc->base_cmds.status & MPT3_CMD_PENDING) {
5459                         ioc->base_cmds.status |= MPT3_CMD_RESET;
5460                         mpt3sas_base_free_smid(ioc, ioc->base_cmds.smid);
5461                         complete(&ioc->base_cmds.done);
5462                 }
5463                 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) {
5464                         ioc->port_enable_failed = 1;
5465                         ioc->port_enable_cmds.status |= MPT3_CMD_RESET;
5466                         mpt3sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
5467                         if (ioc->is_driver_loading) {
5468                                 ioc->start_scan_failed =
5469                                     MPI2_IOCSTATUS_INTERNAL_ERROR;
5470                                 ioc->start_scan = 0;
5471                                 ioc->port_enable_cmds.status =
5472                                     MPT3_CMD_NOT_USED;
5473                         } else
5474                                 complete(&ioc->port_enable_cmds.done);
5475                 }
5476                 if (ioc->config_cmds.status & MPT3_CMD_PENDING) {
5477                         ioc->config_cmds.status |= MPT3_CMD_RESET;
5478                         mpt3sas_base_free_smid(ioc, ioc->config_cmds.smid);
5479                         ioc->config_cmds.smid = USHRT_MAX;
5480                         complete(&ioc->config_cmds.done);
5481                 }
5482                 break;
5483         case MPT3_IOC_DONE_RESET:
5484                 dtmprintk(ioc, pr_info(MPT3SAS_FMT
5485                         "%s: MPT3_IOC_DONE_RESET\n", ioc->name, __func__));
5486                 break;
5487         }
5488 }
5489
5490 /**
5491  * _wait_for_commands_to_complete - reset controller
5492  * @ioc: Pointer to MPT_ADAPTER structure
5493  * @sleep_flag: CAN_SLEEP or NO_SLEEP
5494  *
5495  * This function waiting(3s) for all pending commands to complete
5496  * prior to putting controller in reset.
5497  */
5498 static void
5499 _wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
5500 {
5501         u32 ioc_state;
5502         unsigned long flags;
5503         u16 i;
5504
5505         ioc->pending_io_count = 0;
5506         if (sleep_flag != CAN_SLEEP)
5507                 return;
5508
5509         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
5510         if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
5511                 return;
5512
5513         /* pending command count */
5514         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
5515         for (i = 0; i < ioc->scsiio_depth; i++)
5516                 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
5517                         ioc->pending_io_count++;
5518         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
5519
5520         if (!ioc->pending_io_count)
5521                 return;
5522
5523         /* wait for pending commands to complete */
5524         wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
5525 }
5526
5527 /**
5528  * mpt3sas_base_hard_reset_handler - reset controller
5529  * @ioc: Pointer to MPT_ADAPTER structure
5530  * @sleep_flag: CAN_SLEEP or NO_SLEEP
5531  * @type: FORCE_BIG_HAMMER or SOFT_RESET
5532  *
5533  * Returns 0 for success, non-zero for failure.
5534  */
5535 int
5536 mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc, int sleep_flag,
5537         enum reset_type type)
5538 {
5539         int r;
5540         unsigned long flags;
5541         u32 ioc_state;
5542         u8 is_fault = 0, is_trigger = 0;
5543
5544         dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: enter\n", ioc->name,
5545             __func__));
5546
5547         if (ioc->pci_error_recovery) {
5548                 pr_err(MPT3SAS_FMT "%s: pci error recovery reset\n",
5549                     ioc->name, __func__);
5550                 r = 0;
5551                 goto out_unlocked;
5552         }
5553
5554         if (mpt3sas_fwfault_debug)
5555                 mpt3sas_halt_firmware(ioc);
5556
5557         /* TODO - What we really should be doing is pulling
5558          * out all the code associated with NO_SLEEP; its never used.
5559          * That is legacy code from mpt fusion driver, ported over.
5560          * I will leave this BUG_ON here for now till its been resolved.
5561          */
5562         BUG_ON(sleep_flag == NO_SLEEP);
5563
5564         /* wait for an active reset in progress to complete */
5565         if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
5566                 do {
5567                         ssleep(1);
5568                 } while (ioc->shost_recovery == 1);
5569                 dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: exit\n", ioc->name,
5570                     __func__));
5571                 return ioc->ioc_reset_in_progress_status;
5572         }
5573
5574         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
5575         ioc->shost_recovery = 1;
5576         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
5577
5578         if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
5579             MPT3_DIAG_BUFFER_IS_REGISTERED) &&
5580             (!(ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
5581             MPT3_DIAG_BUFFER_IS_RELEASED))) {
5582                 is_trigger = 1;
5583                 ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
5584                 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
5585                         is_fault = 1;
5586         }
5587         _base_reset_handler(ioc, MPT3_IOC_PRE_RESET);
5588         _wait_for_commands_to_complete(ioc, sleep_flag);
5589         _base_mask_interrupts(ioc);
5590         r = _base_make_ioc_ready(ioc, sleep_flag, type);
5591         if (r)
5592                 goto out;
5593         _base_reset_handler(ioc, MPT3_IOC_AFTER_RESET);
5594
5595         /* If this hard reset is called while port enable is active, then
5596          * there is no reason to call make_ioc_operational
5597          */
5598         if (ioc->is_driver_loading && ioc->port_enable_failed) {
5599                 ioc->remove_host = 1;
5600                 r = -EFAULT;
5601                 goto out;
5602         }
5603         r = _base_get_ioc_facts(ioc, CAN_SLEEP);
5604         if (r)
5605                 goto out;
5606
5607         if (ioc->rdpq_array_enable && !ioc->rdpq_array_capable)
5608                 panic("%s: Issue occurred with flashing controller firmware."
5609                       "Please reboot the system and ensure that the correct"
5610                       " firmware version is running\n", ioc->name);
5611
5612         r = _base_make_ioc_operational(ioc, sleep_flag);
5613         if (!r)
5614                 _base_reset_handler(ioc, MPT3_IOC_DONE_RESET);
5615
5616  out:
5617         dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: %s\n",
5618             ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
5619
5620         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
5621         ioc->ioc_reset_in_progress_status = r;
5622         ioc->shost_recovery = 0;
5623         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
5624         ioc->ioc_reset_count++;
5625         mutex_unlock(&ioc->reset_in_progress_mutex);
5626
5627  out_unlocked:
5628         if ((r == 0) && is_trigger) {
5629                 if (is_fault)
5630                         mpt3sas_trigger_master(ioc, MASTER_TRIGGER_FW_FAULT);
5631                 else
5632                         mpt3sas_trigger_master(ioc,
5633                             MASTER_TRIGGER_ADAPTER_RESET);
5634         }
5635         dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: exit\n", ioc->name,
5636             __func__));
5637         return r;
5638 }