2 * ad2s1210.c support for the ADI Resolver to Digital Converters: AD2S1210
4 * Copyright (c) 2010-2010 Analog Devices Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/types.h>
12 #include <linux/mutex.h>
13 #include <linux/device.h>
14 #include <linux/spi/spi.h>
15 #include <linux/slab.h>
16 #include <linux/sysfs.h>
17 #include <linux/delay.h>
18 #include <linux/gpio.h>
19 #include <linux/module.h>
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
25 #define DRV_NAME "ad2s1210"
27 #define AD2S1210_DEF_CONTROL 0x7E
29 #define AD2S1210_MSB_IS_HIGH 0x80
30 #define AD2S1210_MSB_IS_LOW 0x7F
31 #define AD2S1210_PHASE_LOCK_RANGE_44 0x20
32 #define AD2S1210_ENABLE_HYSTERESIS 0x10
33 #define AD2S1210_SET_ENRES1 0x08
34 #define AD2S1210_SET_ENRES0 0x04
35 #define AD2S1210_SET_RES1 0x02
36 #define AD2S1210_SET_RES0 0x01
38 #define AD2S1210_SET_RESOLUTION (AD2S1210_SET_RES1 | AD2S1210_SET_RES0)
40 #define AD2S1210_REG_POSITION 0x80
41 #define AD2S1210_REG_VELOCITY 0x82
42 #define AD2S1210_REG_LOS_THRD 0x88
43 #define AD2S1210_REG_DOS_OVR_THRD 0x89
44 #define AD2S1210_REG_DOS_MIS_THRD 0x8A
45 #define AD2S1210_REG_DOS_RST_MAX_THRD 0x8B
46 #define AD2S1210_REG_DOS_RST_MIN_THRD 0x8C
47 #define AD2S1210_REG_LOT_HIGH_THRD 0x8D
48 #define AD2S1210_REG_LOT_LOW_THRD 0x8E
49 #define AD2S1210_REG_EXCIT_FREQ 0x91
50 #define AD2S1210_REG_CONTROL 0x92
51 #define AD2S1210_REG_SOFT_RESET 0xF0
52 #define AD2S1210_REG_FAULT 0xFF
54 #define AD2S1210_MIN_CLKIN 6144000
55 #define AD2S1210_MAX_CLKIN 10240000
56 #define AD2S1210_MIN_EXCIT 2000
57 #define AD2S1210_MAX_EXCIT 20000
58 #define AD2S1210_MIN_FCW 0x4
59 #define AD2S1210_MAX_FCW 0x50
61 #define AD2S1210_DEF_EXCIT 10000
70 static const unsigned int ad2s1210_resolution_value[] = { 10, 12, 14, 16 };
72 struct ad2s1210_state {
73 const struct ad2s1210_platform_data *pdata;
75 struct spi_device *sdev;
80 enum ad2s1210_mode mode;
81 u8 rx[2] ____cacheline_aligned;
82 u8 tx[2] ____cacheline_aligned;
85 static const int ad2s1210_mode_vals[4][2] = {
88 [MOD_CONFIG] = { 1, 0 },
91 static inline void ad2s1210_set_mode(enum ad2s1210_mode mode,
92 struct ad2s1210_state *st)
94 gpio_set_value(st->pdata->a[0], ad2s1210_mode_vals[mode][0]);
95 gpio_set_value(st->pdata->a[1], ad2s1210_mode_vals[mode][1]);
99 /* write 1 bytes (address or data) to the chip */
100 static int ad2s1210_config_write(struct ad2s1210_state *st, u8 data)
104 ad2s1210_set_mode(MOD_CONFIG, st);
106 ret = spi_write(st->sdev, st->tx, 1);
113 /* read value from one of the registers */
114 static int ad2s1210_config_read(struct ad2s1210_state *st,
115 unsigned char address)
117 struct spi_transfer xfers[] = {
120 .rx_buf = &st->rx[0],
121 .tx_buf = &st->tx[0],
125 .rx_buf = &st->rx[1],
126 .tx_buf = &st->tx[1],
131 ad2s1210_set_mode(MOD_CONFIG, st);
132 st->tx[0] = address | AD2S1210_MSB_IS_HIGH;
133 st->tx[1] = AD2S1210_REG_FAULT;
134 ret = spi_sync_transfer(st->sdev, xfers, 2);
142 int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st)
147 fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin);
148 if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) {
149 dev_err(&st->sdev->dev, "ad2s1210: FCW out of range\n");
153 ret = ad2s1210_config_write(st, AD2S1210_REG_EXCIT_FREQ);
157 return ad2s1210_config_write(st, fcw);
160 static unsigned char ad2s1210_read_resolution_pin(struct ad2s1210_state *st)
162 int resolution = (gpio_get_value(st->pdata->res[0]) << 1) |
163 gpio_get_value(st->pdata->res[1]);
165 return ad2s1210_resolution_value[resolution];
168 static const int ad2s1210_res_pins[4][2] = {
169 { 0, 0 }, {0, 1}, {1, 0}, {1, 1}
172 static inline void ad2s1210_set_resolution_pin(struct ad2s1210_state *st)
174 gpio_set_value(st->pdata->res[0],
175 ad2s1210_res_pins[(st->resolution - 10) / 2][0]);
176 gpio_set_value(st->pdata->res[1],
177 ad2s1210_res_pins[(st->resolution - 10) / 2][1]);
180 static inline int ad2s1210_soft_reset(struct ad2s1210_state *st)
184 ret = ad2s1210_config_write(st, AD2S1210_REG_SOFT_RESET);
188 return ad2s1210_config_write(st, 0x0);
191 static ssize_t ad2s1210_show_fclkin(struct device *dev,
192 struct device_attribute *attr,
195 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
197 return sprintf(buf, "%u\n", st->fclkin);
200 static ssize_t ad2s1210_store_fclkin(struct device *dev,
201 struct device_attribute *attr,
205 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
209 ret = kstrtouint(buf, 10, &fclkin);
212 if (fclkin < AD2S1210_MIN_CLKIN || fclkin > AD2S1210_MAX_CLKIN) {
213 dev_err(dev, "ad2s1210: fclkin out of range\n");
217 mutex_lock(&st->lock);
220 ret = ad2s1210_update_frequency_control_word(st);
223 ret = ad2s1210_soft_reset(st);
225 mutex_unlock(&st->lock);
227 return ret < 0 ? ret : len;
230 static ssize_t ad2s1210_show_fexcit(struct device *dev,
231 struct device_attribute *attr,
234 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
236 return sprintf(buf, "%u\n", st->fexcit);
239 static ssize_t ad2s1210_store_fexcit(struct device *dev,
240 struct device_attribute *attr,
241 const char *buf, size_t len)
243 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
247 ret = kstrtouint(buf, 10, &fexcit);
250 if (fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) {
252 "ad2s1210: excitation frequency out of range\n");
255 mutex_lock(&st->lock);
257 ret = ad2s1210_update_frequency_control_word(st);
260 ret = ad2s1210_soft_reset(st);
262 mutex_unlock(&st->lock);
264 return ret < 0 ? ret : len;
267 static ssize_t ad2s1210_show_control(struct device *dev,
268 struct device_attribute *attr,
271 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
274 mutex_lock(&st->lock);
275 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
276 mutex_unlock(&st->lock);
277 return ret < 0 ? ret : sprintf(buf, "0x%x\n", ret);
280 static ssize_t ad2s1210_store_control(struct device *dev,
281 struct device_attribute *attr,
282 const char *buf, size_t len)
284 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
289 ret = kstrtou8(buf, 16, &udata);
293 mutex_lock(&st->lock);
294 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
297 data = udata & AD2S1210_MSB_IS_LOW;
298 ret = ad2s1210_config_write(st, data);
302 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
305 if (ret & AD2S1210_MSB_IS_HIGH) {
308 "ad2s1210: write control register fail\n");
312 = ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
313 if (st->pdata->gpioin) {
314 data = ad2s1210_read_resolution_pin(st);
315 if (data != st->resolution)
316 dev_warn(dev, "ad2s1210: resolution settings not match\n");
318 ad2s1210_set_resolution_pin(st);
321 st->hysteresis = !!(data & AD2S1210_ENABLE_HYSTERESIS);
324 mutex_unlock(&st->lock);
328 static ssize_t ad2s1210_show_resolution(struct device *dev,
329 struct device_attribute *attr,
332 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
334 return sprintf(buf, "%d\n", st->resolution);
337 static ssize_t ad2s1210_store_resolution(struct device *dev,
338 struct device_attribute *attr,
339 const char *buf, size_t len)
341 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
346 ret = kstrtou8(buf, 10, &udata);
347 if (ret || udata < 10 || udata > 16) {
348 dev_err(dev, "ad2s1210: resolution out of range\n");
351 mutex_lock(&st->lock);
352 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
356 data &= ~AD2S1210_SET_RESOLUTION;
357 data |= (udata - 10) >> 1;
358 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
361 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
364 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
368 if (data & AD2S1210_MSB_IS_HIGH) {
370 dev_err(dev, "ad2s1210: setting resolution fail\n");
374 = ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
375 if (st->pdata->gpioin) {
376 data = ad2s1210_read_resolution_pin(st);
377 if (data != st->resolution)
378 dev_warn(dev, "ad2s1210: resolution settings not match\n");
380 ad2s1210_set_resolution_pin(st);
384 mutex_unlock(&st->lock);
388 /* read the fault register since last sample */
389 static ssize_t ad2s1210_show_fault(struct device *dev,
390 struct device_attribute *attr, char *buf)
392 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
395 mutex_lock(&st->lock);
396 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
397 mutex_unlock(&st->lock);
399 return ret ? ret : sprintf(buf, "0x%x\n", ret);
402 static ssize_t ad2s1210_clear_fault(struct device *dev,
403 struct device_attribute *attr,
407 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
410 mutex_lock(&st->lock);
411 gpio_set_value(st->pdata->sample, 0);
412 /* delay (2 * tck + 20) nano seconds */
414 gpio_set_value(st->pdata->sample, 1);
415 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
418 gpio_set_value(st->pdata->sample, 0);
419 gpio_set_value(st->pdata->sample, 1);
421 mutex_unlock(&st->lock);
423 return ret < 0 ? ret : len;
426 static ssize_t ad2s1210_show_reg(struct device *dev,
427 struct device_attribute *attr,
430 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
431 struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
434 mutex_lock(&st->lock);
435 ret = ad2s1210_config_read(st, iattr->address);
436 mutex_unlock(&st->lock);
438 return ret < 0 ? ret : sprintf(buf, "%d\n", ret);
441 static ssize_t ad2s1210_store_reg(struct device *dev,
442 struct device_attribute *attr,
443 const char *buf, size_t len)
445 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
448 struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
450 ret = kstrtou8(buf, 10, &data);
453 mutex_lock(&st->lock);
454 ret = ad2s1210_config_write(st, iattr->address);
457 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
459 mutex_unlock(&st->lock);
460 return ret < 0 ? ret : len;
463 static int ad2s1210_read_raw(struct iio_dev *indio_dev,
464 struct iio_chan_spec const *chan,
469 struct ad2s1210_state *st = iio_priv(indio_dev);
475 mutex_lock(&st->lock);
476 gpio_set_value(st->pdata->sample, 0);
477 /* delay (6 * tck + 20) nano seconds */
480 switch (chan->type) {
482 ad2s1210_set_mode(MOD_POS, st);
485 ad2s1210_set_mode(MOD_VEL, st);
493 ret = spi_read(st->sdev, st->rx, 2);
497 switch (chan->type) {
499 pos = be16_to_cpup((__be16 *)st->rx);
501 pos >>= 16 - st->resolution;
506 negative = st->rx[0] & 0x80;
507 vel = be16_to_cpup((__be16 *)st->rx);
508 vel >>= 16 - st->resolution;
510 negative = (0xffff >> st->resolution) << st->resolution;
517 mutex_unlock(&st->lock);
522 gpio_set_value(st->pdata->sample, 1);
523 /* delay (2 * tck + 20) nano seconds */
525 mutex_unlock(&st->lock);
529 static IIO_DEVICE_ATTR(fclkin, 0644,
530 ad2s1210_show_fclkin, ad2s1210_store_fclkin, 0);
531 static IIO_DEVICE_ATTR(fexcit, 0644,
532 ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0);
533 static IIO_DEVICE_ATTR(control, 0644,
534 ad2s1210_show_control, ad2s1210_store_control, 0);
535 static IIO_DEVICE_ATTR(bits, 0644,
536 ad2s1210_show_resolution, ad2s1210_store_resolution, 0);
537 static IIO_DEVICE_ATTR(fault, 0644,
538 ad2s1210_show_fault, ad2s1210_clear_fault, 0);
540 static IIO_DEVICE_ATTR(los_thrd, 0644,
541 ad2s1210_show_reg, ad2s1210_store_reg,
542 AD2S1210_REG_LOS_THRD);
543 static IIO_DEVICE_ATTR(dos_ovr_thrd, 0644,
544 ad2s1210_show_reg, ad2s1210_store_reg,
545 AD2S1210_REG_DOS_OVR_THRD);
546 static IIO_DEVICE_ATTR(dos_mis_thrd, 0644,
547 ad2s1210_show_reg, ad2s1210_store_reg,
548 AD2S1210_REG_DOS_MIS_THRD);
549 static IIO_DEVICE_ATTR(dos_rst_max_thrd, 0644,
550 ad2s1210_show_reg, ad2s1210_store_reg,
551 AD2S1210_REG_DOS_RST_MAX_THRD);
552 static IIO_DEVICE_ATTR(dos_rst_min_thrd, 0644,
553 ad2s1210_show_reg, ad2s1210_store_reg,
554 AD2S1210_REG_DOS_RST_MIN_THRD);
555 static IIO_DEVICE_ATTR(lot_high_thrd, 0644,
556 ad2s1210_show_reg, ad2s1210_store_reg,
557 AD2S1210_REG_LOT_HIGH_THRD);
558 static IIO_DEVICE_ATTR(lot_low_thrd, 0644,
559 ad2s1210_show_reg, ad2s1210_store_reg,
560 AD2S1210_REG_LOT_LOW_THRD);
562 static const struct iio_chan_spec ad2s1210_channels[] = {
567 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
569 .type = IIO_ANGL_VEL,
572 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
576 static struct attribute *ad2s1210_attributes[] = {
577 &iio_dev_attr_fclkin.dev_attr.attr,
578 &iio_dev_attr_fexcit.dev_attr.attr,
579 &iio_dev_attr_control.dev_attr.attr,
580 &iio_dev_attr_bits.dev_attr.attr,
581 &iio_dev_attr_fault.dev_attr.attr,
582 &iio_dev_attr_los_thrd.dev_attr.attr,
583 &iio_dev_attr_dos_ovr_thrd.dev_attr.attr,
584 &iio_dev_attr_dos_mis_thrd.dev_attr.attr,
585 &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr,
586 &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr,
587 &iio_dev_attr_lot_high_thrd.dev_attr.attr,
588 &iio_dev_attr_lot_low_thrd.dev_attr.attr,
592 static const struct attribute_group ad2s1210_attribute_group = {
593 .attrs = ad2s1210_attributes,
596 static int ad2s1210_initial(struct ad2s1210_state *st)
601 mutex_lock(&st->lock);
602 if (st->pdata->gpioin)
603 st->resolution = ad2s1210_read_resolution_pin(st);
605 ad2s1210_set_resolution_pin(st);
607 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
610 data = AD2S1210_DEF_CONTROL & ~(AD2S1210_SET_RESOLUTION);
611 data |= (st->resolution - 10) >> 1;
612 ret = ad2s1210_config_write(st, data);
615 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
619 if (ret & AD2S1210_MSB_IS_HIGH) {
624 ret = ad2s1210_update_frequency_control_word(st);
627 ret = ad2s1210_soft_reset(st);
629 mutex_unlock(&st->lock);
633 static const struct iio_info ad2s1210_info = {
634 .read_raw = ad2s1210_read_raw,
635 .attrs = &ad2s1210_attribute_group,
638 static int ad2s1210_setup_gpios(struct ad2s1210_state *st)
640 unsigned long flags = st->pdata->gpioin ? GPIOF_DIR_IN : GPIOF_DIR_OUT;
641 struct gpio ad2s1210_gpios[] = {
642 { st->pdata->sample, GPIOF_DIR_IN, "sample" },
643 { st->pdata->a[0], flags, "a0" },
644 { st->pdata->a[1], flags, "a1" },
645 { st->pdata->res[0], flags, "res0" },
646 { st->pdata->res[0], flags, "res1" },
649 return gpio_request_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios));
652 static void ad2s1210_free_gpios(struct ad2s1210_state *st)
654 unsigned long flags = st->pdata->gpioin ? GPIOF_DIR_IN : GPIOF_DIR_OUT;
655 struct gpio ad2s1210_gpios[] = {
656 { st->pdata->sample, GPIOF_DIR_IN, "sample" },
657 { st->pdata->a[0], flags, "a0" },
658 { st->pdata->a[1], flags, "a1" },
659 { st->pdata->res[0], flags, "res0" },
660 { st->pdata->res[0], flags, "res1" },
663 gpio_free_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios));
666 static int ad2s1210_probe(struct spi_device *spi)
668 struct iio_dev *indio_dev;
669 struct ad2s1210_state *st;
672 if (!spi->dev.platform_data)
675 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
678 st = iio_priv(indio_dev);
679 st->pdata = spi->dev.platform_data;
680 ret = ad2s1210_setup_gpios(st);
684 spi_set_drvdata(spi, indio_dev);
686 mutex_init(&st->lock);
688 st->hysteresis = true;
689 st->mode = MOD_CONFIG;
691 st->fexcit = AD2S1210_DEF_EXCIT;
693 indio_dev->dev.parent = &spi->dev;
694 indio_dev->info = &ad2s1210_info;
695 indio_dev->modes = INDIO_DIRECT_MODE;
696 indio_dev->channels = ad2s1210_channels;
697 indio_dev->num_channels = ARRAY_SIZE(ad2s1210_channels);
698 indio_dev->name = spi_get_device_id(spi)->name;
700 ret = iio_device_register(indio_dev);
702 goto error_free_gpios;
704 st->fclkin = spi->max_speed_hz;
705 spi->mode = SPI_MODE_3;
707 ad2s1210_initial(st);
712 ad2s1210_free_gpios(st);
716 static int ad2s1210_remove(struct spi_device *spi)
718 struct iio_dev *indio_dev = spi_get_drvdata(spi);
720 iio_device_unregister(indio_dev);
721 ad2s1210_free_gpios(iio_priv(indio_dev));
726 static const struct spi_device_id ad2s1210_id[] = {
730 MODULE_DEVICE_TABLE(spi, ad2s1210_id);
732 static struct spi_driver ad2s1210_driver = {
736 .probe = ad2s1210_probe,
737 .remove = ad2s1210_remove,
738 .id_table = ad2s1210_id,
740 module_spi_driver(ad2s1210_driver);
742 MODULE_AUTHOR("Graff Yang <graff.yang@gmail.com>");
743 MODULE_DESCRIPTION("Analog Devices AD2S1210 Resolver to Digital SPI driver");
744 MODULE_LICENSE("GPL v2");