GNU Linux-libre 4.14.290-gnu1
[releases.git] / drivers / staging / media / atomisp / i2c / imx / imx.h
1 /*
2  * Support for Sony IMX camera sensor.
3  *
4  * Copyright (c) 2010 Intel Corporation. All Rights Reserved.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License version
8  * 2 as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18  * 02110-1301, USA.
19  *
20  */
21
22 #ifndef __IMX_H__
23 #define __IMX_H__
24 #include "../../include/linux/atomisp_platform.h"
25 #include "../../include/linux/atomisp.h"
26 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/kernel.h>
29 #include <linux/spinlock.h>
30 #include <linux/types.h>
31 #include <linux/videodev2.h>
32 #include <linux/v4l2-mediabus.h>
33 #include <media/media-entity.h>
34 #include <media/v4l2-ctrls.h>
35 #include <media/v4l2-device.h>
36 #include <media/v4l2-subdev.h>
37 #include "imx175.h"
38 #include "imx135.h"
39 #include "imx134.h"
40 #include "imx132.h"
41 #include "imx208.h"
42 #include "imx219.h"
43 #include "imx227.h"
44
45 #define IMX_MCLK                192
46
47 /* TODO - This should be added into include/linux/videodev2.h */
48 #ifndef V4L2_IDENT_IMX
49 #define V4L2_IDENT_IMX  8245
50 #endif
51
52 #define IMX_MAX_AE_LUT_LENGTH   5
53 /*
54  * imx System control registers
55  */
56 #define IMX_MASK_5BIT   0x1F
57 #define IMX_MASK_4BIT   0xF
58 #define IMX_MASK_3BIT   0x7
59 #define IMX_MASK_2BIT   0x3
60 #define IMX_MASK_8BIT   0xFF
61 #define IMX_MASK_11BIT  0x7FF
62 #define IMX_INTG_BUF_COUNT              2
63
64 #define IMX_FINE_INTG_TIME              0x1E8
65
66 #define IMX_VT_PIX_CLK_DIV              0x0301
67 #define IMX_VT_SYS_CLK_DIV              0x0303
68 #define IMX_PRE_PLL_CLK_DIV             0x0305
69 #define IMX227_IOP_PRE_PLL_CLK_DIV      0x030D
70 #define IMX227_PLL_MULTIPLIER           0x0306
71 #define IMX227_IOP_PLL_MULTIPLIER       0x030E
72 #define IMX227_PLL_MULTI_DRIVE          0x0310
73 #define IMX227_OP_PIX_CLK_DIV           0x0309
74 #define IMX227_OP_SYS_CLK_DIV           0x030B
75 #define IMX_PLL_MULTIPLIER              0x030C
76 #define IMX_OP_PIX_DIV                  0x0309
77 #define IMX_OP_SYS_DIV                  0x030B
78 #define IMX_FRAME_LENGTH_LINES          0x0340
79 #define IMX_LINE_LENGTH_PIXELS          0x0342
80 #define IMX_COARSE_INTG_TIME_MIN        0x1004
81 #define IMX_COARSE_INTG_TIME_MAX        0x1006
82 #define IMX_BINNING_ENABLE              0x0390
83 #define IMX227_BINNING_ENABLE           0x0900
84 #define IMX_BINNING_TYPE                0x0391
85 #define IMX227_BINNING_TYPE             0x0901
86 #define IMX_READ_MODE                   0x0390
87 #define IMX227_READ_MODE                0x0900
88
89 #define IMX_HORIZONTAL_START_H 0x0344
90 #define IMX_VERTICAL_START_H 0x0346
91 #define IMX_HORIZONTAL_END_H 0x0348
92 #define IMX_VERTICAL_END_H 0x034a
93 #define IMX_HORIZONTAL_OUTPUT_SIZE_H 0x034c
94 #define IMX_VERTICAL_OUTPUT_SIZE_H 0x034e
95
96 /* Post Divider setting register for imx132 and imx208 */
97 #define IMX132_208_VT_RGPLTD            0x30A4
98
99 /* Multiplier setting register for imx132, imx208, and imx219 */
100 #define IMX132_208_219_PLL_MULTIPLIER           0x0306
101
102 #define IMX_COARSE_INTEGRATION_TIME             0x0202
103 #define IMX_TEST_PATTERN_MODE                   0x0600
104 #define IMX_TEST_PATTERN_COLOR_R                0x0602
105 #define IMX_TEST_PATTERN_COLOR_GR               0x0604
106 #define IMX_TEST_PATTERN_COLOR_B                0x0606
107 #define IMX_TEST_PATTERN_COLOR_GB               0x0608
108 #define IMX_IMG_ORIENTATION                     0x0101
109 #define IMX_VFLIP_BIT                   2
110 #define IMX_HFLIP_BIT                   1
111 #define IMX_GLOBAL_GAIN                 0x0205
112 #define IMX_SHORT_AGC_GAIN              0x0233
113 #define IMX_DGC_ADJ             0x020E
114 #define IMX_DGC_LEN             10
115 #define IMX227_DGC_LEN          4
116 #define IMX_MAX_EXPOSURE_SUPPORTED 0xfffb
117 #define IMX_MAX_GLOBAL_GAIN_SUPPORTED 0x00ff
118 #define IMX_MAX_DIGITAL_GAIN_SUPPORTED 0x0fff
119
120 #define MAX_FMTS 1
121 #define IMX_OTP_DATA_SIZE               1280
122
123 #define IMX_SUBDEV_PREFIX "imx"
124 #define IMX_DRIVER      "imx1x5"
125
126 /* Sensor ids from identification register */
127 #define IMX_NAME_134    "imx134"
128 #define IMX_NAME_135    "imx135"
129 #define IMX_NAME_175    "imx175"
130 #define IMX_NAME_132    "imx132"
131 #define IMX_NAME_208    "imx208"
132 #define IMX_NAME_219    "imx219"
133 #define IMX_NAME_227    "imx227"
134 #define IMX175_ID       0x0175
135 #define IMX135_ID       0x0135
136 #define IMX134_ID       0x0134
137 #define IMX132_ID       0x0132
138 #define IMX208_ID       0x0208
139 #define IMX219_ID       0x0219
140 #define IMX227_ID       0x0227
141
142 /* Sensor id based on i2c_device_id table
143  * (Fuji module can not be detected based on sensor registers) */
144 #define IMX135_FUJI_ID                  0x0136
145 #define IMX_NAME_135_FUJI               "imx135fuji"
146
147 /* imx175 - use dw9714 vcm */
148 #define IMX175_MERRFLD 0x175
149 #define IMX175_VALLEYVIEW 0x176
150 #define IMX135_SALTBAY 0x135
151 #define IMX135_VICTORIABAY 0x136
152 #define IMX132_SALTBAY 0x132
153 #define IMX134_VALLEYVIEW 0x134
154 #define IMX208_MOFD_PD2 0x208
155 #define IMX219_MFV0_PRH 0x219
156 #define IMX227_SAND 0x227
157
158 /* otp - specific settings */
159 #define E2PROM_ADDR 0xa0
160 #define E2PROM_LITEON_12P1BA869D_ADDR 0xa0
161 #define E2PROM_ABICO_SS89A839_ADDR 0xa8
162 #define DEFAULT_OTP_SIZE 1280
163 #define IMX135_OTP_SIZE 1280
164 #define IMX219_OTP_SIZE 2048
165 #define IMX227_OTP_SIZE 2560
166 #define E2PROM_LITEON_12P1BA869D_SIZE 544
167
168 #define IMX_ID_DEFAULT  0x0000
169 #define IMX132_175_208_219_CHIP_ID      0x0000
170 #define IMX134_135_CHIP_ID      0x0016
171 #define IMX134_135_227_CHIP_ID  0x0016
172
173 #define IMX175_RES_WIDTH_MAX    3280
174 #define IMX175_RES_HEIGHT_MAX   2464
175 #define IMX135_RES_WIDTH_MAX    4208
176 #define IMX135_RES_HEIGHT_MAX   3120
177 #define IMX132_RES_WIDTH_MAX    1936
178 #define IMX132_RES_HEIGHT_MAX   1096
179 #define IMX134_RES_WIDTH_MAX    3280
180 #define IMX134_RES_HEIGHT_MAX   2464
181 #define IMX208_RES_WIDTH_MAX    1936
182 #define IMX208_RES_HEIGHT_MAX   1096
183 #define IMX219_RES_WIDTH_MAX    3280
184 #define IMX219_RES_HEIGHT_MAX   2464
185 #define IMX227_RES_WIDTH_MAX    2400
186 #define IMX227_RES_HEIGHT_MAX   2720
187
188 /* Defines for lens/VCM */
189 #define IMX_FOCAL_LENGTH_NUM    369     /*3.69mm*/
190 #define IMX_FOCAL_LENGTH_DEM    100
191 #define IMX_F_NUMBER_DEFAULT_NUM        22
192 #define IMX_F_NUMBER_DEM        10
193 #define IMX_INVALID_CONFIG      0xffffffff
194 #define IMX_MAX_FOCUS_POS       1023
195 #define IMX_MAX_FOCUS_NEG       (-1023)
196 #define IMX_VCM_SLEW_STEP_MAX   0x3f
197 #define IMX_VCM_SLEW_TIME_MAX   0x1f
198
199 #define IMX_BIN_FACTOR_MAX                      4
200 #define IMX_INTEGRATION_TIME_MARGIN     4
201 /*
202  * focal length bits definition:
203  * bits 31-16: numerator, bits 15-0: denominator
204  */
205 #define IMX_FOCAL_LENGTH_DEFAULT 0x1710064
206
207 /*
208  * current f-number bits definition:
209  * bits 31-16: numerator, bits 15-0: denominator
210  */
211 #define IMX_F_NUMBER_DEFAULT 0x16000a
212
213 /*
214  * f-number range bits definition:
215  * bits 31-24: max f-number numerator
216  * bits 23-16: max f-number denominator
217  * bits 15-8: min f-number numerator
218  * bits 7-0: min f-number denominator
219  */
220 #define IMX_F_NUMBER_RANGE 0x160a160a
221
222 struct imx_vcm {
223         int (*power_up)(struct v4l2_subdev *sd);
224         int (*power_down)(struct v4l2_subdev *sd);
225         int (*t_focus_abs)(struct v4l2_subdev *sd, s32 value);
226         int (*t_focus_abs_init)(struct v4l2_subdev *sd);
227         int (*t_focus_rel)(struct v4l2_subdev *sd, s32 value);
228         int (*q_focus_status)(struct v4l2_subdev *sd, s32 *value);
229         int (*q_focus_abs)(struct v4l2_subdev *sd, s32 *value);
230         int (*t_vcm_slew)(struct v4l2_subdev *sd, s32 value);
231         int (*t_vcm_timing)(struct v4l2_subdev *sd, s32 value);
232 };
233
234 struct imx_otp {
235         void * (*otp_read)(struct v4l2_subdev *sd, u8 dev_addr,
236                 u32 start_addr, u32 size);
237         u32 start_addr;
238         u32 size;
239         u8 dev_addr;
240 };
241
242 struct max_res {
243         int res_max_width;
244         int res_max_height;
245 };
246
247 struct max_res imx_max_res[] = {
248         [IMX175_ID] = {
249                 .res_max_width = IMX175_RES_WIDTH_MAX,
250                 .res_max_height = IMX175_RES_HEIGHT_MAX,
251         },
252         [IMX135_ID] = {
253                 .res_max_width = IMX135_RES_WIDTH_MAX,
254                 .res_max_height = IMX135_RES_HEIGHT_MAX,
255         },
256         [IMX132_ID] = {
257                 .res_max_width = IMX132_RES_WIDTH_MAX,
258                 .res_max_height = IMX132_RES_HEIGHT_MAX,
259         },
260         [IMX134_ID] = {
261                 .res_max_width = IMX134_RES_WIDTH_MAX,
262                 .res_max_height = IMX134_RES_HEIGHT_MAX,
263         },
264         [IMX208_ID] = {
265                 .res_max_width = IMX208_RES_WIDTH_MAX,
266                 .res_max_height = IMX208_RES_HEIGHT_MAX,
267         },
268         [IMX219_ID] = {
269                 .res_max_width = IMX219_RES_WIDTH_MAX,
270                 .res_max_height = IMX219_RES_HEIGHT_MAX,
271         },
272         [IMX227_ID] = {
273                 .res_max_width = IMX227_RES_WIDTH_MAX,
274                 .res_max_height = IMX227_RES_HEIGHT_MAX,
275         },
276 };
277
278 struct imx_settings {
279         struct imx_reg const *init_settings;
280         struct imx_resolution *res_preview;
281         struct imx_resolution *res_still;
282         struct imx_resolution *res_video;
283         int n_res_preview;
284         int n_res_still;
285         int n_res_video;
286 };
287
288 struct imx_settings imx_sets[] = {
289         [IMX175_MERRFLD] = {
290                 .init_settings = imx175_init_settings,
291                 .res_preview = imx175_res_preview,
292                 .res_still = imx175_res_still,
293                 .res_video = imx175_res_video,
294                 .n_res_preview = ARRAY_SIZE(imx175_res_preview),
295                 .n_res_still = ARRAY_SIZE(imx175_res_still),
296                 .n_res_video = ARRAY_SIZE(imx175_res_video),
297         },
298         [IMX175_VALLEYVIEW] = {
299                 .init_settings = imx175_init_settings,
300                 .res_preview = imx175_res_preview,
301                 .res_still = imx175_res_still,
302                 .res_video = imx175_res_video,
303                 .n_res_preview = ARRAY_SIZE(imx175_res_preview),
304                 .n_res_still = ARRAY_SIZE(imx175_res_still),
305                 .n_res_video = ARRAY_SIZE(imx175_res_video),
306         },
307         [IMX135_SALTBAY] = {
308                 .init_settings = imx135_init_settings,
309                 .res_preview = imx135_res_preview,
310                 .res_still = imx135_res_still,
311                 .res_video = imx135_res_video,
312                 .n_res_preview = ARRAY_SIZE(imx135_res_preview),
313                 .n_res_still = ARRAY_SIZE(imx135_res_still),
314                 .n_res_video = ARRAY_SIZE(imx135_res_video),
315         },
316         [IMX135_VICTORIABAY] = {
317                 .init_settings = imx135_init_settings,
318                 .res_preview = imx135_res_preview_mofd,
319                 .res_still = imx135_res_still_mofd,
320                 .res_video = imx135_res_video,
321                 .n_res_preview = ARRAY_SIZE(imx135_res_preview_mofd),
322                 .n_res_still = ARRAY_SIZE(imx135_res_still_mofd),
323                 .n_res_video = ARRAY_SIZE(imx135_res_video),
324         },
325         [IMX132_SALTBAY] = {
326                 .init_settings = imx132_init_settings,
327                 .res_preview = imx132_res_preview,
328                 .res_still = imx132_res_still,
329                 .res_video = imx132_res_video,
330                 .n_res_preview = ARRAY_SIZE(imx132_res_preview),
331                 .n_res_still = ARRAY_SIZE(imx132_res_still),
332                 .n_res_video = ARRAY_SIZE(imx132_res_video),
333         },
334         [IMX134_VALLEYVIEW] = {
335                 .init_settings = imx134_init_settings,
336                 .res_preview = imx134_res_preview,
337                 .res_still = imx134_res_still,
338                 .res_video = imx134_res_video,
339                 .n_res_preview = ARRAY_SIZE(imx134_res_preview),
340                 .n_res_still = ARRAY_SIZE(imx134_res_still),
341                 .n_res_video = ARRAY_SIZE(imx134_res_video),
342         },
343         [IMX208_MOFD_PD2] = {
344                 .init_settings = imx208_init_settings,
345                 .res_preview = imx208_res_preview,
346                 .res_still = imx208_res_still,
347                 .res_video = imx208_res_video,
348                 .n_res_preview = ARRAY_SIZE(imx208_res_preview),
349                 .n_res_still = ARRAY_SIZE(imx208_res_still),
350                 .n_res_video = ARRAY_SIZE(imx208_res_video),
351         },
352         [IMX219_MFV0_PRH] = {
353                 .init_settings = imx219_init_settings,
354                 .res_preview = imx219_res_preview,
355                 .res_still = imx219_res_still,
356                 .res_video = imx219_res_video,
357                 .n_res_preview = ARRAY_SIZE(imx219_res_preview),
358                 .n_res_still = ARRAY_SIZE(imx219_res_still),
359                 .n_res_video = ARRAY_SIZE(imx219_res_video),
360         },
361         [IMX227_SAND] = {
362                 .init_settings = imx227_init_settings,
363                 .res_preview = imx227_res_preview,
364                 .res_still = imx227_res_still,
365                 .res_video = imx227_res_video,
366                 .n_res_preview = ARRAY_SIZE(imx227_res_preview),
367                 .n_res_still = ARRAY_SIZE(imx227_res_still),
368                 .n_res_video = ARRAY_SIZE(imx227_res_video),
369         },
370 };
371
372 struct imx_reg_addr {
373         u16 frame_length_lines;
374         u16 line_length_pixels;
375         u16 horizontal_start_h;
376         u16 vertical_start_h;
377         u16 horizontal_end_h;
378         u16 vertical_end_h;
379         u16 horizontal_output_size_h;
380         u16 vertical_output_size_h;
381         u16 coarse_integration_time;
382         u16 img_orientation;
383         u16 global_gain;
384         u16 dgc_adj;
385 };
386
387 struct imx_reg_addr imx_addr = {
388         IMX_FRAME_LENGTH_LINES,
389         IMX_LINE_LENGTH_PIXELS,
390         IMX_HORIZONTAL_START_H,
391         IMX_VERTICAL_START_H,
392         IMX_HORIZONTAL_END_H,
393         IMX_VERTICAL_END_H,
394         IMX_HORIZONTAL_OUTPUT_SIZE_H,
395         IMX_VERTICAL_OUTPUT_SIZE_H,
396         IMX_COARSE_INTEGRATION_TIME,
397         IMX_IMG_ORIENTATION,
398         IMX_GLOBAL_GAIN,
399         IMX_DGC_ADJ,
400 };
401
402 struct imx_reg_addr imx219_addr = {
403         IMX219_FRAME_LENGTH_LINES,
404         IMX219_LINE_LENGTH_PIXELS,
405         IMX219_HORIZONTAL_START_H,
406         IMX219_VERTICAL_START_H,
407         IMX219_HORIZONTAL_END_H,
408         IMX219_VERTICAL_END_H,
409         IMX219_HORIZONTAL_OUTPUT_SIZE_H,
410         IMX219_VERTICAL_OUTPUT_SIZE_H,
411         IMX219_COARSE_INTEGRATION_TIME,
412         IMX219_IMG_ORIENTATION,
413         IMX219_GLOBAL_GAIN,
414         IMX219_DGC_ADJ,
415 };
416
417 #define v4l2_format_capture_type_entry(_width, _height, \
418                 _pixelformat, _bytesperline, _colorspace) \
419         {\
420                 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,\
421                 .fmt.pix.width = (_width),\
422                 .fmt.pix.height = (_height),\
423                 .fmt.pix.pixelformat = (_pixelformat),\
424                 .fmt.pix.bytesperline = (_bytesperline),\
425                 .fmt.pix.colorspace = (_colorspace),\
426                 .fmt.pix.sizeimage = (_height)*(_bytesperline),\
427         }
428
429 #define s_output_format_entry(_width, _height, _pixelformat, \
430                 _bytesperline, _colorspace, _fps) \
431         {\
432                 .v4l2_fmt = v4l2_format_capture_type_entry(_width, \
433                         _height, _pixelformat, _bytesperline, \
434                                 _colorspace),\
435                 .fps = (_fps),\
436         }
437
438 #define s_output_format_reg_entry(_width, _height, _pixelformat, \
439                 _bytesperline, _colorspace, _fps, _reg_setting) \
440         {\
441                 .s_fmt = s_output_format_entry(_width, _height,\
442                                 _pixelformat, _bytesperline, \
443                                 _colorspace, _fps),\
444                 .reg_setting = (_reg_setting),\
445         }
446
447 /* imx device structure */
448 struct imx_device {
449         struct v4l2_subdev sd;
450         struct media_pad pad;
451         struct v4l2_mbus_framefmt format;
452         struct camera_sensor_platform_data *platform_data;
453         struct mutex input_lock; /* serialize sensor's ioctl */
454         int fmt_idx;
455         int status;
456         int streaming;
457         int power;
458         int run_mode;
459         int vt_pix_clk_freq_mhz;
460         int fps_index;
461         u32 focus;
462         u16 sensor_id;                  /* Sensor id from registers */
463         u16 i2c_id;                     /* Sensor id from i2c_device_id */
464         u16 coarse_itg;
465         u16 fine_itg;
466         u16 digital_gain;
467         u16 gain;
468         u16 pixels_per_line;
469         u16 lines_per_frame;
470         u8 targetfps;
471         u8 fps;
472         const struct imx_reg *regs;
473         u8 res;
474         u8 type;
475         u8 sensor_revision;
476         u8 *otp_data;
477         struct imx_settings *mode_tables;
478         struct imx_vcm *vcm_driver;
479         struct imx_otp *otp_driver;
480         const struct imx_resolution *curr_res_table;
481         unsigned long entries_curr_table;
482         const struct firmware *fw;
483         struct imx_reg_addr *reg_addr;
484         const struct imx_reg *param_hold;
485         const struct imx_reg *param_update;
486
487         /* used for h/b blank tuning */
488         struct v4l2_ctrl_handler ctrl_handler;
489         struct v4l2_ctrl *pixel_rate;
490         struct v4l2_ctrl *h_blank;
491         struct v4l2_ctrl *v_blank;
492         struct v4l2_ctrl *link_freq;
493         struct v4l2_ctrl *h_flip;
494         struct v4l2_ctrl *v_flip;
495
496         /* Test pattern control */
497         struct v4l2_ctrl *tp_mode;
498         struct v4l2_ctrl *tp_r;
499         struct v4l2_ctrl *tp_gr;
500         struct v4l2_ctrl *tp_gb;
501         struct v4l2_ctrl *tp_b;
502
503         /* FIXME! */
504         bool new_res_sel_method;
505 };
506
507 #define to_imx_sensor(x) container_of(x, struct imx_device, sd)
508
509 #define IMX_MAX_WRITE_BUF_SIZE  32
510 struct imx_write_buffer {
511         u16 addr;
512         u8 data[IMX_MAX_WRITE_BUF_SIZE];
513 };
514
515 struct imx_write_ctrl {
516         int index;
517         struct imx_write_buffer buffer;
518 };
519
520 static const struct imx_reg imx_soft_standby[] = {
521         {IMX_8BIT, 0x0100, 0x00},
522         {IMX_TOK_TERM, 0, 0}
523 };
524
525 static const struct imx_reg imx_streaming[] = {
526         {IMX_8BIT, 0x0100, 0x01},
527         {IMX_TOK_TERM, 0, 0}
528 };
529
530 static const struct imx_reg imx_param_hold[] = {
531         {IMX_8BIT, 0x0104, 0x01},       /* GROUPED_PARAMETER_HOLD */
532         {IMX_TOK_TERM, 0, 0}
533 };
534
535 static const struct imx_reg imx_param_update[] = {
536         {IMX_8BIT, 0x0104, 0x00},       /* GROUPED_PARAMETER_HOLD */
537         {IMX_TOK_TERM, 0, 0}
538 };
539
540 static const struct imx_reg imx219_param_hold[] = {
541         {IMX_TOK_TERM, 0, 0}
542 };
543
544 static const struct imx_reg imx219_param_update[] = {
545         {IMX_TOK_TERM, 0, 0}
546 };
547
548 extern int ad5816g_vcm_power_up(struct v4l2_subdev *sd);
549 extern int ad5816g_vcm_power_down(struct v4l2_subdev *sd);
550 extern int ad5816g_t_focus_abs(struct v4l2_subdev *sd, s32 value);
551 extern int ad5816g_t_focus_rel(struct v4l2_subdev *sd, s32 value);
552 extern int ad5816g_q_focus_status(struct v4l2_subdev *sd, s32 *value);
553 extern int ad5816g_q_focus_abs(struct v4l2_subdev *sd, s32 *value);
554 extern int ad5816g_t_vcm_slew(struct v4l2_subdev *sd, s32 value);
555 extern int ad5816g_t_vcm_timing(struct v4l2_subdev *sd, s32 value);
556
557 extern int drv201_vcm_power_up(struct v4l2_subdev *sd);
558 extern int drv201_vcm_power_down(struct v4l2_subdev *sd);
559 extern int drv201_t_focus_abs(struct v4l2_subdev *sd, s32 value);
560 extern int drv201_t_focus_rel(struct v4l2_subdev *sd, s32 value);
561 extern int drv201_q_focus_status(struct v4l2_subdev *sd, s32 *value);
562 extern int drv201_q_focus_abs(struct v4l2_subdev *sd, s32 *value);
563 extern int drv201_t_vcm_slew(struct v4l2_subdev *sd, s32 value);
564 extern int drv201_t_vcm_timing(struct v4l2_subdev *sd, s32 value);
565
566 extern int dw9714_vcm_power_up(struct v4l2_subdev *sd);
567 extern int dw9714_vcm_power_down(struct v4l2_subdev *sd);
568 extern int dw9714_t_focus_abs(struct v4l2_subdev *sd, s32 value);
569 extern int dw9714_t_focus_abs_init(struct v4l2_subdev *sd);
570 extern int dw9714_t_focus_rel(struct v4l2_subdev *sd, s32 value);
571 extern int dw9714_q_focus_status(struct v4l2_subdev *sd, s32 *value);
572 extern int dw9714_q_focus_abs(struct v4l2_subdev *sd, s32 *value);
573 extern int dw9714_t_vcm_slew(struct v4l2_subdev *sd, s32 value);
574 extern int dw9714_t_vcm_timing(struct v4l2_subdev *sd, s32 value);
575
576 extern int dw9719_vcm_power_up(struct v4l2_subdev *sd);
577 extern int dw9719_vcm_power_down(struct v4l2_subdev *sd);
578 extern int dw9719_t_focus_abs(struct v4l2_subdev *sd, s32 value);
579 extern int dw9719_t_focus_rel(struct v4l2_subdev *sd, s32 value);
580 extern int dw9719_q_focus_status(struct v4l2_subdev *sd, s32 *value);
581 extern int dw9719_q_focus_abs(struct v4l2_subdev *sd, s32 *value);
582 extern int dw9719_t_vcm_slew(struct v4l2_subdev *sd, s32 value);
583 extern int dw9719_t_vcm_timing(struct v4l2_subdev *sd, s32 value);
584
585 extern int dw9718_vcm_power_up(struct v4l2_subdev *sd);
586 extern int dw9718_vcm_power_down(struct v4l2_subdev *sd);
587 extern int dw9718_t_focus_abs(struct v4l2_subdev *sd, s32 value);
588 extern int dw9718_t_focus_rel(struct v4l2_subdev *sd, s32 value);
589 extern int dw9718_q_focus_status(struct v4l2_subdev *sd, s32 *value);
590 extern int dw9718_q_focus_abs(struct v4l2_subdev *sd, s32 *value);
591 extern int dw9718_t_vcm_slew(struct v4l2_subdev *sd, s32 value);
592 extern int dw9718_t_vcm_timing(struct v4l2_subdev *sd, s32 value);
593
594 extern int vcm_power_up(struct v4l2_subdev *sd);
595 extern int vcm_power_down(struct v4l2_subdev *sd);
596
597 struct imx_vcm imx_vcms[] = {
598         [IMX175_MERRFLD] = {
599                 .power_up = drv201_vcm_power_up,
600                 .power_down = drv201_vcm_power_down,
601                 .t_focus_abs = drv201_t_focus_abs,
602                 .t_focus_abs_init = NULL,
603                 .t_focus_rel = drv201_t_focus_rel,
604                 .q_focus_status = drv201_q_focus_status,
605                 .q_focus_abs = drv201_q_focus_abs,
606                 .t_vcm_slew = drv201_t_vcm_slew,
607                 .t_vcm_timing = drv201_t_vcm_timing,
608         },
609         [IMX175_VALLEYVIEW] = {
610                 .power_up = dw9714_vcm_power_up,
611                 .power_down = dw9714_vcm_power_down,
612                 .t_focus_abs = dw9714_t_focus_abs,
613                 .t_focus_abs_init = NULL,
614                 .t_focus_rel = dw9714_t_focus_rel,
615                 .q_focus_status = dw9714_q_focus_status,
616                 .q_focus_abs = dw9714_q_focus_abs,
617                 .t_vcm_slew = dw9714_t_vcm_slew,
618                 .t_vcm_timing = dw9714_t_vcm_timing,
619         },
620         [IMX135_SALTBAY] = {
621                 .power_up = ad5816g_vcm_power_up,
622                 .power_down = ad5816g_vcm_power_down,
623                 .t_focus_abs = ad5816g_t_focus_abs,
624                 .t_focus_abs_init = NULL,
625                 .t_focus_rel = ad5816g_t_focus_rel,
626                 .q_focus_status = ad5816g_q_focus_status,
627                 .q_focus_abs = ad5816g_q_focus_abs,
628                 .t_vcm_slew = ad5816g_t_vcm_slew,
629                 .t_vcm_timing = ad5816g_t_vcm_timing,
630         },
631         [IMX135_VICTORIABAY] = {
632                 .power_up = dw9719_vcm_power_up,
633                 .power_down = dw9719_vcm_power_down,
634                 .t_focus_abs = dw9719_t_focus_abs,
635                 .t_focus_abs_init = NULL,
636                 .t_focus_rel = dw9719_t_focus_rel,
637                 .q_focus_status = dw9719_q_focus_status,
638                 .q_focus_abs = dw9719_q_focus_abs,
639                 .t_vcm_slew = dw9719_t_vcm_slew,
640                 .t_vcm_timing = dw9719_t_vcm_timing,
641         },
642         [IMX134_VALLEYVIEW] = {
643                 .power_up = dw9714_vcm_power_up,
644                 .power_down = dw9714_vcm_power_down,
645                 .t_focus_abs = dw9714_t_focus_abs,
646                 .t_focus_abs_init = dw9714_t_focus_abs_init,
647                 .t_focus_rel = dw9714_t_focus_rel,
648                 .q_focus_status = dw9714_q_focus_status,
649                 .q_focus_abs = dw9714_q_focus_abs,
650                 .t_vcm_slew = dw9714_t_vcm_slew,
651                 .t_vcm_timing = dw9714_t_vcm_timing,
652         },
653         [IMX219_MFV0_PRH] = {
654                 .power_up = dw9718_vcm_power_up,
655                 .power_down = dw9718_vcm_power_down,
656                 .t_focus_abs = dw9718_t_focus_abs,
657                 .t_focus_abs_init = NULL,
658                 .t_focus_rel = dw9718_t_focus_rel,
659                 .q_focus_status = dw9718_q_focus_status,
660                 .q_focus_abs = dw9718_q_focus_abs,
661                 .t_vcm_slew = dw9718_t_vcm_slew,
662                 .t_vcm_timing = dw9718_t_vcm_timing,
663         },
664         [IMX_ID_DEFAULT] = {
665                 .power_up = NULL,
666                 .power_down = NULL,
667                 .t_focus_abs_init = NULL,
668         },
669 };
670
671 extern void *dummy_otp_read(struct v4l2_subdev *sd, u8 dev_addr,
672         u32 start_addr, u32 size);
673 extern void *imx_otp_read(struct v4l2_subdev *sd, u8 dev_addr,
674         u32 start_addr, u32 size);
675 extern void *e2prom_otp_read(struct v4l2_subdev *sd, u8 dev_addr,
676         u32 start_addr, u32 size);
677 extern void *brcc064_otp_read(struct v4l2_subdev *sd, u8 dev_addr,
678         u32 start_addr, u32 size);
679 extern void *imx227_otp_read(struct v4l2_subdev *sd, u8 dev_addr,
680         u32 start_addr, u32 size);
681 extern void *e2prom_otp_read(struct v4l2_subdev *sd, u8 dev_addr,
682         u32 start_addr, u32 size);
683 struct imx_otp imx_otps[] = {
684         [IMX175_MERRFLD] = {
685                 .otp_read = imx_otp_read,
686                 .dev_addr = E2PROM_ADDR,
687                 .start_addr = 0,
688                 .size = DEFAULT_OTP_SIZE,
689         },
690         [IMX175_VALLEYVIEW] = {
691                 .otp_read = e2prom_otp_read,
692                 .dev_addr = E2PROM_ABICO_SS89A839_ADDR,
693                 .start_addr = E2PROM_2ADDR,
694                 .size = DEFAULT_OTP_SIZE,
695         },
696         [IMX135_SALTBAY] = {
697                 .otp_read = e2prom_otp_read,
698                 .dev_addr = E2PROM_ADDR,
699                 .start_addr = 0,
700                 .size = DEFAULT_OTP_SIZE,
701         },
702         [IMX135_VICTORIABAY] = {
703                 .otp_read = imx_otp_read,
704                 .size = DEFAULT_OTP_SIZE,
705         },
706         [IMX134_VALLEYVIEW] = {
707                 .otp_read = e2prom_otp_read,
708                 .dev_addr = E2PROM_LITEON_12P1BA869D_ADDR,
709                 .start_addr = 0,
710                 .size = E2PROM_LITEON_12P1BA869D_SIZE,
711         },
712         [IMX132_SALTBAY] = {
713                 .otp_read = dummy_otp_read,
714                 .size = DEFAULT_OTP_SIZE,
715         },
716         [IMX208_MOFD_PD2] = {
717                 .otp_read = dummy_otp_read,
718                 .size = DEFAULT_OTP_SIZE,
719         },
720         [IMX219_MFV0_PRH] = {
721                 .otp_read = brcc064_otp_read,
722                 .dev_addr = E2PROM_ADDR,
723                 .start_addr = 0,
724                 .size = IMX219_OTP_SIZE,
725         },
726         [IMX227_SAND] = {
727                 .otp_read = imx227_otp_read,
728                 .size = IMX227_OTP_SIZE,
729         },
730         [IMX_ID_DEFAULT] = {
731                 .otp_read = dummy_otp_read,
732                 .size = DEFAULT_OTP_SIZE,
733         },
734 };
735
736 #endif
737