2 * V4L2 Capture IC Preprocess Subdev for Freescale i.MX5/6 SOC
4 * This subdevice handles capture of video frames from the CSI or VDIC,
5 * which are routed directly to the Image Converter preprocess tasks,
6 * for resizing, colorspace conversion, and rotation.
8 * Copyright (c) 2012-2017 Mentor Graphics Inc.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 #include <linux/delay.h>
16 #include <linux/interrupt.h>
17 #include <linux/module.h>
18 #include <linux/sched.h>
19 #include <linux/slab.h>
20 #include <linux/spinlock.h>
21 #include <linux/timer.h>
22 #include <media/v4l2-ctrls.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-ioctl.h>
25 #include <media/v4l2-mc.h>
26 #include <media/v4l2-subdev.h>
27 #include <media/imx.h>
28 #include "imx-media.h"
32 * Min/Max supported width and heights.
34 * We allow planar output, so we have to align width at the source pad
35 * by 16 pixels to meet IDMAC alignment requirements for possible planar
38 * TODO: move this into pad format negotiation, if capture device
39 * has not requested a planar format, we should allow 8 pixel
40 * alignment at the source pad.
42 #define MIN_W_SINK 176
43 #define MIN_H_SINK 144
44 #define MAX_W_SINK 4096
45 #define MAX_H_SINK 4096
46 #define W_ALIGN_SINK 3 /* multiple of 8 pixels */
47 #define H_ALIGN_SINK 1 /* multiple of 2 lines */
49 #define MAX_W_SRC 1024
50 #define MAX_H_SRC 1024
51 #define W_ALIGN_SRC 4 /* multiple of 16 pixels */
52 #define H_ALIGN_SRC 1 /* multiple of 2 lines */
54 #define S_ALIGN 1 /* multiple of 2 */
57 struct imx_media_dev *md;
58 struct imx_ic_priv *ic_priv;
59 struct media_pad pad[PRPENCVF_NUM_PADS];
60 /* the video device at output pad */
61 struct imx_media_video_dev *vdev;
63 /* lock to protect all members below */
66 /* IPU units we require */
69 struct ipuv3_channel *out_ch;
70 struct ipuv3_channel *rot_in_ch;
71 struct ipuv3_channel *rot_out_ch;
73 /* active vb2 buffers to send to video dev sink */
74 struct imx_media_buffer *active_vb2_buf[2];
75 struct imx_media_dma_buf underrun_buf;
77 int ipu_buf_num; /* ipu double buffer index: 0-1 */
79 /* the sink for the captured frames */
80 struct media_entity *sink;
81 /* the source subdev */
82 struct v4l2_subdev *src_sd;
84 struct v4l2_mbus_framefmt format_mbus[PRPENCVF_NUM_PADS];
85 const struct imx_media_pixfmt *cc[PRPENCVF_NUM_PADS];
86 struct v4l2_fract frame_interval;
88 struct imx_media_dma_buf rot_buf[2];
91 struct v4l2_ctrl_handler ctrl_hdlr;
92 int rotation; /* degrees */
96 /* derived from rotation, hflip, vflip controls */
97 enum ipu_rotate_mode rot_mode;
99 spinlock_t irqlock; /* protect eof_irq handler */
101 struct timer_list eof_timeout_timer;
106 bool last_eof; /* waiting for last EOF at stream off */
107 bool nfb4eof; /* NFB4EOF encountered during streaming */
108 struct completion last_eof_comp;
111 static const struct prp_channels {
116 [IC_TASK_ENCODER] = {
117 .out_ch = IPUV3_CHANNEL_IC_PRP_ENC_MEM,
118 .rot_in_ch = IPUV3_CHANNEL_MEM_ROT_ENC,
119 .rot_out_ch = IPUV3_CHANNEL_ROT_ENC_MEM,
121 [IC_TASK_VIEWFINDER] = {
122 .out_ch = IPUV3_CHANNEL_IC_PRP_VF_MEM,
123 .rot_in_ch = IPUV3_CHANNEL_MEM_ROT_VF,
124 .rot_out_ch = IPUV3_CHANNEL_ROT_VF_MEM,
128 static inline struct prp_priv *sd_to_priv(struct v4l2_subdev *sd)
130 struct imx_ic_priv *ic_priv = v4l2_get_subdevdata(sd);
132 return ic_priv->task_priv;
135 static void prp_put_ipu_resources(struct prp_priv *priv)
138 ipu_ic_put(priv->ic);
142 ipu_idmac_put(priv->out_ch);
146 ipu_idmac_put(priv->rot_in_ch);
147 priv->rot_in_ch = NULL;
149 if (priv->rot_out_ch)
150 ipu_idmac_put(priv->rot_out_ch);
151 priv->rot_out_ch = NULL;
154 static int prp_get_ipu_resources(struct prp_priv *priv)
156 struct imx_ic_priv *ic_priv = priv->ic_priv;
158 struct ipuv3_channel *out_ch, *rot_in_ch, *rot_out_ch;
159 int ret, task = ic_priv->task_id;
161 priv->ipu = priv->md->ipu[ic_priv->ipu_id];
163 ic = ipu_ic_get(priv->ipu, task);
165 v4l2_err(&ic_priv->sd, "failed to get IC\n");
171 out_ch = ipu_idmac_get(priv->ipu, prp_channel[task].out_ch);
172 if (IS_ERR(out_ch)) {
173 v4l2_err(&ic_priv->sd, "could not get IDMAC channel %u\n",
174 prp_channel[task].out_ch);
175 ret = PTR_ERR(out_ch);
178 priv->out_ch = out_ch;
180 rot_in_ch = ipu_idmac_get(priv->ipu, prp_channel[task].rot_in_ch);
181 if (IS_ERR(rot_in_ch)) {
182 v4l2_err(&ic_priv->sd, "could not get IDMAC channel %u\n",
183 prp_channel[task].rot_in_ch);
184 ret = PTR_ERR(rot_in_ch);
187 priv->rot_in_ch = rot_in_ch;
189 rot_out_ch = ipu_idmac_get(priv->ipu, prp_channel[task].rot_out_ch);
190 if (IS_ERR(rot_out_ch)) {
191 v4l2_err(&ic_priv->sd, "could not get IDMAC channel %u\n",
192 prp_channel[task].rot_out_ch);
193 ret = PTR_ERR(rot_out_ch);
196 priv->rot_out_ch = rot_out_ch;
200 prp_put_ipu_resources(priv);
204 static void prp_vb2_buf_done(struct prp_priv *priv, struct ipuv3_channel *ch)
206 struct imx_media_video_dev *vdev = priv->vdev;
207 struct imx_media_buffer *done, *next;
208 struct vb2_buffer *vb;
211 done = priv->active_vb2_buf[priv->ipu_buf_num];
213 done->vbuf.field = vdev->fmt.fmt.pix.field;
214 vb = &done->vbuf.vb2_buf;
215 vb->timestamp = ktime_get_ns();
216 vb2_buffer_done(vb, priv->nfb4eof ?
217 VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
220 priv->nfb4eof = false;
222 /* get next queued buffer */
223 next = imx_media_capture_device_next_buf(vdev);
225 phys = vb2_dma_contig_plane_dma_addr(&next->vbuf.vb2_buf, 0);
226 priv->active_vb2_buf[priv->ipu_buf_num] = next;
228 phys = priv->underrun_buf.phys;
229 priv->active_vb2_buf[priv->ipu_buf_num] = NULL;
232 if (ipu_idmac_buffer_is_ready(ch, priv->ipu_buf_num))
233 ipu_idmac_clear_buffer(ch, priv->ipu_buf_num);
235 ipu_cpmem_set_buffer(ch, priv->ipu_buf_num, phys);
238 static irqreturn_t prp_eof_interrupt(int irq, void *dev_id)
240 struct prp_priv *priv = dev_id;
241 struct ipuv3_channel *channel;
243 spin_lock(&priv->irqlock);
245 if (priv->last_eof) {
246 complete(&priv->last_eof_comp);
247 priv->last_eof = false;
251 channel = (ipu_rot_mode_is_irt(priv->rot_mode)) ?
252 priv->rot_out_ch : priv->out_ch;
254 prp_vb2_buf_done(priv, channel);
256 /* select new IPU buf */
257 ipu_idmac_select_buffer(channel, priv->ipu_buf_num);
258 /* toggle IPU double-buffer index */
259 priv->ipu_buf_num ^= 1;
261 /* bump the EOF timeout timer */
262 mod_timer(&priv->eof_timeout_timer,
263 jiffies + msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT));
266 spin_unlock(&priv->irqlock);
270 static irqreturn_t prp_nfb4eof_interrupt(int irq, void *dev_id)
272 struct prp_priv *priv = dev_id;
273 struct imx_ic_priv *ic_priv = priv->ic_priv;
275 spin_lock(&priv->irqlock);
278 * this is not an unrecoverable error, just mark
279 * the next captured frame with vb2 error flag.
281 priv->nfb4eof = true;
283 v4l2_err(&ic_priv->sd, "NFB4EOF\n");
285 spin_unlock(&priv->irqlock);
291 * EOF timeout timer function.
294 * EOF timeout timer function. This is an unrecoverable condition
295 * without a stream restart.
297 static void prp_eof_timeout(unsigned long data)
299 struct prp_priv *priv = (struct prp_priv *)data;
300 struct imx_media_video_dev *vdev = priv->vdev;
301 struct imx_ic_priv *ic_priv = priv->ic_priv;
303 v4l2_err(&ic_priv->sd, "EOF timeout\n");
305 /* signal a fatal error to capture device */
306 imx_media_capture_device_error(vdev);
309 static void prp_setup_vb2_buf(struct prp_priv *priv, dma_addr_t *phys)
311 struct imx_media_video_dev *vdev = priv->vdev;
312 struct imx_media_buffer *buf;
315 for (i = 0; i < 2; i++) {
316 buf = imx_media_capture_device_next_buf(vdev);
318 priv->active_vb2_buf[i] = buf;
319 phys[i] = vb2_dma_contig_plane_dma_addr(
320 &buf->vbuf.vb2_buf, 0);
322 priv->active_vb2_buf[i] = NULL;
323 phys[i] = priv->underrun_buf.phys;
328 static void prp_unsetup_vb2_buf(struct prp_priv *priv,
329 enum vb2_buffer_state return_status)
331 struct imx_media_buffer *buf;
334 /* return any remaining active frames with return_status */
335 for (i = 0; i < 2; i++) {
336 buf = priv->active_vb2_buf[i];
338 struct vb2_buffer *vb = &buf->vbuf.vb2_buf;
340 vb->timestamp = ktime_get_ns();
341 vb2_buffer_done(vb, return_status);
346 static int prp_setup_channel(struct prp_priv *priv,
347 struct ipuv3_channel *channel,
348 enum ipu_rotate_mode rot_mode,
349 dma_addr_t addr0, dma_addr_t addr1,
350 bool rot_swap_width_height)
352 struct imx_media_video_dev *vdev = priv->vdev;
353 const struct imx_media_pixfmt *outcc;
354 struct v4l2_mbus_framefmt *infmt;
355 unsigned int burst_size;
356 struct ipu_image image;
359 infmt = &priv->format_mbus[PRPENCVF_SINK_PAD];
362 ipu_cpmem_zero(channel);
364 memset(&image, 0, sizeof(image));
365 image.pix = vdev->fmt.fmt.pix;
366 image.rect.width = image.pix.width;
367 image.rect.height = image.pix.height;
369 if (rot_swap_width_height) {
370 swap(image.pix.width, image.pix.height);
371 swap(image.rect.width, image.rect.height);
372 /* recalc stride using swapped width */
373 image.pix.bytesperline = outcc->planar ?
375 (image.pix.width * outcc->bpp) >> 3;
381 if (channel == priv->out_ch || channel == priv->rot_out_ch) {
382 switch (image.pix.pixelformat) {
383 case V4L2_PIX_FMT_YUV420:
384 case V4L2_PIX_FMT_YVU420:
385 case V4L2_PIX_FMT_NV12:
386 /* Skip writing U and V components to odd rows */
387 ipu_cpmem_skip_odd_chroma_rows(channel);
392 ret = ipu_cpmem_set_image(channel, &image);
396 if (channel == priv->rot_in_ch ||
397 channel == priv->rot_out_ch) {
399 ipu_cpmem_set_block_mode(channel);
401 burst_size = (image.pix.width & 0xf) ? 8 : 16;
404 ipu_cpmem_set_burstsize(channel, burst_size);
407 ipu_cpmem_set_rotation(channel, rot_mode);
409 if (image.pix.field == V4L2_FIELD_NONE &&
410 V4L2_FIELD_HAS_BOTH(infmt->field) &&
411 channel == priv->out_ch)
412 ipu_cpmem_interlaced_scan(channel, image.pix.bytesperline);
414 ret = ipu_ic_task_idma_init(priv->ic, channel,
415 image.pix.width, image.pix.height,
416 burst_size, rot_mode);
420 ipu_cpmem_set_axi_id(channel, 1);
422 ipu_idmac_set_double_buffer(channel, true);
427 static int prp_setup_rotation(struct prp_priv *priv)
429 struct imx_media_video_dev *vdev = priv->vdev;
430 struct imx_ic_priv *ic_priv = priv->ic_priv;
431 const struct imx_media_pixfmt *outcc, *incc;
432 struct v4l2_mbus_framefmt *infmt;
433 struct v4l2_pix_format *outfmt;
437 infmt = &priv->format_mbus[PRPENCVF_SINK_PAD];
438 outfmt = &vdev->fmt.fmt.pix;
439 incc = priv->cc[PRPENCVF_SINK_PAD];
442 ret = imx_media_alloc_dma_buf(priv->md, &priv->rot_buf[0],
445 v4l2_err(&ic_priv->sd, "failed to alloc rot_buf[0], %d\n", ret);
448 ret = imx_media_alloc_dma_buf(priv->md, &priv->rot_buf[1],
451 v4l2_err(&ic_priv->sd, "failed to alloc rot_buf[1], %d\n", ret);
455 ret = ipu_ic_task_init(priv->ic,
456 infmt->width, infmt->height,
457 outfmt->height, outfmt->width,
458 incc->cs, outcc->cs);
460 v4l2_err(&ic_priv->sd, "ipu_ic_task_init failed, %d\n", ret);
464 /* init the IC-PRP-->MEM IDMAC channel */
465 ret = prp_setup_channel(priv, priv->out_ch, IPU_ROTATE_NONE,
466 priv->rot_buf[0].phys, priv->rot_buf[1].phys,
469 v4l2_err(&ic_priv->sd,
470 "prp_setup_channel(out_ch) failed, %d\n", ret);
474 /* init the MEM-->IC-PRP ROT IDMAC channel */
475 ret = prp_setup_channel(priv, priv->rot_in_ch, priv->rot_mode,
476 priv->rot_buf[0].phys, priv->rot_buf[1].phys,
479 v4l2_err(&ic_priv->sd,
480 "prp_setup_channel(rot_in_ch) failed, %d\n", ret);
484 prp_setup_vb2_buf(priv, phys);
486 /* init the destination IC-PRP ROT-->MEM IDMAC channel */
487 ret = prp_setup_channel(priv, priv->rot_out_ch, IPU_ROTATE_NONE,
491 v4l2_err(&ic_priv->sd,
492 "prp_setup_channel(rot_out_ch) failed, %d\n", ret);
496 /* now link IC-PRP-->MEM to MEM-->IC-PRP ROT */
497 ipu_idmac_link(priv->out_ch, priv->rot_in_ch);
500 ipu_ic_enable(priv->ic);
502 /* set buffers ready */
503 ipu_idmac_select_buffer(priv->out_ch, 0);
504 ipu_idmac_select_buffer(priv->out_ch, 1);
505 ipu_idmac_select_buffer(priv->rot_out_ch, 0);
506 ipu_idmac_select_buffer(priv->rot_out_ch, 1);
508 /* enable the channels */
509 ipu_idmac_enable_channel(priv->out_ch);
510 ipu_idmac_enable_channel(priv->rot_in_ch);
511 ipu_idmac_enable_channel(priv->rot_out_ch);
513 /* and finally enable the IC PRP task */
514 ipu_ic_task_enable(priv->ic);
519 prp_unsetup_vb2_buf(priv, VB2_BUF_STATE_QUEUED);
521 imx_media_free_dma_buf(priv->md, &priv->rot_buf[1]);
523 imx_media_free_dma_buf(priv->md, &priv->rot_buf[0]);
527 static void prp_unsetup_rotation(struct prp_priv *priv)
529 ipu_ic_task_disable(priv->ic);
531 ipu_idmac_disable_channel(priv->out_ch);
532 ipu_idmac_disable_channel(priv->rot_in_ch);
533 ipu_idmac_disable_channel(priv->rot_out_ch);
535 ipu_idmac_unlink(priv->out_ch, priv->rot_in_ch);
537 ipu_ic_disable(priv->ic);
539 imx_media_free_dma_buf(priv->md, &priv->rot_buf[0]);
540 imx_media_free_dma_buf(priv->md, &priv->rot_buf[1]);
543 static int prp_setup_norotation(struct prp_priv *priv)
545 struct imx_media_video_dev *vdev = priv->vdev;
546 struct imx_ic_priv *ic_priv = priv->ic_priv;
547 const struct imx_media_pixfmt *outcc, *incc;
548 struct v4l2_mbus_framefmt *infmt;
549 struct v4l2_pix_format *outfmt;
553 infmt = &priv->format_mbus[PRPENCVF_SINK_PAD];
554 outfmt = &vdev->fmt.fmt.pix;
555 incc = priv->cc[PRPENCVF_SINK_PAD];
558 ret = ipu_ic_task_init(priv->ic,
559 infmt->width, infmt->height,
560 outfmt->width, outfmt->height,
561 incc->cs, outcc->cs);
563 v4l2_err(&ic_priv->sd, "ipu_ic_task_init failed, %d\n", ret);
567 prp_setup_vb2_buf(priv, phys);
569 /* init the IC PRP-->MEM IDMAC channel */
570 ret = prp_setup_channel(priv, priv->out_ch, priv->rot_mode,
571 phys[0], phys[1], false);
573 v4l2_err(&ic_priv->sd,
574 "prp_setup_channel(out_ch) failed, %d\n", ret);
578 ipu_cpmem_dump(priv->out_ch);
579 ipu_ic_dump(priv->ic);
582 ipu_ic_enable(priv->ic);
584 /* set buffers ready */
585 ipu_idmac_select_buffer(priv->out_ch, 0);
586 ipu_idmac_select_buffer(priv->out_ch, 1);
588 /* enable the channels */
589 ipu_idmac_enable_channel(priv->out_ch);
591 /* enable the IC task */
592 ipu_ic_task_enable(priv->ic);
597 prp_unsetup_vb2_buf(priv, VB2_BUF_STATE_QUEUED);
601 static void prp_unsetup_norotation(struct prp_priv *priv)
603 ipu_ic_task_disable(priv->ic);
604 ipu_idmac_disable_channel(priv->out_ch);
605 ipu_ic_disable(priv->ic);
608 static void prp_unsetup(struct prp_priv *priv,
609 enum vb2_buffer_state state)
611 if (ipu_rot_mode_is_irt(priv->rot_mode))
612 prp_unsetup_rotation(priv);
614 prp_unsetup_norotation(priv);
616 prp_unsetup_vb2_buf(priv, state);
619 static int prp_start(struct prp_priv *priv)
621 struct imx_ic_priv *ic_priv = priv->ic_priv;
622 struct imx_media_video_dev *vdev = priv->vdev;
623 struct v4l2_pix_format *outfmt;
626 ret = prp_get_ipu_resources(priv);
630 outfmt = &vdev->fmt.fmt.pix;
632 ret = imx_media_alloc_dma_buf(priv->md, &priv->underrun_buf,
637 priv->ipu_buf_num = 0;
639 /* init EOF completion waitq */
640 init_completion(&priv->last_eof_comp);
641 priv->last_eof = false;
642 priv->nfb4eof = false;
644 if (ipu_rot_mode_is_irt(priv->rot_mode))
645 ret = prp_setup_rotation(priv);
647 ret = prp_setup_norotation(priv);
649 goto out_free_underrun;
651 priv->nfb4eof_irq = ipu_idmac_channel_irq(priv->ipu,
654 ret = devm_request_irq(ic_priv->dev, priv->nfb4eof_irq,
655 prp_nfb4eof_interrupt, 0,
656 "imx-ic-prp-nfb4eof", priv);
658 v4l2_err(&ic_priv->sd,
659 "Error registering NFB4EOF irq: %d\n", ret);
663 if (ipu_rot_mode_is_irt(priv->rot_mode))
664 priv->eof_irq = ipu_idmac_channel_irq(
665 priv->ipu, priv->rot_out_ch, IPU_IRQ_EOF);
667 priv->eof_irq = ipu_idmac_channel_irq(
668 priv->ipu, priv->out_ch, IPU_IRQ_EOF);
670 ret = devm_request_irq(ic_priv->dev, priv->eof_irq,
671 prp_eof_interrupt, 0,
672 "imx-ic-prp-eof", priv);
674 v4l2_err(&ic_priv->sd,
675 "Error registering eof irq: %d\n", ret);
676 goto out_free_nfb4eof_irq;
680 ret = v4l2_subdev_call(priv->src_sd, video, s_stream, 1);
681 ret = (ret && ret != -ENOIOCTLCMD) ? ret : 0;
683 v4l2_err(&ic_priv->sd,
684 "upstream stream on failed: %d\n", ret);
685 goto out_free_eof_irq;
688 /* start the EOF timeout timer */
689 mod_timer(&priv->eof_timeout_timer,
690 jiffies + msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT));
695 devm_free_irq(ic_priv->dev, priv->eof_irq, priv);
696 out_free_nfb4eof_irq:
697 devm_free_irq(ic_priv->dev, priv->nfb4eof_irq, priv);
699 prp_unsetup(priv, VB2_BUF_STATE_QUEUED);
701 imx_media_free_dma_buf(priv->md, &priv->underrun_buf);
703 prp_put_ipu_resources(priv);
707 static void prp_stop(struct prp_priv *priv)
709 struct imx_ic_priv *ic_priv = priv->ic_priv;
713 /* mark next EOF interrupt as the last before stream off */
714 spin_lock_irqsave(&priv->irqlock, flags);
715 priv->last_eof = true;
716 spin_unlock_irqrestore(&priv->irqlock, flags);
719 * and then wait for interrupt handler to mark completion.
721 ret = wait_for_completion_timeout(
722 &priv->last_eof_comp,
723 msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT));
725 v4l2_warn(&ic_priv->sd, "wait last EOF timeout\n");
728 ret = v4l2_subdev_call(priv->src_sd, video, s_stream, 0);
729 if (ret && ret != -ENOIOCTLCMD)
730 v4l2_warn(&ic_priv->sd,
731 "upstream stream off failed: %d\n", ret);
733 devm_free_irq(ic_priv->dev, priv->eof_irq, priv);
734 devm_free_irq(ic_priv->dev, priv->nfb4eof_irq, priv);
736 prp_unsetup(priv, VB2_BUF_STATE_ERROR);
738 imx_media_free_dma_buf(priv->md, &priv->underrun_buf);
740 /* cancel the EOF timeout timer */
741 del_timer_sync(&priv->eof_timeout_timer);
743 prp_put_ipu_resources(priv);
746 static struct v4l2_mbus_framefmt *
747 __prp_get_fmt(struct prp_priv *priv, struct v4l2_subdev_pad_config *cfg,
748 unsigned int pad, enum v4l2_subdev_format_whence which)
750 struct imx_ic_priv *ic_priv = priv->ic_priv;
752 if (which == V4L2_SUBDEV_FORMAT_TRY)
753 return v4l2_subdev_get_try_format(&ic_priv->sd, cfg, pad);
755 return &priv->format_mbus[pad];
759 * Applies IC resizer and IDMAC alignment restrictions to output
760 * rectangle given the input rectangle, and depending on given
763 * The IC resizer cannot downsize more than 4:1. Note also that
764 * for 90 or 270 rotation, _both_ output width and height must
765 * be aligned by W_ALIGN_SRC, because the intermediate rotation
766 * buffer swaps output width/height, and the final output buffer
769 * Returns true if the output rectangle was modified.
771 static bool prp_bound_align_output(struct v4l2_mbus_framefmt *outfmt,
772 struct v4l2_mbus_framefmt *infmt,
773 enum ipu_rotate_mode rot_mode)
775 u32 orig_width = outfmt->width;
776 u32 orig_height = outfmt->height;
778 if (ipu_rot_mode_is_irt(rot_mode))
779 v4l_bound_align_image(&outfmt->width,
780 infmt->height / 4, MAX_H_SRC,
783 infmt->width / 4, MAX_W_SRC,
784 W_ALIGN_SRC, S_ALIGN);
786 v4l_bound_align_image(&outfmt->width,
787 infmt->width / 4, MAX_W_SRC,
790 infmt->height / 4, MAX_H_SRC,
791 H_ALIGN_SRC, S_ALIGN);
793 return outfmt->width != orig_width || outfmt->height != orig_height;
797 * V4L2 subdev operations.
800 static int prp_enum_mbus_code(struct v4l2_subdev *sd,
801 struct v4l2_subdev_pad_config *cfg,
802 struct v4l2_subdev_mbus_code_enum *code)
804 if (code->pad >= PRPENCVF_NUM_PADS)
807 return imx_media_enum_ipu_format(&code->code, code->index, CS_SEL_ANY);
810 static int prp_get_fmt(struct v4l2_subdev *sd,
811 struct v4l2_subdev_pad_config *cfg,
812 struct v4l2_subdev_format *sdformat)
814 struct prp_priv *priv = sd_to_priv(sd);
815 struct v4l2_mbus_framefmt *fmt;
818 if (sdformat->pad >= PRPENCVF_NUM_PADS)
821 mutex_lock(&priv->lock);
823 fmt = __prp_get_fmt(priv, cfg, sdformat->pad, sdformat->which);
829 sdformat->format = *fmt;
831 mutex_unlock(&priv->lock);
835 static void prp_try_fmt(struct prp_priv *priv,
836 struct v4l2_subdev_pad_config *cfg,
837 struct v4l2_subdev_format *sdformat,
838 const struct imx_media_pixfmt **cc)
840 struct v4l2_mbus_framefmt *infmt;
842 *cc = imx_media_find_ipu_format(sdformat->format.code, CS_SEL_ANY);
846 imx_media_enum_ipu_format(&code, 0, CS_SEL_ANY);
847 *cc = imx_media_find_ipu_format(code, CS_SEL_ANY);
848 sdformat->format.code = (*cc)->codes[0];
851 infmt = __prp_get_fmt(priv, cfg, PRPENCVF_SINK_PAD, sdformat->which);
853 if (sdformat->pad == PRPENCVF_SRC_PAD) {
854 if (sdformat->format.field != V4L2_FIELD_NONE)
855 sdformat->format.field = infmt->field;
857 prp_bound_align_output(&sdformat->format, infmt,
860 /* propagate colorimetry from sink */
861 sdformat->format.colorspace = infmt->colorspace;
862 sdformat->format.xfer_func = infmt->xfer_func;
863 sdformat->format.quantization = infmt->quantization;
864 sdformat->format.ycbcr_enc = infmt->ycbcr_enc;
866 v4l_bound_align_image(&sdformat->format.width,
867 MIN_W_SINK, MAX_W_SINK, W_ALIGN_SINK,
868 &sdformat->format.height,
869 MIN_H_SINK, MAX_H_SINK, H_ALIGN_SINK,
872 imx_media_fill_default_mbus_fields(&sdformat->format, infmt,
877 static int prp_set_fmt(struct v4l2_subdev *sd,
878 struct v4l2_subdev_pad_config *cfg,
879 struct v4l2_subdev_format *sdformat)
881 struct prp_priv *priv = sd_to_priv(sd);
882 struct imx_media_video_dev *vdev = priv->vdev;
883 const struct imx_media_pixfmt *cc;
884 struct v4l2_pix_format vdev_fmt;
885 struct v4l2_mbus_framefmt *fmt;
888 if (sdformat->pad >= PRPENCVF_NUM_PADS)
891 mutex_lock(&priv->lock);
893 if (priv->stream_count > 0) {
898 prp_try_fmt(priv, cfg, sdformat, &cc);
900 fmt = __prp_get_fmt(priv, cfg, sdformat->pad, sdformat->which);
901 *fmt = sdformat->format;
903 /* propagate a default format to source pad */
904 if (sdformat->pad == PRPENCVF_SINK_PAD) {
905 const struct imx_media_pixfmt *outcc;
906 struct v4l2_mbus_framefmt *outfmt;
907 struct v4l2_subdev_format format;
909 format.pad = PRPENCVF_SRC_PAD;
910 format.which = sdformat->which;
911 format.format = sdformat->format;
912 prp_try_fmt(priv, cfg, &format, &outcc);
914 outfmt = __prp_get_fmt(priv, cfg, PRPENCVF_SRC_PAD,
916 *outfmt = format.format;
917 if (sdformat->which == V4L2_SUBDEV_FORMAT_ACTIVE)
918 priv->cc[PRPENCVF_SRC_PAD] = outcc;
921 if (sdformat->which == V4L2_SUBDEV_FORMAT_TRY)
924 priv->cc[sdformat->pad] = cc;
926 /* propagate output pad format to capture device */
927 imx_media_mbus_fmt_to_pix_fmt(&vdev_fmt,
928 &priv->format_mbus[PRPENCVF_SRC_PAD],
929 priv->cc[PRPENCVF_SRC_PAD]);
930 mutex_unlock(&priv->lock);
931 imx_media_capture_device_set_format(vdev, &vdev_fmt);
935 mutex_unlock(&priv->lock);
939 static int prp_enum_frame_size(struct v4l2_subdev *sd,
940 struct v4l2_subdev_pad_config *cfg,
941 struct v4l2_subdev_frame_size_enum *fse)
943 struct prp_priv *priv = sd_to_priv(sd);
944 struct v4l2_subdev_format format = {0};
945 const struct imx_media_pixfmt *cc;
948 if (fse->pad >= PRPENCVF_NUM_PADS || fse->index != 0)
951 mutex_lock(&priv->lock);
953 format.pad = fse->pad;
954 format.which = fse->which;
955 format.format.code = fse->code;
956 format.format.width = 1;
957 format.format.height = 1;
958 prp_try_fmt(priv, cfg, &format, &cc);
959 fse->min_width = format.format.width;
960 fse->min_height = format.format.height;
962 if (format.format.code != fse->code) {
967 format.format.code = fse->code;
968 format.format.width = -1;
969 format.format.height = -1;
970 prp_try_fmt(priv, cfg, &format, &cc);
971 fse->max_width = format.format.width;
972 fse->max_height = format.format.height;
974 mutex_unlock(&priv->lock);
978 static int prp_link_setup(struct media_entity *entity,
979 const struct media_pad *local,
980 const struct media_pad *remote, u32 flags)
982 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
983 struct imx_ic_priv *ic_priv = v4l2_get_subdevdata(sd);
984 struct prp_priv *priv = ic_priv->task_priv;
985 struct v4l2_subdev *remote_sd;
988 dev_dbg(ic_priv->dev, "link setup %s -> %s", remote->entity->name,
989 local->entity->name);
991 mutex_lock(&priv->lock);
993 if (local->flags & MEDIA_PAD_FL_SINK) {
994 if (!is_media_entity_v4l2_subdev(remote->entity)) {
999 remote_sd = media_entity_to_v4l2_subdev(remote->entity);
1001 if (flags & MEDIA_LNK_FL_ENABLED) {
1006 priv->src_sd = remote_sd;
1008 priv->src_sd = NULL;
1014 /* this is the source pad */
1016 /* the remote must be the device node */
1017 if (!is_media_entity_v4l2_video_device(remote->entity)) {
1022 if (flags & MEDIA_LNK_FL_ENABLED) {
1032 priv->sink = remote->entity;
1034 mutex_unlock(&priv->lock);
1038 static int prp_s_ctrl(struct v4l2_ctrl *ctrl)
1040 struct prp_priv *priv = container_of(ctrl->handler,
1041 struct prp_priv, ctrl_hdlr);
1042 struct imx_ic_priv *ic_priv = priv->ic_priv;
1043 enum ipu_rotate_mode rot_mode;
1044 int rotation, ret = 0;
1047 mutex_lock(&priv->lock);
1049 rotation = priv->rotation;
1050 hflip = priv->hflip;
1051 vflip = priv->vflip;
1054 case V4L2_CID_HFLIP:
1055 hflip = (ctrl->val == 1);
1057 case V4L2_CID_VFLIP:
1058 vflip = (ctrl->val == 1);
1060 case V4L2_CID_ROTATE:
1061 rotation = ctrl->val;
1064 v4l2_err(&ic_priv->sd, "Invalid control\n");
1069 ret = ipu_degrees_to_rot_mode(&rot_mode, rotation, hflip, vflip);
1073 if (rot_mode != priv->rot_mode) {
1074 struct v4l2_mbus_framefmt outfmt, infmt;
1076 /* can't change rotation mid-streaming */
1077 if (priv->stream_count > 0) {
1082 outfmt = priv->format_mbus[PRPENCVF_SRC_PAD];
1083 infmt = priv->format_mbus[PRPENCVF_SINK_PAD];
1085 if (prp_bound_align_output(&outfmt, &infmt, rot_mode)) {
1090 priv->rot_mode = rot_mode;
1091 priv->rotation = rotation;
1092 priv->hflip = hflip;
1093 priv->vflip = vflip;
1097 mutex_unlock(&priv->lock);
1101 static const struct v4l2_ctrl_ops prp_ctrl_ops = {
1102 .s_ctrl = prp_s_ctrl,
1105 static int prp_init_controls(struct prp_priv *priv)
1107 struct imx_ic_priv *ic_priv = priv->ic_priv;
1108 struct v4l2_ctrl_handler *hdlr = &priv->ctrl_hdlr;
1111 v4l2_ctrl_handler_init(hdlr, 3);
1113 v4l2_ctrl_new_std(hdlr, &prp_ctrl_ops, V4L2_CID_HFLIP,
1115 v4l2_ctrl_new_std(hdlr, &prp_ctrl_ops, V4L2_CID_VFLIP,
1117 v4l2_ctrl_new_std(hdlr, &prp_ctrl_ops, V4L2_CID_ROTATE,
1120 ic_priv->sd.ctrl_handler = hdlr;
1127 v4l2_ctrl_handler_setup(hdlr);
1131 v4l2_ctrl_handler_free(hdlr);
1135 static int prp_s_stream(struct v4l2_subdev *sd, int enable)
1137 struct imx_ic_priv *ic_priv = v4l2_get_subdevdata(sd);
1138 struct prp_priv *priv = ic_priv->task_priv;
1141 mutex_lock(&priv->lock);
1143 if (!priv->src_sd || !priv->sink) {
1149 * enable/disable streaming only if stream_count is
1150 * going from 0 to 1 / 1 to 0.
1152 if (priv->stream_count != !enable)
1155 dev_dbg(ic_priv->dev, "stream %s\n", enable ? "ON" : "OFF");
1158 ret = prp_start(priv);
1165 priv->stream_count += enable ? 1 : -1;
1166 if (priv->stream_count < 0)
1167 priv->stream_count = 0;
1169 mutex_unlock(&priv->lock);
1173 static int prp_g_frame_interval(struct v4l2_subdev *sd,
1174 struct v4l2_subdev_frame_interval *fi)
1176 struct prp_priv *priv = sd_to_priv(sd);
1178 if (fi->pad >= PRPENCVF_NUM_PADS)
1181 mutex_lock(&priv->lock);
1182 fi->interval = priv->frame_interval;
1183 mutex_unlock(&priv->lock);
1188 static int prp_s_frame_interval(struct v4l2_subdev *sd,
1189 struct v4l2_subdev_frame_interval *fi)
1191 struct prp_priv *priv = sd_to_priv(sd);
1193 if (fi->pad >= PRPENCVF_NUM_PADS)
1196 /* No limits on frame interval */
1197 mutex_lock(&priv->lock);
1198 priv->frame_interval = fi->interval;
1199 mutex_unlock(&priv->lock);
1205 * retrieve our pads parsed from the OF graph by the media device
1207 static int prp_registered(struct v4l2_subdev *sd)
1209 struct prp_priv *priv = sd_to_priv(sd);
1213 /* get media device */
1214 priv->md = dev_get_drvdata(sd->v4l2_dev->dev);
1216 for (i = 0; i < PRPENCVF_NUM_PADS; i++) {
1217 priv->pad[i].flags = (i == PRPENCVF_SINK_PAD) ?
1218 MEDIA_PAD_FL_SINK : MEDIA_PAD_FL_SOURCE;
1220 /* set a default mbus format */
1221 imx_media_enum_ipu_format(&code, 0, CS_SEL_YUV);
1222 ret = imx_media_init_mbus_fmt(&priv->format_mbus[i],
1223 640, 480, code, V4L2_FIELD_NONE,
1229 /* init default frame interval */
1230 priv->frame_interval.numerator = 1;
1231 priv->frame_interval.denominator = 30;
1233 ret = media_entity_pads_init(&sd->entity, PRPENCVF_NUM_PADS,
1238 ret = imx_media_capture_device_register(priv->vdev);
1242 ret = imx_media_add_video_device(priv->md, priv->vdev);
1246 ret = prp_init_controls(priv);
1252 imx_media_capture_device_unregister(priv->vdev);
1256 static void prp_unregistered(struct v4l2_subdev *sd)
1258 struct prp_priv *priv = sd_to_priv(sd);
1260 imx_media_capture_device_unregister(priv->vdev);
1261 v4l2_ctrl_handler_free(&priv->ctrl_hdlr);
1264 static const struct v4l2_subdev_pad_ops prp_pad_ops = {
1265 .enum_mbus_code = prp_enum_mbus_code,
1266 .enum_frame_size = prp_enum_frame_size,
1267 .get_fmt = prp_get_fmt,
1268 .set_fmt = prp_set_fmt,
1271 static const struct v4l2_subdev_video_ops prp_video_ops = {
1272 .g_frame_interval = prp_g_frame_interval,
1273 .s_frame_interval = prp_s_frame_interval,
1274 .s_stream = prp_s_stream,
1277 static const struct media_entity_operations prp_entity_ops = {
1278 .link_setup = prp_link_setup,
1279 .link_validate = v4l2_subdev_link_validate,
1282 static const struct v4l2_subdev_ops prp_subdev_ops = {
1283 .video = &prp_video_ops,
1284 .pad = &prp_pad_ops,
1287 static const struct v4l2_subdev_internal_ops prp_internal_ops = {
1288 .registered = prp_registered,
1289 .unregistered = prp_unregistered,
1292 static int prp_init(struct imx_ic_priv *ic_priv)
1294 struct prp_priv *priv;
1296 priv = devm_kzalloc(ic_priv->dev, sizeof(*priv), GFP_KERNEL);
1300 ic_priv->task_priv = priv;
1301 priv->ic_priv = ic_priv;
1303 spin_lock_init(&priv->irqlock);
1304 setup_timer(&priv->eof_timeout_timer, prp_eof_timeout,
1305 (unsigned long)priv);
1307 priv->vdev = imx_media_capture_device_init(&ic_priv->sd,
1309 if (IS_ERR(priv->vdev))
1310 return PTR_ERR(priv->vdev);
1312 mutex_init(&priv->lock);
1317 static void prp_remove(struct imx_ic_priv *ic_priv)
1319 struct prp_priv *priv = ic_priv->task_priv;
1321 mutex_destroy(&priv->lock);
1322 imx_media_capture_device_remove(priv->vdev);
1325 struct imx_ic_ops imx_ic_prpencvf_ops = {
1326 .subdev_ops = &prp_subdev_ops,
1327 .internal_ops = &prp_internal_ops,
1328 .entity_ops = &prp_entity_ops,
1330 .remove = prp_remove,