1 // SPDX-License-Identifier: GPL-2.0+
3 * abstraction of the spi interface of HopeRf rf69 radio module
5 * Copyright (C) 2016 Wolf-Entwicklungen
6 * Marcus Wolf <linux@wolf-entwicklungen.de>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 /* enable prosa debug info */
21 /* enable print of values on reg access */
23 /* enable print of values on fifo access */
24 #undef DEBUG_FIFO_ACCESS
26 #include <linux/types.h>
27 #include <linux/spi/spi.h>
30 #include "rf69_registers.h"
32 #define F_OSC 32000000 /* in Hz */
33 #define FIFO_SIZE 66 /* in byte */
35 /*-------------------------------------------------------------------------*/
37 static u8 rf69_read_reg(struct spi_device *spi, u8 addr)
41 retval = spi_w8r8(spi, addr);
46 * should never happen, since we already checked,
47 * that module is connected. Therefore no error
48 * handling, just an optional error message...
50 dev_dbg(&spi->dev, "read 0x%x FAILED\n", addr);
52 dev_dbg(&spi->dev, "read 0x%x from reg 0x%x\n", retval, addr);
58 static int rf69_write_reg(struct spi_device *spi, u8 addr, u8 value)
63 buffer[0] = addr | WRITE_BIT;
66 retval = spi_write(spi, &buffer, 2);
71 * should never happen, since we already checked,
72 * that module is connected. Therefore no error
73 * handling, just an optional error message...
75 dev_dbg(&spi->dev, "write 0x%x to 0x%x FAILED\n", value, addr);
77 dev_dbg(&spi->dev, "wrote 0x%x to reg 0x%x\n", value, addr);
83 /*-------------------------------------------------------------------------*/
85 static int rf69_set_bit(struct spi_device *spi, u8 reg, u8 mask)
89 tmp = rf69_read_reg(spi, reg);
91 return rf69_write_reg(spi, reg, tmp);
94 static int rf69_clear_bit(struct spi_device *spi, u8 reg, u8 mask)
98 tmp = rf69_read_reg(spi, reg);
100 return rf69_write_reg(spi, reg, tmp);
103 static inline int rf69_read_mod_write(struct spi_device *spi, u8 reg,
108 tmp = rf69_read_reg(spi, reg);
109 tmp = (tmp & ~mask) | value;
110 return rf69_write_reg(spi, reg, tmp);
113 /*-------------------------------------------------------------------------*/
115 int rf69_set_mode(struct spi_device *spi, enum mode mode)
117 static const u8 mode_map[] = {
118 [transmit] = OPMODE_MODE_TRANSMIT,
119 [receive] = OPMODE_MODE_RECEIVE,
120 [synthesizer] = OPMODE_MODE_SYNTHESIZER,
121 [standby] = OPMODE_MODE_STANDBY,
122 [mode_sleep] = OPMODE_MODE_SLEEP,
125 if (unlikely(mode >= ARRAY_SIZE(mode_map))) {
126 dev_dbg(&spi->dev, "set: illegal input param");
130 return rf69_read_mod_write(spi, REG_OPMODE, MASK_OPMODE_MODE,
134 * we are using packet mode, so this check is not really needed
135 * but waiting for mode ready is necessary when going from sleep
136 * because the FIFO may not be immediately available from previous mode
137 * while (_mode == RF69_MODE_SLEEP && (READ_REG(REG_IRQFLAGS1) &
138 RF_IRQFLAGS1_MODEREADY) == 0x00); // Wait for ModeReady
142 int rf69_set_data_mode(struct spi_device *spi, u8 data_mode)
144 return rf69_read_mod_write(spi, REG_DATAMODUL, MASK_DATAMODUL_MODE,
148 int rf69_set_modulation(struct spi_device *spi, enum modulation modulation)
150 static const u8 modulation_map[] = {
151 [OOK] = DATAMODUL_MODULATION_TYPE_OOK,
152 [FSK] = DATAMODUL_MODULATION_TYPE_FSK,
155 if (unlikely(modulation >= ARRAY_SIZE(modulation_map))) {
156 dev_dbg(&spi->dev, "set: illegal input param");
160 return rf69_read_mod_write(spi, REG_DATAMODUL,
161 MASK_DATAMODUL_MODULATION_TYPE,
162 modulation_map[modulation]);
165 static enum modulation rf69_get_modulation(struct spi_device *spi)
169 modulation_reg = rf69_read_reg(spi, REG_DATAMODUL);
171 switch (modulation_reg & MASK_DATAMODUL_MODULATION_TYPE) {
172 case DATAMODUL_MODULATION_TYPE_OOK:
174 case DATAMODUL_MODULATION_TYPE_FSK:
181 int rf69_set_modulation_shaping(struct spi_device *spi,
182 enum mod_shaping mod_shaping)
184 switch (rf69_get_modulation(spi)) {
186 switch (mod_shaping) {
188 return rf69_read_mod_write(spi, REG_DATAMODUL,
189 MASK_DATAMODUL_MODULATION_SHAPE,
190 DATAMODUL_MODULATION_SHAPE_NONE);
192 return rf69_read_mod_write(spi, REG_DATAMODUL,
193 MASK_DATAMODUL_MODULATION_SHAPE,
194 DATAMODUL_MODULATION_SHAPE_1_0);
196 return rf69_read_mod_write(spi, REG_DATAMODUL,
197 MASK_DATAMODUL_MODULATION_SHAPE,
198 DATAMODUL_MODULATION_SHAPE_0_5);
200 return rf69_read_mod_write(spi, REG_DATAMODUL,
201 MASK_DATAMODUL_MODULATION_SHAPE,
202 DATAMODUL_MODULATION_SHAPE_0_3);
204 dev_dbg(&spi->dev, "set: illegal input param");
208 switch (mod_shaping) {
210 return rf69_read_mod_write(spi, REG_DATAMODUL,
211 MASK_DATAMODUL_MODULATION_SHAPE,
212 DATAMODUL_MODULATION_SHAPE_NONE);
214 return rf69_read_mod_write(spi, REG_DATAMODUL,
215 MASK_DATAMODUL_MODULATION_SHAPE,
216 DATAMODUL_MODULATION_SHAPE_BR);
218 return rf69_read_mod_write(spi, REG_DATAMODUL,
219 MASK_DATAMODUL_MODULATION_SHAPE,
220 DATAMODUL_MODULATION_SHAPE_2BR);
222 dev_dbg(&spi->dev, "set: illegal input param");
226 dev_dbg(&spi->dev, "set: modulation undefined");
231 int rf69_set_bit_rate(struct spi_device *spi, u16 bit_rate)
240 bit_rate_min = F_OSC / 8388608; // 8388608 = 2^23;
241 if (bit_rate < bit_rate_min) {
242 dev_dbg(&spi->dev, "setBitRate: illegal input param");
246 // calculate reg settings
247 bit_rate_reg = (F_OSC / bit_rate);
249 msb = (bit_rate_reg & 0xff00) >> 8;
250 lsb = (bit_rate_reg & 0xff);
253 retval = rf69_write_reg(spi, REG_BITRATE_MSB, msb);
256 retval = rf69_write_reg(spi, REG_BITRATE_LSB, lsb);
263 int rf69_set_deviation(struct spi_device *spi, u32 deviation)
270 u64 factor = 1000000; // to improve precision of calculation
272 // TODO: Dependency to bitrate
273 if (deviation < 600 || deviation > 500000) {
274 dev_dbg(&spi->dev, "set_deviation: illegal input param");
279 f_step = F_OSC * factor;
280 do_div(f_step, 524288); // 524288 = 2^19
282 // calculate register settings
283 f_reg = deviation * factor;
284 do_div(f_reg, f_step);
286 msb = (f_reg & 0xff00) >> 8;
287 lsb = (f_reg & 0xff);
290 if (msb & ~FDEVMASB_MASK) {
291 dev_dbg(&spi->dev, "set_deviation: err in calc of msb");
296 retval = rf69_write_reg(spi, REG_FDEV_MSB, msb);
299 retval = rf69_write_reg(spi, REG_FDEV_LSB, lsb);
306 int rf69_set_frequency(struct spi_device *spi, u32 frequency)
315 u64 factor = 1000000; // to improve precision of calculation
318 f_step = F_OSC * factor;
319 do_div(f_step, 524288); // 524288 = 2^19
322 f_max = div_u64(f_step * 8388608, factor);
323 if (frequency > f_max) {
324 dev_dbg(&spi->dev, "setFrequency: illegal input param");
328 // calculate reg settings
329 f_reg = frequency * factor;
330 do_div(f_reg, f_step);
332 msb = (f_reg & 0xff0000) >> 16;
333 mid = (f_reg & 0xff00) >> 8;
334 lsb = (f_reg & 0xff);
337 retval = rf69_write_reg(spi, REG_FRF_MSB, msb);
340 retval = rf69_write_reg(spi, REG_FRF_MID, mid);
343 retval = rf69_write_reg(spi, REG_FRF_LSB, lsb);
350 int rf69_enable_amplifier(struct spi_device *spi, u8 amplifier_mask)
352 return rf69_set_bit(spi, REG_PALEVEL, amplifier_mask);
355 int rf69_disable_amplifier(struct spi_device *spi, u8 amplifier_mask)
357 return rf69_clear_bit(spi, REG_PALEVEL, amplifier_mask);
360 int rf69_set_output_power_level(struct spi_device *spi, u8 power_level)
362 // TODO: Dependency to PA0,1,2 setting
366 if (power_level > 0x1f) {
367 dev_dbg(&spi->dev, "set: illegal input param");
372 return rf69_read_mod_write(spi, REG_PALEVEL, MASK_PALEVEL_OUTPUT_POWER,
376 int rf69_set_pa_ramp(struct spi_device *spi, enum pa_ramp pa_ramp)
378 static const u8 pa_ramp_map[] = {
379 [ramp3400] = PARAMP_3400,
380 [ramp2000] = PARAMP_2000,
381 [ramp1000] = PARAMP_1000,
382 [ramp500] = PARAMP_500,
383 [ramp250] = PARAMP_250,
384 [ramp125] = PARAMP_125,
385 [ramp100] = PARAMP_100,
386 [ramp62] = PARAMP_62,
387 [ramp50] = PARAMP_50,
388 [ramp40] = PARAMP_40,
389 [ramp31] = PARAMP_31,
390 [ramp25] = PARAMP_25,
391 [ramp20] = PARAMP_20,
392 [ramp15] = PARAMP_15,
393 [ramp10] = PARAMP_10,
396 if (unlikely(pa_ramp >= ARRAY_SIZE(pa_ramp_map))) {
397 dev_dbg(&spi->dev, "set: illegal input param");
401 return rf69_write_reg(spi, REG_PARAMP, pa_ramp_map[pa_ramp]);
404 int rf69_set_antenna_impedance(struct spi_device *spi,
405 enum antenna_impedance antenna_impedance)
407 switch (antenna_impedance) {
409 return rf69_clear_bit(spi, REG_LNA, MASK_LNA_ZIN);
410 case two_hundred_ohm:
411 return rf69_set_bit(spi, REG_LNA, MASK_LNA_ZIN);
413 dev_dbg(&spi->dev, "set: illegal input param");
418 int rf69_set_lna_gain(struct spi_device *spi, enum lna_gain lna_gain)
420 static const u8 lna_gain_map[] = {
421 [automatic] = LNA_GAIN_AUTO,
422 [max] = LNA_GAIN_MAX,
423 [max_minus_6] = LNA_GAIN_MAX_MINUS_6,
424 [max_minus_12] = LNA_GAIN_MAX_MINUS_12,
425 [max_minus_24] = LNA_GAIN_MAX_MINUS_24,
426 [max_minus_36] = LNA_GAIN_MAX_MINUS_36,
427 [max_minus_48] = LNA_GAIN_MAX_MINUS_48,
430 if (unlikely(lna_gain >= ARRAY_SIZE(lna_gain_map))) {
431 dev_dbg(&spi->dev, "set: illegal input param");
435 return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN,
436 lna_gain_map[lna_gain]);
439 static int rf69_set_bandwidth_intern(struct spi_device *spi, u8 reg,
440 enum mantisse mantisse, u8 exponent)
444 // check value for mantisse and exponent
446 dev_dbg(&spi->dev, "set: illegal input param");
450 if ((mantisse != mantisse16) &&
451 (mantisse != mantisse20) &&
452 (mantisse != mantisse24)) {
453 dev_dbg(&spi->dev, "set: illegal input param");
458 bandwidth = rf69_read_reg(spi, reg);
460 // "delete" mantisse and exponent = just keep the DCC setting
461 bandwidth = bandwidth & MASK_BW_DCC_FREQ;
466 bandwidth = bandwidth | BW_MANT_16;
469 bandwidth = bandwidth | BW_MANT_20;
472 bandwidth = bandwidth | BW_MANT_24;
477 bandwidth = bandwidth | exponent;
480 return rf69_write_reg(spi, reg, bandwidth);
483 int rf69_set_bandwidth(struct spi_device *spi, enum mantisse mantisse,
486 return rf69_set_bandwidth_intern(spi, REG_RXBW, mantisse, exponent);
489 int rf69_set_bandwidth_during_afc(struct spi_device *spi,
490 enum mantisse mantisse,
493 return rf69_set_bandwidth_intern(spi, REG_AFCBW, mantisse, exponent);
496 int rf69_set_ook_threshold_dec(struct spi_device *spi,
497 enum threshold_decrement threshold_decrement)
499 static const u8 td_map[] = {
500 [dec_every8th] = OOKPEAK_THRESHDEC_EVERY_8TH,
501 [dec_every4th] = OOKPEAK_THRESHDEC_EVERY_4TH,
502 [dec_every2nd] = OOKPEAK_THRESHDEC_EVERY_2ND,
503 [dec_once] = OOKPEAK_THRESHDEC_ONCE,
504 [dec_twice] = OOKPEAK_THRESHDEC_TWICE,
505 [dec_4times] = OOKPEAK_THRESHDEC_4_TIMES,
506 [dec_8times] = OOKPEAK_THRESHDEC_8_TIMES,
507 [dec_16times] = OOKPEAK_THRESHDEC_16_TIMES,
510 if (unlikely(threshold_decrement >= ARRAY_SIZE(td_map))) {
511 dev_dbg(&spi->dev, "set: illegal input param");
515 return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESDEC,
516 td_map[threshold_decrement]);
519 int rf69_set_dio_mapping(struct spi_device *spi, u8 dio_number, u8 value)
526 switch (dio_number) {
530 dio_addr = REG_DIOMAPPING1;
535 dio_addr = REG_DIOMAPPING1;
540 dio_addr = REG_DIOMAPPING1;
545 dio_addr = REG_DIOMAPPING1;
550 dio_addr = REG_DIOMAPPING2;
555 dio_addr = REG_DIOMAPPING2;
558 dev_dbg(&spi->dev, "set: illegal input param");
563 dio_value = rf69_read_reg(spi, dio_addr);
565 dio_value = dio_value & ~mask;
567 dio_value = dio_value | value << shift;
569 return rf69_write_reg(spi, dio_addr, dio_value);
572 bool rf69_get_flag(struct spi_device *spi, enum flag flag)
575 case mode_switch_completed:
576 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_MODE_READY);
577 case ready_to_receive:
578 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RX_READY);
580 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TX_READY);
582 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_PLL_LOCK);
583 case rssi_exceeded_threshold:
584 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RSSI);
586 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TIMEOUT);
588 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_AUTOMODE);
589 case sync_address_match:
590 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_SYNC_ADDRESS_MATCH);
592 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_FULL);
594 * case fifo_not_empty:
595 * return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY);
598 return !(rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY);
599 case fifo_level_below_threshold:
600 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_LEVEL);
602 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_OVERRUN);
604 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PACKET_SENT);
606 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PAYLOAD_READY);
608 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_CRC_OK);
610 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_LOW_BAT);
611 default: return false;
615 int rf69_set_rssi_threshold(struct spi_device *spi, u8 threshold)
617 /* no value check needed - u8 exactly matches register size */
619 return rf69_write_reg(spi, REG_RSSITHRESH, threshold);
622 int rf69_set_preamble_length(struct spi_device *spi, u16 preamble_length)
627 /* no value check needed - u16 exactly matches register size */
629 /* calculate reg settings */
630 msb = (preamble_length & 0xff00) >> 8;
631 lsb = (preamble_length & 0xff);
633 /* transmit to chip */
634 retval = rf69_write_reg(spi, REG_PREAMBLE_MSB, msb);
637 retval = rf69_write_reg(spi, REG_PREAMBLE_LSB, lsb);
642 int rf69_enable_sync(struct spi_device *spi)
644 return rf69_set_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_SYNC_ON);
647 int rf69_disable_sync(struct spi_device *spi)
649 return rf69_clear_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_SYNC_ON);
652 int rf69_set_fifo_fill_condition(struct spi_device *spi,
653 enum fifo_fill_condition fifo_fill_condition)
655 switch (fifo_fill_condition) {
657 return rf69_set_bit(spi, REG_SYNC_CONFIG,
658 MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
659 case after_sync_interrupt:
660 return rf69_clear_bit(spi, REG_SYNC_CONFIG,
661 MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
663 dev_dbg(&spi->dev, "set: illegal input param");
668 int rf69_set_sync_size(struct spi_device *spi, u8 sync_size)
671 if (sync_size > 0x07) {
672 dev_dbg(&spi->dev, "set: illegal input param");
677 return rf69_read_mod_write(spi, REG_SYNC_CONFIG,
678 MASK_SYNC_CONFIG_SYNC_SIZE,
682 int rf69_set_sync_values(struct spi_device *spi, u8 sync_values[8])
686 retval += rf69_write_reg(spi, REG_SYNCVALUE1, sync_values[0]);
687 retval += rf69_write_reg(spi, REG_SYNCVALUE2, sync_values[1]);
688 retval += rf69_write_reg(spi, REG_SYNCVALUE3, sync_values[2]);
689 retval += rf69_write_reg(spi, REG_SYNCVALUE4, sync_values[3]);
690 retval += rf69_write_reg(spi, REG_SYNCVALUE5, sync_values[4]);
691 retval += rf69_write_reg(spi, REG_SYNCVALUE6, sync_values[5]);
692 retval += rf69_write_reg(spi, REG_SYNCVALUE7, sync_values[6]);
693 retval += rf69_write_reg(spi, REG_SYNCVALUE8, sync_values[7]);
698 int rf69_set_packet_format(struct spi_device *spi,
699 enum packet_format packet_format)
701 switch (packet_format) {
702 case packet_length_var:
703 return rf69_set_bit(spi, REG_PACKETCONFIG1,
704 MASK_PACKETCONFIG1_PAKET_FORMAT_VARIABLE);
705 case packet_length_fix:
706 return rf69_clear_bit(spi, REG_PACKETCONFIG1,
707 MASK_PACKETCONFIG1_PAKET_FORMAT_VARIABLE);
709 dev_dbg(&spi->dev, "set: illegal input param");
714 int rf69_enable_crc(struct spi_device *spi)
716 return rf69_set_bit(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_CRC_ON);
719 int rf69_disable_crc(struct spi_device *spi)
721 return rf69_clear_bit(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_CRC_ON);
724 int rf69_set_address_filtering(struct spi_device *spi,
725 enum address_filtering address_filtering)
727 static const u8 af_map[] = {
728 [filtering_off] = PACKETCONFIG1_ADDRESSFILTERING_OFF,
729 [node_address] = PACKETCONFIG1_ADDRESSFILTERING_NODE,
730 [node_or_broadcast_address] =
731 PACKETCONFIG1_ADDRESSFILTERING_NODEBROADCAST,
734 if (unlikely(address_filtering >= ARRAY_SIZE(af_map))) {
735 dev_dbg(&spi->dev, "set: illegal input param");
739 return rf69_read_mod_write(spi, REG_PACKETCONFIG1,
740 MASK_PACKETCONFIG1_ADDRESSFILTERING,
741 af_map[address_filtering]);
744 int rf69_set_payload_length(struct spi_device *spi, u8 payload_length)
746 return rf69_write_reg(spi, REG_PAYLOAD_LENGTH, payload_length);
749 int rf69_set_node_address(struct spi_device *spi, u8 node_address)
751 return rf69_write_reg(spi, REG_NODEADRS, node_address);
754 int rf69_set_broadcast_address(struct spi_device *spi, u8 broadcast_address)
756 return rf69_write_reg(spi, REG_BROADCASTADRS, broadcast_address);
759 int rf69_set_tx_start_condition(struct spi_device *spi,
760 enum tx_start_condition tx_start_condition)
762 switch (tx_start_condition) {
764 return rf69_clear_bit(spi, REG_FIFO_THRESH,
765 MASK_FIFO_THRESH_TXSTART);
767 return rf69_set_bit(spi, REG_FIFO_THRESH,
768 MASK_FIFO_THRESH_TXSTART);
770 dev_dbg(&spi->dev, "set: illegal input param");
775 int rf69_set_fifo_threshold(struct spi_device *spi, u8 threshold)
779 /* check input value */
780 if (threshold & 0x80) {
781 dev_dbg(&spi->dev, "set: illegal input param");
786 retval = rf69_read_mod_write(spi, REG_FIFO_THRESH,
787 MASK_FIFO_THRESH_VALUE,
793 * access the fifo to activate new threshold
794 * retval (mis-) used as buffer here
796 return rf69_read_fifo(spi, (u8 *)&retval, 1);
799 int rf69_set_dagc(struct spi_device *spi, enum dagc dagc)
801 static const u8 dagc_map[] = {
802 [normal_mode] = DAGC_NORMAL,
803 [improve] = DAGC_IMPROVED_LOWBETA0,
804 [improve_for_low_modulation_index] = DAGC_IMPROVED_LOWBETA1,
807 if (unlikely(dagc >= ARRAY_SIZE(dagc_map))) {
808 dev_dbg(&spi->dev, "set: illegal input param");
812 return rf69_write_reg(spi, REG_TESTDAGC, dagc_map[dagc]);
815 /*-------------------------------------------------------------------------*/
817 int rf69_read_fifo(struct spi_device *spi, u8 *buffer, unsigned int size)
819 #ifdef DEBUG_FIFO_ACCESS
822 struct spi_transfer transfer;
823 u8 local_buffer[FIFO_SIZE + 1];
826 if (size > FIFO_SIZE) {
828 "read fifo: passed in buffer bigger then internal buffer\n");
832 /* prepare a bidirectional transfer */
833 local_buffer[0] = REG_FIFO;
834 memset(&transfer, 0, sizeof(transfer));
835 transfer.tx_buf = local_buffer;
836 transfer.rx_buf = local_buffer;
837 transfer.len = size + 1;
839 retval = spi_sync_transfer(spi, &transfer, 1);
841 #ifdef DEBUG_FIFO_ACCESS
842 for (i = 0; i < size; i++)
843 dev_dbg(&spi->dev, "%d - 0x%x\n", i, local_buffer[i + 1]);
846 memcpy(buffer, &local_buffer[1], size);
851 int rf69_write_fifo(struct spi_device *spi, u8 *buffer, unsigned int size)
853 #ifdef DEBUG_FIFO_ACCESS
856 char spi_address = REG_FIFO | WRITE_BIT;
857 u8 local_buffer[FIFO_SIZE + 1];
859 if (size > FIFO_SIZE) {
861 "read fifo: passed in buffer bigger then internal buffer\n");
865 local_buffer[0] = spi_address;
866 memcpy(&local_buffer[1], buffer, size);
868 #ifdef DEBUG_FIFO_ACCESS
869 for (i = 0; i < size; i++)
870 dev_dbg(&spi->dev, "0x%x\n", buffer[i]);
873 return spi_write(spi, local_buffer, size + 1);