GNU Linux-libre 4.14.290-gnu1
[releases.git] / drivers / staging / rtl8188eu / hal / odm_HWConfig.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  ******************************************************************************/
15
16 /*  include files */
17
18 #include "odm_precomp.h"
19
20 #define READ_AND_CONFIG     READ_AND_CONFIG_MP
21
22 #define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm))
23 #define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(dm_odm))
24
25 static u8 odm_QueryRxPwrPercentage(s8 AntPower)
26 {
27         if ((AntPower <= -100) || (AntPower >= 20))
28                 return  0;
29         else if (AntPower >= 0)
30                 return  100;
31         else
32                 return 100+AntPower;
33 }
34
35 /*  2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */
36 /*  IF other SW team do not support the feature, remove this section.?? */
37 static s32 odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s32 CurrSig)
38 {
39         s32 RetSig = 0;
40
41         if (CurrSig >= 51 && CurrSig <= 100)
42                 RetSig = 100;
43         else if (CurrSig >= 41 && CurrSig <= 50)
44                 RetSig = 80 + ((CurrSig - 40)*2);
45         else if (CurrSig >= 31 && CurrSig <= 40)
46                 RetSig = 66 + (CurrSig - 30);
47         else if (CurrSig >= 21 && CurrSig <= 30)
48                 RetSig = 54 + (CurrSig - 20);
49         else if (CurrSig >= 10 && CurrSig <= 20)
50                 RetSig = 42 + (((CurrSig - 10) * 2) / 3);
51         else if (CurrSig >= 5 && CurrSig <= 9)
52                 RetSig = 22 + (((CurrSig - 5) * 3) / 2);
53         else if (CurrSig >= 1 && CurrSig <= 4)
54                 RetSig = 6 + (((CurrSig - 1) * 3) / 2);
55         else
56                 RetSig = CurrSig;
57         return RetSig;
58 }
59
60 static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig)
61 {
62         return odm_SignalScaleMapping_92CSeries(dm_odm, CurrSig);
63 }
64
65 static u8 odm_EVMdbToPercentage(s8 Value)
66 {
67         /*  -33dB~0dB to 0%~99% */
68         s8 ret_val;
69
70         ret_val = Value;
71
72         if (ret_val >= 0)
73                 ret_val = 0;
74         if (ret_val <= -33)
75                 ret_val = -33;
76
77         ret_val = 0 - ret_val;
78         ret_val *= 3;
79
80         if (ret_val == 99)
81                 ret_val = 100;
82         return ret_val;
83 }
84
85 static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
86                         struct odm_phy_status_info *pPhyInfo,
87                         u8 *pPhyStatus,
88                         struct odm_per_pkt_info *pPktinfo)
89 {
90         struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table;
91         u8 i, Max_spatial_stream;
92         s8 rx_pwr[4], rx_pwr_all = 0;
93         u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
94         u8 RSSI, total_rssi = 0;
95         u8 isCCKrate = 0;
96         u8 rf_rx_num = 0;
97         u8 cck_highpwr = 0;
98         u8 LNA_idx, VGA_idx;
99
100         struct phy_status_rpt *pPhyStaRpt = (struct phy_status_rpt *)pPhyStatus;
101
102         isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
103
104         pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = -1;
105         pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
106
107         if (isCCKrate) {
108                 u8 cck_agc_rpt;
109
110                 dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
111                 /*  (1)Hardware does not provide RSSI for CCK */
112                 /*  (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
113
114                 cck_highpwr = dm_odm->bCckHighPower;
115
116                 cck_agc_rpt =  pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a;
117
118                 /* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
119                 /* The RSSI formula should be modified according to the gain table */
120                 /* In 88E, cck_highpwr is always set to 1 */
121                 LNA_idx = (cck_agc_rpt & 0xE0) >> 5;
122                 VGA_idx = cck_agc_rpt & 0x1F;
123                 switch (LNA_idx) {
124                 case 7:
125                         if (VGA_idx <= 27)
126                                 rx_pwr_all = -100 + 2*(27-VGA_idx); /* VGA_idx = 27~2 */
127                         else
128                                 rx_pwr_all = -100;
129                         break;
130                 case 6:
131                         rx_pwr_all = -48 + 2*(2-VGA_idx); /* VGA_idx = 2~0 */
132                         break;
133                 case 5:
134                         rx_pwr_all = -42 + 2*(7-VGA_idx); /* VGA_idx = 7~5 */
135                         break;
136                 case 4:
137                         rx_pwr_all = -36 + 2*(7-VGA_idx); /* VGA_idx = 7~4 */
138                         break;
139                 case 3:
140                         rx_pwr_all = -24 + 2*(7-VGA_idx); /* VGA_idx = 7~0 */
141                         break;
142                 case 2:
143                         if (cck_highpwr)
144                                 rx_pwr_all = -12 + 2*(5-VGA_idx); /* VGA_idx = 5~0 */
145                         else
146                                 rx_pwr_all = -6 + 2*(5-VGA_idx);
147                         break;
148                 case 1:
149                         rx_pwr_all = 8-2*VGA_idx;
150                         break;
151                 case 0:
152                         rx_pwr_all = 14-2*VGA_idx;
153                         break;
154                 default:
155                         break;
156                 }
157                 rx_pwr_all += 6;
158                 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
159                 if (!cck_highpwr) {
160                         if (PWDB_ALL >= 80)
161                                 PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;
162                         else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
163                                 PWDB_ALL += 3;
164                         if (PWDB_ALL > 100)
165                                 PWDB_ALL = 100;
166                 }
167
168                 pPhyInfo->RxPWDBAll = PWDB_ALL;
169                 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
170                 pPhyInfo->RecvSignalPower = rx_pwr_all;
171                 /*  (3) Get Signal Quality (EVM) */
172                 if (pPktinfo->bPacketMatchBSSID) {
173                         u8 SQ, SQ_rpt;
174
175                         if (pPhyInfo->RxPWDBAll > 40 && !dm_odm->bInHctTest) {
176                                 SQ = 100;
177                         } else {
178                                 SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
179
180                                 if (SQ_rpt > 64)
181                                         SQ = 0;
182                                 else if (SQ_rpt < 20)
183                                         SQ = 100;
184                                 else
185                                         SQ = ((64-SQ_rpt) * 100) / 44;
186                         }
187                         pPhyInfo->SignalQuality = SQ;
188                         pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = SQ;
189                         pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
190                 }
191         } else { /* is OFDM rate */
192                 dm_odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
193
194                 /*  (1)Get RSSI for HT rate */
195
196                  for (i = RF_PATH_A; i < RF_PATH_MAX; i++) {
197                         /*  2008/01/30 MH we will judge RF RX path now. */
198                         if (dm_odm->RFPathRxEnable & BIT(i))
199                                 rf_rx_num++;
200
201                         rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain & 0x3F)*2) - 110;
202
203                         pPhyInfo->RxPwr[i] = rx_pwr[i];
204
205                         /* Translate DBM to percentage. */
206                         RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
207                         total_rssi += RSSI;
208
209                         /* Modification for ext-LNA board */
210                         if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
211                                 if ((pPhyStaRpt->path_agc[i].trsw) == 1)
212                                         RSSI = (RSSI > 94) ? 100 : (RSSI + 6);
213                                 else
214                                         RSSI = (RSSI <= 16) ? (RSSI >> 3) : (RSSI - 16);
215
216                                 if ((RSSI <= 34) && (RSSI >= 4))
217                                         RSSI -= 4;
218                         }
219
220                         pPhyInfo->RxMIMOSignalStrength[i] = (u8)RSSI;
221
222                         /* Get Rx snr value in DB */
223                         pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
224                         dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
225                 }
226                 /*  (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
227                 rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110;
228
229                 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
230                 PWDB_ALL_BT = PWDB_ALL;
231
232                 pPhyInfo->RxPWDBAll = PWDB_ALL;
233                 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;
234                 pPhyInfo->RxPower = rx_pwr_all;
235                 pPhyInfo->RecvSignalPower = rx_pwr_all;
236
237                 /*  (3)EVM of HT rate */
238                 if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15)
239                         Max_spatial_stream = 2; /* both spatial stream make sense */
240                 else
241                         Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
242
243                 for (i = 0; i < Max_spatial_stream; i++) {
244                         /*  Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
245                         /*  fill most significant bit to "zero" when doing shifting operation which may change a negative */
246                         /*  value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore. */
247                         EVM = odm_EVMdbToPercentage((pPhyStaRpt->stream_rxevm[i]));     /* dbm */
248
249                         if (pPktinfo->bPacketMatchBSSID) {
250                                 if (i == RF_PATH_A) /*  Fill value in RFD, Get the first spatial stream only */
251                                         pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
252                                 pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
253                         }
254                 }
255         }
256         /* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */
257         /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */
258         if (isCCKrate) {
259                 pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, PWDB_ALL));/* PWDB_ALL; */
260         } else {
261                 if (rf_rx_num != 0)
262                         pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, total_rssi /= rf_rx_num));
263         }
264
265         /* For 92C/92D HW (Hybrid) Antenna Diversity */
266         pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;
267         /* For 88E HW Antenna Diversity */
268         dm_odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;
269         dm_odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;
270         dm_odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;
271 }
272
273 static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
274                                   struct odm_phy_status_info *pPhyInfo,
275                                   struct odm_per_pkt_info *pPktinfo)
276 {
277         s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK;
278         s32 UndecoratedSmoothedOFDM, RSSI_Ave;
279         u8 isCCKrate = 0;
280         u8 RSSI_max, RSSI_min, i;
281         u32 OFDM_pkt = 0;
282         u32 Weighting = 0;
283         struct sta_info *pEntry;
284         u8 antsel_tr_mux;
285         struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable;
286
287         if (pPktinfo->StationID == 0xFF)
288                 return;
289         pEntry = dm_odm->pODM_StaInfo[pPktinfo->StationID];
290         if (!IS_STA_VALID(pEntry))
291                 return;
292         if ((!pPktinfo->bPacketMatchBSSID))
293                 return;
294
295         isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
296
297         /* Smart Antenna Debug Message------------------  */
298
299         if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) {
300                 if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) {
301                         if (pPktinfo->bPacketToSelf) {
302                                 antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
303                                                 (pDM_FatTable->antsel_rx_keep_1<<1) |
304                                                 pDM_FatTable->antsel_rx_keep_0;
305                                 pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll;
306                                 pDM_FatTable->antRSSIcnt[antsel_tr_mux]++;
307                         }
308                 }
309         } else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) {
310                 if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
311                         antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
312                                         (pDM_FatTable->antsel_rx_keep_1<<1) | pDM_FatTable->antsel_rx_keep_0;
313                         rtl88eu_dm_ant_sel_statistics(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll);
314                 }
315         }
316         /* Smart Antenna Debug Message------------------ */
317
318         UndecoratedSmoothedCCK =  pEntry->rssi_stat.UndecoratedSmoothedCCK;
319         UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;
320         UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
321
322         if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
323                 if (!isCCKrate) { /* ofdm rate */
324                         if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_B] == 0) {
325                                 RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
326                         } else {
327                                 if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[RF_PATH_B]) {
328                                         RSSI_max = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
329                                         RSSI_min = pPhyInfo->RxMIMOSignalStrength[RF_PATH_B];
330                                 } else {
331                                         RSSI_max = pPhyInfo->RxMIMOSignalStrength[RF_PATH_B];
332                                         RSSI_min = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
333                                 }
334                                 if ((RSSI_max - RSSI_min) < 3)
335                                         RSSI_Ave = RSSI_max;
336                                 else if ((RSSI_max - RSSI_min) < 6)
337                                         RSSI_Ave = RSSI_max - 1;
338                                 else if ((RSSI_max - RSSI_min) < 10)
339                                         RSSI_Ave = RSSI_max - 2;
340                                 else
341                                         RSSI_Ave = RSSI_max - 3;
342                         }
343
344                         /* 1 Process OFDM RSSI */
345                         if (UndecoratedSmoothedOFDM <= 0) {     /*  initialize */
346                                 UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll;
347                         } else {
348                                 if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedOFDM) {
349                                         UndecoratedSmoothedOFDM =
350                                                         (((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
351                                                         (RSSI_Ave)) / (Rx_Smooth_Factor);
352                                         UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;
353                                 } else {
354                                         UndecoratedSmoothedOFDM =
355                                                         (((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
356                                                         (RSSI_Ave)) / (Rx_Smooth_Factor);
357                                 }
358                         }
359
360                         pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT(0);
361
362                 } else {
363                         RSSI_Ave = pPhyInfo->RxPWDBAll;
364
365                         /* 1 Process CCK RSSI */
366                         if (UndecoratedSmoothedCCK <= 0) {      /*  initialize */
367                                 UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll;
368                         } else {
369                                 if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedCCK) {
370                                         UndecoratedSmoothedCCK =
371                                                         ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) +
372                                                         pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
373                                         UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
374                                 } else {
375                                         UndecoratedSmoothedCCK =
376                                                         ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) +
377                                                         pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
378                                 }
379                         }
380                         pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1;
381                 }
382                 /* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */
383                 if (pEntry->rssi_stat.ValidBit >= 64)
384                         pEntry->rssi_stat.ValidBit = 64;
385                 else
386                         pEntry->rssi_stat.ValidBit++;
387
388                 for (i = 0; i < pEntry->rssi_stat.ValidBit; i++)
389                         OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap>>i) & BIT(0);
390
391                 if (pEntry->rssi_stat.ValidBit == 64) {
392                         Weighting = min_t(u32, OFDM_pkt << 4, 64);
393                         UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6;
394                 } else {
395                         if (pEntry->rssi_stat.ValidBit != 0)
396                                 UndecoratedSmoothedPWDB = (OFDM_pkt * UndecoratedSmoothedOFDM +
397                                                           (pEntry->rssi_stat.ValidBit-OFDM_pkt) *
398                                                           UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit;
399                         else
400                                 UndecoratedSmoothedPWDB = 0;
401                 }
402                 pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
403                 pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM;
404                 pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
405         }
406 }
407
408 /*  Endianness before calling this API */
409 static void ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct *dm_odm,
410                                          struct odm_phy_status_info *pPhyInfo,
411                                          u8 *pPhyStatus,
412                                          struct odm_per_pkt_info *pPktinfo)
413 {
414         odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus,
415                                          pPktinfo);
416         if (dm_odm->RSSI_test) {
417                 ;/*  Select the packets to do RSSI checking for antenna switching. */
418         } else {
419                 odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo);
420         }
421 }
422
423 void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm,
424                         struct odm_phy_status_info *pPhyInfo,
425                         u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo)
426 {
427         ODM_PhyStatusQuery_92CSeries(dm_odm, pPhyInfo, pPhyStatus, pPktinfo);
428 }