drivers/staging/rtl8188eu/hal/pwrseq.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /******************************************************************************
   3  *
   4  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   5  *
   6  ******************************************************************************/
   7
   8 #include "pwrseq.h"
   9 #include <rtl8188e_hal.h>
  10
  11 /*
  12     drivers should parse below arrays and do the corresponding actions
  13 */
  14 /* 3 Power on  Array */
  15 struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS +
  16                                          RTL8188E_TRANS_END_STEPS] = {
  17         RTL8188E_TRANS_CARDEMU_TO_ACT
  18         RTL8188E_TRANS_END
  19 };
  20
  21 /* 3Radio off Array */
  22 struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  23                                           RTL8188E_TRANS_END_STEPS] = {
  24         RTL8188E_TRANS_ACT_TO_CARDEMU
  25         RTL8188E_TRANS_END
  26 };
  27
  28 /* 3Card Disable Array */
  29 struct wl_pwr_cfg rtl8188E_card_disable_flow
  30         [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  31          RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
  32          RTL8188E_TRANS_END_STEPS] = {
  33                 RTL8188E_TRANS_ACT_TO_CARDEMU
  34                 RTL8188E_TRANS_CARDEMU_TO_CARDDIS
  35                 RTL8188E_TRANS_END
  36 };
  37
  38 /* 3 Card Enable Array */
  39 struct wl_pwr_cfg rtl8188E_card_enable_flow
  40         [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  41          RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
  42          RTL8188E_TRANS_END_STEPS] = {
  43                 RTL8188E_TRANS_CARDDIS_TO_CARDEMU
  44                 RTL8188E_TRANS_CARDEMU_TO_ACT
  45                 RTL8188E_TRANS_END
  46 };
  47
  48 /* 3Suspend Array */
  49 struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  50                                         RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
  51                                         RTL8188E_TRANS_END_STEPS] = {
  52         RTL8188E_TRANS_ACT_TO_CARDEMU
  53         RTL8188E_TRANS_CARDEMU_TO_SUS
  54         RTL8188E_TRANS_END
  55 };
  56
  57 /* 3 Resume Array */
  58 struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  59                                        RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
  60                                        RTL8188E_TRANS_END_STEPS] = {
  61         RTL8188E_TRANS_SUS_TO_CARDEMU
  62         RTL8188E_TRANS_CARDEMU_TO_ACT
  63         RTL8188E_TRANS_END
  64 };
  65
  66 /* 3HWPDN Array */
  67 struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  68                                       RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
  69                                       RTL8188E_TRANS_END_STEPS] = {
  70         RTL8188E_TRANS_ACT_TO_CARDEMU
  71         RTL8188E_TRANS_CARDEMU_TO_PDN
  72         RTL8188E_TRANS_END
  73 };
  74
  75 /* 3 Enter LPS */
  76 struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS +
  77                                           RTL8188E_TRANS_END_STEPS] = {
  78         /* FW behavior */
  79         RTL8188E_TRANS_ACT_TO_LPS
  80         RTL8188E_TRANS_END
  81 };
  82
  83 /* 3 Leave LPS */
  84 struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS +
  85                                           RTL8188E_TRANS_END_STEPS] = {
  86         /* FW behavior */
  87         RTL8188E_TRANS_LPS_TO_ACT
  88         RTL8188E_TRANS_END
  89 };