drivers/staging/rtl8188eu/hal/pwrseq.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  ******************************************************************************/
  15
  16 #include "pwrseq.h"
  17 #include <rtl8188e_hal.h>
  18
  19 /*
  20     drivers should parse below arrays and do the corresponding actions
  21 */
  22 /* 3 Power on  Array */
  23 struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS +
  24                                          RTL8188E_TRANS_END_STEPS] = {
  25         RTL8188E_TRANS_CARDEMU_TO_ACT
  26         RTL8188E_TRANS_END
  27 };
  28
  29 /* 3Radio off Array */
  30 struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  31                                           RTL8188E_TRANS_END_STEPS] = {
  32         RTL8188E_TRANS_ACT_TO_CARDEMU
  33         RTL8188E_TRANS_END
  34 };
  35
  36 /* 3Card Disable Array */
  37 struct wl_pwr_cfg rtl8188E_card_disable_flow
  38         [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  39          RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
  40          RTL8188E_TRANS_END_STEPS] = {
  41                 RTL8188E_TRANS_ACT_TO_CARDEMU
  42                 RTL8188E_TRANS_CARDEMU_TO_CARDDIS
  43                 RTL8188E_TRANS_END
  44 };
  45
  46 /* 3 Card Enable Array */
  47 struct wl_pwr_cfg rtl8188E_card_enable_flow
  48         [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  49          RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
  50          RTL8188E_TRANS_END_STEPS] = {
  51                 RTL8188E_TRANS_CARDDIS_TO_CARDEMU
  52                 RTL8188E_TRANS_CARDEMU_TO_ACT
  53                 RTL8188E_TRANS_END
  54 };
  55
  56 /* 3Suspend Array */
  57 struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  58                                         RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
  59                                         RTL8188E_TRANS_END_STEPS] = {
  60         RTL8188E_TRANS_ACT_TO_CARDEMU
  61         RTL8188E_TRANS_CARDEMU_TO_SUS
  62         RTL8188E_TRANS_END
  63 };
  64
  65 /* 3 Resume Array */
  66 struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  67                                        RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
  68                                        RTL8188E_TRANS_END_STEPS] = {
  69         RTL8188E_TRANS_SUS_TO_CARDEMU
  70         RTL8188E_TRANS_CARDEMU_TO_ACT
  71         RTL8188E_TRANS_END
  72 };
  73
  74 /* 3HWPDN Array */
  75 struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  76                                       RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
  77                                       RTL8188E_TRANS_END_STEPS] = {
  78         RTL8188E_TRANS_ACT_TO_CARDEMU
  79         RTL8188E_TRANS_CARDEMU_TO_PDN
  80         RTL8188E_TRANS_END
  81 };
  82
  83 /* 3 Enter LPS */
  84 struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS +
  85                                           RTL8188E_TRANS_END_STEPS] = {
  86         /* FW behavior */
  87         RTL8188E_TRANS_ACT_TO_LPS
  88         RTL8188E_TRANS_END
  89 };
  90
  91 /* 3 Leave LPS */
  92 struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS +
  93                                           RTL8188E_TRANS_END_STEPS] = {
  94         /* FW behavior */
  95         RTL8188E_TRANS_LPS_TO_ACT
  96         RTL8188E_TRANS_END
  97 };