drivers/staging/rtl8188eu/hal/pwrseqcmd.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  ******************************************************************************/
  15
  16 #include <pwrseqcmd.h>
  17 #include <usb_ops_linux.h>
  18
  19 /* This routine deals with the Power Configuration CMDs parsing
  20  * for RTL8723/RTL8188E Series IC.
  21  */
  22 u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers,
  23                             struct wl_pwr_cfg pwrseqcmd[])
  24 {
  25         struct wl_pwr_cfg pwrcfgcmd = {0};
  26         u8 poll_bit = false;
  27         u32 aryidx = 0;
  28         u8 value = 0;
  29         u32 offset = 0;
  30         u32 poll_count = 0; /*  polling autoload done. */
  31         u32 max_poll_count = 5000;
  32
  33         do {
  34                 pwrcfgcmd = pwrseqcmd[aryidx];
  35
  36                 RT_TRACE(_module_hal_init_c_, _drv_info_,
  37                          ("rtl88eu_pwrseqcmdparsing: offset(%#x) cut_msk(%#x)"
  38                           " cmd(%#x)"
  39                           "msk(%#x) value(%#x)\n",
  40                          GET_PWR_CFG_OFFSET(pwrcfgcmd),
  41                          GET_PWR_CFG_CUT_MASK(pwrcfgcmd),
  42                          GET_PWR_CFG_CMD(pwrcfgcmd),
  43                          GET_PWR_CFG_MASK(pwrcfgcmd),
  44                          GET_PWR_CFG_VALUE(pwrcfgcmd)));
  45
  46                 /* Only Handle the command whose CUT is matched */
  47                 if (GET_PWR_CFG_CUT_MASK(pwrcfgcmd) & cut_vers) {
  48                         switch (GET_PWR_CFG_CMD(pwrcfgcmd)) {
  49                         case PWR_CMD_READ:
  50                                 RT_TRACE(_module_hal_init_c_, _drv_info_,
  51                                          ("rtl88eu_pwrseqcmdparsing: PWR_CMD_READ\n"));
  52                                 break;
  53                         case PWR_CMD_WRITE:
  54                                 RT_TRACE(_module_hal_init_c_, _drv_info_,
  55                                          ("rtl88eu_pwrseqcmdparsing: PWR_CMD_WRITE\n"));
  56                                 offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
  57
  58                                 /*  Read the value from system register */
  59                                 value = usb_read8(padapter, offset);
  60
  61                                 value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd));
  62                                 value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) &
  63                                           GET_PWR_CFG_MASK(pwrcfgcmd));
  64
  65                                 /*  Write the value back to system register */
  66                                 usb_write8(padapter, offset, value);
  67                                 break;
  68                         case PWR_CMD_POLLING:
  69                                 RT_TRACE(_module_hal_init_c_, _drv_info_,
  70                                          ("rtl88eu_pwrseqcmdparsing: PWR_CMD_POLLING\n"));
  71
  72                                 poll_bit = false;
  73                                 offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
  74                                 do {
  75                                         value = usb_read8(padapter, offset);
  76                                         value &= GET_PWR_CFG_MASK(pwrcfgcmd);
  77
  78                                         if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) &
  79                                                       GET_PWR_CFG_MASK(pwrcfgcmd)))
  80                                                 poll_bit = true;
  81                                         else
  82                                                 udelay(10);
  83
  84                                         if (poll_count++ > max_poll_count) {
  85                                                 DBG_88E("Fail to polling Offset[%#x]\n", offset);
  86                                                 return false;
  87                                         }
  88                                 } while (!poll_bit);
  89                                 break;
  90                         case PWR_CMD_DELAY:
  91                                 RT_TRACE(_module_hal_init_c_, _drv_info_,
  92                                          ("rtl88eu_pwrseqcmdparsing: PWR_CMD_DELAY\n"));
  93                                 if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US)
  94                                         udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd));
  95                                 else
  96                                         udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd)*1000);
  97                                 break;
  98                         case PWR_CMD_END:
  99                                 /* When this command is parsed, end the process */
 100                                 RT_TRACE(_module_hal_init_c_, _drv_info_,
 101                                          ("rtl88eu_pwrseqcmdparsing: PWR_CMD_END\n"));
 102                                 return true;
 103                         default:
 104                                 RT_TRACE(_module_hal_init_c_, _drv_err_,
 105                                          ("rtl88eu_pwrseqcmdparsing: Unknown CMD!!\n"));
 106                                 break;
 107                         }
 108                 }
 109
 110                 aryidx++;/* Add Array Index */
 111         } while (1);
 112         return true;
 113 }