1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 ******************************************************************************/
17 #ifndef __HALHWOUTSRC_H__
18 #define __HALHWOUTSRC_H__
21 /*--------------------------Define -------------------------------------------*/
22 /* define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0) */
23 #define AGC_DIFF_CONFIG_MP(ic, band) (ODM_ReadAndConfig_MP_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_MP_##ic##_AGC_TAB_DIFF_##band, \
24 sizeof(Array_MP_##ic##_AGC_TAB_DIFF_##band)/sizeof(u32)))
25 #define AGC_DIFF_CONFIG_TC(ic, band) (ODM_ReadAndConfig_TC_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_TC_##ic##_AGC_TAB_DIFF_##band, \
26 sizeof(Array_TC_##ic##_AGC_TAB_DIFF_##band)/sizeof(u32)))
28 #define AGC_DIFF_CONFIG(ic, band)\
30 if (pDM_Odm->bIsMPChip)\
31 AGC_DIFF_CONFIG_MP(ic, band);\
33 AGC_DIFF_CONFIG_TC(ic, band);\
38 /* structure and define */
41 typedef struct _Phy_Rx_AGC_Info {
42 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
47 } PHY_RX_AGC_INFO_T, *pPHY_RX_AGC_INFO_T;
49 typedef struct _Phy_Status_Rpt_8192cd {
50 PHY_RX_AGC_INFO_T path_agc[2];
52 u8 cck_sig_qual_ofdm_pwdb_all;
53 u8 cck_agc_rpt_ofdm_cfosho_a;
54 u8 cck_rpt_b_ofdm_cfosho_b;
55 u8 rsvd_1;/* ch_corr_msb; */
56 u8 noise_power_db_msb;
61 u8 noise_power_db_lsb;
64 u8 stream_target_csi[2];
68 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
69 u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
76 #else /* _BIG_ENDIAN_ */
83 u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
85 } PHY_STATUS_RPT_8192CD_T, *PPHY_STATUS_RPT_8192CD_T;
88 typedef struct _Phy_Status_Rpt_8812 {
89 /* 2012.05.24 LukeLee: This structure should take big/little endian in consideration later..... */
93 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
97 #else /* _BIG_ENDIAN_ */
105 u8 cfosho[4]; /* DW 1 byte 1 DW 2 byte 0 */
108 s8 cfotail[4]; /* DW 2 byte 1 DW 3 byte 0 */
111 s8 rxevm[2]; /* DW 3 byte 1 DW 3 byte 2 */
112 s8 rxsnr[2]; /* DW 3 byte 3 DW 4 byte 0 */
116 u8 pdsnr[2]; /* DW 4 byte 3 DW 5 Byte 0 */
129 } PHY_STATUS_RPT_8812_T, *PPHY_STATUS_RPT_8812_T;
132 void ODM_PhyStatusQuery(
134 PODM_PHY_INFO_T pPhyInfo,
136 PODM_PACKET_INFO_T pPktinfo
139 HAL_STATUS ODM_ConfigRFWithTxPwrTrackHeaderFile(PDM_ODM_T pDM_Odm);
141 HAL_STATUS ODM_ConfigRFWithHeaderFile(
143 ODM_RF_Config_Type ConfigType,
144 ODM_RF_RADIO_PATH_E eRFPath
147 HAL_STATUS ODM_ConfigBBWithHeaderFile(
148 PDM_ODM_T pDM_Odm, ODM_BB_Config_Type ConfigType
151 HAL_STATUS ODM_ConfigMACWithHeaderFile(PDM_ODM_T pDM_Odm);
153 HAL_STATUS ODM_ConfigFWWithHeaderFile(
155 ODM_FW_Config_Type ConfigType,
160 s32 odm_SignalScaleMapping(PDM_ODM_T pDM_Odm, s32 CurrSig);