1 // SPDX-License-Identifier: GPL-2.0
2 /******************************************************************************
4 * Copyright(c) 2007 - 2016 Realtek Corporation.
7 * wlanfae <wlanfae@realtek.com>
8 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
11 * Larry Finger <Larry.Finger@lwfinger.net>
13 *****************************************************************************/
15 /* ************************************************************
17 * *************************************************************/
18 #include "mp_precomp.h"
19 #include "phydm_precomp.h"
21 static inline void phydm_update_rf_state(struct phy_dm_struct *dm,
22 struct dyn_pwr_saving *dm_ps_table,
25 int _is_force_in_normal)
27 if (_is_force_in_normal) {
28 dm_ps_table->cur_rf_state = rf_normal;
32 if (dm->rssi_min == 0xFF) {
33 dm_ps_table->cur_rf_state = RF_MAX;
37 if (dm_ps_table->pre_rf_state == rf_normal) {
38 if (dm->rssi_min >= _rssi_up_bound)
39 dm_ps_table->cur_rf_state = rf_save;
41 dm_ps_table->cur_rf_state = rf_normal;
43 if (dm->rssi_min <= _rssi_low_bound)
44 dm_ps_table->cur_rf_state = rf_normal;
46 dm_ps_table->cur_rf_state = rf_save;
50 void odm_dynamic_bb_power_saving_init(void *dm_void)
52 struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
53 struct dyn_pwr_saving *dm_ps_table = &dm->dm_ps_table;
55 dm_ps_table->pre_cca_state = CCA_MAX;
56 dm_ps_table->cur_cca_state = CCA_MAX;
57 dm_ps_table->pre_rf_state = RF_MAX;
58 dm_ps_table->cur_rf_state = RF_MAX;
59 dm_ps_table->rssi_val_min = 0;
60 dm_ps_table->initialize = 0;
63 void odm_rf_saving(void *dm_void, u8 is_force_in_normal)
65 struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
66 struct dyn_pwr_saving *dm_ps_table = &dm->dm_ps_table;
67 u8 rssi_up_bound = 30;
68 u8 rssi_low_bound = 25;
70 if (dm->patch_id == 40) { /* RT_CID_819x_FUNAI_TV */
74 if (dm_ps_table->initialize == 0) {
76 (odm_get_bb_reg(dm, 0x874, MASKDWORD) & 0x1CC000) >> 14;
78 (odm_get_bb_reg(dm, 0xc70, MASKDWORD) & BIT(3)) >> 3;
80 (odm_get_bb_reg(dm, 0x85c, MASKDWORD) & 0xFF000000) >>
83 (odm_get_bb_reg(dm, 0xa74, MASKDWORD) & 0xF000) >> 12;
84 /* Reg818 = phy_query_bb_reg(adapter, 0x818, MASKDWORD); */
85 dm_ps_table->initialize = 1;
88 phydm_update_rf_state(dm, dm_ps_table, rssi_up_bound, rssi_low_bound,
91 if (dm_ps_table->pre_rf_state != dm_ps_table->cur_rf_state) {
92 if (dm_ps_table->cur_rf_state == rf_save) {
93 odm_set_bb_reg(dm, 0x874, 0x1C0000,
94 0x2); /* reg874[20:18]=3'b010 */
95 odm_set_bb_reg(dm, 0xc70, BIT(3),
96 0); /* regc70[3]=1'b0 */
97 odm_set_bb_reg(dm, 0x85c, 0xFF000000,
98 0x63); /* reg85c[31:24]=0x63 */
99 odm_set_bb_reg(dm, 0x874, 0xC000,
100 0x2); /* reg874[15:14]=2'b10 */
101 odm_set_bb_reg(dm, 0xa74, 0xF000,
102 0x3); /* RegA75[7:4]=0x3 */
103 odm_set_bb_reg(dm, 0x818, BIT(28),
104 0x0); /* Reg818[28]=1'b0 */
105 odm_set_bb_reg(dm, 0x818, BIT(28),
106 0x1); /* Reg818[28]=1'b1 */
108 odm_set_bb_reg(dm, 0x874, 0x1CC000,
109 dm_ps_table->reg874);
110 odm_set_bb_reg(dm, 0xc70, BIT(3), dm_ps_table->regc70);
111 odm_set_bb_reg(dm, 0x85c, 0xFF000000,
112 dm_ps_table->reg85c);
113 odm_set_bb_reg(dm, 0xa74, 0xF000, dm_ps_table->rega74);
114 odm_set_bb_reg(dm, 0x818, BIT(28), 0x0);
116 dm_ps_table->pre_rf_state = dm_ps_table->cur_rf_state;