1 /******************************************************************************
3 * Copyright(c) 2007 - 2016 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
22 * Larry Finger <Larry.Finger@lwfinger.net>
24 *****************************************************************************/
26 /* ************************************************************
28 * *************************************************************/
29 #include "mp_precomp.h"
30 #include "phydm_precomp.h"
32 void odm_edca_turbo_init(void *dm_void)
34 struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
36 dm->dm_edca_table.is_current_turbo_edca = false;
37 dm->dm_edca_table.is_cur_rdl_state = false;
39 ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO, "Orginial VO PARAM: 0x%x\n",
40 odm_read_4byte(dm, ODM_EDCA_VO_PARAM));
41 ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO, "Orginial VI PARAM: 0x%x\n",
42 odm_read_4byte(dm, ODM_EDCA_VI_PARAM));
43 ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO, "Orginial BE PARAM: 0x%x\n",
44 odm_read_4byte(dm, ODM_EDCA_BE_PARAM));
45 ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO, "Orginial BK PARAM: 0x%x\n",
46 odm_read_4byte(dm, ODM_EDCA_BK_PARAM));
48 } /* ODM_InitEdcaTurbo */
50 void odm_edca_turbo_check(void *dm_void)
52 /* For AP/ADSL use struct rtl8192cd_priv* */
53 /* For CE/NIC use struct void* */
55 /* 2011/09/29 MH In HW integration first stage, we provide 4 different
56 * handle to operate at the same time.
57 * In the stage2/3, we need to prive universal interface and merge all
58 * HW dynamic mechanism.
60 struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
62 ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO,
63 "%s========================>\n", __func__);
65 if (!(dm->support_ability & ODM_MAC_EDCA_TURBO))
68 switch (dm->support_platform) {
74 odm_edca_turbo_check_ce(dm);
77 ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO,
78 "<========================%s\n", __func__);
80 } /* odm_CheckEdcaTurbo */
82 void odm_edca_turbo_check_ce(void *dm_void)
84 struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
85 struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
88 u32 edca_be_ul = 0x5ea42b;
89 u32 edca_be_dl = 0x5ea42b;
90 u32 edca_be = 0x5ea42b;
92 bool edca_turbo_on = false;
98 rtlpriv->dm.is_any_nonbepkts = false;
102 if (rtlpriv->dm.dbginfo.num_non_be_pkt > 0x100)
103 rtlpriv->dm.is_any_nonbepkts = true;
104 rtlpriv->dm.dbginfo.num_non_be_pkt = 0;
106 cur_txok_cnt = rtlpriv->stats.txbytesunicast_inperiod;
107 cur_rxok_cnt = rtlpriv->stats.rxbytesunicast_inperiod;
109 /*b_bias_on_rx = false;*/
110 edca_turbo_on = ((!rtlpriv->dm.is_any_nonbepkts) &&
111 (!rtlpriv->dm.disable_framebursting)) ?
115 if (rtlpriv->mac80211.mode == WIRELESS_MODE_B)
120 (cur_rxok_cnt > cur_txok_cnt * 4) ? true : false;
122 edca_be = is_cur_rdlstate ? edca_be_dl : edca_be_ul;
123 rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM_8822B, edca_be);
124 rtlpriv->dm.is_cur_rdlstate = is_cur_rdlstate;
125 rtlpriv->dm.current_turbo_edca = true;
127 if (rtlpriv->dm.current_turbo_edca) {
130 rtlpriv->cfg->ops->set_hw_reg(rtlpriv->hw,
133 rtlpriv->dm.current_turbo_edca = false;
138 rtlpriv->dm.is_any_nonbepkts = false;