drivers/staging/rtlwifi/phydm/rtl8822b/phydm_hal_api8822b.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2016  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * The full GNU General Public License is included in this distribution in the
  15  * file called LICENSE.
  16  *
  17  * Contact Information:
  18  * wlanfae <wlanfae@realtek.com>
  19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20  * Hsinchu 300, Taiwan.
  21  *
  22  * Larry Finger <Larry.Finger@lwfinger.net>
  23  *
  24  *****************************************************************************/
  25 #ifndef __INC_PHYDM_API_H_8822B__
  26 #define __INC_PHYDM_API_H_8822B__
  27
  28 /*2016.08.01 (HW user guide version: R27, SW user guide version: R05,
  29  *            Modification: R31)
  30  */
  31 #define PHY_CONFIG_VERSION_8822B "27.5.31"
  32
  33 #define INVALID_RF_DATA 0xffffffff
  34 #define INVALID_TXAGC_DATA 0xff
  35
  36 #define config_phydm_read_rf_check_8822b(data) (data != INVALID_RF_DATA)
  37 #define config_phydm_read_txagc_check_8822b(data) (data != INVALID_TXAGC_DATA)
  38
  39 u32 config_phydm_read_rf_reg_8822b(struct phy_dm_struct *dm,
  40                                    enum odm_rf_radio_path rf_path, u32 reg_addr,
  41                                    u32 bit_mask);
  42
  43 bool config_phydm_write_rf_reg_8822b(struct phy_dm_struct *dm,
  44                                      enum odm_rf_radio_path rf_path,
  45                                      u32 reg_addr, u32 bit_mask, u32 data);
  46
  47 bool config_phydm_write_txagc_8822b(struct phy_dm_struct *dm, u32 power_index,
  48                                     enum odm_rf_radio_path path, u8 hw_rate);
  49
  50 u8 config_phydm_read_txagc_8822b(struct phy_dm_struct *dm,
  51                                  enum odm_rf_radio_path path, u8 hw_rate);
  52
  53 bool config_phydm_switch_band_8822b(struct phy_dm_struct *dm, u8 central_ch);
  54
  55 bool config_phydm_switch_channel_8822b(struct phy_dm_struct *dm, u8 central_ch);
  56
  57 bool config_phydm_switch_bandwidth_8822b(struct phy_dm_struct *dm,
  58                                          u8 primary_ch_idx,
  59                                          enum odm_bw bandwidth);
  60
  61 bool config_phydm_switch_channel_bw_8822b(struct phy_dm_struct *dm,
  62                                           u8 central_ch, u8 primary_ch_idx,
  63                                           enum odm_bw bandwidth);
  64
  65 bool config_phydm_trx_mode_8822b(struct phy_dm_struct *dm,
  66                                  enum odm_rf_path tx_path,
  67                                  enum odm_rf_path rx_path, bool is_tx2_path);
  68
  69 bool config_phydm_parameter_init(struct phy_dm_struct *dm,
  70                                  enum odm_parameter_init type);
  71
  72 /* ======================================================================== */
  73 /* These following functions can be used for PHY DM only*/
  74
  75 bool phydm_write_txagc_1byte_8822b(struct phy_dm_struct *dm, u32 power_index,
  76                                    enum odm_rf_radio_path path, u8 hw_rate);
  77
  78 void phydm_init_hw_info_by_rfe_type_8822b(struct phy_dm_struct *dm);
  79
  80 s32 phydm_get_condition_number_8822B(struct phy_dm_struct *dm);
  81
  82 /* ======================================================================== */
  83
  84 #endif /*  __INC_PHYDM_API_H_8822B__ */