drivers/staging/rtlwifi/rtl8822be/sw.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /******************************************************************************
   3  *
   4  * Copyright(c) 2016  Realtek Corporation.
   5  *
   6  * Contact Information:
   7  * wlanfae <wlanfae@realtek.com>
   8  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
   9  * Hsinchu 300, Taiwan.
  10  *
  11  * Larry Finger <Larry.Finger@lwfinger.net>
  12  *
  13  *****************************************************************************/
  14
  15 #include "../wifi.h"
  16 #include "../core.h"
  17 #include "../pci.h"
  18 #include "../base.h"
  19 #include "reg.h"
  20 #include "def.h"
  21 #include "phy.h"
  22 #include "hw.h"
  23 #include "sw.h"
  24 #include "fw.h"
  25 #include "trx.h"
  26 #include "led.h"
  27 #include "../btcoexist/rtl_btc.h"
  28 #include "../halmac/rtl_halmac.h"
  29 #include "../phydm/rtl_phydm.h"
  30 #include <linux/vmalloc.h>
  31 #include <linux/module.h>
  32
  33 static void rtl8822be_init_aspm_vars(struct ieee80211_hw *hw)
  34 {
  35         struct rtl_priv *rtlpriv = rtl_priv(hw);
  36         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  37
  38         /*close ASPM for AMD defaultly */
  39         rtlpci->const_amdpci_aspm = 0;
  40
  41         /*
  42          * ASPM PS mode.
  43          * 0 - Disable ASPM,
  44          * 1 - Enable ASPM without Clock Req,
  45          * 2 - Enable ASPM with Clock Req,
  46          * 3 - Always Enable ASPM with Clock Req,
  47          * 4 - Always Enable ASPM without Clock Req.
  48          * set default to RTL8822BE:3 RTL8822B:2
  49          *
  50          */
  51         rtlpci->const_pci_aspm = 3;
  52
  53         /*Setting for PCI-E device */
  54         rtlpci->const_devicepci_aspm_setting = 0x03;
  55
  56         /*Setting for PCI-E bridge */
  57         rtlpci->const_hostpci_aspm_setting = 0x02;
  58
  59         /*
  60          * In Hw/Sw Radio Off situation.
  61          * 0 - Default,
  62          * 1 - From ASPM setting without low Mac Pwr,
  63          * 2 - From ASPM setting with low Mac Pwr,
  64          * 3 - Bus D3
  65          * set default to RTL8822BE:0 RTL8192SE:2
  66          */
  67         rtlpci->const_hwsw_rfoff_d3 = 0;
  68
  69         /*
  70          * This setting works for those device with
  71          * backdoor ASPM setting such as EPHY setting.
  72          * 0 - Not support ASPM,
  73          * 1 - Support ASPM,
  74          * 2 - According to chipset.
  75          */
  76         rtlpci->const_support_pciaspm = rtlpriv->cfg->mod_params->aspm_support;
  77 }
  78
  79 int rtl8822be_init_sw_vars(struct ieee80211_hw *hw)
  80 {
  81         int err = 0;
  82         struct rtl_priv *rtlpriv = rtl_priv(hw);
  83         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  84         const char *fw_name;
  85         struct rtl_phydm_params params;
  86
  87         rtl8822be_bt_reg_init(hw);
  88         rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support;
  89         rtlpriv->btcoexist.btc_ops = rtl_btc_get_ops_pointer();
  90         rtlpriv->halmac.ops = rtl_halmac_get_ops_pointer();
  91         rtlpriv->halmac.ops->halmac_init_adapter(rtlpriv);
  92
  93         /* should after halmac_init_adapter() */
  94         rtl8822be_read_eeprom_info(hw, &params);
  95
  96         /* need eeprom info */
  97         rtlpriv->phydm.ops = rtl_phydm_get_ops_pointer();
  98         rtlpriv->phydm.ops->phydm_init_priv(rtlpriv, &params);
  99
 100         rtlpriv->dm.dm_initialgain_enable = 1;
 101         rtlpriv->dm.dm_flag = 0;
 102         rtlpriv->dm.disable_framebursting = 0;
 103         /*rtlpriv->dm.thermalvalue = 0;*/
 104         rtlpriv->dm.useramask = 1; /* turn on RA */
 105         rtlpci->transmit_config = CFENDFORM | BIT(15);
 106
 107         rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G;
 108         /*following 2 is for register 5G band, refer to _rtl_init_mac80211()*/
 109         rtlpriv->rtlhal.bandset = BAND_ON_BOTH;
 110         rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY;
 111
 112         rtlpci->receive_config = (RCR_APPFCS                    |
 113                                   RCR_APP_MIC                   |
 114                                   RCR_APP_ICV                   |
 115                                   RCR_APP_PHYST_RXFF            |
 116                                   RCR_VHT_DACK                  |
 117                                   RCR_HTC_LOC_CTRL              |
 118                                   /*RCR_AMF                     |*/
 119                                   RCR_CBSSID_BCN                |
 120                                   RCR_CBSSID_DATA               |
 121                                   /*RCR_ACF                     |*/
 122                                   /*RCR_ADF                     |*/
 123                                   /*RCR_AICV                    |*/
 124                                   /*RCR_ACRC32                  |*/
 125                                   RCR_AB                        |
 126                                   RCR_AM                        |
 127                                   RCR_APM                       |
 128                                   0);
 129
 130         rtlpci->irq_mask[0] = (u32)(IMR_PSTIMEOUT               |
 131                                     /*IMR_TBDER                 |*/
 132                                     /*IMR_TBDOK                 |*/
 133                                     /*IMR_BCNDMAINT0            |*/
 134                                     IMR_GTINT3                  |
 135                                     IMR_HSISR_IND_ON_INT        |
 136                                     IMR_C2HCMD                  |
 137                                     IMR_HIGHDOK                 |
 138                                     IMR_MGNTDOK                 |
 139                                     IMR_BKDOK                   |
 140                                     IMR_BEDOK                   |
 141                                     IMR_VIDOK                   |
 142                                     IMR_VODOK                   |
 143                                     IMR_RDU                     |
 144                                     IMR_ROK                     |
 145                                     0);
 146
 147         rtlpci->irq_mask[1] = (u32)(IMR_RXFOVW | IMR_TXFOVW | 0);
 148         rtlpci->irq_mask[3] = (u32)(BIT_SETH2CDOK_MASK | 0);
 149
 150         /* for LPS & IPS */
 151         rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps;
 152         rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps;
 153         rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps;
 154         rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support;
 155         if (rtlpriv->cfg->mod_params->disable_watchdog)
 156                 pr_info("watchdog disabled\n");
 157         rtlpriv->psc.reg_fwctrl_lps = 2;
 158         rtlpriv->psc.reg_max_lps_awakeintvl = 2;
 159         /* for ASPM, you can close aspm through
 160          * set const_support_pciaspm = 0
 161          */
 162         rtl8822be_init_aspm_vars(hw);
 163
 164         if (rtlpriv->psc.reg_fwctrl_lps == 1)
 165                 rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE;
 166         else if (rtlpriv->psc.reg_fwctrl_lps == 2)
 167                 rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE;
 168         else if (rtlpriv->psc.reg_fwctrl_lps == 3)
 169                 rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE;
 170
 171         /* for early mode */
 172         rtlpriv->rtlhal.earlymode_enable = false;
 173
 174         /*low power */
 175         rtlpriv->psc.low_power_enable = false;
 176
 177         /* for firmware buf */
 178         rtlpriv->rtlhal.pfirmware = vzalloc(0x40000);
 179         if (!rtlpriv->rtlhal.pfirmware) {
 180                 /*pr_err("Can't alloc buffer for fw\n");*/
 181                 return 1;
 182         }
 183
 184         /* request fw */
 185         fw_name = "/*(DEBLOBBED)*/";
 186
 187         rtlpriv->max_fw_size = 0x40000;
 188         pr_info("Using firmware %s\n", fw_name);
 189         err = reject_firmware_nowait(THIS_MODULE, 1, fw_name, rtlpriv->io.dev,
 190                                       GFP_KERNEL, hw, rtl_fw_cb);
 191         if (err) {
 192                 pr_err("Failed to request firmware!\n");
 193                 return 1;
 194         }
 195
 196         /* init table of tx power by rate & limit */
 197         rtl8822be_load_txpower_by_rate(hw);
 198         rtl8822be_load_txpower_limit(hw);
 199
 200         return 0;
 201 }
 202
 203 void rtl8822be_deinit_sw_vars(struct ieee80211_hw *hw)
 204 {
 205         struct rtl_priv *rtlpriv = rtl_priv(hw);
 206
 207         rtlpriv->halmac.ops->halmac_deinit_adapter(rtlpriv);
 208         rtlpriv->phydm.ops->phydm_deinit_priv(rtlpriv);
 209
 210         if (rtlpriv->rtlhal.pfirmware) {
 211                 vfree(rtlpriv->rtlhal.pfirmware);
 212                 rtlpriv->rtlhal.pfirmware = NULL;
 213         }
 214 }
 215
 216 /* get bt coexist status */
 217 bool rtl8822be_get_btc_status(void)
 218 {
 219         return true;
 220 }
 221
 222 static void rtl8822be_phydm_watchdog(struct ieee80211_hw *hw)
 223 {
 224         struct rtl_priv *rtlpriv = rtl_priv(hw);
 225         u32 tmp;
 226
 227         tmp = rtl_read_dword(rtlpriv, 0xc00);
 228         if (tmp & 0xFF000000) { /* Recover 0xC00: 0xF800000C --> 0x0000000C */
 229                 RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
 230                          "found regaddr_c00=%08X\n", tmp);
 231                 tmp &= ~0xFF000000;
 232                 rtl_write_dword(rtlpriv, 0xc00, tmp);
 233                 RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
 234                          "apply regaddr_c00=%08X\n", tmp);
 235         }
 236
 237         rtlpriv->phydm.ops->phydm_watchdog(rtlpriv);
 238 }
 239
 240 static struct rtl_hal_ops rtl8822be_hal_ops = {
 241         .init_sw_vars = rtl8822be_init_sw_vars,
 242         .deinit_sw_vars = rtl8822be_deinit_sw_vars,
 243         .read_eeprom_info = rtl8822be_read_eeprom_info_dummy,
 244         .interrupt_recognized = rtl8822be_interrupt_recognized,
 245         .hw_init = rtl8822be_hw_init,
 246         .hw_disable = rtl8822be_card_disable,
 247         .hw_suspend = rtl8822be_suspend,
 248         .hw_resume = rtl8822be_resume,
 249         .enable_interrupt = rtl8822be_enable_interrupt,
 250         .disable_interrupt = rtl8822be_disable_interrupt,
 251         .set_network_type = rtl8822be_set_network_type,
 252         .set_chk_bssid = rtl8822be_set_check_bssid,
 253         .set_qos = rtl8822be_set_qos,
 254         .set_bcn_reg = rtl8822be_set_beacon_related_registers,
 255         .set_bcn_intv = rtl8822be_set_beacon_interval,
 256         .update_interrupt_mask = rtl8822be_update_interrupt_mask,
 257         .get_hw_reg = rtl8822be_get_hw_reg,
 258         .set_hw_reg = rtl8822be_set_hw_reg,
 259         .update_rate_tbl = rtl8822be_update_hal_rate_tbl,
 260         .pre_fill_tx_bd_desc = rtl8822be_pre_fill_tx_bd_desc,
 261         .rx_desc_buff_remained_cnt = rtl8822be_rx_desc_buff_remained_cnt,
 262         .rx_check_dma_ok = rtl8822be_rx_check_dma_ok,
 263         .fill_tx_desc = rtl8822be_tx_fill_desc,
 264         .fill_tx_special_desc = rtl8822be_tx_fill_special_desc,
 265         .query_rx_desc = rtl8822be_rx_query_desc,
 266         .radio_onoff_checking = rtl8822be_gpio_radio_on_off_checking,
 267         .switch_channel = rtl8822be_phy_sw_chnl,
 268         .set_channel_access = rtl8822be_update_channel_access_setting,
 269         .set_bw_mode = rtl8822be_phy_set_bw_mode,
 270         .dm_watchdog = rtl8822be_phydm_watchdog,
 271         .scan_operation_backup = rtl8822be_phy_scan_operation_backup,
 272         .set_rf_power_state = rtl8822be_phy_set_rf_power_state,
 273         .led_control = rtl8822be_led_control,
 274         .set_desc = rtl8822be_set_desc,
 275         .get_desc = rtl8822be_get_desc,
 276         .is_tx_desc_closed = rtl8822be_is_tx_desc_closed,
 277         .get_available_desc = rtl8822be_get_available_desc,
 278         .tx_polling = rtl8822be_tx_polling,
 279         .enable_hw_sec = rtl8822be_enable_hw_security_config,
 280         .set_key = rtl8822be_set_key,
 281         .init_sw_leds = rtl8822be_init_sw_leds,
 282         .get_bbreg = rtl8822be_phy_query_bb_reg,
 283         .set_bbreg = rtl8822be_phy_set_bb_reg,
 284         .get_rfreg = rtl8822be_phy_query_rf_reg,
 285         .set_rfreg = rtl8822be_phy_set_rf_reg,
 286         .fill_h2c_cmd = rtl8822be_fill_h2c_cmd,
 287         .set_default_port_id_cmd = rtl8822be_set_default_port_id_cmd,
 288         .get_btc_status = rtl8822be_get_btc_status,
 289         .rx_command_packet = rtl8822be_rx_command_packet,
 290         .c2h_content_parsing = rtl8822be_c2h_content_parsing,
 291         /* ops for halmac cb */
 292         .halmac_cb_init_mac_register = rtl8822be_halmac_cb_init_mac_register,
 293         .halmac_cb_init_bb_rf_register =
 294                 rtl8822be_halmac_cb_init_bb_rf_register,
 295         .halmac_cb_write_data_rsvd_page =
 296                 rtl8822b_halmac_cb_write_data_rsvd_page,
 297         .halmac_cb_write_data_h2c = rtl8822b_halmac_cb_write_data_h2c,
 298         /* ops for phydm cb */
 299         .get_txpower_index = rtl8822be_get_txpower_index,
 300         .set_tx_power_index_by_rs = rtl8822be_phy_set_tx_power_index_by_rs,
 301         .store_tx_power_by_rate = rtl8822be_store_tx_power_by_rate,
 302         .phy_set_txpower_limit = rtl8822be_phy_set_txpower_limit,
 303 };
 304
 305 static struct rtl_mod_params rtl8822be_mod_params = {
 306         .sw_crypto = false,
 307         .inactiveps = true,
 308         .swctrl_lps = false,
 309         .fwctrl_lps = true,
 310         .msi_support = true,
 311         .dma64 = false,
 312         .aspm_support = 1,
 313         .disable_watchdog = false,
 314         .debug_level = 0,
 315         .debug_mask = 0,
 316 };
 317
 318 static struct rtl_hal_cfg rtl8822be_hal_cfg = {
 319         .bar_id = 2,
 320         .write_readback = false,
 321         .name = "rtl8822be_pci",
 322         .ops = &rtl8822be_hal_ops,
 323         .mod_params = &rtl8822be_mod_params,
 324         .spec_ver = RTL_SPEC_NEW_RATEID | RTL_SPEC_SUPPORT_VHT |
 325                     RTL_SPEC_NEW_FW_C2H,
 326         .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL_8822B,
 327         .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN_8822B,
 328         .maps[SYS_CLK] = REG_SYS_CLK_CTRL_8822B,
 329         .maps[MAC_RCR_AM] = AM,
 330         .maps[MAC_RCR_AB] = AB,
 331         .maps[MAC_RCR_ACRC32] = ACRC32,
 332         .maps[MAC_RCR_ACF] = ACF,
 333         .maps[MAC_RCR_AAP] = AAP,
 334         .maps[MAC_HIMR] = REG_HIMR0_8822B,
 335         .maps[MAC_HIMRE] = REG_HIMR1_8822B,
 336
 337         .maps[EFUSE_ACCESS] = REG_EFUSE_ACCESS_8822B,
 338
 339         .maps[EFUSE_TEST] = REG_LDO_EFUSE_CTRL_8822B,
 340         .maps[EFUSE_CTRL] = REG_EFUSE_CTRL_8822B,
 341         .maps[EFUSE_CLK] = 0,
 342         .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL_8822B,
 343         .maps[EFUSE_PWC_EV12V] = PWC_EV12V,
 344         .maps[EFUSE_FEN_ELDR] = FEN_ELDR,
 345         .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN,
 346         .maps[EFUSE_ANA8M] = ANA8M,
 347         .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE,
 348         .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION,
 349         .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN,
 350         .maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES,
 351
 352         .maps[RWCAM] = REG_CAMCMD_8822B,
 353         .maps[WCAMI] = REG_CAMWRITE_8822B,
 354         .maps[RCAMO] = REG_CAMREAD_8822B,
 355         .maps[CAMDBG] = REG_CAMDBG_8822B,
 356         .maps[SECR] = REG_SECCFG_8822B,
 357         .maps[SEC_CAM_NONE] = CAM_NONE,
 358         .maps[SEC_CAM_WEP40] = CAM_WEP40,
 359         .maps[SEC_CAM_TKIP] = CAM_TKIP,
 360         .maps[SEC_CAM_AES] = CAM_AES,
 361         .maps[SEC_CAM_WEP104] = CAM_WEP104,
 362
 363         .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6,
 364         .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5,
 365         .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4,
 366         .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3,
 367         .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2,
 368         .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1,
 369         /*      .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8,     */ /*need check*/
 370         .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7,
 371         .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6,
 372         .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5,
 373         .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4,
 374         .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3,
 375         .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2,
 376         .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1,
 377         /*      .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2,*/
 378         /*      .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1,*/
 379
 380         .maps[RTL_IMR_TXFOVW] = IMR_TXFOVW,
 381         .maps[RTL_IMR_PSTIMEOUT] = IMR_PSTIMEOUT,
 382         .maps[RTL_IMR_BCNINT] = IMR_BCNDMAINT0,
 383         .maps[RTL_IMR_RXFOVW] = IMR_RXFOVW,
 384         .maps[RTL_IMR_RDU] = IMR_RDU,
 385         .maps[RTL_IMR_ATIMEND] = IMR_ATIMEND,
 386         .maps[RTL_IMR_H2CDOK] = IMR_H2CDOK,
 387         .maps[RTL_IMR_BDOK] = IMR_BCNDOK0,
 388         .maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK,
 389         .maps[RTL_IMR_TBDER] = IMR_TBDER,
 390         .maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK,
 391         .maps[RTL_IMR_TBDOK] = IMR_TBDOK,
 392         .maps[RTL_IMR_BKDOK] = IMR_BKDOK,
 393         .maps[RTL_IMR_BEDOK] = IMR_BEDOK,
 394         .maps[RTL_IMR_VIDOK] = IMR_VIDOK,
 395         .maps[RTL_IMR_VODOK] = IMR_VODOK,
 396         .maps[RTL_IMR_ROK] = IMR_ROK,
 397         .maps[RTL_IBSS_INT_MASKS] = (IMR_BCNDMAINT0 | IMR_TBDOK | IMR_TBDER),
 398
 399         .maps[RTL_RC_CCK_RATE1M] = DESC_RATE1M,
 400         .maps[RTL_RC_CCK_RATE2M] = DESC_RATE2M,
 401         .maps[RTL_RC_CCK_RATE5_5M] = DESC_RATE5_5M,
 402         .maps[RTL_RC_CCK_RATE11M] = DESC_RATE11M,
 403         .maps[RTL_RC_OFDM_RATE6M] = DESC_RATE6M,
 404         .maps[RTL_RC_OFDM_RATE9M] = DESC_RATE9M,
 405         .maps[RTL_RC_OFDM_RATE12M] = DESC_RATE12M,
 406         .maps[RTL_RC_OFDM_RATE18M] = DESC_RATE18M,
 407         .maps[RTL_RC_OFDM_RATE24M] = DESC_RATE24M,
 408         .maps[RTL_RC_OFDM_RATE36M] = DESC_RATE36M,
 409         .maps[RTL_RC_OFDM_RATE48M] = DESC_RATE48M,
 410         .maps[RTL_RC_OFDM_RATE54M] = DESC_RATE54M,
 411
 412         .maps[RTL_RC_HT_RATEMCS7] = DESC_RATEMCS7,
 413         .maps[RTL_RC_HT_RATEMCS15] = DESC_RATEMCS15,
 414
 415         /*VHT hightest rate*/
 416         .maps[RTL_RC_VHT_RATE_1SS_MCS7] = DESC_RATEVHT1SS_MCS7,
 417         .maps[RTL_RC_VHT_RATE_1SS_MCS8] = DESC_RATEVHT1SS_MCS8,
 418         .maps[RTL_RC_VHT_RATE_1SS_MCS9] = DESC_RATEVHT1SS_MCS9,
 419         .maps[RTL_RC_VHT_RATE_2SS_MCS7] = DESC_RATEVHT2SS_MCS7,
 420         .maps[RTL_RC_VHT_RATE_2SS_MCS8] = DESC_RATEVHT2SS_MCS8,
 421         .maps[RTL_RC_VHT_RATE_2SS_MCS9] = DESC_RATEVHT2SS_MCS9,
 422 };
 423
 424 static const struct pci_device_id rtl8822be_pci_ids[] = {
 425         {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xB822, rtl8822be_hal_cfg)},
 426         {},
 427 };
 428
 429 MODULE_DEVICE_TABLE(pci, rtl8822be_pci_ids);
 430
 431 MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
 432 MODULE_AUTHOR("Larry Finger     <Larry.Finger@lwfinger.net>");
 433 MODULE_LICENSE("GPL");
 434 MODULE_DESCRIPTION("Realtek 8822BE 802.11n PCI wireless");
 435 /*(DEBLOBBED)*/
 436
 437 module_param_named(swenc, rtl8822be_mod_params.sw_crypto, bool, 0444);
 438 module_param_named(debug_level, rtl8822be_mod_params.debug_level, int, 0644);
 439 module_param_named(debug_mask, rtl8822be_mod_params.debug_mask, ullong, 0644);
 440 module_param_named(ips, rtl8822be_mod_params.inactiveps, bool, 0444);
 441 module_param_named(swlps, rtl8822be_mod_params.swctrl_lps, bool, 0444);
 442 module_param_named(fwlps, rtl8822be_mod_params.fwctrl_lps, bool, 0444);
 443 module_param_named(msi, rtl8822be_mod_params.msi_support, bool, 0444);
 444 module_param_named(dma64, rtl8822be_mod_params.dma64, bool, 0444);
 445 module_param_named(aspm, rtl8822be_mod_params.aspm_support, int, 0444);
 446 module_param_named(disable_watchdog, rtl8822be_mod_params.disable_watchdog,
 447                    bool, 0444);
 448 MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");
 449 MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n");
 450 MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n");
 451 MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n");
 452 MODULE_PARM_DESC(msi, "Set to 1 to use MSI interrupts mode (default 1)\n");
 453 MODULE_PARM_DESC(dma64, "Set to 1 to use DMA 64 (default 0)\n");
 454 MODULE_PARM_DESC(aspm, "Set to 1 to enable ASPM (default 1)\n");
 455 MODULE_PARM_DESC(debug, "Set debug level (0-5) (default 0)");
 456 MODULE_PARM_DESC(debug_mask, "Set debug mask (default 0)");
 457 MODULE_PARM_DESC(disable_watchdog,
 458                  "Set to 1 to disable the watchdog (default 0)\n");
 459
 460 static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume);
 461
 462 static struct pci_driver rtl8822be_driver = {
 463         .name = KBUILD_MODNAME,
 464         .id_table = rtl8822be_pci_ids,
 465         .probe = rtl_pci_probe,
 466         .remove = rtl_pci_disconnect,
 467         .driver.pm = &rtlwifi_pm_ops,
 468 };
 469
 470 module_pci_driver(rtl8822be_driver);