drivers/staging/rtlwifi/rtl8822be/trx.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2016  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * The full GNU General Public License is included in this distribution in the
  15  * file called LICENSE.
  16  *
  17  * Contact Information:
  18  * wlanfae <wlanfae@realtek.com>
  19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20  * Hsinchu 300, Taiwan.
  21  *
  22  * Larry Finger <Larry.Finger@lwfinger.net>
  23  *
  24  *****************************************************************************/
  25
  26 #ifndef __RTL8822B_TRX_H__
  27 #define __RTL8822B_TRX_H__
  28
  29 #include "../halmac/halmac_tx_desc_nic.h"
  30 #include "../halmac/halmac_rx_desc_nic.h"
  31
  32 #define TX_DESC_SIZE    64
  33
  34 #define RX_DRV_INFO_SIZE_UNIT   8
  35
  36 #define TX_DESC_NEXT_DESC_OFFSET        48
  37 #define USB_HWDESC_HEADER_LEN   48
  38
  39 #define RX_DESC_SIZE    24
  40 #define MAX_RECEIVE_BUFFER_SIZE 8192
  41
  42 #define SET_EARLYMODE_PKTNUM(__paddr, __val)                                   \
  43         SET_BITS_TO_LE_4BYTE(__paddr, 0, 4, __val)
  44 #define SET_EARLYMODE_LEN0(__paddr, __val)                                     \
  45         SET_BITS_TO_LE_4BYTE(__paddr, 4, 15, __val)
  46 #define SET_EARLYMODE_LEN1(__paddr, __val)                                     \
  47         SET_BITS_TO_LE_4BYTE(__paddr, 16, 2, __val)
  48 #define SET_EARLYMODE_LEN1_1(__paddr, __val)                                   \
  49         SET_BITS_TO_LE_4BYTE(__paddr, 19, 13, __val)
  50 #define SET_EARLYMODE_LEN1_2(__paddr, __val)                                   \
  51         SET_BITS_TO_LE_4BYTE(__paddr + 4, 0, 2, __val)
  52 #define SET_EARLYMODE_LEN2(__paddr, __val)                                     \
  53         SET_BITS_TO_LE_4BYTE(__paddr + 4, 2, 15, __val)
  54 #define SET_EARLYMODE_LEN2_1(__paddr, __val)                                   \
  55         SET_BITS_TO_LE_4BYTE(__paddr, 2, 4, __val)
  56 #define SET_EARLYMODE_LEN2_2(__paddr, __val)                                   \
  57         SET_BITS_TO_LE_4BYTE(__paddr + 4, 0, 8, __val)
  58 #define SET_EARLYMODE_LEN3(__paddr, __val)                                     \
  59         SET_BITS_TO_LE_4BYTE(__paddr + 4, 17, 15, __val)
  60 #define SET_EARLYMODE_LEN4(__paddr, __val)                                     \
  61         SET_BITS_TO_LE_4BYTE(__paddr + 4, 20, 12, __val)
  62
  63 /* TX/RX buffer descriptor */
  64
  65 /* for Txfilldescroptor8822be, fill the desc content. */
  66 #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pdesc, __offset, __val)            \
  67         SET_BITS_TO_LE_4BYTE((__pdesc) + ((__offset) * 16), 0, 16, __val)
  68 #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pdesc, __offset, __val)          \
  69         SET_BITS_TO_LE_4BYTE((__pdesc) + ((__offset) * 16), 31, 1, __val)
  70 #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pdesc, __offset, __val)        \
  71         SET_BITS_TO_LE_4BYTE((__pdesc) + ((__offset) * 16) + 4, 0, 32, __val)
  72 #define SET_TXBUFFER_DESC_ADD_HIGH_WITH_OFFSET(pbd, off, val, dma64)           \
  73         (dma64 ? SET_BITS_TO_LE_4BYTE((pbd) + ((off) * 16) + 8, 0, 32, val) : 0)
  74 #define GET_TXBUFFER_DESC_ADDR_LOW(__pdesc, __offset)                          \
  75         LE_BITS_TO_4BYTE((__pdesc) + ((__offset) * 16) + 4, 0, 32)
  76 #define GET_TXBUFFER_DESC_ADDR_HIGH(pbd, off, dma64)                           \
  77         (dma64 ? LE_BITS_TO_4BYTE((pbd) + ((off) * 16) + 8, 0, 32) : 0)
  78
  79 /* Dword 0 */
  80 #define SET_TX_BUFF_DESC_LEN_0(__pdesc, __val)                                 \
  81         SET_BITS_TO_LE_4BYTE(__pdesc, 0, 14, __val)
  82 #define SET_TX_BUFF_DESC_PSB(__pdesc, __val)                                   \
  83         SET_BITS_TO_LE_4BYTE(__pdesc, 16, 15, __val)
  84 #define SET_TX_BUFF_DESC_OWN(__pdesc, __val)                                   \
  85         SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val)
  86
  87 /* Dword 1 */
  88 #define SET_TX_BUFF_DESC_ADDR_LOW_0(__pdesc, __val)                            \
  89         SET_BITS_TO_LE_4BYTE((__pdesc) + 4, 0, 32, __val)
  90 /* Dword 2 */
  91 #define SET_TX_BUFF_DESC_ADDR_HIGH_0(bdesc, val, dma64)                        \
  92         SET_TXBUFFER_DESC_ADD_HIGH_WITH_OFFSET(bdesc, 0, val, dma64)
  93 /* Dword 3 / RESERVED 0 */
  94
  95 /* RX buffer  */
  96
  97 /* DWORD 0 */
  98 #define SET_RX_BUFFER_DESC_DATA_LENGTH(__rx_status_desc, __val)                \
  99         SET_BITS_TO_LE_4BYTE(__rx_status_desc, 0, 14, __val)
 100 #define SET_RX_BUFFER_DESC_LS(__rx_status_desc, __val)                         \
 101         SET_BITS_TO_LE_4BYTE(__rx_status_desc, 15, 1, __val)
 102 #define SET_RX_BUFFER_DESC_FS(__rx_status_desc, __val)                         \
 103         SET_BITS_TO_LE_4BYTE(__rx_status_desc, 16, 1, __val)
 104 #define SET_RX_BUFFER_DESC_TOTAL_LENGTH(__rx_status_desc, __val)               \
 105         SET_BITS_TO_LE_4BYTE(__rx_status_desc, 16, 15, __val)
 106
 107 #define GET_RX_BUFFER_DESC_OWN(__rx_status_desc)                               \
 108         LE_BITS_TO_4BYTE(__rx_status_desc, 31, 1)
 109 #define GET_RX_BUFFER_DESC_LS(__rx_status_desc)                                \
 110         LE_BITS_TO_4BYTE(__rx_status_desc, 15, 1)
 111 #define GET_RX_BUFFER_DESC_FS(__rx_status_desc)                                \
 112         LE_BITS_TO_4BYTE(__rx_status_desc, 16, 1)
 113 #define GET_RX_BUFFER_DESC_TOTAL_LENGTH(__rx_status_desc)                      \
 114         LE_BITS_TO_4BYTE(__rx_status_desc, 16, 15)
 115
 116 /* DWORD 1 */
 117 #define SET_RX_BUFFER_PHYSICAL_LOW(__rx_status_desc, __val)                    \
 118         SET_BITS_TO_LE_4BYTE(__rx_status_desc + 4, 0, 32, __val)
 119
 120 /* DWORD 2 */
 121 #define SET_RX_BUFFER_PHYSICAL_HIGH(__rx_status_desc, __val, dma64)            \
 122         (dma64 ? SET_BITS_TO_LE_4BYTE((__rx_status_desc) + 8, 0, 32, __val) : 0)
 123
 124 #define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size)                              \
 125         do {                                                                   \
 126                 if (_size > TX_DESC_NEXT_DESC_OFFSET)                          \
 127                         memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET);          \
 128                 else                                                           \
 129                         memset(__pdesc, 0, _size);                             \
 130         } while (0)
 131
 132 void rtl8822be_rx_check_dma_ok(struct ieee80211_hw *hw, u8 *header_desc,
 133                                u8 queue_index);
 134 u16 rtl8822be_rx_desc_buff_remained_cnt(struct ieee80211_hw *hw,
 135                                         u8 queue_index);
 136 u16 rtl8822be_get_available_desc(struct ieee80211_hw *hw, u8 queue_index);
 137 void rtl8822be_pre_fill_tx_bd_desc(struct ieee80211_hw *hw, u8 *tx_bd_desc,
 138                                    u8 *desc, u8 queue_index,
 139                                    struct sk_buff *skb, dma_addr_t addr);
 140
 141 void rtl8822be_tx_fill_desc(struct ieee80211_hw *hw, struct ieee80211_hdr *hdr,
 142                             u8 *pdesc_tx, u8 *pbd_desc_tx,
 143                             struct ieee80211_tx_info *info,
 144                             struct ieee80211_sta *sta, struct sk_buff *skb,
 145                             u8 hw_queue, struct rtl_tcb_desc *ptcb_desc);
 146 void rtl8822be_tx_fill_special_desc(struct ieee80211_hw *hw, u8 *pdesc,
 147                                     u8 *pbd_desc, struct sk_buff *skb,
 148                                     u8 hw_queue);
 149 bool rtl8822be_rx_query_desc(struct ieee80211_hw *hw, struct rtl_stats *status,
 150                              struct ieee80211_rx_status *rx_status, u8 *pdesc,
 151                              struct sk_buff *skb);
 152 void rtl8822be_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
 153                         u8 desc_name, u8 *val);
 154 u64 rtl8822be_get_desc(struct ieee80211_hw *hw,
 155                        u8 *pdesc, bool istx, u8 desc_name);
 156 bool rtl8822be_is_tx_desc_closed(struct ieee80211_hw *hw, u8 hw_queue,
 157                                  u16 index);
 158 void rtl8822be_tx_polling(struct ieee80211_hw *hw, u8 hw_queue);
 159 void rtl8822be_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
 160                                bool firstseg, bool lastseg,
 161                                struct sk_buff *skb);
 162 u32 rtl8822be_rx_command_packet(struct ieee80211_hw *hw,
 163                                 const struct rtl_stats *status,
 164                                 struct sk_buff *skb);
 165 #endif